i965/vec4: generate d2f/f2d pseudo-instructions

1 files changed, 25 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 238355f4c1..bda7d883de 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1553,6 +1553,31 @@ vec4_generator::generate_code(const cfg_t *cfg)
          break;
       }
 
+      case VEC4_OPCODE_DOUBLE_TO_FLOAT: {
+         assert(src[0].type == BRW_REGISTER_TYPE_DF);
+         assert(dst.type == BRW_REGISTER_TYPE_F);
+
+         brw_set_default_access_mode(p, BRW_ALIGN_1);
+         dst.hstride = BRW_HORIZONTAL_STRIDE_2;
+         dst.width = BRW_WIDTH_4;
+         brw_MOV(p, dst, src[0]);
+         brw_set_default_access_mode(p, BRW_ALIGN_16);
+         break;
+      }
+
+      case VEC4_OPCODE_FLOAT_TO_DOUBLE: {
+         assert(src[0].type == BRW_REGISTER_TYPE_F);
+         assert(dst.type == BRW_REGISTER_TYPE_DF);
+
+         brw_set_default_access_mode(p, BRW_ALIGN_1);
+         src[0].vstride = BRW_VERTICAL_STRIDE_8;
+         src[0].hstride = BRW_HORIZONTAL_STRIDE_2;
+         src[0].width = BRW_WIDTH_4;
+         brw_MOV(p, dst, src[0]);
+         brw_set_default_access_mode(p, BRW_ALIGN_16);
+         break;
+      }
+
       case VEC4_OPCODE_PACK_BYTES: {
          /* Is effectively:
           *