diff options
26 files changed, 107 insertions, 114 deletions
diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c index de0f6683..4d1b66f2 100644 --- a/benchmarks/intel_upload_blit_large.c +++ b/benchmarks/intel_upload_blit_large.c @@ -94,19 +94,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo_subdata(src_bo, 0, sizeof(data), data); /* Render the junk to the dst. */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c index dc2733e2..6f864cbd 100644 --- a/benchmarks/intel_upload_blit_large_gtt.c +++ b/benchmarks/intel_upload_blit_large_gtt.c @@ -94,19 +94,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_gem_bo_unmap_gtt(src_bo); /* Render the junk to the dst. */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c index 0ca9e9de..97b825dd 100644 --- a/benchmarks/intel_upload_blit_large_map.c +++ b/benchmarks/intel_upload_blit_large_map.c @@ -97,19 +97,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo_unmap(src_bo); /* Render the junk to the dst. */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c index 8ad25ad1..3fd095f3 100644 --- a/benchmarks/intel_upload_blit_small.c +++ b/benchmarks/intel_upload_blit_small.c @@ -107,19 +107,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, } /* Render the junk to the dst. */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/lib/i830_reg.h b/lib/i830_reg.h index 4d4e6188..394e74e7 100644 --- a/lib/i830_reg.h +++ b/lib/i830_reg.h @@ -80,7 +80,7 @@ #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) -#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) +#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index c798c212..e284d487 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -239,17 +239,18 @@ intel_blt_copy(struct intel_batchbuffer *batch, CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch)); #undef CHECK_RANGE - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | cmd_bits); + BLIT_COPY_BATCH_START(batch->devid, cmd_bits); OUT_BATCH((br13_bits) | (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */ OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 4eee7ea0..a7999698 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -96,6 +96,28 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch, #define ADVANCE_BATCH() do { \ } while(0) +#define BLIT_COPY_BATCH_START(devid, flags) do { \ + if (intel_gen(devid) >= 8) { \ + BEGIN_BATCH(10); \ + OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ + XY_SRC_COPY_BLT_WRITE_ALPHA | \ + XY_SRC_COPY_BLT_WRITE_RGB | \ + flags | 8); \ + } else { \ + BEGIN_BATCH(8); \ + OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ + XY_SRC_COPY_BLT_WRITE_ALPHA | \ + XY_SRC_COPY_BLT_WRITE_RGB | \ + flags | 6); \ + } \ +} while(0) + +#define BLIT_RELOC_UDW(devid) do { \ + if (intel_gen(devid) >= 8) { \ + OUT_BATCH(0); \ + } \ +} while(0) + void intel_blt_copy(struct intel_batchbuffer *batch, drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, diff --git a/lib/intel_reg.h b/lib/intel_reg.h index d70b94a3..e545bfa2 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -2713,7 +2713,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) -#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) +#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) diff --git a/tests/drm_vma_limiter_cached.c b/tests/drm_vma_limiter_cached.c index 02f08af4..822a5f45 100644 --- a/tests/drm_vma_limiter_cached.c +++ b/tests/drm_vma_limiter_cached.c @@ -80,19 +80,18 @@ int main(int argc, char **argv) /* put some load onto the gpu to keep the light buffers active for long * enough */ for (i = 0; i < 10000; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); } diff --git a/tests/gem_bad_blit.c b/tests/gem_bad_blit.c index 96c8dddc..c518b4fd 100644 --- a/tests/gem_bad_blit.c +++ b/tests/gem_bad_blit.c @@ -77,20 +77,18 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid) cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; } - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - cmd_bits); + BLIT_COPY_BATCH_START(devid, cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((64 << 16) | 64); /* 64x64 blit */ OUT_BATCH(BAD_GTT_DEST); + BLIT_RELOC_UDW(devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_caching.c b/tests/gem_caching.c index 10ac7a4c..d788891b 100644 --- a/tests/gem_caching.c +++ b/tests/gem_caching.c @@ -59,19 +59,18 @@ int fd; static void copy_bo(drm_intel_bo *src, drm_intel_bo *dst) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0 << 16 | 0); OUT_BATCH((BO_SIZE/4096) << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4096); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_cs_prefetch.c b/tests/gem_cs_prefetch.c index 01554eff..229a385a 100644 --- a/tests/gem_cs_prefetch.c +++ b/tests/gem_cs_prefetch.c @@ -132,7 +132,7 @@ int main(int argc, char **argv) /* copy the sample batch with the gpu to the new one, so that we * also test the unmappable part of the gtt. */ - BEGIN_BATCH(8); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB); @@ -142,9 +142,11 @@ int main(int argc, char **argv) OUT_BATCH(0); /* dst y1,x1 */ OUT_BATCH((1 << 16) | 1024); OUT_RELOC(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((0 << 16) | 0); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_double_irq_loop.c b/tests/gem_double_irq_loop.c index 2dcfaca4..ff44e4e3 100644 --- a/tests/gem_double_irq_loop.c +++ b/tests/gem_double_irq_loop.c @@ -61,19 +61,18 @@ dummy_reloc_loop(void) int i; for (i = 0; i < 0x800; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4*4096); OUT_BATCH(2048 << 16 | 0); OUT_BATCH((4096) << 16 | (2048)); OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4*4096); OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c index edab9f14..6b3608e0 100644 --- a/tests/gem_fenced_exec_thrash.c +++ b/tests/gem_fenced_exec_thrash.c @@ -81,20 +81,18 @@ static void emit_dummy_load(void) } for (i = 0; i < 5; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - tile_flags); + BLIT_COPY_BATCH_START(devid, tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_hangcheck_forcewake.c b/tests/gem_hangcheck_forcewake.c index e2a7e5e7..5f379e04 100644 --- a/tests/gem_hangcheck_forcewake.c +++ b/tests/gem_hangcheck_forcewake.c @@ -87,21 +87,20 @@ int main(int argc, char **argv) pitch /= 4; for (i = 0; i < 10000; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - XY_SRC_COPY_BLT_SRC_TILED | - XY_SRC_COPY_BLT_DST_TILED); + BLIT_COPY_BATCH_START(devid, + XY_SRC_COPY_BLT_SRC_TILED | + XY_SRC_COPY_BLT_DST_TILED); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_partial_pwrite_pread.c b/tests/gem_partial_pwrite_pread.c index d6d00dd9..0f4c9aed 100644 --- a/tests/gem_partial_pwrite_pread.c +++ b/tests/gem_partial_pwrite_pread.c @@ -61,19 +61,18 @@ int fd; static void copy_bo(drm_intel_bo *src, drm_intel_bo *dst) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0 << 16 | 0); OUT_BATCH((BO_SIZE/4096) << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4096); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_persistent_relocs.c b/tests/gem_persistent_relocs.c index 587af809..0b33b625 100644 --- a/tests/gem_persistent_relocs.c +++ b/tests/gem_persistent_relocs.c @@ -124,20 +124,18 @@ static void emit_dummy_load(int pitch) } for (i = 0; i < 5; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - tile_flags); + BLIT_COPY_BATCH_START(devid, tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_reloc_vs_gpu.c b/tests/gem_reloc_vs_gpu.c index 8a4d294b..b38dc8ed 100644 --- a/tests/gem_reloc_vs_gpu.c +++ b/tests/gem_reloc_vs_gpu.c @@ -116,20 +116,18 @@ static void emit_dummy_load(int pitch) } for (i = 0; i < 10; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - tile_flags); + BLIT_COPY_BATCH_START(devid, tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_ringfill.c b/tests/gem_ringfill.c index 3130cde6..ba910014 100644 --- a/tests/gem_ringfill.c +++ b/tests/gem_ringfill.c @@ -177,19 +177,18 @@ static void blt_copy(struct intel_batchbuffer *batch, unsigned w, unsigned h, struct scratch_buf *dst, unsigned dst_x, unsigned dst_y) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst->stride); OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */ OUT_BATCH(((dst_y + h) << 16) | (dst_x + w)); /* dst x2,y2 */ OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */ OUT_BATCH(src->stride); OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_set_tiling_vs_blt.c b/tests/gem_set_tiling_vs_blt.c index 2c074b7b..7335da87 100644 --- a/tests/gem_set_tiling_vs_blt.c +++ b/tests/gem_set_tiling_vs_blt.c @@ -85,19 +85,18 @@ static void do_test(uint32_t tiling, unsigned stride, busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096); for (i = 0; i < 250; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { @@ -158,20 +157,18 @@ static void do_test(uint32_t tiling, unsigned stride, blt_bits = XY_SRC_COPY_BLT_SRC_TILED; } - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - blt_bits | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, blt_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ stride); OUT_BATCH(0 << 16 | 0); OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride))); OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(blt_stride); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); @@ -186,19 +183,18 @@ static void do_test(uint32_t tiling, unsigned stride, /* Note: We don't care about gen4+ here because the blitter doesn't use * fences there. So not setting tiling flags on the tiled buffer is ok. */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ stride_after); OUT_BATCH(0 << 16 | 0); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(stride_after); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_stress.c b/tests/gem_stress.c index dfbbf66a..b7fd87ed 100644 --- a/tests/gem_stress.c +++ b/tests/gem_stress.c @@ -141,20 +141,18 @@ static void emit_blt(drm_intel_bo *src_bo, uint32_t src_tiling, unsigned src_pit } /* copy lower half to upper half */ - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - cmd_bits); + BLIT_COPY_BATCH_START(devid, cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(dst_y << 16 | dst_x); OUT_BATCH((dst_y+h) << 16 | (dst_x+w)); OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(src_y << 16 | src_x); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_tiled_partial_pwrite_pread.c b/tests/gem_tiled_partial_pwrite_pread.c index 2e24105e..bcae6e9e 100644 --- a/tests/gem_tiled_partial_pwrite_pread.c +++ b/tests/gem_tiled_partial_pwrite_pread.c @@ -82,20 +82,18 @@ copy_bo(drm_intel_bo *src, int src_tiled, cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; } - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB | - cmd_bits); + BLIT_COPY_BATCH_START(devid, cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_unfence_active_buffers.c b/tests/gem_unfence_active_buffers.c index 1649ef0b..71ab42c8 100644 --- a/tests/gem_unfence_active_buffers.c +++ b/tests/gem_unfence_active_buffers.c @@ -85,19 +85,18 @@ int main(int argc, char **argv) busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096); for (i = 0; i < 250; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { @@ -121,19 +120,18 @@ int main(int argc, char **argv) drm_intel_bo_disable_reuse(test_bo); - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ TEST_STRIDE); OUT_BATCH(0 << 16 | 0); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(TEST_STRIDE); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); printf("test bo offset: %#lx\n", test_bo->offset); @@ -143,19 +141,18 @@ int main(int argc, char **argv) /* launch a few batchs to ensure the damaged slab objects get reused. */ for (i = 0; i < 10; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { diff --git a/tests/gem_unref_active_buffers.c b/tests/gem_unref_active_buffers.c index 924769f2..c4f73d9e 100644 --- a/tests/gem_unref_active_buffers.c +++ b/tests/gem_unref_active_buffers.c @@ -73,19 +73,18 @@ int main(int argc, char **argv) load_bo = drm_intel_bo_alloc(bufmgr, "target bo", 1024*4096, 4096); igt_assert(load_bo); - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/tests/gem_write_read_ring_switch.c b/tests/gem_write_read_ring_switch.c index 99025319..0cc58c7e 100644 --- a/tests/gem_write_read_ring_switch.c +++ b/tests/gem_write_read_ring_switch.c @@ -78,19 +78,18 @@ static void run_test(int ring) /* put some load onto the gpu to keep the light buffers active for long * enough */ for (i = 0; i < 1000; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(batch->devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); } diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 3583bb95..10d8ae0a 100644 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @@ -166,19 +166,18 @@ static void emit_dummy_load__bcs(struct test_output *o) igt_assert(target_bo); for (i = 0; i < limit; i++) { - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + BLIT_COPY_BATCH_START(devid, 0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(o->fb_height << 16 | o->fb_width); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(devid); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(devid); ADVANCE_BATCH(); if (IS_GEN6(devid) || IS_GEN7(devid)) { |