summaryrefslogtreecommitdiff
path: root/i965_drv_video
AgeCommit message (Collapse)AuthorFilesLines
2011-06-10i965_drv_video: encode on IvybridgeXiang, Haihao7-26/+602
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-10i965_drv_video: fix VME shadersXiang, Haihao6-8/+12
1. The response length for inter type on Ivybridge is 6. 2. fix register region Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-10i965_drv_video: new shaders for VME on IvybridgeXiang, Haihao13-37/+383
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-09i965_drv_video: set surface base address in VMEXiang, Haihao2-89/+36
It is easy to fill the binding table without relocation and make sure all offsets in binding table only uses bits[15:0] Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-09i965_drv_video: clean upXiang, Haihao1-6/+1
Don't emit PIPE_CONTROL directly, instead call intel_batchbuffer_emit_mi_flush. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-09i965_drv_video: Added check of obj_surface->bo field inside ↵Alexander Osin1-1/+3
i965_media_h264_surface_state()
2011-06-02i965_drv_video: improved MV quality for VMEZhou Chang4-61/+39
2011-05-25i965_drv_video: clean up codesXiang, Haihao7-200/+55
Check and allocate surface BO in a same function Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-25i965_drv_video: rendering for IvybridgeXiang, Haihao3-81/+1234
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-25i965_drv_video: new shaders for rendering on IvybridgeXiang, Haihao11-2/+448
SEND on Ivybridge uses GRFs instead of MRFs Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-25i965_drv_video: VC1 decoding on IvybridgeXiang, Haihao2-70/+72
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-25i965_drv_video: H.264 & MPEG2 decoding on IvybridgeXiang, Haihao5-3/+2252
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-25i965_drv_video: Ivybridge PCI IDsXiang, Haihao6-19/+49
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-16i965_drv_video: thread safety for object allocationXiang, Haihao2-0/+21
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-16i965_drv_vidoe: thread safety for renderingXiang, Haihao6-8/+81
2011-05-16i965_drv_video: move batchbuffer to contextXiang, Haihao17-389/+343
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-16i965_drv_video: clean up batchbuffer interfaceXiang, Haihao17-1403/+1559
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-10i965_drv_video: store post process parameters in contextXiang, Haihao2-215/+217
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-05-10i965_drv_video: store kernel info in the corresponding contextXiang, Haihao13-154/+166
2011-05-10i965_drv_video: use the same structure for all kernelsXiang, Haihao8-155/+181
2011-05-10i965_drv_video: create media_state per contextXiang, Haihao25-1491/+1414
Also clean up some codes
2011-05-06Implemented i965_LockSurface, i965_UnlockSurface, i965_BufferInfoAlexander I Osin1-14/+169
2011-05-06Added locked_image_id in struct object_surfaceAlexander I Osin1-0/+1
2011-04-26Merge branch 'snb-encoder'Xiang, Haihao19-34/+2718
2011-04-26i965_drv_video/encode: offset for coded bufferXiang, Haihao2-1/+3
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: indentation fixXiang, Haihao1-19/+19
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: media read with sampler cacheXiang, Haihao1-2/+2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/video: set base address for MV dataXiang, Haihao1-6/+8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: merge global symbols in intra/inter shaderXiang, Haihao5-209/+123
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: remove all intra data in inter shaderXiang, Haihao2-46/+23
Need to revert this commit if select inter-intra mixed mode for P/B frame Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video: clean up gen6_mfc_avc_pipeline_programingXiang, Haihao1-22/+19
don't need to map VME output for inter frame Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: merge the object command for intra/inter frameXiang, Haihao1-36/+7
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: also simplify the object command for inter frameXiang, Haihao1-108/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-22i965_drv_video/encode: reduce inline data for inter shaderXiang, Haihao3-33/+245
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-21i965_drv_video: simplify the object command for intra frameXiang, Haihao2-130/+33
fixes some comments in intra_frame.asm as well. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-21i965_drv_video/encode: fetch neighbor pixel in intra shaderXiang, Haihao3-25/+265
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-21i965_drv_video/encode: fix neighbor pixel luma value in VME messageXiang, Haihao1-2/+2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-21i965_drv_video/encode: fix macroblock instra struct in VME messageXiang, Haihao1-4/+4
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-14i965_drv_video/encode: fix interface descriptor tableXiang, Haihao1-17/+11
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-14add inter frame support in vme.Zhou Chang5-34/+268
2011-04-14i965_drv_video/encode: fix CURBE usage for VMEXiang, Haihao2-6/+10
This fixes a potential GPU hang issue Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-11i965_drv_video: fix the format of a derived image for MPEG2 on ILKXiang, Haihao3-29/+50
The native format used for MPEG2 decoding on ILK is I420
2011-04-11i965_drv_video: associate the derived image with the surfaceXiang, Haihao1-0/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-07disabling cabac zeros words inert, using 0x00000000 as end of bit streaming ↵Zhou Chang1-2/+2
flag.
2011-04-07Support Inter frames in driver.Zhou Chang2-112/+144
2011-04-07fix for VAEncCodedBufferTypeXiang, Haihao2-2/+24
It matches VA spec. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-07Workaround for 720p/1080p encodingXiang, Haihao4-42/+92
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-07release all BOs when terminatingXiang, Haihao2-33/+54
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-07fix internal buffer sizeXiang, Haihao1-2/+2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-04-07fix for interface descriptorXiang, Haihao1-1/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 22:17:04 +0000