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path: root/src/pulsecore/sconv_sse.c
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2015-01-14update FSF addresses to FSF web pageOndrej Holecek1-3/+1
FSF addresses used in PA sources are no longer valid and rpmlint generates numerous warnings during packaging because of this. This patch changes all FSF addresses to FSF web page according to the GPL how-to: https://www.gnu.org/licenses/gpl-howto.en.html Done automatically by sed-ing through sources.
2014-12-01Fix #defines for Debian GNU/kFreeBSDFelipe Sateler1-2/+2
Because debian does not run with the freebsd libc, but rather uses the GNU one, it chose to not define __FreeBSD__, but rather __FreeBSD_kernel__. Use the alternative when the functionality tested is for kernel features, and keep the __FreeBSD__ one when using freebsd libc headers. If this patch is applied, debian could drop all the current patches when importing 6.0 :)
2014-08-10sconv: Use optimized conversion function for both directionsPeter Meerwald1-1/+2
for example, the conversion function for convert_from_float32ne(PA_SAMPLE_S16LE) can also be used for convert_to_s16ne(PA_SAMPLE_FLOAT32LE) v2: ARM can potentially be big- or little endian; only apply optimization on LE based on WORDS_BIGENDIAN #define (thanks, Tanu) Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
2014-02-22sconv, svolume: Fix compilation on 32-bit FreeBSDKoop Mast1-2/+2
Don't try to compile this code on 32-bit FreeBSD, it will error out complain about registers only being available in 64-bit mode.
2013-02-04sconv: Change/fix conversion to/from float32Peter Meerwald1-34/+32
use (1<<15) instead of 0x7fff as a factor when converting from s16 to float32 use (1<<31) instead of 0x7fffffff as a factor when converting from s32 to float32 the change is motivated by the following desireable properties: * s16_from_f32(f32_from_s16(x)) == x for all possible s16 values * x / (1.0f << 15) == x * (1.0f / (1 << 15)) for all x in s16 above changes enable easier optimization while guaranteeing bit-exact results further, other audio sample conversion code (libavresample) does it the same way v3 (comments Tanu): * fix saturation in pa_sconv_s16le_from_f32ne_neon(), use vqrshrn v2 (comments Tanu): * fix comments in ARM NEON code * use llrintf() in pa_sconv_s32le_from_float32ne() Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com> Cc: Tanu Kaskinen <tanuk@iki.fi>
2013-02-01sconv: Check for SSE flag before initializing codePeter Meerwald1-1/+2
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2012-08-04tests: add cpu testDeng Zhengrong1-54/+0
It tests only x86 architecture right now.
2012-01-11sconv: Fix generation of floats in SSE test codePeter Meerwald1-1/+1
the random floats x should be zero-mean with -(1+eps)<x<(1+eps) for some small epsilon; previously only negative x were generated
2011-12-14svolume_{mmx, sse}, sconv_sse: Fix compilation errors with X32 toolchainPaul Menzel1-11/+11
From d8b81d5393df36085009bf9f69d41fa85e2ae58a Mon Sep 17 00:00:00 2001 From: Nitin A Kamble <nitin.a.kamble@intel.com> Date: Sat, 10 Dec 2011 09:09:06 +0100 Make assembly syntax compatible to the X32 toolchain and fix the following kind of compilations errors with X32 gcc. | pulsecore/svolume_mmx.c: Assembler messages: | pulsecore/svolume_mmx.c:107: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:135: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:161: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:162: Error: `8(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:180: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:210: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:244: Error: `(%esi,%rdi,4)' is not a valid base/index expression | pulsecore/svolume_mmx.c:245: Error: `8(%esi,%rdi,4)' is not a valid base/index expression | make[3]: *** [libpulsecore_1.1_la-svolume_mmx.lo] Error 1 Originally these assembly lines were written for x86_64 ABI, now they are also compatible with X32 ABI [3][4]. The patch was submitted to the OpenEmbedded-Core list [1][2]. [1] http://lists.linuxtogo.org/pipermail/openembedded-core/2011-December/014189.html [2] http://git.yoctoproject.org/cgit.cgi/poky-contrib/commit/?h=nitin/x32&id=2d8eec54f755c51f2eff600390f5a4b3cc2a7662 [3] https://wiki.yoctoproject.org/wiki/X32_abi [4] http://en.wikipedia.org/wiki/X32_ABI
2011-06-22Remove unnecessary #includesMaarten Bosmans1-1/+0
2011-03-11Fixup #include directives according to Coding StyleMaarten Bosmans1-2/+1
Use #include "header.h" if functionality of header.h is implemented and #include <header.h> if functionality of header.h is used.
2011-03-11Fix up according to Coding StyleMaarten Bosmans1-13/+13
Only whitespace changes in here
2011-02-22sconv_sse: Exclude SSE optimizations for Mac OS XEdward Rudd1-2/+2
At least on 32bit compiles, there are not enough registers.
2009-09-09simd: be more precise which SIMD optimizations we activateLennart Poettering1-5/+7
2009-09-02sconv_sse: fix leftover counterWim Taymans1-2/+2
2009-08-28sconv: quieten gcc a bitLennart Poettering1-3/+1
2009-08-27convert: add sse/sse2 s16 to float32ne conversionsWim Taymans1-0/+235