summaryrefslogtreecommitdiff
path: root/src/i810_reg.h
AgeCommit message (Expand)AuthorFilesLines
2008-06-26Set the sync active bits like we're supposed to, matching the BIOS.Eric Anholt1-1/+2
2008-06-26Initial HDMI work. Not currently hooked up at startup.Eric Anholt1-0/+10
2008-06-26Add DisplayPort registers.Eric Anholt1-0/+24
2008-06-17Add support for Intel 4 series chipsets.Zhenyu Wang1-0/+5
2008-06-04Set SDVO sync polarity to default on 965Hong Liu1-0/+4
2008-05-28Fixup DSPARB for 855 & 945Jesse Barnes1-0/+2
2008-05-26Handle display FIFOs betterJesse Barnes1-0/+2
2008-05-26Fixup power saving registersJesse Barnes1-0/+3
2008-05-20Revert "Add FIFO watermark regs to register dumper"Zhenyu Wang1-1/+0
2008-05-13Add i915 support to intel_idle.Eric Anholt1-0/+30
2008-05-06Add FIFO watermark regs to register dumperJesse Barnes1-0/+1
2008-03-31Fix composite with mask using new compositing thread codeKeith Packard1-0/+1
2008-03-13Initial panel fitting changesJesse Barnes1-4/+21
2008-02-26Fix SDVO I2C access on Mac Mini in EFI mode.Eric Anholt1-0/+8
2008-02-16Decode DSPCLK_GATE, dump PIPE*STAT, MI_MODE, MI_DISPLAY_POWER_DOWN, MI_ARB_ST...Keith Packard1-1/+37
2008-02-15Bug #14440: fix stolen mem size mask on i830MZhenyu Wang1-2/+2
2008-01-30Add detail on different units to intel_idle.Eric Anholt1-0/+12
2008-01-30Frame buffer compression support on new chipsetJesse Barnes1-0/+24
2008-01-09Update PIPELINE_SELECT instruction and surface state format for new chipsetZhenyu Wang1-0/+2
2008-01-09GTT access change for new integrated graphics deviceZhenyu Wang1-0/+3
2007-11-15Move fb compression reg definition into i810_reg.hZhenyu Wang1-0/+33
2007-08-28Add register defines for hw binningKeith Packard1-0/+14
2007-08-03Tiled rendering & fbc fixes:Jesse Barnes1-0/+4
2007-07-31Legacy backlight changes:Jesse Barnes1-0/+8
2007-06-21Follow BIOS configuration for Legacy Backlight Brightness.Keith Packard1-0/+8
2007-06-08Add description for how to use the frame and pixel counter registers.Keith Packard1-1/+22
2007-06-05Add support for the G33, Q33, and Q35 chipsets.Wang Zhenyu1-5/+10
2007-05-12Deal with i830 CRT load detection which cannot use FORCE_BORDER.Keith Packard1-0/+4
2007-05-02Add DVO[ABC] register debugging.Eric Anholt1-0/+1
2007-04-30Allow physical-memory allocations within stolen memory.Eric Anholt1-12/+9
2007-04-30Disable some clock gating functions documented to work incorrectly.Eric Anholt1-0/+94
2007-03-20Set the panel fitter to the right pipe on Crestline.Eric Anholt1-0/+2
2007-03-20Merge branch 'master' into crestlineEric Anholt1-9/+44
2007-03-20Attempt to fix single/dual-channel issues on i9xx LVDS panels.Eric Anholt1-2/+48
2007-03-03LVDS dither control moved from PFIT to LVDS register for CrestlineKeith Packard1-0/+98
2007-03-02Add a WIP UploadToScreen implementation. This almost displays right.Eric Anholt1-0/+2
2007-02-28Many fixes to mode_get, mode_set, clock limits, and register dumps on i855.Eric Anholt1-1/+24
2007-02-23Rework the video memory allocation.Eric Anholt1-0/+2
2007-02-15Print the correct meaning of bit 30 of pipeconf for 965 in debug output.Eric Anholt1-0/+1
2007-02-15Detect core clock frequencies, to avoid double-wide mode when possible.Eric Anholt1-0/+13
2007-02-01Improve register debugging output.Eric Anholt1-1/+1
2007-01-16Add a settable backlight property for LVDS.Eric Anholt1-0/+13
2007-01-03Add interlace defines for pipeconf regsKeith Packard1-0/+3
2006-12-12Extend the error state reporting to cover ESR and decode PGTBL_ERR for 945.Eric Anholt1-4/+34
2006-12-12More debugging output for SDVO.Eric Anholt1-0/+10
2006-12-05Add a bunch of per-register debug code to i830DumpRegs().Eric Anholt1-0/+19
2006-11-30Preserve some GPIO bits that the docs tell us to.Eric Anholt1-0/+2
2006-11-30Merge branch 'restructure-outputs' into modesetting.Keith Packard1-0/+1
2006-11-29Properly detect the GTT size on the G965.Eric Anholt1-0/+5
2006-11-27Move crtc/output config to sub-structure.Keith Packard1-0/+1