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authorCarl Worth <cworth@cworth.org>2007-08-08 11:13:37 -0700
committerEric Anholt <eric@anholt.net>2007-08-08 11:14:29 -0700
commit5e18c6af9051da654d2a6a97553ef4fe777bb61e (patch)
tree80ffc27427e855d7612137d31346f35a0aa560c1 /src
parentb0ec670cdb0b6ca6fc0f4f165fa3ee5a20d7c985 (diff)
Allow 965 composite acceleration to A8 destinations.
Note that this is a slowdown in text rendering due to the high overhead of our compositing setup, but appears to be correct according to rendercheck.
Diffstat (limited to 'src')
-rw-r--r--src/i965_render.c9
1 files changed, 1 insertions, 8 deletions
diff --git a/src/i965_render.c b/src/i965_render.c
index 744501ae..c528813f 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -161,16 +161,9 @@ static Bool i965_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
case PICT_x1r5g5b5:
*dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM;
break;
- /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
- * able to use it depending on how the hardware implements it, disable it
- * for now while we don't know what exactly it does (what channel does it
- * read from?
- */
- /*
case PICT_a8:
- *dst_format = COLR_BUF_8BIT;
+ *dst_format = BRW_SURFACEFORMAT_A8_UNORM;
break;
- */
case PICT_a4r4g4b4:
case PICT_x4r4g4b4:
*dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;