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authorOlivier Fourdan <ofourdan@redhat.com>2008-08-11 12:07:32 -0400
committerZhenyu Wang <zhenyu.z.wang@intel.com>2008-08-15 10:35:14 +0800
commitac740398569dfa02d3d26a2abeb5c848717e6c03 (patch)
tree4d0ea080c2e887d0f9b34a7153e6a0e09cf51c37 /src/i830_display.c
parent9b03fd49b0f27c9add19dece55d00a58ed73c978 (diff)
Fix DPMS off in the presence of the pipe A quirk.
Still turn off the VGA plane, and also handle the DRI path at the end. (cherry picked from commit 9ec36e0c8bd8a4bd7c40569412fc1a21219b5af9)
Diffstat (limited to 'src/i830_display.c')
-rw-r--r--src/i830_display.c57
1 files changed, 28 insertions, 29 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index e1dad03c..622209b9 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -854,44 +854,43 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
/* Give the overlay scaler a chance to disable if it's on this pipe */
i830_crtc_dpms_video(crtc, FALSE);
- /* May need to leave pipe A on */
- if ((pipe == 0) && (pI830->quirk_flag & QUIRK_PIPEA_FORCE))
- return;
-
/* Disable the VGA plane that we never use */
OUTREG(VGACNTRL, VGA_DISP_DISABLE);
- /* Disable display plane */
- temp = INREG(dspcntr_reg);
- if ((temp & DISPLAY_PLANE_ENABLE) != 0)
+ /* May need to leave pipe A on */
+ if ((pipe != 0) || (!pI830->quirk_flag & QUIRK_PIPEA_FORCE))
{
- OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
- /* Flush the plane changes */
- OUTREG(dspbase_reg, INREG(dspbase_reg));
- POSTING_READ(dspbase_reg);
- }
+ /* Disable display plane */
+ temp = INREG(dspcntr_reg);
+ if ((temp & DISPLAY_PLANE_ENABLE) != 0)
+ {
+ OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
+ /* Flush the plane changes */
+ OUTREG(dspbase_reg, INREG(dspbase_reg));
+ POSTING_READ(dspbase_reg);
+ }
- if (!IS_I9XX(pI830)) {
- /* Wait for vblank for the disable to take effect */
- i830WaitForVblank(pScrn);
- }
+ if (!IS_I9XX(pI830)) {
+ /* Wait for vblank for the disable to take effect */
+ i830WaitForVblank(pScrn);
+ }
- /* Next, disable display pipes */
- temp = INREG(pipeconf_reg);
- if ((temp & PIPEACONF_ENABLE) != 0) {
- OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
- POSTING_READ(pipeconf_reg);
- }
+ /* Next, disable display pipes */
+ temp = INREG(pipeconf_reg);
+ if ((temp & PIPEACONF_ENABLE) != 0) {
+ OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
+ POSTING_READ(pipeconf_reg);
+ }
- /* Wait for vblank for the disable to take effect. */
- i830WaitForVblank(pScrn);
+ /* Wait for vblank for the disable to take effect. */
+ i830WaitForVblank(pScrn);
- temp = INREG(dpll_reg);
- if ((temp & DPLL_VCO_ENABLE) != 0) {
- OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
- POSTING_READ(dpll_reg);
+ temp = INREG(dpll_reg);
+ if ((temp & DPLL_VCO_ENABLE) != 0) {
+ OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
+ POSTING_READ(dpll_reg);
+ }
}
-
/* Wait for the clocks to turn off. */
usleep(150);
break;