diff options
| author | Keith Packard <keithp@mandolin.keithp.com> | 2006-11-05 18:51:28 -0800 |
|---|---|---|
| committer | Keith Packard <keithp@mandolin.keithp.com> | 2006-11-05 18:51:28 -0800 |
| commit | 5a355c72614ed77f2000e5ede45f3ff5990c79d9 (patch) | |
| tree | cdbaa8079d5c26587e1274b4edb0824dc6bba591 /src/i830_crt.c | |
| parent | 68c3185046b27ab936ca6c92b924b443b3cd6fce (diff) | |
Fix CRT output on 965 chipset.
A few more register settings are needed to get CRT output working on the
965 chipset, in particular the the SDVO/UDI clock multiplier register
needed to get set to the default value (3). No, I really don't know what
this does, but it does get the CRT running at a wide range of sizes.
Diffstat (limited to 'src/i830_crt.c')
| -rw-r--r-- | src/i830_crt.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/i830_crt.c b/src/i830_crt.c index adc2d624..a7b04937 100644 --- a/src/i830_crt.c +++ b/src/i830_crt.c @@ -101,8 +101,14 @@ i830_crt_post_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output, DisplayModePtr pMode) { I830Ptr pI830 = I830PTR(pScrn); + int dpll_md_reg = (output->pipe == 0) ? DPLL_A_MD : DPLL_B_MD; + CARD32 adpa; - CARD32 adpa; + /* + * Not quite sure precisely what this does... + */ + if (IS_I965G(pI830)) + OUTREG(dpll_md_reg, 0x3 << DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT); adpa = ADPA_DAC_ENABLE; |