Only enable FBC if one pipe is active

Some chips can't support FBC if multiple pipes are active.  So if more than one
pipe is on or we're going from one->two pipes enabled, make sure FBC is
disabled.

Intended to fix 13418, 13326, 13152.

1 files changed, 44 insertions, 30 deletions

diff --git a/src/i830_display.c b/src/i830_display.c
index 274a07d2..585b0e71 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -529,36 +529,6 @@ i830_display_tiled(xf86CrtcPtr crtc)
     return FALSE;
 }
 
-static Bool
-i830_use_fb_compression(xf86CrtcPtr crtc)
-{
-    ScrnInfoPtr pScrn = crtc->scrn;
-    I830Ptr pI830 = I830PTR(pScrn);
-    I830CrtcPrivatePtr	intel_crtc = crtc->driver_private;
-    int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
-
-    if (!pI830->fb_compression)
-	return FALSE;
-
-    if (!i830_display_tiled(crtc))
-	return FALSE;
-
-    /* Pre-965 only supports plane A */
-    if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
-	return FALSE;
-
-    /* Need 15, 16, or 32 (w/alpha) pixel format */
-    if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */
-	  pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */
-	return FALSE;
-
-    /*
-     * No checks for pixel multiply, incl. horizontal, or interlaced modes
-     * since they're currently unused.
-     */
-    return TRUE;
-}
-
 /*
  * Several restrictions:
  *   - DSP[AB]CNTR - no line duplication && no pixel multiplier
@@ -734,6 +704,50 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
     i830_disable_fb_compression_8xx(crtc);
 }
 
+static Bool
+i830_use_fb_compression(xf86CrtcPtr crtc)
+{
+    ScrnInfoPtr pScrn = crtc->scrn;
+    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+    I830Ptr pI830 = I830PTR(pScrn);
+    I830CrtcPrivatePtr	intel_crtc = crtc->driver_private;
+    int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+    int i, count = 0;
+
+    /* Only available on one pipe at a time */
+    for (i = 0; i < xf86_config->num_crtc; i++) {
+	if (xf86_config->crtc[i]->enabled)
+	    count++;
+    }
+
+    /* Here we disable it to catch one->two pipe enabled configs */
+    if (count > 1) {
+	i830_disable_fb_compression(crtc);
+	return FALSE;
+    }
+
+    if (!pI830->fb_compression)
+	return FALSE;
+
+    if (!i830_display_tiled(crtc))
+	return FALSE;
+
+    /* Pre-965 only supports plane A */
+    if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
+	return FALSE;
+
+    /* Need 15, 16, or 32 (w/alpha) pixel format */
+    if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */
+	  pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */
+	return FALSE;
+
+    /*
+     * No checks for pixel multiply, incl. horizontal, or interlaced modes
+     * since they're currently unused.
+     */
+    return TRUE;
+}
+
 /**
  * Sets the power management mode of the pipe and plane.
  *