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2007-04-03Add a fence flush event to each fence-signaled check when lazy-waitingThomas Hellstrom1-1/+1
to make sure we don't lose any sequence numbers if, for some reason, they don't generate an IRQ.
2007-04-03Make sure we ack irqs before we read a breadcrumb so thatThomas Hellstrom1-0/+2
breadcrumb updates that occur _AFTER_ we've read the breadcrumb really generates a new IRQ.
2007-04-03Evicted no-move buffers can get lost if they end up in anotherThomas Hellstrom1-1/+2
memory type than local.
2007-04-03Fix an oops when trying to clean a not yet initialized memory type.Thomas Hellstrom1-1/+7
2007-04-03Make sure CMA (Can't map aperture) pages are mapped uncached.Thomas Hellstrom2-4/+8
(Should really make this write-combined using PATs, at some point).
2007-04-02r300: Synchronize the register header file again.Oliver McFadden1-5/+10
It's a good idea to keep these synchronized; even though the DRM doesn't use all the defines, maintaining two different copies is prone to errors when the diff gets bigger.
2007-04-01nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+Matthieu Castet3-5/+5
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file. Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01nouveau : nv10 ctx switch fixMatthieu Castet1-1/+1
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01nouveau : set the correct PGRAPH_CTX_CONTROL registerMatthieu Castet1-3/+3
"5a072f32 (Stephane Marchesin 2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-03-30Merge branch 'crestline-qa', adding support for the 965GM chipset.Eric Anholt2-1/+3
2007-03-30Merge branch 'origin'Eric Anholt31-270/+1327
2007-03-29drm/bo: avoid oops if the memory manager for this type isn't initialisedDave Airlie1-0/+3
2007-03-29nouveau: fix nv04 context switches.Stephane Marchesin1-125/+257
2007-03-27drm/i915: set the bo up at firstopen time not after DMA initDave Airlie3-4/+10
This is required to use TTM to allocate the ring buffer.
2007-03-27drm/ttm: make sure dev_mapping is set-up for the first opener of the drmDave Airlie1-1/+4
This was causing an oops in my miniglx code to try and use a TTM-only setup.
2007-03-27Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu25-130/+1049
2007-03-26nouveau: move card initialisation into the drmBen Skeggs25-130/+1049
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-25Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu1-10/+4
2007-03-24Catch up to new interrupt API, and retire FreeBSD 4.x support here.Eric Anholt1-4/+6
2007-03-24vm: cleanup drm_vm.c along lines of cleanups queued for kernelDave Airlie1-10/+4
2007-03-23Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu7-132/+100
2007-03-23nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOsBen Skeggs1-81/+72
2007-03-23cleanup more whitespace from ttm mergeDave Airlie4-28/+28
2007-03-23drm: remove second spinlock init for tasklet lockDave Airlie1-1/+0
2007-03-23nouveau: remove unused cruftBen Skeggs2-22/+0
2007-03-21Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu4-30/+35
2007-03-21nouveau: support multiple channels per client (breaks drm interface)Ben Skeggs4-30/+35
2007-03-20Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu9-2577/+6
2007-03-20rename badly named defineDave Airlie1-4/+2
2007-03-19remove i830 referenceAlan Hourihane1-1/+0
2007-03-19Remove old i830 kernel driver.Alan Hourihane8-2572/+4
2007-03-19Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu17-207/+165
2007-03-19more return values fixupDave Airlie1-3/+3
2007-03-19fixup return values in drm ioctlDave Airlie1-2/+2
2007-03-19more whitespace issuesDave Airlie1-6/+6
2007-03-19cleanup ioctl expansion codeDave Airlie1-7/+6
2007-03-19oops missing elseDave Airlie1-0/+2
2007-03-19make drm fops const from kernelDave Airlie3-3/+3
2007-03-19use ARRAY_SIZEDave Airlie1-1/+1
2007-03-19more tab/space conversionDave Airlie1-5/+5
2007-03-19whitespace cleanup pending a kernel mergeDave Airlie9-103/+88
2007-03-19clean up more of inline functions agp_remap/drm_lookup_mapDave Airlie2-12/+6
2007-03-18deinline agp_remap along lines of kernelDave Airlie2-43/+43
2007-03-18remove drm_lookup_map unused nowDave Airlie1-22/+0
2007-03-14Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu2-6/+6
2007-03-13r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; notOliver McFadden2-6/+6
enough information is known about them to be sure as to what the values mean.
2007-03-13Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu7-105/+123
2007-03-13Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.Oliver McFadden2-1/+3
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these values are really unknown; ideally more reverse engineering should be done to determine what these values mean and when they should be set.
2007-03-13nouveau: make sure cmdbuf object gets destroyedBen Skeggs4-27/+33
2007-03-13nouveau: associate all created objects with a channel + cleanupsBen Skeggs4-45/+48
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