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-rw-r--r--arch/arm/boot/dts/stm32f746.dtsi47
1 files changed, 0 insertions, 47 deletions
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 973698bc9ef4..dc868e6da40e 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -257,23 +257,6 @@
status = "disabled";
};
- can3: can@40003400 {
- compatible = "st,stm32f4-bxcan";
- reg = <0x40003400 0x200>;
- interrupts = <104>, <105>, <106>, <107>;
- interrupt-names = "tx", "rx0", "rx1", "sce";
- resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
- clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
- st,gcan = <&gcan3>;
- status = "disabled";
- };
-
- gcan3: gcan@40003600 {
- compatible = "st,stm32f4-gcan", "syscon";
- reg = <0x40003600 0x200>;
- clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
- };
-
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -354,36 +337,6 @@
status = "disabled";
};
- can1: can@40006400 {
- compatible = "st,stm32f4-bxcan";
- reg = <0x40006400 0x200>;
- interrupts = <19>, <20>, <21>, <22>;
- interrupt-names = "tx", "rx0", "rx1", "sce";
- resets = <&rcc STM32F7_APB1_RESET(CAN1)>;
- clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
- st,can-primary;
- st,gcan = <&gcan1>;
- status = "disabled";
- };
-
- gcan1: gcan@40006600 {
- compatible = "st,stm32f4-gcan", "syscon";
- reg = <0x40006600 0x200>;
- clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
- };
-
- can2: can@40006800 {
- compatible = "st,stm32f4-bxcan";
- reg = <0x40006800 0x200>;
- interrupts = <63>, <64>, <65>, <66>;
- interrupt-names = "tx", "rx0", "rx1", "sce";
- resets = <&rcc STM32F7_APB1_RESET(CAN2)>;
- clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;
- st,can-secondary;
- st,gcan = <&gcan1>;
- status = "disabled";
- };
-
cec: cec@40006c00 {
compatible = "st,stm32-cec";
reg = <0x40006C00 0x400>;