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authorOlof Johansson <olof@lixom.net>2013-08-15 23:10:31 -0700
committerOlof Johansson <olof@lixom.net>2013-08-15 23:10:31 -0700
commitf668adebf43556df9834f254479a44a20294dcf1 (patch)
tree1db70c6f513da3c4c2fdc0341ef0d8ffdffa07f5 /arch/arm/mach-mvebu
parentfac2e57742d9aa3dbe41860280352efda9d5566e (diff)
parenta0cec7867ffdf5d153d29b3a8243911ea8dfd366 (diff)
Merge tag 'drivers-3.12' of git://git.infradead.org/linux-mvebu into next/soc
From Jason Cooper: mvebu drivers changes for v3.12 - MBus devicetree bindings - devbus update for address decoding window, cleanup * tag 'drivers-3.12' of git://git.infradead.org/linux-mvebu: (35 commits) memory: mvebu-devbus: Remove unused variable ARM: mvebu: Relocate PCIe node in Armada 370 RD board ARM: mvebu: Fix AXP-WiFi-AP DT for MBUS DT binding ARM: mvebu: add support for the AXP WiFi AP board ARM: mvebu: use dts pre-processor for mv78230 PCI: mvebu: Adapt to the new device tree layout bus: mvebu-mbus: Add devicetree binding ARM: kirkwood: Relocate PCIe device tree nodes ARM: kirkwood: Introduce MBUS_ID ARM: kirkwood: Introduce MBus DT node ARM: kirkwood: Use the preprocessor on device tree files ARM: kirkwood: Split DT and legacy MBus initialization ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes ARM: mvebu: Relocate Armada 370/XP DeviceBus device tree nodes ARM: mvebu: Add BootROM to Armada 370/XP device tree ARM: mvebu: Add MBus to Armada 370/XP device tree ARM: mvebu: Use the preprocessor on Armada 370/XP device tree files ARM: mvebu: Initialize MBus using the DT binding ARM: mvebu: Remove the harcoded BootROM window allocation bus: mvebu-mbus: Factorize Armada 370/XP data structures ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c34
-rw-r--r--arch/arm/mach-mvebu/platsmp.c25
2 files changed, 25 insertions, 34 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 97cbb8021919..829b57306328 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -34,44 +34,12 @@ static void __init armada_370_xp_map_io(void)
debug_ll_io_init();
}
-/*
- * This initialization will be replaced by a DT-based
- * initialization once the mvebu-mbus driver gains DT support.
- */
-
-#define ARMADA_370_XP_MBUS_WINS_OFFS 0x20000
-#define ARMADA_370_XP_MBUS_WINS_SIZE 0x100
-#define ARMADA_370_XP_SDRAM_WINS_OFFS 0x20180
-#define ARMADA_370_XP_SDRAM_WINS_SIZE 0x20
-
-static void __init armada_370_xp_mbus_init(void)
-{
- char *mbus_soc_name;
- struct device_node *dn;
- const __be32 mbus_wins_offs = cpu_to_be32(ARMADA_370_XP_MBUS_WINS_OFFS);
- const __be32 sdram_wins_offs = cpu_to_be32(ARMADA_370_XP_SDRAM_WINS_OFFS);
-
- if (of_machine_is_compatible("marvell,armada370"))
- mbus_soc_name = "marvell,armada370-mbus";
- else
- mbus_soc_name = "marvell,armadaxp-mbus";
-
- dn = of_find_node_by_name(NULL, "internal-regs");
- BUG_ON(!dn);
-
- mvebu_mbus_init(mbus_soc_name,
- of_translate_address(dn, &mbus_wins_offs),
- ARMADA_370_XP_MBUS_WINS_SIZE,
- of_translate_address(dn, &sdram_wins_offs),
- ARMADA_370_XP_SDRAM_WINS_SIZE);
-}
-
static void __init armada_370_xp_timer_and_clk_init(void)
{
of_clk_init(NULL);
armada_370_xp_timer_init();
coherency_init();
- armada_370_xp_mbus_init();
+ BUG_ON(mvebu_mbus_dt_init());
#ifdef CONFIG_CACHE_L2X0
l2x0_of_init(0, ~0UL);
#endif
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index ce81d3031405..c6b00fce6d8d 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -21,6 +21,7 @@
#include <linux/smp.h>
#include <linux/clk.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/mbus.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -29,6 +30,9 @@
#include "pmsu.h"
#include "coherency.h"
+#define AXP_BOOTROM_BASE 0xfff00000
+#define AXP_BOOTROM_SIZE 0x100000
+
void __init set_secondary_cpus_clock(void)
{
int thiscpu;
@@ -114,10 +118,29 @@ static void __init armada_xp_smp_init_cpus(void)
void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
{
+ struct device_node *node;
+ struct resource res;
+ int err;
+
set_secondary_cpus_clock();
flush_cache_all();
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
- mvebu_mbus_add_window("bootrom", 0xfff00000, SZ_1M);
+
+ /*
+ * In order to boot the secondary CPUs we need to ensure
+ * the bootROM is mapped at the correct address.
+ */
+ node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
+ if (!node)
+ panic("Cannot find 'marvell,bootrom' compatible node");
+
+ err = of_address_to_resource(node, 0, &res);
+ if (err < 0)
+ panic("Cannot get 'bootrom' node address");
+
+ if (res.start != AXP_BOOTROM_BASE ||
+ resource_size(&res) != AXP_BOOTROM_SIZE)
+ panic("The address for the BootROM is incorrect");
}
struct smp_operations armada_xp_smp_ops __initdata = {