diff options
| author | Michael Ellerman <mpe@ellerman.id.au> | 2022-08-03 16:32:28 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-08-26 11:02:20 +1000 |
| commit | 9e1b45fdf25caed521d6851136a0e3213c676656 (patch) | |
| tree | c9faba1ce6270adf641f60046f33b09f4dfd6afc /Documentation | |
| parent | eb316ae798b36b280ef9e6a79d3aa34d146aa0e4 (diff) | |
powerpc: Update ISA versions to mention e5500/e6500
Add the NXP (nee Freescale) e5500 and e6500 to the ISA versions
documentation.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220803063228.1250030-1-mpe@ellerman.id.au
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/powerpc/isa-versions.rst | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst index dfcb1097dce4..5592b8899a48 100644 --- a/Documentation/powerpc/isa-versions.rst +++ b/Documentation/powerpc/isa-versions.rst @@ -10,6 +10,8 @@ CPU Architecture version Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 +e6500 Power ISA v2.06 with some exceptions +e5500 Power ISA v2.06 with some exceptions, no Altivec Power7 Power ISA v2.06 Power6 Power ISA v2.05 PA6T Power ISA v2.04 @@ -36,6 +38,8 @@ CPU VMX (aka. Altivec) Power10 Yes Power9 Yes Power8 Yes +e6500 Yes +e5500 No Power7 Yes Power6 Yes PA6T Yes @@ -52,6 +56,8 @@ CPU VSX Power10 Yes Power9 Yes Power8 Yes +e6500 No +e5500 No Power7 Yes Power6 No PA6T No @@ -68,6 +74,8 @@ CPU Transactional Memory Power10 No (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture") Power9 Yes (* see transactional_memory.txt) Power8 Yes +e6500 No +e5500 No Power7 No Power6 No PA6T No |