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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-11-12 13:44:29 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2015-12-17 11:18:01 +0100
commit9a040c9f2170e0e6d092fc7cf8289a4466b8d8d6 (patch)
tree7a34f661a9a14693291f8c628a1d8e44ed390d2e /Documentation/devicetree
parent598604ff22109a025af8d5038664ebeb2402afdc (diff)
serial: sh-sci: Update DT binding documentation for external clock input
Amend the DT bindings to include the optional external clock on (H)SCI(F) and some SCIFA, where this pin can serve as a clock input, depending on board wiring. Clarify the use of the divided functional clock as a source for the sampling clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/serial/renesas,sci-serial.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index 7091213f0251..31cc0631ef7c 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -51,6 +51,11 @@ Required properties:
- clocks: Must contain a phandle and clock-specifier pair for each entry
in clock-names.
- clock-names: Must contain "fck" for the SCIx UART functional clock.
+ Apart from the divided functional clock, there may be other possible
+ sources for the sampling clock, depending on SCIx variant.
+ On (H)SCI(F) and some SCIFA, an additional clock may be specified:
+ - "hsck" for the optional external clock input (on HSCIF),
+ - "sck" for the optional external clock input (on other variants).
Note: Each enabled SCIx UART should have an alias correctly numbered in the
"aliases" node.