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authorEugen Hristev <eugen.hristev@microchip.com>2022-05-03 10:44:21 +0200
committerMauro Carvalho Chehab <mchehab@kernel.org>2022-05-13 11:02:21 +0200
commit9d5a3451e85802fc315d68b809b7b73471295f95 (patch)
tree099cbd617a0a278473ded93549060a09afca71d6 /Documentation/devicetree/bindings/media/microchip,xisc.yaml
parent4f564b92c3c7094f4ff2f29426a950acbb55b5d3 (diff)
media: dt-bindings: media: microchip,xisc: add bus-width of 14
The Microchip XISC supports a bus width of 14 bits. Add it to the supported bus widths. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/media/microchip,xisc.yaml')
-rw-r--r--Documentation/devicetree/bindings/media/microchip,xisc.yaml2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
index 086e1430af4f..3be8f64c3e21 100644
--- a/Documentation/devicetree/bindings/media/microchip,xisc.yaml
+++ b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
@@ -67,7 +67,7 @@ properties:
remote-endpoint: true
bus-width:
- enum: [8, 9, 10, 11, 12]
+ enum: [8, 9, 10, 11, 12, 14]
default: 12
hsync-active: