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| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-17 15:07:23 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-17 15:07:23 -0800 |
| commit | 9baabf4341a8f86ed42904c328eef88fa387da57 (patch) | |
| tree | 6002c4fde947146b53eb5f764162c0921b571823 /Documentation/devicetree/bindings/clock | |
| parent | 54fd1b3bc4bc184a546191a1ebd9f17444c3afea (diff) | |
| parent | 9127d54bb89471592b3c8af6c6273c21db6de6a6 (diff) | |
Merge tag 'clk-renesas-for-v4.10-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
Pull more clk driver updates from Geert Uytterhoeven:
- CSI2 and VIN clocks for R-Car M3-W,
- Clock drivers for new RZ/G1M and RZ/G1E SoCs,
- Minor bug fix for R-Car H3.
* tag 'clk-renesas-for-v4.10-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: cpg-mssr: Add R8A7745 support
clk: renesas: cpg-mssr: Add R8A7743 support
clk: renesas: cpg-mssr: Add common R-Car Gen2 support
clk: renesas: r8a7795: Fix HDMI parent clock
clk: renesas: r8a7796: Add VIN clocks
clk: renesas: r8a7796: Add CSI2 clocks
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt index 394d725ac7e0..c46919412953 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt @@ -13,6 +13,8 @@ They provide the following functionalities: Required Properties: - compatible: Must be one of: + - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M) + - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E) - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W) @@ -22,8 +24,9 @@ Required Properties: - clocks: References to external parent clocks, one entry for each entry in clock-names - clock-names: List of external parent clock names. Valid names are: - - "extal" (r8a7795, r8a7796) + - "extal" (r8a7743, r8a7745, r8a7795, r8a7796) - "extalr" (r8a7795, r8a7796) + - "usb_extal" (r8a7743, r8a7745) - #clock-cells: Must be 2 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" |