summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorNirmoy Das <nirmoy.das@intel.com>2024-08-19 09:41:10 +0200
committerNirmoy Das <nirmoy.das@intel.com>2024-08-19 09:41:10 +0200
commitb4b4bfbd9d81f79d7b6de2b879371138f5411a08 (patch)
treec31111147a87900bf497d458b98f4be823d27459
parent4a93ca7a3db1ace460775ea10ed7a36a4a10794a (diff)
parent1ec484590947f43be963899f7885d9b92bd26f07 (diff)
Merge remote-tracking branch 'drm-xe/topic/xe-for-CI' into drm-tip
-rw-r--r--drivers/gpu/drm/xe/xe_module.c3
-rw-r--r--drivers/gpu/drm/xe/xe_pci.c7
-rw-r--r--drivers/gpu/drm/xe/xe_uc_fw.c1
-rw-r--r--include/drm/intel/xe_pciids.h16
4 files changed, 26 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
index e7e4b1ebab50..923460119cec 100644
--- a/drivers/gpu/drm/xe/xe_module.c
+++ b/drivers/gpu/drm/xe/xe_module.c
@@ -18,6 +18,9 @@ struct xe_modparam xe_modparam = {
.probe_display = true,
.guc_log_level = 5,
.force_probe = CONFIG_DRM_XE_FORCE_PROBE,
+#ifdef CONFIG_PCI_IOV
+ .max_vfs = IS_ENABLED(CONFIG_DRM_XE_DEBUG) ? ~0 : 0,
+#endif
.wedged_mode = 1,
/* the rest are 0 by default */
};
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 0f66cf067e2a..3c34b032ebf4 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -242,6 +242,7 @@ static const struct xe_device_desc adl_s_desc = {
PLATFORM(ALDERLAKE_S),
.has_display = true,
.has_llc = true,
+ .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
.require_force_probe = true,
.subplatforms = (const struct xe_subplatform_desc[]) {
{ XE_SUBPLATFORM_ALDERLAKE_S_RPLS, "RPLS", adls_rpls_ids },
@@ -257,6 +258,7 @@ static const struct xe_device_desc adl_p_desc = {
PLATFORM(ALDERLAKE_P),
.has_display = true,
.has_llc = true,
+ .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
.require_force_probe = true,
.subplatforms = (const struct xe_subplatform_desc[]) {
{ XE_SUBPLATFORM_ALDERLAKE_P_RPLU, "RPLU", adlp_rplu_ids },
@@ -270,6 +272,7 @@ static const struct xe_device_desc adl_n_desc = {
PLATFORM(ALDERLAKE_N),
.has_display = true,
.has_llc = true,
+ .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
.require_force_probe = true,
};
@@ -308,6 +311,7 @@ static const struct xe_device_desc ats_m_desc = {
DG2_FEATURES,
.has_display = false,
+ .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
};
static const struct xe_device_desc dg2_desc = {
@@ -319,7 +323,7 @@ static const struct xe_device_desc dg2_desc = {
.has_display = true,
};
-static const __maybe_unused struct xe_device_desc pvc_desc = {
+static const struct xe_device_desc pvc_desc = {
.graphics = &graphics_xehpc,
DGFX_FEATURES,
PLATFORM(PVC),
@@ -390,6 +394,7 @@ static const struct pci_device_id pciidlist[] = {
XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc),
XE_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc),
XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc),
+ XE_PVC_IDS(INTEL_VGA_DEVICE, &pvc_desc),
XE_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc),
XE_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
XE_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc),
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 4bb2a4a80ddc..d4809ec7d634 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -109,6 +109,7 @@ struct fw_blobs_by_type {
fw_def(BATTLEMAGE, major_ver(xe, guc, bmg, 70, 29, 2)) \
fw_def(LUNARLAKE, major_ver(xe, guc, lnl, 70, 29, 2)) \
fw_def(METEORLAKE, major_ver(i915, guc, mtl, 70, 29, 2)) \
+ fw_def(PVC, mmp_ver(xe, guc, pvc, 70, 29, 2)) \
fw_def(DG2, major_ver(i915, guc, dg2, 70, 29, 2)) \
fw_def(DG1, major_ver(i915, guc, dg1, 70, 29, 2)) \
fw_def(ALDERLAKE_N, major_ver(i915, guc, tgl, 70, 29, 2)) \
diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h
index 644872a35c35..73d972a8aca1 100644
--- a/include/drm/intel/xe_pciids.h
+++ b/include/drm/intel/xe_pciids.h
@@ -187,6 +187,22 @@
MACRO__(0x7DD1, ## __VA_ARGS__), \
MACRO__(0x7DD5, ## __VA_ARGS__)
+/* PVC */
+#define XE_PVC_IDS(MACRO__, ...) \
+ MACRO__(0x0B69, ## __VA_ARGS__), \
+ MACRO__(0x0B6E, ## __VA_ARGS__), \
+ MACRO__(0x0BD4, ## __VA_ARGS__), \
+ MACRO__(0x0BD5, ## __VA_ARGS__), \
+ MACRO__(0x0BD6, ## __VA_ARGS__), \
+ MACRO__(0x0BD7, ## __VA_ARGS__), \
+ MACRO__(0x0BD8, ## __VA_ARGS__), \
+ MACRO__(0x0BD9, ## __VA_ARGS__), \
+ MACRO__(0x0BDA, ## __VA_ARGS__), \
+ MACRO__(0x0BDB, ## __VA_ARGS__), \
+ MACRO__(0x0BE0, ## __VA_ARGS__), \
+ MACRO__(0x0BE1, ## __VA_ARGS__), \
+ MACRO__(0x0BE5, ## __VA_ARGS__)
+
#define XE_LNL_IDS(MACRO__, ...) \
MACRO__(0x6420, ## __VA_ARGS__), \
MACRO__(0x64A0, ## __VA_ARGS__), \