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2020-10-01lib/intel_batchbuffer: Prepare batch to use in allocator infrastructureZbigniew Kempczyński1-101/+104
With upcoming of allocator code we need to ensure batch will execute with appropriate context. If mismatch between allocator data and batch could lead to strange or wrong results. All functions which could change context in execbuf called from intel_bb were removed. As an allocator requires size (which was not previously required in intel_bb) adding object to intel_bb is now mandatory. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: address review comments (base64 dump)Zbigniew Kempczyński1-14/+8
Simplify base64 dump + add linelen. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: fix intel_bb cacheZbigniew Kempczyński1-48/+120
When objects array is reallocated index tree contains invalid pointers and we got segmentation fault. Fix changes of the strategy of keeping objects - now we have two indexes - cache (all objects added previously to the bb) and current (contains objects added after soft bb reset). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: use canonical addresses for 48bit ppgttZbigniew Kempczyński1-5/+32
For all EXEC_OBJECT_PINNED objects we need to be sure address passed must be in canonical form. Until IGT allocator will be written just limit 48 and 47 bit gtt tables to 46 bit only. We don't want to play with canonical addresses with 47-bit set to 1 (and then 63:48). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: dump bb to base64Zbigniew Kempczyński1-0/+41
Code for dumping bb to log as base64 which can be used when something wrong happened. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: add new functions to support rendercopyZbigniew Kempczyński1-44/+301
To cover rendercopy in dependent tests we need to add the following: 1. relocation in any handle Previously batchbuffer was the main target of relocations. As AUX table require relocations too add support for that in intel_bb 2. set/get default alignment Add default alignment for objects added to intel_bb (AUX tables use different alignment for different objects) 3. add intel_buf to intel_bb Save proposed address to intel_buf, clear flags on reset 4. add set/clear flag functions 5. unification of intel_bb_flush.*() functions 6. fixing indentation 7. change alignment constraints on gen3 Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-07-15tests/i915/gem_huc_copy: Enable a HuC copy testSally Qi1-0/+20
This test case loads the HuC copy firmware to copy the content of the source buffer to the destination buffer. v2: (Tony Ye) * Restructured some functions and files. * Defined the copy buffer size as 4K explicitly as the HuC Copy kernel always copy 4K bytes from src buffer to dst buffer. v3: (Feng Qi, Antonio Argenziano, Tony Ye) * Restructured some functions as igt requested, exclude libdrm function call. * Remove huc function wrappers * Random initialize source input buffer v4: (Robert Fosha) * Fix autotools build failure. v5: (Feng Qi, Tony Ye) * Released all bo buffer after huc copying. * Restructured huc_copy() function. v6: (Feng Qi) * Fixed the function of huc enabling and status check * Added huc_copy to fast feedback testlist v7: (Tony Ye, Feng Qi, Robert Fosha, Chris Wilson, Michal Wajdeczko) * Check error with HUC_STATUS ioctl instead of debugfs v8: (Antonio Argenziano) * Remove unnecessary variable. * Add huc_load subtest. * Move failure checks out of igt_fixture. * get_huc_status() returns errno and then status as a parameter v9: (Antonio Argenziano) * Remove huc_load subtest - to be added later. v10: * Rebase * Remove huc_load subtest from fast-feedback.testlist. Signed-off-by: Feng Qi <feng.qi@intel.com> Signed-off-by: Tony Ye <tony.ye@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
2020-07-06lib/bufops: add surface array to cover ccs pgtableZbigniew Kempczyński1-2/+2
Rendercopy for gen12+ requires additional aux pgtable. Alter bufops and tests to use surface[] and ccs[] instead aux. This step is required to properly rewrite handling aux pgtable to use with intel_bb. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-07-03lib/intel_batchbuffer: Extend intel_bbZbigniew Kempczyński1-59/+473
As we're going toward removing libdrm from rendercopy tests some additional code in intel_bb is required. So add new functions and fix memory issues in the reset path. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-06-06lib/intel_batchbuffer: add bb resetZbigniew Kempczyński1-11/+73
For some scenarios we want to keep previous objects and their offsets and recreate only batchbuffer object. To allow user do that add bb reset function which can or not purge collected objects from previous run. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-06-01tests/gem_(gpgpu|media)_fill: remove the _v2 suffixZbigniew Kempczyński1-54/+2
Remove libdrm functions and replace them with new ones after removing _v2 suffix introduced for transition state. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-21lib/intel_batchbuffer: Add new media fillfunc v2Zbigniew Kempczyński1-0/+26
Media fill function selection for "_v2" version. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-20lib/intel_batchbuffer: Introduce temporary igt_fillfunc_v2_tZbigniew Kempczyński1-0/+27
gem_gpgpu_fill test is spread over different generations (gen >= 7) so some transitional state is required until all gens will be rewritten to new intel_bb code without libdrm dependency. So, let's define new igt_fillfunc_v2_t to be new fill function. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-20lib/intel_batchbuffer: Introduce intel_bbZbigniew Kempczyński1-0/+477
Simple batchbuffer facility which gathers and outputs relocations. v2: make bb api more consistent and universal v3: fix compiling issues on non-x86 arch v4: add indexing tree and marking object as render target v5: randomizing addresses to avoid relocations v6: fix invalid reallocation size (Chris) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-02-18lib: Don't specify a non-existent blitter ringChris Wilson1-15/+8
I915_EXEC_BLT only exists on gen6+ Closes: https://gitlab.freedesktop.org/drm/intel/issues/1256 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
2020-02-03lib/igt_fb: Add 64bpp support to the XY_SRC blit commandImre Deak1-0/+5
While the XY_SRC blit command lacks native 64bpp copy support, we can emulate it using a 32bpp copy by treating the 64bpp plane as a 2x wide 32bpp plane. Add support for this, as we need the XY_SRC command at least for GEN12+ X-tiled formats. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2020-02-03lib/intel_batchbuffer: Add blitter copy using XY_SRC_COPY_BLTVanshidhar Konda1-0/+184
Add a method that uses the XY_SRC_COPY_BLT instruction for copying buffers using the blitter engine. v2: Use uint32_t for parameters; fix stride for Gen2/3 v3: - Fix 64b relocations. (Chris) - Rename func to igt_blitter_src_copy(), being the only version of the same functionality. (Chris) - Use the existing instruction definition of MI_FLUSH_DW. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Vanshidhar Konda <vanshidhar.r.konda@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2020-01-17lib/intel_batchbuffer: Add CCS width/height functions for Intel igt_bufZbigniew Kempczyński1-0/+47
igt_buf has some fields which can be interpreted differently across vendors (ccs structure). Patch adds functions which are aware of meaning of this field. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-12-31lib/igt_buf: Extend igt_buf to include two color surfacesImre Deak1-4/+4
UV FBs have two color surfaces so extend the igt_buf struct accordingly to support blitting such FBs. The patch is produced with the coccinelle patch below. No functional changes. @@ @@ struct igt_buf { ... - uint32_t stride; ... - uint32_t size; + struct { + uint32_t stride; + uint32_t size; + } surface[2]; ... }; @@ struct igt_buf b; @@ <... ( - b.stride + b.surface[0].stride | - b.size + b.surface[0].size ) ...> @@ struct igt_buf *b; @@ <... ( - b->size + b->surface[0].size | - b->stride + b->surface[0].stride ) ...> @@ identifier I; expression E1; expression E2; @@ ( struct igt_buf I = { - .size = E1, - .stride = E2, + .surface[0] = { + .size = E1, + .stride = E2, + }, }; | struct igt_buf I = { - .size = E1, + .surface[0] = { + .size = E1, + }, }; | struct igt_buf I = { - .stride = E1, + .surface[0] = { + .stride = E1, + }, }; ) v2: - Rebase on latest upstream. (Mika) Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2019-12-09lib: Add vebox copy supportImre Deak1-0/+11
To produce surfaces that are compressed using the media compression format we need to use one of the media engines. The simplest way for this is to use the vebox engine's tiling convert command, so add support for this. v2: - Rebase on latest igt. (Mika) Cc: Mika Kahola <mika.kahola@intel.com> Cc: Brian Welty <brian.welty@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2019-09-18lib/media_fill/tgl: Implement media_fillfunc for TGLKatarzyna Dec1-1/+3
Adding gen12_media_fillfunc to have media_fill running on TGL. Media shader was generated using IGA (Intel Graphics Assembler) based on binary found in lib/media_fill_gen9.c to match the changes in TGL HW. Main change was made in SEND instructions and adding SWSB dependencies. v2: Switched to GEN_12. Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2019-09-18lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGLKatarzyna Dec1-0/+2
Adding gen12_gpgpu_fillfunc to have gpgpu_fill running on TGL. Gpgpu shader was generated using IGA (Intel Graphics Assembler) based on Gen11 binary adding necessary SWSB dependencies and changes in SEND instruction. Shader source code and array containing its assembled version have same names now to avoid ambiguity. v2: Switched to using IS_GEN12 v3: Minor checkpatch change Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Antonio Argenziano <antonio.argenziano@intel.com> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2019-09-17lib/rendercopy/tgl: Add support for gem_render_* tests on TGLKalamarz, Lukasz1-0/+2
Previous generations didn't use SWSB dependency tracking. For that reason shader was adopted to handle that on TGL. FIXME: Some tests still have to be fixed, currently working: gem_render_copy @linear @x-tiled @y-tiled @yf-tiled gem_render_copy_redux gem_render_linear_blits @basic gem_render_tiled_blits @basic Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-04-18lib/intel_batchbuffer: Make blitter asserts more usefulVille Syrjälä1-27/+25
Use igt_assert_lt/lte for the blitter coord/stride asserts so that we can see what the offending value was. gcc likes to optimize the values away so gdb often doesn't help as much as one would like. v2: Remove the duplicate CHECK_RANGE() definitions (Chris) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-03-26lib/intel_batchbuffer: Media VME kernel is valid only for Gen11Tvrtko Ursulin1-1/+1
Do not use it on older gens. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109612 Cc: Tony Ye <tony.ye@intel.com> Reviewed-by: Tony Ye <tony.ye@intel.com>
2019-02-05tests/gem_media_vme: Simple test to exercise the VME blockTony Ye1-0/+9
Simple test which exercises the VME fixed function block. v2: (Tvrtko Ursulin) * Small cleanups like copyright date, tabs, remove unused bits. v3: (Tony Ye) * Added curbe data entry for dst surface. * Read the dst surface after the VME kernel being executed. v4: (Tony Ye) * Added the media_vme.gxa kernel source code and compile instructions. v5: (Tvrtko Ursulin) * Added hang detector. v6: (Tvrtko Ursulin) * Replace gem_read with gem_sync. (Chris Wilson) Signed-off-by: Tony Ye <tony.ye@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Tony Ye <tony.ye@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2018-11-20lib/batchbuffer: Set bpp in igt_buf.Maarten Lankhorst1-3/+4
We want to allow bpp = 8 or 16, so make sure we set the bpp in igt_buf. This way we can extend rendercopy to support other values for bpp. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> [mlankhorst: Fix double ;; (Ville] Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2018-10-15libs: Add rendercopy support for GEN11Kalamarz, Lukasz1-0/+2
This patch introduces a render copy shader for GEN11. The plumbing is same as with GEN9, so we can reuse it, extracting the common parts, and wrapping it in GEN-specific helpers. v2: Added gen11 shader source path next to its binary form Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
2018-09-26lib/gpgpu_fill: Implement gpgpu_fillfunc for Gen11Katarzyna Dec1-0/+2
Added gen11_gpgpu_fillfunc to have gpgpu_fill passing on Gen11. Gpgpu shader was generated using IGA (Intel Graphics Assembler) based on binary found in lib/gpgpu_fill.c to match the changes in Gen11 HW: Changed 'mul' instruction to 'shl' (since Gen11 'mul' does not support integer values for both src and dest). Changed SEND message descriptor (it should have length 2 not 3). Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Tested-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Acked-by: Katarzyna Dec <katarzyna.dec@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-26lib: Reuse Gen9 mediafill on Gen11Daniele Ceraolo Spurio1-1/+1
We can reuse gen9 mediafill function, because no changes are required to support Gen11. Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Tested-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Acked-by: Katarzyna Dec <katarzyna.dec@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-07-18lib/rendercopy: Add gen4/5 rendercopyLukasz Kalamarz1-0/+2
Add rendercopy implementation for gen4/5. Basic structure copied from the gen6 implementation, and the gen4/5 specific bits were mostly lifted from sna. v2: Renamed registers definitions, which are GEN4 specific to include that prefix (Lukasz) v3: Rebase and checkpatch Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
2018-07-05lib: Constify igt_bufVille Syrjälä1-4/+4
No one generally needs to modify the igt_bufs we pass around, so make them const. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2018-05-16igt: Drop Intel from the name in docs and pathsArkadiusz Hiler1-1/+1
This is just a simple change to reflect the actual state. No rewording yet, just a simple substitution in most visible places - docs, README and paths. There are probably some leftovers here and there, but we can let them be for now, this is already well overdue. v2: fixed couple of obvious leftovers pointed out by Petri Cc: Petri Latvala <petri.latvala@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2018-05-15lib/media_spin: Remove gen8lp_media_spin functionKatarzyna Dec1-3/+1
Gen8lp function are duplicates of Gen8 with difference in emit_media_objects - we cannot perform media_state_flush on CHT. Similar changes were done previously for gpgpu_fill and media_fill. v2: replaced IS_BRW and IS_CHT with IS_GEN8 v3: removed remaining 8lp spin function Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Antonio Argenziano <antonio.argenziano@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2018-05-08lib/intel_batchbuffer: Minor cosmetic change in copyright headerAntonio Argenziano1-5/+5
Removed some trailing white spaces. Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2018-04-24lib/intel_batchbuffer: Move batch functions from media/render/gpgpu libsKalamarz, Lukasz1-8/+72
Batch functions were copy/pasted across several libs. With moving it into intel_batchbuffer lib test can now be easly maintained without worrying that we forgot to modify older version of lib. v2: Added documentation into lib and rebased patch v3: Fixed typos and rebased patch v4: Fixed documentation issues v5: Rename, clean up of leftovers from previous version and documentation polishing v6: Fixing assert Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
2018-04-18lib/intel_batchbuffer: Reuse gen9_media_fill on Gen 10Katarzyna Dec1-1/+1
Media fill function can be reused on Gen10. Code has not changed. Let's reuse gen9. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Reviewed-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
2018-04-12lib: Remove duplications in gpu_fill libraryKatarzyna Dec1-3/+1
After moving all functions needed for gpgpu and media fill testing there is a lot of duplications which can be removed: Library media_fill_gen8 and media_fill_gen8lp for CHT was removed, media state flush for !CHT was added to gen7_emit_media_objects. Many gen8 functions were replaced with gen7 version with devid parameter (gen7_fill_curbe_load, gen7_emit_interface_descriptor, gen7_fill_binding_table, gen7_emit_media_objects). Unified fill kernel function so it is applicable to all gens and both media and gpgpu (merged gen7_fill_media_kernel and gen8_fill_media_kernel). Duplicated constants like GEN8_MEDIA_VFE_STATE, GEN8_MEDIA_CURBE_LOAD, GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD, GEN8_MEDIA_OBJECT were replaced by GEN7 version. However this constants were not removed from gen8_media.h library, because they are used by other tests for Gen8+. More refactoring in this gen*_media.h libraries is needed. It seems that further unification of *_fillfunc functions will introduce more confusion in understanding what the tests are doing and what were changes between Gens. v2: Moved some reduntant changes from Move gpgpu/media fill to gpu_fill... to this patch. Applied comments from review. v3: rebase Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
2018-02-01lib/intel_batchbuffer: Add src/dst delta arguments to igt_blitter_fast_copy tooMaarten Lankhorst1-4/+8
Nothing uses this currently, but other copy functions have the same delta now. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2018-02-01lib/intel_batchbuffer: Add delta argument to igt_blitter_fast_copy__raw, v2.Maarten Lankhorst1-7/+12
Adding a delta offset will allow us to copy planar framebuffers with this function. Changes since v1: - Set src and destination addresses to the delta, in case BO is mapped at offset 0. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> #v1
2017-12-11igt_fb: Add support for drawing to non-32bit Y/Yf tiled FBsImre Deak1-4/+29
When drawing with cairo to Y/Yf tiled FBs we use a temporary linear buffer which is mapped to the CPU, but the fast blit needed for this only expects 32 bpp FBs. Add support for other bpps too. This is needed for upcoming patches testing non-32bit bpp formats with Y/Yf tiling. Thanks to Ville for explaining why we need the temporary buffer. (Looks like for Y tiling we could do without, but that's a separate topic.) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com>
2017-06-30lib/intel_batchbuffer: Add Gen10 support for render_copy and gpgpu_fillfunc.Rodrigo Vivi1-2/+2
None of the fields we use on render_copy and gpgpu_fill has changed when compared to gen9. So let's reuse them. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-01-02lib: Mass conversion to to_user_pointer()Chris Wilson1-2/+2
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-09-08lib: various documentation fixesThomas Wood1-1/+1
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-07-20lib/gpgpu_fill: Add SKL supportDominik Zeromski1-0/+2
SKL changed state base address command. Cc: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Dominik Zeromski <dominik.zeromski@intel.com> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-07-20lib/gpgpu_fill: Add BDW supportDominik Zeromski1-0/+2
BDW changed structure of surface state and interface descriptors. Commands like state base address, gpgpu walker were extended. Cc: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Dominik Zeromski <dominik.zeromski@intel.com> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-07-20lib: Move gpgpu_fill code to separate fileDominik Zeromski1-0/+1
The gpgpu fill utility functions are used in separate test so it's logical to keep them in separate file. This is similar to what media spin test did in the past. Functionally only gpgpu kernel changed. Send instruction payload size was reduced. Since offset is incremented by 0x10 bytes there is no point in using larger writes. Cc: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Dominik Zeromski <dominik.zeromski@intel.com> [Thomas: Fix typo of gpgpu_fill.h in Makefile.sources] Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-07-02docs: various documentation fixesThomas Wood1-2/+2
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-06-27doc: Remove i-g-t/intel prefixes and capitalize section titlesDamien Lespiau1-1/+1
Looks better! Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-04-14lib: add a define for test failure exit statusThomas Wood1-1/+1
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-17 03:30:21 +0000