From 4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa Mon Sep 17 00:00:00 2001 From: ths Date: Wed, 24 Jan 2007 01:47:51 +0000 Subject: Reworking MIPS interrupt handling, by Aurelien Jarno. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/mips_timer.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'hw/mips_timer.c') diff --git a/hw/mips_timer.c b/hw/mips_timer.c index 251324d7b..bc83036b3 100644 --- a/hw/mips_timer.c +++ b/hw/mips_timer.c @@ -57,8 +57,7 @@ void cpu_mips_store_count (CPUState *env, uint32_t value) void cpu_mips_store_compare (CPUState *env, uint32_t value) { cpu_mips_update_count(env, cpu_mips_get_count(env), value); - env->CP0_Cause &= ~0x00008000; - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + cpu_mips_irq_request(env, 7, 0); } static void mips_timer_cb (void *opaque) @@ -72,8 +71,7 @@ static void mips_timer_cb (void *opaque) } #endif cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); - env->CP0_Cause |= 0x00008000; - cpu_interrupt(env, CPU_INTERRUPT_HARD); + cpu_mips_irq_request(env, 7, 1); } void cpu_mips_clock_init (CPUState *env) -- cgit v1.2.3