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2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-2/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2-5/+6
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03remove unused stuff from */exec.hPaolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-02Don't declare XSAVE as supportedAndi Kleen1-2/+2
i386 cpuid.c currently claims XSAVE is supported in the CPUID filter, but that's not true: Only FXSAVE is supported. Remove that bit from the filter. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-02Add more boundary checking to sse3/4 parsingAndi Kleen1-0/+9
ssse3 uses tables with only two entries per op, but it is indexed with b1 which can contain variables upto 3. This happens when ssse3 or sse4 are used with REP* prefixes. Add boundary checking for this case. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-01target-i386: fix xchg rax,r8Richard Henderson1-2/+7
We were ignoring REX_B while special-casing NOP, i.e. xchg eax,eax. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-30x86: svm: Always clear event_inj on vmexitJan Kiszka1-0/+1
We currently only clear SVM_EVTINJ_VALID after successful interrupt delivery. This apparently does not match real hardware which clears the whole event_inj field on every vmexit, including unsuccessful interrupt delivery. Reported-by: Erik van der Kouwe <vdkouwe@cs.vu.nl> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-28kvm: Fix cpu_is_bsp() compilation warningSheng Yang1-0/+1
Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-06-28kvm: init mp_stateMarcelo Tosatti1-0/+6
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-06-28kvm: Enable XSAVE live migration supportSheng Yang3-3/+163
Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-06-28Enable XSAVE related CPUIDSheng Yang1-0/+21
We can support it in KVM now. The 0xd leaf is queried from KVM. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-06-28kvm: Extend kvm_arch_get_supported_cpuid() to support indexSheng Yang1-8/+11
Would use it later for XSAVE related CPUID. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-06-28fix CPUID vendor overrideAndre Przywara1-1/+1
the meaning of vendor_override is actually the opposite of how it is currently used :-( Fix it to allow KVM to export the non-native CPUID vendor if explicitly requested by the user. The intended behavior is: With TCG: - always inject the configured vendor (either hard-coded, in config files or via ",vendor=" commandline) With KVM: - by default inject the host's vendor - if the user specifies ",vendor=" on the commandline, use this instead of the host's vendor - all pre-configured vendors (hard-coded, config file) are ignored Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-06-27x86: Fix INIT processingJan Kiszka1-0/+1
This fixes a regression of 0e26b7b892: Reset halted also on INIT. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: qdev conversion cleanupBlue Swirl1-1/+1
Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid using CPUState internalsBlue Swirl2-11/+22
Move the actual CPUState contents handling to cpu.h and cpuid.c. Handle CPU reset and set env->halted in pc.c. Add a function to get the local APIC state of the current CPU for the MMIO. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid passing CPUState from CPU codeBlue Swirl4-19/+20
Pass only APICState when accessing APIC from CPU code. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-16tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.Richard Henderson1-0/+3
Some hosts (amd64, ia64) have an ABI that ignores the high bits of the 64-bit register when passing 32-bit arguments. Others require the value to be properly sign-extended for the type. I.e. "int32_t" must be sign-extended and "uint32_t" must be zero-extended to 64-bits. To effect this, extend the "sizemask" parameter to tcg_gen_callN to include the signedness of the type of each parameter. If the tcg target requires it, extend each 32-bit argument into a 64-bit temp and pass that to the function call. This ABI feature is required by sparc64, ppc64 and s390x. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-04target-i386: fix decoding of negative 4-byte displacementsPaolo Bonzini1-1/+1
Negative four byte displacements need to be sign-extended after c086b783eb7a578993d6d2ab62c4c2666800b63d. Do so. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-01resent: x86/cpuid: Add kvm32 CPU modelAndre Przywara1-0/+14
Create a kvm32 CPU model that describes a least common denominator for KVM capable guest CPUs. Useful for migration purposes. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-11kvm: fix 80000001.EDX supported bit filteringGleb Natapov1-1/+1
On AMD some bits from 1.EDX are reported in 80000001.EDX. The mask used to copy bits from 1.EDX to 80000001.EDX is incorrect resulting in unsupported features passed into a guest. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-11Do not stop VM if emulation failed in userspace.Gleb Natapov1-0/+7
Continue vcpu execution in case emulation failure happened while vcpu was in userspace. In this case #UD will be injected into the guest allowing guest OS to kill offending process and continue. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-11kvm: enable smp > 1Marcelo Tosatti1-0/+16
Process INIT/SIPI requests and enable -smp > 1. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-11kvm: validate context for kvm cpu get/put operationsJan Kiszka1-0/+4
Validate that KVM vcpu state is only read/written from cpu thread itself or that cpu is stopped. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-05target-i386: Remove duplicate CPU log.Richard Henderson1-1/+0
The proper logging for -d cpu is done in generic code. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-26kvm: allow qemu to set EPT identity mapping addressSheng Yang1-1/+25
If we use larger BIOS image than current 256KB, we would need move reserved TSS and EPT identity mapping pages. Currently TSS support this, but not EPT. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-04-26target-i386: print EFER in cpu_dump_stateMarcelo Tosatti1-0/+1
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-04-26KVM: x86: Add debug register saving and restoringJan Kiszka1-0/+55
Make use of the new KVM_GET/SET_DEBUGREGS to save/restore the x86 debug registers. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-04-25x86: remove dead assignments, spotted by clang analyzerBlue Swirl1-3/+1
Value stored is never read. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-18kvm: avoid collision with dprintf macro in stdio.h, spotted by clangBlue Swirl1-5/+5
Fixes clang errors: CC i386-softmmu/kvm.o /src/qemu/target-i386/kvm.c:40:9: error: 'dprintf' macro redefined In file included from /src/qemu/target-i386/kvm.c:21: In file included from /src/qemu/qemu-common.h:27: In file included from /usr/include/stdio.h:910: /usr/include/bits/stdio2.h:189:12: note: previous definition is here CC i386-softmmu/kvm-all.o /src/qemu/kvm-all.c:39:9: error: 'dprintf' macro redefined In file included from /src/qemu/kvm-all.c:23: In file included from /src/qemu/qemu-common.h:27: In file included from /usr/include/stdio.h:910: /usr/include/bits/stdio2.h:189:12: note: previous definition is here Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-08target-i386: Fix variable in (disabled) debugging codeAdam Lackorzynski1-1/+1
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08target-i386: Fix compiler warningStefan Weil1-3/+4
With argument checking for cpu_fprintf, gcc throws this warning: CC i386-softmmu/helper.o cc1: warnings being treated as errors /qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’: /qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments The code is correct, but current gcc versions don't detect this. Therefore the patch rewrites the statement to satisfy the compiler. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-17Large page TLB flushPaul Brook1-4/+3
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-13x86/cpuid: fix indentationAurelien Jarno1-7/+7
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: Enable all features of real CPUAurelien Jarno1-30/+26
Enable all features of real CPU, unsupported features will be trimmed depending on TCG or KVM capabilities. Move the list of unsupported TCG features near the TCG capabilities masks. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: fix CPUID levelsAndre Przywara1-2/+2
Bump up the xlevel number for qemu32 to allow parsing of the processor name string for this model. Similiarly the 486 processor should have at least the feature bit leaf enabled. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: Always expose 32 and 64-bit CPUsAndre Przywara1-2/+0
Since 64-bit capability is just another CPUID bit we now properly mask, there is no reason anymore to hide the 64-bit capable CPU models from a 32-bit only QEMU. All 64-bit CPUs can be used perfectly in 32-bit legacy mode anyway, so these models also make sense for 32-bit. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add TCG feature bit trimmingAndre Przywara1-0/+24
In KVM we trim the user provided CPUID bits to match the host CPU's one. Introduce a similar feature to QEMU/TCG. Create a mask of TCG's capabilities and apply it to the user bits. This allows to let the CPU models reflect their native archetypes. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: remove unnecessary kvm_trim functionAndre Przywara1-21/+6
Correct me if I am wrong, but kvm_trim looks like a really bloated implementation of a bitwise AND. So remove this function and replace it with the real stuff(TM). Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add "host" to the list of supported CPU modelsAndre Przywara1-0/+3
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add missing CPUID feature flag namesAndre Przywara1-8/+8
Some CPUID feature flags had no string value, so they could not be switched on or off from the command line. Add names for the missing ones mentioned in the current public CPUID specification from both Intel and AMD. Those only mentioned in the Linux kernel source I put as comments. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: moved host_cpuid function and remove prototypeAndre Przywara1-37/+34
the host_cpuid function was located at the end of the file and had a prototype before it's first use. Move it up and remove the prototype. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: fix missing feature set bitsAndre Przywara1-0/+1
This one was accidently removed with commit bb0300dc57c10b3721451b0ff566a03f9276cc77 Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: replace magic number with named constantAndre Przywara1-5/+6
CPUID leaf Fn8000_0001.EDX contains a copy of many Fn0000_0001.EDX bits. Define a name for this mask to improve readability and avoid typos. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: move CPUID functions into separate fileAndre Przywara3-1115/+1143
about half of target-i386/helper.c consist of CPUID related functions. Only one of them is a real TCG helper function. So move the whole CPUID stuff out of this into a separate file to get better maintainable parts. This is only code reordering and should not affect QEMU's functionality. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13target-i386: fix commit c22549204a6edc431e8e4358e61bd56386ff6957TeLeMan1-0/+5
The commit c22549204a6edc431e8e4358e61bd56386ff6957 led movntps & movntdq to be translated incorrectly. Signed-off-by: TeLeMan <geleman@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-5/+0
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+11
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-10target-i386: fix SIB decoding with index = 4Aurelien Jarno1-2/+2
A SIB byte with an index of 4 means "no scaled index", even if the scale value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects %r12. This is correctly handled by the computation of the index variable, which includes the index bits, and also the REX.X prefix: index = ((code >> 3) & 7) | REX_X(s); Thanks to Avi Kivity, Jamie Lokier and Malc for the analysis of the problem and the initial patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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