diff options
author | Paul Brook <paul@codesourcery.com> | 2010-04-05 00:28:53 +0100 |
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committer | Paul Brook <paul@codesourcery.com> | 2010-04-05 00:28:53 +0100 |
commit | 355b194369d02df7a97d554eef2a9cffe98d736f (patch) | |
tree | 15fb62cc03f22548ea08f7cb1609d7abe7970052 /tcg/mips | |
parent | 5bd2c0d7a6778542827ac7f897eed3fb5cf7ff5a (diff) |
Split TLB addend and target_phys_addr_t
Historically the qemu tlb "addend" field was used for both RAM and IO accesses,
so needed to be able to hold both host addresses (unsigned long) and guest
physical addresses (target_phys_addr_t). However since the introduction of
the iotlb field it has only been used for RAM accesses.
This means we can change the type of addend to unsigned long, and remove
associated hacks in the big-endian TCG backends.
We can also remove the host dependence from target_phys_addr_t.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'tcg/mips')
-rw-r--r-- | tcg/mips/tcg-target.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 10b9fc1db..351efb101 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -867,7 +867,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr); tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addend) + addr_meml); + offsetof(CPUState, tlb_table[mem_index][0].addend)); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_V0, TCG_REG_A0, addr_regl); #else if (GUEST_BASE == (int16_t)GUEST_BASE) { @@ -1054,7 +1054,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr); tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addend) + addr_meml); + offsetof(CPUState, tlb_table[mem_index][0].addend)); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, addr_regl); #else if (GUEST_BASE == (int16_t)GUEST_BASE) { |