diff options
Diffstat (limited to 'src/gallium/drivers/llvmpipe/lp_tex_cache.h')
-rw-r--r-- | src/gallium/drivers/llvmpipe/lp_tex_cache.h | 151 |
1 files changed, 151 insertions, 0 deletions
diff --git a/src/gallium/drivers/llvmpipe/lp_tex_cache.h b/src/gallium/drivers/llvmpipe/lp_tex_cache.h new file mode 100644 index 0000000000..9fa6c36812 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_tex_cache.h @@ -0,0 +1,151 @@ +/************************************************************************** + * + * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef LP_TEX_CACHE_H +#define LP_TEX_CACHE_H + + +#include "pipe/p_compiler.h" + + +struct llvmpipe_context; +struct llvmpipe_tex_tile_cache; + + +/** + * Cache tile size (width and height). This needs to be a power of two. + */ +#define TEX_TILE_SIZE 64 + + +/* If we need to support > 4096, just expand this to be a 64 bit + * union, or consider tiling in Z as well. + */ +union tex_tile_address { + struct { + unsigned x:6; /* 4096 / TEX_TILE_SIZE */ + unsigned y:6; /* 4096 / TEX_TILE_SIZE */ + unsigned z:12; /* 4096 -- z not tiled */ + unsigned face:3; + unsigned level:4; + unsigned invalid:1; + } bits; + unsigned value; +}; + + +struct llvmpipe_cached_tex_tile +{ + union tex_tile_address addr; + uint8_t color[TEX_TILE_SIZE][TEX_TILE_SIZE][4]; +}; + +#define NUM_ENTRIES 50 + + +/** XXX move these */ +#define MAX_TEX_WIDTH 2048 +#define MAX_TEX_HEIGHT 2048 + + +struct llvmpipe_tex_tile_cache +{ + struct pipe_screen *screen; + struct pipe_surface *surface; /**< the surface we're caching */ + struct pipe_transfer *transfer; + void *transfer_map; + + struct pipe_texture *texture; /**< if caching a texture */ + unsigned timestamp; + + struct llvmpipe_cached_tex_tile entries[NUM_ENTRIES]; + + struct pipe_transfer *tex_trans; + void *tex_trans_map; + int tex_face, tex_level, tex_z; + + struct llvmpipe_cached_tex_tile *last_tile; /**< most recently retrieved tile */ +}; + + +extern struct llvmpipe_tex_tile_cache * +lp_create_tex_tile_cache( struct pipe_screen *screen ); + +extern void +lp_destroy_tex_tile_cache(struct llvmpipe_tex_tile_cache *tc); + +extern void +lp_tex_tile_cache_map_transfers(struct llvmpipe_tex_tile_cache *tc); + +extern void +lp_tex_tile_cache_unmap_transfers(struct llvmpipe_tex_tile_cache *tc); + +extern void +lp_tex_tile_cache_set_texture(struct llvmpipe_tex_tile_cache *tc, + struct pipe_texture *texture); + +void +lp_tex_tile_cache_validate_texture(struct llvmpipe_tex_tile_cache *tc); + +extern const struct llvmpipe_cached_tex_tile * +lp_find_cached_tex_tile(struct llvmpipe_tex_tile_cache *tc, + union tex_tile_address addr ); + +static INLINE const union tex_tile_address +tex_tile_address( unsigned x, + unsigned y, + unsigned z, + unsigned face, + unsigned level ) +{ + union tex_tile_address addr; + + addr.value = 0; + addr.bits.x = x / TEX_TILE_SIZE; + addr.bits.y = y / TEX_TILE_SIZE; + addr.bits.z = z; + addr.bits.face = face; + addr.bits.level = level; + + return addr; +} + +/* Quickly retrieve tile if it matches last lookup. + */ +static INLINE const struct llvmpipe_cached_tex_tile * +lp_get_cached_tex_tile(struct llvmpipe_tex_tile_cache *tc, + union tex_tile_address addr ) +{ + if (tc->last_tile->addr.value == addr.value) + return tc->last_tile; + + return lp_find_cached_tex_tile( tc, addr ); +} + + +#endif /* LP_TEX_CACHE_H */ + |