radeon: SetTexOffset support

This patch is a straightforward duplication of the R200 SetTexOffset code,
except that there is no big-endian tx_table[] array.

5 files changed, 82 insertions, 21 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 7c45c37b03..bc43fc5960 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -161,6 +161,8 @@ struct radeon_tex_obj {
 	drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 	/* Six, for the cube faces */
 
+	GLboolean image_override; /* Image overridden by GLX_EXT_tfp */
+
 	GLuint pp_txfilter;	/* hardware register values */
 	GLuint pp_txformat;
 	GLuint pp_txoffset;	/* Image location in texmem.
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 02152499c4..84b5c46bf1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -49,6 +49,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #if !RADEON_COMMON
 #include "radeon_context.h"
 #include "radeon_span.h"
+#include "radeon_tex.h"
 #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
 #include "r200_context.h"
 #include "r200_ioctl.h"
@@ -321,6 +322,13 @@ radeonFillInModes( __DRIscreenPrivate *psp,
     return (const __DRIconfig **) configs;
 }
 
+#if !RADEON_COMMON
+static const __DRItexOffsetExtension radeonTexOffsetExtension = {
+    { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
+    radeonSetTexOffset,
+};
+#endif
+
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
 static const __DRIallocateExtension r200AllocateExtension = {
     { __DRI_ALLOCATE, __DRI_ALLOCATE_VERSION },
@@ -934,6 +942,10 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
        screen->extensions[i++] = &driMediaStreamCounterExtension.base;
    }
 
+#if !RADEON_COMMON
+   screen->extensions[i++] = &radeonTexOffsetExtension.base;
+#endif
+
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
    if (IS_R200_CLASS(screen))
        screen->extensions[i++] = &r200AllocateExtension.base;
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.h b/src/mesa/drivers/dri/radeon/radeon_tex.h
index a806981ae6..0b955eda14 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.h
@@ -38,6 +38,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_TEX_H__
 #define __RADEON_TEX_H__
 
+extern void radeonSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
+                               unsigned long long offset, GLint depth,
+                               GLuint pitch);
+
 extern void radeonUpdateTextureState( GLcontext *ctx );
 
 extern int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texmem.c b/src/mesa/drivers/dri/radeon/radeon_texmem.c
index 20f25dd34b..0a3d745bd0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texmem.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texmem.c
@@ -334,7 +334,7 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
 {
    int numLevels;
 
-   if ( !t || t->base.totalSize == 0 )
+   if ( !t || t->base.totalSize == 0 || t->image_override )
       return 0;
 
    if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 37bb749223..ecd375473b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -40,6 +40,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "context.h"
 #include "macros.h"
 #include "texformat.h"
+#include "texobj.h"
 #include "enums.h"
 
 #include "radeon_context.h"
@@ -84,7 +85,7 @@ tx_table[] =
    _ALPHA_REV(RGBA8888),
    _ALPHA(ARGB8888),
    _ALPHA_REV(ARGB8888),
-   _INVALID(RGB888),
+   [ MESA_FORMAT_RGB888 ] = { RADEON_TXFORMAT_ARGB8888, 0 },
    _COLOR(RGB565),
    _COLOR_REV(RGB565),
    _ALPHA(ARGB4444),
@@ -134,18 +135,19 @@ static void radeonSetTexImages( radeonContextPtr rmesa,
 
    /* Set the hardware texture format
     */
-
-   t->pp_txformat &= ~(RADEON_TXFORMAT_FORMAT_MASK |
-		       RADEON_TXFORMAT_ALPHA_IN_MAP);
-   t->pp_txfilter &= ~RADEON_YUV_TO_RGB;
-
-   if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
-      t->pp_txformat |= tx_table[ baseImage->TexFormat->MesaFormat ].format;
-      t->pp_txfilter |= tx_table[ baseImage->TexFormat->MesaFormat ].filter;
-   }
-   else {
-      _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
-      return;
+   if ( !t->image_override ) {
+      t->pp_txformat &= ~(RADEON_TXFORMAT_FORMAT_MASK |
+                          RADEON_TXFORMAT_ALPHA_IN_MAP);
+      t->pp_txfilter &= ~RADEON_YUV_TO_RGB;
+
+      if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
+         t->pp_txformat |= tx_table[ baseImage->TexFormat->MesaFormat ].format;
+         t->pp_txfilter |= tx_table[ baseImage->TexFormat->MesaFormat ].filter;
+      }
+      else {
+         _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
+         return;
+      }
    }
 
    texelBytes = baseImage->TexFormat->TexelBytes;
@@ -341,11 +343,13 @@ static void radeonSetTexImages( radeonContextPtr rmesa,
     * requires 64-byte aligned pitches, and we may/may not need the
     * blitter.   NPOT only!
     */
-   if (baseImage->IsCompressed)
-      t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
-   else
-      t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
-   t->pp_txpitch -= 32;
+   if ( !t->image_override ) {
+      if (baseImage->IsCompressed)
+         t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
+      else
+         t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
+      t->pp_txpitch -= 32;
+   }
 
    t->dirty_state = TEX_ALL;
 
@@ -840,6 +844,44 @@ static GLboolean radeonUpdateTextureEnv( GLcontext *ctx, int unit )
    return GL_TRUE;
 }
 
+void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
+                        unsigned long long offset, GLint depth, GLuint pitch)
+{
+	radeonContextPtr rmesa = pDRICtx->driverPrivate;
+	struct gl_texture_object *tObj =
+	    _mesa_lookup_texture(rmesa->glCtx, texname);
+	radeonTexObjPtr t;
+
+	if (tObj == NULL)
+		return;
+
+	t = (radeonTexObjPtr) tObj->DriverData;
+
+	t->image_override = GL_TRUE;
+
+	if (!offset)
+		return;
+
+	t->pp_txoffset = offset;
+	t->pp_txpitch = pitch - 32;
+
+	switch (depth) {
+	case 32:
+		t->pp_txformat = tx_table[MESA_FORMAT_ARGB8888].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_ARGB8888].filter;
+		break;
+	case 24:
+	default:
+		t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter;
+		break;
+	case 16:
+		t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
+		break;
+	}
+}
+
 #define TEXOBJ_TXFILTER_MASK (RADEON_MAX_MIP_LEVEL_MASK |	\
 			      RADEON_MIN_FILTER_MASK | 		\
 			      RADEON_MAG_FILTER_MASK |		\
@@ -1136,7 +1178,7 @@ static GLboolean enable_tex_2d( GLcontext *ctx, int unit )
       RADEON_FIREVERTICES( rmesa );
       radeonSetTexImages( rmesa, tObj );
       radeonUploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock ) 
+      if ( !t->base.memBlock && !t->image_override ) 
 	return GL_FALSE;
    }
 
@@ -1203,7 +1245,8 @@ static GLboolean enable_tex_rect( GLcontext *ctx, int unit )
       RADEON_FIREVERTICES( rmesa );
       radeonSetTexImages( rmesa, tObj );
       radeonUploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock /* && !rmesa->prefer_gart_client_texturing  FIXME */ ) {
+      if ( !t->base.memBlock &&
+           !t->image_override /* && !rmesa->prefer_gart_client_texturing  FIXME */ ) {
 	 fprintf(stderr, "%s: upload failed\n", __FUNCTION__);
 	 return GL_FALSE;
       }