Fix basic blend and texture state.

6 files changed, 53 insertions, 52 deletions

diff --git a/src/mesa/drivers/dri/i915tex/i915_state.c b/src/mesa/drivers/dri/i915tex/i915_state.c
index f16c0aa003..e21237400f 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state.c
+++ b/src/mesa/drivers/dri/i915tex/i915_state.c
@@ -88,22 +88,20 @@ const struct intel_tracked_state *atoms[] =
     * state will be subject to caching so that we get something like
     * constant state objects from the i965 driver.
     */
-   &i915_upload_maps,		/* must do before samplers */
-   &i915_upload_samplers,
-
-   &i915_upload_BFO,
-
    &i915_upload_buffers,
+   &i915_upload_scissor,
 
    /* Note this packet has a dependency on the current primitive: 
     */
    &i915_upload_stipple, 
 
-   &i915_upload_scissor,
+   &i915_upload_maps,		/* must do before samplers */
+   &i915_upload_samplers,
 
-   &i915_upload_S0S1,
+   NULL,			/* i915_fp_constants */
 
-   NULL,			/* i915_constants */
+   &i915_upload_BFO,
+   &i915_upload_S0S1
 };
 
 
@@ -123,8 +121,8 @@ void i915_init_state( struct i915_context *i915 )
 	 intel->driver_state.atoms[i] = &i915->constants.tracked_state;
 
    _mesa_memcpy(&i915->constants.tracked_state, 
-		&i915_fp_upload_constants,
-		sizeof(i915_fp_upload_constants));
+		&i915_fp_constants,
+		sizeof(i915_fp_constants));
 }
 
 
diff --git a/src/mesa/drivers/dri/i915tex/i915_state.h b/src/mesa/drivers/dri/i915tex/i915_state.h
index 4b9012566a..4ba0d8b775 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state.h
+++ b/src/mesa/drivers/dri/i915tex/i915_state.h
@@ -40,7 +40,7 @@ void i915_destroy_state( struct i915_context *i915 );
 
 
 const struct intel_tracked_state i915_check_fallback;
-const struct intel_tracked_state i915_fp_upload_constants;
+const struct intel_tracked_state i915_fp_constants;
 const struct intel_tracked_state i915_fp_compile_and_upload;
 const struct intel_tracked_state i915_vertex_format;
 const struct intel_tracked_state i915_invarient_state;
diff --git a/src/mesa/drivers/dri/i915tex/i915_state_fp.c b/src/mesa/drivers/dri/i915tex/i915_state_fp.c
index a74ed02ace..c019b2283b 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state_fp.c
+++ b/src/mesa/drivers/dri/i915tex/i915_state_fp.c
@@ -135,7 +135,7 @@ upload_constants(struct intel_context *intel)
  * each context will maintain a copy of this internally and update as
  * required.
  */
-const struct intel_tracked_state intel_constants = {
+const struct intel_tracked_state i915_fp_constants = {
    .dirty = {
       .mesa = 0,      /* plus fp state flags */
       .intel  = INTEL_NEW_FRAGMENT_PROGRAM,
diff --git a/src/mesa/drivers/dri/i915tex/i915_state_map.c b/src/mesa/drivers/dri/i915tex/i915_state_map.c
index fee52d5dbd..2f3bae738a 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state_map.c
+++ b/src/mesa/drivers/dri/i915tex/i915_state_map.c
@@ -116,7 +116,7 @@ upload_maps( struct intel_context *intel )
 	  */
 	 i915->state.tex_buffer[i] = driBOReference(intelObj->mt->region->buffer);
 	 i915->state.tex_offset[i] = intel_miptree_image_offset(intelObj->mt, 0,
-								   intelObj-> firstLevel);
+								intelObj-> firstLevel);
 
 	 /* Get first image here, since intelObj->firstLevel will get set in
 	  * the intel_finalize_mipmap_tree() call above.
@@ -140,31 +140,32 @@ upload_maps( struct intel_context *intel )
       }
    }
 
+   if (nr) {
+      BEGIN_BATCH(2 + nr * 3, 0);
+      OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
+      OUT_BATCH(dirty);
 
-   BEGIN_BATCH(2 + nr * 3, 0);
-   OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
-   OUT_BATCH(dirty);
-
-   for (i = 0; i < I915_TEX_UNITS; i++) {
-      if (dirty & (1<<i)) {
+      for (i = 0; i < I915_TEX_UNITS; i++) {
+	 if (dirty & (1<<i)) {
 	 
-	 if (i915->state.tex_buffer[i]) {
-	    OUT_RELOC(i915->state.tex_buffer[i],
-		      DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-		      DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
-		      i915->state.tex_offset[i]);
+	    if (i915->state.tex_buffer[i]) {
+	       OUT_RELOC(i915->state.tex_buffer[i],
+			 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+			 DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
+			 i915->state.tex_offset[i]);
+	    }
+	    else {
+	       assert(i == 0);
+	       assert(intel->metaops.active); /* when does this happen? */
+	       OUT_BATCH(0);
+	    }
+
+	    OUT_BATCH(state[i][3]);
+	    OUT_BATCH(state[i][4]);
 	 }
-	 else {
-	    assert(i == 0);
-	    assert(intel->metaops.active); /* when does this happen? */
-	    OUT_BATCH(0);
-	 }
-
-	 OUT_BATCH(state[i][3]);
-	 OUT_BATCH(state[i][4]);
       }
+      ADVANCE_BATCH();
    }
-   ADVANCE_BATCH();
 
 /*    return GL_TRUE; */
 }
diff --git a/src/mesa/drivers/dri/i915tex/i915_state_misc.c b/src/mesa/drivers/dri/i915tex/i915_state_misc.c
index 07cf8afa65..d3dfd5d0c4 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state_misc.c
+++ b/src/mesa/drivers/dri/i915tex/i915_state_misc.c
@@ -155,7 +155,7 @@ static void upload_BLENDCOLOR( struct intel_context *intel )
 {
    /* _NEW_COLOR 
     */
-   if (intel->state.Color->BlendEnabled) {
+   if (1 || intel->state.Color->BlendEnabled) {
       const GLfloat *color = intel->state.Color->BlendColor;
       GLubyte r, g, b, a;
 
@@ -188,11 +188,11 @@ const struct intel_tracked_state i915_upload_BLENDCOLOR = {
  */
 static void upload_IAB( struct intel_context *intel )
 {
-   if (intel->state.Color->BlendEnabled) {      
-      GLuint iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | 
-		    IAB_MODIFY_ENABLE |
-		    0);
+   GLuint iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | 
+		 IAB_MODIFY_ENABLE |
+		 0);
 
+   if (intel->state.Color->BlendEnabled) {      
       GLuint eqRGB = intel->state.Color->BlendEquationRGB;
       GLuint eqA = intel->state.Color->BlendEquationA;
       GLuint srcRGB = intel->state.Color->BlendSrcRGB;
@@ -215,12 +215,12 @@ static void upload_IAB( struct intel_context *intel )
 		 DST_ABLND_FACT(intel_translate_blend_factor(dstA)) |
 		 (i915_translate_blend_equation(eqA) << IAB_FUNC_SHIFT) |
 		 IAB_ENABLE );
-      }
-	 
-      BEGIN_BATCH(1, 0);
-      OUT_BATCH( iab );
-      ADVANCE_BATCH();
+      }	 
    }
+
+   BEGIN_BATCH(1, 0);
+   OUT_BATCH( iab );
+   ADVANCE_BATCH();
 }
 
 const struct intel_tracked_state i915_upload_IAB = {
diff --git a/src/mesa/drivers/dri/i915tex/i915_state_sampler.c b/src/mesa/drivers/dri/i915tex/i915_state_sampler.c
index 4ddb534b01..f4dc241cf8 100644
--- a/src/mesa/drivers/dri/i915tex/i915_state_sampler.c
+++ b/src/mesa/drivers/dri/i915tex/i915_state_sampler.c
@@ -231,17 +231,19 @@ static void upload_samplers( struct intel_context *intel )
       }
    }
 
-   BEGIN_BATCH(2 + nr * 3, 0);
-   OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * nr));
-   OUT_BATCH(dirty);
-   for (i = 0; i < I915_TEX_UNITS; i++) {
-      if (intel->state.Texture->Unit[i]._ReallyEnabled) {
-	 OUT_BATCH(state[i][0]);
-	 OUT_BATCH(state[i][1]);
-	 OUT_BATCH(state[i][2]);
+   if (nr) {
+      BEGIN_BATCH(2 + nr * 3, 0);
+      OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * nr));
+      OUT_BATCH(dirty);
+      for (i = 0; i < I915_TEX_UNITS; i++) {
+	 if (intel->state.Texture->Unit[i]._ReallyEnabled) {
+	    OUT_BATCH(state[i][0]);
+	    OUT_BATCH(state[i][1]);
+	    OUT_BATCH(state[i][2]);
+	 }
       }
+      ADVANCE_BATCH();
    }
-   ADVANCE_BATCH();
 }
 
 const struct intel_tracked_state i915_upload_samplers = {