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authorKeith Whitwell <keith@tungstengraphics.com>2007-03-18 20:19:35 +0000
committerKeith Whitwell <keith@tungstengraphics.com>2007-03-18 20:19:35 +0000
commit8848a792af27c5381cd7eab260cc5a4a5fca5f44 (patch)
treea3e0b88afb45706b7fae8e60d441bda16523fd09
parent89c6f8e4ac6d59c6d252ed2612d5ebc281ec37a6 (diff)
Add a basic human-readable batchbuffer dump facility.
-rw-r--r--src/mesa/drivers/dri/i915tex/i915_vtbl.c134
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_batchbuffer.c48
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_context.h2
3 files changed, 165 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i915tex/i915_vtbl.c b/src/mesa/drivers/dri/i915tex/i915_vtbl.c
index ebc692a554..b73b3b1e7f 100644
--- a/src/mesa/drivers/dri/i915tex/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915tex/i915_vtbl.c
@@ -44,6 +44,139 @@
#include "i915_context.h"
#include "i915_cache.h"
+static GLuint debug( const int *stream,
+ const char *name,
+ GLuint len )
+{
+ GLuint i;
+
+ switch (len) {
+ case 0:
+ _mesa_printf("Error - zero length packet (0x%08x)\n", stream[0]);
+ break;
+ default:
+ _mesa_printf("%s (%d dwords):\n", name, len);
+ break;
+ }
+
+ return len;
+}
+
+
+
+static GLuint i915_debug_packet(const GLuint *stream)
+{
+ GLuint cmd = *stream;
+
+ switch (((cmd >> 29) & 0x7)) {
+ case 0x0:
+ switch ((cmd >> 23) & 0x3f) {
+ case 0x0:
+ return debug(stream, "MI_NOOP", 1);
+ case 0x4:
+ return debug(stream, "MI_FLUSH", 1);
+ default:
+ return 0;
+ }
+ break;
+ case 0x1:
+ return 0;
+ case 0x2:
+ return debug(stream, "blit command", (cmd & 0xff) + 2);
+ case 0x3:
+ switch ((cmd >> 24) & 0x1f) {
+ case 0x6:
+ return debug(stream, "3DSTATE_ANTI_ALIASING", 1);
+ case 0x7:
+ return debug(stream, "3DSTATE_RASTERIZATION_RULES", 1);
+ case 0x8:
+ return debug(stream, "3DSTATE_BACKFACE_STENCIL_OPS", 1);
+ case 0x9:
+ return debug(stream, "3DSTATE_BACKFACE_STENCIL_MASKS", 1);
+ case 0xb:
+ return debug(stream, "3DSTATE_INDEPENDENT_ALPHA_BLEND", 1);
+ case 0xc:
+ return debug(stream, "3DSTATE_MODES4", 1);
+ case 0xd:
+ return debug(stream, "3DSTATE_MODES5", 1);
+ case 0x15:
+ return debug(stream, "3DSTATE_FOG_COLOR", 1);
+ case 0x16:
+ return debug(stream, "3DSTATE_COORD_SET_BINDINGS", 1);
+ case 0x1c:
+ /* 3DState16NP */
+ switch((cmd >> 19) & 0x1f) {
+ case 0x10:
+ return debug(stream, "3DSTATE_SCISSOR_ENABLE", 1);
+ case 0x11:
+ return debug(stream, "3DSTATE_DEPTH_SUBRECTANGLE_DISABLE", 1);
+ default:
+ return 0;
+ }
+ case 0x1d:
+ /* 3DStateMW */
+ switch ((cmd >> 16) & 0xff) {
+ case 0x0:
+ return debug(stream, "3DSTATE_MAP_STATE", (cmd & 0x1f) + 2);
+ case 0x1:
+ return debug(stream, "3DSTATE_SAMPLER_STATE", (cmd & 0x1f) + 2);
+ case 0x4:
+ return debug(stream, "3DSTATE_LOAD_STATE_IMMEDIATE", (cmd & 0xf) + 2);
+ case 0x5:
+ return debug(stream, "3DSTATE_PIXEL_SHADER_PROGRAM", (cmd & 0x1f) + 2);
+ case 0x6:
+ return debug(stream, "3DSTATE_PIXEL_SHADER_CONSTANTS", (cmd & 0x1f) + 2);
+ case 0x7:
+ return debug(stream, "3DSTATE_LOAD_INDIRECT", (cmd & 0xff) + 2);
+ case 0x80:
+ return debug(stream, "3DSTATE_DRAWING_RECTANGLE", (cmd & 0xffff) + 2);
+ case 0x81:
+ return debug(stream, "3DSTATE_SCISSOR_RECTANGLE", (cmd & 0xffff) + 2);
+ case 0x83:
+ return debug(stream, "3DSTATE_SPAN_STIPPLE", (cmd & 0xffff) + 2);
+ case 0x85:
+ return debug(stream, "3DSTATE_DEST_BUFFER_VARS", (cmd & 0xffff) + 2);
+ case 0x88:
+ return debug(stream, "3DSTATE_CONSTANT_BLEND_COLOR", (cmd & 0xffff) + 2);
+ case 0x89:
+ return debug(stream, "3DSTATE_FOG_MODE", (cmd & 0xffff) + 2);
+ case 0x8e:
+ return debug(stream, "3DSTATE_BUFFER_INFO", (cmd & 0xffff) + 2);
+ case 0x97:
+ return debug(stream, "3DSTATE_DEPTH_OFFSET_SCALE", (cmd & 0xffff) + 2);
+ case 0x98:
+ return debug(stream, "3DSTATE_DEFAULT_Z", (cmd & 0xffff) + 2);
+ case 0x99:
+ return debug(stream, "3DSTATE_DEFAULT_DIFFUSE", (cmd & 0xffff) + 2);
+ case 0x9a:
+ return debug(stream, "3DSTATE_DEFAULT_SPECULAR", (cmd & 0xffff) + 2);
+ default:
+ return 0;
+ }
+ case 0x1e:
+ if (cmd & (1 << 23))
+ return debug(stream, "???", (cmd & 0xffff) + 1);
+ else
+ return debug(stream, "", 1);
+ case 0x1f:
+ if ((cmd & (1 << 23)) == 0) /* inline vertices */
+ return debug(stream, "3DPRIMITIVE (inline)", (cmd & 0x1ffff) + 2);
+ else if (cmd & (1 << 17)) /* indirect random */
+ if ((cmd & 0xffff) == 0)
+ return debug(stream, "too hard", 0); /* unknown length, too hard */
+ else
+ return debug(stream, "3DPRIM (indexed)", (((cmd & 0xffff) + 1) / 2) + 1);
+ else
+ return debug(stream, "3DPRIM (indirect sequential)", 2); /* indirect sequential */
+ default:
+ return debug(stream, "", 0);
+ }
+ default:
+ return 0;
+ }
+
+ return 0;
+}
@@ -86,4 +219,5 @@ i915InitVtbl(struct i915_context *i915)
i915->intel.vtbl.destroy = i915_destroy_context;
i915->intel.vtbl.flush_cmd = i915_flush_cmd;
i915->intel.vtbl.lost_hardware = i915_lost_hardware;
+ i915->intel.vtbl.debug_packet = i915_debug_packet;
}
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
index 3db3c93417..662aa14048 100644
--- a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
@@ -67,19 +67,29 @@
* server automatically waits on its own dma to complete before
* modifying cliprects ???
*/
-static void dump(GLuint offset, GLuint *ptr, GLuint count)
+static void dump(struct intel_context *intel,
+ GLuint offset, GLuint *ptr, GLuint count)
{
GLuint i;
-#if 0
- for (i = 0; i < count; i += 4)
- fprintf(stderr, "0x%x:\t0x%08x 0x%08x 0x%08x 0x%08x\n",
- offset + i * 4, ptr[i], ptr[i + 1], ptr[i + 2], ptr[i + 3]);
-#else
- for (i = 0; i < count; i++)
- fprintf(stderr, "0x%x:\t0x%08x\n",
- offset + i * 4, ptr[i]);
-#endif
+ for (i = 0; i < count; ) {
+ GLuint len;
+ GLuint j;
+
+ _mesa_printf("[0x%x]: ", offset + i * 4);
+
+ len = intel->vtbl.debug_packet( &ptr[i] );
+ if (len == 0) {
+ _mesa_printf("XXX bad/unknown packet: 0x%08x\n", ptr[i]);
+ assert(0);
+ return;
+ }
+
+ for (j = 0; j < len; j++, i++)
+ _mesa_printf("\t\t0x%08x\n", ptr[i]);
+
+ _mesa_printf("\n");
+ }
}
@@ -91,25 +101,25 @@ intel_dump_batchbuffer(struct intel_batchbuffer *batch, GLubyte *map)
GLuint buf0 = driBOOffset(batch->buffer);
GLuint buf = buf0;;
- fprintf(stderr, "\n\n\nIMMEDIATE: (%d)\n", count / 4);
- dump( buf, ptr, count/4 );
- fprintf(stderr, "END BATCH\n\n\n");
+ fprintf(stderr, "\n\nBATCH: (%d)\n", count / 4);
+ dump( batch->intel, buf, ptr, count/4 );
+ fprintf(stderr, "END-BATCH\n\n\n");
count = batch->segment_finish_offset[1] - batch->segment_start_offset[1];
ptr = (GLuint *)(map + batch->segment_start_offset[1]);
buf = buf0 + batch->segment_start_offset[1];
- fprintf(stderr, "\n\n\nDYNAMIC: (%d)\n", count / 4);
- dump( buf, ptr, count/4 );
- fprintf(stderr, "END BATCH\n\n\n");
+ fprintf(stderr, "\n\nDYNAMIC: (%d)\n", count / 4);
+ dump( batch->intel, buf, ptr, count/4 );
+ fprintf(stderr, "END-DYNAMIC\n\n\n");
count = batch->segment_finish_offset[2] - batch->segment_start_offset[2];
ptr = (GLuint *)(map + batch->segment_start_offset[2]);
buf = buf0 + batch->segment_start_offset[2];
- fprintf(stderr, "\n\n\nOTHER INDIRECT: (%d)\n", count / 4);
- dump( buf, ptr, count/4 );
- fprintf(stderr, "END BATCH\n\n\n");
+ fprintf(stderr, "\n\nINDIRECT: (%d)\n", count / 4);
+ dump( batch->intel, buf, ptr, count/4 );
+ fprintf(stderr, "END-INDIRECT\n\n\n");
}
void
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h
index 27dbc02263..a3afffe1d0 100644
--- a/src/mesa/drivers/dri/i915tex/intel_context.h
+++ b/src/mesa/drivers/dri/i915tex/intel_context.h
@@ -181,6 +181,8 @@ struct intel_context
void (*assert_not_dirty) (struct intel_context *intel);
+ GLuint (*debug_packet)(const GLuint *stream);
+
} vtbl;
GLint refcount;