diff options
author | Keith Whitwell <keith@tungstengraphics.com> | 2007-03-19 19:22:57 +0000 |
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committer | Keith Whitwell <keith@tungstengraphics.com> | 2007-03-19 19:22:57 +0000 |
commit | 33c201791f1fede943ef5b38457deee74556ad39 (patch) | |
tree | 09ed688fe47984e1778f6331e729c4f84141e76b | |
parent | 5b9c70fb0e6ee395888d805de78aec5b9462f37a (diff) |
make the link between state emit and batch packet size stronger
-rw-r--r-- | src/mesa/drivers/dri/i915tex/intel_idx_render.c | 42 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915tex/intel_metaops.c | 57 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915tex/intel_tris.c | 6 |
3 files changed, 57 insertions, 48 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_idx_render.c b/src/mesa/drivers/dri/i915tex/intel_idx_render.c index 4aceaf8311..c0e78c02f2 100644 --- a/src/mesa/drivers/dri/i915tex/intel_idx_render.c +++ b/src/mesa/drivers/dri/i915tex/intel_idx_render.c @@ -187,30 +187,32 @@ static void emit_prims( GLcontext *ctx, * emitting batch commands while holding the lock. */ /* intelRenderPrimitive() */ - intel_emit_hardware_state(intel, 1 + (nr+1)/2); - - /* XXX: Can emit upto 64k indices, need to split larger prims - */ - BEGIN_BATCH(1 + (nr+1)/2, INTEL_BATCH_CLIPRECTS); - OUT_BATCH( _3DPRIMITIVE | - hw_prim | - PRIM_INDIRECT | - PRIM_INDIRECT_ELTS | - nr ); + { + GLuint dwords = 1 + (nr+1)/2; + intel_emit_hardware_state(intel, dwords); + + /* XXX: Can emit upto 64k indices, need to split larger prims + */ + BEGIN_BATCH( dwords, INTEL_BATCH_CLIPRECTS ); + OUT_BATCH( _3DPRIMITIVE | + hw_prim | + PRIM_INDIRECT | + PRIM_INDIRECT_ELTS | + nr ); - /* Pack indices into 16bits - */ - for (j = 0; j < nr-1; j += 2) { - OUT_BATCH( (offset + indices[start+j]) | ((offset + indices[start+j+1])<<16) ); + /* Pack indices into 16bits + */ + for (j = 0; j < nr-1; j += 2) { + OUT_BATCH( (offset + indices[start+j]) | ((offset + indices[start+j+1])<<16) ); + } + + if (j < nr) + OUT_BATCH( (offset + indices[start+j]) ); + + ADVANCE_BATCH(); } - - if (j < nr) - OUT_BATCH( (offset + indices[start+j]) ); - - ADVANCE_BATCH(); } - DBG("%s - done\n", __FUNCTION__); } diff --git a/src/mesa/drivers/dri/i915tex/intel_metaops.c b/src/mesa/drivers/dri/i915tex/intel_metaops.c index 8a5bc8d703..d9728c5885 100644 --- a/src/mesa/drivers/dri/i915tex/intel_metaops.c +++ b/src/mesa/drivers/dri/i915tex/intel_metaops.c @@ -405,36 +405,41 @@ intel_meta_draw_poly(struct intel_context *intel, GLfloat z, GLuint color, GLfloat tex[][2]) { GLint i; - intel_update_software_state( intel ); - intel_emit_hardware_state( intel, 2+n*intel->vertex_size ); - - /* All 3d primitives should be emitted with INTEL_BATCH_CLIPRECTS, - * otherwise the drawing origin (DR4) might not be set correctly. - * - * XXX: use the vb for vertices! - */ - BEGIN_BATCH(2+n*intel->vertex_size, INTEL_BATCH_CLIPRECTS); - OUT_BATCH( _3DPRIMITIVE | - PRIM3D_TRIFAN | - (n * intel->vertex_size - 1 )); - - - for (i = 0; i < n; i++) { - OUT_BATCH_F( xy[i][0] ); - OUT_BATCH_F( xy[i][1] ); - OUT_BATCH_F( z ); - OUT_BATCH( color ); - if (intel->vertex_size == 6) { - OUT_BATCH_F( tex[i][0] ); - OUT_BATCH_F( tex[i][1] ); - } - else { - assert(intel->vertex_size == 4); + { + /* Must be after call to intel_update_software_state(): + */ + GLuint dwords = 2+n*intel->vertex_size; + intel_emit_hardware_state( intel, dwords ); + + /* All 3d primitives should be emitted with INTEL_BATCH_CLIPRECTS, + * otherwise the drawing origin (DR4) might not be set correctly. + * + * XXX: use the vb for vertices! + */ + BEGIN_BATCH(dwords, INTEL_BATCH_CLIPRECTS); + + OUT_BATCH( _3DPRIMITIVE | + PRIM3D_TRIFAN | + (n * intel->vertex_size - 1 )); + + + for (i = 0; i < n; i++) { + OUT_BATCH_F( xy[i][0] ); + OUT_BATCH_F( xy[i][1] ); + OUT_BATCH_F( z ); + OUT_BATCH( color ); + if (intel->vertex_size == 6) { + OUT_BATCH_F( tex[i][0] ); + OUT_BATCH_F( tex[i][1] ); + } + else { + assert(intel->vertex_size == 4); + } } + ADVANCE_BATCH(); } - ADVANCE_BATCH(); } void diff --git a/src/mesa/drivers/dri/i915tex/intel_tris.c b/src/mesa/drivers/dri/i915tex/intel_tris.c index 79faddc08b..ec53ebd910 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tris.c +++ b/src/mesa/drivers/dri/i915tex/intel_tris.c @@ -68,12 +68,14 @@ intel_flush_inline_primitive(struct intel_context *intel) intel->prim.flush = 0; if (used) { + GLuint dwords = 2; + /* Need a loop to ensure the batch gets emitted to the same * batchbuffer as the hardware state: */ - intel_emit_hardware_state( intel, 2 ); + intel_emit_hardware_state( intel, dwords ); - BEGIN_BATCH(2, 0); + BEGIN_BATCH( dwords, INTEL_BATCH_CLIPRECTS ); OUT_BATCH(_3DPRIMITIVE | intel->prim.primitive | PRIM_INDIRECT | |