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authorKeith Whitwell <keith@tungstengraphics.com>2007-05-13 13:33:32 +0100
committerKeith Whitwell <keith@tungstengraphics.com>2007-05-13 13:33:32 +0100
commit1e3154e8f660e1dcd9560942c62df13ed1709a77 (patch)
treefd8bc172f23bdedffe0d1c0796d63706496af904
parent7c9dae9a53b4920901a784e6894dfdbbe029ea03 (diff)
Make sure MI_WAIT packets are emitted for SWZ
Untested...
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_batchbuffer.h25
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_classic.c10
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_swapbuffers.c58
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_swapbuffers.h7
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_swrast.c2
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_swz.c9
6 files changed, 75 insertions, 36 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
index dfeb68364a..c2c1dee9bb 100644
--- a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
@@ -149,6 +149,31 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
batch->flags |= flags;
}
+static INLINE GLubyte *
+intel_batchbuffer_get_space(struct intel_batchbuffer *batch,
+ GLuint segment,
+ GLuint bytes,
+ GLuint flags )
+{
+ GLubyte *ptr;
+
+ intel_batchbuffer_require_space( batch, segment, bytes, flags );
+ ptr = batch->map + batch->segment_finish_offset[segment];
+
+ batch->segment_finish_offset[segment] += bytes;
+ return ptr;
+}
+
+
+static INLINE void
+intel_batchbuffer_put_back_space(struct intel_batchbuffer *batch,
+ GLuint segment,
+ GLuint bytes )
+{
+ batch->segment_finish_offset[segment] -= bytes;
+}
+
+
/* Here are the crusty old macros, to be removed:
*/
#define BATCH_LOCALS
diff --git a/src/mesa/drivers/dri/i915tex/intel_classic.c b/src/mesa/drivers/dri/i915tex/intel_classic.c
index ceb17b84af..84ff341f79 100644
--- a/src/mesa/drivers/dri/i915tex/intel_classic.c
+++ b/src/mesa/drivers/dri/i915tex/intel_classic.c
@@ -239,15 +239,7 @@ static void classic_start_render( struct clip_render *render,
/* Start a new batchbuffer, emit wait for pending flip.
*/
if (start_of_frame)
- intel_wait_flips(crc->intel, 0);
-
-#if 0
- /* Flush any non-cliprect batch now:
- */
- intel_batchbuffer_require_space( crc->intel->batch, 0,
- SEGMENT_IMMEDIATE,
- INTEL_BATCH_CLIPRECTS );
-#endif
+ intel_wait_flips_batch(crc->intel, GL_FALSE);
intel_update_software_state( crc->intel );
}
diff --git a/src/mesa/drivers/dri/i915tex/intel_swapbuffers.c b/src/mesa/drivers/dri/i915tex/intel_swapbuffers.c
index b60ebcc9f5..61ae7e2e2d 100644
--- a/src/mesa/drivers/dri/i915tex/intel_swapbuffers.c
+++ b/src/mesa/drivers/dri/i915tex/intel_swapbuffers.c
@@ -397,8 +397,9 @@ intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h)
/* Emit wait for pending flips */
-void
-intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
+GLboolean
+intel_emit_wait_flips(struct intel_context *intel,
+ GLuint **ptr )
{
struct intel_framebuffer *intel_fb =
(struct intel_framebuffer *) intel->ctx.DrawBuffer;
@@ -413,30 +414,49 @@ intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
intel_fb->pf_pipes)
{
GLint pf_pipes = intel_fb->pf_pipes;
- BATCH_LOCALS;
-
/* Wait for pending flips to take effect */
- BEGIN_BATCH(2, batch_flags);
- OUT_BATCH(pf_pipes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
- : 0);
- OUT_BATCH(pf_pipes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
- : 0);
- ADVANCE_BATCH();
+
+ (*ptr)[0] = ( (pf_pipes & 0x1) ?
+ (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP) :
+ 0 );
+
+ (*ptr)[1] = ( (pf_pipes & 0x2) ?
+ (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP) :
+ 0 );
+
+ *ptr += 2;
intel_rb->pf_pending--;
+ return GL_TRUE;
}
+
+ return GL_FALSE;
}
+
+#define INTEL_WAIT_FLIP_BYTES (2*sizeof(int))
-void intel_do_wait_flips( struct intel_context *intel )
+void intel_wait_flips_batch( struct intel_context *intel,
+ GLboolean do_flush )
{
- intel_wait_flips( intel, 0 );
+ GLuint bytes = INTEL_WAIT_FLIP_BYTES;
+ GLuint *ptr = (GLuint *)intel_batchbuffer_get_space( intel->batch,
+ 0,
+ bytes,
+ 0 );
- /* Flush the batchbuffer. Later call to intelSpanRenderStart will
- * ensure we wait for completion.
- */
- if (intel->batch->segment_finish_offset[0] != 0)
- intel_batchbuffer_flush(intel->batch, GL_TRUE);
-
- intel_batchbuffer_wait_last_fence( intel->batch );
+ if (intel_emit_wait_flips( intel, &ptr ))
+ {
+ /* Flush the batchbuffer. Later call to intelSpanRenderStart will
+ * ensure we wait for completion.
+ */
+ if (do_flush) {
+ intel_batchbuffer_flush(intel->batch, GL_TRUE);
+ intel_batchbuffer_wait_last_fence( intel->batch );
+ }
+ }
+ else {
+ intel_batchbuffer_put_back_space( intel->batch, 0,
+ INTEL_WAIT_FLIP_BYTES );
+ }
}
diff --git a/src/mesa/drivers/dri/i915tex/intel_swapbuffers.h b/src/mesa/drivers/dri/i915tex/intel_swapbuffers.h
index acd5ee262d..b938b691b2 100644
--- a/src/mesa/drivers/dri/i915tex/intel_swapbuffers.h
+++ b/src/mesa/drivers/dri/i915tex/intel_swapbuffers.h
@@ -28,10 +28,11 @@
#ifndef INTEL_SWAPBUFFERS_H
#define INTEL_SWAPBUFFERS_H
-extern void intel_wait_flips(struct intel_context *intel, GLuint batch_flags);
-
extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);
-extern void intel_do_wait_flips( struct intel_context *intel );
+GLboolean intel_emit_wait_flips(struct intel_context *intel, GLuint **ptr );
+
+void intel_wait_flips_batch( struct intel_context *intel,
+ GLboolean do_flush );
#endif
diff --git a/src/mesa/drivers/dri/i915tex/intel_swrast.c b/src/mesa/drivers/dri/i915tex/intel_swrast.c
index 9e906cb3b8..78e48a7278 100644
--- a/src/mesa/drivers/dri/i915tex/intel_swrast.c
+++ b/src/mesa/drivers/dri/i915tex/intel_swrast.c
@@ -415,7 +415,7 @@ static void swrender_start_render( struct clip_render *render,
/* Wait for pending flip.
*/
if (start_of_frame)
- intel_do_wait_flips(intel);
+ intel_wait_flips_batch(intel, GL_TRUE);
/* Wait for last fence to clear:
*/
diff --git a/src/mesa/drivers/dri/i915tex/intel_swz.c b/src/mesa/drivers/dri/i915tex/intel_swz.c
index 32cd2c2605..dcca4c7cea 100644
--- a/src/mesa/drivers/dri/i915tex/intel_swz.c
+++ b/src/mesa/drivers/dri/i915tex/intel_swz.c
@@ -197,10 +197,6 @@ static void swz_start_render( struct clip_render *render,
swz->zone_height);
- /* Goes to the main batchbuffer:
- */
-// intel_wait_flips(intel, INTEL_BATCH_NO_CLIPRECTS);
-
memcpy( swz->last_driver_state,
intel->state.current,
intel->state.driver_state_size );
@@ -305,6 +301,11 @@ static void swz_flush( struct clip_render *render,
swz->nr_vertices * swz->vertex_stride );
+ /* Add wait-for-flip code to the preamble:
+ */
+ intel_emit_wait_flips( intel,
+ (GLuint **)&swz->pre_post.ptr );
+
zone_mi_flush( &swz->pre_post, 0 );
/* Emit preamble - tweak cachemode0: