diff options
author | Ian Romanick <ian.d.romanick@intel.com> | 2008-07-24 08:39:51 -0700 |
---|---|---|
committer | Ian Romanick <ian.d.romanick@intel.com> | 2008-07-24 08:40:22 -0700 |
commit | 6118d830a63d1637587671bdfa9810f3e31c24e7 (patch) | |
tree | 0e34a93e65060cb8732b354694fd3af6f582787e | |
parent | 7c2d7f8cf5b647c81d2df2ee7f9da6fec08f472a (diff) |
Revert "965: Fix color clamping issues"
This reverts commit b993d539a76e7f1446890a85e4b61deec4d4162d. The
patch was applied incorrectly. Actual fix coming soon. Sorry for the
noise.
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_emit.c | 26 |
1 files changed, 3 insertions, 23 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 8c7bc98c61..7767d1369c 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1160,29 +1160,9 @@ void brw_vs_emit(struct brw_vs_compile *c ) } if (inst->DstReg.File == PROGRAM_OUTPUT - && inst->DstReg.Index != VERT_RESULT_HPOS - && c->output_regs[inst->DstReg.Index].used_in_src) { - /* Result color clamping. - * - * When destination register is an output register and it's - * primary/secondary front/back color, we have to clamp the result - * to [0,1]. This is done by enabling the saturation bit for the - * last instruction. - * - * We don't use brw_set_saturate() as it modifies - * p->current->header.saturate, which affects all the subsequent - * instructions. Instead, we directly modify the header of the last - * (already stored) instruction. - */ - if (inst->DstReg.File == PROGRAM_OUTPUT) { - if ((inst->DstReg.Index == VERT_RESULT_COL0) || - (inst->DstReg.Index == VERT_RESULT_COL1) || - (inst->DstReg.Index == VERT_RESULT_BFC0) || - (inst->DstReg.Index == VERT_RESULT_BFC1)) { - p->store[p->nr_insn-1].header.saturate = 1; - } - } - } + &&inst->DstReg.Index != VERT_RESULT_HPOS + &&c->output_regs[inst->DstReg.Index].used_in_src) + brw_MOV(p, get_dst(c, inst->DstReg), dst); release_tmps(c); } |