move i830 drm to shared directory

14 files changed, 4 insertions, 2645 deletions

diff --git a/linux/Makefile.linux b/linux/Makefile.linux
index c3451399..15870a0c 100644
--- a/linux/Makefile.linux
+++ b/linux/Makefile.linux
@@ -79,9 +79,12 @@ MGASHARED =     mga.h mga_dma.c mga_drm.h mga_drv.h mga_irq.c mga_state.c \
                 mga_ucode.h mga_warp.c
 I810HEADERS =   i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
 I830HEADERS =   i830.h i830_drv.h i830_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
+I830SHARED  =   i830_compat.c i830_dma.c i830_drm.h i830_drv.c i830_drv.h \
+		i830.h i830_irq.c i830_mem.c
+
 SISHEADERS=     sis_drv.h sis_drm.h $(DRMHEADERS)
 
-SHAREDSRC = $(DRMSHARED) $(MGASHARED) $(R128SHARED) $(RADEONSHARED)
+SHAREDSRC = $(DRMSHARED) $(MGASHARED) $(R128SHARED) $(RADEONSHARED) $(I830SHARED)
 
 PROGS = dristat drmstat
 
diff --git a/linux/i830_dma.c b/linux/i830_dma.c
deleted file mode 100644
index 5c82c9db..00000000
--- a/linux/i830_dma.c
+++ /dev/null
@@ -1,1686 +0,0 @@
-/* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- *	    Jeff Hartmann <jhartmann@valinux.com>
- *	    Keith Whitwell <keith@tungstengraphics.com>
- *	    Abraham vd Merwe <abraham@2d3d.co.za>
- *
- */
-
-#define __NO_VERSION__
-#include "i830.h"
-#include "drmP.h"
-#include "drm.h"
-#include "i830_drm.h"
-#include "i830_drv.h"
-#include <linux/interrupt.h>	/* For task queue support */
-#include <linux/pagemap.h>     /* For FASTCALL on unlock_page() */
-#include <linux/delay.h>
-
-#ifdef DO_MUNMAP_4_ARGS
-#define DO_MUNMAP(m, a, l)	do_munmap(m, a, l, 1)
-#else
-#define DO_MUNMAP(m, a, l)	do_munmap(m, a, l)
-#endif
-
-#define I830_BUF_FREE		2
-#define I830_BUF_CLIENT		1
-#define I830_BUF_HARDWARE      	0
-
-#define I830_BUF_UNMAPPED 0
-#define I830_BUF_MAPPED   1
-
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
-#define down_write down
-#define up_write up
-#endif
-
-static inline void i830_print_status_page(drm_device_t *dev)
-{
-   	drm_device_dma_t *dma = dev->dma;
-      	drm_i830_private_t *dev_priv = dev->dev_private;
-	u32 *temp = dev_priv->hw_status_page;
-   	int i;
-
-   	DRM_DEBUG(  "hw_status: Interrupt Status : %x\n", temp[0]);
-   	DRM_DEBUG(  "hw_status: LpRing Head ptr : %x\n", temp[1]);
-   	DRM_DEBUG(  "hw_status: IRing Head ptr : %x\n", temp[2]);
-      	DRM_DEBUG(  "hw_status: Reserved : %x\n", temp[3]);
-   	DRM_DEBUG(  "hw_status: Driver Counter : %d\n", temp[5]);
-   	for(i = 9; i < dma->buf_count + 9; i++) {
-	   	DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 9, temp[i]);
-	}
-}
-
-
-static int i830_dma_get_buffer2(drm_device_t *dev, 
-				drm_i830_dma_t *d, 
-				struct file *filp)
-{
-	drm_buf_t *buf;
-	drm_i830_buf_priv_t *buf_priv;
-   	drm_device_dma_t *dma = dev->dma;
-	int i, ret;
-   
-	/* Never use the last dma buffer, hw errata.
-	 */
-   	for (i = 0; i < dma->buf_count - 1; i++) {
-
-		buf = dma->buflist[i];
-	   	buf_priv = buf->dev_private;
-
-	   	if (cmpxchg(buf_priv->in_use, 
-			    I830_BUF_FREE, 
-			    I830_BUF_CLIENT) == I830_BUF_FREE)
-			goto got_buf;
-	}
-   	return DRM_ERR(ENOMEM);
-
- got_buf:
-	buf->filp = filp;
-	d->granted = 1;
-   	d->request_idx = buf->idx;
-   	d->request_size = buf->total;
-   	d->virtual = 0;		/* don't need to map - already done */
-
-	return 0;
-}
-
-
-int i830_dma_cleanup(drm_device_t *dev)
-{
-	drm_device_dma_t *dma = dev->dma;
-
-#if _HAVE_DMA_IRQ
-	/* Make sure interrupts are disabled here because the uninstall ioctl
-	 * may not have been called from userspace and after dev_private
-	 * is freed, it's too late.
-	 */
-	if (dev->irq) DRM(irq_uninstall)(dev);
-#endif
-
-	if (dev->dev_private) {
-		int i;
-	   	drm_i830_private_t *dev_priv = 
-	     		(drm_i830_private_t *) dev->dev_private;
-	   
-	   	if (dev_priv->ring.virtual_start) {
-		   	DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
-					 dev_priv->ring.Size, dev);
-		}
-	   	if (dev_priv->hw_status_page) {
-			pci_free_consistent(dev->pdev, PAGE_SIZE,
-					    dev_priv->hw_status_page,
-					    dev_priv->dma_status_page);
-		   	/* Need to rewrite hardware status page */
-		   	I830_WRITE(0x02080, 0x1ffff000);
-		}
-
-	   	DRM(free)(dev->dev_private, sizeof(drm_i830_private_t), 
-			 DRM_MEM_DRIVER);
-	   	dev->dev_private = NULL;
-
-		for (i = 0; i < dma->buf_count; i++) {
-			drm_buf_t *buf = dma->buflist[ i ];
-			drm_i830_buf_priv_t *buf_priv = buf->dev_private;
-			if ( buf_priv->kernel_virtual && buf->total )
-				DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev);
-		}
-	}
-   	return 0;
-}
-
-int i830_wait_ring(drm_device_t *dev, int n, const char *caller)
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-   	drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
-   	int iters = 0;
-   	unsigned long end;
-	unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
-
-	end = jiffies + (HZ*3);
-   	while (ring->space < n) {	
-	   	ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
-	   	ring->space = ring->head - (ring->tail+8);
-		if (ring->space < 0) ring->space += ring->Size;
-	   
-		if (ring->head != last_head) {
-			end = jiffies + (HZ*3);
-			last_head = ring->head;
-		}
-	  
-	   	iters++;
-		if(time_before(end, jiffies)) {
-		   	DRM_ERROR("space: %d wanted %d\n", ring->space, n);
-		   	DRM_ERROR("lockup\n");
-		   	goto out_wait_ring;
-		}
-		udelay(1);
-		dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
-	}
-
-out_wait_ring:   
-   	return iters;
-}
-
-static void i830_kernel_lost_context(drm_device_t *dev)
-{
-      	drm_i830_private_t *dev_priv = dev->dev_private;
-   	drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
-      
-   	ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
-     	ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
-     	ring->space = ring->head - (ring->tail+8);
-     	if (ring->space < 0) ring->space += ring->Size;
-
-	if (ring->head == ring->tail)
-		dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
-}
-
-static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv)
-{
-      	drm_device_dma_t *dma = dev->dma;
-   	int my_idx = 36;
-   	u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
-   	int i;
-
-   	if(dma->buf_count > 1019) {
-	   	/* Not enough space in the status page for the freelist */
-	   	return DRM_ERR(EINVAL);
-	}
-
-   	for (i = 0; i < dma->buf_count; i++) {
-	   	drm_buf_t *buf = dma->buflist[ i ];
-	   	drm_i830_buf_priv_t *buf_priv = buf->dev_private;
-
-	   	buf_priv->in_use = hw_status++;
-	   	buf_priv->my_use_idx = my_idx;
-	   	my_idx += 4;
-
-	   	*buf_priv->in_use = I830_BUF_FREE;
-
-		buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, 
-							buf->total, dev);
-	}
-	return 0;
-}
-
-static int i830_dma_initialize(drm_device_t *dev, 
-			       drm_i830_private_t *dev_priv,
-			       drm_i830_init_t *init)
-{
-	struct list_head *list;
-
-   	memset(dev_priv, 0, sizeof(drm_i830_private_t));
-
-	list_for_each(list, &dev->maplist->head) {
-		drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
-		if( r_list->map &&
-		    r_list->map->type == _DRM_SHM &&
-		    r_list->map->flags & _DRM_CONTAINS_LOCK ) {
-			dev_priv->sarea_map = r_list->map;
- 			break;
- 		}
- 	}
-
-	if(!dev_priv->sarea_map) {
-		dev->dev_private = (void *)dev_priv;
-		i830_dma_cleanup(dev);
-		DRM_ERROR("can not find sarea!\n");
-		return DRM_ERR(EINVAL);
-	}
-	DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset );
-	if(!dev_priv->mmio_map) {
-		dev->dev_private = (void *)dev_priv;
-		i830_dma_cleanup(dev);
-		DRM_ERROR("can not find mmio map!\n");
-		return DRM_ERR(EINVAL);
-	}
-	DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset );
-	if(!dev_priv->buffer_map) {
-		dev->dev_private = (void *)dev_priv;
-		i830_dma_cleanup(dev);
-		DRM_ERROR("can not find dma buffer map!\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	dev_priv->sarea_priv = (drm_i830_sarea_t *)
-		((u8 *)dev_priv->sarea_map->handle +
-		 init->sarea_priv_offset);
-
-   	dev_priv->ring.Start = init->ring_start;
-   	dev_priv->ring.End = init->ring_end;
-   	dev_priv->ring.Size = init->ring_size;
-
-   	dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + 
-						    init->ring_start, 
-						    init->ring_size, dev);
-
-   	if (dev_priv->ring.virtual_start == NULL) {
-		dev->dev_private = (void *) dev_priv;
-	   	i830_dma_cleanup(dev);
-	   	DRM_ERROR("can not ioremap virtual address for"
-			  " ring buffer\n");
-	   	return DRM_ERR(ENOMEM);
-	}
-
-   	dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-   
-	dev_priv->w = init->w;
-	dev_priv->h = init->h;
-	dev_priv->pitch = init->pitch;
-	dev_priv->back_offset = init->back_offset;
-	dev_priv->depth_offset = init->depth_offset;
-	dev_priv->front_offset = init->front_offset;
-
-	dev_priv->front_di1 = init->front_offset | init->pitch_bits;
-	dev_priv->back_di1 = init->back_offset | init->pitch_bits;
-	dev_priv->zi1 = init->depth_offset | init->pitch_bits;
-
-	DRM_DEBUG("front_di1 %x\n",    dev_priv->front_di1);
-	DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
-	DRM_DEBUG("back_di1 %x\n",    dev_priv->back_di1);
-	DRM_DEBUG("pitch_bits %x\n",    init->pitch_bits);
-
-	dev_priv->cpp = init->cpp;
-	/* We are using separate values as placeholders for mechanisms for
-	 * private backbuffer/depthbuffer usage.
-	 */
-
-	dev_priv->back_pitch = init->back_pitch;
-	dev_priv->depth_pitch = init->depth_pitch;
-	dev_priv->do_boxes = 0;
-	dev_priv->use_mi_batchbuffer_start = 0;
-
-   	/* Program Hardware Status Page */
-   	dev_priv->hw_status_page =
-		pci_alloc_consistent(dev->pdev, PAGE_SIZE,
-						&dev_priv->dma_status_page);
-   	if (!dev_priv->hw_status_page) {
-		dev->dev_private = (void *)dev_priv;
-		i830_dma_cleanup(dev);
-		DRM_ERROR("Can not allocate hardware status page\n");
-		return DRM_ERR(ENOMEM);
-	}
-   	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
-	DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
-   
-   	I830_WRITE(0x02080, dev_priv->dma_status_page);
-	DRM_DEBUG("Enabled hardware status page\n");
-   
-   	/* Now we need to init our freelist */
-   	if(i830_freelist_init(dev, dev_priv) != 0) {
-		dev->dev_private = (void *)dev_priv;
-	   	i830_dma_cleanup(dev);
-	   	DRM_ERROR("Not enough space in the status page for"
-			  " the freelist\n");
-	   	return DRM_ERR(ENOMEM);
-	}
-	dev->dev_private = (void *)dev_priv;
-
-   	return 0;
-}
-
-int i830_dma_init( DRM_IOCTL_ARGS )
-{
-   	drm_file_t *priv = filp->private_data;
-   	drm_device_t *dev = priv->dev;
-   	drm_i830_private_t *dev_priv;
-   	drm_i830_init_t init;
-   	int retcode = 0;
-	
-  	DRM_COPY_FROM_USER_IOCTL( init, (drm_i830_init_t *)data, sizeof(init));
-	
-   	switch(init.func) {
-	 	case I830_INIT_DMA:
-			dev_priv = DRM(alloc)(sizeof(drm_i830_private_t), 
-					      DRM_MEM_DRIVER);
-	   		if(dev_priv == NULL) 
-				return DRM_ERR(ENOMEM);
-	   		retcode = i830_dma_initialize(dev, dev_priv, &init);
-	   	break;
-	 	case I830_CLEANUP_DMA:
-	   		retcode = i830_dma_cleanup(dev);
-	   	break;
-	 	default:
-	   		retcode = -EINVAL;
-	   	break;
-	}
-   
-   	return retcode;
-}
-
-#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
-#define ST1_ENABLE               (1<<16)
-#define ST1_MASK                 (0xffff)
-
-/* Most efficient way to verify state for the i830 is as it is
- * emitted.  Non-conformant state is silently dropped.
- */
-static void i830EmitContextVerified( drm_device_t *dev,
-				     unsigned int *code )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	int i, j = 0;
-	unsigned int tmp;
-	RING_LOCALS;
-
-	BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 );
-
-	for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) {
-		tmp = code[i];
-		if ((tmp & (7<<29)) == CMD_3D &&
-		    (tmp & (0x1f<<24)) < (0x1d<<24)) {
-			OUT_RING( tmp ); 
-			j++;
-		} else {
-			DRM_ERROR("Skipping %d\n", i);
-		}
-	}
-
-	OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD ); 
-	OUT_RING( code[I830_CTXREG_BLENDCOLR] ); 
-	j += 2;
-
-	for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) {
-		tmp = code[i];
-		if ((tmp & (7<<29)) == CMD_3D &&
-		    (tmp & (0x1f<<24)) < (0x1d<<24)) {
-			OUT_RING( tmp ); 
-			j++;
-		} else {
-			DRM_ERROR("Skipping %d\n", i);
-		}
-	}
-
-	OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD ); 
-	OUT_RING( code[I830_CTXREG_MCSB1] ); 
-	j += 2;
-
-	if (j & 1) 
-		OUT_RING( 0 ); 
-
-	ADVANCE_LP_RING();
-}
-
-static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code ) 
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	int i, j = 0;
-	unsigned int tmp;
-	RING_LOCALS;
-
-	if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
-	    (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) == 
-	    (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) {
-
-		BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
-
-		OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */
-		OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */
-		OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */
-		OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */
-		OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */
-		OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */
-		
-		for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
-			tmp = code[i];
-			OUT_RING( tmp ); 
-			j++;
-		} 
-
-		if (j & 1) 
-			OUT_RING( 0 ); 
-
-		ADVANCE_LP_RING();
-	}
-	else
-		printk("rejected packet %x\n", code[0]);
-}
-
-static void i830EmitTexBlendVerified( drm_device_t *dev, 
-				      unsigned int *code,
-				      unsigned int num)
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	int i, j = 0;
-	unsigned int tmp;
-	RING_LOCALS;
-
-	if (!num)
-		return;
-
-	BEGIN_LP_RING( num + 1 );
-
-	for ( i = 0 ; i < num ; i++ ) {
-		tmp = code[i];
-		OUT_RING( tmp );
-		j++;
-	}
-
-	if (j & 1) 
-		OUT_RING( 0 ); 
-
-	ADVANCE_LP_RING();
-}
-
-static void i830EmitTexPalette( drm_device_t *dev,
-			        unsigned int *palette,
-			        int number,
-			        int is_shared )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	int i;
-	RING_LOCALS;
-
-	return;
-
-	BEGIN_LP_RING( 258 );
-
-	if(is_shared == 1) {
-		OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
-			 MAP_PALETTE_NUM(0) |
-			 MAP_PALETTE_BOTH);
-	} else {
-		OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
-	}
-	for(i = 0; i < 256; i++) {
-		OUT_RING(palette[i]);
-	}
-	OUT_RING(0);
-	/* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop! 
-	 */
-}
-
-/* Need to do some additional checking when setting the dest buffer.
- */
-static void i830EmitDestVerified( drm_device_t *dev, 
-				  unsigned int *code ) 
-{	
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	unsigned int tmp;
-	RING_LOCALS;
-
-	BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 );
-
-
-	tmp = code[I830_DESTREG_CBUFADDR];
-	if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
-		if (((int)outring) & 8) {
-			OUT_RING(0);
-			OUT_RING(0);
-		}
-
-		OUT_RING( CMD_OP_DESTBUFFER_INFO );
-		OUT_RING( BUF_3D_ID_COLOR_BACK | 
-			  BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
-			  BUF_3D_USE_FENCE);
-		OUT_RING( tmp );
-		OUT_RING( 0 );
-
-		OUT_RING( CMD_OP_DESTBUFFER_INFO );
-		OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | 
-			  BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
-		OUT_RING( dev_priv->zi1 );
-		OUT_RING( 0 );
-	} else {
-		DRM_ERROR("bad di1 %x (allow %x or %x)\n",
-			  tmp, dev_priv->front_di1, dev_priv->back_di1);
-	}
-
-	/* invarient:
-	 */
-
-
-	OUT_RING( GFX_OP_DESTBUFFER_VARS );
-	OUT_RING( code[I830_DESTREG_DV1] );
-
-	OUT_RING( GFX_OP_DRAWRECT_INFO );
-	OUT_RING( code[I830_DESTREG_DR1] );
-	OUT_RING( code[I830_DESTREG_DR2] );
-	OUT_RING( code[I830_DESTREG_DR3] );
-	OUT_RING( code[I830_DESTREG_DR4] );
-
-	/* Need to verify this */
-	tmp = code[I830_DESTREG_SENABLE];
-	if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
-		OUT_RING( tmp );
-	} else {
-		DRM_ERROR("bad scissor enable\n");
-		OUT_RING( 0 );
-	}
-
-	OUT_RING( GFX_OP_SCISSOR_RECT );
-	OUT_RING( code[I830_DESTREG_SR1] );
-	OUT_RING( code[I830_DESTREG_SR2] );
-	OUT_RING( 0 );
-
-	ADVANCE_LP_RING();
-}
-
-static void i830EmitStippleVerified( drm_device_t *dev, 
-				     unsigned int *code ) 
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	RING_LOCALS;
-
-	BEGIN_LP_RING( 2 );
-	OUT_RING( GFX_OP_STIPPLE );
-	OUT_RING( code[1] );
-	ADVANCE_LP_RING();	
-}
-
-
-static void i830EmitState( drm_device_t *dev )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-      	drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	unsigned int dirty = sarea_priv->dirty;
-
-	DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
-
-	if (dirty & I830_UPLOAD_BUFFERS) {
-		i830EmitDestVerified( dev, sarea_priv->BufferState );
-		sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
-	}
-
-	if (dirty & I830_UPLOAD_CTX) {
-		i830EmitContextVerified( dev, sarea_priv->ContextState );
-		sarea_priv->dirty &= ~I830_UPLOAD_CTX;
-	}
-
-	if (dirty & I830_UPLOAD_TEX0) {
-		i830EmitTexVerified( dev, sarea_priv->TexState[0] );
-		sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
-	}
-
-	if (dirty & I830_UPLOAD_TEX1) {
-		i830EmitTexVerified( dev, sarea_priv->TexState[1] );
-		sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
-	}
-
-	if (dirty & I830_UPLOAD_TEXBLEND0) {
-		i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0],
-				sarea_priv->TexBlendStateWordsUsed[0]);
-		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
-	}
-
-	if (dirty & I830_UPLOAD_TEXBLEND1) {
-		i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1],
-				sarea_priv->TexBlendStateWordsUsed[1]);
-		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
-	}
-
-	if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
-		i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
-	} else {
-		if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
-			i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
-			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
-		}
-		if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
-			i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
-			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
-		}
-	}
-
-	/* 1.3:
-	 */
-	if (dirty & I830_UPLOAD_STIPPLE) {
-		i830EmitStippleVerified( dev, 
-					 sarea_priv->StippleState);
-		sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
-	}
-
-	if (dirty & I830_UPLOAD_TEX2) {
-		i830EmitTexVerified( dev, sarea_priv->TexState2 );
-		sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
-	}
-
-	if (dirty & I830_UPLOAD_TEX3) {
-		i830EmitTexVerified( dev, sarea_priv->TexState3 );
-		sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
-	}
-
-
-	if (dirty & I830_UPLOAD_TEXBLEND2) {
-		i830EmitTexBlendVerified( 
-			dev, 
-			sarea_priv->TexBlendState2,
-			sarea_priv->TexBlendStateWordsUsed2);
-
-		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
-	}
-
-	if (dirty & I830_UPLOAD_TEXBLEND3) {
-		i830EmitTexBlendVerified( 
-			dev, 
-			sarea_priv->TexBlendState3,
-			sarea_priv->TexBlendStateWordsUsed3);
-		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
-	}
-}
-
-/* ================================================================
- * Performance monitoring functions
- */
-
-static void i830_fill_box( drm_device_t *dev,
-			   int x, int y, int w, int h,
-			   int r, int g, int b )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	u32 color;
-	unsigned int BR13, CMD;
-	RING_LOCALS;
-
-	BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24);
-	CMD = XY_COLOR_BLT_CMD;
-	x += dev_priv->sarea_priv->boxes[0].x1;
-	y += dev_priv->sarea_priv->boxes[0].y1;
-
-	if (dev_priv->cpp == 4) {
-		BR13 |= (1<<25);
-		CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
-		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);	
-	} else {
-		color = (((r & 0xf8) << 8) |
-			 ((g & 0xfc) << 3) |
-			 ((b & 0xf8) >> 3));
-	}
-
-	BEGIN_LP_RING( 6 );	    
-	OUT_RING( CMD );
-	OUT_RING( BR13 );
-	OUT_RING( (y << 16) | x );
-	OUT_RING( ((y+h) << 16) | (x+w) );
-
- 	if ( dev_priv->current_page == 1 ) { 
-		OUT_RING( dev_priv->front_offset );
- 	} else {	 
-		OUT_RING( dev_priv->back_offset );
- 	} 
-
-	OUT_RING( color );
-	ADVANCE_LP_RING();
-}
-
-static void i830_cp_performance_boxes( drm_device_t *dev )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-
-	/* Purple box for page flipping
-	 */
-	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP ) 
-		i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 );
-
-	/* Red box if we have to wait for idle at any point
-	 */
-	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT ) 
-		i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 );
-
-	/* Blue box: lost context?
-	 */
-	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT ) 
-		i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 );
-
-	/* Yellow box for texture swaps
-	 */
-	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD ) 
-		i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 );
-
-	/* Green box if hardware never idles (as far as we can tell)
-	 */
-	if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) ) 
-		i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 );
-
-
-	/* Draw bars indicating number of buffers allocated 
-	 * (not a great measure, easily confused)
-	 */
-	if (dev_priv->dma_used) {
-		int bar = dev_priv->dma_used / 10240;
-		if (bar > 100) bar = 100;
-		if (bar < 1) bar = 1;
-		i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 );
-		dev_priv->dma_used = 0;
-	}
-
-	dev_priv->sarea_priv->perf_boxes = 0;
-}
-
-static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, 
-				    unsigned int clear_color,
-				    unsigned int clear_zval,
-				    unsigned int clear_depthmask)
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-      	drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	int nbox = sarea_priv->nbox;
-	drm_clip_rect_t *pbox = sarea_priv->boxes;
-	int pitch = dev_priv->pitch;
-	int cpp = dev_priv->cpp;
-	int i;
-	unsigned int BR13, CMD, D_CMD;
-	RING_LOCALS;
-
-
-	if ( dev_priv->current_page == 1 ) {
-		unsigned int tmp = flags;
-
-		flags &= ~(I830_FRONT | I830_BACK);
-		if ( tmp & I830_FRONT ) flags |= I830_BACK;
-		if ( tmp & I830_BACK )  flags |= I830_FRONT;
-	}
-
-  	i830_kernel_lost_context(dev);
-
-	switch(cpp) {
-	case 2: 
-		BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
-		D_CMD = CMD = XY_COLOR_BLT_CMD;
-		break;
-	case 4:
-		BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25);
-		CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA | 
-		       XY_COLOR_BLT_WRITE_RGB);
-		D_CMD = XY_COLOR_BLT_CMD;
-		if(clear_depthmask & 0x00ffffff)
-			D_CMD |= XY_COLOR_BLT_WRITE_RGB;
-		if(clear_depthmask & 0xff000000)
-			D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
-		break;
-	default:
-		BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
-		D_CMD = CMD = XY_COLOR_BLT_CMD;
-		break;
-	}
-
-      	if (nbox > I830_NR_SAREA_CLIPRECTS)
-     		nbox = I830_NR_SAREA_CLIPRECTS;
-
-	for (i = 0 ; i < nbox ; i++, pbox++) {
-		if (pbox->x1 > pbox->x2 ||
-		    pbox->y1 > pbox->y2 ||
-		    pbox->x2 > dev_priv->w ||
-		    pbox->y2 > dev_priv->h)
-			continue;
-
-	   	if ( flags & I830_FRONT ) {	    
-		   	DRM_DEBUG("clear front\n");
-			BEGIN_LP_RING( 6 );	    
-			OUT_RING( CMD );
-			OUT_RING( BR13 );
-			OUT_RING( (pbox->y1 << 16) | pbox->x1 );
-			OUT_RING( (pbox->y2 << 16) | pbox->x2 );
-			OUT_RING( dev_priv->front_offset );
-			OUT_RING( clear_color );
-			ADVANCE_LP_RING();
-		}
-
-		if ( flags & I830_BACK ) {
-			DRM_DEBUG("clear back\n");
-			BEGIN_LP_RING( 6 );	    
-			OUT_RING( CMD );
-			OUT_RING( BR13 );
-			OUT_RING( (pbox->y1 << 16) | pbox->x1 );
-			OUT_RING( (pbox->y2 << 16) | pbox->x2 );
-			OUT_RING( dev_priv->back_offset );
-			OUT_RING( clear_color );
-			ADVANCE_LP_RING();
-		}
-
-		if ( flags & I830_DEPTH ) {
-			DRM_DEBUG("clear depth\n");
-			BEGIN_LP_RING( 6 );
-			OUT_RING( D_CMD );
-			OUT_RING( BR13 );
-			OUT_RING( (pbox->y1 << 16) | pbox->x1 );
-			OUT_RING( (pbox->y2 << 16) | pbox->x2 );
-			OUT_RING( dev_priv->depth_offset );
-			OUT_RING( clear_zval );
-			ADVANCE_LP_RING();
-		}
-	}
-}
-
-static int i830_dma_dispatch_blit( drm_device_t *dev,
-				    drm_i830_copy_blit_t *blit )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	unsigned int CMD, BR13;
-	int desty2 = blit->dst_y + blit->h;
-	int destx2 = blit->dst_x + blit->w;
-	int srcpitch = blit->src_pitch * blit->cpp;
-	int dstpitch = blit->dst_pitch * blit->cpp;
-	RING_LOCALS;
-
-  	i830_kernel_lost_context(dev);
-
-
-	switch(blit->cpp) {
-	case 1: 
-	case 2: 
-	case 3: 
-		BR13 = dstpitch | (0xCC << 16) | (1<<24);
-		CMD = XY_SRC_COPY_BLT_CMD;
-		break;
-	case 4:
-		BR13 = dstpitch | (0xCC << 16) | (1<<24) | (1<<25);
-		CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-		       XY_SRC_COPY_BLT_WRITE_RGB);
-		break;
-	default:
-		DRM_ERROR("Bad cpp\n");
-		return DRM_ERR(EINVAL);
-	}
-
-
-	if (desty2 < blit->dst_y ||
-	    destx2 < blit->dst_x) {
-		DRM_ERROR("Bad extents\n");
-		return DRM_ERR(EINVAL);
-	}
-
-
-#if 0
-	if (intersect_regions( blit->dest_offset, desty2*dstpitch,
-			       ring, ringsize ))
-		return DRM_ERR(EINVAL);
-#endif	
-
-
-	BEGIN_LP_RING( 8 );
-	OUT_RING( CMD );
-	OUT_RING( BR13 );
-	OUT_RING( (blit->dst_y << 16) | blit->dst_x );
-	OUT_RING( (desty2 << 16) | destx2 );
-	OUT_RING( blit->dst_offset );	
-	OUT_RING( (blit->src_y << 16) | blit->src_x );
-	OUT_RING( srcpitch );
-	OUT_RING( blit->src_offset ); 
-	ADVANCE_LP_RING();
-
-	return 0;
-}
-
-
-static void i830_dma_dispatch_swap( drm_device_t *dev )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-      	drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	int nbox = sarea_priv->nbox;
-	drm_clip_rect_t *pbox = sarea_priv->boxes;
-	int pitch = dev_priv->pitch;
-	int cpp = dev_priv->cpp;
-	int i;
-	unsigned int CMD, BR13;
-	RING_LOCALS;
-
-	DRM_DEBUG("swapbuffers\n");
-
-  	i830_kernel_lost_context(dev);
-
-	if (dev_priv->do_boxes)
-		i830_cp_performance_boxes( dev );
-
-	switch(cpp) {
-	case 2: 
-		BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
-		CMD = XY_SRC_COPY_BLT_CMD;
-		break;
-	case 4:
-		BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25);
-		CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-		       XY_SRC_COPY_BLT_WRITE_RGB);
-		break;
-	default:
-		BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
-		CMD = XY_SRC_COPY_BLT_CMD;
-		break;
-	}
-
-
-      	if (nbox > I830_NR_SAREA_CLIPRECTS)
-     		nbox = I830_NR_SAREA_CLIPRECTS;
-
-	for (i = 0 ; i < nbox; i++, pbox++) 
-	{
-		if (pbox->x1 > pbox->x2 ||
-		    pbox->y1 > pbox->y2 ||
-		    pbox->x2 > dev_priv->w ||
-		    pbox->y2 > dev_priv->h)
-			continue;
- 
-		DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
-			  pbox->x1, pbox->y1,
-			  pbox->x2, pbox->y2);
-
-		BEGIN_LP_RING( 8 );
-		OUT_RING( CMD );
-		OUT_RING( BR13 );
-		OUT_RING( (pbox->y1 << 16) | pbox->x1 );
-		OUT_RING( (pbox->y2 << 16) | pbox->x2 );
-
-		if (dev_priv->current_page == 0) 
-			OUT_RING( dev_priv->front_offset );
-		else
-			OUT_RING( dev_priv->back_offset );			
-
-		OUT_RING( (pbox->y1 << 16) | pbox->x1 );
-		OUT_RING( BR13 & 0xffff );
-
-		if (dev_priv->current_page == 0) 
-			OUT_RING( dev_priv->back_offset );			
-		else
-			OUT_RING( dev_priv->front_offset );
-
-		ADVANCE_LP_RING();
-	}
-}
-
-static void i830_dma_dispatch_flip( drm_device_t *dev )
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	RING_LOCALS;
-
-	DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 
-		   __FUNCTION__, 
-		   dev_priv->current_page,
-		   dev_priv->sarea_priv->pf_current_page);
-
-  	i830_kernel_lost_context(dev);
-
-	if (dev_priv->do_boxes) {
-		dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
-		i830_cp_performance_boxes( dev );
-	}
-
-
-	BEGIN_LP_RING( 2 );
-    	OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 
-	OUT_RING( 0 );
-	ADVANCE_LP_RING();
-
-	BEGIN_LP_RING( 6 );
-	OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP );	
-	OUT_RING( 0 );
-	if ( dev_priv->current_page == 0 ) {
-		OUT_RING( dev_priv->back_offset );
-		dev_priv->current_page = 1;
-	} else {
-		OUT_RING( dev_priv->front_offset );
-		dev_priv->current_page = 0;
-	}
-	OUT_RING(0);
-	ADVANCE_LP_RING();
-
-
-	BEGIN_LP_RING( 2 );
-	OUT_RING( MI_WAIT_FOR_EVENT |
-		  MI_WAIT_FOR_PLANE_A_FLIP );
-	OUT_RING( 0 );
-	ADVANCE_LP_RING();
-	
-
-	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
-}
-
-/* Pull apart the vertex format registers and figure out how large a
- * vertex is supposed to be.  Necessary because the original ioctl
- * didn't provide this info, but we now need it for new machine
- * instructions to avoid the i810-style mmap/munmap security model.
- */
-static int i830_calc_vertex_size( drm_i830_sarea_t *sarea_priv )
-{
-	int vft0 = sarea_priv->ContextState[I830_CTXREG_VF];
-	int vft1 = sarea_priv->ContextState[I830_CTXREG_VF2];
-	int nrtex = (vft0 & VFT0_TEX_COUNT_MASK) >> VFT0_TEX_COUNT_SHIFT;
-	int i, sz = 0;
-
-	switch (vft0 & VFT0_XYZW_MASK) {
-	case VFT0_XY: sz = 2; break;
-	case VFT0_XYZ: sz = 3; break;
-	case VFT0_XYW: sz = 3; break;
-	case VFT0_XYZW: sz = 4; break;
-	default: return 0;
-	}
-
-	if (vft0 & VFT0_SPEC) sz++;
-	if (vft0 & VFT0_DIFFUSE) sz++;
-	if (vft0 & VFT0_DEPTH_OFFSET) sz++;
-	if (vft0 & VFT0_POINT_WIDTH) sz++;
-	
-	for (i = 0 ; i < nrtex ; i++) { 
-		sz += (vft1 & VFT1_TEX0_MASK) + 2;
-		vft1 >>= VFT1_TEX1_SHIFT;
-	}
-	
-	return sz;	
-}
-
-#define PRIM3D_TRILIST		0
-#define PRIM3D_TRISTRIP 	(0x1<<18)
-#define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
-#define PRIM3D_TRIFAN		(0x3<<18)
-#define PRIM3D_POLY		(0x4<<18)
-#define PRIM3D_LINELIST 	(0x5<<18)
-#define PRIM3D_LINESTRIP	(0x6<<18)
-#define PRIM3D_RECTLIST 	(0x7<<18)
-#define PRIM3D_POINTLIST	(0x8<<18)
-#define PRIM3D_DIB		(0x9<<18)
-#define PRIM3D_MASK		(0x1f<<18)
-
-static int bad_prim_vertex_nr( int primitive, int nr )
-{
-	switch (primitive & PRIM3D_MASK) {
-	case PRIM3D_POINTLIST:
-		return nr < 1;
-	case PRIM3D_LINELIST:
-		return (nr & 1) || nr == 0;
-	case PRIM3D_LINESTRIP:
-		return nr < 2;
-	case PRIM3D_TRILIST:
-	case PRIM3D_RECTLIST:
-		return nr % 3 || nr == 0;
-	case PRIM3D_POLY:
-	case PRIM3D_TRIFAN:
-	case PRIM3D_TRISTRIP:
-	case PRIM3D_TRISTRIP_RVRSE:
-		return nr < 3;
-	default:
-		return 1;
-	}	
-}
-
-#if 0
-
-/* Verify and emit a stream of 3DPRIMITIVE instructions generated
- * by the client.
- *
- * This will handle multiple indirect, indexed and inline primitives.
- * Somewhat overkill until a way of providing the driver with more
- * than 4k of vertex memory is provided.
- */
-static int parse_and_emit_primitives( drm_i830_private_t *dev_priv,
-				      u32 *cmd, 
-				      int cmdsz,
-				      int vertsize )
-{
-	RING_LOCALS;
-	
-	while (cmdsz) {
-		u32 sz = 1, tmp, prim, vcount;
-
-		if (DRM_GET_USER_UNCHECKED(tmp, &cmd[0]))
-			return DRM_ERR(EFAULT);
-
-		if ((tmp & 0xff000000) != GFX_OP_PRIMITIVE)
-			return DRM_ERR(EINVAL);
-		
-
-		if (tmp & VERTEX_INDIRECT) {
-			vcount = tmp & 0xffff;
-			if (tmp & VERTEX_RANDOM)
-				sz += (vcount+1)/2;
-		}
-		else {
-			sz += tmp & 0x3ffff;
-			vcount = sz / vertsize;
-			if (sz != vcount * vertsize)
-				return DRM_ERR(EINVAL);
-		}
-			
-		prim = (tmp >> 18) & 0x1f;
-
-		if (bad_prim_vertex_nr(prim, vcount))
-			return DRM_ERR(EINVAL);
-
-		if (sz > cmdsz)
-			return DRM_ERR(EFAULT);
-
-		
-		BEGIN_LP_RING( ((sz+2)&~1) );
-		OUT_RING( 0 );	/* A compulsory noop */
-		
-		for (i = 0 ; i < sz ; i++) {
-			if (DRM_GET_USER_UNCHECKED(tmp, &cmd[i]))
-				return DRM_ERR(EFAULT);
-			OUT_RING(tmp);
-		}
-
-		if (sz & 1)
-			OUT_RING(0);
-	
-		ADVANCE_LP_RING();
-
-		cmd += sz;
-		cmdsz -= sz;
-	}		
-}
-#endif
-
-
-
-/* Dispatch one or more 3DPRIMITIVE instructions supplied by the user.
- * Would work better if we had a better method for allocating agp
- * memory to clients.
- */
-static int i830_dma_dispatch_vertex2(drm_device_t *dev, 
-				     drm_buf_t *buf,
-				     int discard,
-				     int used)
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_buf_priv_t *buf_priv = buf->dev_private;
-   	drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
-   	drm_clip_rect_t *box = sarea_priv->boxes;
-   	int nbox = sarea_priv->nbox;
-	unsigned long address = (unsigned long)buf->bus_address;
-	unsigned long start = address - dev->agp->base;     
-	int i = 0, u, vertsize, vertcount;
-   	RING_LOCALS;
-
-	
-	/* dev->agp->base seems to be bogus, but the hardware copes
-	 * probably by ignoring the high bits of 'start' 
-	 */
-
-  	DRM_DEBUG("dispatch vertex addr 0x%lx/0x%lx, dev->agp->base %x used 0x%x nbox %d\n", 
-		  address,start, 
-	       dev->agp->base,
-	       used, nbox);
-
-   	i830_kernel_lost_context(dev);
-
-   	if (nbox > I830_NR_SAREA_CLIPRECTS || (start & 0x3)) {
-		DRM_ERROR("bad args %d\n", used);
-		goto do_discard;
-	}
-
-	if (sarea_priv->dirty)
-		i830EmitState( dev );
-
-	used -= 4;
-	start += 4;
-
-	if (used < 0) goto do_discard;
-
-	/* Calculate vertex size:  (Necessary because original ioctl didn't
-	 * provide this information).
-	 */ 
-	vertsize = i830_calc_vertex_size( sarea_priv );
-	vertcount = used / (vertsize * 4);
-
-	if (vertcount * vertsize * 4 != used) {
-		DRM_ERROR("vertex size confusion %d %d %d\n", used, vertsize,
-			  vertcount);
-		goto do_discard;
-	}
-
-	if (bad_prim_vertex_nr( sarea_priv->vertex_prim, vertcount )) {
-		DRM_ERROR("bad_prim_vertex_nr %x %d\n", sarea_priv->vertex_prim,
-			  vertcount);
-		goto do_discard;
-	}
-
-	DRM_DEBUG("VB start: %x vertcount: %d prim: %x\n", start, vertcount,
-	       sarea_priv->vertex_prim);
-	
-	/* Emit VERTEX_BUFFER description:
-	 */
-#if 1
- 	BEGIN_LP_RING(2); 
- 	OUT_RING( STATE3D_LOAD_STATE_IMMEDIATE_1 | (1<<4)  ); 
- 	OUT_RING( (start<<5)  | 1 ); 
- 	ADVANCE_LP_RING(); 
-#else
-	/* 845 ONLY, and subject to some lockups: */
-	BEGIN_LP_RING(2);
-	OUT_RING( MI_VERTEX_BUFFER );
-	OUT_RING( start );
-	ADVANCE_LP_RING();
-#endif
-
-
-	/* Emit 3D_PRIMITIVE and cliprect commands:
-	 */
-	do {
-		if (i < nbox) {
-			BEGIN_LP_RING(6);
-			OUT_RING( GFX_OP_DRAWRECT_INFO );
-			OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] );
-			OUT_RING( box[i].x1 | (box[i].y1<<16) );
-			OUT_RING( box[i].x2 | (box[i].y2<<16) );
-			OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] );
-			OUT_RING( 0 );
-			ADVANCE_LP_RING();
-		}
-
-#if 0
-		while (ringmask+1-dev_priv->ring.tail < 16*128) {
-			int j;
-			BEGIN_LP_RING(16);
-			for (j = 0 ; j < 16 ; j++)
-				OUT_RING(0);
-			ADVANCE_LP_RING();
-		}
-		
-		DRM_DEBUG("Prim %x count %d start %x fromend: %d\n", 
-		       sarea_priv->vertex_prim, vertcount, 
-		       start, ringmask+1-dev_priv->ring.tail);
-	
-#endif
-
-		BEGIN_LP_RING(4);
-		OUT_RING( 0 );	
-		OUT_RING( 0 );	
-		OUT_RING( GFX_OP_PRIMITIVE | 
-			  PRIM_INDIRECT |
-			  PRIM_INDIRECT_SEQUENTIAL |
-			  sarea_priv->vertex_prim |
-			  vertcount );
-		OUT_RING( 0 );	/* start vertex */
-		ADVANCE_LP_RING();
-	
-	} while (++i < nbox);
-
- do_discard:
-	sarea_priv->last_enqueue = dev_priv->counter++;
-
-	if (discard) {
-		(void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
-			       I830_BUF_HARDWARE);
-
-		BEGIN_LP_RING(8);
-		OUT_RING( CMD_STORE_DWORD_IDX );
-		OUT_RING( 20 );
-		OUT_RING( dev_priv->counter );
-		OUT_RING( CMD_STORE_DWORD_IDX );
-		OUT_RING( buf_priv->my_use_idx );
-		OUT_RING( I830_BUF_FREE );
-		OUT_RING( CMD_REPORT_HEAD );
-		OUT_RING( 0 );
-		ADVANCE_LP_RING();
-	}
-
-	if (0)
-		i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
-
-	return 0;
-}
-
-
-void i830_dma_quiescent(drm_device_t *dev)
-{
-   	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_device_dma_t *dma = dev->dma;
-   	int i;
-   	RING_LOCALS;
-
-  	i830_kernel_lost_context(dev);
-
-   	BEGIN_LP_RING(4);
-    	OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 
-     	OUT_RING( CMD_REPORT_HEAD );  
-       	OUT_RING( 0 ); 
-      	OUT_RING( 0 );
-   	ADVANCE_LP_RING();
-
-	i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
-
-   	for (i = 0; i < dma->buf_count; i++) {
-	   	drm_buf_t *buf = dma->buflist[ i ];
-	   	drm_i830_buf_priv_t *buf_priv = buf->dev_private;	   
-		cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE, I830_BUF_FREE);
-	}
-}
-
-/* Must be called with the lock held */
-void i830_reclaim_buffers( struct file *filp )
-{
-	drm_file_t    *priv   = filp->private_data;
-	drm_device_t  *dev    = priv->dev;
-	drm_device_dma_t *dma = dev->dma;
-	int		 i;
-
-	if (!dma) return;
-      	if (!dev->dev_private) return;
-	if (!dma->buflist) return;
-
-        i830_dma_quiescent(dev);
-
-	for (i = 0; i < dma->buf_count; i++) {
-	   	drm_buf_t *buf = dma->buflist[ i ];
-	   	drm_i830_buf_priv_t *buf_priv = buf->dev_private;
-	   
-		if (buf->filp == filp && buf_priv) {
-			int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 
-					   I830_BUF_FREE);
-
-			if (used == I830_BUF_CLIENT)
-				DRM_DEBUG("reclaimed from client\n");
-		   	if(buf_priv->currently_mapped == I830_BUF_MAPPED)
-		     		buf_priv->currently_mapped = I830_BUF_UNMAPPED;
-		}
-	}
-}
-
-int i830_flush_ioctl( DRM_IOCTL_ARGS )
-{
-   	drm_file_t	  *priv	  = filp->private_data;
-   	drm_device_t	  *dev	  = priv->dev;
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_flush_ioctl called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-   	i830_dma_quiescent(dev);
-   	return 0;
-}
-
-int i830_dma_vertex2( DRM_IOCTL_ARGS )
-{
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
-	drm_device_dma_t *dma = dev->dma;
-   	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
-      	u32 *hw_status = dev_priv->hw_status_page;
-   	drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 
-     					dev_priv->sarea_priv; 
-	drm_i830_vertex_t vertex;
-
-	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_i830_vertex_t *)data, 
-				  sizeof(vertex) );
-
-	DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
-		  vertex.idx, vertex.used, vertex.discard);
-
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_dma_vertex called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-
-	if(vertex.idx < 0 || vertex.idx > dma->buf_count) 
-		return DRM_ERR(EINVAL);
-
-	i830_dma_dispatch_vertex2( dev, 
-				   dma->buflist[ vertex.idx ], 
-				   vertex.discard, vertex.used );
-
-   	sarea_priv->last_dispatch = (int) hw_status[5];
-   
-	return 0;
-}
-
-int i830_dma_copy_blit( DRM_IOCTL_ARGS )
-{
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
-   	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
-	drm_i830_copy_blit_t blit;
-
-	DRM_COPY_FROM_USER_IOCTL( blit, (drm_i830_copy_blit_t *)data, 
-				  sizeof(blit) );
-
-	DRM_DEBUG("i830 copy blit\n");
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_dma_copy_blit called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	i830_dma_dispatch_blit( dev, &blit ); 
-	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
-
-	return 0;
-}
-
-int i830_clear_bufs( DRM_IOCTL_ARGS )
-{
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_clear_t clear;
-
-   	DRM_COPY_FROM_USER_IOCTL( clear, (drm_i830_clear_t *)data, 
-				  sizeof(clear));
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_clear_bufs called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	/* GH: Someone's doing nasty things... */
-	if (!dev->dev_private) {
-		return DRM_ERR(EINVAL);
-	}
-
-	i830_dma_dispatch_clear( dev, clear.flags, 
-				 clear.clear_color, 
-				 clear.clear_depth,
-			         clear.clear_depthmask);
-	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
-
-   	return 0;
-}
-
-int i830_swap_bufs( DRM_IOCTL_ARGS )
-{
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-   
-	DRM_DEBUG("i830_swap_bufs\n");
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_swap_buf called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	i830_dma_dispatch_swap( dev );
-	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
-
-   	return 0;
-}
-
-
-
-/* Not sure why this isn't set all the time:
- */ 
-static void i830_do_init_pageflip( drm_device_t *dev )
-{
-	drm_i830_private_t *dev_priv = dev->dev_private;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
-	dev_priv->page_flipping = 1;
-	dev_priv->current_page = 0;
-	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
-}
-
-int i830_do_cleanup_pageflip( drm_device_t *dev )
-{
-	drm_i830_private_t *dev_priv = dev->dev_private;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
-	if (dev_priv->current_page != 0)
-		i830_dma_dispatch_flip( dev );
-
-	dev_priv->page_flipping = 0;
-	return 0;
-}
-
-int i830_flip_bufs( DRM_IOCTL_ARGS )
-{
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_flip_buf called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	if (!dev_priv->page_flipping) 
-		i830_do_init_pageflip( dev );
-
-	i830_dma_dispatch_flip( dev );
-	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
-   	return 0;
-}
-
-int i830_getage( DRM_IOCTL_ARGS )
-{
-   	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-   	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
-      	u32 *hw_status = dev_priv->hw_status_page;
-   	drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 
-     					dev_priv->sarea_priv; 
-
-      	sarea_priv->last_dispatch = (int) hw_status[5];
-	return 0;
-}
-
-
-int i830_getbuf2( DRM_IOCTL_ARGS )
-{
-	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-	int		  retcode   = 0;
-	drm_i830_dma_t	  d;
-   	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
-   	u32 *hw_status = dev_priv->hw_status_page;
-   	drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 
-     					dev_priv->sarea_priv; 
-
-	DRM_DEBUG("getbuf\n");
-   	DRM_COPY_FROM_USER_IOCTL( d, (drm_i830_dma_t *)data, sizeof(d));
-   
-	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_dma called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-	
-	d.granted = 0;
-
-	retcode = i830_dma_get_buffer2(dev, &d, filp);
-
-	DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
-		  current->pid, retcode, d.granted);
-
-	if (DRM_COPY_TO_USER((drm_dma_t *)data, &d, sizeof(d)))
-		return DRM_ERR(EFAULT);
-
-   	sarea_priv->last_dispatch = (int) hw_status[5];
-
-	return retcode;
-}
-
-int i830_copybuf( DRM_IOCTL_ARGS )
-{
-	/* Never copy - 2.4.x doesn't need it */
-	return 0;
-}
-
-int i830_docopy( DRM_IOCTL_ARGS )
-{
-	return 0;
-}
-
-
-
-int i830_getparam( DRM_IOCTL_ARGS )
-{
-	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_getparam_t param;
-	int value;
-
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
-		return DRM_ERR(EINVAL);
-	}
-
-	DRM_COPY_FROM_USER_IOCTL(param, (drm_i830_getparam_t *)data, 
-				 sizeof(param));
-
-	switch( param.param ) {
-	case I830_PARAM_IRQ_ACTIVE:
-		value = dev->irq ? 1 : 0;
-		break;
-	default:
-		return DRM_ERR(EINVAL);
-	}
-
-	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
-		return DRM_ERR(EFAULT);
-	}
-	
-	return 0;
-}
-
-
-int i830_setparam( DRM_IOCTL_ARGS )
-{
-	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_setparam_t param;
-
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
-		return DRM_ERR(EINVAL);
-	}
-
-	DRM_COPY_FROM_USER_IOCTL( param, (drm_i830_setparam_t *)data, 
-				  sizeof(param) );
-
-	switch( param.param ) {
-	case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
-		dev_priv->use_mi_batchbuffer_start = param.value;
-		break;
-	case I830_SETPARAM_PERF_BOXES:
-		dev_priv->do_boxes = param.value;
-		break;
-	case I830_SETPARAM_TEX_LRU_LOG_GRANULARITY:
-		dev_priv->tex_lru_log_granularity = param.value;
-		break;
-	default:
-		DRM_ERROR("unknown parameter %d\n", param.param);
-		return DRM_ERR(EINVAL);
-	}
-
-
-	return 0;
-}
diff --git a/linux/i830_drm.h b/linux/i830_drm.h
deleted file mode 100644
index 18f8e43a..00000000
--- a/linux/i830_drm.h
+++ /dev/null
@@ -1,379 +0,0 @@
-#ifndef _I830_DRM_H_
-#define _I830_DRM_H_
-
-/* WARNING: These defines must be the same as what the Xserver uses.
- * if you change them, you must change the defines in the Xserver.
- *
- * KW: Actually, you can't ever change them because doing so would
- * break backwards compatibility.
- */
-
-#ifndef _I830_DEFINES_
-#define _I830_DEFINES_
-
-#define I830_DMA_BUF_ORDER		12
-#define I830_DMA_BUF_SZ 		(1<<I830_DMA_BUF_ORDER)
-#define I830_DMA_BUF_NR 		256
-#define I830_NR_SAREA_CLIPRECTS 	8
-
-/* Each region is a minimum of 64k, and there are at most 64 of them.
- */
-#define I830_NR_TEX_REGIONS 64
-#define I830_LOG_MIN_TEX_REGION_SIZE 16
-
-/* KW: These aren't correct but someone set them to two and then
- * released the module.  Now we can't change them as doing so would
- * break backwards compatibility.
- */
-#define I830_TEXTURE_COUNT	2
-#define I830_TEXBLEND_COUNT	I830_TEXTURE_COUNT
-
-#define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */
-
-#define I830_UPLOAD_CTX			0x1
-#define I830_UPLOAD_BUFFERS		0x2
-#define I830_UPLOAD_CLIPRECTS		0x4
-#define I830_UPLOAD_TEX0_IMAGE		0x100 /* handled clientside */
-#define I830_UPLOAD_TEX0_CUBE		0x200 /* handled clientside */
-#define I830_UPLOAD_TEX1_IMAGE		0x400 /* handled clientside */
-#define I830_UPLOAD_TEX1_CUBE		0x800 /* handled clientside */
-#define I830_UPLOAD_TEX2_IMAGE		0x1000 /* handled clientside */
-#define I830_UPLOAD_TEX2_CUBE		0x2000 /* handled clientside */
-#define I830_UPLOAD_TEX3_IMAGE		0x4000 /* handled clientside */
-#define I830_UPLOAD_TEX3_CUBE		0x8000 /* handled clientside */
-#define I830_UPLOAD_TEX_N_IMAGE(n)	(0x100 << (n * 2))
-#define I830_UPLOAD_TEX_N_CUBE(n)	(0x200 << (n * 2))
-#define I830_UPLOAD_TEXIMAGE_MASK	0xff00
-#define I830_UPLOAD_TEX0			0x10000
-#define I830_UPLOAD_TEX1			0x20000
-#define I830_UPLOAD_TEX2			0x40000
-#define I830_UPLOAD_TEX3			0x80000
-#define I830_UPLOAD_TEX_N(n)		(0x10000 << (n))
-#define I830_UPLOAD_TEX_MASK		0xf0000
-#define I830_UPLOAD_TEXBLEND0		0x100000
-#define I830_UPLOAD_TEXBLEND1		0x200000
-#define I830_UPLOAD_TEXBLEND2		0x400000
-#define I830_UPLOAD_TEXBLEND3		0x800000
-#define I830_UPLOAD_TEXBLEND_N(n)	(0x100000 << (n))
-#define I830_UPLOAD_TEXBLEND_MASK	0xf00000
-#define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
-#define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
-#define I830_UPLOAD_STIPPLE         	0x8000000
-
-/* Indices into buf.Setup where various bits of state are mirrored per
- * context and per buffer.  These can be fired at the card as a unit,
- * or in a piecewise fashion as required.
- */
-
-/* Destbuffer state 
- *    - backbuffer linear offset and pitch -- invarient in the current dri
- *    - zbuffer linear offset and pitch -- also invarient
- *    - drawing origin in back and depth buffers.
- *
- * Keep the depth/back buffer state here to accommodate private buffers
- * in the future.
- */
-
-#define I830_DESTREG_CBUFADDR 0
-#define I830_DESTREG_DBUFADDR 1
-#define I830_DESTREG_DV0 2
-#define I830_DESTREG_DV1 3
-#define I830_DESTREG_SENABLE 4
-#define I830_DESTREG_SR0 5
-#define I830_DESTREG_SR1 6
-#define I830_DESTREG_SR2 7
-#define I830_DESTREG_DR0 8
-#define I830_DESTREG_DR1 9
-#define I830_DESTREG_DR2 10
-#define I830_DESTREG_DR3 11
-#define I830_DESTREG_DR4 12
-#define I830_DEST_SETUP_SIZE 13
-
-/* Context state
- */
-#define I830_CTXREG_STATE1		0
-#define I830_CTXREG_STATE2		1
-#define I830_CTXREG_STATE3		2
-#define I830_CTXREG_STATE4		3
-#define I830_CTXREG_STATE5		4
-#define I830_CTXREG_IALPHAB		5
-#define I830_CTXREG_STENCILTST		6
-#define I830_CTXREG_ENABLES_1		7
-#define I830_CTXREG_ENABLES_2		8
-#define I830_CTXREG_AA			9
-#define I830_CTXREG_FOGCOLOR		10
-#define I830_CTXREG_BLENDCOLR0		11
-#define I830_CTXREG_BLENDCOLR		12 /* Dword 1 of 2 dword command */
-#define I830_CTXREG_VF			13
-#define I830_CTXREG_VF2			14
-#define I830_CTXREG_MCSB0		15
-#define I830_CTXREG_MCSB1		16
-#define I830_CTX_SETUP_SIZE		17
-
-/* 1.3: Stipple state
- */ 
-#define I830_STPREG_ST0 0
-#define I830_STPREG_ST1 1
-#define I830_STP_SETUP_SIZE 2
-
-
-/* Texture state (per tex unit)
- */
-
-#define I830_TEXREG_MI0	0	/* GFX_OP_MAP_INFO (6 dwords) */
-#define I830_TEXREG_MI1	1
-#define I830_TEXREG_MI2	2
-#define I830_TEXREG_MI3	3
-#define I830_TEXREG_MI4	4
-#define I830_TEXREG_MI5	5
-#define I830_TEXREG_MF	6	/* GFX_OP_MAP_FILTER */
-#define I830_TEXREG_MLC	7	/* GFX_OP_MAP_LOD_CTL */
-#define I830_TEXREG_MLL	8	/* GFX_OP_MAP_LOD_LIMITS */
-#define I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS */
-#define I830_TEX_SETUP_SIZE 10
-
-#define I830_TEXREG_TM0LI      0 /* load immediate 2 texture map n */
-#define I830_TEXREG_TM0S0      1
-#define I830_TEXREG_TM0S1      2
-#define I830_TEXREG_TM0S2      3
-#define I830_TEXREG_TM0S3      4
-#define I830_TEXREG_TM0S4      5
-#define I830_TEXREG_NOP0       6       /* noop */
-#define I830_TEXREG_NOP1       7       /* noop */
-#define I830_TEXREG_NOP2       8       /* noop */
-#define __I830_TEXREG_MCS      9       /* GFX_OP_MAP_COORD_SETS -- shared */
-#define __I830_TEX_SETUP_SIZE   10
-
-#define I830_FRONT   0x1
-#define I830_BACK    0x2
-#define I830_DEPTH   0x4
-
-#endif /* _I830_DEFINES_ */
-
-typedef struct _drm_i830_init {
-	enum {
-		I830_INIT_DMA = 0x01,
-		I830_CLEANUP_DMA = 0x02
-	} func;
-	unsigned int mmio_offset;
-	unsigned int buffers_offset;
-	int sarea_priv_offset;
-	unsigned int ring_start;
-	unsigned int ring_end;
-	unsigned int ring_size;
-	unsigned int front_offset;
-	unsigned int back_offset;
-	unsigned int depth_offset;
-	unsigned int w;
-	unsigned int h;
-	unsigned int pitch;
-	unsigned int pitch_bits;
-	unsigned int back_pitch;
-	unsigned int depth_pitch;
-	unsigned int cpp;
-} drm_i830_init_t;
-
-/* Warning: If you change the SAREA structure you must change the Xserver
- * structure as well */
-
-typedef struct _drm_i830_tex_region {
-	unsigned char next, prev; /* indices to form a circular LRU  */
-	unsigned char in_use;	/* owned by a client, or free? */
-	int age;		/* tracked by clients to update local LRU's */
-} drm_i830_tex_region_t;
-
-typedef struct _drm_i830_sarea {
-	unsigned int ContextState[I830_CTX_SETUP_SIZE];
-   	unsigned int BufferState[I830_DEST_SETUP_SIZE];
-	unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE];
-	unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
-	unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT];
-	unsigned int Palette[2][256];
-   	unsigned int dirty;
-
-	unsigned int nbox;
-	drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS];
-
-	/* Maintain an LRU of contiguous regions of texture space.  If
-	 * you think you own a region of texture memory, and it has an
-	 * age different to the one you set, then you are mistaken and
-	 * it has been stolen by another client.  If global texAge
-	 * hasn't changed, there is no need to walk the list.
-	 *
-	 * These regions can be used as a proxy for the fine-grained
-	 * texture information of other clients - by maintaining them
-	 * in the same lru which is used to age their own textures,
-	 * clients have an approximate lru for the whole of global
-	 * texture space, and can make informed decisions as to which
-	 * areas to kick out.  There is no need to choose whether to
-	 * kick out your own texture or someone else's - simply eject
-	 * them all in LRU order.  
-	 */
-
-	drm_i830_tex_region_t texList[I830_NR_TEX_REGIONS+1]; 
-				/* Last elt is sentinal */
-        int texAge;		/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
-	int last_dispatch;	/* age of the most recently dispatched buffer */
-	int last_quiescent;     /*  */
-	int ctxOwner;		/* last context to upload state */
-
-	int vertex_prim;
-
-        int pf_enabled;               /* is pageflipping allowed? */
-        int pf_active;               
-        int pf_current_page;	    /* which buffer is being displayed? */
-
-        int perf_boxes;             /* performance boxes to be displayed */
-   
-        /* Here's the state for texunits 2,3:
-	 */
-	unsigned int TexState2[I830_TEX_SETUP_SIZE];
-	unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
-	unsigned int TexBlendStateWordsUsed2;
-
-	unsigned int TexState3[I830_TEX_SETUP_SIZE];
-	unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
-	unsigned int TexBlendStateWordsUsed3;
-
-	unsigned int StippleState[I830_STP_SETUP_SIZE];
-} drm_i830_sarea_t;
-
-/* Flags for perf_boxes
- */
-#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
-#define I830_BOX_FLIP          0x2 /* populated by kernel */
-#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
-
-
-/* I830 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
-#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
-#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
-#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
-#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
-#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
-#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
-#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
-#define DRM_IOCTL_I830_FLIP		DRM_IO ( 0x49)
-#define DRM_IOCTL_I830_IRQ_EMIT         DRM_IOWR(0x4a, drm_i830_irq_emit_t)
-#define DRM_IOCTL_I830_IRQ_WAIT         DRM_IOW( 0x4b, drm_i830_irq_wait_t)
-#define DRM_IOCTL_I830_GETPARAM         DRM_IOWR(0x4c, drm_i830_getparam_t)
-#define DRM_IOCTL_I830_SETPARAM         DRM_IOW( 0x4d, drm_i830_setparam_t)
-#define DRM_IOCTL_I830_GETBUF2		DRM_IOWR(0x4e, drm_i830_dma_t)
-#define DRM_IOCTL_I830_VERTEX2		DRM_IOW( 0x4f, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_ALLOC            DRM_IOWR(0x50, drm_i830_mem_alloc_t)
-#define DRM_IOCTL_I830_FREE             DRM_IOW( 0x51, drm_i830_mem_free_t)
-#define DRM_IOCTL_I830_INIT_HEAP        DRM_IOW( 0x52, drm_i830_mem_init_heap_t)
-#define DRM_IOCTL_I830_COPY_BLIT        DRM_IOW( 0x53, drm_i830_copy_blit_t)
-
-typedef struct _drm_i830_clear {
-	int clear_color;
-	int clear_depth;
-	int flags;
-	unsigned int clear_colormask;
-	unsigned int clear_depthmask;
-} drm_i830_clear_t;
-
-
-
-/* These may be placeholders if we have more cliprects than
- * I830_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
- * false, indicating that the buffer will be dispatched again with a
- * new set of cliprects.
- */
-typedef struct _drm_i830_vertex {
-   	int idx;		/* buffer index */
-	int used;		/* nr bytes in use */
-	int discard;		/* client is finished with the buffer? */
-} drm_i830_vertex_t;
-
-typedef struct _drm_i830_copy_t {
-   	int idx;		/* buffer index */
-	int used;		/* nr bytes in use */
-	void *address;		/* Address to copy from */
-} drm_i830_copy_t;
-
-typedef struct drm_i830_dma {
-	void *virtual;
-	int request_idx;
-	int request_size;
-	int granted;
-} drm_i830_dma_t;
-
-
-/* 1.3: Userspace can request & wait on irq's:
- */
-typedef struct drm_i830_irq_emit {
-	int *irq_seq;
-} drm_i830_irq_emit_t;
-
-typedef struct drm_i830_irq_wait {
-	int irq_seq;
-} drm_i830_irq_wait_t;
-
-
-/* 1.3: New ioctl to query kernel params:
- */
-#define I830_PARAM_IRQ_ACTIVE            1
-
-typedef struct drm_i830_getparam {
-	int param;
-	int *value;
-} drm_i830_getparam_t;
-
-
-/* 1.3: New ioctl to set kernel params:
- */
-#define I830_SETPARAM_USE_MI_BATCHBUFFER_START            1
-#define I830_SETPARAM_PERF_BOXES                          2
-#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY             3
-
-typedef struct drm_i830_setparam {
-	int param;
-	int value;
-} drm_i830_setparam_t;
-
-/* 1.4: Set up a memory manager for regions of shared memory:
- */
-#define I830_MEM_REGION_AGP 1
-
-typedef struct drm_i830_mem_alloc {
-	int region;
-	int alignment;
-	int size;
-	int *region_offset;	/* offset from start of fb or agp */
-} drm_i830_mem_alloc_t;
-
-typedef struct drm_i830_mem_free {
-	int region;
-	int region_offset;
-} drm_i830_mem_free_t;
-
-typedef struct drm_i830_mem_init_heap {
-	int region;
-	int size;
-	int start;	
-} drm_i830_mem_init_heap_t;
-
-
-/* 1.4: Generalized copyblit:
- */
-typedef struct drm_i830_copy_blit {
-	int cpp;
-	int src_offset;
-	int dst_offset;
-	short src_pitch;
-	short dst_pitch;
-	short src_x, src_y;
-	short dst_x, dst_y;
-	short w, h;
-} drm_i830_copy_blit_t;
-
-
-#endif /* _I830_DRM_H_ */
diff --git a/linux/i830_drv.c b/linux/i830_drv.c
deleted file mode 100644
index 0735c94d..00000000
--- a/linux/i830_drv.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* i830_drv.c -- I810 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Rickard E. (Rik) Faith <faith@valinux.com>
- *    Jeff Hartmann <jhartmann@valinux.com>
- *    Gareth Hughes <gareth@valinux.com>
- *    Abraham vd Merwe <abraham@2d3d.co.za>
- *    Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#include <linux/config.h>
-#include "i830.h"
-#include "drmP.h"
-#include "drm.h"
-#include "i830_drm.h"
-#include "i830_drv.h"
-
-#include "drm_agpsupport.h"
-#include "drm_auth.h"
-#include "drm_bufs.h"
-#include "drm_context.h"
-#include "drm_dma.h"
-#include "drm_drawable.h"
-#include "drm_drv.h"
-
-#include "drm_fops.h"
-#include "drm_init.h"
-#include "drm_ioctl.h"
-#include "drm_lock.h"
-#include "drm_memory.h"
-#include "drm_proc.h"
-#include "drm_vm.h"
-#include "drm_stub.h"
diff --git a/linux/i830_drv.h b/linux/i830_drv.h
deleted file mode 100644
index d1e036c3..00000000
--- a/linux/i830_drv.h
+++ /dev/null
@@ -1,327 +0,0 @@
-/* i830_drv.h -- Private header for the I830 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * 	    Jeff Hartmann <jhartmann@valinux.com>
- *
- */
-
-#ifndef _I830_DRV_H_
-#define _I830_DRV_H_
-
-typedef struct drm_i830_buf_priv {
-   	u32 *in_use;
-   	int my_use_idx;
-	int currently_mapped;
-	void *virtual;
-	void *kernel_virtual;
-} drm_i830_buf_priv_t;
-
-typedef struct _drm_i830_ring_buffer{
-	int tail_mask;
-	unsigned long Start;
-	unsigned long End;
-	unsigned long Size;
-	u8 *virtual_start;
-	int head;
-	int tail;
-	int space;
-} drm_i830_ring_buffer_t;
-
-struct mem_block {
-	struct mem_block *next;
-	struct mem_block *prev;
-	int start;
-	int size;
-	DRMFILE filp;		/* 0: free, -1: heap, other: real files */
-};
-
-typedef struct drm_i830_private {
-	drm_map_t *sarea_map;
-	drm_map_t *buffer_map;
-	drm_map_t *mmio_map;
-
-	drm_i830_sarea_t *sarea_priv;
-   	drm_i830_ring_buffer_t ring;
-
-      	void * hw_status_page;
-   	unsigned long counter;
-
-	dma_addr_t dma_status_page;
-
-	drm_buf_t *mmap_buffer;
-	
-	u32 front_di1, back_di1, zi1;
-	
-	int back_offset;
-	int depth_offset;
-	int front_offset;
-	int w, h;
-	int pitch;
-	int back_pitch;
-	int depth_pitch;
-	unsigned int cpp;
-
-	int do_boxes;
-	int dma_used;
-
-	int current_page;
-	int page_flipping;
-
-	wait_queue_head_t irq_queue;
-   	atomic_t irq_received;
-   	atomic_t irq_emitted;
-
-	int use_mi_batchbuffer_start;
-	int tex_lru_log_granularity;
-
-	struct mem_block *agp_heap;
-
-} drm_i830_private_t;
-
-				/* i830_dma.c */
-extern int  i830_dma_schedule(drm_device_t *dev, int locked);
-extern int  i830_dma_cleanup(drm_device_t *dev);
-extern void i830_dma_quiescent(drm_device_t *dev);
-extern void i830_reclaim_buffers( DRMFILE filp);
-
-extern int i830_getbuf( DRM_IOCTL_ARGS );
-extern int i830_getbuf2( DRM_IOCTL_ARGS );
-extern int i830_dma_init( DRM_IOCTL_ARGS );
-extern int i830_flush_ioctl( DRM_IOCTL_ARGS );
-extern int i830_getage( DRM_IOCTL_ARGS );
-extern int i830_copybuf( DRM_IOCTL_ARGS );
-extern int i830_docopy( DRM_IOCTL_ARGS );
-extern int i830_dma_vertex( DRM_IOCTL_ARGS );
-extern int i830_dma_vertex2( DRM_IOCTL_ARGS );
-extern int i830_swap_bufs( DRM_IOCTL_ARGS );
-extern int i830_clear_bufs( DRM_IOCTL_ARGS );
-extern int i830_flip_bufs( DRM_IOCTL_ARGS );
-extern int i830_getparam(  DRM_IOCTL_ARGS );
-extern int i830_setparam(  DRM_IOCTL_ARGS );
-extern int i830_dma_copy_blit( DRM_IOCTL_ARGS );
-
-/* i830_irq.c */
-extern int i830_irq_emit(  DRM_IOCTL_ARGS );
-extern int i830_irq_wait(  DRM_IOCTL_ARGS );
-extern int i830_wait_irq(drm_device_t *dev, int irq_nr);
-extern int i830_emit_irq(drm_device_t *dev);
-
-
-/* i830_mem.c */
-extern int i830_mem_alloc( DRM_IOCTL_ARGS );
-extern int i830_mem_free( DRM_IOCTL_ARGS );
-extern int i830_mem_init_heap( DRM_IOCTL_ARGS );
-extern void i830_mem_takedown( struct mem_block **heap );
-extern void i830_mem_release( drm_device_t *dev, 
-			      DRMFILE filp, struct mem_block *heap );
-
-#define I830_BASE(reg)		((unsigned long) dev_priv->mmio_map->handle)
-#define I830_ADDR(reg)		(I830_BASE(reg) + reg)
-#define I830_DEREF(reg)		*(__volatile__ unsigned int *)I830_ADDR(reg)
-#define I830_READ(reg)		readl((volatile u32 *)I830_ADDR(reg))
-#define I830_WRITE(reg,val) 	writel(val, (volatile u32 *)I830_ADDR(reg))
-#define I830_DEREF16(reg)	*(__volatile__ u16 *)I830_ADDR(reg)
-#define I830_READ16(reg) 	I830_DEREF16(reg)
-#define I830_WRITE16(reg,val)	do { I830_DEREF16(reg) = val; } while (0)
-
-
-
-#define I830_VERBOSE 0
-
-#define RING_LOCALS	unsigned int outring, ringmask, outcount; \
-                        volatile char *virt;
-
-#define BEGIN_LP_RING(n) do {				\
-	if (I830_VERBOSE)				\
-		DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n",	\
-			  n, __FUNCTION__);		\
-	if (dev_priv->ring.space < n*4)			\
-		i830_wait_ring(dev, n*4, __FUNCTION__);		\
-	outcount = 0;					\
-	outring = dev_priv->ring.tail;			\
-	ringmask = dev_priv->ring.tail_mask;		\
-	virt = dev_priv->ring.virtual_start;		\
-} while (0)
-
-
-#define OUT_RING(n) do {					\
-	if (I830_VERBOSE) DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
-	*(volatile unsigned int *)(virt + outring) = n;		\
-        outcount++;						\
-	outring += 4;						\
-	outring &= ringmask;					\
-} while (0)
-
-#define ADVANCE_LP_RING() do {						\
-	if (I830_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring);	\
-	dev_priv->ring.tail = outring;					\
-	dev_priv->ring.space -= outcount * 4;				\
-	I830_WRITE(LP_RING + RING_TAIL, outring);			\
-} while(0)
-
-extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller);
-
-
-#define GFX_OP_USER_INTERRUPT 		((0<<29)|(2<<23))
-#define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
-#define CMD_REPORT_HEAD			(7<<23)
-#define CMD_STORE_DWORD_IDX		((0x21<<23) | 0x1)
-#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
-
-#define STATE3D_LOAD_STATE_IMMEDIATE_2      ((0x3<<29)|(0x1d<<24)|(0x03<<16))
-#define LOAD_TEXTURE_MAP0                   (1<<11)
-
-#define STATE3D_LOAD_STATE_IMMEDIATE_1      ((0x3<<29)|(0x1d<<24)|(0x04<<16))
-#define LOAD_VB0                            (1<<4)
-
-#define INST_PARSER_CLIENT   0x00000000
-#define INST_OP_FLUSH        0x02000000
-#define INST_FLUSH_MAP_CACHE 0x00000001
-
-
-#define BB1_START_ADDR_MASK   (~0x7)
-#define BB1_PROTECTED         (1<<0)
-#define BB1_UNPROTECTED       (0<<0)
-#define BB2_END_ADDR_MASK     (~0x7)
-
-#define I830REG_HWSTAM		0x02098
-#define I830REG_INT_IDENTITY_R	0x020a4
-#define I830REG_INT_MASK_R 	0x020a8
-#define I830REG_INT_ENABLE_R	0x020a0
-
-
-#define NOPID                   0x2094
-#define LP_RING     		0x2030
-#define HP_RING     		0x2040
-#define RING_TAIL      		0x00
-#define TAIL_ADDR		0x001FFFF8
-#define RING_HEAD      		0x04
-#define HEAD_WRAP_COUNT     	0xFFE00000
-#define HEAD_WRAP_ONE       	0x00200000
-#define HEAD_ADDR           	0x001FFFFC
-#define RING_START     		0x08
-#define START_ADDR          	0x0xFFFFF000
-#define RING_LEN       		0x0C
-#define RING_NR_PAGES       	0x001FF000 
-#define RING_REPORT_MASK    	0x00000006
-#define RING_REPORT_64K     	0x00000002
-#define RING_REPORT_128K    	0x00000004
-#define RING_NO_REPORT      	0x00000000
-#define RING_VALID_MASK     	0x00000001
-#define RING_VALID          	0x00000001
-#define RING_INVALID        	0x00000000
-
-#define GFX_OP_SCISSOR         ((0x3<<29)|(0x1c<<24)|(0x10<<19))
-#define SC_UPDATE_SCISSOR       (0x1<<1)
-#define SC_ENABLE_MASK          (0x1<<0)
-#define SC_ENABLE               (0x1<<0)
-
-#define GFX_OP_SCISSOR_INFO    ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
-#define SCI_YMIN_MASK      (0xffff<<16)
-#define SCI_XMIN_MASK      (0xffff<<0)
-#define SCI_YMAX_MASK      (0xffff<<16)
-#define SCI_XMAX_MASK      (0xffff<<0)
-
-#define GFX_OP_SCISSOR_ENABLE	 ((0x3<<29)|(0x1c<<24)|(0x10<<19))
-#define GFX_OP_SCISSOR_RECT	 ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1)
-#define GFX_OP_COLOR_FACTOR      ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
-#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
-#define GFX_OP_MAP_INFO          ((0x3<<29)|(0x1d<<24)|0x4)
-#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
-#define GFX_OP_DRAWRECT_INFO     ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
-
-#define GFX_OP_PRIMITIVE         ((0x3<<29)|(0x1f<<24))
-#define PRIM_INDIRECT            (1<<23)
-#define PRIM_INLINE              (0<<23)
-#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
-#define PRIM_INDIRECT_ELTS       (1<<17)
-
-#define CMD_OP_DESTBUFFER_INFO	 ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1)
-
-#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2)
-#define ASYNC_FLIP                (1<<22)
-
-#define CMD_3D                          (0x3<<29)
-#define STATE3D_CONST_BLEND_COLOR_CMD   (CMD_3D|(0x1d<<24)|(0x88<<16))
-#define STATE3D_MAP_COORD_SETBIND_CMD   (CMD_3D|(0x1d<<24)|(0x02<<16))
-
-#define BR00_BITBLT_CLIENT   0x40000000
-#define BR00_OP_COLOR_BLT    0x10000000
-#define BR00_OP_SRC_COPY_BLT 0x10C00000
-#define BR13_SOLID_PATTERN   0x80000000
-
-#define BUF_3D_ID_COLOR_BACK    (0x3<<24)
-#define BUF_3D_ID_DEPTH         (0x7<<24)
-#define BUF_3D_USE_FENCE        (1<<23)
-#define BUF_3D_PITCH(x)         (((x)/4)<<2)
-
-#define CMD_OP_MAP_PALETTE_LOAD	((3<<29)|(0x1d<<24)|(0x82<<16)|255)
-#define MAP_PALETTE_NUM(x)	((x<<8) & (1<<8))
-#define MAP_PALETTE_BOTH	(1<<11)
-
-#define XY_COLOR_BLT_CMD		((2<<29)|(0x50<<22)|0x4)
-#define XY_COLOR_BLT_WRITE_ALPHA	(1<<21)
-#define XY_COLOR_BLT_WRITE_RGB		(1<<20)
-
-#define XY_SRC_COPY_BLT_CMD             ((2<<29)|(0x53<<22)|6)
-#define XY_SRC_COPY_BLT_WRITE_ALPHA     (1<<21)
-#define XY_SRC_COPY_BLT_WRITE_RGB       (1<<20)
-
-#define MI_VERTEX_BUFFER        ((0x17<<23))
-#define MI_VB_PITCH_SHIFT       13
-#define MI_VB_WIDTH_SHIFT       6
-
-
-#define MI_BATCH_BUFFER 	((0x30<<23)|1)
-#define MI_BATCH_BUFFER_START 	(0x31<<23)
-#define MI_BATCH_BUFFER_END 	(0xA<<23)
-#define MI_BATCH_NON_SECURE	(1)
-
-#define MI_WAIT_FOR_EVENT       ((0x3<<23))
-#define MI_WAIT_FOR_PLANE_A_FLIP      (1<<2) 
-#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) 
-
-#define MI_LOAD_SCAN_LINES_INCL  ((0x12<<23))
-
-#define VFT0_POINT_WIDTH		(1<<12)
-#define VFT0_TEX_COUNT_MASK      	(7<<8)
-#define VFT0_TEX_COUNT_SHIFT            8
-#define VFT0_SPEC			(1<<7)
-#define VFT0_DIFFUSE     		(1<<6)
-#define VFT0_DEPTH_OFFSET   		(1<<5)
-#define VFT0_XYZ			(1<<1)
-#define VFT0_XYZW			(2<<1)
-#define VFT0_XY	        		(3<<1)
-#define VFT0_XYW			(4<<1)
-#define VFT0_XYZW_MASK                  (7<<1)
-
-#define VFT1_TEX0_MASK                  3
-#define VFT1_TEX1_SHIFT                 2
-
-
-#endif
-
diff --git a/linux/i830_irq.c b/linux/i830_irq.c
deleted file mode 100644
index 4f90eb06..00000000
--- a/linux/i830_irq.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
- *
- * Copyright 2002 Tungsten Graphics, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Keith Whitwell <keith@tungstengraphics.com>
- *
- */
-
-#define __NO_VERSION__
-#include "i830.h"
-#include "drmP.h"
-#include "drm.h"
-#include "i830_drm.h"
-#include "i830_drv.h"
-#include <linux/interrupt.h>	/* For task queue support */
-#include <linux/delay.h>
-
-#define USER_INT_FLAG 0x2
-#define MAX_NOPID (2048-1)
-
-void DRM(dma_service)( DRM_IRQ_ARGS )
-{
-	drm_device_t	 *dev = (drm_device_t *)arg;
-      	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
-   	u16 temp;
-
-      	temp = I830_READ16(I830REG_INT_IDENTITY_R);
-	temp &= USER_INT_FLAG;
-   	if (temp == 0) 
-		return;
-
-	I830_WRITE16(I830REG_INT_IDENTITY_R, temp); 
-	DRM_WAKEUP( &dev_priv->irq_queue ); 
-}
-
-
-int i830_emit_irq(drm_device_t *dev)
-{
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	int ret;
-	RING_LOCALS;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	atomic_inc(&dev_priv->irq_emitted);
-	ret = atomic_read(&dev_priv->irq_emitted);
-
-	if (ret > MAX_NOPID) {
-		DRM_DEBUG("wrap NOPID\n");
-		i830_wait_irq(dev, MAX_NOPID); /* or drain the ring */
-		atomic_set(&dev_priv->irq_emitted, 0);
-		ret = 0;
-	}
-
-   	BEGIN_LP_RING(2);
-      	OUT_RING( 0 | (1<<22) | ret  );
-      	OUT_RING( GFX_OP_USER_INTERRUPT );
-      	ADVANCE_LP_RING();
-
-	return ret;
-}
-
-
-int i830_wait_irq(drm_device_t *dev, int irq_nr)
-{
-  	drm_i830_private_t *dev_priv = 
-	   (drm_i830_private_t *)dev->dev_private;
-	int ret = 0;
-
- 	if (I830_READ(NOPID) >= irq_nr)  
- 		return 0; 
-
-	dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
-
-	DRM_WAIT_ON( ret, dev_priv->irq_queue, 3 * DRM_HZ,
-		     I830_READ(NOPID) >= irq_nr );
-
-	/* This can happen with signals, etc, so isn't necessarily an
-	 * error.
-	 */
-	if (ret) {
-		DRM_INFO("%s: rec: %d emitted: %d\n", __FUNCTION__,
-			 I830_READ(NOPID),
-			 atomic_read(&dev_priv->irq_emitted));
-	}
-
-	return ret;
-}
-
-
-/* Needs the lock as it touches the ring.
- */
-int i830_irq_emit( DRM_IOCTL_ARGS )
-{
-	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_irq_emit_t emit;
-	int result;
-
-   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("i830_irq_emit called without lock held\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
-		return DRM_ERR(EINVAL);
-	}
-
-	DRM_COPY_FROM_USER_IOCTL( emit, (drm_i830_irq_emit_t *)data,
-				  sizeof(emit) );
-
-	result = i830_emit_irq( dev );
-
-	if ( DRM_COPY_TO_USER( emit.irq_seq, &result, sizeof(int) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
-		return DRM_ERR(EFAULT);
-	}
-
-	return 0;
-}
-
-
-/* Doesn't need the hardware lock.
- */
-int i830_irq_wait( DRM_IOCTL_ARGS )
-{
-	drm_file_t	  *priv	    = filp->private_data;
-	drm_device_t	  *dev	    = priv->dev;
-	drm_i830_private_t *dev_priv = dev->dev_private;
-	drm_i830_irq_wait_t irqwait;
-
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
-		return DRM_ERR(EINVAL);
-	}
-
-	DRM_COPY_FROM_USER_IOCTL( irqwait, (drm_i830_irq_wait_t *)data, 
-				  sizeof(irqwait) );
-
-	return i830_wait_irq( dev, irqwait.irq_seq );
-}
-
-
-/* drm_dma.h hooks
-*/
-void DRM(driver_irq_preinstall)( drm_device_t *dev ) {
-	drm_i830_private_t *dev_priv =
-		(drm_i830_private_t *)dev->dev_private;
-
-	I830_WRITE16( I830REG_HWSTAM, 0xfffe );
-	I830_WRITE16( I830REG_INT_MASK_R, 0x0 );
-	I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 );
-}
-
-void DRM(driver_irq_postinstall)( drm_device_t *dev ) {
-	drm_i830_private_t *dev_priv =
-		(drm_i830_private_t *)dev->dev_private;
-
-	I830_WRITE16( I830REG_INT_ENABLE_R, USER_INT_FLAG );
-	atomic_set(&dev_priv->irq_emitted, 0);
-	init_waitqueue_head(&dev_priv->irq_queue);
-}
-
-void DRM(driver_irq_uninstall)( drm_device_t *dev ) {
-	drm_i830_private_t *dev_priv =
-		(drm_i830_private_t *)dev->dev_private;
-	if (!dev_priv)
-		return;
-
-	I830_WRITE16( I830REG_HWSTAM, 0xffff );
-	I830_WRITE16( I830REG_INT_MASK_R, 0xffff );
-	I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 );
-}
diff --git a/linux/i830.h b/shared/i830.h
index 458de7f7..458de7f7 100644
--- a/linux/i830.h
+++ b/shared/i830.h
diff --git a/linux/i830_compat.c b/shared/i830_compat.c
index 5b126282..5b126282 100644
--- a/linux/i830_compat.c
+++ b/shared/i830_compat.c
diff --git a/linux-core/i830_dma.c b/shared/i830_dma.c
index 5c82c9db..5c82c9db 100644
--- a/linux-core/i830_dma.c
+++ b/shared/i830_dma.c
diff --git a/linux-core/i830_drm.h b/shared/i830_drm.h
index 18f8e43a..18f8e43a 100644
--- a/linux-core/i830_drm.h
+++ b/shared/i830_drm.h
diff --git a/linux-core/i830_drv.c b/shared/i830_drv.c
index 0735c94d..0735c94d 100644
--- a/linux-core/i830_drv.c
+++ b/shared/i830_drv.c
diff --git a/linux-core/i830_drv.h b/shared/i830_drv.h
index d1e036c3..d1e036c3 100644
--- a/linux-core/i830_drv.h
+++ b/shared/i830_drv.h
diff --git a/linux-core/i830_irq.c b/shared/i830_irq.c
index 4f90eb06..4f90eb06 100644
--- a/linux-core/i830_irq.c
+++ b/shared/i830_irq.c
diff --git a/linux/i830_mem.c b/shared/i830_mem.c
index abc1c4f1..abc1c4f1 100644
--- a/linux/i830_mem.c
+++ b/shared/i830_mem.c