diff options
| author | Keith Whitwell <keith@tungstengraphics.com> | 2003-01-10 17:04:21 +0000 |
|---|---|---|
| committer | Keith Whitwell <keith@tungstengraphics.com> | 2003-01-10 17:04:21 +0000 |
| commit | a1fc6af2d8937fcc4eef25119d777e168e62b2ea (patch) | |
| tree | 60a9c58ebf559642ead9413ca32908286480bd74 | |
| parent | 4b3051d3f606faf1a78ac85236119a1d2e10fdc7 (diff) | |
Note that radeon_do_cp_idle() can fail, cope with it.
| -rw-r--r-- | shared-core/radeon_cp.c | 15 | ||||
| -rw-r--r-- | shared/radeon_cp.c | 15 |
2 files changed, 20 insertions, 10 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index f7b99e8a..6a05490b 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1388,13 +1388,18 @@ int radeon_cp_stop( DRM_IOCTL_ARGS ) void radeon_do_release( drm_device_t *dev ) { drm_radeon_private_t *dev_priv = dev->dev_private; + int ret; if (dev_priv) { - /* Stop the cp */ - radeon_do_cp_flush( dev_priv ); - radeon_do_cp_idle( dev_priv ); - radeon_do_cp_stop( dev_priv ); - radeon_do_engine_reset( dev ); + if (dev_priv->cp_running) { + /* Stop the cp */ + while ((ret = radeon_do_cp_idle( dev_priv )) != 0) { + DRM_DEBUG("radeon_do_cp_idle %d\n", ret); + schedule(); /* BSD? */ + } + radeon_do_cp_stop( dev_priv ); + radeon_do_engine_reset( dev ); + } /* Disable *all* interrupts */ RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); diff --git a/shared/radeon_cp.c b/shared/radeon_cp.c index f7b99e8a..6a05490b 100644 --- a/shared/radeon_cp.c +++ b/shared/radeon_cp.c @@ -1388,13 +1388,18 @@ int radeon_cp_stop( DRM_IOCTL_ARGS ) void radeon_do_release( drm_device_t *dev ) { drm_radeon_private_t *dev_priv = dev->dev_private; + int ret; if (dev_priv) { - /* Stop the cp */ - radeon_do_cp_flush( dev_priv ); - radeon_do_cp_idle( dev_priv ); - radeon_do_cp_stop( dev_priv ); - radeon_do_engine_reset( dev ); + if (dev_priv->cp_running) { + /* Stop the cp */ + while ((ret = radeon_do_cp_idle( dev_priv )) != 0) { + DRM_DEBUG("radeon_do_cp_idle %d\n", ret); + schedule(); /* BSD? */ + } + radeon_do_cp_stop( dev_priv ); + radeon_do_engine_reset( dev ); + } /* Disable *all* interrupts */ RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); |