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authorChris Wilson <chris@chris-wilson.co.uk>2010-03-28 19:38:24 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-03-30 18:31:34 +0100
commit7ab350378e8597e9872dbe390b8454d0a63bff28 (patch)
tree8f5fb295fa613d73abd9365a836c36cc19b1400f /src/drm/cairo-drm-i915-surface.c
parentd901692a5550c51fd3eefd307609fb800ef02a95 (diff)
Silence enumeration warnings following addition of RGB16_565
Diffstat (limited to 'src/drm/cairo-drm-i915-surface.c')
-rw-r--r--src/drm/cairo-drm-i915-surface.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/drm/cairo-drm-i915-surface.c b/src/drm/cairo-drm-i915-surface.c
index bd169a38..9214a7ef 100644
--- a/src/drm/cairo-drm-i915-surface.c
+++ b/src/drm/cairo-drm-i915-surface.c
@@ -1600,6 +1600,7 @@ i915_surface_create_for_name (cairo_drm_device_t *base_dev,
case CAIRO_FORMAT_ARGB32:
content = CAIRO_CONTENT_COLOR_ALPHA;
break;
+ case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
content = CAIRO_CONTENT_COLOR;
break;
@@ -1655,6 +1656,7 @@ i915_buffer_cache_init (intel_buffer_cache_t *cache,
case CAIRO_FORMAT_INVALID:
case CAIRO_FORMAT_A1:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB16_565:
ASSERT_NOT_REACHED;
case CAIRO_FORMAT_ARGB32:
cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
@@ -1734,6 +1736,7 @@ i915_surface_create_from_cacheable_image_internal (i915_device_t *device,
switch (image->format) {
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB16_565:
caches = &device->image_caches[0];
format = CAIRO_FORMAT_ARGB32;
bpp = 4;