- Prepare for merge with trunksarea-1-0-0-20010307-freeze

- Change variable names to be more consistent
- Fix bug in per-context creation routine
- Fix root-only permissions for get/setsareactx IOCTLs
- Back out incomplete gamma changes
- Fix some compilation warning messages
- Various code cleanups
- Disable per-context SAREA example code for Radeon
  This can be re-enabled when it is actually used by the driver.  Look for
  '#ifdef PER_CONTEXT_SAREA' in the client-side and ddx Radeon driver.

4 files changed, 19 insertions, 4 deletions

diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
index c7e326643..9b2c5b2f1 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
@@ -61,6 +61,7 @@ int RADEON_DEBUG = (0
    );
 #endif
 
+#ifdef PER_CONTEXT_SAREA
 char *radeonGetPerContextSAREA(int fd,
 			       drmContext hHWContext,
 			       drmSize size)
@@ -77,6 +78,7 @@ char *radeonGetPerContextSAREA(int fd,
 
    return address;
 }
+#endif
 
 /* Create the device specific context.
  */
@@ -108,6 +110,7 @@ GLboolean radeonCreateContext( Display *dpy, GLvisual *glVisual,
    rmesa->sarea = (RADEONSAREAPrivPtr)((char *)sPriv->pSAREA +
 				       radeonScreen->sarea_priv_offset);
 
+#ifdef PER_CONTEXT_SAREA
    rmesa->private_sarea = radeonGetPerContextSAREA(rmesa->driFd,
 					   rmesa->hHWContext,
 					   radeonScreen->private_sarea_size);
@@ -116,6 +119,7 @@ GLboolean radeonCreateContext( Display *dpy, GLvisual *glVisual,
       FREE( rmesa );
       return GL_FALSE;
    }
+#endif
 
    rmesa->tmp_matrix = (GLfloat *) ALIGN_MALLOC( 16 * sizeof(GLfloat), 16 );
    if ( !rmesa->tmp_matrix ) {
@@ -214,12 +218,15 @@ void radeonDestroyContext( radeonContextPtr rmesa )
       radeonTexObjPtr t, next_t;
       int i;
 
-      if( rmesa->private_sarea ) {
+#ifdef PER_CONTEXT_SAREA
+      if ( rmesa->private_sarea ) {
 	 drmUnmap( (drmAddress)rmesa->private_sarea, 
 		   radeonScreen->private_sarea_size );
 	 rmesa->private_sarea = NULL;
       }
-      for ( i = 0 ; i < rmesa->radeonScreen->numTexHeaps ; i++ ) {
+#endif
+
+      for ( i = 0 ; i < radeonScreen->numTexHeaps ; i++ ) {
 	 foreach_s ( t, next_t, &rmesa->TexObjList[i] ) {
 	    radeonDestroyTexObj( rmesa, t );
 	 }
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
index a417a0e50..668b451a9 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
@@ -220,7 +220,10 @@ struct radeon_context {
 
    radeonScreenPtr radeonScreen;	/* Screen private DRI data */
    RADEONSAREAPrivPtr sarea;		/* Private SAREA data */
-   char *private_sarea;
+
+#ifdef PER_CONTEXT_SAREA
+   char *private_sarea;			/* Per-context private SAREA */
+#endif
 
    /* Performance counters
     */
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
index 72fa28a98..b3da87bd3 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
@@ -190,9 +190,12 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
    }
 
    radeonScreen->driScreen = sPriv;
-   radeonScreen->private_sarea_size = radeonDRIPriv->private_sarea_size;
    radeonScreen->sarea_priv_offset = radeonDRIPriv->sarea_priv_offset;
 
+#ifdef PER_CONTEXT_SAREA
+   radeonScreen->perctx_sarea_size = radeonDRIPriv->perctx_sarea_size;
+#endif
+
    radeonDDSetupInit();
    radeonDDTriangleFuncsInit();
    radeonDDFastPathInit();
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
index 11cce76b6..81265eaaf 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
@@ -68,7 +68,9 @@ typedef struct {
    int texSize[RADEON_NR_TEX_HEAPS];
    int logTexGranularity[RADEON_NR_TEX_HEAPS];
 
+#ifdef PER_CONTEXT_SAREA
    drmSize private_sarea_size;
+#endif
 
    radeonRegionRec mmio;
    radeonRegionRec status;