diff options
| author | idr <idr> | 2003-08-08 20:34:04 +0000 |
|---|---|---|
| committer | idr <idr> | 2003-08-08 20:34:04 +0000 |
| commit | 7ce338a40c5fd7cf9d16f9c1a6582b3f322001fd (patch) | |
| tree | 9d832d7576131b6e2fc50b1537613459b3052675 /xc/lib/GL/mesa/src/drv/radeon | |
| parent | 5e6f6e8cdbfdb7169b4981b5a001148f2971473e (diff) | |
Removed the R{ADEON,200}_AGP_TEX_OFFSET contant as it's not really a
constant. Replaced it with a query of a chip configuration register
to get the correct value. This fixes various AGP texturing related
problems on R100 and cleans up a hard-coded constant in the R200 driver.
Diffstat (limited to 'xc/lib/GL/mesa/src/drv/radeon')
| -rw-r--r-- | xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c | 17 | ||||
| -rw-r--r-- | xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h | 1 |
2 files changed, 12 insertions, 6 deletions
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c index a3c1a29f0..feeddb1f7 100644 --- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c +++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c @@ -112,6 +112,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp)); if (ret) { + FREE( screen ); fprintf(stderr, "drmRadeonGetParam (RADEON_PARAM_AGP_BUFFER_OFFSET): %d\n", ret); return NULL; } @@ -165,6 +166,8 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) } if ( !screen->IsPCI ) { + unsigned char *RADEONMMIO = screen->mmio.map; + screen->agpTextures.handle = dri_priv->agpTexHandle; screen->agpTextures.size = dri_priv->agpTexMapSize; if ( drmMap( sPriv->fd, @@ -178,6 +181,9 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) __driUtilMessage("%s: IsPCI failed\n", __FUNCTION__); return NULL; } + + screen->agp_texture_offset = dri_priv->agpTexOffset + + ((INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU) << 16); } screen->chipset = 0; @@ -221,8 +227,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) screen->logTexGranularity[RADEON_AGP_HEAP] = 0; } else { screen->numTexHeaps = RADEON_NR_TEX_HEAPS; - screen->texOffset[RADEON_AGP_HEAP] = - dri_priv->agpTexOffset + RADEON_AGP_TEX_OFFSET; + screen->texOffset[RADEON_AGP_HEAP] = screen->agp_texture_offset; screen->texSize[RADEON_AGP_HEAP] = dri_priv->agpTexMapSize; screen->logTexGranularity[RADEON_AGP_HEAP] = dri_priv->log2AGPTexGran; @@ -371,10 +376,10 @@ __driRegisterExtensions( void ) glXGetProcAddress( "__glXEnableExtension" ); if ( glx_enable_extension != NULL ) { - glx_enable_extension( "GLX_SGI_swap_control", GL_FALSE ); - glx_enable_extension( "GLX_SGI_video_sync", GL_FALSE ); - glx_enable_extension( "GLX_MESA_swap_control", GL_FALSE ); - glx_enable_extension( "GLX_MESA_swap_frame_usage", GL_FALSE ); + (*glx_enable_extension)( "GLX_SGI_swap_control", GL_FALSE ); + (*glx_enable_extension)( "GLX_SGI_video_sync", GL_FALSE ); + (*glx_enable_extension)( "GLX_MESA_swap_control", GL_FALSE ); + (*glx_enable_extension)( "GLX_MESA_swap_frame_usage", GL_FALSE ); } } } diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h index 2c69d8657..05d6fc22e 100644 --- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h +++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h @@ -92,6 +92,7 @@ typedef struct { __DRIscreenPrivate *driScreen; unsigned int sarea_priv_offset; unsigned int agp_buffer_offset; /* offset in card memory space */ + unsigned int agp_texture_offset; /* offset in card memory space */ } radeonScreenRec, *radeonScreenPtr; extern radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ); |