- Merge trunk into ati-5-0-0 branchati-5-0-0-20010105

103 files changed, 1570 insertions, 995 deletions

diff --git a/xc/config/cf/host.def b/xc/config/cf/host.def
index f5d510ca6..d7441c80a 100644
--- a/xc/config/cf/host.def
+++ b/xc/config/cf/host.def
@@ -1,13 +1,6 @@
 
-#define DefaultGcc2i386Opt -O2
-#define LibraryCDebugFlags -O2
 #define BuildServersOnly YES
 #define XF86CardDrivers vga tdfx i810 mga ati glint
-#define LinuxDistribution LinuxRedHat
-#define GccWarningOptions -Wall -Wpointer-arith -Wstrict-prototypes \
-                          -Wmissing-prototypes -Wmissing-declarations \
-                          -Wnested-externs
-#define DefaultCCOptions -ansi GccWarningOptions -pipe -g
 #define NormalLibGlx NO
 
 #define BuildXF86DRI YES
@@ -40,10 +33,10 @@
 /* #define DoLoadableServer NO */
 
 /* Optionally turn this on to change the place where you install the build */
-/* #define ProjectRoot /usr/X11R6-DRI */
+#define ProjectRoot /usr/XF86-ati
 
 /* Optionally turn this on to force the kernel modules to build */
-/* #define BuildXF86DRM YES */
+#define BuildXF86DRM YES
 
 #define XnestServer NO
 #define XVirtualFramebufferServer NO
diff --git a/xc/extras/Mesa/src/pipeline.c b/xc/extras/Mesa/src/pipeline.c
index b4c6c8d32..79fd74622 100644
--- a/xc/extras/Mesa/src/pipeline.c
+++ b/xc/extras/Mesa/src/pipeline.c
@@ -1,4 +1,3 @@
-/* $Id: pipeline.c,v 1.8.2.1 2000/12/23 06:46:52 gareth Exp $*/
 
 /*
  * Mesa 3-D graphics library
diff --git a/xc/extras/Mesa/src/texutil.c b/xc/extras/Mesa/src/texutil.c
index 15567ccbc..313ef1455 100644
--- a/xc/extras/Mesa/src/texutil.c
+++ b/xc/extras/Mesa/src/texutil.c
@@ -1,4 +1,3 @@
-/* $Id: texutil.c,v 1.6.2.1 2000/12/23 06:46:52 gareth Exp $ */
 
 /*
  * Mesa 3-D graphics library
diff --git a/xc/lib/GL/mesa/src/drv/mga/Imakefile b/xc/lib/GL/mesa/src/drv/mga/Imakefile
index 62fecb053..243d05763 100644
--- a/xc/lib/GL/mesa/src/drv/mga/Imakefile
+++ b/xc/lib/GL/mesa/src/drv/mga/Imakefile
@@ -63,6 +63,7 @@ MESA_INCLUDES = -I. -I.. -I../../include \
 		mgafastpath.c \
 		mgaioctl.c \
 		mgapipeline.c \
+		mgapixel.c \
 		mgaspan.c \
 		mgastate.c \
 		mgatex.c \
@@ -78,6 +79,7 @@ MESA_INCLUDES = -I. -I.. -I../../include \
 		mgafastpath.o \
 		mgaioctl.o \
 		mgapipeline.o \
+		mgapixel.o \
 		mgaspan.o \
 		mgastate.o \
 		mgatex.o \
diff --git a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
index 7524a52a1..7a4c40291 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
@@ -53,6 +53,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "mgatris.h"
 #include "mgapipeline.h"
 #include "mgabuffers.h"
+#include "mgapixel.h"
 
 #include "xf86dri.h"
 #include "mga_xmesa.h"
@@ -127,18 +128,21 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv)
 
    /* Check that the DRM driver version is compatible */
    if (sPriv->drmMajor != 2 ||
-       sPriv->drmMinor != 0 ||
+       sPriv->drmMinor != 1 ||
        sPriv->drmPatch < 0) {
       char msg[1000];
-      sprintf(msg, "MGA DRI driver expected DRM driver version 2.0.x but got version %d.%d.%d", sPriv->drmMajor, sPriv->drmMinor, sPriv->drmPatch);
+      sprintf(msg, "MGA DRI driver expected DRM driver version 2.{0,1}.x but got version %d.%d.%d", sPriv->drmMajor, sPriv->drmMinor, sPriv->drmPatch);
       __driMesaMessage(msg);
       return GL_FALSE;
    }
 
+
    /* Allocate the private area */
    mgaScreen = (mgaScreenPrivate *)MALLOC(sizeof(mgaScreenPrivate));
-   if (!mgaScreen)
+   if (!mgaScreen) {
+      __driMesaMessage("Couldn't malloc screen struct");
       return GL_FALSE;
+   }
 
    mgaScreen->sPriv = sPriv;
    sPriv->private = (void *)mgaScreen;
@@ -147,6 +151,7 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv)
        serverInfo->chipset != MGA_CARD_TYPE_G400) {
       XFree(mgaScreen);
       sPriv->private = NULL;
+      __driMesaMessage("Unrecognized chipset");
       return GL_FALSE;
    }
 
@@ -174,6 +179,7 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv)
    {
       Xfree(mgaScreen);
       sPriv->private = NULL;
+      __driMesaMessage("Couldn't map agp region");
       return GL_FALSE;
    }
 
@@ -206,6 +212,7 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv)
       /*drmUnmap(mgaScreen->agp_tex.map, mgaScreen->agp_tex.size);*/
       XFree(mgaScreen);
       sPriv->private = NULL;
+      __driMesaMessage("Couldn't map dma buffers");
       return GL_FALSE;
    }
 
@@ -326,14 +333,6 @@ GLboolean XMesaCreateContext( Display *dpy, GLvisual *mesaVis,
 
    mmesa->hw_stencil = mesaVis->StencilBits && mesaVis->DepthBits == 24;
 
-/*     fprintf(stderr,  */
-/*  	   "mesaVis->DepthBits: %d " */
-/*  	   "mmesa->glCtx->Visual->DepthBits: %d " */
-/*  	   "mmesa->glCtx->Visual->DepthMax: %x\n",  */
-/*  	   mesaVis->DepthBits, */
-/*  	   ctx->Visual->DepthBits,  */
-/*  	   ctx->Visual->DepthMax); */
-
    switch (mesaVis->DepthBits) {
    case 16: 
       mmesa->depth_scale = 1.0/(GLdouble)0xffff; 
@@ -377,6 +376,7 @@ GLboolean XMesaCreateContext( Display *dpy, GLvisual *mesaVis,
    mgaDDInitSpanFuncs( ctx );
    mgaDDInitDriverFuncs( ctx );
    mgaDDInitIoctlFuncs( ctx );
+   mgaDDInitPixelFuncs( ctx );
 
 
    ctx->Driver.TriangleCaps = (DD_TRI_CULL|
@@ -530,7 +530,8 @@ void mgaGetLock( mgaContextPtr mmesa, GLuint flags )
 
    drmGetLock(mmesa->driFd, mmesa->hHWContext, flags);	
 
-   if (*(dPriv->pStamp) != dPriv->lastStamp) { 
+   if (*(dPriv->pStamp) != mmesa->lastStamp) { 
+      mmesa->lastStamp = *(dPriv->pStamp);
       mmesa->setupdone = 0;
       mmesa->dirty_cliprects = (MGA_FRONT|MGA_BACK);
       mgaUpdateRects( mmesa, (MGA_FRONT|MGA_BACK) );
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgabuffers.c b/xc/lib/GL/mesa/src/drv/mga/mgabuffers.c
index 75d322c47..518587eac 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgabuffers.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgabuffers.c
@@ -78,7 +78,7 @@ static void mgaXMesaSetBackClipRects( mgaContextPtr mmesa )
 }
 
 
-
+#if 0
 static void mgaUpdateRectsFromSarea( mgaContextPtr mmesa )
 {
    __DRIdrawablePrivate *driDrawable = mmesa->driDrawable;
@@ -128,7 +128,7 @@ static void mgaUpdateRectsFromSarea( mgaContextPtr mmesa )
 
    mmesa->dirty_cliprects = (MGA_FRONT|MGA_BACK) & ~(sarea->exported_buffers);
 }
-
+#endif
 
 
 static void printSareaRects( mgaContextPtr mmesa )
@@ -205,45 +205,22 @@ void mgaUpdateRects( mgaContextPtr mmesa, GLuint buffers )
    __DRIdrawablePrivate *driDrawable = mmesa->driDrawable;
    drm_mga_sarea_t *sarea = mmesa->sarea;
 
-   /* The MGA X driver will try to push one set of cliprects (back or
-    * front, the last active) for one drawable (the last used) into
-    * the sarea.  See if that window was ours, else retrieve both back
-    * and front rects from the X server via a protocol request.  
-    *
-    * If there isn't room for the cliprects in the sarea, the X server
-    * clears the drawable value to indicate failure.  
-    */
-   if (0) printSareaRects(mmesa);
-
-   if (0 && 
-       sarea->exported_drawable == driDrawable->draw && 
-       (sarea->exported_buffers & buffers) == buffers)
-   {
-      mgaUpdateRectsFromSarea( mmesa );
-   } 
-   else 
-   {
-      if(MGA_DEBUG & DEBUG_VERBOSE_MSG)
-		fprintf(stderr, "^");
-      driDrawable->lastStamp = 0;
-
-      XMESA_VALIDATE_DRAWABLE_INFO(mmesa->display, 
-				   mmesa->driScreen, 
-				   driDrawable); 
-      mmesa->dirty_cliprects = 0;	
-   }
+/*     fprintf(stderr, "%s\n", __FUNCTION__); */
+
+   XMESA_VALIDATE_DRAWABLE_INFO(mmesa->display, 
+				mmesa->driScreen, 
+				driDrawable); 
+   mmesa->dirty_cliprects = 0;	
 
    if (mmesa->draw_buffer == MGA_FRONT)
       mgaXMesaSetFrontClipRects( mmesa );
    else
       mgaXMesaSetBackClipRects( mmesa );
 
-
-   if (0) printMmesaRects(mmesa);
+/*     printMmesaRects(mmesa); */
 
    sarea->req_drawable = driDrawable->draw;
    sarea->req_draw_buffer = mmesa->draw_buffer;
-
    
    mgaUpdateClipping( mmesa->glCtx );
    
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgacontext.h b/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
index 1f6ffc6c6..252e23277 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
@@ -117,7 +117,8 @@ typedef struct mga_texture_object_s
 struct mga_context_t {
 
    GLcontext *glCtx;
-
+   GLuint lastStamp;		/* fullscreen breaks dpriv->laststamp, 
+				 * need to shadow it here. */
 
    /* Bookkeeping for texturing 
     */
@@ -175,8 +176,8 @@ struct mga_context_t {
    GLuint        Setup[MGA_CTX_SETUP_SIZE];
    GLuint        warp_pipe;
    GLuint        vertsize;
-   GLushort      MonoColor;
-   GLushort      ClearColor;
+   GLuint        MonoColor;
+   GLuint        ClearColor;
    GLuint        ClearDepth;
    GLuint        poly_stipple;
    GLfloat       depth_scale;
@@ -250,6 +251,9 @@ struct mga_context_t {
 #define MGAPACKCOLOR565(r,g,b) \
   ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
 
+#define MGAPACKCOLOR88(l, a) \
+  (((l) << 8) | (a))
+
 #define MGAPACKCOLOR888(r,g,b) \
   (((r) << 16) | ((g) << 8) | (b))
 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgadd.c b/xc/lib/GL/mesa/src/drv/mga/mgadd.c
index f9c3357ce..d777aa77a 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgadd.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgadd.c
@@ -114,6 +114,12 @@ void mgaDDExtensionsInit( GLcontext *ctx )
    if (MGA_IS_G400(MGA_CONTEXT(ctx)))
    {
       gl_extensions_enable( ctx, "GL_EXT_texture_env_add" );
+      gl_extensions_enable( ctx, "GL_MESA_packed_depth_stencil" );
+
+#if defined (MESA_experimetal_agp_allocator)
+      if (!getenv("MGA_DISABLE_AGP_ALLOCATOR"))  
+	 gl_extensions_enable( ctx, "GL_MESA_experimental_agp_allocator" );
+#endif
    }
 
    /* we don't support point parameters in hardware yet */
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
index 8d31caa1d..3f41a87e7 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
@@ -19,9 +19,6 @@
 #include "drm.h"
 #include <sys/ioctl.h>
 
-#define DEPTH_SCALE_16 ((GLfloat)0xffff)
-#define DEPTH_SCALE_32 ((GLfloat)0xffffffff) 
-
 static void mga_iload_dma_ioctl(mgaContextPtr mmesa,
 				unsigned long dest, 
 				int length)
@@ -162,8 +159,6 @@ GLbitfield mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
    int i;
    static int nrclears;
 
-   if (0) fprintf(stderr, "clear %d: %d,%d %dx%d\n", all,cx,cy,cw,ch);
-
    clear.flags = 0;
    clear.clear_color = mmesa->ClearColor;
    clear.clear_depth = 0;
@@ -308,8 +303,6 @@ void mgaSwapBuffers( mgaContextPtr mmesa )
    pbox = dPriv->pClipRects;
    nbox = dPriv->numClipRects;
 
-   if (0) fprintf(stderr, "swap, nbox %d\n", nbox);
-
    for (i = 0 ; i < nbox ; )
    {
       int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
@@ -320,20 +313,11 @@ void mgaSwapBuffers( mgaContextPtr mmesa )
       for ( ; i < nr ; i++) 
 	 *b++ = pbox[i];
       
-      if (0)
-	 fprintf(stderr, "DRM_IOCTL_MGA_SWAP\n"); 
-
-#if 1
       if((retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_SWAP, &swap))) {
 	 printf("send swap retcode = %d\n", retcode);
+	 UNLOCK_HARDWARE( mmesa );
 	 exit(1);
       }
-#else
-      mgaUpdateLock( mmesa, DRM_LOCK_FLUSH );
-#endif
-
-      if (0)
-	 fprintf(stderr, "finished swap %d\n", ++nrswaps);
    }
 
    tmp = GET_ENQUEUE_AGE(mmesa);
@@ -371,7 +355,6 @@ void mgaDDFinish( GLcontext *ctx  )
 void mgaWaitAgeLocked( mgaContextPtr mmesa, int age  ) 
 {
    if (GET_DISPATCH_AGE(mmesa) < age) {
-      if (0) fprintf(stderr, "\n\n\nmgaWaitAgeLocked\n");
       mgaUpdateLock( mmesa, DRM_LOCK_FLUSH );
    }
 }
@@ -382,7 +365,6 @@ void mgaWaitAge( mgaContextPtr mmesa, int age  )
    if (GET_DISPATCH_AGE(mmesa) < age) {
       LOCK_HARDWARE(mmesa);
       if (GET_DISPATCH_AGE(mmesa) < age) {
-	 if (0) fprintf(stderr, "\n\n\nmgaWaitAge\n");
 	 mgaUpdateLock( mmesa, DRM_LOCK_FLUSH );
       }
       UNLOCK_HARDWARE(mmesa);
@@ -436,14 +418,6 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
     */
    mmesa->sarea->dirty |= MGA_UPLOAD_CTX; 
       
-   /* FIXME: dstorg bug
-    */
-   if (0)
-      if (mmesa->lastX != mmesa->drawX || mmesa->lastY != mmesa->drawY)
-	 fprintf(stderr, "****** last: %d,%d current: %d,%d\n",
-		 mmesa->lastX, mmesa->lastY,
-		 mmesa->drawX, mmesa->drawY);
-
    vertex.idx = buffer->idx;
    vertex.used = buffer->used;
    vertex.discard = 0;
@@ -454,6 +428,7 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
    if (nbox >= MGA_NR_SAREA_CLIPRECTS)
       mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
 
+#if 0
    if (!vertex.used || !(mmesa->dirty & MGA_UPLOAD_CLIPRECTS)) 
    {
       if (nbox == 1) 
@@ -469,6 +444,7 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
       age_mmesa(mmesa, mmesa->sarea->last_enqueue);
    } 
    else 
+#endif
    {      
       for (i = 0 ; i < nbox ; )
       {
@@ -596,6 +572,18 @@ void mgaGetILoadBufferLocked( mgaContextPtr mmesa )
    mmesa->iload_buffer = mga_get_buffer_ioctl( mmesa );
 }
 
+drmBufPtr mgaGetBufferLocked( mgaContextPtr mmesa )
+{
+   return mga_get_buffer_ioctl( mmesa );
+}
+
+void mgaGetEltBufLocked( mgaContextPtr mmesa )
+{
+   mmesa->elt_buf = mga_get_buffer_ioctl( mmesa );
+}
+
+
+
 
 void mgaDDFlush( GLcontext *ctx )
 {
@@ -609,7 +597,6 @@ void mgaDDFlush( GLcontext *ctx )
     */
    if (1 || GET_DISPATCH_AGE( mmesa ) < mmesa->sarea->last_enqueue) {
       LOCK_HARDWARE( mmesa );
-      if (0) fprintf(stderr, "mgaDDFlush %d %d\n", GET_DISPATCH_AGE( mmesa ),  mmesa->sarea->last_enqueue);
       mgaUpdateLock( mmesa, DRM_LOCK_FLUSH );
       UNLOCK_HARDWARE( mmesa );
    }
@@ -628,9 +615,6 @@ void mgaFireEltsLocked( mgaContextPtr mmesa,
    drm_mga_indices_t elts;
    int i;
 
-
-   if (0) fprintf(stderr, "FireElts %d %d\n", start/4, end/4);
-
    if (!buffer)
       return;
 
@@ -662,8 +646,6 @@ void mgaFireEltsLocked( mgaContextPtr mmesa,
       else
 	 mmesa->sarea->nbox = nbox;
 
-      if (0)
-	 fprintf(stderr, "Firing elts -- case a nbox %d\n", nbox);
 
       elts.discard = discard;
       ioctl(mmesa->driFd, DRM_IOCTL_MGA_INDICES, &elts);
@@ -704,8 +686,6 @@ void mgaFireEltsLocked( mgaContextPtr mmesa,
 	 if (nr == nbox) 
 	    elts.discard = discard;
 
-	 if (0)
-	    fprintf(stderr, "Firing elts -- case b nbox %d\n", nbox);
 
 	 mmesa->sarea->dirty |= MGA_UPLOAD_CLIPRECTS;
 	 ioctl(mmesa->driFd, DRM_IOCTL_MGA_INDICES, &elts);
@@ -716,10 +696,6 @@ void mgaFireEltsLocked( mgaContextPtr mmesa,
    mmesa->dirty &= ~MGA_UPLOAD_CLIPRECTS;
 }
 
-void mgaGetEltBufLocked( mgaContextPtr mmesa )
-{
-   mmesa->elt_buf = mga_get_buffer_ioctl( mmesa );
-}
 
 void mgaReleaseBufLocked( mgaContextPtr mmesa, drmBufPtr buffer )
 {
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
index 869d50160..e34a0c65b 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
@@ -18,6 +18,7 @@ GLuint *mgaAllocVertexDwords( mgaContextPtr mmesa, int dwords );
 
 
 void mgaGetILoadBufferLocked( mgaContextPtr mmesa );
+drmBufPtr mgaGetBufferLocked( mgaContextPtr mmesa );
 
 
 void mgaFireILoadLocked( mgaContextPtr mmesa, 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgapixel.c b/xc/lib/GL/mesa/src/drv/mga/mgapixel.c
new file mode 100644
index 000000000..2634e0430
--- /dev/null
+++ b/xc/lib/GL/mesa/src/drv/mga/mgapixel.c
@@ -0,0 +1,635 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.h,v 1.2 2000/08/25 13:42:28 dawes Exp $ */
+/**************************************************************************
+
+Copyright 2000 Compaq Computer Inc. and VA Linux, Inc.
+All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+on the rights to use, copy, modify, merge, publish, distribute, sub
+license, and/or sell copies of the Software, and to permit persons to whom
+the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice (including the next
+paragraph) shall be included in all copies or substantial portions of the
+Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+**************************************************************************/
+
+#include "enums.h"
+#include "types.h"
+#include "texutil.h"
+#include "mgadd.h"
+#include "mgacontext.h"
+#include "mgaioctl.h"
+#include "mgapixel.h"
+#include "mgabuffers.h"
+
+#include "drm.h"
+#include <sys/ioctl.h>
+
+#define IS_AGP_MEM(mmesa, p) 			\
+   (mmesa->mgaScreen->agp.map <= ((char *)p) &&	\
+    mmesa->mgaScreen->agp.map +			\
+    mmesa->mgaScreen->agp.size > ((char *)p))
+#define AGP_OFFSET(mmesa, p)						\
+     (((char *)p) - mmesa->mgaScreen->agp.map )
+
+
+#if defined(MESA_packed_depth_stencil)
+static GLboolean 
+check_depth_stencil_24_8( const GLcontext *ctx, GLenum type,
+			  const struct gl_pixelstore_attrib *packing,
+			  const void *pixels, GLint sz,
+			  GLint pitch )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+
+   return (type == GL_UNSIGNED_INT_24_8_MESA &&
+	   ctx->Visual->DepthBits == 24 &&
+	   ctx->Visual->StencilBits == 8 &&
+	   mmesa->mgaScreen->cpp == 4 &&
+	   mmesa->hw_stencil &&
+	   !ctx->Pixel.IndexShift && 
+	   !ctx->Pixel.IndexOffset &&
+	   !ctx->Pixel.MapStencilFlag &&
+	   ctx->Pixel.DepthBias == 0.0 && 
+	   ctx->Pixel.DepthScale == 1.0 &&
+	   !packing->SwapBytes &&
+	   pitch % 32 == 0 &&
+	   pitch < 4096);
+
+}
+#endif
+
+
+static GLboolean 
+check_depth( const GLcontext *ctx, GLenum type,
+	     const struct gl_pixelstore_attrib *packing,
+	     const void *pixels, GLint sz, GLint pitch )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+
+   if (IS_AGP_MEM(mmesa, pixels) && 
+       !((type == GL_UNSIGNED_INT && mmesa->mgaScreen->cpp == 4) ||
+	 (type == GL_UNSIGNED_SHORT && mmesa->mgaScreen->cpp == 2)))
+      return GL_FALSE;
+
+   return (ctx->Pixel.DepthBias == 0.0 && 
+	   ctx->Pixel.DepthScale == 1.0 &&
+	   !packing->SwapBytes &&
+	   pitch % 32 == 0 &&
+	   pitch < 4096);
+}
+
+
+static GLboolean
+check_color( const GLcontext *ctx, GLenum type, GLenum format, 
+		const struct gl_pixelstore_attrib *packing,
+		const void *pixels, GLint sz, GLint pitch )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+   GLuint cpp = mmesa->mgaScreen->cpp;
+
+   /* Can't do conversions on agp reads/draws.
+    */
+   if (IS_AGP_MEM(mmesa, pixels) && 
+       !(pitch % 32 == 0 &&
+	 pitch < 4096 &&
+	 ((type == GL_UNSIGNED_BYTE && cpp == 4 && format == GL_BGRA) ||
+	  (type == GL_UNSIGNED_INT_8_8_8_8 && cpp == 4 && format == GL_BGRA) ||
+	  (type == GL_UNSIGNED_SHORT_5_6_5_REV && cpp==2 && format == GL_RGB))))
+      return GL_FALSE;
+
+   return 
+      (ctx->ColorMatrix.type == MATRIX_IDENTITY && 
+       !ctx->Pixel.ScaleOrBiasRGBA && 
+       !ctx->Pixel.ScaleOrBiasRGBApcm && 
+       !ctx->Pixel.MapColorFlag && 
+       !ctx->Pixel.ColorTableEnabled && 
+       !ctx->Pixel.PostColorMatrixColorTableEnabled && 
+       !ctx->Pixel.MinMaxEnabled && 
+       !ctx->Pixel.HistogramEnabled && 
+       !packing->SwapBytes &&   
+       !packing->LsbFirst);
+}
+
+static GLboolean
+check_color_per_fragment_ops( const GLcontext *ctx )
+{
+   return (!(ctx->RasterMask & ~(SCISSOR_BIT|WINCLIP_BIT|MULTI_DRAW_BIT)) && 
+	   ctx->Current.RasterPosValid &&
+	   ctx->Pixel.ZoomX == 1.0F && 
+	   (ctx->Pixel.ZoomY == 1.0F || ctx->Pixel.ZoomY == -1.0F));
+}
+
+static GLboolean
+check_depth_per_fragment_ops( const GLcontext *ctx )
+{
+   return (ctx->Current.RasterPosValid &&
+	   ctx->Color.ColorMask[RCOMP] == 0 &&
+	   ctx->Color.ColorMask[BCOMP] == 0 &&
+	   ctx->Color.ColorMask[GCOMP] == 0 &&
+	   ctx->Color.ColorMask[ACOMP] == 0 &&
+	   ctx->Pixel.ZoomX == 1.0F && 
+	   (ctx->Pixel.ZoomY == 1.0F || ctx->Pixel.ZoomY == -1.0F));
+}
+
+/* In addition to the requirements for depth:
+ */
+#if defined(MESA_packed_depth_stencil)
+static GLboolean
+check_stencil_per_fragment_ops( const GLcontext *ctx )
+{
+   return (!ctx->Pixel.IndexShift && 
+	   !ctx->Pixel.IndexOffset);
+}
+#endif
+
+
+static GLboolean
+clip_pixelrect( const GLcontext *ctx,
+		const GLframebuffer *buffer,
+		GLint *x, GLint *y,
+		GLsizei *width, GLsizei *height,
+		GLint *skipPixels, GLint *skipRows,
+		GLint *size )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+
+   *width = MIN2(*width, MAX_WIDTH); /* redundant? */
+
+   /* left clipping */
+   if (*x < buffer->Xmin) {
+      *skipPixels += (buffer->Xmin - *x);
+      *width -= (buffer->Xmin - *x);
+      *x = buffer->Xmin;
+   }
+
+   /* right clipping */
+   if (*x + *width > buffer->Xmax)
+      *width -= (*x + *width - buffer->Xmax - 1);
+
+   if (*width <= 0)
+      return GL_FALSE;
+
+   /* bottom clipping */
+   if (*y < buffer->Ymin) {
+      *skipRows += (buffer->Ymin - *y);
+      *height -= (buffer->Ymin - *y);
+      *y = buffer->Ymin;
+   }
+
+   /* top clipping */
+   if (*y + *height > buffer->Ymax)
+      *height -= (*y + *height - buffer->Ymax - 1);
+
+   if (*height <= 0)
+      return GL_FALSE;
+
+   *size = ((*y + *height - 1) * mmesa->mgaScreen->frontPitch +
+	    (*x + *width - 1) * mmesa->mgaScreen->cpp);
+   
+   return GL_TRUE;
+}
+
+static GLboolean 
+mgaDDReadPixels( GLcontext *ctx,  
+		 GLint x, GLint y, GLsizei width, GLsizei height,
+		 GLenum format, GLenum type, 
+		 const struct gl_pixelstore_attrib *pack,
+		 GLvoid *pixels )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+   drm_mga_blit_t blit;
+   GLint size, skipPixels, skipRows;
+   GLint pitch = pack->RowLength ? pack->RowLength : width;
+   GLboolean ok;
+
+   if (!clip_pixelrect(ctx, ctx->ReadBuffer, 
+		       &x, &y, &width, &height,
+		       &skipPixels, &skipRows, &size)) {
+      return GL_TRUE;
+   }
+
+   /* Only accelerate reading to agp buffers.
+    */
+   if ( !IS_AGP_MEM(mmesa, (char *)pixels) ||
+	!IS_AGP_MEM(mmesa, (char *)pixels + size) )
+      return GL_FALSE;
+
+   switch (format) {
+#if defined(MESA_packed_depth_stencil)
+   case GL_DEPTH_STENCIL_MESA:
+      ok = check_depth_stencil_24_8(ctx, type, pack, pixels, size, pitch);
+      blit.planemask = ~0;
+      blit.source = mmesa->mgaScreen->depthOffset;
+      break;
+#endif
+
+   case GL_DEPTH_COMPONENT:
+      ok = check_depth(ctx, type, pack, pixels, size, pitch);
+
+      /* Can't accelerate at this depth -- planemask does the wrong
+       * thing; it doesn't clear the low order bits in the
+       * destination, instead it leaves them untouched. 
+       *
+       * Could get the acclerator to solid fill the destination with
+       * zeros first...  Or get the cpu to do it...
+       */
+      if (ctx->Visual->DepthBits == 24) 
+	 return GL_FALSE;
+
+      blit.planemask = ~0;
+      blit.source = mmesa->mgaScreen->depthOffset;
+      break;
+
+   case GL_RGB:
+   case GL_BGRA:
+      ok = check_color(ctx, type, format, pack, pixels, size, pitch);
+      blit.planemask = ~0;
+      blit.source = (mmesa->draw_buffer == MGA_FRONT ?
+		     mmesa->mgaScreen->frontOffset :
+		     mmesa->mgaScreen->backOffset);
+      break;
+
+   default:
+      return GL_FALSE;
+   }
+
+   if (!ok) {
+      return GL_FALSE;
+   }
+
+
+   LOCK_HARDWARE( mmesa );
+
+   {
+      __DRIdrawablePrivate *dPriv = mmesa->driDrawable;
+      int nbox, retcode, i;
+
+      mgaUpdateLock( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );  
+
+      if (mmesa->dirty_cliprects & MGA_FRONT) 
+	 mgaUpdateRects( mmesa, MGA_FRONT );
+   
+      nbox = dPriv->numClipRects;
+
+      y = dPriv->h - y - height;
+      x += mmesa->drawX;
+      y += mmesa->drawY;
+
+      blit.dest = ((mmesa->mgaScreen->agp.handle + AGP_OFFSET(mmesa, pixels)) |
+		   DO_dstmap_sys | DO_dstacc_agp);
+      blit.source_pitch = mmesa->mgaScreen->frontPitch / mmesa->mgaScreen->cpp;
+      blit.dest_pitch = pitch;
+      blit.delta_sx = 0;
+      blit.delta_sy = 0;
+      blit.delta_dx = -x;
+      blit.delta_dy = -y;
+      blit.height = 2*y + height;
+      blit.ydir = -1;
+      
+      if (0) fprintf(stderr, "XX doing readpixel blit src_pitch %d dst_pitch %d\n", 
+		     blit.source_pitch, blit.dest_pitch);
+
+
+
+      for (i = 0 ; i < nbox ; )
+      {
+	 int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
+	 XF86DRIClipRectRec *box = dPriv->pClipRects;	 
+	 drm_clip_rect_t *b = mmesa->sarea->boxes;
+	 int n = 0;
+
+	 for ( ; i < nr ; i++) {
+	    GLint bx = box[i].x1;
+	    GLint by = box[i].y1;
+	    GLint bw = box[i].x2 - bx;
+	    GLint bh = box[i].y2 - by;
+
+	    if (bx < x) bw -= x - bx, bx = x; 
+	    if (by < y) bh -= y - by, by = y;
+	    if (bx + bw > x + width) bw = x + width - bx;
+	    if (by + bh > y + height) bh = y + height - by;
+	    if (bw <= 0) continue;
+	    if (bh <= 0) continue;
+
+	    b->x1 = bx;
+	    b->y1 = by;
+	    b->x2 = bx + bw;
+	    b->y2 = by + bh;
+	    b++;
+	    n++;
+	 }
+
+	 mmesa->sarea->nbox = n;
+	 
+	 if (n && (retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_BLIT, &blit))) {
+	    fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
+	    UNLOCK_HARDWARE( mmesa );
+	    exit(1);
+	 }
+      }
+
+      mgaUpdateLock( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );  
+   }
+
+   UNLOCK_HARDWARE( mmesa );
+
+   return GL_TRUE;
+}
+
+
+
+static void do_draw_pix( GLcontext *ctx,
+			 GLint x, GLint y, GLsizei width, GLsizei height,
+			 GLint pitch,
+			 const void *pixels,
+			 GLuint dest, GLuint planemask)
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+   drm_mga_blit_t blit;	
+   __DRIdrawablePrivate *dPriv = mmesa->driDrawable;
+   XF86DRIClipRectPtr pbox = dPriv->pClipRects;
+   int nbox = dPriv->numClipRects;
+   int retcode, i;
+
+   y = dPriv->h - y - height;
+   x += mmesa->drawX;
+   y += mmesa->drawY;
+
+   blit.dest = dest;
+   blit.planemask = planemask;
+   blit.source = ((mmesa->mgaScreen->agp.handle + AGP_OFFSET(mmesa, pixels))
+		  | SO_srcmap_sys | SO_srcacc_agp);
+   blit.dest_pitch = mmesa->mgaScreen->frontPitch / mmesa->mgaScreen->cpp;
+   blit.source_pitch = pitch;
+   blit.delta_sx = -x;
+   blit.delta_sy = -y;
+   blit.delta_dx = 0;
+   blit.delta_dy = 0;
+   if (ctx->Pixel.ZoomY == -1) {
+      blit.height = height;
+      blit.ydir = 1;
+   } else {
+      blit.height = height;
+      blit.ydir = -1;
+   }
+
+   if (0) fprintf(stderr, 
+		  "doing drawpixel blit src_pitch %d dst_pitch %d\n", 
+		  blit.source_pitch, blit.dest_pitch);
+
+   for (i = 0 ; i < nbox ; )
+   {
+      int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
+      XF86DRIClipRectRec *box = mmesa->pClipRects;	 
+      drm_clip_rect_t *b = mmesa->sarea->boxes;
+      int n = 0;
+
+      for ( ; i < nr ; i++) {
+	 GLint bx = box[i].x1;
+	 GLint by = box[i].y1;
+	 GLint bw = box[i].x2 - bx;
+	 GLint bh = box[i].y2 - by;
+
+	 if (bx < x) bw -= x - bx, bx = x; 
+	 if (by < y) bh -= y - by, by = y;
+	 if (bx + bw > x + width) bw = x + width - bx;
+	 if (by + bh > y + height) bh = y + height - by;
+	 if (bw <= 0) continue;
+	 if (bh <= 0) continue;
+
+	 b->x1 = bx;
+	 b->y1 = by;
+	 b->x2 = bx + bw;
+	 b->y2 = by + bh;
+	 b++;
+	 n++;
+      }
+
+      mmesa->sarea->nbox = n;
+	 
+      if (n && (retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_BLIT, &blit))) {
+	 fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
+	 UNLOCK_HARDWARE( mmesa );
+	 exit(1);
+      }
+   }
+}
+
+
+
+
+static GLboolean
+mgaDDDrawPixels( GLcontext *ctx, 
+		 GLint x, GLint y, GLsizei width, GLsizei height,
+		 GLenum format, GLenum type,
+		 const struct gl_pixelstore_attrib *unpack,
+		 const GLvoid *pixels )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+   GLint size, skipPixels, skipRows;
+   GLint pitch = unpack->RowLength ? unpack->RowLength : width;
+   GLuint dest, planemask;
+   GLuint cpp = mmesa->mgaScreen->cpp;
+
+   if (!clip_pixelrect(ctx, ctx->DrawBuffer, 
+		       &x, &y, &width, &height,
+		       &skipPixels, &skipRows, &size)) {
+      return GL_TRUE;
+   }
+
+   
+   switch (format) {
+#if defined(MESA_packed_depth_stencil)
+   case GL_DEPTH_STENCIL_MESA:
+      dest = mmesa->mgaScreen->depthOffset;
+      planemask = ~0;
+      if (!check_depth_stencil_24_8(ctx, type, unpack, pixels, size, pitch) ||
+	  !check_depth_per_fragment_ops(ctx) ||
+	  !check_stencil_per_fragment_ops(ctx))
+	 return GL_FALSE;
+      break;
+#endif
+
+   case GL_DEPTH_COMPONENT:
+      dest = mmesa->mgaScreen->depthOffset;
+
+      if (ctx->Visual->DepthBits == 24)
+	 planemask = ~0xff;
+      else
+	 planemask = ~0;
+
+      if (!check_depth(ctx, type, unpack, pixels, size, pitch) ||
+	  !check_depth_per_fragment_ops(ctx))
+	 return GL_FALSE;
+      break;
+
+   case GL_RGB:
+   case GL_BGRA:
+      dest = (mmesa->draw_buffer == MGA_FRONT ?
+	      mmesa->mgaScreen->frontOffset :
+	      mmesa->mgaScreen->backOffset);
+
+      planemask = mgaPackColor(cpp,
+			       ctx->Color.ColorMask[RCOMP],
+			       ctx->Color.ColorMask[GCOMP],
+			       ctx->Color.ColorMask[BCOMP],
+			       ctx->Color.ColorMask[ACOMP]);
+
+      if (cpp == 2)
+	 planemask |= planemask << 16;
+
+      if (!check_color(ctx, type, format, unpack, pixels, size, pitch)) {
+	 return GL_FALSE;
+      }
+      if (!check_color_per_fragment_ops(ctx)) {
+	 return GL_FALSE;
+      }
+      break;
+
+   default:
+      return GL_FALSE;
+   }
+
+   LOCK_HARDWARE( mmesa );
+	 mgaUpdateLock( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT ); 
+
+   if (mmesa->dirty_cliprects & MGA_FRONT) 
+      mgaUpdateRects( mmesa, MGA_FRONT );
+   
+   if ( IS_AGP_MEM(mmesa, (char *)pixels) &&
+	IS_AGP_MEM(mmesa, (char *)pixels + size) )
+   {
+      do_draw_pix( ctx, x, y, width, height, pitch, pixels, 
+		   dest, planemask );
+      mgaUpdateLock( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT ); 
+   } 
+   else 
+   {
+      /* Pixels is in regular memory -- get dma buffers and perform
+       * upload through them. 
+       */
+/*        drmBufPtr buf = mgaGetBufferLocked(mmesa); */
+      GLuint bufferpitch = (width*cpp+31)&~31;
+      char *address = mmesa->mgaScreen->agp.map;
+
+      do {
+/*  	 GLuint rows = MIN2( height, MGA_DMA_BUF_SZ / bufferpitch ); */
+	 GLuint rows = height;
+	 
+	 
+	 if (0) fprintf(stderr, "trying to upload %d rows (pitch %d)\n",
+			rows, bufferpitch);
+	 
+	 /* The texture conversion code is so slow that there is only
+	  * negligble speedup when the buffers/images don't exactly
+	  * match:
+	  */
+#if 1
+	 if (cpp == 2) {
+	    if (!_mesa_convert_teximage( MESA_R5_G6_B5,
+					 width, rows, 
+					 address, bufferpitch,
+					 width, rows, 
+					 format, type,
+					 pixels, unpack )) {
+/*  	       mgaReleaseBufLocked( mmesa, buf ); */
+	       UNLOCK_HARDWARE(mmesa);
+	       return GL_FALSE;
+	    }
+	 } else {
+	    if (!_mesa_convert_teximage( MESA_A8_R8_G8_B8,
+					 width, rows, 
+					 address, bufferpitch,
+					 width, rows, 
+					 format, type,
+					 pixels, unpack )) {
+/*  	       mgaReleaseBufLocked( mmesa, buf ); */
+	       UNLOCK_HARDWARE(mmesa);
+	       return GL_FALSE;
+	    }
+	 }
+#else
+	 MEMCPY( address, pixels, rows*bufferpitch );
+#endif
+
+	 do_draw_pix( ctx, x, y, width, rows, 
+		      bufferpitch/cpp, address, dest, planemask );
+
+	 /* Fix me -- use multiple buffers to avoid flush.
+	  */
+	 mgaUpdateLock( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT ); 
+
+	 pixels = (void *)((char *) pixels + rows * pitch);
+	 height -= rows;
+	 y += rows;
+      } while (height);
+
+/*        mgaReleaseBufLocked( mmesa, buf ); */
+   }
+
+   UNLOCK_HARDWARE( mmesa );
+   mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
+
+   return GL_TRUE;
+}
+
+
+
+
+/* Stub functions - not a real allocator, always returns pointer to
+ * the same block of agp space which isn't used for anything else at
+ * present. 
+ */
+#if defined(MESA_hacked_agp_allocator)
+static void mgaDDFreeAgpMemory( GLcontext *ctx, void *ptr )
+{
+   (void) ptr;
+}
+
+static void *mgaDDAllocateAgpMemory( GLcontext *ctx, GLsizei size )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+
+   if (size < mmesa->mgaScreen->textureSize[MGA_AGP_HEAP])
+      return mmesa->mgaScreen->texVirtual[MGA_AGP_HEAP];
+   else
+      return 0;
+}
+
+static GLint mgaDDGetAgpOffset( GLcontext *ctx, const void *ptr )
+{
+   mgaContextPtr mmesa = MGA_CONTEXT(ctx);
+
+   if (!IS_AGP_MEM(mmesa, ptr)) 
+      return -1;
+
+   return AGP_OFFSET(mmesa, ptr);
+}
+#endif
+
+
+void mgaDDInitPixelFuncs( GLcontext *ctx )
+{
+#if defined (MESA_hacked_agp_allocator)
+   ctx->Driver.AllocateAgpMemory = mgaDDAllocateAgpMemory;
+   ctx->Driver.GetAgpOffset = mgaDDGetAgpOffset;
+   ctx->Driver.FreeAgpMemory = mgaDDFreeAgpMemory;
+#endif
+   if (getenv("MGA_BLIT_PIXELS")) {
+      ctx->Driver.ReadPixels = mgaDDReadPixels; /* requires agp dest */
+      ctx->Driver.DrawPixels = mgaDDDrawPixels; /* works with agp/normal mem */
+   }
+}
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgapixel.h b/xc/lib/GL/mesa/src/drv/mga/mgapixel.h
new file mode 100644
index 000000000..d0eb5a683
--- /dev/null
+++ b/xc/lib/GL/mesa/src/drv/mga/mgapixel.h
@@ -0,0 +1,36 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.h,v 1.2 2000/08/25 13:42:28 dawes Exp $ */
+/**************************************************************************
+
+Copyright 2000 Compaq Computer Inc. and VA Linux, Inc.
+All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+on the rights to use, copy, modify, merge, publish, distribute, sub
+license, and/or sell copies of the Software, and to permit persons to whom
+the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice (including the next
+paragraph) shall be included in all copies or substantial portions of the
+Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+**************************************************************************/
+
+#ifndef MGA_PIXELS_H
+#define MGA_PIXELS_H
+
+#include "types.h"
+
+extern void mgaDDInitPixelFuncs( GLcontext *ctx );
+
+#endif
+
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaregs.h b/xc/lib/GL/mesa/src/drv/mga/mgaregs.h
index 3842ee258..6e381a9cc 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaregs.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaregs.h
@@ -1048,6 +1048,8 @@
     #define TMC_tformat_tw16 		0x3 		/* val 3, shift 0 */
     #define TMC_tformat_tw12 		0x4 		/* val 4, shift 0 */
     #define TMC_tformat_tw32 		0x6 		/* val 6, shift 0 */
+    #define TMC_tformat_tw8a 		0x7 		/* val 7, shift 0 */
+    #define TMC_tformat_tw8al 		0x8 		/* val 8, shift 0 */
     #define TMC_tformat_tw422 		0xa 		/* val 10, shift 0 */
     #define TMC_tpitchlin_MASK 		0xfffffeff 	/* bit 8 */
     #define TMC_tpitchlin_disable 	0x0 		
@@ -1162,6 +1164,7 @@
     #define TO_texorgacc_MASK 		0xfffffffd 	/* bit 1 */
     #define TO_texorgacc_pci 		0x0 		
     #define TO_texorgacc_agp 		0x2 		
+    #define TO_texorgoffsetsel 		0x4 		
     #define TO_texorg_MASK 		0x1f 		/* bits 5-31 */
     #define TO_texorg_SHIFT 		5 		
 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaspan.c b/xc/lib/GL/mesa/src/drv/mga/mgaspan.c
index 3df15ddce..dd8222d47 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaspan.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaspan.c
@@ -23,7 +23,7 @@
 			mmesa->drawOffset +		\
 			dPriv->x * mgaScreen->cpp +	\
 			dPriv->y * pitch);		\
-   GLushort p = MGA_CONTEXT( ctx )->MonoColor;		\
+   GLuint p = MGA_CONTEXT( ctx )->MonoColor;		\
    (void) read_buf; (void) buf; (void) p
    
 
@@ -36,7 +36,7 @@
    GLuint height = dPriv->h;				\
    char *buf = (char *)(sPriv->pFB +			\
 			mgaScreen->depthOffset +	\
-			dPriv->x * 2 +			\
+			dPriv->x * mgaScreen->cpp +	\
 			dPriv->y * pitch)
 
 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS 
@@ -174,7 +174,7 @@ do {								\
 }
 
 #define READ_DEPTH( d, _x, _y )		\
-   d = *(GLuint *)(buf + _x*4 + _y*pitch) >> 8;	
+   d = *(GLuint *)(buf + _x*4 + _y*pitch) & ~0xff;	
 
 
 #define TAG(x) mga##x##_24_8
@@ -225,7 +225,7 @@ void mgaDDInitSpanFuncs( GLcontext *ctx )
       ctx->Driver.ReadRGBASpan = mgaReadRGBASpan_8888;
       ctx->Driver.ReadRGBAPixels = mgaReadRGBAPixels_8888;
       
-      if (mmesa->hw_stencil) {
+      if (!mmesa->hw_stencil) {
 	 ctx->Driver.ReadDepthSpan = mgaReadDepthSpan_32;
 	 ctx->Driver.WriteDepthSpan = mgaWriteDepthSpan_32;
 	 ctx->Driver.ReadDepthPixels = mgaReadDepthPixels_32;
@@ -243,13 +243,4 @@ void mgaDDInitSpanFuncs( GLcontext *ctx )
       }
       break;
    }
-
-
-   ctx->Driver.WriteCI8Span = 0;
-   ctx->Driver.WriteCI32Span = 0;
-   ctx->Driver.WriteMonoCISpan = 0;
-   ctx->Driver.WriteCI32Pixels = 0;
-   ctx->Driver.WriteMonoCIPixels = 0;
-   ctx->Driver.ReadCI32Span = 0;
-   ctx->Driver.ReadCI32Pixels = 0;
 }
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgastate.c b/xc/lib/GL/mesa/src/drv/mga/mgastate.c
index 06b69554d..1dbf2371d 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgastate.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgastate.c
@@ -834,16 +834,8 @@ void mgaEmitHwStateLocked( mgaContextPtr mmesa )
 
    mmesa->sarea->WarpPipe = mmesa->warp_pipe;
    mmesa->sarea->vertexsize = mmesa->vertsize;
-/*     mmesa->sarea->vertexsize = 10; */
    mmesa->sarea->dirty |= mmesa->dirty;
 
-#if 0
-   if (mmesa->dirty & MGA_UPLOAD_PIPE) 
-      mgaPrintSetupFlags("warp pipe", mmesa->sarea->WarpPipe);
-/*     fprintf(stderr, "in mgaEmitHwStateLocked: dirty now %x\n", */
-/*  	   mmesa->sarea->dirty); */
-#endif
-
    mmesa->dirty &= (MGA_UPLOAD_CLIPRECTS|MGA_WAIT_AGE);
 }
 
@@ -1051,9 +1043,6 @@ void mgaDDUpdateState( GLcontext *ctx )
    if (mmesa->new_state & MGA_NEW_TEXTURE)
       mgaDDUpdateHwState( ctx );
 
-   if (0) fprintf(stderr, "fallback %x indirect %x\n", mmesa->Fallback, 
-		  mmesa->IndirectTriangles);
-   
    if (!mmesa->Fallback) {
       ctx->IndirectTriangles &= ~DD_SW_RASTERIZE;
       ctx->IndirectTriangles |= mmesa->IndirectTriangles;
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatex.c b/xc/lib/GL/mesa/src/drv/mga/mgatex.c
index 5039750de..30bc9b7fb 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgatex.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgatex.c
@@ -625,24 +625,14 @@ static void mgaDDTexSubImage( GLcontext *ctx, GLenum target,
    mgaTextureObjectPtr t;
 
    t = (mgaTextureObjectPtr) tObj->DriverData;
-
-
-   /* just free the mga texture if it exists, it will be recreated at
-      mgaUpdateTextureState time. */  
-   t = (mgaTextureObjectPtr) tObj->DriverData;
-   if ( t ) {
+   if (t) {
       if (t->bound) FLUSH_BATCH(mmesa);
-      /* if this is the current object, it will force an update */
-      mgaDestroyTexObj( mmesa, t );
-      mmesa->new_state |= MGA_NEW_TEXTURE;
+      LOCK_HARDWARE( mmesa );
+      /* the texture currently exists, so directly update it */
+      mgaUploadSubImageLocked( mmesa, t, level, 
+			       xoffset, yoffset, width, height );
+      UNLOCK_HARDWARE( mmesa );
    }
-
-
-
-#if 0
-   /* the texture currently exists, so directly update it */
-   mgaUploadSubImage( t, level, xoffset, yoffset, width, height );
-#endif
 }
 
 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatex.h b/xc/lib/GL/mesa/src/drv/mga/mgatex.h
index 02e95f59f..bae170829 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgatex.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgatex.h
@@ -40,14 +40,15 @@ typedef struct mga_texture_object_s *mgaTextureObjectPtr;
  */
 void mgaUpdateTextureState( GLcontext *ctx );
 
-
-/* Driver functions which are called directly from mesa */
-
 void mgaConvertTexture( GLuint *dest, int texelBytes,
 			struct gl_texture_image *image,
 			int x, int y, int width, int height );
 
 
+void mgaUploadSubImageLocked( mgaContextPtr mmesa,
+			      mgaTextureObjectPtr t,
+			      int level,	     
+			      int x, int y, int width, int height );
 
 int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t );
 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatexmem.c b/xc/lib/GL/mesa/src/drv/mga/mgatexmem.c
index 9d328f064..57a3a3cb7 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgatexmem.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgatexmem.c
@@ -257,10 +257,10 @@ void mgaAgeTextures( mgaContextPtr mmesa, int heap )
  *
  * Performed with the hardware lock held.
  */
-static void mgaUploadSubImageLocked( mgaContextPtr mmesa,
-				     mgaTextureObjectPtr t,
-				     int level,	     
-				     int x, int y, int width, int height ) 
+void mgaUploadSubImageLocked( mgaContextPtr mmesa,
+			      mgaTextureObjectPtr t,
+			      int level,	     
+			      int x, int y, int width, int height ) 
 {
    int		x2;
    int		dwords;
@@ -387,13 +387,12 @@ static void mgaUploadTexLevel( mgaContextPtr mmesa,
 			       mgaTextureObjectPtr t,
 			       int l )
 {
-/*     return; */
-	mgaUploadSubImageLocked( mmesa,
-				 t,
-				 l,
-				 0, 0,
-				 t->tObj->Image[l]->Width,
-				 t->tObj->Image[l]->Height);
+   mgaUploadSubImageLocked( mmesa,
+			    t,
+			    l,
+			    0, 0,
+			    t->tObj->Image[l]->Width,
+			    t->tObj->Image[l]->Height);
 }
 
 
@@ -435,16 +434,14 @@ int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t )
 	    break;
 
 	 if (mmesa->TexObjList[heap].prev->bound) {
-	    fprintf(stderr, 
-		    "Hit bound texture in upload\n"); 
+	    fprintf(stderr, "Hit bound texture in upload\n"); 
 	    return -1;
 	 }
 
 	 if (mmesa->TexObjList[heap].prev == 
 	     &(mmesa->TexObjList[heap])) 
 	 {
-	    fprintf(stderr, "Failed to upload texture, "
-		    "sz %d\n", t->totalSize);
+	    fprintf(stderr, "Failed to upload texture, sz %d\n", t->totalSize);
 	    mmDumpMemInfo( mmesa->texHeap[heap] );
 	    return -1;
 	 }
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatris.c b/xc/lib/GL/mesa/src/drv/mga/mgatris.c
index d842e5252..cd051bf26 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgatris.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgatris.c
@@ -129,7 +129,7 @@ void mgaDDTrifuncInit()
 
 
 
-#define ALL_FALLBACK (DD_MULTIDRAW | DD_SELECT | DD_FEEDBACK)
+#define ALL_FALLBACK (DD_SELECT | DD_FEEDBACK)
 #define POINT_FALLBACK (ALL_FALLBACK | DD_POINT_SMOOTH)
 #define LINE_FALLBACK (ALL_FALLBACK | DD_LINE_SMOOTH | DD_LINE_STIPPLE)
 #define TRI_FALLBACK (ALL_FALLBACK | DD_TRI_SMOOTH | DD_TRI_UNFILLED)
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatris.h b/xc/lib/GL/mesa/src/drv/mga/mgatris.h
index 0c27ab43d..f50c83974 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgatris.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgatris.h
@@ -41,92 +41,15 @@ extern void mgaDDTrifuncInit( void );
 #define MGA_NODRAW_BIT	    0x8
 #define MGA_FALLBACK_BIT    0x10
 
-extern int nrswaps;
-
-
-#define VERTSIZE vertsize
-
-/*  static float _v0[] = { */
-/*     242.202515, */
-/*     250.469604, */
-/*     0.961081, */
-/*     0.013503, */
-/*     0, */
-/*     0.000000, */
-/*     2.600000, */
-/*     0.000000, */
-/*     1.000000, */
-/*     0.600000 */
-/*  }; */
-
-/*  static float _v1[] = { */
-/*     246.448914, */
-/*     54.697876, */
-/*     0.953817, */
-/*     0.014156, */
-/*     0, */
-/*     0.000000, */
-/*     2.600000, */
-/*     2.000000, */
-/*     1.000000, */
-/*     1.600000 */
-/*  }; */
-
-/*  static float _v2[] = { */
-/*     55.999474, */
-/*     85.196106, */
-/*     0.942609, */
-/*     0.015165, */
-/*     0, */
-/*     0.000000, */
-/*     0.600000, */
-/*     2.000000, */
-/*     0.000000, */
-/*     1.600000, */
-/*  }; */
-
 static __inline void mga_draw_triangle( mgaContextPtr mmesa,
 				      mgaVertex *v0, 
 				      mgaVertex *v1, 
 				      mgaVertex *v2 )
 {
    GLuint vertsize = mmesa->vertsize;
-   GLuint *wv = mgaAllocVertexDwordsInline( mmesa, 3 * VERTSIZE );
+   GLuint *wv = mgaAllocVertexDwordsInline( mmesa, 3 * vertsize );
    int j;
 
-   (void) vertsize;
-
-/*     for (j = 0 ; j < vertsize ; j++)  */
-/*        fprintf(stderr, "v0 %d: %f 0x%x\n", j, v0->f[j], v0->ui[j]); */
-
-/*     for (j = 0 ; j < vertsize ; j++)  */
-/*        fprintf(stderr, "v1 %d: %f 0x%x\n", j, v1->f[j], v1->ui[j]); */
-
-/*     for (j = 0 ; j < vertsize ; j++)  */
-/*        fprintf(stderr, "v2 %d: %f 0x%x\n", j, v2->f[j], v2->ui[j]); */
-
-/*     v0 = (mgaVertex *)_v0; */
-/*     v1 = (mgaVertex *)_v1; */
-/*     v2 = (mgaVertex *)_v2; */
-
-
-/*     if (v0->v.x < 0 || v0->v.x > 1920 || */
-/*         v0->v.y < 0 || v0->v.y > 1440 || */
-/*         v0->v.z < 0 || v0->v.z > 1)  */
-/*        fprintf(stderr, "v0 %f %f %f %f\n", v0->v.x, v0->v.y, v0->v.z, v0->v.rhw); */
-
-
-/*     if (v1->v.x < 0 || v1->v.x > 1920 || */
-/*         v1->v.y < 0 || v1->v.y > 1440 || */
-/*         v1->v.z < 0 || v1->v.z > 1)  */
-/*        fprintf(stderr, "v1 %f %f %f %f\n", v1->v.x, v1->v.y, v1->v.z, v1->v.rhw); */
-
-/*     if (v2->v.x < 0 || v2->v.x > 1920 || */
-/*         v2->v.y < 0 || v2->v.y > 1440 || */
-/*         v2->v.z < 0 || v2->v.z > 1)  */
-/*        fprintf(stderr, "v2 %f %f %f %f\n", v2->v.x, v2->v.y, v2->v.z, v2->v.rhw); */
-      
-
 #if defined (USE_X86_ASM)
    /* GTH: We can safely assume the vertex stride is some number of
     * dwords, and thus a "rep movsd" is okay.  The vb pointer is
@@ -135,26 +58,26 @@ static __inline void mga_draw_triangle( mgaContextPtr mmesa,
     */
       __asm__ __volatile__( "rep ; movsl"
 			    : "=%c" (j)
-			    : "0" (VERTSIZE), "D" ((long)wv), "S" ((long)v0)
+			    : "0" (vertsize), "D" ((long)wv), "S" ((long)v0)
 			    : "memory" );
       __asm__ __volatile__( "rep ; movsl"
 			    : "=%c" (j)
-			    : "0" (VERTSIZE), "S" ((long)v1)
+			    : "0" (vertsize), "S" ((long)v1)
 			    : "memory" );
       __asm__ __volatile__( "rep ; movsl"
 			    : "=%c" (j)
-			    : "0" (VERTSIZE), "S" ((long)v2)
+			    : "0" (vertsize), "S" ((long)v2)
 			    : "memory" );
 #else
    {
       for (j = 0 ; j < vertsize ; j++) 
 	 wv[j] = v0->ui[j];
 
-      wv += VERTSIZE;
+      wv += vertsize;
       for (j = 0 ; j < vertsize ; j++) 
 	 wv[j] = v1->ui[j];
 
-      wv += VERTSIZE;
+      wv += vertsize;
       for (j = 0 ; j < vertsize ; j++) 
 	 wv[j] = v2->ui[j];
    }
@@ -166,38 +89,38 @@ static __inline void mga_draw_point( mgaContextPtr mmesa,
 				   mgaVertex *tmp, float sz )
 {
    GLuint vertsize = mmesa->vertsize;
-   GLuint *wv = mgaAllocVertexDwords( mmesa, 6*VERTSIZE);
+   GLuint *wv = mgaAllocVertexDwords( mmesa, 6*vertsize);
    int j;
 
    *(float *)&wv[0] = tmp->v.x - sz;
    *(float *)&wv[1] = tmp->v.y - sz;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp->v.x + sz;
    *(float *)&wv[1] = tmp->v.y - sz;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp->v.x + sz;
    *(float *)&wv[1] = tmp->v.y + sz;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp->v.x + sz;
    *(float *)&wv[1] = tmp->v.y + sz;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp->v.x - sz;
    *(float *)&wv[1] = tmp->v.y + sz;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp->v.x - sz;
    *(float *)&wv[1] = tmp->v.y - sz;
@@ -212,7 +135,7 @@ static __inline void mga_draw_line( mgaContextPtr mmesa,
 				  float width )
 {
    GLuint vertsize = mmesa->vertsize;
-   GLuint *wv = mgaAllocVertexDwords( mmesa, 6 * VERTSIZE );
+   GLuint *wv = mgaAllocVertexDwords( mmesa, 6 * vertsize );
    float dx, dy, ix, iy;
    int j;
 
@@ -232,37 +155,37 @@ static __inline void mga_draw_line( mgaContextPtr mmesa,
    *(float *)&wv[1] = tmp0->v.y - iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp0->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp1->v.x + ix;
    *(float *)&wv[1] = tmp1->v.y + iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp1->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp0->v.x + ix;
    *(float *)&wv[1] = tmp0->v.y + iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp0->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 	 
    *(float *)&wv[0] = tmp0->v.x - ix;
    *(float *)&wv[1] = tmp0->v.y - iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp0->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp1->v.x - ix;
    *(float *)&wv[1] = tmp1->v.y - iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp1->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 
    *(float *)&wv[0] = tmp1->v.x + ix;
    *(float *)&wv[1] = tmp1->v.y + iy;
    for (j = 2 ; j < vertsize ; j++) 
       wv[j] = tmp1->ui[j];
-   wv += VERTSIZE;
+   wv += vertsize;
 }
 
 
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgavb.c b/xc/lib/GL/mesa/src/drv/mga/mgavb.c
index 75073a8c6..ae6316fc8 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgavb.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgavb.c
@@ -297,11 +297,6 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx)
 	 mmesa->tmu_source[0] = 1;
 	 mmesa->tex_dest[1] = MGA_TEX0_BIT;
 
-         /* This doesn't work for non-RGBA textures
-	 if (ctx->Texture.Unit[1].EnvMode == GL_REPLACE)
-	    funcindex &= ~MGA_RGBA_BIT;
-         */
-
 	 if (ctx->Texture.Unit[0].EnvMode == GL_BLEND &&
 	     mmesa->envcolor) 
 	 {
@@ -315,15 +310,6 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx)
       }
    }
 
-/*       if (mmesa->multitex == 0) {  */
-/*          mmesa->tmu_source[1] = mmesa->tmu_source[0];  */
-/*          mmesa->tex_dest[1] = mmesa->tex_dest[0];  */
-/*          mmesa->vertsize = 10;  */
-/*          mmesa->multitex = 1;  */
-/*          funcindex |= MGA_TEX0_BIT|MGA_TEX1_BIT;  */
-/*       }  */
-
-/*     mmesa->vertsize = 10; */
    if (multi != mmesa->multitex)
         mmesa->new_state |= MGA_NEW_WARP; 
 
@@ -424,7 +410,7 @@ void mgaDDDoRasterSetup( struct vertex_buffer *VB )
 
    /* Can't lock, won't lock
     */
-   REFRESH_DRAWABLE_INFO( mmesa );
+/*     REFRESH_DRAWABLE_INFO( mmesa ); */
 
    if (VB->Type == VB_CVA_PRECALC) 
       mgaDDPartialRasterSetup( VB );
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_context.c b/xc/lib/GL/mesa/src/drv/r128/r128_context.c
index 53b8390d4..03b871538 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_context.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_context.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.c,v 1.4 2000/12/12 17:17:06 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.c,v 1.4 2000/12/12 17:17:06 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_context.h b/xc/lib/GL/mesa/src/drv/r128/r128_context.h
index 9210a11f8..46ddcff3b 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_context.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_context.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.h,v 1.4 2000/12/12 17:17:06 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_context.h,v 1.4 2000/12/12 17:17:06 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_dd.c b/xc/lib/GL/mesa/src/drv/r128/r128_dd.c
index c97020042..67a548339 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_dd.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_dd.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_dd.c,v 1.6 2000/12/15 22:48:38 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_dd.c,v 1.6 2000/12/15 22:48:38 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_dd.h b/xc/lib/GL/mesa/src/drv/r128/r128_dd.h
index 61c4a8c8d..005949053 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_dd.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_dd.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_dd.h,v 1.2 2000/12/04 19:21:45 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_dd.h,v 1.2 2000/12/04 19:21:45 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c b/xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c
index 2c0b188b8..74c29812f 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c,v 1.2 2000/12/07 20:26:08 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_eltpath.c,v 1.2 2000/12/07 20:26:08 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h b/xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h
index c60de247b..e477bd7b9 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_elttmp.h,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c
index da7c64458..df382c641 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c,v 1.4 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c,v 1.4 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h b/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h
index 963122d85..8a7cef504 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h,v 1.2 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h,v 1.2 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
index d079f7f09..713edcd32 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c,v 1.2 2000/12/12 17:17:07 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c,v 1.2 2000/12/12 17:17:07 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
index 7a4ed3b85..aafd0859b 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_lock.c b/xc/lib/GL/mesa/src/drv/r128/r128_lock.c
index d9505fa94..8fdef0d95 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_lock.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_lock.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_lock.c,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_lock.c,v 1.1 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_lock.h b/xc/lib/GL/mesa/src/drv/r128/r128_lock.h
index b134a7a35..2da57bb44 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_lock.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_lock.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_lock.h,v 1.3 2000/12/07 15:43:37 tsi Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_lock.h,v 1.3 2000/12/07 15:43:37 tsi Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c
index dc0744336..e42fa4075 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h
index 0ef24a7fa..5e40bd6f6 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_screen.c b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
index 288c800c5..029ccd4ca 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_screen.c,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_screen.c,v 1.3 2000/12/04 19:21:46 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_screen.h b/xc/lib/GL/mesa/src/drv/r128/r128_screen.h
index ed1140043..b3e6259e8 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_screen.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_screen.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_screen.h,v 1.3 2000/12/04 19:21:47 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_screen.h,v 1.3 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_span.c b/xc/lib/GL/mesa/src/drv/r128/r128_span.c
index 1bf217e78..f0d7c318f 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_span.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_span.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_span.c,v 1.4 2000/12/12 17:17:07 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,12 +25,12 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_span.c,v 1.4 2000/12/12 17:17:07 dawes Exp $ */
 
 /*
  * Authors:
  *   Gareth Hughes <gareth@valinux.com>
  *   Keith Whitwell <keithw@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_span.h b/xc/lib/GL/mesa/src/drv/r128/r128_span.h
index 3a602ba5d..fefa5bd67 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_span.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_span.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_span.h,v 1.2 2000/12/04 19:21:47 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_span.h,v 1.2 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_state.c b/xc/lib/GL/mesa/src/drv/r128/r128_state.c
index be91952fa..18a6f25e3 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_state.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_state.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_state.c,v 1.6 2000/12/12 17:17:07 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,11 +25,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_state.c,v 1.6 2000/12/12 17:17:07 dawes Exp $ */
 
 /*
  * Authors:
  *   Gareth Hughes <gareth@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *   Keith Whitwell <keithw@valinux.com>
  *
  */
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_state.h b/xc/lib/GL/mesa/src/drv/r128/r128_state.h
index c1a01530a..97b01c7fa 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_state.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_state.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_state.h,v 1.2 2000/12/04 19:21:47 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_state.h,v 1.2 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tex.c b/xc/lib/GL/mesa/src/drv/r128/r128_tex.c
index f5efdf913..da06d4ed5 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_tex.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_tex.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tex.c,v 1.6 2000/12/04 19:21:47 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tex.c,v 1.6 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tex.h b/xc/lib/GL/mesa/src/drv/r128/r128_tex.h
index 842720b3c..92d4c4e3f 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_tex.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_tex.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tex.h,v 1.3 2000/12/12 17:17:08 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tex.h,v 1.3 2000/12/12 17:17:08 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tris.c b/xc/lib/GL/mesa/src/drv/r128/r128_tris.c
index 4faadcea1..aeddb8f95 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_tris.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_tris.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tris.c,v 1.3 2000/12/04 19:21:47 dawes Exp $ */ /* -*- c-basic-offset: 3 -*- */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tris.c,v 1.3 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tris.h b/xc/lib/GL/mesa/src/drv/r128/r128_tris.h
index 3ff91a350..fac43f3ce 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_tris.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_tris.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tris.h,v 1.3 2000/12/04 19:21:47 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tris.h,v 1.3 2000/12/04 19:21:47 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h b/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h
index 91fbd027f..52a63e628 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h,v 1.4 2000/12/04 22:46:01 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h,v 1.4 2000/12/04 22:46:01 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_vb.c b/xc/lib/GL/mesa/src/drv/r128/r128_vb.c
index 9b13a481f..3ebacd027 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_vb.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_vb.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_vb.c,v 1.10 2000/12/12 17:17:08 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_vb.c,v 1.10 2000/12/12 17:17:08 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_vb.h b/xc/lib/GL/mesa/src/drv/r128/r128_vb.h
index 370c40c3f..2e33dcc1b 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_vb.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_vb.h
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_vb.h,v 1.3 2000/12/04 19:21:48 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_vb.h,v 1.3 2000/12/04 19:21:48 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c
index fc0c93143..31ba8afba 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c
@@ -1,3 +1,4 @@
+/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c,v 1.4 2000/12/12 17:17:08 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
@@ -24,7 +25,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c,v 1.4 2000/12/12 17:17:08 dawes Exp $ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
index d50270e05..2ead8e213 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
index 502c088eb..be3fef41e 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.c
index 313d00b8f..b86506a8d 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.h
index 04ad93c1b..98dd22fae 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_dd.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_eltpath.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_eltpath.c
index 2957083e2..a2bf4e1f5 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_eltpath.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_eltpath.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,7 +26,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_elttmp.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_elttmp.h
index 36eeb8ae3..1fa8f60b9 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_elttmp.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_elttmp.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,7 +26,6 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_fastpath.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_fastpath.c
index 7c32a0f15..b5437e7f9 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_fastpath.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_fastpath.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,13 +26,12 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
  *   Keith Whitwell <keithw@valinux.com>
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_fasttmp.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_fasttmp.h
index 333ef5a13..a7bc8e9ca 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_fasttmp.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_fasttmp.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,13 +26,12 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
  *   Keith Whitwell <keithw@valinux.com>
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
index 22ad27962..9845732c8 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
index eae491b97..ceb9225da 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.c
index b95123ba0..583fd6dfe 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.h
index b36a8112a..966f7c80f 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_lock.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.c
index a0bc906df..1c4175575 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.h
index 19ad42eff..01d5cd884 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_pipeline.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
index 38cfeacd3..dea4bb1ef 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
index 10e77f8ec..4aeb5d73f 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_span.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_span.c
index 69fc1870a..75f7a1396 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_span.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_span.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,13 +26,12 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
+ *   Kevin E. Martin <martin@valinux.com>
  *   Gareth Hughes <gareth@valinux.com>
  *   Keith Whitwell <keithw@valinux.com>
- *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_span.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_span.h
index f7344b67e..e9cb056b8 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_span.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_span.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
index 4c87ed7aa..7aa4bc6f6 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,13 +26,12 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
+ *   Kevin E. Martin <martin@valinux.com>
  *   Gareth Hughes <gareth@valinux.com>
  *   Keith Whitwell <keithw@valinux.com>
- *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.h
index 8d2cd1e62..1be2977af 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.c
index 9accb6c3b..5cc4aabef 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.h
index 8132f7447..6bf967761 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_tex.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_texobj.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_texobj.h
index 371d241ec..b63d5c6a7 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_texobj.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_texobj.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c
index 873696b77..71ed6910b 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.h
index 8a77de803..5694d5cf1 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tritmp.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_tritmp.h
index bfdca9077..ed5006ea2 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tritmp.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_tritmp.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c
index c3421c5d9..bf2255f74 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.h
index 31ed393b1..42329c002 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.h
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_xmesa.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_xmesa.c
index 4d79f770c..e4ff4301f 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_xmesa.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_xmesa.c
@@ -1,7 +1,8 @@
+/* $XFree86$ */
 /**************************************************************************
 
-Copyright 2000 ATI Technologies Inc., Ontario, Canada, and
-               VA Linux Systems Inc., Fremont, California.
+Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
+                     VA Linux Systems Inc., Fremont, California.
 
 All Rights Reserved.
 
@@ -25,12 +26,11 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86$ */
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/lib/GL/mesa/src/drv/sis/sis_alloc.c b/xc/lib/GL/mesa/src/drv/sis/sis_alloc.c
index 1caa57200..e166aa96f 100644
--- a/xc/lib/GL/mesa/src/drv/sis/sis_alloc.c
+++ b/xc/lib/GL/mesa/src/drv/sis/sis_alloc.c
@@ -40,7 +40,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #if defined(XFree86Server) && !defined(XF86DRI)
 # include "xf86fbman.h"
 #else
+# define CONFIG_DRM_SIS
 # include "drm.h"
+# undef CONFIG_DRM_SIS
 # include "sis_drm.h"
 # include <sys/ioctl.h>
 #endif
diff --git a/xc/programs/Xserver/hw/kdrive/trident/trident.c b/xc/programs/Xserver/hw/kdrive/trident/trident.c
index 9257b8449..88f797b7f 100644
--- a/xc/programs/Xserver/hw/kdrive/trident/trident.c
+++ b/xc/programs/Xserver/hw/kdrive/trident/trident.c
@@ -1,6 +1,4 @@
 /*
- * $Id: trident.c,v 1.1.1.7.2.1 2000/12/23 06:47:40 gareth Exp $
- *
  * Copyright © 1999 Keith Packard
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
index cba0b3cea..342e7f8cf 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
@@ -276,7 +276,7 @@ InstallDriverSDKNonExecFile(radeon_misc.c,$(DRIVERSDKDIR)/drivers/ati)
 InstallDriverSDKNonExecFile(radeon_probe.c,$(DRIVERSDKDIR)/drivers/ati)
 InstallDriverSDKNonExecFile(radeon_probe.h,$(DRIVERSDKDIR)/drivers/ati)
 InstallDriverSDKNonExecFile(radeon_reg.h,$(DRIVERSDKDIR)/drivers/ati)
-InstallDriverSDKNonExecFile(radeon_sarea.c,$(DRIVERSDKDIR)/drivers/ati)
+InstallDriverSDKNonExecFile(radeon_sarea.h,$(DRIVERSDKDIR)/drivers/ati)
 InstallDriverSDKNonExecFile(radeon_version.h,$(DRIVERSDKDIR)/drivers/ati)
 InstallDriverSDKNonExecFile(radeon_video.c,$(DRIVERSDKDIR)/drivers/ati)
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
index 3d5f8b81a..54bfa3673 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
@@ -35,8 +35,8 @@
  *
  */
 
-#ifndef __R128_SAREA_H__
-#define __R128_SAREA_H__
+#ifndef _R128_SAREA_H_
+#define _R128_SAREA_H_
 
 #include "Xmd.h"
 
@@ -104,54 +104,54 @@
 #endif /* __R128_SAREA_DEFINES__ */
 
 typedef struct {
-   /* Context state - can be written in one large chunk */
-   unsigned int dst_pitch_offset_c;
-   unsigned int dp_gui_master_cntl_c;
-   unsigned int sc_top_left_c;
-   unsigned int sc_bottom_right_c;
-   unsigned int z_offset_c;
-   unsigned int z_pitch_c;
-   unsigned int z_sten_cntl_c;
-   unsigned int tex_cntl_c;
-   unsigned int misc_3d_state_cntl_reg;
-   unsigned int texture_clr_cmp_clr_c;
-   unsigned int texture_clr_cmp_msk_c;
-   unsigned int fog_color_c;
-
-   /* Texture state */
-   unsigned int tex_size_pitch_c;
-   unsigned int constant_color_c;
-
-   /* Setup state */
-   unsigned int pm4_vc_fpu_setup;
-   unsigned int setup_cntl;
-
-   /* Mask state */
-   unsigned int dp_write_mask;
-   unsigned int sten_ref_mask_c;
-   unsigned int plane_3d_mask_c;
-
-   /* Window state */
-   unsigned int window_xy_offset;
-
-   /* Core state */
-   unsigned int scale_3d_cntl;
+    /* Context state - can be written in one large chunk */
+    unsigned int dst_pitch_offset_c;
+    unsigned int dp_gui_master_cntl_c;
+    unsigned int sc_top_left_c;
+    unsigned int sc_bottom_right_c;
+    unsigned int z_offset_c;
+    unsigned int z_pitch_c;
+    unsigned int z_sten_cntl_c;
+    unsigned int tex_cntl_c;
+    unsigned int misc_3d_state_cntl_reg;
+    unsigned int texture_clr_cmp_clr_c;
+    unsigned int texture_clr_cmp_msk_c;
+    unsigned int fog_color_c;
+
+    /* Texture state */
+    unsigned int tex_size_pitch_c;
+    unsigned int constant_color_c;
+
+    /* Setup state */
+    unsigned int pm4_vc_fpu_setup;
+    unsigned int setup_cntl;
+
+    /* Mask state */
+    unsigned int dp_write_mask;
+    unsigned int sten_ref_mask_c;
+    unsigned int plane_3d_mask_c;
+
+    /* Window state */
+    unsigned int window_xy_offset;
+
+    /* Core state */
+    unsigned int scale_3d_cntl;
 } r128_context_regs_t;
 
 /* Setup registers for each texture unit
  */
 typedef struct {
-   unsigned int tex_cntl;
-   unsigned int tex_combine_cntl;
-   unsigned int tex_size_pitch;
-   unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
-   unsigned int tex_border_color;
+    unsigned int tex_cntl;
+    unsigned int tex_combine_cntl;
+    unsigned int tex_size_pitch;
+    unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
+    unsigned int tex_border_color;
 } r128_texture_regs_t;
 
 typedef struct {
-   unsigned char next, prev;	/* indices to form a circular LRU  */
-   unsigned char in_use;	/* owned by a client, or free? */
-   int age;			/* tracked by clients to update local LRU's */
+    unsigned char next, prev;	/* indices to form a circular LRU  */
+    unsigned char in_use;	/* owned by a client, or free? */
+    int age;			/* tracked by clients to update local LRU's */
 } r128_tex_region_t;
 
 typedef struct {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
index 26da62ba1..0f8042853 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
@@ -502,8 +502,8 @@ static void RADEONSetupForDashedLine(ScrnInfoPtr pScrn,
 
 /* Subsequent XAA dashed line. */
 static void RADEONSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
-					       int x1, int y1,
-					       int x2, int y2,
+					       int xa, int ya,
+					       int xb, int yb,
 					       int flags,
 					       int phase)
 {
@@ -511,16 +511,16 @@ static void RADEONSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
     unsigned char *RADEONMMIO = info->MMIO;
     int           direction   = 0;
 
-    if (x1 < x2) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
-    if (y1 < y2) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
+    if (xa < xb) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
+    if (ya < yb) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
 
     RADEONWaitForFifo(pScrn, 5);
     if (!(flags & OMIT_LAST))
 	OUTREG(RADEON_DP_CNTL_XDIR_YDIR_YMAJOR, direction);
-    OUTREG(RADEON_DST_Y_X,          (y1 << 16) | x1);
+    OUTREG(RADEON_DST_Y_X,          (ya << 16) | xa);
     OUTREG(RADEON_BRUSH_Y_X,        (phase << 16) | phase);
-    OUTREG(RADEON_DST_LINE_START,   (y1 << 16) | x1);
-    OUTREG(RADEON_DST_LINE_END,     (y2 << 16) | x2);
+    OUTREG(RADEON_DST_LINE_START,   (ya << 16) | xa);
+    OUTREG(RADEON_DST_LINE_END,     (yb << 16) | xb);
 }
 
 /* Setup for XAA screen-to-screen copy.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
index 5e3007ba2..8853603ac 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
@@ -1416,8 +1416,8 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 static void
 RADEONBlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
 {
-    ScreenPtr   pScreen = screenInfo.screens[i];
-    ScrnInfoPtr pScrn   = xf86Screens[i];
+    ScreenPtr     pScreen = screenInfo.screens[i];
+    ScrnInfoPtr   pScrn   = xf86Screens[i];
     RADEONInfoPtr info    = RADEONPTR(pScrn);
 
     pScreen->BlockHandler = info->BlockHandler;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
index acd480709..14cb002fd 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
@@ -29,13 +29,13 @@
 
 /*
  * Authors:
- *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
+ *   Gareth Hughes <gareth@valinux.com>
  *
  */
 
-#ifndef __RADEON_SAREA_H__
-#define __RADEON_SAREA_H__
+#ifndef _RADEON_SAREA_H_
+#define _RADEON_SAREA_H_
 
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the kernel file (radeon_drm.h)
@@ -116,146 +116,146 @@
 #endif /* __RADEON_SAREA_DEFINES__ */
 
 typedef struct {
-   unsigned int red;
-   unsigned int green;
-   unsigned int blue;
-   unsigned int alpha;
+    unsigned int red;
+    unsigned int green;
+    unsigned int blue;
+    unsigned int alpha;
 } radeon_color_regs_t;
 
 typedef struct {
-   /* Context state */
-   unsigned int pp_misc;
-   unsigned int pp_fog_color;
-   unsigned int re_solid_color;
-   unsigned int rb3d_blendcntl;
-   unsigned int rb3d_depthoffset;
-   unsigned int rb3d_depthpitch;
-   unsigned int rb3d_zstencilcntl;
-
-   unsigned int pp_cntl;
-   unsigned int rb3d_cntl;
-   unsigned int rb3d_coloroffset;
-   unsigned int re_width_height;
-   unsigned int rb3d_colorpitch;
-   unsigned int se_cntl;
-
-   /* Vertex format state */
-   unsigned int se_coord_fmt;
-
-   /* Line state */
-   unsigned int re_line_pattern;
-   unsigned int re_line_state;
-
-   unsigned int se_line_width;
-
-   /* Bumpmap state */
-   unsigned int pp_lum_matrix;
-
-   unsigned int pp_rot_matrix_0;
-   unsigned int pp_rot_matrix_1;
-
-   /* Mask state */
-   unsigned int rb3d_stencilrefmask;
-   unsigned int rb3d_ropcntl;
-   unsigned int rb3d_planemask;
-
-   /* Viewport state */
-   unsigned int se_vport_xscale;
-   unsigned int se_vport_xoffset;
-   unsigned int se_vport_yscale;
-   unsigned int se_vport_yoffset;
-   unsigned int se_vport_zscale;
-   unsigned int se_vport_zoffset;
+    /* Context state */
+    unsigned int pp_misc;
+    unsigned int pp_fog_color;
+    unsigned int re_solid_color;
+    unsigned int rb3d_blendcntl;
+    unsigned int rb3d_depthoffset;
+    unsigned int rb3d_depthpitch;
+    unsigned int rb3d_zstencilcntl;
+
+    unsigned int pp_cntl;
+    unsigned int rb3d_cntl;
+    unsigned int rb3d_coloroffset;
+    unsigned int re_width_height;
+    unsigned int rb3d_colorpitch;
+    unsigned int se_cntl;
+
+    /* Vertex format state */
+    unsigned int se_coord_fmt;
+
+    /* Line state */
+    unsigned int re_line_pattern;
+    unsigned int re_line_state;
+
+    unsigned int se_line_width;
+
+    /* Bumpmap state */
+    unsigned int pp_lum_matrix;
+
+    unsigned int pp_rot_matrix_0;
+    unsigned int pp_rot_matrix_1;
+
+    /* Mask state */
+    unsigned int rb3d_stencilrefmask;
+    unsigned int rb3d_ropcntl;
+    unsigned int rb3d_planemask;
+
+    /* Viewport state */
+    unsigned int se_vport_xscale;
+    unsigned int se_vport_xoffset;
+    unsigned int se_vport_yscale;
+    unsigned int se_vport_yoffset;
+    unsigned int se_vport_zscale;
+    unsigned int se_vport_zoffset;
 
     /* Setup state */
-   unsigned int se_cntl_status;
+    unsigned int se_cntl_status;
 
 #ifdef TCL_ENABLE
-   /* TCL state */
-   radeon_color_regs_t se_tcl_material_emmissive;
-   radeon_color_regs_t se_tcl_material_ambient;
-   radeon_color_regs_t se_tcl_material_diffuse;
-   radeon_color_regs_t se_tcl_material_specular;
-   unsigned int se_tcl_shininess;
-   unsigned int se_tcl_output_vtx_fmt;
-   unsigned int se_tcl_output_vtx_sel;
-   unsigned int se_tcl_matrix_select_0;
-   unsigned int se_tcl_matrix_select_1;
-   unsigned int se_tcl_ucp_vert_blend_ctl;
-   unsigned int se_tcl_texture_proc_ctl;
-   unsigned int se_tcl_light_model_ctl;
-   unsigned int se_tcl_per_light_ctl[4];
+    /* TCL state */
+    radeon_color_regs_t se_tcl_material_emmissive;
+    radeon_color_regs_t se_tcl_material_ambient;
+    radeon_color_regs_t se_tcl_material_diffuse;
+    radeon_color_regs_t se_tcl_material_specular;
+    unsigned int se_tcl_shininess;
+    unsigned int se_tcl_output_vtx_fmt;
+    unsigned int se_tcl_output_vtx_sel;
+    unsigned int se_tcl_matrix_select_0;
+    unsigned int se_tcl_matrix_select_1;
+    unsigned int se_tcl_ucp_vert_blend_ctl;
+    unsigned int se_tcl_texture_proc_ctl;
+    unsigned int se_tcl_light_model_ctl;
+    unsigned int se_tcl_per_light_ctl[4];
 #endif
 
-   /* Misc state */
-   unsigned int re_top_left;
-   unsigned int re_misc;
+    /* Misc state */
+    unsigned int re_top_left;
+    unsigned int re_misc;
 } radeon_context_regs_t;
 
 /* Setup registers for each texture unit */
 typedef struct {
-   unsigned int pp_txfilter;
-   unsigned int pp_txformat;
-   unsigned int pp_txoffset;
-   unsigned int pp_txcblend;
-   unsigned int pp_txablend;
-   unsigned int pp_tfactor;
+    unsigned int pp_txfilter;
+    unsigned int pp_txformat;
+    unsigned int pp_txoffset;
+    unsigned int pp_txcblend;
+    unsigned int pp_txablend;
+    unsigned int pp_tfactor;
 
-   unsigned int pp_border_color;
+    unsigned int pp_border_color;
 
 #ifdef CUBIC_ENABLE
-   unsigned int pp_cubic_faces;
-   unsigned int pp_cubic_offset[5];
+    unsigned int pp_cubic_faces;
+    unsigned int pp_cubic_offset[5];
 #endif
 } radeon_texture_regs_t;
 
 typedef struct {
-   unsigned char next, prev;	/* indices to form a circular LRU  */
-   unsigned char in_use;	/* owned by a client, or free? */
-   int age;			/* tracked by clients to update local LRU's */
+    unsigned char next, prev;	/* indices to form a circular LRU  */
+    unsigned char in_use;	/* owned by a client, or free? */
+    int age;			/* tracked by clients to update local LRU's */
 } radeon_tex_region_t;
 
 typedef struct {
-   /* The channel for communication of state information to the kernel
-    * on firing a vertex buffer.
-    */
-   radeon_context_regs_t ContextState;
-   radeon_texture_regs_t TexState[RADEON_MAX_TEXTURE_UNITS];
-   unsigned int dirty;
-   unsigned int vertsize;
-   unsigned int vc_format;
-
-   /* The current cliprects, or a subset thereof
-    */
-   XF86DRIClipRectRec boxes[RADEON_NR_SAREA_CLIPRECTS];
-   unsigned int nbox;
-
-   /* Counters for throttling of rendering clients
-    */
-   unsigned int last_frame;
-   unsigned int last_dispatch;
-   unsigned int last_clear;
-
-   /* Maintain an LRU of contiguous regions of texture space.  If you
-    * think you own a region of texture memory, and it has an age
-    * different to the one you set, then you are mistaken and it has
-    * been stolen by another client.  If global texAge hasn't changed,
-    * there is no need to walk the list.
-    *
-    * These regions can be used as a proxy for the fine-grained texture
-    * information of other clients - by maintaining them in the same
-    * lru which is used to age their own textures, clients have an
-    * approximate lru for the whole of global texture space, and can
-    * make informed decisions as to which areas to kick out.  There is
-    * no need to choose whether to kick out your own texture or someone
-    * else's - simply eject them all in LRU order.
-    */
+    /* The channel for communication of state information to the kernel
+     * on firing a vertex buffer.
+     */
+    radeon_context_regs_t ContextState;
+    radeon_texture_regs_t TexState[RADEON_MAX_TEXTURE_UNITS];
+    unsigned int dirty;
+    unsigned int vertsize;
+    unsigned int vc_format;
+
+    /* The current cliprects, or a subset thereof
+     */
+    XF86DRIClipRectRec boxes[RADEON_NR_SAREA_CLIPRECTS];
+    unsigned int nbox;
+
+    /* Counters for throttling of rendering clients
+     */
+    unsigned int last_frame;
+    unsigned int last_dispatch;
+    unsigned int last_clear;
+
+    /* Maintain an LRU of contiguous regions of texture space.  If you
+     * think you own a region of texture memory, and it has an age
+     * different to the one you set, then you are mistaken and it has
+     * been stolen by another client.  If global texAge hasn't changed,
+     * there is no need to walk the list.
+     *
+     * These regions can be used as a proxy for the fine-grained texture
+     * information of other clients - by maintaining them in the same
+     * lru which is used to age their own textures, clients have an
+     * approximate lru for the whole of global texture space, and can
+     * make informed decisions as to which areas to kick out.  There is
+     * no need to choose whether to kick out your own texture or someone
+     * else's - simply eject them all in LRU order.
+     */
 				/* Last elt is sentinal */
-   radeon_tex_region_t texList[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1];
+    radeon_tex_region_t texList[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1];
 				/* last time texture was uploaded */
-   int texAge[RADEON_NR_TEX_HEAPS];
+    int texAge[RADEON_NR_TEX_HEAPS];
 
-   int ctxOwner;		/* last context to upload state */
+    int ctxOwner;		/* last context to upload state */
 } RADEONSAREAPriv, *RADEONSAREAPrivPtr;
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
index 0dc68f7b8..1a31d8486 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
@@ -108,6 +108,8 @@ Bool MgaInitDma(ScrnInfoPtr pScrn, int prim_size)
       return FALSE;
    }
 
+   ErrorF("sending chipset %d\n", init.chipset);
+
    init.frontOffset = pMGADRI->frontOffset;
    init.backOffset = pMGADRI->backOffset;
    init.depthOffset = pMGADRI->depthOffset;
@@ -527,11 +529,11 @@ Bool MGADRIScreenInit(ScreenPtr pScreen)
       drmVersionPtr version = drmGetVersion(pMGA->drmSubFD);
       if (version) {
          if (version->version_major != 2 ||
-             version->version_minor != 0 ||
+             version->version_minor != 1 ||
              version->version_patchlevel < 0) {
             /* incompatible drm version */
             xf86DrvMsg(pScreen->myNum, X_ERROR,
-                       "[drm] MGADRIScreenInit failed (DRM version = %d.%d.%d, expected 2.0.x).  Disabling DRI.\n",
+                       "[drm] MGADRIScreenInit failed (DRM version = %d.%d.%d, expected 2.1.x).  Disabling DRI.\n",
                        version->version_major,
                        version->version_minor,
                        version->version_patchlevel);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
index 1e61ae972..9fe0038fc 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
@@ -6,6 +6,7 @@
 # drm.o is a fake target -- it is never built
 # The real targets are in the module-list
 O_TARGET	:= drm.o
+
 module-list     := gamma.o tdfx.o r128.o radeon.o ffb.o mga.o i810.o
 export-objs     := $(patsubst %.o,%_drv.o,$(module-list))
 
@@ -25,6 +26,11 @@ export-objs     := $(patsubst %.o,%_drv.o,$(module-list))
 # memory waste (in the dual-head case) for greatly improved long-term
 # maintainability.
 #
+# NOTE: lib-objs will be eliminated in future versions, thereby
+# eliminating the need to compile the .o files into every module, but
+# for now we still need them.
+#
+
 lib-objs   := init.o memory.o proc.o auth.o context.o drawable.o bufs.o
 lib-objs   += lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o
 
@@ -32,65 +38,71 @@ ifeq ($(CONFIG_AGP),y)
  lib-objs  += agpsupport.o
 else
  ifeq ($(CONFIG_AGP),m)
-  lib-objs  += agpsupport.o
+  lib-objs += agpsupport.o
  endif
 endif
 
-gamma-objs  := $(lib-objs) gamma_drv.o gamma_dma.o
-tdfx-objs   := $(lib-objs) tdfx_drv.o tdfx_context.o
-r128-objs   := $(lib-objs) r128_drv.o r128_cce.o r128_context.o \
-			   r128_bufs.o r128_state.o
-radeon-objs := $(lib-objs) radeon_drv.o radeon_cp.o radeon_context.o \
-                           radeon_bufs.o radeon_state.o
-ffb-objs    := $(lib-objs) ffb_drv.o ffb_context.o
-mga-objs    := $(lib-objs) mga_drv.o mga_dma.o mga_context.o \
-			   mga_bufs.o mga_state.o
-i810-objs   := $(lib-objs) i810_drv.o i810_dma.o i810_context.o \
-                           i810_bufs.o
-
-obj-$(CONFIG_DRM_GAMMA)  += gamma.o  $(gamma-objs)
-obj-$(CONFIG_DRM_TDFX)   += tdfx.o   $(tdfx-objs)
-obj-$(CONFIG_DRM_R128)   += r128.o   $(r128-objs)
-obj-$(CONFIG_DRM_RADEON) += radeon.o $(radeon-objs)
-obj-$(CONFIG_DRM_FFB)    += ffb.o    $(ffb-objs)
-
-ifneq ($CONFIG_AGP),)
-obj-$(CONFIG_DRM_MGA)   += mga.o   $(mga-objs)
-obj-$(CONFIG_DRM_I810)  += i810.o  $(i810-objs)
+gamma-objs  := gamma_drv.o    gamma_dma.o
+tdfx-objs   := tdfx_drv.o                   tdfx_context.o
+r128-objs   := r128_drv.o     r128_cce.o    r128_context.o   r128_bufs.o \
+               r128_state.o
+radeon-objs := radeon_drv.o   radeon_cp.o   radeon_context.o radeon_bufs.o \
+               radeon_state.o
+ffb-objs    := ffb_drv.o                    ffb_context.o
+mga-objs    := mga_drv.o      mga_dma.o     mga_context.o    mga_bufs.o \
+               mga_state.o
+i810-objs   := i810_drv.o     i810_dma.o    i810_context.o   i810_bufs.o
+
+obj-$(CONFIG_DRM_GAMMA)  += gamma.o
+obj-$(CONFIG_DRM_TDFX)   += tdfx.o
+obj-$(CONFIG_DRM_R128)   += r128.o
+obj-$(CONFIG_DRM_RADEON) += radeon.o
+obj-$(CONFIG_DRM_FFB)    += ffb.o
+obj-$(CONFIG_DRM_MGA)    += mga.o
+obj-$(CONFIG_DRM_I810)   += i810.o
+
+
+# When linking into the kernel, link the library just once. 
+# If making modules, we include the library into each module
+
+lib-objs-mod := $(patsubst %.o,%-mod.o,$(lib-objs))
+
+ifdef MAKING_MODULES
+  lib = drmlib-mod.a
+else
+  obj-y += drmlib.a
 endif
 
-# Take module names out of obj-y and int-m
-
-obj-y           := $(filter-out $(module-list), $(obj-y))
-int-m           := $(filter-out $(module-list), $(obj-m))
+include $(TOPDIR)/Rules.make
 
-# Translate to Rules.make lists.
+$(patsubst %.o,%.c,$(lib-objs-mod)): 
+	@ln -sf $(subst -mod,,$@) $@
 
-O_OBJS          := $(filter-out $(export-objs), $(obj-y))
-OX_OBJS         := $(filter     $(export-objs), $(obj-y))
-M_OBJS          := $(sort $(filter     $(module-list), $(obj-m)))
-MI_OBJS         := $(sort $(filter-out $(export-objs), $(int-m)))
-MIX_OBJS        := $(sort $(filter     $(export-objs), $(int-m)))
+drmlib-mod.a: $(lib-objs-mod)
+	rm -f $@
+	$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs-mod)
 
-include $(TOPDIR)/Rules.make
+drmlib.a: $(lib-objs)
+	rm -f $@
+	$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs)
 
-gamma.o: $(gamma-objs)
-	$(LD) -r -o $@ $(gamma-objs)
+gamma.o: $(gamma-objs) $(lib)
+	$(LD) -r -o $@ $(gamma-objs) $(lib)
 
-tdfx.o: $(tdfx-objs)
-	$(LD) -r -o $@ $(tdfx-objs)
+tdfx.o: $(tdfx-objs) $(lib)
+	$(LD) -r -o $@ $(tdfx-objs) $(lib)
 
-mga.o: $(mga-objs)
-	$(LD) -r -o $@ $(mga-objs)
+mga.o: $(mga-objs) $(lib)
+	$(LD) -r -o $@ $(mga-objs) $(lib)
 
-i810.o: $(i810-objs)
-	$(LD) -r -o $@ $(i810-objs)
+i810.o: $(i810-objs) $(lib)
+	$(LD) -r -o $@ $(i810-objs) $(lib)
 
-r128.o: $(r128-objs)
-	$(LD) -r -o $@ $(r128-objs)
+r128.o: $(r128-objs) $(lib)
+	$(LD) -r -o $@ $(r128-objs) $(lib)
 
-radeon.o: $(radeon-objs)
-	$(LD) -r -o $@ $(radeon-objs)
+radeon.o: $(radeon-objs) $(lib)
+	$(LD) -r -o $@ $(radeon-objs) $(lib)
 
-ffb.o: $(ffb-objs)
-	$(LD) -r -o $@ $(ffb-objs)
+ffb.o: $(ffb-objs) $(lib)
+	$(LD) -r -o $@ $(ffb-objs) $(lib)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
index 2860f4c4b..00f9b53fe 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
@@ -60,13 +60,6 @@ GAMMAHEADERS=   gamma_drv.h $(DRMHEADERS)
 TDFXOBJS=       tdfx_drv.o tdfx_context.o
 TDFXHEADERS=    tdfx_drv.h $(DRMHEADERS)
 
-R128OBJS=	r128_drv.o r128_cce.o r128_bufs.o r128_context.o r128_state.o
-R128HEADERS=	r128_drv.h r128_drm.h $(DRMHEADERS)
-
-RADEONOBJS=	radeon_drv.o radeon_cp.o radeon_bufs.o radeon_context.o \
-		radeon_state.o
-RADEONHEADERS=	radeon_drv.h radeon_drm.h $(DRMHEADERS)
-
 INC=		/usr/include
 
 CFLAGS=		-O2 $(WARNINGS)
@@ -147,6 +140,13 @@ MGAHEADERS=	mga_drv.h $(DRMHEADERS)
 
 I810OBJS=	i810_drv.o i810_dma.o i810_bufs.o i810_context.o
 I810HEADERS=	i810_drv.h $(DRMHEADERS)
+
+R128OBJS=	r128_drv.o r128_cce.o r128_bufs.o r128_context.o r128_state.o
+R128HEADERS=	r128_drv.h r128_drm.h $(DRMHEADERS)
+
+RADEONOBJS=	radeon_drv.o radeon_cp.o radeon_bufs.o radeon_context.o \
+		radeon_state.o
+RADEONHEADERS=	radeon_drv.h radeon_drm.h $(DRMHEADERS)
 endif
 
 ifeq ($(SIS),1)
@@ -160,6 +160,7 @@ MODS += sis.o
 
 SISOBJS=	sis_drv.o sis_context.o sis_ds.o sis_mm.o
 SISHEADERS=	sis_drv.h sis_ds.h sis_drm.h $(DRMHEADERS)
+MODCFLAGS += -DCONFIG_DRM_SIS
 endif
 
 all::;@echo === KERNEL HEADERS IN $(TREE)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/compat-pre24.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/compat-pre24.h
index 77a2bee1c..f6dae008d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/compat-pre24.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/compat-pre24.h
@@ -42,4 +42,9 @@
 #define __exit
 #endif
 
+				/* This is a hack that only works for
+                                   this code base -- because we always
+                                   call this with dev->tq.* */
+#define INIT_LIST_HEAD(pointer) dev->tq.next = NULL
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
index e8bccd862..dc3d262d4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
@@ -83,7 +83,9 @@ typedef struct drm_clip_rect {
 #include "i810_drm.h"
 #include "r128_drm.h"
 #include "radeon_drm.h"
+#ifdef CONFIG_DRM_SIS
 #include "sis_drm.h"
+#endif
 
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
@@ -351,6 +353,7 @@ typedef struct drm_agp_info {
 #define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x44, drm_mga_vertex_t)
 #define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x45, drm_lock_t )
 #define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
+#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x47, drm_mga_blit_t)
 
 /* I810 specific ioctls */
 #define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
@@ -396,6 +399,7 @@ typedef struct drm_agp_info {
 #define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
 #define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
 
+#ifdef CONFIG_DRM_SIS
 /* SiS specific ioctls */
 #define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
 #define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
@@ -405,5 +409,6 @@ typedef struct drm_agp_info {
 #define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
 #define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
 #define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
+#endif
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
index 794333877..4854c56d5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
@@ -542,10 +542,9 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
 	
 	if (d->flags & _DRM_DMA_BLOCK) {
 		DRM_DEBUG("%d waiting\n", current->pid);
-		current->state = TASK_INTERRUPTIBLE;
 		for (;;) {
-			if (!last_buf->waiting
-			    && !last_buf->pending)
+			current->state = TASK_INTERRUPTIBLE;
+			if (!last_buf->waiting && !last_buf->pending)
 				break; /* finished */
 			schedule();
 			if (signal_pending(current)) {
@@ -652,7 +651,7 @@ int gamma_irq_install(drm_device_t *dev, int irq)
 	dev->dma->next_queue  = NULL;
 	dev->dma->this_buffer = NULL;
 
-	dev->tq.next	      = NULL;
+	INIT_LIST_HEAD(&dev->tq.list);
 	dev->tq.sync	      = 0;
 	dev->tq.routine	      = gamma_dma_schedule_tq_wrapper;
 	dev->tq.data	      = dev;
@@ -778,6 +777,7 @@ int gamma_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		}
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -794,7 +794,6 @@ int gamma_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 			
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				ret = -ERESTARTSYS;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
index e2a866068..aa824a79c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
@@ -252,16 +252,15 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
 	buf = i810_freelist_get(dev);
 	if (!buf) {
 		retcode = -ENOMEM;
-	   	DRM_DEBUG("%s retcode %d\n", __FUNCTION__, retcode);
-		goto out_get_buf;
+	   	DRM_DEBUG("retcode=%d\n", retcode);
+		return retcode;
 	}
    
 	retcode = i810_map_buffer(buf, filp);
 	if(retcode) {
 		i810_freelist_put(dev, buf);
-	   	DRM_DEBUG("mapbuf failed in %s retcode %d\n", 
-			  __FUNCTION__, retcode);
-	   	goto out_get_buf;
+	   	DRM_DEBUG("mapbuf failed, retcode %d\n", retcode);
+		return retcode;
 	}
 	buf->pid     = priv->pid;
 	buf_priv = buf->dev_private;	
@@ -270,7 +269,6 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
    	d->request_size = buf->total;
    	d->virtual = buf_priv->virtual;
 
-out_get_buf:
 	return retcode;
 }
 
@@ -926,7 +924,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
 	dev->dma->next_queue  = NULL;
 	dev->dma->this_buffer = NULL;
 
-	dev->tq.next	      = NULL;
+	INIT_LIST_HEAD(&dev->tq.list);
 	dev->tq.sync	      = 0;
 	dev->tq.routine	      = i810_dma_task_queue;
 	dev->tq.data	      = dev;
@@ -1069,11 +1067,11 @@ static void i810_dma_quiescent(drm_device_t *dev)
 	   	return;
 	}
       	atomic_set(&dev_priv->flush_done, 0);
-   	current->state = TASK_INTERRUPTIBLE;
    	add_wait_queue(&dev_priv->flush_queue, &entry);
    	end = jiffies + (HZ*3);
    
    	for (;;) {
+		current->state = TASK_INTERRUPTIBLE;
 	      	i810_dma_quiescent_emit(dev);
 	   	if (atomic_read(&dev_priv->flush_done) == 1) break;
 		if((signed)(end - jiffies) <= 0) {
@@ -1104,10 +1102,10 @@ static int i810_flush_queue(drm_device_t *dev)
 	   	return 0;
 	}
       	atomic_set(&dev_priv->flush_done, 0);
-   	current->state = TASK_INTERRUPTIBLE;
    	add_wait_queue(&dev_priv->flush_queue, &entry);
    	end = jiffies + (HZ*3);
    	for (;;) {
+		current->state = TASK_INTERRUPTIBLE;
 	      	i810_dma_emit_flush(dev);
 	   	if (atomic_read(&dev_priv->flush_done) == 1) break;
 		if((signed)(end - jiffies) <= 0) {
@@ -1201,6 +1199,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (!ret) {
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -1216,7 +1215,6 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 			
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 		   	DRM_DEBUG("Calling lock schedule\n");
 			schedule();
 			if (signal_pending(current)) {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
index 4daa03acb..356376ca9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
@@ -52,34 +52,28 @@ static unsigned long mga_alloc_page(drm_device_t *dev)
 {
 	unsigned long address;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	address = __get_free_page(GFP_KERNEL);
 	if(address == 0UL) {
 		return 0;
 	}
 	atomic_inc(&virt_to_page(address)->count);
-	set_bit(PG_locked, &virt_to_page(address)->flags);
+	set_bit(PG_reserved, &virt_to_page(address)->flags);
 
 	return address;
 }
 
 static void mga_free_page(drm_device_t *dev, unsigned long page)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	if(page == 0UL) {
-		return;
-	}
+	if(!page) return;
 	atomic_dec(&virt_to_page(page)->count);
-	clear_bit(PG_locked, &virt_to_page(page)->flags);
-	wake_up(&virt_to_page(page)->wait);
+	clear_bit(PG_reserved, &virt_to_page(page)->flags);
 	free_page(page);
 	return;
 }
 
 static void mga_delay(void)
 {
-   	return;
+	return;
 }
 
 /* These are two age tags that will never be sent to
@@ -96,8 +90,6 @@ static int mga_freelist_init(drm_device_t *dev)
    	drm_mga_freelist_t *item;
    	int i;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
 	if(dev_priv->head == NULL) return -ENOMEM;
    	memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
@@ -132,8 +124,6 @@ static void mga_freelist_cleanup(drm_device_t *dev)
    	drm_mga_freelist_t *item;
    	drm_mga_freelist_t *prev;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	item = dev_priv->head;
    	while(item) {
 	   	prev = item;
@@ -153,7 +143,7 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
    	unsigned long end;
 	int i;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
+	DRM_DEBUG("dispatch_status = 0x%02lx\n", dev_priv->dispatch_status);
 	end = jiffies + (HZ*3);
     	while(1) {
 		if(!test_and_set_bit(MGA_IN_DISPATCH,
@@ -164,8 +154,10 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
 			DRM_ERROR("irqs: %d wanted %d\n",
 				  atomic_read(&dev->total_irq),
 				  atomic_read(&dma->total_lost));
-			DRM_ERROR("lockup\n");
-			goto out_nolock;
+			DRM_ERROR("lockup: dispatch_status = 0x%02lx,"
+				  " jiffies = %lu, end = %lu\n",
+				  dev_priv->dispatch_status, jiffies, end);
+			return;
 		}
 		for (i = 0 ; i < 2000 ; i++) mga_delay();
 	}
@@ -177,15 +169,16 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
 				  atomic_read(&dev->total_irq),
 				  atomic_read(&dma->total_lost));
 			DRM_ERROR("lockup\n");
-			goto out_status;
+			clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+			return;
 		}
 		for (i = 0 ; i < 2000 ; i++) mga_delay();
 	}
     	sarea_priv->dirty |= MGA_DMA_FLUSH;
 
-out_status:
     	clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
-out_nolock:
+	DRM_DEBUG("exit, dispatch_status = 0x%02lx\n",
+		  dev_priv->dispatch_status);
 }
 
 static void mga_reset_freelist(drm_device_t *dev)
@@ -216,29 +209,26 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
 	static int failed = 0;
 	int return_null = 0;
 
-	DRM_DEBUG("%s : tail->age : %d last_prim_age : %d\n", __FUNCTION__,
-	       dev_priv->tail->age, dev_priv->last_prim_age);
-
 	if(failed >= 1000 && dev_priv->tail->age >= dev_priv->last_prim_age) {
-		DRM_DEBUG("I'm waiting on the freelist!!! %d\n",
-		       dev_priv->last_prim_age);
-	   	set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
+		DRM_DEBUG("Waiting on freelist,"
+			  " tail->age = %d, last_prim_age= %d\n",
+			  dev_priv->tail->age,
+			  dev_priv->last_prim_age);
 	   	add_wait_queue(&dev_priv->buf_queue, &entry);
+		set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
 	   	for (;;) {
-		   	mga_dma_schedule(dev, 0);
 			current->state = TASK_INTERRUPTIBLE;
-		   	if(!test_bit(MGA_IN_GETBUF,
-				     &dev_priv->dispatch_status))
+		   	mga_dma_schedule(dev, 0);
+			if(dev_priv->tail->age < dev_priv->last_prim_age)
 				break;
 		   	atomic_inc(&dev->total_sleeps);
 		   	schedule();
 		   	if (signal_pending(current)) {
 				++return_null;
-				clear_bit(MGA_IN_GETBUF,
-					  &dev_priv->dispatch_status);
 				break;
 			}
 		}
+		clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
 		current->state = TASK_RUNNING;
 	   	remove_wait_queue(&dev_priv->buf_queue, &entry);
 		if (return_null) return NULL;
@@ -254,6 +244,7 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
 		failed = 0;
 	   	return next->buf;
 	}
+
 	failed++;
    	return NULL;
 }
@@ -267,8 +258,6 @@ int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
    	drm_mga_freelist_t *head;
    	drm_mga_freelist_t *next;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	if(buf_priv->my_freelist->age == MGA_BUF_USED) {
 		/* Discarded buffer, put it on the tail */
 		next = buf_priv->my_freelist;
@@ -278,7 +267,6 @@ int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
 		next->prev = prev;
 		next->next = NULL;
 		dev_priv->tail = next;
-		DRM_DEBUG("Discarded\n");
 	} else {
 		/* Normally aged buffer, put it on the head + 1,
 		 * as the real head is a sentinal element
@@ -302,7 +290,6 @@ static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
    	int i, temp, size_of_buf;
    	int offset = init->reserved_map_agpstart;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
    	dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) /
 				  PAGE_SIZE) * PAGE_SIZE;
    	size_of_buf = dev_priv->primary_size / MGA_NUM_PRIM_BUFS;
@@ -323,7 +310,7 @@ static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
 	dev_priv->ioremap = drm_ioremap(dev->agp->base + offset,
 					temp);
 	if(dev_priv->ioremap == NULL) {
-		DRM_DEBUG("Ioremap failed\n");
+		DRM_ERROR("Ioremap failed\n");
 		return -ENOMEM;
 	}
    	init_waitqueue_head(&dev_priv->wait_queue);
@@ -370,7 +357,6 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
    	int next_idx;
        	PRIMLOCALS;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
    	dev_priv->last_prim = prim;
 
  	/* We never check for overflow, b/c there is always room */
@@ -387,14 +373,12 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
 
 	end = jiffies + (HZ*3);
     	if(sarea_priv->dirty & MGA_DMA_FLUSH) {
-		DRM_DEBUG("Dma top flush\n");
 		while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
 			if((signed)(end - jiffies) <= 0) {
 				DRM_ERROR("irqs: %d wanted %d\n",
 					  atomic_read(&dev->total_irq),
 					  atomic_read(&dma->total_lost));
-				DRM_ERROR("lockup in fire primary "
-					  "(Dma Top Flush)\n");
+				DRM_ERROR("lockup (flush)\n");
 				goto out_prim_wait;
 			}
 
@@ -402,14 +386,12 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
 		}
 		sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
 	} else {
-		DRM_DEBUG("Status wait\n");
 		while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) {
 			if((signed)(end - jiffies) <= 0) {
 				DRM_ERROR("irqs: %d wanted %d\n",
 					  atomic_read(&dev->total_irq),
 					  atomic_read(&dma->total_lost));
-				DRM_ERROR("lockup in fire primary "
-					  "(Status Wait)\n");
+				DRM_ERROR("lockup (wait)\n");
 				goto out_prim_wait;
 			}
 
@@ -452,7 +434,6 @@ int mga_advance_primary(drm_device_t *dev)
    	/* This needs to reset the primary buffer if available,
 	 * we should collect stats on how many times it bites
 	 * it's tail */
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	next_prim_idx = dev_priv->current_prim_idx + 1;
    	if(next_prim_idx >= MGA_NUM_PRIM_BUFS)
@@ -464,9 +445,8 @@ int mga_advance_primary(drm_device_t *dev)
 
    	if(test_and_set_bit(MGA_BUF_IN_USE, &prim_buffer->buffer_status)) {
 	   	add_wait_queue(&dev_priv->wait_queue, &entry);
-		current->state = TASK_INTERRUPTIBLE;
-
 	   	for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 		   	mga_dma_schedule(dev, 0);
 		   	if(!test_and_set_bit(MGA_BUF_IN_USE,
 					     &prim_buffer->buffer_status))
@@ -479,7 +459,7 @@ int mga_advance_primary(drm_device_t *dev)
 			   	break;
 			}
 		}
-	   	current->state = TASK_RUNNING;
+		current->state = TASK_RUNNING;
 	   	remove_wait_queue(&dev_priv->wait_queue, &entry);
 	   	if(ret) return ret;
 	}
@@ -491,10 +471,10 @@ int mga_advance_primary(drm_device_t *dev)
    	prim_buffer->sec_used = 0;
 	prim_buffer->prim_age = dev_priv->next_prim_age++;
 	if(prim_buffer->prim_age == 0 || prim_buffer->prim_age == 0xffffffff) {
-	   mga_flush_queue(dev);
-	   mga_dma_quiescent(dev);
-	   mga_reset_freelist(dev);
-	   prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
+		mga_flush_queue(dev);
+		mga_dma_quiescent(dev);
+		mga_reset_freelist(dev);
+		prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
 	}
 
 	/* Reset all buffer status stuff */
@@ -511,67 +491,55 @@ int mga_advance_primary(drm_device_t *dev)
 static inline int mga_decide_to_fire(drm_device_t *dev)
 {
    	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-      	drm_device_dma_t  *dma	    = dev->dma;
-
-   	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
 	if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
 	    dev_priv->next_prim->num_dwords) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
 	if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
 	    dev_priv->next_prim->num_dwords) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
 		if(test_bit(MGA_BUF_SWAP_PENDING,
 			    &dev_priv->next_prim->buffer_status)) {
-			atomic_inc(&dma->total_dmas);
 			return 1;
 		}
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
 		if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
-			atomic_inc(&dma->total_hit);
 			return 1;
 		}
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
 		if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
-			atomic_inc(&dma->total_missed_free);
 			return 1;
 		}
 	}
 
-   	atomic_inc(&dma->total_tried);
    	return 0;
 }
 
 int mga_dma_schedule(drm_device_t *dev, int locked)
 {
       	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-      	drm_device_dma_t  *dma	    = dev->dma;
-	int retval = 0;
+	int               retval    = 0;
 
-   	if (test_and_set_bit(0, &dev->dma_flag)) {
-		atomic_inc(&dma->total_missed_dma);
+   	if (!dev_priv) return -EBUSY;
+	
+	if (test_and_set_bit(0, &dev->dma_flag)) {
 		retval = -EBUSY;
 		goto sch_out_wakeup;
 	}
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) ||
 	   test_bit(MGA_IN_WAIT, &dev_priv->dispatch_status) ||
 	   test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
@@ -580,18 +548,14 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 
    	if (!locked &&
 	    !drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
-	   	atomic_inc(&dma->total_missed_lock);
 	   	clear_bit(0, &dev->dma_flag);
-		DRM_DEBUG("Not locked\n");
 		retval = -EBUSY;
 		goto sch_out_wakeup;
 	}
-   	DRM_DEBUG("I'm locked\n");
 
    	if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
 	   	/* Fire dma buffer */
 	   	if(mga_decide_to_fire(dev)) {
-		   	DRM_DEBUG("idx :%d\n", dev_priv->next_prim->idx);
 			clear_bit(MGA_BUF_FORCE_FIRE,
 				  &dev_priv->next_prim->buffer_status);
 		   	if(dev_priv->current_prim == dev_priv->next_prim) {
@@ -603,8 +567,6 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 		} else {
 			clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
 		}
-	} else {
-		DRM_DEBUG("I can't get the dispatch lock\n");
 	}
 
 	if (!locked) {
@@ -614,6 +576,8 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 		}
 	}
 
+	clear_bit(0, &dev->dma_flag);
+
 sch_out_wakeup:
       	if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
 	   atomic_read(&dev_priv->pending_bufs) == 0) {
@@ -622,18 +586,10 @@ sch_out_wakeup:
 		wake_up_interruptible(&dev_priv->flush_queue);
 	}
 
-	if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
-	   dev_priv->tail->age < dev_priv->last_prim_age) {
-		clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
-		DRM_DEBUG("Waking up buf queue\n");
+	if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)
+	   && dev_priv->tail->age < dev_priv->last_prim_age)
 		wake_up_interruptible(&dev_priv->buf_queue);
-	} else if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
-	   	DRM_DEBUG("Not waking buf_queue on %d %d\n",
-			  atomic_read(&dev->total_irq),
-			  dev_priv->last_prim_age);
-	}
 
-   	clear_bit(0, &dev->dma_flag);
 	return retval;
 }
 
@@ -643,7 +599,6 @@ static void mga_dma_service(int irq, void *device, struct pt_regs *regs)
     	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
     	drm_mga_prim_buf_t *last_prim_buffer;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
     	atomic_inc(&dev->total_irq);
 	if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
       	MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
@@ -653,28 +608,28 @@ static void mga_dma_service(int irq, void *device, struct pt_regs *regs)
 	dev_priv->sarea_priv->last_dispatch =
 		dev_priv->last_prim_age = last_prim_buffer->prim_age;
       	clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
-   	wake_up_interruptible(&dev_priv->wait_queue);
       	clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
       	clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
       	atomic_dec(&dev_priv->pending_bufs);
    	queue_task(&dev->tq, &tq_immediate);
    	mark_bh(IMMEDIATE_BH);
+   	wake_up_interruptible(&dev_priv->wait_queue);
 }
 
 static void mga_dma_task_queue(void *device)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	mga_dma_schedule((drm_device_t *)device, 0);
 }
 
 int mga_dma_cleanup(drm_device_t *dev)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if(dev->dev_private) {
 		drm_mga_private_t *dev_priv =
 			(drm_mga_private_t *) dev->dev_private;
 
+		if (dev->irq) mga_flush_queue(dev);
+		mga_dma_quiescent(dev);
+
 		if(dev_priv->ioremap) {
 			int temp = (dev_priv->warp_ucode_size +
 				    dev_priv->primary_size +
@@ -717,9 +672,6 @@ int mga_dma_cleanup(drm_device_t *dev)
 static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	drm_mga_private_t *dev_priv;
 	drm_map_t *sarea_map = NULL;
-	int i;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
 	if(dev_priv == NULL) return -ENOMEM;
@@ -730,7 +682,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	if((init->reserved_map_idx >= dev->map_count) ||
 	   (init->buffer_map_idx >= dev->map_count)) {
 		mga_dma_cleanup(dev);
-		DRM_DEBUG("reserved_map or buffer_map are invalid\n");
 		return -EINVAL;
 	}
 
@@ -758,7 +709,7 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	dev_priv->WarpPipe = 0xff000000;
 	dev_priv->vertexsize = 0;
 
-   	DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
+   	DRM_DEBUG("chipset=%d ucode_size=%d backOffset=%x depthOffset=%x\n",
 		  dev_priv->chipset, dev_priv->warp_ucode_size,
 		  dev_priv->backOffset, dev_priv->depthOffset);
    	DRM_DEBUG("cpp: %d sgram: %d stride: %d maccess: %x\n",
@@ -768,13 +719,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
 	       sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
 
-   	for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
-		DRM_DEBUG("warp pipe %d: installed: %d phys: %lx size: %x\n",
-			  i,
-			  dev_priv->WarpIndex[i].installed,
-			  dev_priv->WarpIndex[i].phys_addr,
-			  dev_priv->WarpIndex[i].size);
-
    	if(mga_init_primary_bufs(dev, init) != 0) {
 		DRM_ERROR("Can not initialize primary buffers\n");
 		mga_dma_cleanup(dev);
@@ -839,8 +783,6 @@ int mga_dma_init(struct inode *inode, struct file *filp,
 	drm_device_t *dev = priv->dev;
 	drm_mga_init_t init;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (copy_from_user(&init, (drm_mga_init_t *)arg, sizeof(init)))
 		return -EFAULT;
 
@@ -876,7 +818,7 @@ int mga_irq_install(drm_device_t *dev, int irq)
 	dev->dma->next_buffer = NULL;
 	dev->dma->next_queue  = NULL;
 	dev->dma->this_buffer = NULL;
-	dev->tq.next	      = NULL;
+	INIT_LIST_HEAD(&dev->tq.list);
 	dev->tq.sync	      = 0;
 	dev->tq.routine	      = mga_dma_task_queue;
 	dev->tq.data	      = dev;
@@ -927,8 +869,6 @@ int mga_control(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
 		return -EFAULT;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	switch (ctl.func) {
 	case DRM_INST_HANDLER:
 		return mga_irq_install(dev, ctl.irq);
@@ -945,18 +885,16 @@ static int mga_flush_queue(drm_device_t *dev)
   	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
    	int ret = 0;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
-   	if(dev_priv == NULL) {
-	   	return 0;
-	}
+   	if(!dev_priv) return 0;
 
    	if(dev_priv->next_prim->num_dwords != 0) {
-   		current->state = TASK_INTERRUPTIBLE;
    		add_wait_queue(&dev_priv->flush_queue, &entry);
+		if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status)) 
+			DRM_ERROR("Incorrect mga_flush_queue logic\n");
 		set_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
 		mga_dma_schedule(dev, 0);
    		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 	   		if (!test_bit(MGA_IN_FLUSH,
 				      &dev_priv->dispatch_status))
 				break;
@@ -969,7 +907,7 @@ static int mga_flush_queue(drm_device_t *dev)
 		   		break;
 			}
 		}
-   		current->state = TASK_RUNNING;
+		current->state = TASK_RUNNING;
    		remove_wait_queue(&dev_priv->flush_queue, &entry);
 	}
    	return ret;
@@ -985,7 +923,8 @@ void mga_reclaim_buffers(drm_device_t *dev, pid_t pid)
       	if(dev->dev_private == NULL) return;
 	if(dma->buflist == NULL) return;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
+	DRM_DEBUG("buf_count=%d\n", dma->buf_count);
+	
         mga_flush_queue(dev);
 
 	for (i = 0; i < dma->buf_count; i++) {
@@ -1011,7 +950,6 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	int		  ret	= 0;
 	drm_lock_t	  lock;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
 		return -EFAULT;
 
@@ -1021,13 +959,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		return -EINVAL;
 	}
 
-   	DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
-	       lock.context, current->pid, dev->lock.hw_lock->lock,
-	       lock.flags);
-
-	if (lock.context < 0) {
-		return -EINVAL;
-	}
+	if (lock.context < 0) return -EINVAL;
 
 	/* Only one queue:
 	 */
@@ -1035,6 +967,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (!ret) {
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -1050,7 +983,6 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				ret = -ERESTARTSYS;
@@ -1078,7 +1010,8 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		}
 	}
 
-	DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+	if (ret) DRM_DEBUG("%d %s\n", lock.context,
+			   ret ? "interrupted" : "has lock");
 	return ret;
 }
 
@@ -1090,12 +1023,11 @@ int mga_flush_ioctl(struct inode *inode, struct file *filp,
 	drm_lock_t	  lock;
       	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
 	if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
 		return -EFAULT;
 
 	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("mga_flush_ioctl called without lock held\n");
+		DRM_ERROR("lock not held\n");
 		return -EINVAL;
 	}
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
index 52cf77665..538133937 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
@@ -271,4 +271,14 @@ typedef struct _drm_mga_indices {
 	int discard;		/* client finished with buffer?  */
 } drm_mga_indices_t;
 
+typedef struct _drm_mga_blit {
+	unsigned int planemask;
+	unsigned int source;
+	unsigned int dest;
+	int delta_sx, delta_sy;
+	int delta_dx, delta_dy;
+	int height, ydir;		/* flip image vertically */
+	int source_pitch, dest_pitch;
+} drm_mga_blit_t;
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
index 883eb75ca..d1c39e999 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
@@ -38,7 +38,7 @@
 #define MGA_DESC	 "Matrox G200/G400"
 #define MGA_DATE	 "20000928"
 #define MGA_MAJOR	 2
-#define MGA_MINOR	 0
+#define MGA_MINOR	 1
 #define MGA_PATCHLEVEL	 1
 
 static drm_device_t	      mga_device;
@@ -114,6 +114,7 @@ static drm_ioctl_desc_t	      mga_ioctls[] = {
    	[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)]  = { mga_vertex,      1, 0 },
    	[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)]   = { mga_flush_ioctl, 1, 0 },
    	[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices,     1, 0 },
+     	[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)]    = { mga_blit,        1, 0 }, 
 };
 
 #define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
@@ -502,7 +503,7 @@ int mga_release(struct inode *inode, struct file *filp)
 	if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
 	    && dev->lock.pid == current->pid) {
 	      	mga_reclaim_buffers(dev, priv->pid);
-		DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02x)\n",
+		DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02lx)\n",
 			 current->pid,
 			 _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
 			 dev->dev_private ?
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
index 6feba09a6..d7bf63263 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
@@ -38,7 +38,7 @@
 #define MGA_BUF_NEEDS_OVERFLOW 3
 
 typedef struct {
-	u32 buffer_status;
+	long buffer_status; /* long req'd for set_bit() --RR */
    	int num_dwords;
    	int max_dwords;
    	u32 *current_dma_ptr;
@@ -50,7 +50,7 @@ typedef struct {
 } drm_mga_prim_buf_t;
 
 typedef struct _drm_mga_freelist {
-   	unsigned int age;
+   	__volatile__ unsigned int age;
    	drm_buf_t *buf;
    	struct _drm_mga_freelist *next;
    	struct _drm_mga_freelist *prev;
@@ -62,7 +62,7 @@ typedef struct _drm_mga_freelist {
 #define MGA_IN_GETBUF	  3
 
 typedef struct _drm_mga_private {
-   	u32 dispatch_status;
+   	long dispatch_status;  /* long req'd for set_bit() --RR */
 	unsigned int next_prim_age;
 	__volatile__ unsigned int last_prim_age;
    	int reserved_map_idx;
@@ -160,6 +160,8 @@ extern int  mga_vertex(struct inode *inode, struct file *filp,
 		      unsigned int cmd, unsigned long arg);
 extern int  mga_indices(struct inode *inode, struct file *filp,
 			unsigned int cmd, unsigned long arg);
+extern int  mga_blit(struct inode *inode, struct file *filp,
+			unsigned int cmd, unsigned long arg);
 				/* mga_context.c */
 extern int  mga_resctx(struct inode *inode, struct file *filp,
 		       unsigned int cmd, unsigned long arg);
@@ -339,6 +341,7 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 #define MGAREG_SECEND 				0x2c44
 #define MGAREG_SETUPADDRESS 			0x2cd0
 #define MGAREG_SETUPEND 			0x2cd4
+#define	MGAREG_SGN		                0x1c58
 #define MGAREG_SOFTRAP				0x2c48
 #define MGAREG_SRCORG 				0x2cb4
 #define MGAREG_STATUS 				0x1e14
@@ -377,6 +380,72 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 #define MGAREG_YTOP 				0x1c98
 #define MGAREG_ZORG 				0x1c0c
 
+/* Warp registers */
+#define MGAREG_WR0                              0x2d00
+#define MGAREG_WR1                              0x2d04
+#define MGAREG_WR2                              0x2d08
+#define MGAREG_WR3                              0x2d0c
+#define MGAREG_WR4                              0x2d10
+#define MGAREG_WR5                              0x2d14
+#define MGAREG_WR6                              0x2d18
+#define MGAREG_WR7                              0x2d1c
+#define MGAREG_WR8                              0x2d20
+#define MGAREG_WR9                              0x2d24
+#define MGAREG_WR10                             0x2d28
+#define MGAREG_WR11                             0x2d2c
+#define MGAREG_WR12                             0x2d30
+#define MGAREG_WR13                             0x2d34
+#define MGAREG_WR14                             0x2d38
+#define MGAREG_WR15                             0x2d3c
+#define MGAREG_WR16                             0x2d40
+#define MGAREG_WR17                             0x2d44
+#define MGAREG_WR18                             0x2d48
+#define MGAREG_WR19                             0x2d4c
+#define MGAREG_WR20                             0x2d50
+#define MGAREG_WR21                             0x2d54
+#define MGAREG_WR22                             0x2d58
+#define MGAREG_WR23                             0x2d5c
+#define MGAREG_WR24                             0x2d60
+#define MGAREG_WR25                             0x2d64
+#define MGAREG_WR26                             0x2d68
+#define MGAREG_WR27                             0x2d6c
+#define MGAREG_WR28                             0x2d70
+#define MGAREG_WR29                             0x2d74
+#define MGAREG_WR30                             0x2d78
+#define MGAREG_WR31                             0x2d7c
+#define MGAREG_WR32                             0x2d80
+#define MGAREG_WR33                             0x2d84
+#define MGAREG_WR34                             0x2d88
+#define MGAREG_WR35                             0x2d8c
+#define MGAREG_WR36                             0x2d90
+#define MGAREG_WR37                             0x2d94
+#define MGAREG_WR38                             0x2d98
+#define MGAREG_WR39                             0x2d9c
+#define MGAREG_WR40                             0x2da0
+#define MGAREG_WR41                             0x2da4
+#define MGAREG_WR42                             0x2da8
+#define MGAREG_WR43                             0x2dac
+#define MGAREG_WR44                             0x2db0
+#define MGAREG_WR45                             0x2db4
+#define MGAREG_WR46                             0x2db8
+#define MGAREG_WR47                             0x2dbc
+#define MGAREG_WR48                             0x2dc0
+#define MGAREG_WR49                             0x2dc4
+#define MGAREG_WR50                             0x2dc8
+#define MGAREG_WR51                             0x2dcc
+#define MGAREG_WR52                             0x2dd0
+#define MGAREG_WR53                             0x2dd4
+#define MGAREG_WR54                             0x2dd8
+#define MGAREG_WR55                             0x2ddc
+#define MGAREG_WR56                             0x2de0
+#define MGAREG_WR57                             0x2de4
+#define MGAREG_WR58                             0x2de8
+#define MGAREG_WR59                             0x2dec
+#define MGAREG_WR60                             0x2df0
+#define MGAREG_WR61                             0x2df4
+#define MGAREG_WR62                             0x2df8
+#define MGAREG_WR63                             0x2dfc
+
 #define PDEA_pagpxfer_enable			0x2
 
 #define WIA_wmode_suspend			0x0
@@ -430,6 +499,13 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 #define DC_clipdis_disable 			0x0
 #define DC_clipdis_enable 			0x80000000
 
+
+#define SO_srcacc_pci 		0x0 		
+#define SO_srcacc_agp 		0x2 		
+#define SO_srcmap_fb 		0x0 		
+#define SO_srcmap_sys 		0x1 		
+
+
 #define SETADD_mode_vertlist                   	0x0
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
index 0c2f57299..bba8fa35b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
@@ -43,7 +43,7 @@
 #define MGAG200EMITTEX_SIZE 	20
 #define MGAG400EMITTEX0_SIZE	30
 #define MGAG400EMITTEX1_SIZE	25
-#define MGAG400EMITPIPE_SIZE	55
+#define MGAG400EMITPIPE_SIZE	50
 #define MGAG200EMITPIPE_SIZE	15
 
 #define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
@@ -56,24 +56,24 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	/* This takes 10 dwords */
 	PRIMGETPTR(dev_priv);
 
-	/* Force reset of dwgctl (eliminates clip disable) */
+	/* Force reset of dwgctl on G400 (eliminates clip disable bit) */
+	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
 #if 0
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DWGSYNC, 0);
-	PRIMOUTREG(MGAREG_DWGSYNC, 0);
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
 #else
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-	PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-	PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
 #endif
-
+	}
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
 	PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
@@ -87,7 +87,6 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	/* This takes a max of 20 dwords */
 	PRIMGETPTR(dev_priv);
@@ -127,7 +126,6 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -146,9 +144,9 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 24 * 4, regs[MGA_TEXREG_WIDTH]);
+	PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
 
-	PRIMOUTREG(0x2d00 + 34 * 4, regs[MGA_TEXREG_HEIGHT]);
+	PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -162,13 +160,11 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
-	int multitex = regs[MGA_TEXREG_CTL2] & TMC_dualtex_enable;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
-	/* This takes a max of 30 dwords */
+	/* This takes 30 dwords */
 
 	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
 	PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
@@ -183,22 +179,20 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);
+	PRIMOUTREG(MGAREG_WR49, 0);
 
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_WR57, 0);
+	PRIMOUTREG(MGAREG_WR53, 0);
+	PRIMOUTREG(MGAREG_WR61, 0);
+	PRIMOUTREG(MGAREG_WR52, 0x40);
 
-	if (!multitex || 1) {
-		PRIMOUTREG(0x2d00 + 52 * 4, 0x40);
-		PRIMOUTREG(0x2d00 + 60 * 4, 0x40);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-	}
+	PRIMOUTREG(MGAREG_WR60, 0x40);
+	PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
+	PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	PRIMOUTREG(0x2d00 + 54 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
-	PRIMOUTREG(0x2d00 + 62 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 
@@ -207,12 +201,11 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 
 #define TMC_map1_enable 		0x80000000
 
-static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
+static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	unsigned int *regs = sarea_priv->TexState[source];
+	unsigned int *regs = sarea_priv->TexState[1];
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -232,14 +225,14 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);
+	PRIMOUTREG(MGAREG_WR49, 0);
 
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);
-	PRIMOUTREG(0x2d00 + 52 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
+	PRIMOUTREG(MGAREG_WR57, 0);
+	PRIMOUTREG(MGAREG_WR53, 0);
+	PRIMOUTREG(MGAREG_WR61, 0);
+	PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
 
-	PRIMOUTREG(0x2d00 + 60 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
@@ -247,50 +240,29 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 	PRIMADVANCE(dev_priv);
 }
 
+#define MAGIC_FPARAM_HEX_VALUE 0x46480000
+/* This is the hex value of 12800.0f which is a magic value we must
+ * set in wr56.
+ */
+
 static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
-	float fParam = 12800.0f;
-	int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
-			TMC_dualtex_enable);
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
 	/* This takes 50 dwords */
 
-	/* Establish vertex size.
+	/* Establish vertex size.  
 	 */
 	PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	if (sarea_priv->vertexsize == 10) {
-		PRIMOUTREG(MGAREG_YDST, 0);
-		PRIMOUTREG(MGAREG_FXLEFT, 0);
-		PRIMOUTREG(MGAREG_FXRIGHT, 1);
-		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-
-		if (multitex) {
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		} else {
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		}
-
+	if (pipe & MGA_T2) {
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -301,21 +273,23 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000);
 	} else {
-		/* Flush the WARP pipe */
-		PRIMOUTREG(MGAREG_YDST, 0);
-		PRIMOUTREG(MGAREG_FXLEFT, 0);
-		PRIMOUTREG(MGAREG_FXRIGHT, 1);
-		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		if (dev_priv->WarpPipe & MGA_T2) {
+			/* Flush the WARP pipe */
+			PRIMOUTREG(MGAREG_YDST, 0);
+			PRIMOUTREG(MGAREG_FXLEFT, 0);
+			PRIMOUTREG(MGAREG_FXRIGHT, 1);
+			PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
+
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
+			PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
 
-		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+			PRIMOUTREG(MGAREG_DMAPAD, 0);
+		}
 
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -330,29 +304,26 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 
 	PRIMOUTREG(MGAREG_WFLAG, 0);
 	PRIMOUTREG(MGAREG_WFLAG1, 0);
-	PRIMOUTREG(0x2d00 + 56 * 4, *((u32 *) (&fParam)));
+	PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);	/* Tex stage 0 */
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);	/* Tex stage 0 */
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);	/* Tex stage 1 */
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);	/* Tex stage 1 */
-
-	PRIMOUTREG(0x2d00 + 54 * 4, 0x40);	/* Tex stage 0 : w */
-	PRIMOUTREG(0x2d00 + 62 * 4, 0x40);	/* Tex stage 0 : h */
-	PRIMOUTREG(0x2d00 + 52 * 4, 0x40);	/* Tex stage 1 : w */
-	PRIMOUTREG(0x2d00 + 60 * 4, 0x40);	/* Tex stage 1 : h */
-
-	if (dev_priv->WarpPipe != pipe || 1) {
-		/* Dma pading required due to hw bug */
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_WIADDR2,
-			   (u32) (dev_priv->WarpIndex[pipe].phys_addr |
-				  WIA_wmode_start | WIA_wagp_agp));
-	}
+	PRIMOUTREG(MGAREG_WR49, 0);	/* Tex stage 0 */
+	PRIMOUTREG(MGAREG_WR57, 0);	/* Tex stage 0 */
+	PRIMOUTREG(MGAREG_WR53, 0);	/* Tex stage 1 */
+	PRIMOUTREG(MGAREG_WR61, 0);	/* Tex stage 1 */
+
+	PRIMOUTREG(MGAREG_WR54, 0x40);	/* Tex stage 0 : w */
+	PRIMOUTREG(MGAREG_WR62, 0x40);	/* Tex stage 0 : h */
+	PRIMOUTREG(MGAREG_WR52, 0x40);	/* Tex stage 1 : w */
+	PRIMOUTREG(MGAREG_WR60, 0x40);	/* Tex stage 1 : h */
 
+	/* Dma pading required due to hw bug */
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_WIADDR2,
+		   (u32) (dev_priv->WarpIndex[pipe].
+			  phys_addr | WIA_wmode_start | WIA_wagp_agp));
 	PRIMADVANCE(dev_priv);
 }
 
@@ -361,7 +332,6 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -370,12 +340,12 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
 	PRIMOUTREG(MGAREG_WVRTXSZ, 7);
 	PRIMOUTREG(MGAREG_WFLAG, 0);
-	PRIMOUTREG(0x2d00 + 24 * 4, 0);	/* tex w/h */
+	PRIMOUTREG(MGAREG_WR24, 0);	/* tex w/h */
 
-	PRIMOUTREG(0x2d00 + 25 * 4, 0x100);
-	PRIMOUTREG(0x2d00 + 34 * 4, 0);	/* tex w/h */
-	PRIMOUTREG(0x2d00 + 42 * 4, 0xFFFF);
-	PRIMOUTREG(0x2d00 + 60 * 4, 0xFFFF);
+	PRIMOUTREG(MGAREG_WR25, 0x100);
+	PRIMOUTREG(MGAREG_WR34, 0);	/* tex w/h */
+	PRIMOUTREG(MGAREG_WR42, 0xFFFF);
+	PRIMOUTREG(MGAREG_WR60, 0xFFFF);
 
 	/* Dma pading required due to hw bug */
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
@@ -392,23 +362,13 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
-	        int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
-				TMC_dualtex_enable);
-
-  		dirty = ~0;
+		int multitex = sarea_priv->WarpPipe & MGA_T2;
 
-		if (dirty & MGA_UPLOAD_PIPE
-/*  		    && (sarea_priv->WarpPipe != dev_priv->WarpPipe || */
-/*  		        sarea_priv->vertexsize != dev_priv->vertexsize) */
-		   )
-		{
+		if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
 			mgaG400EmitPipe(dev_priv);
 			dev_priv->WarpPipe = sarea_priv->WarpPipe;
-			dev_priv->vertexsize = sarea_priv->vertexsize;
-			sarea_priv->dirty &= ~MGA_UPLOAD_PIPE;
 		}
 
 		if (dirty & MGA_UPLOAD_CTX) {
@@ -421,11 +381,8 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
 		}
 
-		if (dirty & MGA_UPLOAD_TEX1) {
-			if (multitex)
-				mgaG400EmitTex1(dev_priv, 1);
-			else
-				mgaG400EmitTex1(dev_priv, 0);
+		if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
+			mgaG400EmitTex1(dev_priv);
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
 		}
 	} else {
@@ -446,7 +403,6 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 	}
 }
 
-
 /* Disallow all write destinations except the front and backbuffer.
  */
 static int mgaVerifyContext(drm_mga_private_t * dev_priv)
@@ -454,8 +410,6 @@ static int mgaVerifyContext(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
 	    regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
 		DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n",
@@ -474,8 +428,6 @@ static int mgaVerifyTex(drm_mga_private_t * dev_priv, int unit)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) {
 		DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n",
 			  sarea_priv->TexState[unit][MGA_TEXREG_ORG],
@@ -493,8 +445,6 @@ static int mgaVerifyState(drm_mga_private_t * dev_priv)
 	unsigned int dirty = sarea_priv->dirty;
 	int rv = 0;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
@@ -522,8 +472,6 @@ static int mgaVerifyIload(drm_mga_private_t * dev_priv,
 			  unsigned long bus_address,
 			  unsigned int dstOrg, int length)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (dstOrg < dev_priv->textureOffset ||
 	    dstOrg + length >
 	    (dev_priv->textureOffset + dev_priv->textureSize)) {
@@ -543,10 +491,11 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 				      int length, unsigned int destOrg)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int *regs = sarea_priv->ContextState;
 	int use_agp = PDEA_pagpxfer_enable | 0x00000001;
 	u16 y2;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	y2 = length / 64;
 
@@ -554,12 +503,11 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 
 	PRIMOUTREG(MGAREG_DSTORG, destOrg);
 	PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
-	DRM_DEBUG("srcorg : %lx\n", bus_address | use_agp);
 	PRIMOUTREG(MGAREG_SRCORG, (u32) bus_address | use_agp);
 	PRIMOUTREG(MGAREG_AR5, 64);
 
 	PRIMOUTREG(MGAREG_PITCH, 64);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_PLNWT, ~0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
 
@@ -568,10 +516,10 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 	PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
 	PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
 
+	PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
 	PRIMOUTREG(MGAREG_SRCORG, 0);
 	PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
 	PRIMADVANCE(dev_priv);
 }
 
@@ -585,14 +533,6 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	DRM_DEBUG("dispatch vertex %d addr 0x%lx, "
-		  "length 0x%x nbox %d dirty %x\n",
-		  buf->idx, address, length,
-		  sarea_priv->nbox, sarea_priv->dirty);
-
-	DRM_DEBUG("used : %d, total : %d\n", buf->used, buf->total);
 
 	if (buf->used) {
 		/* WARNING: if you change any of the state functions verify
@@ -603,19 +543,12 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 			      (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
 		mgaEmitState(dev_priv);
 
-/*  		length = dev_priv->vertexsize * 3 * 4; */
+#if 0
+		length = dev_priv->vertexsize * 3 * 4;
+#endif
 
 		do {
 			if (i < sarea_priv->nbox) {
-				DRM_DEBUG("idx %d Emit box %d/%d:"
-					  "%d,%d - %d,%d\n",
-					  buf->idx,
-					  i, sarea_priv->nbox,
-					  sarea_priv->boxes[i].x1,
-					  sarea_priv->boxes[i].y1,
-					  sarea_priv->boxes[i].x2,
-					  sarea_priv->boxes[i].y2);
-
 				mgaEmitClipRect(dev_priv,
 						&sarea_priv->boxes[i]);
 			}
@@ -652,12 +585,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	DRM_DEBUG("dispatch indices %d addr 0x%x, "
-		  "start 0x%x end 0x%x nbox %d dirty %x\n",
-		  buf->idx, address, start, end,
-		  sarea_priv->nbox, sarea_priv->dirty);
 
 	if (start != end) {
 		/* WARNING: if you change any of the state functions verify
@@ -670,15 +597,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 
 		do {
 			if (i < sarea_priv->nbox) {
-				DRM_DEBUG("idx %d Emit box %d/%d:"
-					  "%d,%d - %d,%d\n",
-					  buf->idx,
-					  i, sarea_priv->nbox,
-					  sarea_priv->boxes[i].x1,
-					  sarea_priv->boxes[i].y1,
-					  sarea_priv->boxes[i].x2,
-					  sarea_priv->boxes[i].y2);
-
 				mgaEmitClipRect(dev_priv,
 						&sarea_priv->boxes[i]);
 			}
@@ -718,7 +636,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	unsigned int cmd;
 	int i;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->sgram)
 		cmd = MGA_CLEAR_CMD | DC_atype_blk;
@@ -730,12 +647,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	for (i = 0; i < nbox; i++) {
 		unsigned int height = pbox[i].y2 - pbox[i].y1;
 
-		DRM_DEBUG("dispatch clear %d,%d-%d,%d flags %x!\n",
-			  pbox[i].x1, pbox[i].y1, pbox[i].x2,
-			  pbox[i].y2, flags);
-
 		if (flags & MGA_FRONT) {
-			DRM_DEBUG("clear front\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -750,7 +662,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		}
 
 		if (flags & MGA_BACK) {
-			DRM_DEBUG("clear back\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -765,7 +676,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		}
 
 		if (flags & MGA_DEPTH) {
-			DRM_DEBUG("clear depth\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -783,7 +693,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	/* Force reset of DWGCTL */
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
 	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
 	PRIMADVANCE(dev_priv);
 }
@@ -799,7 +709,6 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 	int pixel_stride = dev_priv->stride / dev_priv->cpp;
 
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
 
@@ -815,16 +724,13 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_PLNWT, ~0);
 	PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
 
 	for (i = 0; i < nbox; i++) {
 		unsigned int h = pbox[i].y2 - pbox[i].y1;
 		unsigned int start = pbox[i].y1 * pixel_stride;
 
-		DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
-			  pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
-
 		PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
 		PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
 		PRIMOUTREG(MGAREG_FXBNDRY,
@@ -835,13 +741,141 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 
 	/* Force reset of DWGCTL */
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
 	PRIMOUTREG(MGAREG_SRCORG, 0);
 	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
 
 	PRIMADVANCE(dev_priv);
 }
 
+/*  #define BLIT_LEFT	1 */
+/*  #define BLIT_UP		4 */
+
+static void mga_dma_dispatch_blit(drm_device_t * dev,
+				  unsigned int planemask,
+				  unsigned int source,
+				  unsigned int dest,
+				  int delta_sx, int delta_sy,
+				  int delta_dx, int delta_dy,
+				  int source_pitch,
+				  int dest_pitch,
+				  int height,
+				  int ydir)
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int *regs = sarea_priv->ContextState;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int pixel_stride = dev_priv->stride / dev_priv->cpp;
+	u32 scandir = 0, i;
+	
+	PRIMLOCALS;	   
+
+	PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
+
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
+	PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+
+	PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+	PRIMOUTREG(MGAREG_PLNWT, planemask);
+	PRIMOUTREG(MGAREG_SRCORG, source);
+	PRIMOUTREG(MGAREG_DSTORG, dest);
+
+	PRIMOUTREG(MGAREG_SGN, scandir);
+	PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
+	PRIMOUTREG(MGAREG_AR5, ydir * source_pitch);	    
+	PRIMOUTREG(MGAREG_PITCH, dest_pitch);
+
+	for (i = 0; i < nbox; i++) {
+		int srcx = pbox[i].x1 + delta_sx;
+		int srcy = pbox[i].y1 + delta_sy;
+		int dstx = pbox[i].x1 + delta_dx;
+		int dsty = pbox[i].y1 + delta_dy;
+		int h = pbox[i].y2 - pbox[i].y1;
+		int w = pbox[i].x2 - pbox[i].x1 - 1;
+		int start;
+
+		if (ydir == -1) {
+			srcy = height - srcy - 1;
+		}
+
+		start = srcy * source_pitch + srcx;
+
+		PRIMOUTREG(MGAREG_AR0, start + w);
+		PRIMOUTREG(MGAREG_AR3, start);
+		PRIMOUTREG(MGAREG_FXBNDRY, ((dstx+w) << 16) | (dstx & 0xffff));
+		PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, (dsty << 16) | h);
+	}
+
+	/* Do something to flush AGP?
+	 */
+
+	/* Force reset of DWGCTL */
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
+	PRIMOUTREG(MGAREG_PITCH, pixel_stride);
+	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+
+	PRIMADVANCE(dev_priv);
+}
+
+
+int mga_blit(struct inode *inode, struct file *filp,
+	     unsigned int cmd, unsigned long arg)
+{
+	drm_file_t *priv = filp->private_data;
+	drm_device_t *dev = priv->dev;
+	drm_mga_private_t *dev_priv =
+	    (drm_mga_private_t *) dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_blit_t blit;
+
+	if (copy_from_user(&blit, (drm_mga_blit_t *) arg, sizeof(blit)))
+		return -EFAULT;
+		
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+		DRM_ERROR("mga_blit_bufs called without lock held\n");
+		return -EINVAL;
+	}
+
+	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
+	
+  	if ((blit.source & 0x3) != (SO_srcmap_sys|SO_srcacc_pci) &&
+	    (blit.dest & 0x3) != (SO_srcmap_sys|SO_srcacc_pci))
+	{
+	   mga_dma_dispatch_blit(dev,
+				 blit.planemask, 
+				 blit.source,
+				 blit.dest,
+				 blit.delta_sx, blit.delta_sy,
+				 blit.delta_dx, blit.delta_dy,
+				 blit.source_pitch,
+				 blit.dest_pitch,
+				 blit.height,
+				 blit.ydir);
+	}
+
+
+	PRIMUPDATE(dev_priv);
+
+#ifdef __i386__
+	mga_flush_write_combine();
+#endif
+	mga_dma_schedule(dev, 1);
+	return 0;
+}
+
+
 int mga_clear_bufs(struct inode *inode, struct file *filp,
 		   unsigned int cmd, unsigned long arg)
 {
@@ -854,7 +888,6 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 
 	if (copy_from_user(&clear, (drm_mga_clear_t *) arg, sizeof(clear)))
 		return -EFAULT;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_clear_bufs called without lock held\n");
@@ -886,7 +919,6 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	drm_mga_private_t *dev_priv =
 	    (drm_mga_private_t *) dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_swap_bufs called without lock held\n");
@@ -921,9 +953,7 @@ int mga_iload(struct inode *inode, struct file *filp,
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_iload_t iload;
 	unsigned long bus_address;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	DRM_DEBUG("Starting Iload\n");
 	if (copy_from_user(&iload, (drm_mga_iload_t *) arg, sizeof(iload)))
 		return -EFAULT;
 
@@ -935,8 +965,6 @@ int mga_iload(struct inode *inode, struct file *filp,
 	buf = dma->buflist[iload.idx];
 	buf_priv = buf->dev_private;
 	bus_address = buf->bus_address;
-	DRM_DEBUG("bus_address %lx, length %d, destorg : %x\n",
-		  bus_address, iload.length, iload.destOrg);
 
 	if (mgaVerifyIload(dev_priv,
 			   bus_address, iload.destOrg, iload.length)) {
@@ -967,7 +995,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_vertex_t vertex;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (copy_from_user(&vertex, (drm_mga_vertex_t *) arg, sizeof(vertex)))
 		return -EFAULT;
@@ -977,8 +1004,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 		return -EINVAL;
 	}
 
-	DRM_DEBUG("mga_vertex\n");
-
 	buf = dma->buflist[vertex.idx];
 	buf_priv = buf->dev_private;
 
@@ -992,7 +1017,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 			buf_priv->dispatched = 0;
 			mga_freelist_put(dev, buf);
 		}
-		DRM_DEBUG("bad state\n");
 		return -EINVAL;
 	}
 
@@ -1016,9 +1040,9 @@ int mga_indices(struct inode *inode, struct file *filp,
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_indices_t indices;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	if (copy_from_user(&indices, (drm_mga_indices_t *) arg, sizeof(indices)))
+	if (copy_from_user(&indices,
+			   (drm_mga_indices_t *)arg, sizeof(indices)))
 		return -EFAULT;
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
@@ -1026,8 +1050,6 @@ int mga_indices(struct inode *inode, struct file *filp,
 		return -EINVAL;
 	}
 
-	DRM_DEBUG("mga_indices\n");
-
 	buf = dma->buflist[indices.idx];
 	buf_priv = buf->dev_private;
 
@@ -1057,7 +1079,6 @@ static int mga_dma_get_buffers(drm_device_t * dev, drm_dma_t * d)
 {
 	int i;
 	drm_buf_t *buf;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	for (i = d->granted_count; i < d->request_count; i++) {
 		buf = mga_freelist_get(dev);
@@ -1083,12 +1104,9 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 	drm_device_dma_t *dma = dev->dma;
 	int retcode = 0;
 	drm_dma_t d;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (copy_from_user(&d, (drm_dma_t *) arg, sizeof(d)))
 		return -EFAULT;
-	DRM_DEBUG("%d %d: %d send, %d req\n",
-		  current->pid, d.context, d.send_count, d.request_count);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_dma called without lock held\n");
@@ -1119,8 +1137,6 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 		retcode = mga_dma_get_buffers(dev, &d);
 	}
 
-	DRM_DEBUG("%d returning, granted = %d\n",
-		  current->pid, d.granted_count);
 	if (copy_to_user((drm_dma_t *) arg, &d, sizeof(d)))
 		return -EFAULT;
 	return retcode;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
index a1698d51c..c5f9f66d1 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
@@ -24,8 +24,8 @@
  * DEALINGS IN THE SOFTWARE.
  *
  * Authors:
- *    Gareth Hughes <gareth@valinux.com>
  *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
index 12bd6c796..7bfefb2ca 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
@@ -23,8 +23,8 @@
  * DEALINGS IN THE SOFTWARE.
  *
  * Authors:
- *    Gareth Hughes <gareth@valinux.com>
  *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
  *
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c
index d626f57c5..501ac3ac8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c
@@ -46,7 +46,9 @@ extern int xf86RemoveSIGIOHandler(int fd);
 #include <sys/sysmacros.h>	/* for makedev() */
 #endif
 #include "xf86drm.h"
+#define CONFIG_DRM_SIS
 #include "drm.h"
+#undef CONFIG_DRM_SIS
 
 Bool drmSiSAgpInit(int driSubFD, int offset, int size)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
index e8bccd862..dc3d262d4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
@@ -83,7 +83,9 @@ typedef struct drm_clip_rect {
 #include "i810_drm.h"
 #include "r128_drm.h"
 #include "radeon_drm.h"
+#ifdef CONFIG_DRM_SIS
 #include "sis_drm.h"
+#endif
 
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
@@ -351,6 +353,7 @@ typedef struct drm_agp_info {
 #define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x44, drm_mga_vertex_t)
 #define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x45, drm_lock_t )
 #define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
+#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x47, drm_mga_blit_t)
 
 /* I810 specific ioctls */
 #define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
@@ -396,6 +399,7 @@ typedef struct drm_agp_info {
 #define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
 #define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
 
+#ifdef CONFIG_DRM_SIS
 /* SiS specific ioctls */
 #define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
 #define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
@@ -405,5 +409,6 @@ typedef struct drm_agp_info {
 #define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
 #define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
 #define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
+#endif
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h
index 99bbeaa5a..6d7fad592 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h
@@ -31,8 +31,8 @@
  *
  */
 
-#ifndef __XF86DRI_R128_H__
-#define __XF86DRI_R128_H__
+#ifndef _XF86DRI_R128_H_
+#define _XF86DRI_R128_H_
 
 #include "X11/Xmd.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
index c8430736e..8a1d17f8d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
@@ -31,8 +31,8 @@
  *
  */
 
-#ifndef __XF86DRI_RADEON_H__
-#define __XF86DRI_RADEON_H__
+#ifndef _XF86DRI_RADEON_H_
+#define _XF86DRI_RADEON_H_
 
 /* WARNING: If you change any of these defines, make sure to change
  * the kernel include file as well (radeon_drm.h)