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authorkeithw <keithw>2002-06-17 08:08:56 +0000
committerkeithw <keithw>2002-06-17 08:08:56 +0000
commita201ef76d99c28bb980f5b01ba71dc7575203806 (patch)
tree5d6bac602c0a9c820cd132af3b86e8ac75be25f3
parentbb41b5352791146c987a439938a9481b701b8ad5 (diff)
Dead files
-rw-r--r--xc/lib/GL/mesa/src/drv/radeon/radeon_render.c256
-rw-r--r--xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c579
-rw-r--r--xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c551
3 files changed, 0 insertions, 1386 deletions
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_render.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_render.c
deleted file mode 100644
index 01d2cf66f..000000000
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_render.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/* $XFree86$ */
-/**************************************************************************
-
-Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
- VA Linux Systems Inc., Fremont, California.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- * Keith Whitwell <keithw@valinux.com>
- *
- */
-
-
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "mem.h"
-#include "mtypes.h"
-#include "mmath.h"
-
-#include "tnl/t_context.h"
-
-#include "radeon_context.h"
-#include "radeon_tris.h"
-#include "radeon_state.h"
-#include "radeon_ioctl.h"
-#include "radeon_vb.h"
-
-/*
- * Render unclipped vertex buffers by emitting vertices directly to
- * dma buffers. Use strip/fan hardware primitives where possible.
- * Try to simulate missing primitives with indexed vertices.
- */
-#define HAVE_POINTS 1
-#define HAVE_LINES 1
-#define HAVE_LINE_STRIPS 1
-#define HAVE_TRIANGLES 1
-#define HAVE_TRI_STRIPS 1
-#define HAVE_TRI_STRIP_1 0
-#define HAVE_TRI_FANS 1
-#define HAVE_QUADS 0
-#define HAVE_QUAD_STRIPS 0
-#define HAVE_POLYGONS 0
-
-#define HAVE_ELTS 1
-
-static const GLuint hw_prim[GL_POLYGON+1] = {
- RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
- RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
- 0,
- RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN,
- 0,
- 0,
- 0
-};
-
-static __inline void radeonDmaPrimitive( radeonContextPtr rmesa, GLenum prim )
-{
- RADEON_STATECHANGE( rmesa, 0 );
- rmesa->hw_primitive = hw_prim[prim];
-}
-
-static __inline void radeonEltPrimitive( radeonContextPtr rmesa, GLenum prim )
-{
- RADEON_STATECHANGE( rmesa, 0 );
- rmesa->hw_primitive = hw_prim[prim] | RADEON_CP_VC_CNTL_PRIM_WALK_IND;
-}
-
-
-static void VERT_FALLBACK( GLcontext *ctx,
- GLuint start,
- GLuint count,
- GLuint flags )
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
- tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
- tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
- RADEON_CONTEXT(ctx)->SetupNewInputs = VERT_CLIP;
-}
-
-static void ELT_FALLBACK( GLcontext *ctx,
- GLuint start,
- GLuint count,
- GLuint flags )
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
- tnl->Driver.Render.BuildVertices( ctx, 0, tnl->vb.Count, ~0 ); /* argh! */
- tnl->Driver.Render.PrimTabElts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
- RADEON_CONTEXT(ctx)->SetupNewInputs = VERT_CLIP;
-}
-
-
-#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx)
-#define ELTS_VARS GLushort *dest
-#define INIT( prim ) radeonDmaPrimitive( rmesa, prim )
-#define ELT_INIT(prim) radeonEltPrimitive( rmesa, prim )
-#define NEW_PRIMITIVE() RADEON_STATECHANGE( rmesa, 0 )
-#define NEW_BUFFER() RADEON_FIREVERTICES( rmesa )
-#define GET_CURRENT_VB_MAX_ELTS() \
- (((int)rmesa->dma.high - (int)rmesa->dma.low - 20) / 2)
-#define GET_CURRENT_VB_MAX_VERTS() \
- (((int)rmesa->dma.high - (int)rmesa->dma.low) / (rmesa->vertex_size*4))
-#define GET_SUBSEQUENT_VB_MAX_ELTS() \
- ((RADEON_BUFFER_SIZE - 20) / 2)
-#define GET_SUBSEQUENT_VB_MAX_VERTS() \
- RADEON_BUFFER_SIZE / (rmesa->vertex_size * 4)
-
-#define ALLOC_ELTS_NEW_PRIMITIVE(nr) do { \
- dest = (GLushort *)radeonAllocDmaLow( rmesa, 20 + nr * 2, \
- __FUNCTION__); \
- dest += RADEON_INDEX_PRIM_OFFSET / sizeof(*dest); \
-} while (0)
-
-#define ALLOC_ELTS(nr) do { \
- if (rmesa->dma.low == rmesa->dma.last) { \
- ALLOC_ELTS_NEW_PRIMITIVE( nr ); \
- } else { \
- dest = (GLushort *)radeonAllocDmaLow( rmesa, nr * 2, \
- __FUNCTION__); \
- } \
-} while (0)
-
-#define EMIT_ELT(offset, x) (dest)[offset] = (GLushort) (x)
-#define EMIT_TWO_ELTS(offset, x, y) *(GLuint *)(dest+offset) = ((y)<<16)|(x);
-#define INCR_ELTS( nr ) dest += nr
-#define RELEASE_ELT_VERTS() radeonReleaseRetainedBuffer( rmesa )
-#define EMIT_VERTS( ctx, j, nr ) \
- radeon_emit_contiguous_verts(ctx, j, (j)+(nr))
-#define EMIT_INDEXED_VERTS( ctx, start, count ) \
- radeon_emit_indexed_verts( ctx, start, count )
-
-
-#define TAG(x) radeon_##x
-#include "tnl_dd/t_dd_dmatmp.h"
-
-
-/**********************************************************************/
-/* Render pipeline stage */
-/**********************************************************************/
-
-
-static GLboolean radeon_run_render( GLcontext *ctx,
- struct gl_pipeline_stage *stage )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *VB = &tnl->vb;
- GLuint i, length, flags = 0;
- render_func *tab;
-
- if (rmesa->dma.retained && (!VB->Elts || stage->changed_inputs))
- radeonReleaseRetainedBuffer( rmesa );
-
- if (VB->ClipOrMask || /* No clipping */
- rmesa->RenderIndex != 0 || /* No per-vertex manipulations */
- ctx->Line.StippleFlag) /* GH: THIS IS A HACK!!! */
- return GL_TRUE;
-
- if (VB->Elts) {
- tab = TAG(render_tab_elts);
- if (!rmesa->dma.retained)
- if (!TAG(emit_elt_verts)(ctx, 0, VB->Count))
- return GL_TRUE; /* too many vertices */
- } else {
- tab = TAG(render_tab_verts);
- }
-
-
- tnl->Driver.Render.Start( ctx );
-
- for (i = VB->FirstPrimitive ; !(flags & PRIM_LAST) ; i += length)
- {
- flags = VB->Primitive[i];
- length = VB->PrimitiveLength[i];
- if (length)
- tab[flags & PRIM_MODE_MASK]( ctx, i, i + length, flags );
- }
-
- tnl->Driver.Render.Finish( ctx );
-
- return GL_FALSE; /* finished the pipe */
-}
-
-
-static void radeon_check_render( GLcontext *ctx,
- struct gl_pipeline_stage *stage )
-{
- GLuint inputs = VERT_CLIP|VERT_RGBA;
-
- if (ctx->RenderMode == GL_RENDER) {
- if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
- inputs |= VERT_SPEC_RGB;
-
- if (ctx->Texture.Unit[0]._ReallyEnabled)
- inputs |= VERT_TEX(0);
-
- if (ctx->Texture.Unit[1]._ReallyEnabled)
- inputs |= VERT_TEX(1);
-
- if (ctx->Fog.Enabled)
- inputs |= VERT_FOG_COORD;
- }
-
- stage->inputs = inputs;
-}
-
-
-static void dtr( struct gl_pipeline_stage *stage )
-{
- (void)stage;
-}
-
-
-const struct gl_pipeline_stage _radeon_render_stage =
-{
- "radeon render",
- (_DD_NEW_SEPARATE_SPECULAR |
- _NEW_TEXTURE|
- _NEW_FOG|
- _NEW_RENDERMODE), /* re-check (new inputs) */
- 0, /* re-run (always runs) */
- GL_TRUE, /* active */
- 0, 0, /* inputs (set in check_render), outputs */
- 0, 0, /* changed_inputs, private */
- dtr, /* destructor */
- radeon_check_render, /* check - initially set to alloc data */
- radeon_run_render /* run */
-};
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c
deleted file mode 100644
index eacdc9129..000000000
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_tris.c
+++ /dev/null
@@ -1,579 +0,0 @@
-/* $XFree86$ */
-/**************************************************************************
-
-Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
- VA Linux Systems Inc., Fremont, California.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- * Keith Whitwell <keithw@valinux.com>
- *
- */
-
-#include <stdio.h>
-#include <math.h>
-
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
-
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/tnl.h"
-#include "tnl/t_context.h"
-#include "tnl/t_pipeline.h"
-
-#include "radeon_tris.h"
-#include "radeon_state.h"
-#include "radeon_tex.h"
-#include "radeon_vb.h"
-#include "radeon_ioctl.h"
-
-static const GLuint hw_prim[GL_POLYGON+1] = {
- RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
- RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
- RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
- RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
- RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
-};
-
-static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim );
-static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim );
-static void radeonResetLineStipple( GLcontext *ctx );
-
-
-/***********************************************************************
- * Emit primitives as inline vertices *
- ***********************************************************************/
-
-
-#if defined(USE_X86_ASM)
-#define COPY_DWORDS( j, vb, vertsize, v ) \
-do { \
- int __tmp; \
- __asm__ __volatile__( "rep ; movsl" \
- : "=%c" (j), "=D" (vb), "=S" (__tmp) \
- : "0" (vertsize), \
- "D" ((long)vb), \
- "S" ((long)v) ); \
-} while (0)
-#else
-#define COPY_DWORDS( j, vb, vertsize, v ) \
-do { \
- for ( j = 0 ; j < vertsize ; j++ ) \
- vb[j] = ((GLuint *)v)[j]; \
- vb += vertsize; \
-} while (0)
-#endif
-
-static __inline void radeon_draw_quad( radeonContextPtr rmesa,
- radeonVertexPtr v0,
- radeonVertexPtr v1,
- radeonVertexPtr v2,
- radeonVertexPtr v3 )
-{
- GLuint vertsize = rmesa->vertex_size;
- GLuint *vb = (GLuint *)radeonAllocDmaLow( rmesa, 6 * vertsize * 4,
- __FUNCTION__);
- GLuint j;
-
- rmesa->num_verts += 6;
- COPY_DWORDS( j, vb, vertsize, v0 );
- COPY_DWORDS( j, vb, vertsize, v1 );
- COPY_DWORDS( j, vb, vertsize, v3 );
- COPY_DWORDS( j, vb, vertsize, v1 );
- COPY_DWORDS( j, vb, vertsize, v2 );
- COPY_DWORDS( j, vb, vertsize, v3 );
-}
-
-
-static __inline void radeon_draw_triangle( radeonContextPtr rmesa,
- radeonVertexPtr v0,
- radeonVertexPtr v1,
- radeonVertexPtr v2 )
-{
- GLuint vertsize = rmesa->vertex_size;
- GLuint *vb = (GLuint *)radeonAllocDmaLow( rmesa, 3 * vertsize * 4,
- __FUNCTION__);
- GLuint j;
-
- /*
- printf("radeon_draw_triangle\n");
- radeon_print_vertex(rmesa->glCtx, v0);
- radeon_print_vertex(rmesa->glCtx, v1);
- radeon_print_vertex(rmesa->glCtx, v2);
- */
- rmesa->num_verts += 3;
- COPY_DWORDS( j, vb, vertsize, v0 );
- COPY_DWORDS( j, vb, vertsize, v1 );
- COPY_DWORDS( j, vb, vertsize, v2 );
-}
-
-static __inline void radeon_draw_line( radeonContextPtr rmesa,
- radeonVertexPtr v0,
- radeonVertexPtr v1 )
-{
- GLuint vertsize = rmesa->vertex_size;
- GLuint *vb = (GLuint *)radeonAllocDmaLow( rmesa, 2 * vertsize * 4,
- __FUNCTION__);
- GLuint j;
-
- rmesa->num_verts += 2;
- COPY_DWORDS( j, vb, vertsize, v0 );
- COPY_DWORDS( j, vb, vertsize, v1 );
-}
-
-static __inline void radeon_draw_point( radeonContextPtr rmesa,
- radeonVertexPtr v0 )
-{
- int vertsize = rmesa->vertex_size;
- GLuint *vb = (GLuint *)radeonAllocDmaLow( rmesa, vertsize * 4,
- __FUNCTION__);
- int j;
-
- /*
- printf("radeon_draw_point\n");
- radeon_print_vertex(rmesa->glCtx, v0);
- */
- rmesa->num_verts += 1;
- COPY_DWORDS( j, vb, vertsize, v0 );
-}
-
-/***********************************************************************
- * Macros for t_dd_tritmp.h to draw basic primitives *
- ***********************************************************************/
-
-#define QUAD( a, b, c, d ) radeon_draw_quad( rmesa, a, b, c, d )
-#define TRI( a, b, c ) radeon_draw_triangle( rmesa, a, b, c )
-#define LINE( a, b ) radeon_draw_line( rmesa, a, b )
-#define POINT( a ) radeon_draw_point( rmesa, a )
-
-/***********************************************************************
- * Build render functions from dd templates *
- ***********************************************************************/
-
-#define RADEON_TWOSIDE_BIT 0x01
-#define RADEON_UNFILLED_BIT 0x02
-#define RADEON_MAX_TRIFUNC 0x04
-
-
-static struct {
- points_func points;
- line_func line;
- triangle_func triangle;
- quad_func quad;
-} rast_tab[RADEON_MAX_TRIFUNC];
-
-
-#define DO_FALLBACK 0
-#define DO_OFFSET 0
-#define DO_UNFILLED (IND & RADEON_UNFILLED_BIT)
-#define DO_TWOSIDE (IND & RADEON_TWOSIDE_BIT)
-#define DO_FLAT 0
-#define DO_TRI 1
-#define DO_QUAD 1
-#define DO_LINE 1
-#define DO_POINTS 1
-#define DO_FULL_QUAD 1
-
-#define HAVE_RGBA 1
-#define HAVE_SPEC 1
-#define HAVE_INDEX 0
-#define HAVE_BACK_COLORS 0
-#define HAVE_HW_FLATSHADE 1
-#define VERTEX radeonVertex
-#define TAB rast_tab
-
-#define DEPTH_SCALE 1.0
-#define UNFILLED_TRI unfilled_tri
-#define UNFILLED_QUAD unfilled_quad
-#define VERT_X(_v) _v->v.x
-#define VERT_Y(_v) _v->v.y
-#define VERT_Z(_v) _v->v.z
-#define AREA_IS_CCW( a ) (a < 0)
-#define GET_VERTEX(e) (rmesa->verts + (e<<rmesa->vertex_stride_shift))
-
-
-#define VERT_SET_RGBA( v, c ) v->ui[coloroffset] = LE32_TO_CPU(*(GLuint *)c)
-#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset]
-#define VERT_SAVE_RGBA( idx ) color[idx] = CPU_TO_LE32(v[idx]->ui[coloroffset])
-#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = LE32_TO_CPU(color[idx])
-
-#define VERT_SET_SPEC( v0, c ) if (havespec) { \
- v0->v.specular.red = (c)[0]; \
- v0->v.specular.green = (c)[1]; \
- v0->v.specular.blue = (c)[2]; \
- }
-#define VERT_COPY_SPEC( v0, v1 ) if (havespec) { \
- (v0)->v.specular.red = (v1)->v.specular.red; \
- (v0)->v.specular.green = (v1)->v.specular.green;\
- (v0)->v.specular.blue = (v1)->v.specular.blue; \
- }
-#define VERT_SAVE_SPEC( idx ) if (havespec) spec[idx] = CPU_TO_LE32(v[idx]->ui[5])
-#define VERT_RESTORE_SPEC( idx ) if (havespec) v[idx]->ui[5] = LE32_TO_CPU(spec[idx])
-
-#define LOCAL_VARS(n) \
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
- GLuint coloroffset = (rmesa->vertex_size == 4 ? 3 : 4); \
- GLboolean havespec = (rmesa->vertex_size > 4); \
- (void) color; (void) spec; (void) coloroffset; (void) havespec;
-
-/***********************************************************************
- * Helpers for rendering unfilled primitives *
- ***********************************************************************/
-
-#define RASTERIZE(x) if (rmesa->hw_primitive != hw_prim[x]) \
- radeonRasterPrimitive( ctx, hw_prim[x] )
-#define RENDER_PRIMITIVE rmesa->render_primitive
-#define TAG(x) x
-#include "tnl_dd/t_dd_unfilled.h"
-#undef IND
-
-
-/***********************************************************************
- * Generate GL render functions *
- ***********************************************************************/
-
-
-#define IND (0)
-#define TAG(x) x
-#include "tnl_dd/t_dd_tritmp.h"
-
-#define IND (RADEON_TWOSIDE_BIT)
-#define TAG(x) x##_twoside
-#include "tnl_dd/t_dd_tritmp.h"
-
-#define IND (RADEON_UNFILLED_BIT)
-#define TAG(x) x##_unfilled
-#include "tnl_dd/t_dd_tritmp.h"
-
-#define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT)
-#define TAG(x) x##_twoside_unfilled
-#include "tnl_dd/t_dd_tritmp.h"
-
-
-static void init_rast_tab( void )
-{
- init();
- init_twoside();
- init_unfilled();
- init_twoside_unfilled();
-}
-
-
-
-/**********************************************************************/
-/* Render unclipped begin/end objects */
-/**********************************************************************/
-
-#define VERT(x) (radeonVertex *)(radeonverts + (x << shift))
-#define RENDER_POINTS( start, count ) \
- for ( ; start < count ; start++) \
- radeon_draw_point( rmesa, VERT(start) )
-#define RENDER_LINE( v0, v1 ) \
- radeon_draw_line( rmesa, VERT(v0), VERT(v1) )
-#define RENDER_TRI( v0, v1, v2 ) \
- radeon_draw_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) )
-#define RENDER_QUAD( v0, v1, v2, v3 ) \
- radeon_draw_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) )
-#define INIT(x) do { \
- if (0) fprintf(stderr, "%s\n", __FUNCTION__); \
- radeonRenderPrimitive( ctx, x ); \
-} while (0)
-#undef LOCAL_VARS
-#define LOCAL_VARS \
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \
- const GLuint shift = rmesa->vertex_stride_shift; \
- const char *radeonverts = (char *)rmesa->verts; \
- const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \
- const GLboolean stipple = ctx->Line.StippleFlag; \
- (void) elt; (void) stipple;
-#define RESET_STIPPLE if ( stipple ) radeonResetLineStipple( ctx );
-#define RESET_OCCLUSION
-#define PRESERVE_VB_DEFS
-#define ELT(x) (x)
-#define TAG(x) radeon_##x##_verts
-#include "tnl/t_vb_rendertmp.h"
-#undef ELT
-#undef TAG
-#define TAG(x) radeon_##x##_elts
-#define ELT(x) elt[x]
-#include "tnl/t_vb_rendertmp.h"
-
-
-/**********************************************************************/
-/* Render clipped primitives */
-/**********************************************************************/
-
-static void radeonRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
- GLuint n )
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *VB = &tnl->vb;
-
- /* Render the new vertices as an unclipped polygon.
- */
- {
- GLuint *tmp = VB->Elts;
- VB->Elts = (GLuint *)elts;
- tnl->Driver.Render.PrimTabElts[GL_POLYGON]( ctx, 0, n, PRIM_BEGIN|PRIM_END );
- VB->Elts = tmp;
- }
-}
-
-static void radeonFastRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
- GLuint n )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
- GLuint vertsize = rmesa->vertex_size;
- GLuint *vb = radeonAllocDmaLow( rmesa, (n-2) * 3 * 4 * vertsize,
- __FUNCTION__);
- GLubyte *radeonverts = (GLubyte *)rmesa->verts;
- const GLuint shift = rmesa->vertex_stride_shift;
- const GLuint *start = (const GLuint *)VERT(elts[0]);
- int i,j;
-
- rmesa->num_verts += (n-2) * 3;
-
- for (i = 2 ; i < n ; i++) {
- COPY_DWORDS( j, vb, vertsize, start );
- COPY_DWORDS( j, vb, vertsize, VERT(elts[i-1]) );
- COPY_DWORDS( j, vb, vertsize, VERT(elts[i]) );
- }
-}
-
-
-
-
-/**********************************************************************/
-/* Choose render functions */
-/**********************************************************************/
-
-#define _RADEON_NEW_RENDER_STATE (_DD_NEW_TRI_LIGHT_TWOSIDE | \
- _DD_NEW_TRI_UNFILLED)
-
-#define ANY_RASTER_FLAGS (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)
-
-
-static void radeonChooseRenderState(GLcontext *ctx)
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint flags = ctx->_TriangleCaps;
- GLuint index = 0;
-
- if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT;
- if (flags & DD_TRI_UNFILLED) index |= RADEON_UNFILLED_BIT;
-
- if (index != rmesa->RenderIndex) {
- tnl->Driver.Render.Points = rast_tab[index].points;
- tnl->Driver.Render.Line = rast_tab[index].line;
- tnl->Driver.Render.ClippedLine = rast_tab[index].line;
- tnl->Driver.Render.Triangle = rast_tab[index].triangle;
- tnl->Driver.Render.Quad = rast_tab[index].quad;
-
- if (index == 0) {
- tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts;
- tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts;
- tnl->Driver.Render.ClippedPolygon = radeonFastRenderClippedPoly;
- } else {
- tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
- tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
- tnl->Driver.Render.ClippedPolygon = radeonRenderClippedPoly;
- }
-
- rmesa->RenderIndex = index;
- }
-}
-
-/**********************************************************************/
-/* Validate state at pipeline start */
-/**********************************************************************/
-
-static void radeonWrapRunPipeline( GLcontext *ctx )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-
- /* Validate state:
- */
- if (rmesa->NewGLState) {
- if (rmesa->NewGLState & _NEW_TEXTURE)
- radeonUpdateTextureState( ctx );
-
- if (!rmesa->Fallback) {
- if (rmesa->NewGLState & _RADEON_NEW_VERTEX_STATE)
- radeonChooseVertexState( ctx );
-
- if (rmesa->NewGLState & _RADEON_NEW_RENDER_STATE)
- radeonChooseRenderState( ctx );
- }
-
- rmesa->NewGLState = 0;
- }
-
- /* Run the pipeline.
- */
- _tnl_run_pipeline( ctx );
-
- /* Nothing left to do.
- */
-}
-
-/**********************************************************************/
-/* High level hooks for t_vb_render.c */
-/**********************************************************************/
-
-
-static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- if (rmesa->hw_primitive != hwprim) {
- RADEON_STATECHANGE( rmesa, 0 );
- rmesa->hw_primitive = hwprim;
- }
-}
-
-static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint hw = hw_prim[prim];
- rmesa->render_primitive = prim;
- if (prim >= GL_TRIANGLES && (ctx->_TriangleCaps & DD_TRI_UNFILLED))
- return;
- radeonRasterPrimitive( ctx, hw );
-}
-
-static void radeonRenderFinish( GLcontext *ctx )
-{
-}
-
-static void radeonResetLineStipple( GLcontext *ctx )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-
- /* Reset the hardware stipple counter.
- */
- fprintf(stderr, "%s\n", __FUNCTION__);
- RADEON_STATECHANGE( rmesa, RADEON_UPLOAD_LINE );
-}
-
-
-/**********************************************************************/
-/* Transition to/from hardware rasterization. */
-/**********************************************************************/
-
-static char *fallbackStrings[] = {
- "Texture mode",
- "glDrawBuffer(GL_FRONT_AND_BACK)",
- "glEnable(GL_STENCIL) without hw stencil buffer",
- "glRenderMode(selection or feedback)",
- "glBlendEquation",
- "glBlendFunc(mode != ADD)"
-};
-
-
-static char *getFallbackString(GLuint bit)
-{
- int i = 0;
- while (bit > 1) {
- i++;
- bit >>= 1;
- }
- return fallbackStrings[i];
-}
-
-
-void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- GLuint oldfallback = rmesa->Fallback;
-
- if (mode) {
- rmesa->Fallback |= bit;
- if (oldfallback == 0) {
- RADEON_FIREVERTICES( rmesa );
- _swsetup_Wakeup( ctx );
- _tnl_need_projected_coords( ctx, GL_TRUE );
- rmesa->RenderIndex = ~0;
- if (rmesa->debugFallbacks) {
- fprintf(stderr, "Radeon begin software fallback: 0x%x %s\n",
- bit, getFallbackString(bit));
- }
- }
- }
- else {
- rmesa->Fallback &= ~bit;
- if (oldfallback == bit) {
- /*printf("End fallback 0x%x\n", bit);*/
- _swrast_flush( ctx );
- tnl->Driver.Render.Start = radeonCheckTexSizes;
- tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive;
- tnl->Driver.Render.Finish = radeonRenderFinish;
- tnl->Driver.Render.BuildVertices = radeonBuildVertices;
- tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple;
- rmesa->NewGLState |= (_RADEON_NEW_RENDER_STATE|
- _RADEON_NEW_VERTEX_STATE);
- if (rmesa->debugFallbacks) {
- fprintf(stderr, "Radeon end software fallback: 0x%x %s\n",
- bit, getFallbackString(bit));
- }
- }
- }
-}
-
-
-/**********************************************************************/
-/* Initialization. */
-/**********************************************************************/
-
-void radeonInitTriFuncs( GLcontext *ctx )
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
-
- static int firsttime = 1;
-
- if (firsttime) {
- init_rast_tab();
- firsttime = 0;
- }
-
- tnl->Driver.RunPipeline = radeonWrapRunPipeline;
- tnl->Driver.Render.Start = radeonCheckTexSizes;
- tnl->Driver.Render.Finish = radeonRenderFinish;
- tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive;
- tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple;
- tnl->Driver.Render.BuildVertices = radeonBuildVertices;
-
-/* radeonFallback( ctx, 0x100000, 1 ); */
-}
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c
deleted file mode 100644
index fadc0be18..000000000
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_vb.c
+++ /dev/null
@@ -1,551 +0,0 @@
-/* $XFree86$ */
-/**************************************************************************
-
-Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
- VA Linux Systems Inc., Fremont, California.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- * Keith Whitwell <keithw@valinux.com>
- *
- */
-
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "mem.h"
-#include "mmath.h"
-#include "macros.h"
-
-#include "swrast_setup/swrast_setup.h"
-#include "math/m_translate.h"
-#include "tnl/tnl.h"
-#include "tnl/t_context.h"
-
-#include "radeon_context.h"
-#include "radeon_vb.h"
-#include "radeon_ioctl.h"
-#include "radeon_state.h"
-
-/***********************************************************************
- * Build render functions from dd templates *
- ***********************************************************************/
-
-
-#define RADEON_XYZW_BIT 0x01
-#define RADEON_RGBA_BIT 0x02
-#define RADEON_FOG_BIT 0x04
-#define RADEON_SPEC_BIT 0x08
-#define RADEON_TEX0_BIT 0x10
-#define RADEON_TEX1_BIT 0x20
-#define RADEON_PTEX_BIT 0x40
-#define RADEON_MAX_SETUP 0x80
-
-static struct {
- void (*emit)( GLcontext *, GLuint, GLuint, void *, GLuint );
- interp_func interp;
- copy_pv_func copy_pv;
- GLboolean (*check_tex_sizes)( GLcontext *ctx );
- GLuint vertex_size;
- GLuint vertex_stride_shift;
- GLuint vertex_format;
-} setup_tab[RADEON_MAX_SETUP];
-
-
-#define TINY_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \
- RADEON_CP_VC_FRMT_Z | \
- RADEON_CP_VC_FRMT_PKCOLOR)
-
-#define NOTEX_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \
- RADEON_CP_VC_FRMT_Z | \
- RADEON_CP_VC_FRMT_W0 | \
- RADEON_CP_VC_FRMT_PKCOLOR | \
- RADEON_CP_VC_FRMT_PKSPEC)
-
-#define TEX0_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \
- RADEON_CP_VC_FRMT_Z | \
- RADEON_CP_VC_FRMT_W0 | \
- RADEON_CP_VC_FRMT_PKCOLOR | \
- RADEON_CP_VC_FRMT_PKSPEC | \
- RADEON_CP_VC_FRMT_ST0)
-
-#define TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \
- RADEON_CP_VC_FRMT_Z | \
- RADEON_CP_VC_FRMT_W0 | \
- RADEON_CP_VC_FRMT_PKCOLOR | \
- RADEON_CP_VC_FRMT_PKSPEC | \
- RADEON_CP_VC_FRMT_ST0 | \
- RADEON_CP_VC_FRMT_ST1)
-
-#define PROJ_TEX1_VERTEX_FORMAT (RADEON_CP_VC_FRMT_XY | \
- RADEON_CP_VC_FRMT_Z | \
- RADEON_CP_VC_FRMT_W0 | \
- RADEON_CP_VC_FRMT_PKCOLOR | \
- RADEON_CP_VC_FRMT_PKSPEC | \
- RADEON_CP_VC_FRMT_ST0 | \
- RADEON_CP_VC_FRMT_Q0 | \
- RADEON_CP_VC_FRMT_ST1 | \
- RADEON_CP_VC_FRMT_Q1)
-
-#define TEX2_VERTEX_FORMAT 0
-#define TEX3_VERTEX_FORMAT 0
-#define PROJ_TEX3_VERTEX_FORMAT 0
-
-#define DO_XYZW (IND & RADEON_XYZW_BIT)
-#define DO_RGBA (IND & RADEON_RGBA_BIT)
-#define DO_SPEC (IND & RADEON_SPEC_BIT)
-#define DO_FOG (IND & RADEON_FOG_BIT)
-#define DO_TEX0 (IND & RADEON_TEX0_BIT)
-#define DO_TEX1 (IND & RADEON_TEX1_BIT)
-#define DO_TEX2 0
-#define DO_TEX3 0
-#define DO_PTEX (IND & RADEON_PTEX_BIT)
-
-#define VERTEX radeonVertex
-#define GET_VIEWPORT_MAT() 0
-#define GET_TEXSOURCE(n) n
-#define GET_VERTEX_FORMAT() RADEON_CONTEXT(ctx)->vertex_format
-#define GET_VERTEX_STORE() RADEON_CONTEXT(ctx)->verts
-#define GET_VERTEX_STRIDE_SHIFT() RADEON_CONTEXT(ctx)->vertex_stride_shift
-#define GET_UBYTE_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteColor
-#define GET_UBYTE_SPEC_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteSecondaryColor
-
-#define HAVE_HW_VIEWPORT 1
-#define HAVE_HW_DIVIDE (IND & ~(RADEON_XYZW_BIT|RADEON_RGBA_BIT))
-#define HAVE_RGBA_COLOR 1
-#define HAVE_TINY_VERTICES 1
-#define HAVE_NOTEX_VERTICES 1
-#define HAVE_TEX0_VERTICES 1
-#define HAVE_TEX1_VERTICES 1
-#define HAVE_TEX2_VERTICES 0
-#define HAVE_TEX3_VERTICES 0
-#define HAVE_PTEX_VERTICES 1
-
-#define CHECK_HW_DIVIDE (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE| \
- DD_TRI_UNFILLED)))
-
-
-#define IMPORT_FLOAT_COLORS radeon_import_float_colors
-#define IMPORT_FLOAT_SPEC_COLORS radeon_import_float_spec_colors
-
-#define INTERP_VERTEX setup_tab[RADEON_CONTEXT(ctx)->SetupIndex].interp
-#define COPY_PV_VERTEX setup_tab[RADEON_CONTEXT(ctx)->SetupIndex].copy_pv
-
-
-/***********************************************************************
- * Generate pv-copying and translation functions *
- ***********************************************************************/
-
-#define TAG(x) radeon_##x
-#define IND ~0
-#include "tnl_dd/t_dd_vb.c"
-#undef IND
-
-
-/***********************************************************************
- * Generate vertex emit and interp functions *
- ***********************************************************************/
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT)
-#define TAG(x) x##_wg
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT)
-#define TAG(x) x##_wgs
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT)
-#define TAG(x) x##_wgt0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_PTEX_BIT)
-#define TAG(x) x##_wgpt0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT)
-#define TAG(x) x##_wgt0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT|RADEON_TEX1_BIT|\
- RADEON_PTEX_BIT)
-#define TAG(x) x##_wgpt0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|RADEON_TEX0_BIT)
-#define TAG(x) x##_wgst0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|RADEON_TEX0_BIT|\
- RADEON_PTEX_BIT)
-#define TAG(x) x##_wgspt0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|RADEON_TEX0_BIT|\
- RADEON_TEX1_BIT)
-#define TAG(x) x##_wgst0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_SPEC_BIT|RADEON_TEX0_BIT|\
- RADEON_TEX1_BIT|RADEON_PTEX_BIT)
-#define TAG(x) x##_wgspt0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT)
-#define TAG(x) x##_wgf
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_SPEC_BIT)
-#define TAG(x) x##_wgfs
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_TEX0_BIT)
-#define TAG(x) x##_wgft0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_TEX0_BIT|\
- RADEON_PTEX_BIT)
-#define TAG(x) x##_wgfpt0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_TEX0_BIT|\
- RADEON_TEX1_BIT)
-#define TAG(x) x##_wgft0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_TEX0_BIT|\
- RADEON_TEX1_BIT|RADEON_PTEX_BIT)
-#define TAG(x) x##_wgfpt0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_SPEC_BIT|\
- RADEON_TEX0_BIT)
-#define TAG(x) x##_wgfst0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_SPEC_BIT|\
- RADEON_TEX0_BIT|RADEON_PTEX_BIT)
-#define TAG(x) x##_wgfspt0
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_SPEC_BIT|\
- RADEON_TEX0_BIT|RADEON_TEX1_BIT)
-#define TAG(x) x##_wgfst0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-#define IND (RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_FOG_BIT|RADEON_SPEC_BIT|\
- RADEON_TEX0_BIT|RADEON_TEX1_BIT|RADEON_PTEX_BIT)
-#define TAG(x) x##_wgfspt0t1
-#include "tnl_dd/t_dd_vbtmp.h"
-
-
-/* Specialized emit, hardwired with q3 strides.
- */
-static void emit_q3( GLcontext *ctx,
- GLuint start, GLuint end,
- void *dest,
- GLuint stride )
-{
- LOCALVARS
- struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- GLuint *coord;
- GLuint coord_stride;
- int i;
-
- if (CHECK_HW_DIVIDE) {
- coord = (GLuint *)VB->ClipPtr->data;
- coord_stride = VB->ClipPtr->stride;
- }
- else {
- coord = (GLuint *)VB->ProjectedClipPtr->data;
- coord_stride = VB->ProjectedClipPtr->stride;
- }
-
- if (VB->ColorPtr[0]->Type != GL_UNSIGNED_BYTE)
- IMPORT_FLOAT_COLORS( ctx );
-
- if (coord_stride != 4 * sizeof(GLfloat) ||
- VB->TexCoordPtr[0]->stride != 2 * sizeof(GLfloat) ||
- VB->ColorPtr[0]->StrideB != 4 * sizeof(GLubyte) ||
- start != 0) {
- emit_wgt0( ctx, start, end, dest, stride );
- return;
- }
-
- ASSERT(stride == 8*sizeof(GLuint));
-
- {
- GLuint *tc0 = (GLuint *)VB->TexCoordPtr[0]->data;
- GLuint *col = (GLuint *)VB->ColorPtr[0]->Ptr;
- GLuint *v = (GLuint *)dest;
-
- for (i=end+1; --i ; ) {
- GLuint *x;
- x = coord; coord += 4;
- v[0] = x[0];
- v[1] = x[1];
- v[2] = x[2];
- v[3] = x[3];
- v[4] = LE32_TO_CPU(*col++);
- x = tc0; tc0 += 2;
- v[6] = x[0];
- v[7] = x[1];
- v += 8;
- }
- }
-}
-
-
-
-/***********************************************************************
- * Initialization
- ***********************************************************************/
-
-static void init_setup_tab( void )
-{
- init_wg();
- init_wgs();
- init_wgt0();
- init_wgpt0();
- init_wgt0t1();
- init_wgpt0t1();
- init_wgst0();
- init_wgspt0();
- init_wgst0t1();
- init_wgspt0t1();
- init_wgf();
- init_wgfs();
- init_wgft0();
- init_wgfpt0();
- init_wgft0t1();
- init_wgfpt0t1();
- init_wgfst0();
- init_wgfspt0();
- init_wgfst0t1();
- init_wgfspt0t1();
-
- setup_tab[RADEON_XYZW_BIT|RADEON_RGBA_BIT|RADEON_TEX0_BIT].emit = emit_q3;
-}
-
-
-
-void radeonPrintSetupFlags(char *msg, GLuint flags )
-{
- fprintf(stderr, "%s(%x): %s%s%s%s%s%s%s\n",
- msg,
- (int)flags,
- (flags & RADEON_XYZW_BIT) ? " xyzw," : "",
- (flags & RADEON_RGBA_BIT) ? " rgba," : "",
- (flags & RADEON_SPEC_BIT) ? " spec," : "",
- (flags & RADEON_FOG_BIT) ? " fog," : "",
- (flags & RADEON_TEX0_BIT) ? " tex-0," : "",
- (flags & RADEON_TEX1_BIT) ? " tex-1," : "",
- (flags & RADEON_PTEX_BIT) ? " proj-tex," : "");
-}
-
-
-void radeonCheckTexSizes( GLcontext *ctx )
-{
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
-
- if (!setup_tab[rmesa->SetupIndex].check_tex_sizes(ctx)) {
- GLuint ind = rmesa->SetupIndex |= (RADEON_PTEX_BIT|RADEON_RGBA_BIT);
-
- /* Radeon handles projective textures nicely; just have to change
- * up to the new vertex format.
- */
- if (setup_tab[ind].vertex_format != rmesa->vertex_format) {
- RADEON_STATECHANGE(rmesa, 0);
- rmesa->vertex_format = setup_tab[ind].vertex_format;
- rmesa->vertex_size = setup_tab[ind].vertex_size;
- rmesa->vertex_stride_shift = setup_tab[ind].vertex_stride_shift;
- }
-
- if (!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
- tnl->Driver.Render.Interp = setup_tab[rmesa->SetupIndex].interp;
- tnl->Driver.Render.CopyPV = setup_tab[rmesa->SetupIndex].copy_pv;
- }
- }
-}
-
-
-void radeonBuildVertices( GLcontext *ctx, GLuint start, GLuint count,
- GLuint newinputs )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
- GLubyte *v = ((GLubyte *)rmesa->verts + (start<<rmesa->vertex_stride_shift));
- GLuint stride = 1<<rmesa->vertex_stride_shift;
-
- newinputs |= rmesa->SetupNewInputs;
- rmesa->SetupNewInputs = 0;
-
- if (!newinputs)
- return;
-
- /* No longer try to repair vertices.
- */
- setup_tab[rmesa->SetupIndex].emit( ctx, start, count, v, stride );
-}
-
-void radeonChooseVertexState( GLcontext *ctx )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- GLuint ind = (RADEON_XYZW_BIT | RADEON_RGBA_BIT);
-
- if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
- ind |= RADEON_SPEC_BIT;
-
- if (ctx->Fog.Enabled)
- ind |= RADEON_FOG_BIT;
-
- if (ctx->Texture._ReallyEnabled & TEXTURE1_ANY)
- ind |= RADEON_TEX0_BIT|RADEON_TEX1_BIT;
- else if (ctx->Texture._ReallyEnabled & TEXTURE0_ANY)
- ind |= RADEON_TEX0_BIT;
-
- rmesa->SetupIndex = ind;
-
- if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) {
- /* In these modes the hardware vertices don't contain all the
- * necessary information for interpolation (edgeflag,
- * back-colors).
- *
- * Wrap the standard functions with ones that also interpolate
- * the back colors and edgeflags.
- */
- tnl->Driver.Render.Interp = radeon_interp_extras;
- tnl->Driver.Render.CopyPV = radeon_copy_pv_extras;
- }
- else {
- tnl->Driver.Render.Interp = setup_tab[ind].interp;
- tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv;
- }
-
-
- if (setup_tab[ind].vertex_format != rmesa->vertex_format) {
- RADEON_STATECHANGE(rmesa, 0);
- rmesa->vertex_format = setup_tab[ind].vertex_format;
- rmesa->vertex_size = setup_tab[ind].vertex_size;
- rmesa->vertex_stride_shift = setup_tab[ind].vertex_stride_shift;
- }
-
- {
- GLuint se_coord_fmt, needproj;
-
- /* HW perspective divide is a win, but tiny vertex formats are a
- * bigger one.
- */
- if (setup_tab[ind].vertex_format == TINY_VERTEX_FORMAT ||
- (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
- needproj = GL_TRUE;
- se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
- RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
- RADEON_TEX1_W_ROUTING_USE_Q1);
- }
- else {
- needproj = GL_FALSE;
- se_coord_fmt = (RADEON_VTX_W0_IS_NOT_1_OVER_W0 |
- RADEON_TEX1_W_ROUTING_USE_Q1);
- }
-
- if ( se_coord_fmt != rmesa->state.hw.vertex.se_coord_fmt ) {
- RADEON_STATECHANGE(rmesa, RADEON_UPLOAD_VERTFMT);
- rmesa->state.hw.vertex.se_coord_fmt = se_coord_fmt;
- _tnl_need_projected_coords( ctx, needproj );
- }
- }
-}
-
-
-
-void radeon_emit_contiguous_verts( GLcontext *ctx, GLuint start, GLuint count )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint vertex_size = rmesa->vertex_size * 4;
- CARD32 *dest = radeonAllocDmaLow( rmesa, (count-start)*vertex_size,
- __FUNCTION__ );
- rmesa->num_verts += count - start;
- setup_tab[rmesa->SetupIndex].emit( ctx, start, count, dest, vertex_size );
-}
-
-
-void radeon_emit_indexed_verts( GLcontext *ctx, GLuint start, GLuint count )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint vertex_size = rmesa->vertex_size * 4;
- GLuint bufsz = (count-start) * vertex_size;
- CARD32 *dest;
-
- rmesa->dma.low = (rmesa->dma.low + 63) & ~63; /* alignment */
- rmesa->dma.last = rmesa->dma.low;
-
- dest = radeonAllocDmaLow( rmesa, bufsz, __FUNCTION__);
- setup_tab[rmesa->SetupIndex].emit( ctx, start, count, dest, vertex_size );
-
- rmesa->dma.retained = rmesa->dma.buffer;
- rmesa->dma.offset = (rmesa->dma.buffer->idx * RADEON_BUFFER_SIZE +
- rmesa->dma.low - bufsz);
-
- rmesa->dma.low = (rmesa->dma.low + 0x7) & ~0x7; /* alignment */
- rmesa->dma.last = rmesa->dma.low;
-}
-
-
-void radeonInitVB( GLcontext *ctx )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint size = TNL_CONTEXT(ctx)->vb.Size;
- rmesa->verts = (char *)ALIGN_MALLOC( size * 16 * 4, 32 );
-
- {
- static int firsttime = 1;
- if (firsttime) {
- init_setup_tab();
- firsttime = 0;
- }
- }
-}
-
-
-void radeonFreeVB( GLcontext *ctx )
-{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- if (rmesa->verts) {
- ALIGN_FREE(rmesa->verts);
- rmesa->verts = 0;
- }
-
- if (rmesa->UbyteSecondaryColor.Ptr) {
- ALIGN_FREE(rmesa->UbyteSecondaryColor.Ptr);
- rmesa->UbyteSecondaryColor.Ptr = 0;
- }
-
- if (rmesa->UbyteColor.Ptr) {
- ALIGN_FREE(rmesa->UbyteColor.Ptr);
- rmesa->UbyteColor.Ptr = 0;
- }
-}