merged trunk

14 files changed, 150 insertions, 1091 deletions

diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_compat.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_compat.c
index 60f82d17d..405636465 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_compat.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_compat.c
@@ -234,6 +234,7 @@ static void radeonCompatEmitPrimitiveLocked( radeonContextPtr rmesa,
    for ( i = 0 ; i < nbox ; ) {
       int nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, nbox );
       XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drmRadeonVertex vtx;
       
       rmesa->sarea->dirty |= RADEON_UPLOAD_CLIPRECTS;
       rmesa->sarea->nbox = nr - i;
@@ -251,11 +252,14 @@ static void radeonCompatEmitPrimitiveLocked( radeonContextPtr rmesa,
 		 nr == nbox,
 		 rmesa->sarea->nbox );
 
-      drmRadeonFlushVertexBuffer( rmesa->dri.fd,
-				  hw_primitive, 
-				  rmesa->dma.current.buf->buf->idx, 
-				  nverts, 
-				  nr == nbox );
+      vtx.prim = hw_primitive;
+      vtx.idx = rmesa->dma.current.buf->buf->idx;
+      vtx.count = nverts;
+      vtx.discard = (nr == nbox);      
+
+      drmCommandWrite( rmesa->dri.fd, 
+		       DRM_RADEON_VERTEX,
+		       &vtx, sizeof(vtx));
    }
 }
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
index 2d086fc7d..541c90e1f 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
@@ -42,7 +42,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <X11/Xlibint.h>
 #include "dri_util.h"
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
 #include "radeon_common.h"
 
 #include "macros.h"
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
index c49c3d72e..317681c39 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
@@ -360,6 +360,7 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
 				    const char * caller )
 {
    int ret, i;
+   drmRadeonCmdBuffer cmd;
 
    if (RADEON_DEBUG & DEBUG_IOCTL) {
       fprintf(stderr, "%s from %s\n", __FUNCTION__, caller); 
@@ -379,27 +380,27 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
       if (rmesa->state.scissor.enabled) 
 	 ret = radeonSanityCmdBuffer( rmesa, 
 				      rmesa->state.scissor.numClipRects,
-				      (drmClipRectPtr)
 				      rmesa->state.scissor.pClipRects);
       else
 	 ret = radeonSanityCmdBuffer( rmesa, 
 				      rmesa->numClipRects,
-				      (drmClipRectPtr) rmesa->pClipRects);
+				      rmesa->pClipRects);
    }
 
-   if (rmesa->state.scissor.enabled) 
-      ret = drmRadeonCmdBuffer( rmesa->dri.fd, 
-				rmesa->store.cmd_used,
-				rmesa->store.cmd_buf,
-				rmesa->state.scissor.numClipRects,
-				(drmClipRectPtr)
-				rmesa->state.scissor.pClipRects);
-   else
-      ret = drmRadeonCmdBuffer( rmesa->dri.fd, 
-				rmesa->store.cmd_used,
-				rmesa->store.cmd_buf,
-				rmesa->numClipRects,
-				(drmClipRectPtr) rmesa->pClipRects);
+   cmd.bufsz = rmesa->store.cmd_used;
+   cmd.buf = rmesa->store.cmd_buf;
+
+   if (rmesa->state.scissor.enabled) {
+      cmd.nbox = rmesa->state.scissor.numClipRects;
+      cmd.boxes = (drmClipRect *)rmesa->state.scissor.pClipRects;
+   } else {
+      cmd.nbox = rmesa->numClipRects;
+      cmd.boxes = (drmClipRect *)rmesa->pClipRects;
+   }
+
+   ret = drmCommandWrite( rmesa->dri.fd,
+			  DRM_RADEON_CMDBUF,
+			  &cmd, sizeof(cmd) );
 
    rmesa->store.primnr = 0;
    rmesa->store.statenr = 0;
@@ -851,7 +852,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       clear.flags       = flags;
       clear.clear_color = rmesa->state.color.clear;
       clear.clear_depth = rmesa->state.depth.clear;
-      clear.color_mask  = rmesa->state.hw.mask.rb3d_planemask;
+      clear.color_mask  = rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK];
       clear.depth_mask  = rmesa->state.stencil.clear;
       clear.depth_boxes = depth_boxes;
 
@@ -884,7 +885,7 @@ void radeonWaitForIdleLocked( radeonContextPtr rmesa )
 {
     int fd = rmesa->dri.fd;
     int to = 0;
-    int ret, i;
+    int ret, i = 0;
 
     rmesa->c_drawWaits++;
 
@@ -920,9 +921,14 @@ static void radeonWaitForIdle( radeonContextPtr rmesa )
 void radeonGetAllParams( radeonContextPtr rmesa )
 {
    int ret;
-   ret = drmRadeonGetParam( rmesa->dri.fd,
-			    RADEON_PARAM_AGP_BUFFER_OFFSET, 
-			    &rmesa->dri.agp_buffer_offset );
+   drmRadeonGetParam gp;
+
+   gp.param = RADEON_PARAM_AGP_BUFFER_OFFSET;
+   gp.value = &rmesa->dri.agp_buffer_offset;
+
+   ret = drmCommandWriteRead( rmesa->dri.fd,
+			      DRM_RADEON_GETPARAM,
+			      &gp, sizeof(gp));
    if (ret) {
       fprintf(stderr, "drmRadeonGetParam: %d\n", ret);
       exit(1);
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.c
index f3eac3b33..2d0ac3388 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.c
@@ -50,33 +50,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #endif
 
 
-typedef union {
-	int i;
-	struct { 
-		char cmd_type, pad0, pad1, pad2;
-	} header;
-	struct { 
-		char cmd_type, packet_id, pad0, pad1;
-	} packet;
-	struct { 
-		char cmd_type, offset, stride, count; 
-	} scalars;
-	struct { 
-		char cmd_type, offset, stride, count; 
-	} vectors;
-	struct { 
-		char cmd_type, buf_idx, pad0, pad1; 
-	} dma;
-} drm_radeon_cmd_header_t;
-
-typedef struct drm_radeon_cmd_buffer {
-	int bufsz;
-	char *buf;
-	int nbox;
-	drmClipRectPtr boxes;
-} drm_radeon_cmd_buffer_t;
-
-
 /* New (1.3) state mechanism.  3 commands (packet, scalar, vector) in
  * 1.3 cmdbuffers allow all previous state to be updated as well as
  * the tcl scalar and vector areas.  
@@ -411,8 +384,8 @@ static int print_reg_assignment( struct reg *reg, int data )
 }
 
 static int radeon_emit_packets( 
-   drm_radeon_cmd_header_t header,
-   drm_radeon_cmd_buffer_t *cmdbuf )
+   drmRadeonCmdHeader header,
+   drmRadeonCmdBuffer *cmdbuf )
 {
    int id = (int)header.packet.packet_id;
    int sz = packet[id].len;
@@ -441,8 +414,8 @@ static int radeon_emit_packets(
 
 
 static int radeon_emit_scalars( 
-   drm_radeon_cmd_header_t header,
-   drm_radeon_cmd_buffer_t *cmdbuf )
+   drmRadeonCmdHeader header,
+   drmRadeonCmdBuffer *cmdbuf )
 {
    int sz = header.scalars.count;
    int *data = (int *)cmdbuf->buf;
@@ -476,8 +449,8 @@ static int radeon_emit_scalars(
  * Check: table start, end, nr, etc.
  */
 static int radeon_emit_vectors( 
-   drm_radeon_cmd_header_t header,
-   drm_radeon_cmd_buffer_t *cmdbuf )
+   drmRadeonCmdHeader header,
+   drmRadeonCmdBuffer *cmdbuf )
 {
    int sz = header.vectors.count;
    int *data = (int *)cmdbuf->buf;
@@ -637,7 +610,7 @@ static int print_prim_and_flags( int prim )
 
 /* build in knowledge about each packet type
  */
-static int radeon_emit_packet3( drm_radeon_cmd_buffer_t *cmdbuf )
+static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
 {
    int cmdsz;
    int *cmd = (int *)cmdbuf->buf;
@@ -798,9 +771,9 @@ static int radeon_emit_packet3( drm_radeon_cmd_buffer_t *cmdbuf )
 
 /* Check cliprects for bounds, then pass on to above:
  */
-static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
+static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
 {   
-   drmClipRectPtr boxes = cmdbuf->boxes;
+   XF86DRIClipRectRec *boxes = (XF86DRIClipRectRec *)cmdbuf->boxes;
    int i = 0;
 
    if (NORMAL) {
@@ -822,11 +795,11 @@ static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
 
 int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 			   int nbox,
-			   drmClipRectPtr boxes )
+			   XF86DRIClipRectRec *boxes )
 {
    int idx;
-   drm_radeon_cmd_buffer_t cmdbuf;
-   drm_radeon_cmd_header_t header;
+   drmRadeonCmdBuffer cmdbuf;
+   drmRadeonCmdHeader header;
    static int inited = 0;
 
    if (!inited) {
@@ -836,7 +809,7 @@ int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 
    cmdbuf.buf = rmesa->store.cmd_buf;
    cmdbuf.bufsz = rmesa->store.cmd_used;
-   cmdbuf.boxes = boxes;
+   cmdbuf.boxes = (drmClipRect *)boxes;
    cmdbuf.nbox = nbox;
 
    while ( cmdbuf.bufsz >= sizeof(header) ) {
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.h
index 2bb416f84..58e8335dd 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.h
@@ -3,6 +3,6 @@
 
 extern int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 				  int nbox,
-				  drmClipRectPtr boxes );
+				  XF86DRIClipRectRec *boxes );
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
index 89f92cc8f..ec789af39 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
@@ -38,6 +38,8 @@
 #ifndef _RADEON_COMMON_H_
 #define _RADEON_COMMON_H_
 
+#include "xf86drm.h"
+
 /* WARNING: If you change any of these defines, make sure to change
  * the kernel include file as well (radeon_drm.h)
  */
@@ -62,6 +64,7 @@
 #define DRM_RADEON_VERTEX2                0x0f
 #define DRM_RADEON_CMDBUF                 0x10
 #define DRM_RADEON_GETPARAM               0x11
+#define DRM_RADEON_FLIP                   0x12
 #define DRM_RADEON_MAX_DRM_COMMAND_INDEX  0x39
 
 
@@ -229,6 +232,15 @@ typedef struct {
 	unsigned int dirty;
 } drmRadeonState;
 
+/* 1.1 vertex ioctl.  Used in compatibility modes.
+ */
+typedef struct {
+	int prim;
+	int idx;			/* Index of vertex buffer */
+	int count;			/* Number of vertices in buffer */
+	int discard;			/* Client finished with buffer? */
+} drmRadeonVertex;
+
 typedef struct {
 	unsigned int start;
 	unsigned int finish;
@@ -250,4 +262,79 @@ typedef struct {
 #define RADEON_MAX_STATES 16
 #define RADEON_MAX_PRIMS  64
 
+/* Command buffer.  Replace with true dma stream?
+ */
+typedef struct {
+	int bufsz;
+	char *buf;
+	int nbox;
+        drmClipRect *boxes;
+} drmRadeonCmdBuffer;
+
+/* New style per-packet identifiers for use in cmd_buffer ioctl with
+ * the RADEON_EMIT_PACKET command.  Comments relate new packets to old
+ * state bits and the packet size:
+ */
+#define RADEON_EMIT_PP_MISC                         0 /* context/7 */
+#define RADEON_EMIT_PP_CNTL                         1 /* context/3 */
+#define RADEON_EMIT_RB3D_COLORPITCH                 2 /* context/1 */
+#define RADEON_EMIT_RE_LINE_PATTERN                 3 /* line/2 */
+#define RADEON_EMIT_SE_LINE_WIDTH                   4 /* line/1 */
+#define RADEON_EMIT_PP_LUM_MATRIX                   5 /* bumpmap/1 */
+#define RADEON_EMIT_PP_ROT_MATRIX_0                 6 /* bumpmap/2 */
+#define RADEON_EMIT_RB3D_STENCILREFMASK             7 /* masks/3 */
+#define RADEON_EMIT_SE_VPORT_XSCALE                 8 /* viewport/6 */
+#define RADEON_EMIT_SE_CNTL                         9 /* setup/2 */
+#define RADEON_EMIT_SE_CNTL_STATUS                  10 /* setup/1 */
+#define RADEON_EMIT_RE_MISC                         11 /* misc/1 */
+#define RADEON_EMIT_PP_TXFILTER_0                   12 /* tex0/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_0               13 /* tex0/1 */
+#define RADEON_EMIT_PP_TXFILTER_1                   14 /* tex1/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_1               15 /* tex1/1 */
+#define RADEON_EMIT_PP_TXFILTER_2                   16 /* tex2/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_2               17 /* tex2/1 */
+#define RADEON_EMIT_SE_ZBIAS_FACTOR                 18 /* zbias/2 */
+#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT           19 /* tcl/11 */
+#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */
+#define RADEON_MAX_STATE_PACKETS                    21
+
+
+/* Commands understood by cmd_buffer ioctl.  More can be added but
+ * obviously these can't be removed or changed:
+ */
+#define RADEON_CMD_PACKET      1 /* emit one of the register packets above */
+#define RADEON_CMD_SCALARS     2 /* emit scalar data */
+#define RADEON_CMD_VECTORS     3 /* emit vector data */
+#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */
+#define RADEON_CMD_PACKET3     5 /* emit hw packet */
+#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
+
+typedef union {
+	int i;
+	struct { 
+		char cmd_type, pad0, pad1, pad2;
+	} header;
+	struct { 
+		char cmd_type, packet_id, pad0, pad1;
+	} packet;
+	struct { 
+		char cmd_type, offset, stride, count; 
+	} scalars;
+	struct { 
+		char cmd_type, offset, stride, count; 
+	} vectors;
+	struct { 
+		char cmd_type, buf_idx, pad0, pad1; 
+	} dma;
+} drmRadeonCmdHeader;
+
+
+
+typedef struct drm_radeon_getparam {
+	int param;
+	int *value;
+} drmRadeonGetParam;
+
+#define RADEON_PARAM_AGP_BUFFER_OFFSET 0x1
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
index 55947122f..e16e79481 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
@@ -1804,7 +1804,9 @@ RADEONDRITransitionTo2d(ScreenPtr pScreen)
    /* Go back to the front buffer if things were left in a flipped state.
     */
    if (pSAREAPriv->pfCurrentPage != 0) {
-      drmRadeonFlipBuffers( info->drmFD );
+      /* Won't work as we're not holding the lock at this point:
+       */
+/*       drmRadeonFlipBuffers( info->drmFD ); */
    }
 
    /* Shut down shadowing if we've made it back to the front page: 
@@ -1812,9 +1814,9 @@ RADEONDRITransitionTo2d(ScreenPtr pScreen)
    if (pSAREAPriv->pfCurrentPage == 0) {
       pSAREAPriv->pfAllowPageFlip = 0;
    }
-   else 
-      xf86DrvMsg(pScreen->myNum, X_WARNING,
-		 "[dri] RADEONDRITransitionTo2d failed to unflip buffers.\n");
+/*    else  */
+/*       xf86DrvMsg(pScreen->myNum, X_WARNING, */
+/* 		 "[dri] RADEONDRITransitionTo2d failed to unflip buffers.\n"); */
 
    info->have3DWindows = 0;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
index d116f3752..6ab295c48 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
@@ -84,6 +84,10 @@ typedef unsigned int  drm_magic_t;
 /* Warning: If you change this structure, make sure you change
  * XF86DRIClipRectRec in the server as well */
 
+/* KW: Actually it's illegal to change either for
+ * backwards-compatibility reasons.
+ */
+
 typedef struct drm_clip_rect {
 	unsigned short	x1;
 	unsigned short	y1;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c
deleted file mode 100644
index 4246fdef8..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c,v 1.1 2001/10/04 18:28:22 alanh Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# include "xf86Priv.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/stat.h>
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/stat.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-
-#include "xf86drm.h"
-#include "drm.h"
-#include "xf86drmI830.h"
-
-Bool drmI830CleanupDma(int driSubFD)
-{
-   drm_i830_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i830_init_t));
-   init.func = I810_CLEANUP_DMA;
-   
-   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
-      return FALSE;
-   }
-   
-   return TRUE;
-}
-
-Bool drmI830InitDma(int driSubFD, drmI830Init *info)
-{
-   drm_i830_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i830_init_t));
-
-   init.func = I810_INIT_DMA;
-   init.mmio_offset = info->mmio_offset;
-   init.buffers_offset = info->buffers_offset;
-   init.ring_start = info->start;
-   init.ring_end = info->end;
-   init.ring_size = info->size;
-   init.sarea_priv_offset = info->sarea_off;
-   init.front_offset = info->front_offset;
-   init.back_offset = info->back_offset;
-   init.depth_offset = info->depth_offset;
-   init.w = info->w;
-   init.h = info->h;
-   init.pitch = info->pitch;
-   init.pitch_bits = info->pitch_bits;
-   init.back_pitch = info->pitch;
-   init.depth_pitch = info->pitch;
-   init.cpp = info->cpp;
-
-   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
-      return FALSE;
-   }
-   return TRUE;
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c
deleted file mode 100644
index 0408a3166..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c
+++ /dev/null
@@ -1,452 +0,0 @@
-/* xf86drmRadeon.c -- User-level interface to Radeon DRM device
- *
- * Copyright 2000 VA Linx Systems, Inc., Fremont, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *   Gareth Hughes <gareth@valinux.com>
- *   Kevin E. Martin <martin@valinux.com>
- *
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c,v 1.4 2001/08/27 17:40:59 dawes Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmRadeon.h"
-#include "drm.h"
-
-#define RADEON_BUFFER_RETRY	32
-#define RADEON_IDLE_RETRY	16
-
-
-int drmRadeonInitCP( int fd, drmRadeonInit *info )
-{
-   drm_radeon_init_t init;
-
-   memset( &init, 0, sizeof(drm_radeon_init_t) );
-
-   init.func			= RADEON_INIT_CP;
-   init.sarea_priv_offset	= info->sarea_priv_offset;
-   init.is_pci			= info->is_pci;
-   init.cp_mode			= info->cp_mode;
-   init.agp_size		= info->agp_size;
-   init.ring_size		= info->ring_size;
-   init.usec_timeout		= info->usec_timeout;
-
-   init.fb_bpp			= info->fb_bpp;
-   init.front_offset		= info->front_offset;
-   init.front_pitch		= info->front_pitch;
-   init.back_offset		= info->back_offset;
-   init.back_pitch		= info->back_pitch;
-
-   init.depth_bpp		= info->depth_bpp;
-   init.depth_offset		= info->depth_offset;
-   init.depth_pitch		= info->depth_pitch;
-
-   init.fb_offset		= info->fb_offset;
-   init.mmio_offset		= info->mmio_offset;
-   init.ring_offset		= info->ring_offset;
-   init.ring_rptr_offset	= info->ring_rptr_offset;
-   init.buffers_offset		= info->buffers_offset;
-   init.agp_textures_offset	= info->agp_textures_offset;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonCleanupCP( int fd )
-{
-   drm_radeon_init_t init;
-
-   memset( &init, 0, sizeof(drm_radeon_init_t) );
-
-   init.func = RADEON_CLEANUP_CP;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonStartCP( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_START, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonStopCP( int fd )
-{
-   drm_radeon_cp_stop_t stop;
-   int ret, i = 0;
-
-   stop.flush = 1;
-   stop.idle = 1;
-
-   ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.flush = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
-   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.idle = 0;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonResetCP( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonWaitForIdleCP( int fd )
-{
-   int ret, i = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_IDLE, NULL );
-   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmRadeonEngineReset( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFullScreen( int fd, int enable )
-{
-   drm_radeon_fullscreen_t fs;
-
-   if ( enable ) {
-      fs.func = RADEON_INIT_FULLSCREEN;
-   } else {
-      fs.func = RADEON_CLEANUP_FULLSCREEN;
-   }
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_FULLSCREEN, &fs ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonSwapBuffers( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_SWAP, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFlipBuffers( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_FLIP, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonClear( int fd, unsigned int flags,
-		    unsigned int clear_color, unsigned int clear_depth,
-		    unsigned int color_mask, unsigned int stencil,
-		    void *b, int nbox )
-{
-   drm_radeon_clear_t clear;
-   drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
-   drm_clip_rect_t *boxes = (drm_clip_rect_t *)b;
-   int i;
-
-   clear.flags = flags;
-   clear.clear_color = clear_color;
-   clear.clear_depth = clear_depth;
-   clear.color_mask = color_mask;
-   clear.depth_mask = stencil;	/* misnamed field in ioctl */
-   clear.depth_boxes = depth_boxes;
-
-   /* We can remove this when we do real depth clears, instead of
-    * rendering a rectangle into the depth buffer.  This prevents
-    * floating point calculations being done in the kernel.
-    */
-   for ( i = 0 ; i < nbox ; i++ ) {
-      depth_boxes[i].f[CLEAR_X1] = (float)boxes[i].x1;
-      depth_boxes[i].f[CLEAR_Y1] = (float)boxes[i].y1;
-      depth_boxes[i].f[CLEAR_X2] = (float)boxes[i].x2;
-      depth_boxes[i].f[CLEAR_Y2] = (float)boxes[i].y2;
-      depth_boxes[i].f[CLEAR_DEPTH] = (float)clear_depth; 
-
-/*        fprintf(stderr, "box %d:  %f,%f %f,%f depth: %f\n", */
-/*  	      i, */
-/*  	      depth_boxes[i].f[CLEAR_X1], */
-/*  	      depth_boxes[i].f[CLEAR_Y1], */
-/*  	      depth_boxes[i].f[CLEAR_X2], */
-/*  	      depth_boxes[i].f[CLEAR_Y2], */
-/*  	      depth_boxes[i].f[CLEAR_DEPTH]); */
-   }
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CLEAR, &clear ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-/* Obsolete
- */
-int drmRadeonFlushVertexBuffer( int fd, int prim, int index,
-				int count, int discard )
-{
-   drm_radeon_vertex_t v;
-
-   v.prim = prim;
-   v.idx = index;
-   v.count = count;
-   v.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_VERTEX, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-/* Obsolete
- */
-int drmRadeonFlushIndices( int fd, int prim, int index,
-			   int start, int end, int discard )
-{
-   drm_radeon_indices_t elts;
-
-   elts.prim = prim;
-   elts.idx = index;
-   elts.start = start;
-   elts.end = end;
-   elts.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_INDICES, &elts ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFlushPrims( int fd, int index,
-			 int discard, int nr_states,
-			 drmRadeonState *state,
-			 int nr_prims,
-			 drmRadeonPrim *prim )
-{
-   drm_radeon_vertex2_t v;
-
-   v.idx = index;
-   v.discard = discard;
-   v.nr_states = nr_states;
-   v.state = (drm_radeon_state_t *)state;
-   v.nr_prims = nr_prims;
-   v.prim = (drm_radeon_prim_t *)prim;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_VERTEX2, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-int drmRadeonCmdBuffer( int fd, 
-			int bufsz, char *buf,
-			int nbox, drmClipRectPtr boxes )
-{
-   drm_radeon_cmd_buffer_t v;
-
-   v.bufsz = bufsz;
-   v.buf = buf;
-   v.nbox = nbox;
-   v.boxes = (drm_clip_rect_t *)boxes;
-
-/*     fprintf(stderr, "%s nbox: %d\n", __FUNCTION__, nbox); */
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CMDBUF, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-
-int drmRadeonLoadTexture( int fd, int offset, int pitch, int format,
-			  int width, int height, drmRadeonTexImage *image )
-{
-   drm_radeon_texture_t tex;
-   drm_radeon_tex_image_t tmp;
-   int ret;
-
-   tex.offset = offset;
-   tex.pitch = pitch;
-   tex.format = format;
-   tex.width = width;
-   tex.height = height;
-   tex.image = &tmp;
-
-   /* This gets updated by the kernel when a multipass blit is needed.
-    */
-   memcpy( &tmp, image, sizeof(drm_radeon_tex_image_t) );
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_TEXTURE, &tex );
-   } while ( ret && errno == EAGAIN );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmRadeonPolygonStipple( int fd, unsigned int *mask )
-{
-   drm_radeon_stipple_t stipple;
-
-   stipple.mask = mask;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_STIPPLE, &stipple ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFlushIndirectBuffer( int fd, int index,
-				  int start, int end, int discard )
-{
-   drm_radeon_indirect_t ind;
-
-   ind.idx = index;
-   ind.start = start;
-   ind.end = end;
-   ind.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_INDIRECT, &ind ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-
-int drmRadeonGetParam( int fd, int param, int *val )
-{
-   drm_radeon_getparam_t p;
-   
-   p.param = param;
-   p.value = val;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_GETPARAM, &p ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
index d116f3752..6ab295c48 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
@@ -84,6 +84,10 @@ typedef unsigned int  drm_magic_t;
 /* Warning: If you change this structure, make sure you change
  * XF86DRIClipRectRec in the server as well */
 
+/* KW: Actually it's illegal to change either for
+ * backwards-compatibility reasons.
+ */
+
 typedef struct drm_clip_rect {
 	unsigned short	x1;
 	unsigned short	y1;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h
deleted file mode 100644
index 89d8d8cb5..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/**************************************************************************
-
-Copyright 2001 VA Linux Systems Inc., Fremont, California.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-
-**************************************************************************/
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h,v 1.2 2001/10/04 18:32:29 alanh Exp $ */
-
-/* Author: Jeff Hartmann <jhartmann@valinux.com> 
- */
-
-#ifndef _I830_XF86DRM_H_
-#define _I830_XF86DRM_H_
-
-/* WARNING: These defines must be the same as what the Xserver uses.
- * if you change them, you must change the defines in the Xserver.
- */
-
-#ifndef _I830_DEFINES_
-#define _I830_DEFINES_
-
-#define I830_DMA_BUF_ORDER		12
-#define I830_DMA_BUF_SZ 		(1<<I830_DMA_BUF_ORDER)
-#define I830_DMA_BUF_NR 		256
-#define I830_NR_SAREA_CLIPRECTS 	8
-
-/* Each region is a minimum of 64k, and there are at most 64 of them.
- */
-#define I830_NR_TEX_REGIONS 64
-#define I830_LOG_MIN_TEX_REGION_SIZE 16
-
-/* if defining I830_ENABLE_4_TEXTURES, do it in i830_3d_reg.h, too */
-#if !defined(I830_ENABLE_4_TEXTURES)
-#define I830_TEXTURE_COUNT	2
-#define I830_TEXBLEND_COUNT	2	/* always same as TEXTURE_COUNT? */
-#else /* defined(I830_ENABLE_4_TEXTURES) */
-#define I830_TEXTURE_COUNT	4
-#define I830_TEXBLEND_COUNT	4	/* always same as TEXTURE_COUNT? */
-#endif /* I830_ENABLE_4_TEXTURES */
-
-#define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */
-
-#define I830_UPLOAD_CTX			0x1
-#define I830_UPLOAD_BUFFERS		0x2
-#define I830_UPLOAD_CLIPRECTS		0x4
-#define I830_UPLOAD_TEX0_IMAGE		0x100 /* handled clientside */
-#define I830_UPLOAD_TEX0_CUBE		0x200 /* handled clientside */
-#define I830_UPLOAD_TEX1_IMAGE		0x400 /* handled clientside */
-#define I830_UPLOAD_TEX1_CUBE		0x800 /* handled clientside */
-#define I830_UPLOAD_TEX2_IMAGE		0x1000 /* handled clientside */
-#define I830_UPLOAD_TEX2_CUBE		0x2000 /* handled clientside */
-#define I830_UPLOAD_TEX3_IMAGE		0x4000 /* handled clientside */
-#define I830_UPLOAD_TEX3_CUBE		0x8000 /* handled clientside */
-#define I830_UPLOAD_TEX_N_IMAGE(n)	(0x100 << (n * 2))
-#define I830_UPLOAD_TEX_N_CUBE(n)	(0x200 << (n * 2))
-#define I830_UPLOAD_TEXIMAGE_MASK	0xff00
-#define I830_UPLOAD_TEX0			0x10000
-#define I830_UPLOAD_TEX1			0x20000
-#define I830_UPLOAD_TEX2			0x40000
-#define I830_UPLOAD_TEX3			0x80000
-#define I830_UPLOAD_TEX_N(n)		(0x10000 << (n))
-#define I830_UPLOAD_TEX_MASK		0xf0000
-#define I830_UPLOAD_TEXBLEND0		0x100000
-#define I830_UPLOAD_TEXBLEND1		0x200000
-#define I830_UPLOAD_TEXBLEND2		0x400000
-#define I830_UPLOAD_TEXBLEND3		0x800000
-#define I830_UPLOAD_TEXBLEND_N(n)	(0x100000 << (n))
-#define I830_UPLOAD_TEXBLEND_MASK	0xf00000
-#define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
-#define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
-
-/* Indices into buf.Setup where various bits of state are mirrored per
- * context and per buffer.  These can be fired at the card as a unit,
- * or in a piecewise fashion as required.
- */
-
-/* Destbuffer state 
- *    - backbuffer linear offset and pitch -- invarient in the current dri
- *    - zbuffer linear offset and pitch -- also invarient
- *    - drawing origin in back and depth buffers.
- *
- * Keep the depth/back buffer state here to acommodate private buffers
- * in the future.
- */
-
-#define I830_DESTREG_CBUFADDR 0
-/* Invarient */
-#define I830_DESTREG_DBUFADDR 1
-#define I830_DESTREG_DV0 2
-#define I830_DESTREG_DV1 3
-#define I830_DESTREG_SENABLE 4
-#define I830_DESTREG_SR0 5
-#define I830_DESTREG_SR1 6
-#define I830_DESTREG_SR2 7
-#define I830_DESTREG_DR0 8
-#define I830_DESTREG_DR1 9
-#define I830_DESTREG_DR2 10
-#define I830_DESTREG_DR3 11
-#define I830_DESTREG_DR4 12
-#define I830_DEST_SETUP_SIZE 13
-
-/* Context state
- */
-#define I830_CTXREG_STATE1		0
-#define I830_CTXREG_STATE2		1
-#define I830_CTXREG_STATE3		2
-#define I830_CTXREG_STATE4		3
-#define I830_CTXREG_STATE5		4
-#define I830_CTXREG_IALPHAB		5
-#define I830_CTXREG_STENCILTST		6
-#define I830_CTXREG_ENABLES_1		7
-#define I830_CTXREG_ENABLES_2		8
-#define I830_CTXREG_AA			9
-#define I830_CTXREG_FOGCOLOR		10
-#define I830_CTXREG_BLENDCOLR0		11
-#define I830_CTXREG_BLENDCOLR		12 /* Dword 1 of 2 dword command */
-#define I830_CTXREG_VF			13
-#define I830_CTXREG_VF2			14
-#define I830_CTXREG_MCSB0		15
-#define I830_CTXREG_MCSB1		16
-#define I830_CTX_SETUP_SIZE		17
-
-/* Texture state (per tex unit)
- */
-
-#define I830_TEXREG_MI0	0	/* GFX_OP_MAP_INFO (6 dwords) */
-#define I830_TEXREG_MI1	1
-#define I830_TEXREG_MI2	2
-#define I830_TEXREG_MI3	3
-#define I830_TEXREG_MI4	4
-#define I830_TEXREG_MI5	5
-#define I830_TEXREG_MF	6	/* GFX_OP_MAP_FILTER */
-#define I830_TEXREG_MLC	7	/* GFX_OP_MAP_LOD_CTL */
-#define I830_TEXREG_MLL	8	/* GFX_OP_MAP_LOD_LIMITS */
-#define I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS */
-#define I830_TEX_SETUP_SIZE 10
-
-
-#define I830_FRONT   0x1
-#define I830_BACK    0x2
-#define I830_DEPTH   0x4
-#endif /* _I830_DEFINES_ */
-
-typedef struct _drmI830Init {
-   unsigned int start;
-   unsigned int end;
-   unsigned int size;
-   unsigned int mmio_offset;
-   unsigned int buffers_offset;
-   int sarea_off;
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch;
-   unsigned int pitch_bits;
-   unsigned int cpp;
-} drmI830Init;
-
-Bool drmI830CleanupDma(int driSubFD);
-Bool drmI830InitDma(int driSubFD, drmI830Init *info );
-
-#endif /* _I830_DRM_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
deleted file mode 100644
index 063dbde3e..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
+++ /dev/null
@@ -1,279 +0,0 @@
-/* xf86drmRadeon.h -- OS-independent header for Radeon DRM user-level
- *                    library interface
- *
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author:
- *   Gareth Hughes <gareth@valinux.com>
- *   Kevin E. Martin <martin@valinux.com>
- *   Keith Whitwell <keith_whitwell@yahoo.com>
- *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h,v 1.6 2001/04/16 15:02:13 tsi Exp $
- *
- */
-
-#ifndef _XF86DRI_RADEON_H_
-#define _XF86DRI_RADEON_H_
-
-/* WARNING: If you change any of these defines, make sure to change
- * the kernel include file as well (radeon_drm.h)
- */
-
-#define RADEON_FRONT	0x1
-#define RADEON_BACK	0x2
-#define RADEON_DEPTH	0x4
-#define RADEON_STENCIL	0x8
-
-
-
-typedef struct {
-   unsigned long sarea_priv_offset;
-   int is_pci;
-   int cp_mode;
-   int agp_size;
-   int ring_size;
-   int usec_timeout;
-
-   unsigned int fb_bpp;
-   unsigned int front_offset, front_pitch;
-   unsigned int back_offset, back_pitch;
-   unsigned int depth_bpp;
-   unsigned int depth_offset, depth_pitch;
-
-   unsigned long fb_offset;
-   unsigned long mmio_offset;
-   unsigned long ring_offset;
-   unsigned long ring_rptr_offset;
-   unsigned long buffers_offset;
-   unsigned long agp_textures_offset;
-} drmRadeonInit;
-
-typedef struct {
-   unsigned int x;
-   unsigned int y;
-   unsigned int width;
-   unsigned int height;
-   void *data;
-} drmRadeonTexImage;
-
-
-#define RADEON_MAX_TEXTURE_UNITS 3
-
-/* Layout matches drm_radeon_state_t in linux drm_radeon.h.  
- */
-typedef struct {
-	struct {
-		unsigned int pp_misc;				/* 0x1c14 */
-		unsigned int pp_fog_color;
-		unsigned int re_solid_color;
-		unsigned int rb3d_blendcntl;
-		unsigned int rb3d_depthoffset;
-		unsigned int rb3d_depthpitch;
-		unsigned int rb3d_zstencilcntl;
-		unsigned int pp_cntl;				/* 0x1c38 */
-		unsigned int rb3d_cntl;
-		unsigned int rb3d_coloroffset;
-		unsigned int re_width_height;
-		unsigned int rb3d_colorpitch;
-	} context;
-	struct {
-		unsigned int se_cntl;
-	} setup1;
-	struct {
-		unsigned int se_coord_fmt;			/* 0x1c50 */
-	} vertex;
-	struct {
-		unsigned int re_line_pattern;			/* 0x1cd0 */
-		unsigned int re_line_state;
-		unsigned int se_line_width;			/* 0x1db8 */
-	} line;
-	struct {
-		unsigned int pp_lum_matrix;			/* 0x1d00 */
-		unsigned int pp_rot_matrix_0;			/* 0x1d58 */
-		unsigned int pp_rot_matrix_1;
-	} bumpmap;
-	struct {
-		unsigned int rb3d_stencilrefmask;		/* 0x1d7c */
-		unsigned int rb3d_ropcntl;
-		unsigned int rb3d_planemask;
-	} mask;
-	struct {
-		unsigned int se_vport_xscale;			/* 0x1d98 */
-		unsigned int se_vport_xoffset;
-		unsigned int se_vport_yscale;
-		unsigned int se_vport_yoffset;
-		unsigned int se_vport_zscale;
-		unsigned int se_vport_zoffset;
-	} viewport;
-	struct {
-		unsigned int se_cntl_status;			/* 0x2140 */
-	} setup2;
-	struct {
-		unsigned int re_top_left;	/*ignored*/	/* 0x26c0 */
-		unsigned int re_misc;
-	} misc;
-	struct {
-		unsigned int pp_txfilter;
-		unsigned int pp_txformat;
-		unsigned int pp_txoffset;
-		unsigned int pp_txcblend;
-		unsigned int pp_txablend;
-		unsigned int pp_tfactor;
-		unsigned int pp_border_color;
-	} texture[RADEON_MAX_TEXTURE_UNITS];
-	struct {
-		unsigned int se_zbias_factor; 
-		unsigned int se_zbias_constant;
-	} zbias;
-	unsigned int dirty;
-} drmRadeonState;
-
-
-typedef struct {
-	unsigned int start;
-	unsigned int finish;
-	unsigned int prim:8;
-	unsigned int stateidx:8;
-	unsigned int numverts:16; /* overloaded as offset/64 for elt prims */
-        unsigned int vc_format;
-} drmRadeonPrim;
-
-
-/* New style per-packet identifiers for use in cmd_buffer ioctl with
- * the RADEON_EMIT_PACKET command.  Comments relate new packets to old
- * state bits and the packet size:
- */
-#define RADEON_EMIT_PP_MISC                         0 /* context/7 */
-#define RADEON_EMIT_PP_CNTL                         1 /* context/3 */
-#define RADEON_EMIT_RB3D_COLORPITCH                 2 /* context/1 */
-#define RADEON_EMIT_RE_LINE_PATTERN                 3 /* line/2 */
-#define RADEON_EMIT_SE_LINE_WIDTH                   4 /* line/1 */
-#define RADEON_EMIT_PP_LUM_MATRIX                   5 /* bumpmap/1 */
-#define RADEON_EMIT_PP_ROT_MATRIX_0                 6 /* bumpmap/2 */
-#define RADEON_EMIT_RB3D_STENCILREFMASK             7 /* masks/3 */
-#define RADEON_EMIT_SE_VPORT_XSCALE                 8 /* viewport/6 */
-#define RADEON_EMIT_SE_CNTL                         9 /* setup/2 */
-#define RADEON_EMIT_SE_CNTL_STATUS                  10 /* setup/1 */
-#define RADEON_EMIT_RE_MISC                         11 /* misc/1 */
-#define RADEON_EMIT_PP_TXFILTER_0                   12 /* tex0/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_0               13 /* tex0/1 */
-#define RADEON_EMIT_PP_TXFILTER_1                   14 /* tex1/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_1               15 /* tex1/1 */
-#define RADEON_EMIT_PP_TXFILTER_2                   16 /* tex2/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_2               17 /* tex2/1 */
-#define RADEON_EMIT_SE_ZBIAS_FACTOR                 18 /* zbias/2 */
-#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT           19 /* tcl/11 */
-#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */
-#define RADEON_MAX_STATE_PACKETS                    21
-
-
-#define RADEON_CMD_PACKET       1
-#define RADEON_CMD_SCALARS      2
-#define RADEON_CMD_VECTORS      3
-#define RADEON_CMD_DMA_DISCARD  4 /* discard current dma buf */
-#define RADEON_CMD_PACKET3      5 /* emit hw packet */
-#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
-
-typedef union {
-        int i;
-	struct { 
-		char cmd_type, pad0, pad1, pad2;
-	} header;
-	struct { 
-		char cmd_type, packet_id, pad0, pad1;
-	} packet;
-	struct { 
-		char cmd_type, offset, stride, count; 
-	} scalars;
-	struct { 
-		char cmd_type, offset, stride, count; 
-	} vectors;
-	struct { 
-		char cmd_type, buf_idx, pad0, pad1; 
-	} dma;
-} drmRadeonCmdHeader;
-
-
-extern int drmRadeonInitCP( int fd, drmRadeonInit *info );
-extern int drmRadeonCleanupCP( int fd );
-
-extern int drmRadeonStartCP( int fd );
-extern int drmRadeonStopCP( int fd );
-extern int drmRadeonResetCP( int fd );
-extern int drmRadeonWaitForIdleCP( int fd );
-
-extern int drmRadeonEngineReset( int fd );
-
-extern int drmRadeonFullScreen( int fd, int enable );
-
-extern int drmRadeonSwapBuffers( int fd );
-extern int drmRadeonFlipBuffers( int fd );
-
-extern int drmRadeonClear( int fd, unsigned int flags,
-			   unsigned int clear_color, unsigned int clear_depth,
-			   unsigned int color_mask, unsigned int stencil,
-			   void *boxes, int nbox );
-
-/* Obsolete
- */
-extern int drmRadeonFlushVertexBuffer( int fd, int prim, int indx,
-				       int count, int discard );
-/* Obsolete
- */
-extern int drmRadeonFlushIndices( int fd, int prim, int indx,
-				  int start, int end, int discard );
-
-/* Replaces FlushVertexBuffer, FlushIndices
- * Obsolete
- */
-extern int drmRadeonFlushPrims( int fd, int indx,
-				int discard, 
-				int nr_states, 
-				drmRadeonState *state, 
-				int nr_prims,
-				drmRadeonPrim *prim );
-
-/* Replaces FlushPrims
- */
-extern int drmRadeonCmdBuffer( int fd,
-			       int bufsz, char *buf,
-			       int nrboxes, 
-			       drmClipRectPtr boxes );
-
-
-extern int drmRadeonLoadTexture( int fd, int offset, int pitch, int format,
-				 int width, int height,
-				 drmRadeonTexImage *image );
-
-extern int drmRadeonPolygonStipple( int fd, unsigned int *mask );
-
-extern int drmRadeonFlushIndirectBuffer( int fd, int indx,
-					 int start, int end, int discard );
-
-/* Find out some magic constants
- */
-#define RADEON_PARAM_AGP_BUFFER_OFFSET 0x1
-
-extern int drmRadeonGetParam( int fd, int param, int *val );
-
-#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h
deleted file mode 100644
index a4d31a004..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h,v 1.1 2001/12/15 00:59:12 dawes Exp $ */
-
-#ifndef __XF86DRI_SIS_H__
-#define __XF86DRI_SIS_H__
-
-extern Bool drmSiSAgpInit(int driSubFD, int offset, int size);
-
-#endif