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authorJason Ekstrand <jason.ekstrand@intel.com>2015-08-18 12:00:15 -0700
committerJason Ekstrand <jason.ekstrand@intel.com>2015-08-25 10:18:27 -0700
commit259f7291de2387aa3ac5f856b39b7b934a1d8e7d (patch)
tree5575e22eab317ece47aa781da92f8478f7030a48
parentcfa056c6a5eadf87f92a71346c0dddd2a080e302 (diff)
i965/fs: Rework uniform handling
Previously, we treated the entire UNIFORM file as if it had two elements: One for direct things and one for indirect. This is substantially different from how the old visitor code handled it where each element was effectively its own uniform. This commit makes the NIR path more like the old ir_visitor path where each uniform is separate. This should allow us to more easily make decisions about what to push. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp30
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c7
3 files changed, 11 insertions, 29 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 6d18929c3b1..6bca762951f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -318,9 +318,6 @@ public:
/** Number of uniform variable components visited. */
unsigned uniforms;
- /** Total number of direct uniforms we can get from NIR */
- unsigned num_direct_uniforms;
-
/** Byte-offset for the next available spot in the scratch space buffer. */
unsigned last_scratch;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index ad51d80fd09..a62dbb8b0ad 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -175,19 +175,9 @@ fs_visitor::nir_setup_outputs(nir_shader *shader)
void
fs_visitor::nir_setup_uniforms(nir_shader *shader)
{
- num_direct_uniforms = shader->num_direct_uniforms;
-
if (dispatch_width != 8)
return;
- /* We split the uniform register file in half. The first half is
- * entirely direct uniforms. The second half is indirect.
- */
- if (num_direct_uniforms > 0)
- param_size[0] = num_direct_uniforms;
- if (shader->num_uniforms > num_direct_uniforms)
- param_size[num_direct_uniforms] = shader->num_uniforms - num_direct_uniforms;
-
uniforms = shader->num_uniforms;
if (shader_prog) {
@@ -200,15 +190,19 @@ fs_visitor::nir_setup_uniforms(nir_shader *shader)
nir_setup_builtin_uniform(var);
else
nir_setup_uniform(var);
+
+ param_size[var->data.driver_location] = type_size_scalar(var->type);
}
} else {
- /* prog_to_nir doesn't create uniform variables; set param up directly. */
+ /* prog_to_nir only creates a single giant uniform variable so we can
+ * just set param up directly. */
for (unsigned p = 0; p < prog->Parameters->NumParameters; p++) {
for (unsigned int i = 0; i < 4; i++) {
stage_prog_data->param[4 * p + i] =
&prog->Parameters->ParameterValues[p][i];
}
}
+ param_size[0] = prog->Parameters->NumParameters * 4;
}
}
@@ -1504,21 +1498,13 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
has_indirect = true;
/* fallthrough */
case nir_intrinsic_load_uniform: {
- unsigned index = instr->const_index[0] + instr->const_index[1];
-
- fs_reg uniform_reg;
- if (index < num_direct_uniforms) {
- uniform_reg = fs_reg(UNIFORM, 0);
- } else {
- uniform_reg = fs_reg(UNIFORM, num_direct_uniforms);
- index -= num_direct_uniforms;
- }
+ fs_reg uniform_reg(UNIFORM, instr->const_index[0]);
+ uniform_reg.reg_offset = instr->const_index[1];
for (unsigned j = 0; j < instr->num_components; j++) {
- fs_reg src = offset(retype(uniform_reg, dest.type), bld, index);
+ fs_reg src = offset(retype(uniform_reg, dest.type), bld, j);
if (has_indirect)
src.reladdr = new(mem_ctx) fs_reg(get_nir_src(instr->src[0]));
- index++;
bld.MOV(dest, src);
dest = offset(dest, bld, 1);
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 3d04363ee1e..dfac44fd406 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -111,10 +111,9 @@ brw_create_nir(struct brw_context *brw,
nir_optimize(nir, is_scalar);
if (is_scalar) {
- nir_assign_var_locations_direct_first(nir, &nir->uniforms,
- &nir->num_direct_uniforms,
- &nir->num_uniforms,
- type_size_scalar);
+ nir_assign_var_locations(&nir->uniforms,
+ &nir->num_uniforms,
+ type_size_scalar);
nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar);
nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar);
nir_lower_io(nir, type_size_scalar);