~airlied/linux - Official DRM kernel tree

Age	Commit message (Collapse)	Author	Files	Lines
2015-09-25	phy: rockchip-usb: power down phy when rockchip phy probe	huang lin	1	-0/+6
	rockchip phy are enable when soc reset, to save power consumption, we disable it when probe, and enable each phy when it use Signed-off-by: huang lin <hl@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-03	phy: Constify struct phy_ops variables	Axel Lin	1	-1/+1
	The phy_ops variables are never modified after initialized in these drivers, so make them const. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25	phy: Drop owner assignment from platform_driver	Krzysztof Kozlowski	1	-1/+0
	platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-03-12	phy: rockchip-usb: Fixup rockchip_usb_phy_power_on failure path	Axel Lin	1	-3/+3
	If rockchip_usb_phy_power() fails, we need to call clk_disable_unprepare() before return. This is to ensure we have balanced clk_enable/disable calls. Also remove unneeded ret checking in rockchip_usb_phy_power_off. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-30	phy: add a driver for the Rockchip SoC internal USB2.0 PHY	Yunzhi Li	1	-0/+158
	This patch to add a generic PHY driver for ROCKCHIP usb PHYs, currently this driver can support RK3288. The RK3288 SoC have three independent USB PHY IPs which are all configured through a set of registers located in the GRF (general register files) module. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>