diff options
| -rw-r--r-- | arch/arm/mach-omap2/cclock3xxx_data.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/devices.c | 42 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 73 |
3 files changed, 72 insertions, 44 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 55b50895503e..45cd26430d1f 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -3471,6 +3471,7 @@ static struct omap_clk omap3xxx_clks[] = { CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck), CLK(NULL, "init_60m_fclk", &dummy_ck), CLK(NULL, "gpt1_fck", &gpt1_fck), + CLK(NULL, "aes2_ick", &aes2_ick), CLK(NULL, "wkup_32k_fck", &wkup_32k_fck), CLK(NULL, "gpio1_dbck", &gpio1_dbck), CLK(NULL, "sha12_ick", &sha12_ick), diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index c4c7d1d70158..19bc1c1795f7 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -517,38 +517,9 @@ static void __init omap_init_sham(void) WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n"); } -#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) - -#ifdef CONFIG_ARCH_OMAP3 -static struct resource omap3_aes_resources[] = { - { - .start = OMAP34XX_SEC_AES_BASE, - .end = OMAP34XX_SEC_AES_BASE + 0x4C, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP34XX_DMA_AES2_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = OMAP34XX_DMA_AES2_RX, - .flags = IORESOURCE_DMA, - } -}; -static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources); -#else -#define omap3_aes_resources NULL -#define omap3_aes_resources_sz 0 -#endif - -static struct platform_device aes_device = { - .name = "omap-aes", - .id = -1, -}; - -static void omap_init_aes(void) +static void __init omap_init_aes(void) { - if (cpu_is_omap24xx()) { + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { struct omap_hwmod *oh; struct platform_device *pdev; @@ -558,20 +529,11 @@ static void omap_init_aes(void) pdev = omap_device_build("omap-aes", -1, oh, NULL, 0); WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n"); - } else if (cpu_is_omap34xx()) { - aes_device.resource = omap3_aes_resources; - aes_device.num_resources = omap3_aes_resources_sz; - platform_device_register(&aes_device); } else { pr_err("%s: platform not supported\n", __func__); - return; } } -#else -static inline void omap_init_aes(void) { } -#endif - /*-------------------------------------------------------------------------*/ #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index f01fe0795e69..85c917cb193d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3610,6 +3610,67 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_core -> AES */ +static struct omap_hwmod_sysc_fields omap3xxx_aes_sysc_fields = { + .sidle_shift = 6, + .srst_shift = 1, + .autoidle_shift = 0, +}; + +static struct omap_hwmod_class_sysconfig omap3_aes_sysc = { + .rev_offs = 0x44, + .sysc_offs = 0x48, + .syss_offs = 0x4c, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap3xxx_aes_sysc_fields, +}; + +static struct omap_hwmod_class omap3xxx_aes_class = { + .name = "aes", + .sysc = &omap3_aes_sysc, +}; + +static struct omap_hwmod_dma_info omap3_aes_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP34XX_DMA_AES2_TX, }, + { .name = "rx", .dma_req = OMAP34XX_DMA_AES2_RX, }, + { .dma_req = -1 } +}; + +static struct omap_hwmod omap3xxx_aes_hwmod = { + .name = "aes", + .sdma_reqs = omap3_aes_sdma_reqs, + .main_clk = "aes2_ick", + .prcm = { + .omap2 = { + .module_offs = CORE_MOD, + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_AES2_SHIFT, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_AES2_SHIFT, + }, + }, + .class = &omap3xxx_aes_class, +}; + +static struct omap_hwmod_addr_space omap3xxx_aes_addrs[] = { + { + .pa_start = 0x480c5000, + .pa_end = 0x480c5000 + 0x50 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_core__aes = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_aes_hwmod, + .clk = "aes2_ick", + .addr = omap3xxx_aes_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l3_main__l4_core, &omap3xxx_l3_main__l4_per, @@ -3664,25 +3725,29 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, &omap3xxx_l4_core__sham, + &omap3xxx_l4_core__aes, NULL }; static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, &omap3xxx_l4_core__sham, + &omap3xxx_l4_core__aes, NULL }; static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, /* - * Apparently the SHA/MD5 accelerator IP block is only present - * on some AM35xx chips, and no one knows which ones. See + * Apparently the SHA/MD5 and AES accelerator IP blocks are + * only present on some AM35xx chips, and no one knows which + * ones. See * http://www.spinics.net/lists/arm-kernel/msg215466.html So - * if you need this IP block on an AM35xx, try uncommenting - * the next line. + * if you need these IP blocks on an AM35xx, try uncommenting + * the following lines. */ /* &omap3xxx_l4_core__sham, */ + /* &omap3xxx_l4_core__aes, */ NULL }; |