From 354e57f3a0a26120af3bcd6c92c355ad00a057c1 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 7 Nov 2013 10:25:55 +0100 Subject: ARM/serial: at91: switch atmel serial to use gpiolib MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This passes the errata fix using a GPIO to control the RTS pin on one of the AT91 chips to use gpiolib instead of the AT91-specific interfaces. Also remove the reliance on compile-time #defines and the cpu_* check and rely on the platform passing down the proper GPIO pin through platform data. This is a prerequisite for getting rid of the local GPIO implementation in the AT91 platform and move toward multiplatform. The patch also adds device tree support for getting the RTS GPIO pin from the device tree on DT boot paths. Signed-off-by: Nicolas Ferre Acked-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Linus Walleij Acked-by: Greg Kroah-Hartman Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/serial/atmel-usart.txt | 3 ++ arch/arm/mach-at91/at91rm9200_devices.c | 10 ++++- arch/arm/mach-at91/at91sam9260_devices.c | 7 ++++ arch/arm/mach-at91/at91sam9261_devices.c | 4 ++ arch/arm/mach-at91/at91sam9263_devices.c | 4 ++ arch/arm/mach-at91/at91sam9g45_devices.c | 5 +++ arch/arm/mach-at91/at91sam9rl_devices.c | 5 +++ drivers/tty/serial/atmel_serial.c | 49 ++++++++++++++-------- include/linux/platform_data/atmel.h | 1 + 9 files changed, 68 insertions(+), 20 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt index 2191dcb9f1da..3adc61c2e4ca 100644 --- a/Documentation/devicetree/bindings/serial/atmel-usart.txt +++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt @@ -10,6 +10,8 @@ Required properties: Optional properties: - atmel,use-dma-rx: use of PDC or DMA for receiving data - atmel,use-dma-tx: use of PDC or DMA for transmitting data +- rts-gpios: specify a GPIO for RTS line. It will use specified PIO instead of the peripheral + function pin for the USART RTS feature. If unsure, don't specify this property. - add dma bindings for dma transfer: - dmas: DMA specifier, consisting of a phandle to DMA controller node, memory peripheral interface and USART DMA channel ID, FIFO configuration. @@ -28,6 +30,7 @@ Example: interrupts = <7>; atmel,use-dma-rx; atmel,use-dma-tx; + rts-gpios = <&pioD 15 0>; }; - use DMA: diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 3ebc9792560c..605add05af7e 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -922,6 +922,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -960,6 +961,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -987,9 +989,10 @@ static inline void configure_usart0_pins(unsigned pins) if (pins & ATMEL_UART_RTS) { /* * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. - * We need to drive the pin manually. Default is off (RTS is active low). + * We need to drive the pin manually. The serial driver will driver + * this to high when initializing. */ - at91_set_gpio_output(AT91_PIN_PA21, 1); + uart0_data.rts_gpio = AT91_PIN_PA21; } } @@ -1009,6 +1012,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1060,6 +1064,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1103,6 +1108,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index eda8d1679d40..b52527c78b12 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -819,6 +819,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -857,6 +858,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -908,6 +910,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -951,6 +954,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -994,6 +998,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); @@ -1037,6 +1042,7 @@ static struct resource uart4_resources[] = { static struct atmel_uart_data uart4_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart4_dmamask = DMA_BIT_MASK(32); @@ -1075,6 +1081,7 @@ static struct resource uart5_resources[] = { static struct atmel_uart_data uart5_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart5_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index b2a34740146a..6c1a2ecc306f 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -880,6 +880,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -918,6 +919,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -961,6 +963,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1004,6 +1007,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 4aeadddbc181..97cc2a0d6f90 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -1324,6 +1324,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -1362,6 +1363,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1405,6 +1407,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1448,6 +1451,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index cb36fa872d30..c10149588e21 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -1587,6 +1587,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -1625,6 +1626,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1668,6 +1670,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1711,6 +1714,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1754,6 +1758,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index a698bdab2cce..4120af972b61 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -956,6 +956,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -994,6 +995,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1045,6 +1047,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1088,6 +1091,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1131,6 +1135,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index c7d99af46a96..40d6c9b0d98b 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -35,21 +35,18 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include -#ifdef CONFIG_ARM -#include -#include -#endif - #define PDC_BUFFER_SIZE 512 /* Revisit: We should calculate this based on the actual port settings */ #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ @@ -168,6 +165,7 @@ struct atmel_uart_port { struct circ_buf rx_ring; struct serial_rs485 rs485; /* rs485 settings */ + int rts_gpio; /* optional RTS GPIO */ unsigned int tx_done_mask; bool is_usart; /* usart or uart */ struct timer_list uart_timer; /* uart timer */ @@ -301,20 +299,16 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) unsigned int mode; struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); -#ifdef CONFIG_ARCH_AT91RM9200 - if (cpu_is_at91rm9200()) { - /* - * AT91RM9200 Errata #39: RTS0 is not internally connected - * to PA21. We need to drive the pin manually. - */ - if (port->mapbase == AT91RM9200_BASE_US0) { - if (mctrl & TIOCM_RTS) - at91_set_gpio_value(AT91_PIN_PA21, 0); - else - at91_set_gpio_value(AT91_PIN_PA21, 1); - } + /* + * AT91RM9200 Errata #39: RTS0 is not internally connected + * to PA21. We need to drive the pin as a GPIO. + */ + if (gpio_is_valid(atmel_port->rts_gpio)) { + if (mctrl & TIOCM_RTS) + gpio_set_value(atmel_port->rts_gpio, 0); + else + gpio_set_value(atmel_port->rts_gpio, 1); } -#endif if (mctrl & TIOCM_RTS) control |= ATMEL_US_RTSEN; @@ -2379,6 +2373,25 @@ static int atmel_serial_probe(struct platform_device *pdev) port = &atmel_ports[ret]; port->backup_imr = 0; port->uart.line = ret; + port->rts_gpio = -EINVAL; /* Invalid, zero could be valid */ + if (pdata) + port->rts_gpio = pdata->rts_gpio; + else if (np) + port->rts_gpio = of_get_named_gpio(np, "rts-gpios", 0); + + if (gpio_is_valid(port->rts_gpio)) { + ret = devm_gpio_request(&pdev->dev, port->rts_gpio, "RTS"); + if (ret) { + dev_err(&pdev->dev, "error requesting RTS GPIO\n"); + goto err; + } + /* Default to 1 as RTS is active low */ + ret = gpio_direction_output(port->rts_gpio, 1); + if (ret) { + dev_err(&pdev->dev, "error setting up RTS GPIO\n"); + goto err; + } + } ret = atmel_init_port(port, pdev); if (ret) diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index cea9f70133c5..e26b0c14edea 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -84,6 +84,7 @@ struct atmel_uart_data { short use_dma_rx; /* use receive DMA? */ void __iomem *regs; /* virt. base address, if any */ struct serial_rs485 rs485; /* rs485 settings */ + int rts_gpio; /* optional RTS GPIO */ }; /* Touchscreen Controller */ -- cgit v1.2.3 From 3ecdb000975bc37bb1f93bf9e6875628b4e00848 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Fri, 15 Nov 2013 14:55:14 +0100 Subject: rtc: at91sam9: include explicitly MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver needs the symbol AT91_SLOW_CLOCK which is defined in arch/arm/mach-at91/include/mach/hardware.h. This file is included implicitly via linux/module.h -> linux/kmod.h -> linux/gfp.h -> linux/mmzone.h -> linux/memory_hotplug.h -> linux/notifier.h -> linux/srcu.h -> linux/workqueue.h -> linux/timer.h -> linux/ktime.h -> linux/jiffies.h -> linux/timex.h -> mach/timex.h -> mach/hardware.h . So better include it explicitly not only because the last link will go away soon. Acked-by: Nicolas Ferre Acked-by: Andrew Morton Signed-off-by: Uwe Kleine-König --- drivers/rtc/rtc-at91sam9.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index 309b8b342d9c..596374304532 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c @@ -24,7 +24,7 @@ #include #include - +#include /* * This driver uses two configurable hardware resources that live in the -- cgit v1.2.3 From ecfc5f2c00ea12fb6bc696d636b8c3a36ae057a9 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Fri, 8 Nov 2013 21:02:51 +0100 Subject: rtc: pxa: drop unused #define TIMER_FREQ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It seems this symbol was unused since the driver was introduced in commit dc94436 (rtc: driver for pxa27x and pxa3xx SoC) back in 2009. As a by-product this patch makes the driver stop "using" the symbol CLOCK_TICK_RATE which is about to be removed very soon (for ARM). Acked-by: Robert Jarzmik Acked-by: Andrew Morton Signed-off-by: Uwe Kleine-König --- drivers/rtc/rtc-pxa.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/rtc/rtc-pxa.c b/drivers/rtc/rtc-pxa.c index a355f2b82bb8..cccbf9d89729 100644 --- a/drivers/rtc/rtc-pxa.c +++ b/drivers/rtc/rtc-pxa.c @@ -32,7 +32,6 @@ #include -#define TIMER_FREQ CLOCK_TICK_RATE #define RTC_DEF_DIVIDER (32768 - 1) #define RTC_DEF_TRIM 0 #define MAXFREQ_PERIODIC 1000 -- cgit v1.2.3 From 980c51ab0774b7cd701eeb84056c148f84e152d8 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 11 Nov 2013 21:06:11 +0100 Subject: clocksource: sirf/marco+prima2: drop usage of CLOCK_TICK_RATE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since CSR SiRF was converted to multi platform in cf82e0e (ARM: sirf: enable multiplatform support) the symbol CLOCK_TICK_RATE isn't the platform specific definition any more, but a global dummy value. There was no harm introduced in cf82e0e because the global value happens to match the old platform specific one, still this dummy value isn't intended to be used and will hopefully disappear soon, so introduce a local #define and use that instead. Acked-by: Daniel Lezcano Signed-off-by: Uwe Kleine-König --- drivers/clocksource/timer-marco.c | 13 +++++++------ drivers/clocksource/timer-prima2.c | 16 ++++++++++------ 2 files changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-marco.c index 09a17d9a6594..b52e1c078b99 100644 --- a/drivers/clocksource/timer-marco.c +++ b/drivers/clocksource/timer-marco.c @@ -19,7 +19,8 @@ #include #include #include -#include + +#define MARCO_CLOCK_FREQ 1000000 #define SIRFSOC_TIMER_32COUNTER_0_CTRL 0x0000 #define SIRFSOC_TIMER_32COUNTER_1_CTRL 0x0004 @@ -191,7 +192,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce) ce->rating = 200; ce->set_mode = sirfsoc_timer_set_mode; ce->set_next_event = sirfsoc_timer_set_next_event; - clockevents_calc_mult_shift(ce, CLOCK_TICK_RATE, 60); + clockevents_calc_mult_shift(ce, MARCO_CLOCK_FREQ, 60); ce->max_delta_ns = clockevent_delta2ns(-2, ce); ce->min_delta_ns = clockevent_delta2ns(2, ce); ce->cpumask = cpumask_of(cpu); @@ -263,11 +264,11 @@ static void __init sirfsoc_marco_timer_init(void) BUG_ON(IS_ERR(clk)); rate = clk_get_rate(clk); - BUG_ON(rate < CLOCK_TICK_RATE); - BUG_ON(rate % CLOCK_TICK_RATE); + BUG_ON(rate < MARCO_CLOCK_FREQ); + BUG_ON(rate % MARCO_CLOCK_FREQ); /* Initialize the timer dividers */ - timer_div = rate / CLOCK_TICK_RATE - 1; + timer_div = rate / MARCO_CLOCK_FREQ - 1; writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL); writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL); writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_1_CTRL); @@ -283,7 +284,7 @@ static void __init sirfsoc_marco_timer_init(void) /* Clear all interrupts */ writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS); - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); + BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, MARCO_CLOCK_FREQ)); sirfsoc_clockevent_init(); } diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c index 8a492d34ff9f..1a6b2d6356d6 100644 --- a/drivers/clocksource/timer-prima2.c +++ b/drivers/clocksource/timer-prima2.c @@ -21,6 +21,8 @@ #include #include +#define PRIMA2_CLOCK_FREQ 1000000 + #define SIRFSOC_TIMER_COUNTER_LO 0x0000 #define SIRFSOC_TIMER_COUNTER_HI 0x0004 #define SIRFSOC_TIMER_MATCH_0 0x0008 @@ -173,7 +175,7 @@ static u64 notrace sirfsoc_read_sched_clock(void) static void __init sirfsoc_clockevent_init(void) { sirfsoc_clockevent.cpumask = cpumask_of(0); - clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE, + clockevents_config_and_register(&sirfsoc_clockevent, PRIMA2_CLOCK_FREQ, 2, -2); } @@ -190,8 +192,8 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np) rate = clk_get_rate(clk); - BUG_ON(rate < CLOCK_TICK_RATE); - BUG_ON(rate % CLOCK_TICK_RATE); + BUG_ON(rate < PRIMA2_CLOCK_FREQ); + BUG_ON(rate % PRIMA2_CLOCK_FREQ); sirfsoc_timer_base = of_iomap(np, 0); if (!sirfsoc_timer_base) @@ -199,14 +201,16 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np) sirfsoc_timer_irq.irq = irq_of_parse_and_map(np, 0); - writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV); + writel_relaxed(rate / PRIMA2_CLOCK_FREQ / 2 - 1, + sirfsoc_timer_base + SIRFSOC_TIMER_DIV); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS); - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); + BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, + PRIMA2_CLOCK_FREQ)); - sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE); + sched_clock_register(sirfsoc_read_sched_clock, 64, PRIMA2_CLOCK_FREQ); BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); -- cgit v1.2.3 From dc2fc2270cba696bd1211124f43efd2d6476808c Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 12 Nov 2013 20:56:02 +0100 Subject: ARM: sa1100: stop using mach/timex.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mach/timex.h is the last remaining header that is unused for multiarch builds but necessary for singlearch builds. To allow to get rid of it for singlearch builds, too, drop its usage in sa1100 arch code by substituting CLOCK_TICK_RATE and LATCH by a local cpp symbol. Signed-off-by: Uwe Kleine-König --- arch/arm/mach-sa1100/time.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 713c86cd3d64..b4e7f2d133d9 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -9,6 +9,7 @@ * */ #include +#include #include #include #include @@ -20,6 +21,9 @@ #include #include +#define SA1100_CLOCK_FREQ 3686400 +#define SA1100_LATCH DIV_ROUND_CLOSEST(SA1100_CLOCK_FREQ, HZ) + static u32 notrace sa1100_read_sched_clock(void) { return readl_relaxed(OSCR); @@ -93,7 +97,7 @@ static void sa1100_timer_resume(struct clock_event_device *cedev) /* * OSMR0 is the system timer: make sure OSCR is sufficiently behind */ - writel_relaxed(OSMR0 - LATCH, OSCR); + writel_relaxed(OSMR0 - SA1100_LATCH, OSCR); } #else #define sa1100_timer_suspend NULL @@ -128,7 +132,7 @@ void __init sa1100_timer_init(void) setup_irq(IRQ_OST0, &sa1100_timer_irq); - clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, + clocksource_mmio_init(OSCR, "oscr", SA1100_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up); clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400, MIN_OSCR_DELTA * 2, 0x7fffffff); -- cgit v1.2.3 From 5e3e27637959155bf3b06f52c5fbe9e9b0ffbdfe Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 12 Nov 2013 20:56:02 +0100 Subject: ARM: netx: stop using mach/timex.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mach/timex.h is the last remaining header that is unused for multiarch builds but necessary for singlearch builds. To allow to get rid of it for singlearch builds, too, drop its usage in netx arch code by substituting CLOCK_TICK_RATE and LATCH by a local cpp symbol. Acked-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-netx/time.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index 6df42e643031..e2346013e227 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c @@ -28,6 +28,9 @@ #include #include +#define NETX_CLOCK_FREQ 100000000 +#define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ) + #define TIMER_CLOCKEVENT 0 #define TIMER_CLOCKSOURCE 1 @@ -41,7 +44,7 @@ static void netx_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); + writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); tmode = NETX_GPIO_COUNTER_CTRL_RST_EN | NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN; @@ -114,7 +117,7 @@ void __init netx_timer_init(void) /* Reset the timer value to zero */ writel(0, NETX_GPIO_COUNTER_CURRENT(0)); - writel(LATCH, NETX_GPIO_COUNTER_MAX(0)); + writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0)); /* acknowledge interrupt */ writel(COUNTER_BIT(0), NETX_GPIO_IRQ); @@ -137,11 +140,11 @@ void __init netx_timer_init(void) NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), - "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); + "netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up); /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. * Adding some safety ... */ netx_clockevent.cpumask = cpumask_of(0); - clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE, + clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ, 0xa00, 0xfffffffe); } -- cgit v1.2.3 From ea15811992c74cbfa42ecbfbb0fdaeb377c9fe54 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 12 Nov 2013 20:56:02 +0100 Subject: ARM: mmp: stop using mach/timex.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mach/timex.h is the last remaining header that is unused for multiarch builds but necessary for singlearch builds. To allow to get rid of it for singlearch builds, too, drop its usage in mmp arch code by substituting CLOCK_TICK_RATE by a local cpp symbol. Acked-by: Haojian Zhuang Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mmp/time.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 7ac41e83cfef..fb57d1113f5c 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -39,6 +39,12 @@ #include "clock.h" +#ifdef CONFIG_CPU_MMP2 +#define MMP_CLOCK_FREQ 6500000 +#else +#define MMP_CLOCK_FREQ 3250000 +#endif + #define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE #define MAX_DELTA (0xfffffffe) @@ -195,14 +201,14 @@ void __init timer_init(int irq) { timer_config(); - setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); + setup_sched_clock(mmp_read_sched_clock, 32, MMP_CLOCK_FREQ); ckevt.cpumask = cpumask_of(0); setup_irq(irq, &timer_irq); - clocksource_register_hz(&cksrc, CLOCK_TICK_RATE); - clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE, + clocksource_register_hz(&cksrc, MMP_CLOCK_FREQ); + clockevents_config_and_register(&ckevt, MMP_CLOCK_FREQ, MIN_DELTA, MAX_DELTA); } -- cgit v1.2.3 From a509ad0ca71cfb2419e8da15e71519b18ad585b3 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 12 Nov 2013 20:56:02 +0100 Subject: ARM: ep93xx: stop using mach/timex.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mach/timex.h is the last remaining header that is unused for multiarch builds but necessary for singlearch builds. To allow to get rid of it for singlearch builds, too, drop its usage in ep93xx arch code by substituting CLOCK_TICK_RATE by an already defined local cpp symbol. Acked-by: H Hartley Sweeten Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ep93xx/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index d95ee28a616a..94b141fcf944 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -115,7 +115,7 @@ void __init ep93xx_map_io(void) #define EP93XX_TIMER4_CLOCK 983040 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1) -#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ) +#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(EP93XX_TIMER4_CLOCK, HZ) static unsigned int last_jiffy_time; -- cgit v1.2.3 From ac11a1d46cf06a8b5b3535f0ce12b6c1cb48ddab Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 14 Nov 2013 10:49:19 +0100 Subject: ARM: at91: don't use MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The platform specific will be removed in a later patch. So move its only still used symbol to a different header specific for the only machine still using it. Also add a few explicit includes of that are implicitly available through . Acked-by: Nicolas Ferre Signed-off-by: Uwe Kleine-König --- arch/arm/mach-at91/at91rm9200.c | 1 + arch/arm/mach-at91/at91rm9200_devices.c | 1 + arch/arm/mach-at91/at91rm9200_time.c | 1 + arch/arm/mach-at91/at91sam9260.c | 1 + arch/arm/mach-at91/at91sam9260_devices.c | 1 + arch/arm/mach-at91/at91sam9261.c | 1 + arch/arm/mach-at91/at91sam9261_devices.c | 1 + arch/arm/mach-at91/at91sam9263.c | 1 + arch/arm/mach-at91/at91sam9263_devices.c | 1 + arch/arm/mach-at91/at91sam926x_time.c | 1 + arch/arm/mach-at91/at91sam9g45.c | 1 + arch/arm/mach-at91/at91sam9g45_devices.c | 1 + arch/arm/mach-at91/at91sam9rl.c | 1 + arch/arm/mach-at91/at91sam9rl_devices.c | 1 + arch/arm/mach-at91/at91x40.c | 2 +- arch/arm/mach-at91/at91x40_time.c | 1 + arch/arm/mach-at91/board-gsia18s.c | 1 + arch/arm/mach-at91/board-pcontrol-g20.c | 1 + arch/arm/mach-at91/board-stamp9g20.c | 1 + arch/arm/mach-at91/include/mach/at91x40.h | 2 ++ arch/arm/mach-at91/pm.c | 1 + 21 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 25805f2f6010..a43cf9567a8d 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "at91_aic.h" #include "soc.h" diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 605add05af7e..f3f19f21352a 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index f607deb40f4d..6b68b98b0a08 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -31,6 +31,7 @@ #include #include +#include static unsigned long last_crtr; static u32 irqmask; diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d6a1fa85371d..5f8336460808 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index b52527c78b12..2ae7715f1309 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 23ba1d8a1531..f17d8dbd0b90 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 6c1a2ecc306f..80e35895d28f 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 7eccb0fc57bc..fde9ea5fe3f9 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 97cc2a0d6f90..43d53d6156dd 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index bb392320a0dd..b9da2b1f4807 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -19,6 +19,7 @@ #include #include +#include #define AT91_PIT_MR 0x00 /* Mode Register */ #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 9405aa08b104..045981f67c13 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "at91_aic.h" #include "soc.h" diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index c10149588e21..77b04c2edd78 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -32,6 +32,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 0750ffb7e6b1..6a7d76dfdc87 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 4120af972b61..428fc412aaf1 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include "board.h" diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index bad94b84a46f..7523f1cdfe1d 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include "at91_aic.h" #include "generic.h" diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index c0e637adf65d..07d0bf2ac2da 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "at91_tc.h" diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index c1d61d247790..416bae8435ee 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -31,6 +31,7 @@ #include #include +#include #include "at91_aic.h" #include "board.h" diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 65c0d6b5ecba..5f25fa54eb93 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -30,6 +30,7 @@ #include #include +#include #include "at91_aic.h" #include "board.h" diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 869cbecf00b7..e4a5ac17cdbc 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -26,6 +26,7 @@ #include #include +#include #include "at91_aic.h" #include "board.h" diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index 90680217064e..38dca2bb027f 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h @@ -55,4 +55,6 @@ #define AT91_PS_CR (AT91_PS + 0) /* PS Control register */ #define AT91_PS_CR_CPU (1 << 0) /* CPU clock disable bit */ +#define AT91X40_MASTER_CLOCK 40000000 + #endif /* AT91X40_H */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 9986542e8060..7afecb8a35b1 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -27,6 +27,7 @@ #include #include +#include #include "at91_aic.h" #include "generic.h" -- cgit v1.2.3 From 3ae1a6b153b099fc7e50f9c74ae208bd72c02c3d Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 26 Nov 2013 15:19:04 +0100 Subject: input: ixp4xx-beeper: don't use symbols from MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mach/timex.h is about to be dropped so don't use symbols defined in there. For ixp4xx there is a suitable substitute for IXP4XX_TIMER_FREQ, i.e. a global and exported variable that holds the same value. Acked-by: Dmitry Torokhov Signed-off-by: Uwe Kleine-König --- drivers/input/misc/ixp4xx-beeper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/input/misc/ixp4xx-beeper.c b/drivers/input/misc/ixp4xx-beeper.c index 17ccba88d636..ed8e5e8449d3 100644 --- a/drivers/input/misc/ixp4xx-beeper.c +++ b/drivers/input/misc/ixp4xx-beeper.c @@ -67,7 +67,7 @@ static int ixp4xx_spkr_event(struct input_dev *dev, unsigned int type, unsigned } if (value > 20 && value < 32767) - count = (IXP4XX_TIMER_FREQ / (value * 4)) - 1; + count = (ixp4xx_timer_freq / (value * 4)) - 1; ixp4xx_spkr_control(pin, count); -- cgit v1.2.3 From f0402f9b47112faea10541b799b61066ae322c36 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 26 Nov 2013 19:25:59 +0100 Subject: ARM: ixp4xx: stop using MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The only user of symbols defined in ixp4xx's is common.c. Fix that one up by moving the used #define into common.c directly and add a local substitute for the global define LATCH which uses CLOCK_TICK_RATE. This makes ixp4xx not to be a bar to dropping support for . Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ixp4xx/common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 9edaf4734fa8..20b62aa30086 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -45,6 +44,9 @@ #include #include +#define IXP4XX_TIMER_FREQ 66666000 +#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, HZ) + static void __init ixp4xx_clocksource_init(void); static void __init ixp4xx_clockevent_init(void); static struct clock_event_device clockevent_ixp4xx; @@ -520,7 +522,7 @@ static void ixp4xx_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - osrt = LATCH & ~IXP4XX_OST_RELOAD_MASK; + osrt = IXP4XX_LATCH & ~IXP4XX_OST_RELOAD_MASK; opts = IXP4XX_OST_ENABLE; break; case CLOCK_EVT_MODE_ONESHOT: -- cgit v1.2.3 From 53985371458fc17405c7fc277e6f05fe36965eab Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 19 Dec 2013 22:22:23 +0100 Subject: ARM: rpc: stop using MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The rpc timekeeping code uses the symbol LATCH which depends on CLOCK_TICK_RATE which is defined in rpc's . As this header will go away in a later patch introduce a local variable holding the same value as LATCH and use that instead. Signed-off-by: Uwe Kleine-König --- arch/arm/mach-rpc/time.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rpc/time.c b/arch/arm/mach-rpc/time.c index 9a6def14df01..99363ae5cac7 100644 --- a/arch/arm/mach-rpc/time.c +++ b/arch/arm/mach-rpc/time.c @@ -24,6 +24,9 @@ #include +#define RPC_CLOCK_FREQ 2000000 +#define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ) + static u32 ioc_timer_gettimeoffset(void) { unsigned int count1, count2, status; @@ -46,23 +49,23 @@ static u32 ioc_timer_gettimeoffset(void) * and count2. */ if (status & (1 << 5)) - offset -= LATCH; + offset -= RPC_LATCH; } else if (count2 > count1) { /* * We have just had another interrupt between reading * count1 and count2. */ - offset -= LATCH; + offset -= RPC_LATCH; } - offset = (LATCH - offset) * (tick_nsec / 1000); - return ((offset + LATCH/2) / LATCH) * 1000; + offset = (RPC_LATCH - offset) * (tick_nsec / 1000); + return DIV_ROUND_CLOSEST(offset, RPC_LATCH) * 1000; } void __init ioctime_init(void) { - ioc_writeb(LATCH & 255, IOC_T0LTCHL); - ioc_writeb(LATCH >> 8, IOC_T0LTCHH); + ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL); + ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH); ioc_writeb(0, IOC_T0GO); } -- cgit v1.2.3 From 79f08d9ed217318b4f325b7fcf8f26dcd0e41689 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 21 Oct 2013 11:07:04 +0200 Subject: ARM: drop for !ARCH_MULTIPLATFORM, too MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While isn't used for multi-platform builds since long it still is for "normal" builds. As the previous patches fix all sites to not make use of this per-platform file, it can go now for good also for platforms that are not (yet) converted to multi-platform. While at it there are no users of CLOCK_TICK_RATE any more, so also drop the dummy #define. Signed-off-by: Uwe Kleine-König --- arch/arm/include/asm/timex.h | 6 ----- arch/arm/mach-at91/include/mach/timex.h | 37 --------------------------- arch/arm/mach-clps711x/include/mach/timex.h | 2 -- arch/arm/mach-davinci/include/mach/timex.h | 22 ---------------- arch/arm/mach-dove/include/mach/timex.h | 9 ------- arch/arm/mach-ebsa110/include/mach/timex.h | 19 -------------- arch/arm/mach-ep93xx/include/mach/timex.h | 5 ---- arch/arm/mach-exynos/include/mach/timex.h | 29 --------------------- arch/arm/mach-footbridge/include/mach/timex.h | 18 ------------- arch/arm/mach-gemini/include/mach/timex.h | 13 ---------- arch/arm/mach-integrator/include/mach/timex.h | 26 ------------------- arch/arm/mach-iop13xx/include/mach/timex.h | 1 - arch/arm/mach-iop32x/include/mach/timex.h | 6 ----- arch/arm/mach-iop33x/include/mach/timex.h | 6 ----- arch/arm/mach-ixp4xx/include/mach/timex.h | 16 ------------ arch/arm/mach-kirkwood/include/mach/timex.h | 10 -------- arch/arm/mach-ks8695/include/mach/timex.h | 21 --------------- arch/arm/mach-lpc32xx/include/mach/timex.h | 28 -------------------- arch/arm/mach-mmp/include/mach/timex.h | 13 ---------- arch/arm/mach-msm/include/mach/timex.h | 21 --------------- arch/arm/mach-mv78xx0/include/mach/timex.h | 9 ------- arch/arm/mach-netx/include/mach/timex.h | 20 --------------- arch/arm/mach-omap1/include/mach/timex.h | 5 ---- arch/arm/mach-omap2/include/mach/timex.h | 5 ---- arch/arm/mach-orion5x/include/mach/timex.h | 11 -------- arch/arm/mach-pxa/include/mach/timex.h | 34 ------------------------ arch/arm/mach-realview/include/mach/timex.h | 23 ----------------- arch/arm/mach-rpc/include/mach/timex.h | 17 ------------ arch/arm/mach-s3c24xx/include/mach/timex.h | 24 ----------------- arch/arm/mach-s3c64xx/include/mach/timex.h | 24 ----------------- arch/arm/mach-s5p64x0/include/mach/timex.h | 27 ------------------- arch/arm/mach-s5pc100/include/mach/timex.h | 24 ----------------- arch/arm/mach-s5pv210/include/mach/timex.h | 29 --------------------- arch/arm/mach-sa1100/include/mach/timex.h | 12 --------- arch/arm/mach-shmobile/include/mach/timex.h | 6 ----- arch/arm/mach-spear/include/mach/timex.h | 19 -------------- arch/arm/mach-versatile/include/mach/timex.h | 23 ----------------- arch/arm/mach-w90x900/include/mach/timex.h | 25 ------------------ arch/arm/plat-omap/include/plat/timex.h | 33 ------------------------ 39 files changed, 678 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/timex.h delete mode 100644 arch/arm/mach-clps711x/include/mach/timex.h delete mode 100644 arch/arm/mach-davinci/include/mach/timex.h delete mode 100644 arch/arm/mach-dove/include/mach/timex.h delete mode 100644 arch/arm/mach-ebsa110/include/mach/timex.h delete mode 100644 arch/arm/mach-ep93xx/include/mach/timex.h delete mode 100644 arch/arm/mach-exynos/include/mach/timex.h delete mode 100644 arch/arm/mach-footbridge/include/mach/timex.h delete mode 100644 arch/arm/mach-gemini/include/mach/timex.h delete mode 100644 arch/arm/mach-integrator/include/mach/timex.h delete mode 100644 arch/arm/mach-iop13xx/include/mach/timex.h delete mode 100644 arch/arm/mach-iop32x/include/mach/timex.h delete mode 100644 arch/arm/mach-iop33x/include/mach/timex.h delete mode 100644 arch/arm/mach-ixp4xx/include/mach/timex.h delete mode 100644 arch/arm/mach-kirkwood/include/mach/timex.h delete mode 100644 arch/arm/mach-ks8695/include/mach/timex.h delete mode 100644 arch/arm/mach-lpc32xx/include/mach/timex.h delete mode 100644 arch/arm/mach-mmp/include/mach/timex.h delete mode 100644 arch/arm/mach-msm/include/mach/timex.h delete mode 100644 arch/arm/mach-mv78xx0/include/mach/timex.h delete mode 100644 arch/arm/mach-netx/include/mach/timex.h delete mode 100644 arch/arm/mach-omap1/include/mach/timex.h delete mode 100644 arch/arm/mach-omap2/include/mach/timex.h delete mode 100644 arch/arm/mach-orion5x/include/mach/timex.h delete mode 100644 arch/arm/mach-pxa/include/mach/timex.h delete mode 100644 arch/arm/mach-realview/include/mach/timex.h delete mode 100644 arch/arm/mach-rpc/include/mach/timex.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/timex.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/timex.h delete mode 100644 arch/arm/mach-s5p64x0/include/mach/timex.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/timex.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/timex.h delete mode 100644 arch/arm/mach-sa1100/include/mach/timex.h delete mode 100644 arch/arm/mach-shmobile/include/mach/timex.h delete mode 100644 arch/arm/mach-spear/include/mach/timex.h delete mode 100644 arch/arm/mach-versatile/include/mach/timex.h delete mode 100644 arch/arm/mach-w90x900/include/mach/timex.h delete mode 100644 arch/arm/plat-omap/include/plat/timex.h diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h index 83f2aa83899c..f6fcc67ef06e 100644 --- a/arch/arm/include/asm/timex.h +++ b/arch/arm/include/asm/timex.h @@ -12,12 +12,6 @@ #ifndef _ASMARM_TIMEX_H #define _ASMARM_TIMEX_H -#ifdef CONFIG_ARCH_MULTIPLATFORM -#define CLOCK_TICK_RATE 1000000 -#else -#include -#endif - typedef unsigned long cycles_t; #define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; }) diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h deleted file mode 100644 index 5e917a66edd7..000000000000 --- a/arch/arm/mach-at91/include/mach/timex.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/timex.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#include - -#ifdef CONFIG_ARCH_AT91X40 - -#define AT91X40_MASTER_CLOCK 40000000 -#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) - -#else - -#define CLOCK_TICK_RATE 12345678 - -#endif - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-clps711x/include/mach/timex.h b/arch/arm/mach-clps711x/include/mach/timex.h deleted file mode 100644 index de6fd192d1c3..000000000000 --- a/arch/arm/mach-clps711x/include/mach/timex.h +++ /dev/null @@ -1,2 +0,0 @@ -/* Bogus value */ -#define CLOCK_TICK_RATE 512000 diff --git a/arch/arm/mach-davinci/include/mach/timex.h b/arch/arm/mach-davinci/include/mach/timex.h deleted file mode 100644 index 9b885298f106..000000000000 --- a/arch/arm/mach-davinci/include/mach/timex.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * DaVinci timer defines - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* - * Alert: Not all timers of the DaVinci family run at a frequency of 27MHz, - * but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/ - * linux/jiffies.h) are not used directly in code. Currently none of the - * code relevant to DaVinci platform depends on these values directly. - */ -#define CLOCK_TICK_RATE 27000000 - -#endif /* __ASM_ARCH_TIMEX_H__ */ diff --git a/arch/arm/mach-dove/include/mach/timex.h b/arch/arm/mach-dove/include/mach/timex.h deleted file mode 100644 index 251d538541db..000000000000 --- a/arch/arm/mach-dove/include/mach/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-ebsa110/include/mach/timex.h b/arch/arm/mach-ebsa110/include/mach/timex.h deleted file mode 100644 index 4fb43b22a102..000000000000 --- a/arch/arm/mach-ebsa110/include/mach/timex.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-ebsa110/include/mach/timex.h - * - * Copyright (C) 1997, 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EBSA110 architecture timex specifications - */ - -/* - * On the EBSA, the clock ticks at weird rates. - * This is therefore not used to calculate the - * divisor. - */ -#define CLOCK_TICK_RATE 47894000 - diff --git a/arch/arm/mach-ep93xx/include/mach/timex.h b/arch/arm/mach-ep93xx/include/mach/timex.h deleted file mode 100644 index 6b3503b01fa6..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/timex.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-ep93xx/include/mach/timex.h - */ - -#define CLOCK_TICK_RATE 983040 diff --git a/arch/arm/mach-exynos/include/mach/timex.h b/arch/arm/mach-exynos/include/mach/timex.h deleted file mode 100644 index 6d138750a708..000000000000 --- a/arch/arm/mach-exynos/include/mach/timex.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/timex.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (c) 2003-2010 Simtec Electronics - * Ben Dooks - * - * Based on arch/arm/mach-s5p6442/include/mach/timex.h - * - * EXYNOS4 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H __FILE__ - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-footbridge/include/mach/timex.h b/arch/arm/mach-footbridge/include/mach/timex.h deleted file mode 100644 index d0fea9d6d4ab..000000000000 --- a/arch/arm/mach-footbridge/include/mach/timex.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * arch/arm/mach-footbridge/include/mach/timex.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EBSA285 architecture timex specifications - */ - -/* - * We assume a constant here; this satisfies the maths in linux/timex.h - * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but - * this must be a constant. - */ -#define CLOCK_TICK_RATE (50000000/16) diff --git a/arch/arm/mach-gemini/include/mach/timex.h b/arch/arm/mach-gemini/include/mach/timex.h deleted file mode 100644 index dc5690ba975c..000000000000 --- a/arch/arm/mach-gemini/include/mach/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Gemini timex specifications - * - * Copyright (C) 2008-2009 Paulius Zaleckas - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -/* When AHB bus frequency is 150MHz */ -#define CLOCK_TICK_RATE 38000000 diff --git a/arch/arm/mach-integrator/include/mach/timex.h b/arch/arm/mach-integrator/include/mach/timex.h deleted file mode 100644 index 1dcb42028c82..000000000000 --- a/arch/arm/mach-integrator/include/mach/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-integrator/include/mach/timex.h - * - * Integrator architecture timex specifications - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * ?? - */ -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/arch/arm/mach-iop13xx/include/mach/timex.h b/arch/arm/mach-iop13xx/include/mach/timex.h deleted file mode 100644 index 45fb2745bb54..000000000000 --- a/arch/arm/mach-iop13xx/include/mach/timex.h +++ /dev/null @@ -1 +0,0 @@ -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h deleted file mode 100644 index 7262ab81419d..000000000000 --- a/arch/arm/mach-iop32x/include/mach/timex.h +++ /dev/null @@ -1,6 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/timex.h - * - * IOP32x architecture timex specifications - */ -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-iop33x/include/mach/timex.h b/arch/arm/mach-iop33x/include/mach/timex.h deleted file mode 100644 index 54c589091d6e..000000000000 --- a/arch/arm/mach-iop33x/include/mach/timex.h +++ /dev/null @@ -1,6 +0,0 @@ -/* - * arch/arm/mach-iop33x/include/mach/timex.h - * - * IOP3xx architecture timex specifications - */ -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h deleted file mode 100644 index 0396d89f947c..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/timex.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/mach-ixp4xx/include/mach/timex.h - * - */ - -#include - -/* - * We use IXP425 General purpose timer for our timer needs, it runs at - * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the - * timer register ignores the bottom 2 bits of the LATCH value. - */ -#define IXP4XX_TIMER_FREQ 66666000 -#define CLOCK_TICK_RATE \ - (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) - diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h deleted file mode 100644 index c923cd169b9c..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/timex.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) - diff --git a/arch/arm/mach-ks8695/include/mach/timex.h b/arch/arm/mach-ks8695/include/mach/timex.h deleted file mode 100644 index 10f716371bd3..000000000000 --- a/arch/arm/mach-ks8695/include/mach/timex.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-ks8695/include/mach/timex.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks - * - * KS8695 - Time Parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#include - -#define CLOCK_TICK_RATE KS8695_CLOCK_RATE - -#endif diff --git a/arch/arm/mach-lpc32xx/include/mach/timex.h b/arch/arm/mach-lpc32xx/include/mach/timex.h deleted file mode 100644 index 8d4066b16b3f..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/timex.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/timex.h - * - * Author: Kevin Wells - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* - * Rate in Hz of the main system oscillator. This value should match - * the value 'MAIN_OSC_FREQ' in platform.h - */ -#define CLOCK_TICK_RATE 13000000 - -#endif diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h deleted file mode 100644 index 70c9f1d88c02..000000000000 --- a/arch/arm/mach-mmp/include/mach/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/timex.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifdef CONFIG_CPU_MMP2 -#define CLOCK_TICK_RATE 6500000 -#else -#define CLOCK_TICK_RATE 3250000 -#endif diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h deleted file mode 100644 index a62e6b215aec..000000000000 --- a/arch/arm/mach-msm/include/mach/timex.h +++ /dev/null @@ -1,21 +0,0 @@ -/* arch/arm/mach-msm/include/mach/timex.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_TIMEX_H -#define __ASM_ARCH_MSM_TIMEX_H - -#define CLOCK_TICK_RATE 1000000 - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/timex.h b/arch/arm/mach-mv78xx0/include/mach/timex.h deleted file mode 100644 index 0e8c443c723a..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-netx/include/mach/timex.h b/arch/arm/mach-netx/include/mach/timex.h deleted file mode 100644 index 1120dd0ba393..000000000000 --- a/arch/arm/mach-netx/include/mach/timex.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/timex.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE 100000000 diff --git a/arch/arm/mach-omap1/include/mach/timex.h b/arch/arm/mach-omap1/include/mach/timex.h deleted file mode 100644 index 4793790d53cc..000000000000 --- a/arch/arm/mach-omap1/include/mach/timex.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/timex.h - */ - -#include diff --git a/arch/arm/mach-omap2/include/mach/timex.h b/arch/arm/mach-omap2/include/mach/timex.h deleted file mode 100644 index de9f8fc40e7c..000000000000 --- a/arch/arm/mach-omap2/include/mach/timex.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap2/include/mach/timex.h - */ - -#include diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h deleted file mode 100644 index 4c69820e0810..000000000000 --- a/arch/arm/mach-orion5x/include/mach/timex.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/timex.h - * - * Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-pxa/include/mach/timex.h b/arch/arm/mach-pxa/include/mach/timex.h deleted file mode 100644 index af6760a50e1a..000000000000 --- a/arch/arm/mach-pxa/include/mach/timex.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/timex.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* Various drivers are still using the constant of CLOCK_TICK_RATE, for - * those drivers to at least work, the definition is provided here. - * - * NOTE: this is no longer accurate when multiple processors and boards - * are selected, newer drivers should not depend on this any more. Use - * either the clocksource/clockevent or get this at run-time by calling - * get_clock_tick_rate() (as defined in generic.c). - */ - -#if defined(CONFIG_PXA25x) -/* PXA250/210 timer base */ -#define CLOCK_TICK_RATE 3686400 -#elif defined(CONFIG_PXA27x) -/* PXA27x timer base */ -#ifdef CONFIG_MACH_MAINSTONE -#define CLOCK_TICK_RATE 3249600 -#else -#define CLOCK_TICK_RATE 3250000 -#endif -#else -#define CLOCK_TICK_RATE 3250000 -#endif diff --git a/arch/arm/mach-realview/include/mach/timex.h b/arch/arm/mach-realview/include/mach/timex.h deleted file mode 100644 index 4eeb069373c2..000000000000 --- a/arch/arm/mach-realview/include/mach/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/timex.h - * - * RealView architecture timex specifications - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/arch/arm/mach-rpc/include/mach/timex.h b/arch/arm/mach-rpc/include/mach/timex.h deleted file mode 100644 index dd75e7387bbe..000000000000 --- a/arch/arm/mach-rpc/include/mach/timex.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-rpc/include/mach/timex.h - * - * Copyright (C) 1997, 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * RiscPC architecture timex specifications - */ - -/* - * On the RiscPC, the clock ticks at 2MHz. - */ -#define CLOCK_TICK_RATE 2000000 - diff --git a/arch/arm/mach-s3c24xx/include/mach/timex.h b/arch/arm/mach-s3c24xx/include/mach/timex.h deleted file mode 100644 index fe9ca1ffd51b..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/timex.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/timex.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * S3C2410 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h deleted file mode 100644 index fb2e8cd40829..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/timex.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s3c64xx/include/mach/timex.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * S3C6400 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h deleted file mode 100644 index 4b91faa195a8..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/timex.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * S5P64X0 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h deleted file mode 100644 index 47ffb17aff96..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/timex.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/timex.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * S3C6400 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h deleted file mode 100644 index 73dc85496a83..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/timex.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/timex.h - * - * Copyright (c) 2003-2010 Simtec Electronics - * Ben Dooks - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s5p6442/include/mach/timex.h - * - * S5PV210 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H __FILE__ - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-sa1100/include/mach/timex.h b/arch/arm/mach-sa1100/include/mach/timex.h deleted file mode 100644 index 7a5d017b58b3..000000000000 --- a/arch/arm/mach-sa1100/include/mach/timex.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/timex.h - * - * SA1100 architecture timex specifications - * - * Copyright (C) 1998 - */ - -/* - * SA1100 timer - */ -#define CLOCK_TICK_RATE 3686400 diff --git a/arch/arm/mach-shmobile/include/mach/timex.h b/arch/arm/mach-shmobile/include/mach/timex.h deleted file mode 100644 index ae0d8d825c23..000000000000 --- a/arch/arm/mach-shmobile/include/mach/timex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_MACH_TIMEX_H -#define __ASM_MACH_TIMEX_H - -#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */ - -#endif /* __ASM_MACH_TIMEX_H */ diff --git a/arch/arm/mach-spear/include/mach/timex.h b/arch/arm/mach-spear/include/mach/timex.h deleted file mode 100644 index ef95e5b780bd..000000000000 --- a/arch/arm/mach-spear/include/mach/timex.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/timex.h - * - * SPEAr platform specific timex definitions - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_TIMEX_H -#define __PLAT_TIMEX_H - -#define CLOCK_TICK_RATE 48000000 - -#endif /* __PLAT_TIMEX_H */ diff --git a/arch/arm/mach-versatile/include/mach/timex.h b/arch/arm/mach-versatile/include/mach/timex.h deleted file mode 100644 index 426199b1add5..000000000000 --- a/arch/arm/mach-versatile/include/mach/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/timex.h - * - * Versatile architecture timex specifications - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/arch/arm/mach-w90x900/include/mach/timex.h b/arch/arm/mach-w90x900/include/mach/timex.h deleted file mode 100644 index 164dce0b64db..000000000000 --- a/arch/arm/mach-w90x900/include/mach/timex.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/arm/mach-w90x900/include/mach/timex.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun - * - * Based on arch/arm/mach-s3c2410/include/mach/timex.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE Now, I don't use it. */ - -#define CLOCK_TICK_RATE 15000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/plat-omap/include/plat/timex.h b/arch/arm/plat-omap/include/plat/timex.h deleted file mode 100644 index e27d2daa7790..000000000000 --- a/arch/arm/plat-omap/include/plat/timex.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/timex.h - * - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#if !defined(__ASM_ARCH_OMAP_TIMEX_H) -#define __ASM_ARCH_OMAP_TIMEX_H - -#define CLOCK_TICK_RATE (HZ * 100000UL) - -#endif /* __ASM_ARCH_OMAP_TIMEX_H */ -- cgit v1.2.3 From cc60a1a4d47a4dea2ca04bad6f16bf43dcd5c1d6 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 23 Jan 2014 14:09:54 -0600 Subject: ARM: dts: msm: split out msm8660 and msm8960 soc into dts include Pull the SoC device tree bits into their own files so other boards based on these SoCs can include them and reduce duplication across a number of boards. Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-msm8660-surf.dts | 59 +-------------------------- arch/arm/boot/dts/qcom-msm8660.dtsi | 63 +++++++++++++++++++++++++++++ arch/arm/boot/dts/qcom-msm8960-cdp.dts | 66 +------------------------------ arch/arm/boot/dts/qcom-msm8960.dtsi | 70 +++++++++++++++++++++++++++++++++ 4 files changed, 135 insertions(+), 123 deletions(-) create mode 100644 arch/arm/boot/dts/qcom-msm8660.dtsi create mode 100644 arch/arm/boot/dts/qcom-msm8960.dtsi diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts index 68a72f5507b9..169bad90dac9 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts @@ -1,63 +1,6 @@ -/dts-v1/; - -/include/ "skeleton.dtsi" - -#include +#include "qcom-msm8660.dtsi" / { model = "Qualcomm MSM8660 SURF"; compatible = "qcom,msm8660-surf", "qcom,msm8660"; - interrupt-parent = <&intc>; - - intc: interrupt-controller@2080000 { - compatible = "qcom,msm-8660-qgic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = < 0x02080000 0x1000 >, - < 0x02081000 0x1000 >; - }; - - timer@2000000 { - compatible = "qcom,scss-timer", "qcom,msm-timer"; - interrupts = <1 0 0x301>, - <1 1 0x301>, - <1 2 0x301>; - reg = <0x02000000 0x100>; - clock-frequency = <27000000>, - <32768>; - cpu-offset = <0x40000>; - }; - - msmgpio: gpio@800000 { - compatible = "qcom,msm-gpio"; - reg = <0x00800000 0x4000>; - gpio-controller; - #gpio-cells = <2>; - ngpio = <173>; - interrupts = <0 16 0x4>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gcc: clock-controller@900000 { - compatible = "qcom,gcc-msm8660"; - #clock-cells = <1>; - #reset-cells = <1>; - reg = <0x900000 0x4000>; - }; - - serial@19c40000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x19c40000 0x1000>, - <0x19c00000 0x1000>; - interrupts = <0 195 0x0>; - clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; - clock-names = "core", "iface"; - }; - - qcom,ssbi@500000 { - compatible = "qcom,ssbi"; - reg = <0x500000 0x1000>; - qcom,controller-type = "pmic-arbiter"; - }; }; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi new file mode 100644 index 000000000000..69d6c4edea30 --- /dev/null +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -0,0 +1,63 @@ +/dts-v1/; + +/include/ "skeleton.dtsi" + +#include + +/ { + model = "Qualcomm MSM8660"; + compatible = "qcom,msm8660"; + interrupt-parent = <&intc>; + + intc: interrupt-controller@2080000 { + compatible = "qcom,msm-8660-qgic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = < 0x02080000 0x1000 >, + < 0x02081000 0x1000 >; + }; + + timer@2000000 { + compatible = "qcom,scss-timer", "qcom,msm-timer"; + interrupts = <1 0 0x301>, + <1 1 0x301>, + <1 2 0x301>; + reg = <0x02000000 0x100>; + clock-frequency = <27000000>, + <32768>; + cpu-offset = <0x40000>; + }; + + msmgpio: gpio@800000 { + compatible = "qcom,msm-gpio"; + reg = <0x00800000 0x4000>; + gpio-controller; + #gpio-cells = <2>; + ngpio = <173>; + interrupts = <0 16 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gcc: clock-controller@900000 { + compatible = "qcom,gcc-msm8660"; + #clock-cells = <1>; + #reset-cells = <1>; + reg = <0x900000 0x4000>; + }; + + serial@19c40000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x19c40000 0x1000>, + <0x19c00000 0x1000>; + interrupts = <0 195 0x0>; + clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; + clock-names = "core", "iface"; + }; + + qcom,ssbi@500000 { + compatible = "qcom,ssbi"; + reg = <0x500000 0x1000>; + qcom,controller-type = "pmic-arbiter"; + }; +}; diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 7c30de4fa302..a58fb88315f6 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -1,70 +1,6 @@ -/dts-v1/; - -/include/ "skeleton.dtsi" - -#include +#include "qcom-msm8960.dtsi" / { model = "Qualcomm MSM8960 CDP"; compatible = "qcom,msm8960-cdp", "qcom,msm8960"; - interrupt-parent = <&intc>; - - intc: interrupt-controller@2000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = < 0x02000000 0x1000 >, - < 0x02002000 0x1000 >; - }; - - timer@200a000 { - compatible = "qcom,kpss-timer", "qcom,msm-timer"; - interrupts = <1 1 0x301>, - <1 2 0x301>, - <1 3 0x301>; - reg = <0x0200a000 0x100>; - clock-frequency = <27000000>, - <32768>; - cpu-offset = <0x80000>; - }; - - msmgpio: gpio@800000 { - compatible = "qcom,msm-gpio"; - gpio-controller; - #gpio-cells = <2>; - ngpio = <150>; - interrupts = <0 16 0x4>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x800000 0x4000>; - }; - - gcc: clock-controller@900000 { - compatible = "qcom,gcc-msm8960"; - #clock-cells = <1>; - #reset-cells = <1>; - reg = <0x900000 0x4000>; - }; - - clock-controller@4000000 { - compatible = "qcom,mmcc-msm8960"; - reg = <0x4000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - serial@16440000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x16440000 0x1000>, - <0x16400000 0x1000>; - interrupts = <0 154 0x0>; - clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; - clock-names = "core", "iface"; - }; - - qcom,ssbi@500000 { - compatible = "qcom,ssbi"; - reg = <0x500000 0x1000>; - qcom,controller-type = "pmic-arbiter"; - }; }; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi new file mode 100644 index 000000000000..ff002826552a --- /dev/null +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -0,0 +1,70 @@ +/dts-v1/; + +/include/ "skeleton.dtsi" + +#include + +/ { + model = "Qualcomm MSM8960"; + compatible = "qcom,msm8960"; + interrupt-parent = <&intc>; + + intc: interrupt-controller@2000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; + reg = < 0x02000000 0x1000 >, + < 0x02002000 0x1000 >; + }; + + timer@200a000 { + compatible = "qcom,kpss-timer", "qcom,msm-timer"; + interrupts = <1 1 0x301>, + <1 2 0x301>, + <1 3 0x301>; + reg = <0x0200a000 0x100>; + clock-frequency = <27000000>, + <32768>; + cpu-offset = <0x80000>; + }; + + msmgpio: gpio@800000 { + compatible = "qcom,msm-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpio = <150>; + interrupts = <0 16 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x800000 0x4000>; + }; + + gcc: clock-controller@900000 { + compatible = "qcom,gcc-msm8960"; + #clock-cells = <1>; + #reset-cells = <1>; + reg = <0x900000 0x4000>; + }; + + clock-controller@4000000 { + compatible = "qcom,mmcc-msm8960"; + reg = <0x4000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + serial@16440000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16440000 0x1000>, + <0x16400000 0x1000>; + interrupts = <0 154 0x0>; + clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; + clock-names = "core", "iface"; + }; + + qcom,ssbi@500000 { + compatible = "qcom,ssbi"; + reg = <0x500000 0x1000>; + qcom,controller-type = "pmic-arbiter"; + }; +}; -- cgit v1.2.3 From 891fa525dc29cbed3ef0b74d5e0ab2fb5233f9a6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 3 Jan 2014 16:48:47 +0100 Subject: ARM: shmobile: Remove duplicate shmobile_invalidate_start() declaration Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index e31980590eb4..cb8e32deb2a3 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -25,7 +25,6 @@ extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle); extern void shmobile_smp_apmu_cpu_die(unsigned int cpu); extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu); -extern void shmobile_invalidate_start(void); struct clk; extern int shmobile_clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); -- cgit v1.2.3 From d690f4681ceddeb3f077c661a19af0b8e0411ae7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 8 Jan 2014 13:34:39 +0900 Subject: ARM: shmobile: r8a7779: Remove unused clock constants Signed-off-by: Simon Horman Acked-by: Laurent Pinchart --- arch/arm/mach-shmobile/clock-r8a7779.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index f1fb89b76786..cabedebd7648 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -47,17 +47,10 @@ #define MD(nr) BIT(nr) -#define FRQMR IOMEM(0xffc80014) #define MSTPCR0 IOMEM(0xffc80030) #define MSTPCR1 IOMEM(0xffc80034) #define MSTPCR3 IOMEM(0xffc8003c) #define MSTPSR1 IOMEM(0xffc80044) -#define MSTPSR4 IOMEM(0xffc80048) -#define MSTPSR6 IOMEM(0xffc8004c) -#define MSTPCR4 IOMEM(0xffc80050) -#define MSTPCR5 IOMEM(0xffc80054) -#define MSTPCR6 IOMEM(0xffc80058) -#define MSTPCR7 IOMEM(0xffc80040) #define MODEMR 0xffcc0020 -- cgit v1.2.3 From d24d1780c340777942061ef3445edcf228e8d35b Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 27 Dec 2013 12:14:08 +0900 Subject: ARM: shmobile: emev2: Use __initconst for const init definition __initconst must be used instead of __initdata for const init definitions. This problem was introduced by 3d5de27174955702 ("mach-shmobile: Emma Mobile EV2 DT support V3") in v3.4-rc7. Reported-by: Fengguang Wu Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-emev2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c index c8f2a1a69a52..c71d667007b8 100644 --- a/arch/arm/mach-shmobile/setup-emev2.c +++ b/arch/arm/mach-shmobile/setup-emev2.c @@ -58,7 +58,7 @@ static void __init emev2_add_standard_devices_dt(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -static const char *emev2_boards_compat_dt[] __initdata = { +static const char *emev2_boards_compat_dt[] __initconst = { "renesas,emev2", NULL, }; -- cgit v1.2.3 From 52b52b4681df8bad450692cf3fa8a61ca1e1599a Mon Sep 17 00:00:00 2001 From: Rohit Vaswani Date: Fri, 21 Jun 2013 12:17:37 -0700 Subject: ARM: msm: Remove pen_release usage pen_release is no longer required as the synchronization is now managed by generic arm code. This is done as suggested in https://lkml.org/lkml/2013/6/4/184 Cc: Russell King Signed-off-by: Rohit Vaswani Signed-off-by: Stephen Boyd Signed-off-by: Kumar Gala --- arch/arm/mach-msm/Makefile | 2 +- arch/arm/mach-msm/headsmp.S | 39 --------------------------------------- arch/arm/mach-msm/hotplug.c | 31 ++++--------------------------- arch/arm/mach-msm/platsmp.c | 37 +++---------------------------------- 4 files changed, 8 insertions(+), 101 deletions(-) delete mode 100644 arch/arm/mach-msm/headsmp.S diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 8e307a10d3c3..721f27f50d96 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -19,7 +19,7 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_SMP) += headsmp.o platsmp.o +obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S deleted file mode 100644 index 6c62c3f82fe6..000000000000 --- a/arch/arm/mach-msm/headsmp.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/arch/arm/mach-realview/headsmp.S - * - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -/* - * MSM specific entry point for secondary CPUs. This provides - * a "holding pen" into which all secondary cores are held until we're - * ready for them to initialise. - */ -ENTRY(msm_secondary_startup) - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 -pen: ldr r7, [r6] - cmp r7, r0 - bne pen - - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup -ENDPROC(msm_secondary_startup) - - .align -1: .long . - .long pen_release diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c index 326a87261f9a..cea80fc6e48e 100644 --- a/arch/arm/mach-msm/hotplug.c +++ b/arch/arm/mach-msm/hotplug.c @@ -24,33 +24,10 @@ static inline void cpu_leave_lowpower(void) static inline void platform_do_lowpower(unsigned int cpu) { - /* Just enter wfi for now. TODO: Properly shut off the cpu. */ - for (;;) { - /* - * here's the WFI - */ - asm("wfi" - : - : - : "memory", "cc"); - - if (pen_release == cpu_logical_map(cpu)) { - /* - * OK, proper wakeup, we're done - */ - break; - } - - /* - * getting here, means that we have come out of WFI without - * having been woken up - this shouldn't happen - * - * The trouble is, letting people know about this is not really - * possible, since we are currently running incoherently, and - * therefore cannot safely call printk() or anything else - */ - pr_debug("CPU%u: spurious wakeup call\n", cpu); - } + asm("wfi" + : + : + : "memory", "cc"); } /* diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index f10a1f58fde9..3721b31ef6ae 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -12,13 +12,10 @@ #include #include #include -#include #include #include -#include #include -#include #include #include "scm-boot.h" @@ -28,7 +25,7 @@ #define SCSS_CPU1CORE_RESET 0xD80 #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 -extern void msm_secondary_startup(void); +extern void secondary_startup(void); static DEFINE_SPINLOCK(boot_lock); @@ -40,13 +37,6 @@ static inline int get_core_count(void) static void msm_secondary_init(unsigned int cpu) { - /* - * let the primary processor know we're out of the - * pen, then head off into the C entry point - */ - pen_release = -1; - smp_wmb(); - /* * Synchronise with the boot thread. */ @@ -57,7 +47,7 @@ static void msm_secondary_init(unsigned int cpu) static void prepare_cold_cpu(unsigned int cpu) { int ret; - ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), + ret = scm_set_boot_addr(virt_to_phys(secondary_startup), SCM_FLAG_COLDBOOT_CPU1); if (ret == 0) { void __iomem *sc1_base_ptr; @@ -75,7 +65,6 @@ static void prepare_cold_cpu(unsigned int cpu) static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) { - unsigned long timeout; static int cold_boot_done; /* Only need to bring cpu out of reset this way once */ @@ -90,17 +79,6 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) */ spin_lock(&boot_lock); - /* - * The secondary processor is waiting to be released from - * the holding pen - release it, then wait for it to flag - * that it has been released by resetting pen_release. - * - * Note that "pen_release" is the hardware CPU ID, whereas - * "cpu" is Linux's internal ID. - */ - pen_release = cpu_logical_map(cpu); - sync_cache_w(&pen_release); - /* * Send the secondary CPU a soft interrupt, thereby causing * the boot monitor to read the system wide flags register, @@ -108,22 +86,13 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) */ arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - timeout = jiffies + (1 * HZ); - while (time_before(jiffies, timeout)) { - smp_rmb(); - if (pen_release == -1) - break; - - udelay(10); - } - /* * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ spin_unlock(&boot_lock); - return pen_release != -1 ? -ENOSYS : 0; + return 0; } /* -- cgit v1.2.3 From 6a032dba7d2329084dca41cc8d82c0cda13103ef Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 31 Jan 2014 13:48:29 -0600 Subject: ARM: msm: kill off hotplug.c Right now hotplug.c only really implements msm_cpu_die as a wfi. Just move that implementation into platsmp.c. At the same time we use the existing wfi() instead of inline asm. Signed-off-by: Kumar Gala --- arch/arm/mach-msm/Makefile | 1 - arch/arm/mach-msm/common.h | 1 - arch/arm/mach-msm/hotplug.c | 51 --------------------------------------------- arch/arm/mach-msm/platsmp.c | 7 +++++++ 4 files changed, 7 insertions(+), 53 deletions(-) delete mode 100644 arch/arm/mach-msm/hotplug.c diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 721f27f50d96..8327f603df4c 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h index 33c7725adae2..0a4899b7d85c 100644 --- a/arch/arm/mach-msm/common.h +++ b/arch/arm/mach-msm/common.h @@ -24,7 +24,6 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, unsigned int mtype, void *caller); extern struct smp_operations msm_smp_ops; -extern void msm_cpu_die(unsigned int cpu); struct msm_mmc_platform_data; diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c deleted file mode 100644 index cea80fc6e48e..000000000000 --- a/arch/arm/mach-msm/hotplug.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include - -#include - -#include "common.h" - -static inline void cpu_enter_lowpower(void) -{ -} - -static inline void cpu_leave_lowpower(void) -{ -} - -static inline void platform_do_lowpower(unsigned int cpu) -{ - asm("wfi" - : - : - : "memory", "cc"); -} - -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void __ref msm_cpu_die(unsigned int cpu) -{ - /* - * we're ready for shutdown now, so do it - */ - cpu_enter_lowpower(); - platform_do_lowpower(cpu); - - /* - * bring this CPU back into the world of cache - * coherency, and then restore interrupts - */ - cpu_leave_lowpower(); -} diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 3721b31ef6ae..251a91eb102a 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -29,6 +29,13 @@ extern void secondary_startup(void); static DEFINE_SPINLOCK(boot_lock); +#ifdef CONFIG_HOTPLUG_CPU +static void __ref msm_cpu_die(unsigned int cpu) +{ + wfi(); +} +#endif + static inline int get_core_count(void) { /* 1 + the PART[1:0] field of MIDR */ -- cgit v1.2.3 From 3f8e8cee2f4bd02367583cc2d143887d1f49fd6c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 29 Jan 2014 16:17:30 -0600 Subject: clocksource: qcom: Move clocksource code out of mach-msm We intend to share the clocksource code for MSM platforms between legacy and multiplatform supported qcom SoCs. Acked-by: Olof Johansson Signed-off-by: Kumar Gala --- arch/arm/mach-msm/Kconfig | 13 +- arch/arm/mach-msm/Makefile | 1 - arch/arm/mach-msm/timer.c | 333 --------------------------------------- drivers/clocksource/Kconfig | 3 + drivers/clocksource/Makefile | 1 + drivers/clocksource/qcom-timer.c | 329 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 338 insertions(+), 342 deletions(-) delete mode 100644 arch/arm/mach-msm/timer.c create mode 100644 drivers/clocksource/qcom-timer.c diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 9625cf378931..3c4eca71f976 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -21,7 +21,7 @@ config ARCH_MSM8X60 select CPU_V7 select HAVE_SMP select MSM_SCM if SMP - select MSM_TIMER + select CLKSRC_QCOM config ARCH_MSM8960 bool "Enable support for MSM8960" @@ -29,7 +29,7 @@ config ARCH_MSM8960 select CPU_V7 select HAVE_SMP select MSM_SCM if SMP - select MSM_TIMER + select CLKSRC_QCOM config ARCH_MSM8974 bool "Enable support for MSM8974" @@ -54,7 +54,7 @@ config ARCH_MSM7X00A select MACH_TROUT if !MACH_HALIBUT select MSM_PROC_COMM select MSM_SMD - select MSM_TIMER + select CLKSRC_QCOM select MSM_SMD_PKG3 config ARCH_MSM7X30 @@ -66,7 +66,7 @@ config ARCH_MSM7X30 select MSM_GPIOMUX select MSM_PROC_COMM select MSM_SMD - select MSM_TIMER + select CLKSRC_QCOM select MSM_VIC config ARCH_QSD8X50 @@ -78,7 +78,7 @@ config ARCH_QSD8X50 select MSM_GPIOMUX select MSM_PROC_COMM select MSM_SMD - select MSM_TIMER + select CLKSRC_QCOM select MSM_VIC endchoice @@ -153,7 +153,4 @@ config MSM_GPIOMUX config MSM_SCM bool -config MSM_TIMER - bool - endif diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 8327f603df4c..04b1bee941f5 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -1,4 +1,3 @@ -obj-$(CONFIG_MSM_TIMER) += timer.o obj-$(CONFIG_MSM_PROC_COMM) += clock.o obj-$(CONFIG_MSM_VIC) += irq-vic.o diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c deleted file mode 100644 index fd1644987534..000000000000 --- a/arch/arm/mach-msm/timer.c +++ /dev/null @@ -1,333 +0,0 @@ -/* - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "common.h" - -#define TIMER_MATCH_VAL 0x0000 -#define TIMER_COUNT_VAL 0x0004 -#define TIMER_ENABLE 0x0008 -#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1) -#define TIMER_ENABLE_EN BIT(0) -#define TIMER_CLEAR 0x000C -#define DGT_CLK_CTL 0x10 -#define DGT_CLK_CTL_DIV_4 0x3 -#define TIMER_STS_GPT0_CLR_PEND BIT(10) - -#define GPT_HZ 32768 - -#define MSM_DGT_SHIFT 5 - -static void __iomem *event_base; -static void __iomem *sts_base; - -static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = dev_id; - /* Stop the timer tick */ - if (evt->mode == CLOCK_EVT_MODE_ONESHOT) { - u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); - ctrl &= ~TIMER_ENABLE_EN; - writel_relaxed(ctrl, event_base + TIMER_ENABLE); - } - evt->event_handler(evt); - return IRQ_HANDLED; -} - -static int msm_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) -{ - u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); - - ctrl &= ~TIMER_ENABLE_EN; - writel_relaxed(ctrl, event_base + TIMER_ENABLE); - - writel_relaxed(ctrl, event_base + TIMER_CLEAR); - writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); - - if (sts_base) - while (readl_relaxed(sts_base) & TIMER_STS_GPT0_CLR_PEND) - cpu_relax(); - - writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); - return 0; -} - -static void msm_timer_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - u32 ctrl; - - ctrl = readl_relaxed(event_base + TIMER_ENABLE); - ctrl &= ~(TIMER_ENABLE_EN | TIMER_ENABLE_CLR_ON_MATCH_EN); - - switch (mode) { - case CLOCK_EVT_MODE_RESUME: - case CLOCK_EVT_MODE_PERIODIC: - break; - case CLOCK_EVT_MODE_ONESHOT: - /* Timer is enabled in set_next_event */ - break; - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - break; - } - writel_relaxed(ctrl, event_base + TIMER_ENABLE); -} - -static struct clock_event_device __percpu *msm_evt; - -static void __iomem *source_base; - -static notrace cycle_t msm_read_timer_count(struct clocksource *cs) -{ - return readl_relaxed(source_base + TIMER_COUNT_VAL); -} - -static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) -{ - /* - * Shift timer count down by a constant due to unreliable lower bits - * on some targets. - */ - return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; -} - -static struct clocksource msm_clocksource = { - .name = "dg_timer", - .rating = 300, - .read = msm_read_timer_count, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static int msm_timer_irq; -static int msm_timer_has_ppi; - -static int msm_local_timer_setup(struct clock_event_device *evt) -{ - int cpu = smp_processor_id(); - int err; - - evt->irq = msm_timer_irq; - evt->name = "msm_timer"; - evt->features = CLOCK_EVT_FEAT_ONESHOT; - evt->rating = 200; - evt->set_mode = msm_timer_set_mode; - evt->set_next_event = msm_timer_set_next_event; - evt->cpumask = cpumask_of(cpu); - - clockevents_config_and_register(evt, GPT_HZ, 4, 0xffffffff); - - if (msm_timer_has_ppi) { - enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); - } else { - err = request_irq(evt->irq, msm_timer_interrupt, - IRQF_TIMER | IRQF_NOBALANCING | - IRQF_TRIGGER_RISING, "gp_timer", evt); - if (err) - pr_err("request_irq failed\n"); - } - - return 0; -} - -static void msm_local_timer_stop(struct clock_event_device *evt) -{ - evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); - disable_percpu_irq(evt->irq); -} - -static int msm_timer_cpu_notify(struct notifier_block *self, - unsigned long action, void *hcpu) -{ - /* - * Grab cpu pointer in each case to avoid spurious - * preemptible warnings - */ - switch (action & ~CPU_TASKS_FROZEN) { - case CPU_STARTING: - msm_local_timer_setup(this_cpu_ptr(msm_evt)); - break; - case CPU_DYING: - msm_local_timer_stop(this_cpu_ptr(msm_evt)); - break; - } - - return NOTIFY_OK; -} - -static struct notifier_block msm_timer_cpu_nb = { - .notifier_call = msm_timer_cpu_notify, -}; - -static u64 notrace msm_sched_clock_read(void) -{ - return msm_clocksource.read(&msm_clocksource); -} - -static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq, - bool percpu) -{ - struct clocksource *cs = &msm_clocksource; - int res = 0; - - msm_timer_irq = irq; - msm_timer_has_ppi = percpu; - - msm_evt = alloc_percpu(struct clock_event_device); - if (!msm_evt) { - pr_err("memory allocation failed for clockevents\n"); - goto err; - } - - if (percpu) - res = request_percpu_irq(irq, msm_timer_interrupt, - "gp_timer", msm_evt); - - if (res) { - pr_err("request_percpu_irq failed\n"); - } else { - res = register_cpu_notifier(&msm_timer_cpu_nb); - if (res) { - free_percpu_irq(irq, msm_evt); - goto err; - } - - /* Immediately configure the timer on the boot CPU */ - msm_local_timer_setup(__this_cpu_ptr(msm_evt)); - } - -err: - writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); - res = clocksource_register_hz(cs, dgt_hz); - if (res) - pr_err("clocksource_register failed\n"); - sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); -} - -#ifdef CONFIG_OF -static void __init msm_dt_timer_init(struct device_node *np) -{ - u32 freq; - int irq; - struct resource res; - u32 percpu_offset; - void __iomem *base; - void __iomem *cpu0_base; - - base = of_iomap(np, 0); - if (!base) { - pr_err("Failed to map event base\n"); - return; - } - - /* We use GPT0 for the clockevent */ - irq = irq_of_parse_and_map(np, 1); - if (irq <= 0) { - pr_err("Can't get irq\n"); - return; - } - - /* We use CPU0's DGT for the clocksource */ - if (of_property_read_u32(np, "cpu-offset", &percpu_offset)) - percpu_offset = 0; - - if (of_address_to_resource(np, 0, &res)) { - pr_err("Failed to parse DGT resource\n"); - return; - } - - cpu0_base = ioremap(res.start + percpu_offset, resource_size(&res)); - if (!cpu0_base) { - pr_err("Failed to map source base\n"); - return; - } - - if (of_property_read_u32(np, "clock-frequency", &freq)) { - pr_err("Unknown frequency\n"); - return; - } - - event_base = base + 0x4; - sts_base = base + 0x88; - source_base = cpu0_base + 0x24; - freq /= 4; - writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL); - - msm_timer_init(freq, 32, irq, !!percpu_offset); -} -CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); -CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); -#endif - -static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, - u32 sts) -{ - void __iomem *base; - - base = ioremap(addr, SZ_256); - if (!base) { - pr_err("Failed to map timer base\n"); - return -ENOMEM; - } - event_base = base + event; - source_base = base + source; - if (sts) - sts_base = base + sts; - - return 0; -} - -void __init msm7x01_timer_init(void) -{ - struct clocksource *cs = &msm_clocksource; - - if (msm_timer_map(0xc0100000, 0x0, 0x10, 0x0)) - return; - cs->read = msm_read_timer_count_shift; - cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)); - /* 600 KHz */ - msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7, - false); -} - -void __init msm7x30_timer_init(void) -{ - if (msm_timer_map(0xc0100000, 0x4, 0x24, 0x80)) - return; - msm_timer_init(24576000 / 4, 32, 1, false); -} - -void __init qsd8x50_timer_init(void) -{ - if (msm_timer_map(0xAC100000, 0x0, 0x10, 0x34)) - return; - msm_timer_init(19200000 / 4, 32, 7, false); -} diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index cd6950fd8caf..6510ec4f45ff 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -140,3 +140,6 @@ config VF_PIT_TIMER bool help Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. + +config CLKSRC_QCOM + bool diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index c7ca50a9c232..2e0c0cc0a014 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o +obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c new file mode 100644 index 000000000000..dca829ec859b --- /dev/null +++ b/drivers/clocksource/qcom-timer.c @@ -0,0 +1,329 @@ +/* + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2009-2012,2014, The Linux Foundation. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TIMER_MATCH_VAL 0x0000 +#define TIMER_COUNT_VAL 0x0004 +#define TIMER_ENABLE 0x0008 +#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1) +#define TIMER_ENABLE_EN BIT(0) +#define TIMER_CLEAR 0x000C +#define DGT_CLK_CTL 0x10 +#define DGT_CLK_CTL_DIV_4 0x3 +#define TIMER_STS_GPT0_CLR_PEND BIT(10) + +#define GPT_HZ 32768 + +#define MSM_DGT_SHIFT 5 + +static void __iomem *event_base; +static void __iomem *sts_base; + +static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = dev_id; + /* Stop the timer tick */ + if (evt->mode == CLOCK_EVT_MODE_ONESHOT) { + u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); + ctrl &= ~TIMER_ENABLE_EN; + writel_relaxed(ctrl, event_base + TIMER_ENABLE); + } + evt->event_handler(evt); + return IRQ_HANDLED; +} + +static int msm_timer_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); + + ctrl &= ~TIMER_ENABLE_EN; + writel_relaxed(ctrl, event_base + TIMER_ENABLE); + + writel_relaxed(ctrl, event_base + TIMER_CLEAR); + writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); + + if (sts_base) + while (readl_relaxed(sts_base) & TIMER_STS_GPT0_CLR_PEND) + cpu_relax(); + + writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); + return 0; +} + +static void msm_timer_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + u32 ctrl; + + ctrl = readl_relaxed(event_base + TIMER_ENABLE); + ctrl &= ~(TIMER_ENABLE_EN | TIMER_ENABLE_CLR_ON_MATCH_EN); + + switch (mode) { + case CLOCK_EVT_MODE_RESUME: + case CLOCK_EVT_MODE_PERIODIC: + break; + case CLOCK_EVT_MODE_ONESHOT: + /* Timer is enabled in set_next_event */ + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + break; + } + writel_relaxed(ctrl, event_base + TIMER_ENABLE); +} + +static struct clock_event_device __percpu *msm_evt; + +static void __iomem *source_base; + +static notrace cycle_t msm_read_timer_count(struct clocksource *cs) +{ + return readl_relaxed(source_base + TIMER_COUNT_VAL); +} + +static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) +{ + /* + * Shift timer count down by a constant due to unreliable lower bits + * on some targets. + */ + return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; +} + +static struct clocksource msm_clocksource = { + .name = "dg_timer", + .rating = 300, + .read = msm_read_timer_count, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static int msm_timer_irq; +static int msm_timer_has_ppi; + +static int msm_local_timer_setup(struct clock_event_device *evt) +{ + int cpu = smp_processor_id(); + int err; + + evt->irq = msm_timer_irq; + evt->name = "msm_timer"; + evt->features = CLOCK_EVT_FEAT_ONESHOT; + evt->rating = 200; + evt->set_mode = msm_timer_set_mode; + evt->set_next_event = msm_timer_set_next_event; + evt->cpumask = cpumask_of(cpu); + + clockevents_config_and_register(evt, GPT_HZ, 4, 0xffffffff); + + if (msm_timer_has_ppi) { + enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); + } else { + err = request_irq(evt->irq, msm_timer_interrupt, + IRQF_TIMER | IRQF_NOBALANCING | + IRQF_TRIGGER_RISING, "gp_timer", evt); + if (err) + pr_err("request_irq failed\n"); + } + + return 0; +} + +static void msm_local_timer_stop(struct clock_event_device *evt) +{ + evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); + disable_percpu_irq(evt->irq); +} + +static int msm_timer_cpu_notify(struct notifier_block *self, + unsigned long action, void *hcpu) +{ + /* + * Grab cpu pointer in each case to avoid spurious + * preemptible warnings + */ + switch (action & ~CPU_TASKS_FROZEN) { + case CPU_STARTING: + msm_local_timer_setup(this_cpu_ptr(msm_evt)); + break; + case CPU_DYING: + msm_local_timer_stop(this_cpu_ptr(msm_evt)); + break; + } + + return NOTIFY_OK; +} + +static struct notifier_block msm_timer_cpu_nb = { + .notifier_call = msm_timer_cpu_notify, +}; + +static u64 notrace msm_sched_clock_read(void) +{ + return msm_clocksource.read(&msm_clocksource); +} + +static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq, + bool percpu) +{ + struct clocksource *cs = &msm_clocksource; + int res = 0; + + msm_timer_irq = irq; + msm_timer_has_ppi = percpu; + + msm_evt = alloc_percpu(struct clock_event_device); + if (!msm_evt) { + pr_err("memory allocation failed for clockevents\n"); + goto err; + } + + if (percpu) + res = request_percpu_irq(irq, msm_timer_interrupt, + "gp_timer", msm_evt); + + if (res) { + pr_err("request_percpu_irq failed\n"); + } else { + res = register_cpu_notifier(&msm_timer_cpu_nb); + if (res) { + free_percpu_irq(irq, msm_evt); + goto err; + } + + /* Immediately configure the timer on the boot CPU */ + msm_local_timer_setup(__this_cpu_ptr(msm_evt)); + } + +err: + writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); + res = clocksource_register_hz(cs, dgt_hz); + if (res) + pr_err("clocksource_register failed\n"); + sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); +} + +#ifdef CONFIG_OF +static void __init msm_dt_timer_init(struct device_node *np) +{ + u32 freq; + int irq; + struct resource res; + u32 percpu_offset; + void __iomem *base; + void __iomem *cpu0_base; + + base = of_iomap(np, 0); + if (!base) { + pr_err("Failed to map event base\n"); + return; + } + + /* We use GPT0 for the clockevent */ + irq = irq_of_parse_and_map(np, 1); + if (irq <= 0) { + pr_err("Can't get irq\n"); + return; + } + + /* We use CPU0's DGT for the clocksource */ + if (of_property_read_u32(np, "cpu-offset", &percpu_offset)) + percpu_offset = 0; + + if (of_address_to_resource(np, 0, &res)) { + pr_err("Failed to parse DGT resource\n"); + return; + } + + cpu0_base = ioremap(res.start + percpu_offset, resource_size(&res)); + if (!cpu0_base) { + pr_err("Failed to map source base\n"); + return; + } + + if (of_property_read_u32(np, "clock-frequency", &freq)) { + pr_err("Unknown frequency\n"); + return; + } + + event_base = base + 0x4; + sts_base = base + 0x88; + source_base = cpu0_base + 0x24; + freq /= 4; + writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL); + + msm_timer_init(freq, 32, irq, !!percpu_offset); +} +CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); +CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); +#endif + +static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, + u32 sts) +{ + void __iomem *base; + + base = ioremap(addr, SZ_256); + if (!base) { + pr_err("Failed to map timer base\n"); + return -ENOMEM; + } + event_base = base + event; + source_base = base + source; + if (sts) + sts_base = base + sts; + + return 0; +} + +void __init msm7x01_timer_init(void) +{ + struct clocksource *cs = &msm_clocksource; + + if (msm_timer_map(0xc0100000, 0x0, 0x10, 0x0)) + return; + cs->read = msm_read_timer_count_shift; + cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)); + /* 600 KHz */ + msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7, + false); +} + +void __init msm7x30_timer_init(void) +{ + if (msm_timer_map(0xc0100000, 0x4, 0x24, 0x80)) + return; + msm_timer_init(24576000 / 4, 32, 1, false); +} + +void __init qsd8x50_timer_init(void) +{ + if (msm_timer_map(0xAC100000, 0x0, 0x10, 0x34)) + return; + msm_timer_init(19200000 / 4, 32, 7, false); +} -- cgit v1.2.3 From fee04e7f0a6cc45e915b2df4bd3cf07af1a464ec Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Fri, 3 Jan 2014 16:38:07 +0100 Subject: ARM: mvebu: Makefile clean-up Some objects depend on CONFIG_ARCH_MVEBU whereas this whole Makefile depends on the same symbol. Moreover CONFIG_ARCH_MVEBU can't be selected as a module. So we can simplify this Makefile by moving all the object from obj-$(CONFIG_ARCH_MVEBU) to obj-y. Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 878aebe98dcc..d99846103bbb 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -3,8 +3,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ AFLAGS_coherency_ll.o := -Wa,-march=armv7-a -obj-y += system-controller.o mvebu-soc-id.o +obj-y += coherency.o coherency_ll.o pmsu.o system-controller.o mvebu-soc-id.o obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o -obj-$(CONFIG_ARCH_MVEBU) += coherency.o coherency_ll.o pmsu.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -- cgit v1.2.3 From 8fc1b0f87d9fcc7f05873c70b3003328c3d7defa Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 21 Jan 2014 17:14:10 -0600 Subject: ARM: qcom: Split Qualcomm support into legacy and multiplatform Introduce a new mach-qcom that will support SoCs that intend to be multiplatform compatible while keeping mach-msm to legacy SoC/board support that will not transition over to multiplatform. As part of this, we move support for MSM8X60, MSM8960 and MSM8974 over to mach-qcom. Signed-off-by: Kumar Gala --- MAINTAINERS | 8 ++ arch/arm/Kconfig | 7 +- arch/arm/Kconfig.debug | 2 +- arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 6 +- arch/arm/mach-msm/Kconfig | 45 +------ arch/arm/mach-msm/Makefile | 6 - arch/arm/mach-msm/board-dt.c | 41 ------ arch/arm/mach-msm/platsmp.c | 137 ------------------- arch/arm/mach-msm/scm-boot.c | 39 ------ arch/arm/mach-msm/scm-boot.h | 22 ---- arch/arm/mach-msm/scm.c | 299 ------------------------------------------ arch/arm/mach-msm/scm.h | 25 ---- arch/arm/mach-qcom/Kconfig | 33 +++++ arch/arm/mach-qcom/Makefile | 5 + arch/arm/mach-qcom/board.c | 40 ++++++ arch/arm/mach-qcom/platsmp.c | 137 +++++++++++++++++++ arch/arm/mach-qcom/scm-boot.c | 39 ++++++ arch/arm/mach-qcom/scm-boot.h | 22 ++++ arch/arm/mach-qcom/scm.c | 299 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-qcom/scm.h | 25 ++++ 21 files changed, 619 insertions(+), 619 deletions(-) delete mode 100644 arch/arm/mach-msm/board-dt.c delete mode 100644 arch/arm/mach-msm/platsmp.c delete mode 100644 arch/arm/mach-msm/scm-boot.c delete mode 100644 arch/arm/mach-msm/scm-boot.h delete mode 100644 arch/arm/mach-msm/scm.c delete mode 100644 arch/arm/mach-msm/scm.h create mode 100644 arch/arm/mach-qcom/Kconfig create mode 100644 arch/arm/mach-qcom/Makefile create mode 100644 arch/arm/mach-qcom/board.c create mode 100644 arch/arm/mach-qcom/platsmp.c create mode 100644 arch/arm/mach-qcom/scm-boot.c create mode 100644 arch/arm/mach-qcom/scm-boot.h create mode 100644 arch/arm/mach-qcom/scm.c create mode 100644 arch/arm/mach-qcom/scm.h diff --git a/MAINTAINERS b/MAINTAINERS index b2cf5cfb4d29..402be6009e26 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1167,6 +1167,14 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) W: http://www.arm.linux.org.uk/ S: Maintained +ARM/QUALCOMM SUPPORT +M: Kumar Gala +M: David Brown +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: arch/arm/mach-qcom/ +T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git + ARM/RADISYS ENP2611 MACHINE SUPPORT M: Lennert Buytenhek L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e25419817791..f093f2030c1c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -657,9 +657,8 @@ config ARCH_PXA help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. -config ARCH_MSM_NODT - bool "Qualcomm MSM" - select ARCH_MSM +config ARCH_MSM + bool "Qualcomm MSM (non-multiplatform)" select ARCH_REQUIRE_GPIOLIB select COMMON_CLK select GENERIC_CLOCKEVENTS @@ -1005,6 +1004,8 @@ source "arch/arm/plat-pxa/Kconfig" source "arch/arm/mach-mmp/Kconfig" +source "arch/arm/mach-qcom/Kconfig" + source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-rockchip/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8e5216..4491c7b05275 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -956,7 +956,7 @@ config DEBUG_STI_UART config DEBUG_MSM_UART bool - depends on ARCH_MSM + depends on ARCH_MSM || ARCH_QCOM config DEBUG_LL_INCLUDE string diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 08a9ef58d9c3..51e5bede657f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell machine-$(CONFIG_ARCH_PXA) += pxa +machine-$(CONFIG_ARCH_QCOM) += qcom machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b9d6a8b485e0..c9eaf1f87041 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -118,9 +118,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \ kirkwood-ts219-6282.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb -dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \ - qcom-msm8960-cdp.dtb \ - qcom-apq8074-dragonboard.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ armada-370-mirabox.dtb \ armada-370-netgear-rn102.dtb \ @@ -232,6 +229,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ dra7-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \ + qcom-msm8960-cdp.dtb \ + qcom-apq8074-dragonboard.dtb dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ ste-hrefprev60-stuib.dtb \ ste-hrefprev60-tvk.dtb \ diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 3c4eca71f976..a7f959e58c3d 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -1,50 +1,9 @@ -config ARCH_MSM - bool - -config ARCH_MSM_DT - bool "Qualcomm MSM DT Support" if ARCH_MULTI_V7 - select ARCH_MSM - select ARCH_REQUIRE_GPIOLIB - select CLKSRC_OF - select GENERIC_CLOCKEVENTS - help - Support for Qualcomm's devicetree based MSM systems. - if ARCH_MSM -menu "Qualcomm MSM SoC Selection" - depends on ARCH_MSM_DT - -config ARCH_MSM8X60 - bool "Enable support for MSM8X60" - select ARM_GIC - select CPU_V7 - select HAVE_SMP - select MSM_SCM if SMP - select CLKSRC_QCOM - -config ARCH_MSM8960 - bool "Enable support for MSM8960" - select ARM_GIC - select CPU_V7 - select HAVE_SMP - select MSM_SCM if SMP - select CLKSRC_QCOM - -config ARCH_MSM8974 - bool "Enable support for MSM8974" - select ARM_GIC - select CPU_V7 - select HAVE_ARM_ARCH_TIMER - select HAVE_SMP - select MSM_SCM if SMP - -endmenu - choice prompt "Qualcomm MSM SoC Type" default ARCH_MSM7X00A - depends on ARCH_MSM_NODT + depends on ARCH_MSM config ARCH_MSM7X00A bool "MSM7x00A / MSM7x01A" @@ -99,7 +58,7 @@ config MSM_VIC bool menu "Qualcomm MSM Board Type" - depends on ARCH_MSM_NODT + depends on ARCH_MSM config MACH_HALIBUT depends on ARCH_MSM diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 04b1bee941f5..27c078a568df 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -13,17 +13,11 @@ obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o obj-$(CONFIG_MSM_SMD) += last_radio_log.o -obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o - -CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) - -obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o -obj-$(CONFIG_ARCH_MSM_DT) += board-dt.o obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c deleted file mode 100644 index 1f11d93e700e..000000000000 --- a/arch/arm/mach-msm/board-dt.c +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright (c) 2010-2012,2013 The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -#include -#include - -#include "common.h" - -static const char * const msm_dt_match[] __initconst = { - "qcom,msm8660-fluid", - "qcom,msm8660-surf", - "qcom,msm8960-cdp", - NULL -}; - -static const char * const apq8074_dt_match[] __initconst = { - "qcom,apq8074-dragonboard", - NULL -}; - -DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") - .smp = smp_ops(msm_smp_ops), - .dt_compat = msm_dt_match, -MACHINE_END - -DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)") - .dt_compat = apq8074_dt_match, -MACHINE_END diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c deleted file mode 100644 index 251a91eb102a..000000000000 --- a/arch/arm/mach-msm/platsmp.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "scm-boot.h" -#include "common.h" - -#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 -#define SCSS_CPU1CORE_RESET 0xD80 -#define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 - -extern void secondary_startup(void); - -static DEFINE_SPINLOCK(boot_lock); - -#ifdef CONFIG_HOTPLUG_CPU -static void __ref msm_cpu_die(unsigned int cpu) -{ - wfi(); -} -#endif - -static inline int get_core_count(void) -{ - /* 1 + the PART[1:0] field of MIDR */ - return ((read_cpuid_id() >> 4) & 3) + 1; -} - -static void msm_secondary_init(unsigned int cpu) -{ - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); -} - -static void prepare_cold_cpu(unsigned int cpu) -{ - int ret; - ret = scm_set_boot_addr(virt_to_phys(secondary_startup), - SCM_FLAG_COLDBOOT_CPU1); - if (ret == 0) { - void __iomem *sc1_base_ptr; - sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); - if (sc1_base_ptr) { - writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); - writel(0, sc1_base_ptr + SCSS_CPU1CORE_RESET); - writel(3, sc1_base_ptr + SCSS_DBG_STATUS_CORE_PWRDUP); - iounmap(sc1_base_ptr); - } - } else - printk(KERN_DEBUG "Failed to set secondary core boot " - "address\n"); -} - -static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) -{ - static int cold_boot_done; - - /* Only need to bring cpu out of reset this way once */ - if (cold_boot_done == false) { - prepare_cold_cpu(cpu); - cold_boot_done = true; - } - - /* - * set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - - return 0; -} - -/* - * Initialise the CPU possible map early - this describes the CPUs - * which may be present or become present in the system. The msm8x60 - * does not support the ARM SCU, so just set the possible cpu mask to - * NR_CPUS. - */ -static void __init msm_smp_init_cpus(void) -{ - unsigned int i, ncores = get_core_count(); - - if (ncores > nr_cpu_ids) { - pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", - ncores, nr_cpu_ids); - ncores = nr_cpu_ids; - } - - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); -} - -static void __init msm_smp_prepare_cpus(unsigned int max_cpus) -{ -} - -struct smp_operations msm_smp_ops __initdata = { - .smp_init_cpus = msm_smp_init_cpus, - .smp_prepare_cpus = msm_smp_prepare_cpus, - .smp_secondary_init = msm_secondary_init, - .smp_boot_secondary = msm_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_die = msm_cpu_die, -#endif -}; diff --git a/arch/arm/mach-msm/scm-boot.c b/arch/arm/mach-msm/scm-boot.c deleted file mode 100644 index 45cee3e469a5..000000000000 --- a/arch/arm/mach-msm/scm-boot.c +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include - -#include "scm.h" -#include "scm-boot.h" - -/* - * Set the cold/warm boot address for one of the CPU cores. - */ -int scm_set_boot_addr(phys_addr_t addr, int flags) -{ - struct { - unsigned int flags; - phys_addr_t addr; - } cmd; - - cmd.addr = addr; - cmd.flags = flags; - return scm_call(SCM_SVC_BOOT, SCM_BOOT_ADDR, - &cmd, sizeof(cmd), NULL, 0); -} -EXPORT_SYMBOL(scm_set_boot_addr); diff --git a/arch/arm/mach-msm/scm-boot.h b/arch/arm/mach-msm/scm-boot.h deleted file mode 100644 index 7be32ff5d687..000000000000 --- a/arch/arm/mach-msm/scm-boot.h +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_SCM_BOOT_H -#define __MACH_SCM_BOOT_H - -#define SCM_BOOT_ADDR 0x1 -#define SCM_FLAG_COLDBOOT_CPU1 0x1 -#define SCM_FLAG_WARMBOOT_CPU1 0x2 -#define SCM_FLAG_WARMBOOT_CPU0 0x4 - -int scm_set_boot_addr(phys_addr_t addr, int flags); - -#endif diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c deleted file mode 100644 index c536fd6bf827..000000000000 --- a/arch/arm/mach-msm/scm.c +++ /dev/null @@ -1,299 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include "scm.h" - -/* Cache line size for msm8x60 */ -#define CACHELINESIZE 32 - -#define SCM_ENOMEM -5 -#define SCM_EOPNOTSUPP -4 -#define SCM_EINVAL_ADDR -3 -#define SCM_EINVAL_ARG -2 -#define SCM_ERROR -1 -#define SCM_INTERRUPTED 1 - -static DEFINE_MUTEX(scm_lock); - -/** - * struct scm_command - one SCM command buffer - * @len: total available memory for command and response - * @buf_offset: start of command buffer - * @resp_hdr_offset: start of response buffer - * @id: command to be executed - * @buf: buffer returned from scm_get_command_buffer() - * - * An SCM command is laid out in memory as follows: - * - * ------------------- <--- struct scm_command - * | command header | - * ------------------- <--- scm_get_command_buffer() - * | command buffer | - * ------------------- <--- struct scm_response and - * | response header | scm_command_to_response() - * ------------------- <--- scm_get_response_buffer() - * | response buffer | - * ------------------- - * - * There can be arbitrary padding between the headers and buffers so - * you should always use the appropriate scm_get_*_buffer() routines - * to access the buffers in a safe manner. - */ -struct scm_command { - u32 len; - u32 buf_offset; - u32 resp_hdr_offset; - u32 id; - u32 buf[0]; -}; - -/** - * struct scm_response - one SCM response buffer - * @len: total available memory for response - * @buf_offset: start of response data relative to start of scm_response - * @is_complete: indicates if the command has finished processing - */ -struct scm_response { - u32 len; - u32 buf_offset; - u32 is_complete; -}; - -/** - * alloc_scm_command() - Allocate an SCM command - * @cmd_size: size of the command buffer - * @resp_size: size of the response buffer - * - * Allocate an SCM command, including enough room for the command - * and response headers as well as the command and response buffers. - * - * Returns a valid &scm_command on success or %NULL if the allocation fails. - */ -static struct scm_command *alloc_scm_command(size_t cmd_size, size_t resp_size) -{ - struct scm_command *cmd; - size_t len = sizeof(*cmd) + sizeof(struct scm_response) + cmd_size + - resp_size; - - cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL); - if (cmd) { - cmd->len = len; - cmd->buf_offset = offsetof(struct scm_command, buf); - cmd->resp_hdr_offset = cmd->buf_offset + cmd_size; - } - return cmd; -} - -/** - * free_scm_command() - Free an SCM command - * @cmd: command to free - * - * Free an SCM command. - */ -static inline void free_scm_command(struct scm_command *cmd) -{ - kfree(cmd); -} - -/** - * scm_command_to_response() - Get a pointer to a scm_response - * @cmd: command - * - * Returns a pointer to a response for a command. - */ -static inline struct scm_response *scm_command_to_response( - const struct scm_command *cmd) -{ - return (void *)cmd + cmd->resp_hdr_offset; -} - -/** - * scm_get_command_buffer() - Get a pointer to a command buffer - * @cmd: command - * - * Returns a pointer to the command buffer of a command. - */ -static inline void *scm_get_command_buffer(const struct scm_command *cmd) -{ - return (void *)cmd->buf; -} - -/** - * scm_get_response_buffer() - Get a pointer to a response buffer - * @rsp: response - * - * Returns a pointer to a response buffer of a response. - */ -static inline void *scm_get_response_buffer(const struct scm_response *rsp) -{ - return (void *)rsp + rsp->buf_offset; -} - -static int scm_remap_error(int err) -{ - switch (err) { - case SCM_ERROR: - return -EIO; - case SCM_EINVAL_ADDR: - case SCM_EINVAL_ARG: - return -EINVAL; - case SCM_EOPNOTSUPP: - return -EOPNOTSUPP; - case SCM_ENOMEM: - return -ENOMEM; - } - return -EINVAL; -} - -static u32 smc(u32 cmd_addr) -{ - int context_id; - register u32 r0 asm("r0") = 1; - register u32 r1 asm("r1") = (u32)&context_id; - register u32 r2 asm("r2") = cmd_addr; - do { - asm volatile( - __asmeq("%0", "r0") - __asmeq("%1", "r0") - __asmeq("%2", "r1") - __asmeq("%3", "r2") -#ifdef REQUIRES_SEC - ".arch_extension sec\n" -#endif - "smc #0 @ switch to secure world\n" - : "=r" (r0) - : "r" (r0), "r" (r1), "r" (r2) - : "r3"); - } while (r0 == SCM_INTERRUPTED); - - return r0; -} - -static int __scm_call(const struct scm_command *cmd) -{ - int ret; - u32 cmd_addr = virt_to_phys(cmd); - - /* - * Flush the entire cache here so callers don't have to remember - * to flush the cache when passing physical addresses to the secure - * side in the buffer. - */ - flush_cache_all(); - ret = smc(cmd_addr); - if (ret < 0) - ret = scm_remap_error(ret); - - return ret; -} - -/** - * scm_call() - Send an SCM command - * @svc_id: service identifier - * @cmd_id: command identifier - * @cmd_buf: command buffer - * @cmd_len: length of the command buffer - * @resp_buf: response buffer - * @resp_len: length of the response buffer - * - * Sends a command to the SCM and waits for the command to finish processing. - */ -int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len, - void *resp_buf, size_t resp_len) -{ - int ret; - struct scm_command *cmd; - struct scm_response *rsp; - - cmd = alloc_scm_command(cmd_len, resp_len); - if (!cmd) - return -ENOMEM; - - cmd->id = (svc_id << 10) | cmd_id; - if (cmd_buf) - memcpy(scm_get_command_buffer(cmd), cmd_buf, cmd_len); - - mutex_lock(&scm_lock); - ret = __scm_call(cmd); - mutex_unlock(&scm_lock); - if (ret) - goto out; - - rsp = scm_command_to_response(cmd); - do { - u32 start = (u32)rsp; - u32 end = (u32)scm_get_response_buffer(rsp) + resp_len; - start &= ~(CACHELINESIZE - 1); - while (start < end) { - asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start) - : "memory"); - start += CACHELINESIZE; - } - } while (!rsp->is_complete); - - if (resp_buf) - memcpy(resp_buf, scm_get_response_buffer(rsp), resp_len); -out: - free_scm_command(cmd); - return ret; -} -EXPORT_SYMBOL(scm_call); - -u32 scm_get_version(void) -{ - int context_id; - static u32 version = -1; - register u32 r0 asm("r0"); - register u32 r1 asm("r1"); - - if (version != -1) - return version; - - mutex_lock(&scm_lock); - - r0 = 0x1 << 8; - r1 = (u32)&context_id; - do { - asm volatile( - __asmeq("%0", "r0") - __asmeq("%1", "r1") - __asmeq("%2", "r0") - __asmeq("%3", "r1") -#ifdef REQUIRES_SEC - ".arch_extension sec\n" -#endif - "smc #0 @ switch to secure world\n" - : "=r" (r0), "=r" (r1) - : "r" (r0), "r" (r1) - : "r2", "r3"); - } while (r0 == SCM_INTERRUPTED); - - version = r1; - mutex_unlock(&scm_lock); - - return version; -} -EXPORT_SYMBOL(scm_get_version); diff --git a/arch/arm/mach-msm/scm.h b/arch/arm/mach-msm/scm.h deleted file mode 100644 index 00b31ea58f29..000000000000 --- a/arch/arm/mach-msm/scm.h +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_SCM_H -#define __MACH_SCM_H - -#define SCM_SVC_BOOT 0x1 -#define SCM_SVC_PIL 0x2 - -extern int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len, - void *resp_buf, size_t resp_len); - -#define SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) - -extern u32 scm_get_version(void); - -#endif diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig new file mode 100644 index 000000000000..a028be234334 --- /dev/null +++ b/arch/arm/mach-qcom/Kconfig @@ -0,0 +1,33 @@ +config ARCH_QCOM + bool "Qualcomm Support" if ARCH_MULTI_V7 + select ARCH_REQUIRE_GPIOLIB + select ARM_GIC + select CLKSRC_OF + select GENERIC_CLOCKEVENTS + select HAVE_SMP + select QCOM_SCM if SMP + help + Support for Qualcomm's devicetree based systems. + +if ARCH_QCOM + +menu "Qualcomm SoC Selection" + +config ARCH_MSM8X60 + bool "Enable support for MSM8X60" + select CLKSRC_QCOM + +config ARCH_MSM8960 + bool "Enable support for MSM8960" + select CLKSRC_QCOM + +config ARCH_MSM8974 + bool "Enable support for MSM8974" + select HAVE_ARM_ARCH_TIMER + +endmenu + +config QCOM_SCM + bool + +endif diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile new file mode 100644 index 000000000000..8f756ae1ae31 --- /dev/null +++ b/arch/arm/mach-qcom/Makefile @@ -0,0 +1,5 @@ +obj-y := board.o +obj-$(CONFIG_SMP) += platsmp.o +obj-$(CONFIG_QCOM_SCM) += scm.o scm-boot.o + +CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c new file mode 100644 index 000000000000..4529f6b222d3 --- /dev/null +++ b/arch/arm/mach-qcom/board.c @@ -0,0 +1,40 @@ +/* Copyright (c) 2010-2014 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include +#include + +extern struct smp_operations msm_smp_ops; + +static const char * const qcom_dt_match[] __initconst = { + "qcom,msm8660-surf", + "qcom,msm8960-cdp", + NULL +}; + +static const char * const apq8074_dt_match[] __initconst = { + "qcom,apq8074-dragonboard", + NULL +}; + +DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") + .smp = smp_ops(msm_smp_ops), + .dt_compat = qcom_dt_match, +MACHINE_END + +DT_MACHINE_START(APQ_DT, "Qualcomm (Flattened Device Tree)") + .dt_compat = apq8074_dt_match, +MACHINE_END diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c new file mode 100644 index 000000000000..67823a7bec0d --- /dev/null +++ b/arch/arm/mach-qcom/platsmp.c @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * Copyright (c) 2014 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "scm-boot.h" + +#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 +#define SCSS_CPU1CORE_RESET 0xD80 +#define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 + +extern void secondary_startup(void); + +static DEFINE_SPINLOCK(boot_lock); + +#ifdef CONFIG_HOTPLUG_CPU +static void __ref msm_cpu_die(unsigned int cpu) +{ + wfi(); +} +#endif + +static inline int get_core_count(void) +{ + /* 1 + the PART[1:0] field of MIDR */ + return ((read_cpuid_id() >> 4) & 3) + 1; +} + +static void msm_secondary_init(unsigned int cpu) +{ + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +static void prepare_cold_cpu(unsigned int cpu) +{ + int ret; + ret = scm_set_boot_addr(virt_to_phys(secondary_startup), + SCM_FLAG_COLDBOOT_CPU1); + if (ret == 0) { + void __iomem *sc1_base_ptr; + sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); + if (sc1_base_ptr) { + writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); + writel(0, sc1_base_ptr + SCSS_CPU1CORE_RESET); + writel(3, sc1_base_ptr + SCSS_DBG_STATUS_CORE_PWRDUP); + iounmap(sc1_base_ptr); + } + } else + printk(KERN_DEBUG "Failed to set secondary core boot " + "address\n"); +} + +static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + static int cold_boot_done; + + /* Only need to bring cpu out of reset this way once */ + if (cold_boot_done == false) { + prepare_cold_cpu(cpu); + cold_boot_done = true; + } + + /* + * set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * Send the secondary CPU a soft interrupt, thereby causing + * the boot monitor to read the system wide flags register, + * and branch to the address found there. + */ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + /* + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return 0; +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. The msm8x60 + * does not support the ARM SCU, so just set the possible cpu mask to + * NR_CPUS. + */ +static void __init msm_smp_init_cpus(void) +{ + unsigned int i, ncores = get_core_count(); + + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + + for (i = 0; i < ncores; i++) + set_cpu_possible(i, true); +} + +static void __init msm_smp_prepare_cpus(unsigned int max_cpus) +{ +} + +struct smp_operations msm_smp_ops __initdata = { + .smp_init_cpus = msm_smp_init_cpus, + .smp_prepare_cpus = msm_smp_prepare_cpus, + .smp_secondary_init = msm_secondary_init, + .smp_boot_secondary = msm_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = msm_cpu_die, +#endif +}; diff --git a/arch/arm/mach-qcom/scm-boot.c b/arch/arm/mach-qcom/scm-boot.c new file mode 100644 index 000000000000..45cee3e469a5 --- /dev/null +++ b/arch/arm/mach-qcom/scm-boot.c @@ -0,0 +1,39 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#include +#include + +#include "scm.h" +#include "scm-boot.h" + +/* + * Set the cold/warm boot address for one of the CPU cores. + */ +int scm_set_boot_addr(phys_addr_t addr, int flags) +{ + struct { + unsigned int flags; + phys_addr_t addr; + } cmd; + + cmd.addr = addr; + cmd.flags = flags; + return scm_call(SCM_SVC_BOOT, SCM_BOOT_ADDR, + &cmd, sizeof(cmd), NULL, 0); +} +EXPORT_SYMBOL(scm_set_boot_addr); diff --git a/arch/arm/mach-qcom/scm-boot.h b/arch/arm/mach-qcom/scm-boot.h new file mode 100644 index 000000000000..7be32ff5d687 --- /dev/null +++ b/arch/arm/mach-qcom/scm-boot.h @@ -0,0 +1,22 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __MACH_SCM_BOOT_H +#define __MACH_SCM_BOOT_H + +#define SCM_BOOT_ADDR 0x1 +#define SCM_FLAG_COLDBOOT_CPU1 0x1 +#define SCM_FLAG_WARMBOOT_CPU1 0x2 +#define SCM_FLAG_WARMBOOT_CPU0 0x4 + +int scm_set_boot_addr(phys_addr_t addr, int flags); + +#endif diff --git a/arch/arm/mach-qcom/scm.c b/arch/arm/mach-qcom/scm.c new file mode 100644 index 000000000000..c536fd6bf827 --- /dev/null +++ b/arch/arm/mach-qcom/scm.c @@ -0,0 +1,299 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include "scm.h" + +/* Cache line size for msm8x60 */ +#define CACHELINESIZE 32 + +#define SCM_ENOMEM -5 +#define SCM_EOPNOTSUPP -4 +#define SCM_EINVAL_ADDR -3 +#define SCM_EINVAL_ARG -2 +#define SCM_ERROR -1 +#define SCM_INTERRUPTED 1 + +static DEFINE_MUTEX(scm_lock); + +/** + * struct scm_command - one SCM command buffer + * @len: total available memory for command and response + * @buf_offset: start of command buffer + * @resp_hdr_offset: start of response buffer + * @id: command to be executed + * @buf: buffer returned from scm_get_command_buffer() + * + * An SCM command is laid out in memory as follows: + * + * ------------------- <--- struct scm_command + * | command header | + * ------------------- <--- scm_get_command_buffer() + * | command buffer | + * ------------------- <--- struct scm_response and + * | response header | scm_command_to_response() + * ------------------- <--- scm_get_response_buffer() + * | response buffer | + * ------------------- + * + * There can be arbitrary padding between the headers and buffers so + * you should always use the appropriate scm_get_*_buffer() routines + * to access the buffers in a safe manner. + */ +struct scm_command { + u32 len; + u32 buf_offset; + u32 resp_hdr_offset; + u32 id; + u32 buf[0]; +}; + +/** + * struct scm_response - one SCM response buffer + * @len: total available memory for response + * @buf_offset: start of response data relative to start of scm_response + * @is_complete: indicates if the command has finished processing + */ +struct scm_response { + u32 len; + u32 buf_offset; + u32 is_complete; +}; + +/** + * alloc_scm_command() - Allocate an SCM command + * @cmd_size: size of the command buffer + * @resp_size: size of the response buffer + * + * Allocate an SCM command, including enough room for the command + * and response headers as well as the command and response buffers. + * + * Returns a valid &scm_command on success or %NULL if the allocation fails. + */ +static struct scm_command *alloc_scm_command(size_t cmd_size, size_t resp_size) +{ + struct scm_command *cmd; + size_t len = sizeof(*cmd) + sizeof(struct scm_response) + cmd_size + + resp_size; + + cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL); + if (cmd) { + cmd->len = len; + cmd->buf_offset = offsetof(struct scm_command, buf); + cmd->resp_hdr_offset = cmd->buf_offset + cmd_size; + } + return cmd; +} + +/** + * free_scm_command() - Free an SCM command + * @cmd: command to free + * + * Free an SCM command. + */ +static inline void free_scm_command(struct scm_command *cmd) +{ + kfree(cmd); +} + +/** + * scm_command_to_response() - Get a pointer to a scm_response + * @cmd: command + * + * Returns a pointer to a response for a command. + */ +static inline struct scm_response *scm_command_to_response( + const struct scm_command *cmd) +{ + return (void *)cmd + cmd->resp_hdr_offset; +} + +/** + * scm_get_command_buffer() - Get a pointer to a command buffer + * @cmd: command + * + * Returns a pointer to the command buffer of a command. + */ +static inline void *scm_get_command_buffer(const struct scm_command *cmd) +{ + return (void *)cmd->buf; +} + +/** + * scm_get_response_buffer() - Get a pointer to a response buffer + * @rsp: response + * + * Returns a pointer to a response buffer of a response. + */ +static inline void *scm_get_response_buffer(const struct scm_response *rsp) +{ + return (void *)rsp + rsp->buf_offset; +} + +static int scm_remap_error(int err) +{ + switch (err) { + case SCM_ERROR: + return -EIO; + case SCM_EINVAL_ADDR: + case SCM_EINVAL_ARG: + return -EINVAL; + case SCM_EOPNOTSUPP: + return -EOPNOTSUPP; + case SCM_ENOMEM: + return -ENOMEM; + } + return -EINVAL; +} + +static u32 smc(u32 cmd_addr) +{ + int context_id; + register u32 r0 asm("r0") = 1; + register u32 r1 asm("r1") = (u32)&context_id; + register u32 r2 asm("r2") = cmd_addr; + do { + asm volatile( + __asmeq("%0", "r0") + __asmeq("%1", "r0") + __asmeq("%2", "r1") + __asmeq("%3", "r2") +#ifdef REQUIRES_SEC + ".arch_extension sec\n" +#endif + "smc #0 @ switch to secure world\n" + : "=r" (r0) + : "r" (r0), "r" (r1), "r" (r2) + : "r3"); + } while (r0 == SCM_INTERRUPTED); + + return r0; +} + +static int __scm_call(const struct scm_command *cmd) +{ + int ret; + u32 cmd_addr = virt_to_phys(cmd); + + /* + * Flush the entire cache here so callers don't have to remember + * to flush the cache when passing physical addresses to the secure + * side in the buffer. + */ + flush_cache_all(); + ret = smc(cmd_addr); + if (ret < 0) + ret = scm_remap_error(ret); + + return ret; +} + +/** + * scm_call() - Send an SCM command + * @svc_id: service identifier + * @cmd_id: command identifier + * @cmd_buf: command buffer + * @cmd_len: length of the command buffer + * @resp_buf: response buffer + * @resp_len: length of the response buffer + * + * Sends a command to the SCM and waits for the command to finish processing. + */ +int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len, + void *resp_buf, size_t resp_len) +{ + int ret; + struct scm_command *cmd; + struct scm_response *rsp; + + cmd = alloc_scm_command(cmd_len, resp_len); + if (!cmd) + return -ENOMEM; + + cmd->id = (svc_id << 10) | cmd_id; + if (cmd_buf) + memcpy(scm_get_command_buffer(cmd), cmd_buf, cmd_len); + + mutex_lock(&scm_lock); + ret = __scm_call(cmd); + mutex_unlock(&scm_lock); + if (ret) + goto out; + + rsp = scm_command_to_response(cmd); + do { + u32 start = (u32)rsp; + u32 end = (u32)scm_get_response_buffer(rsp) + resp_len; + start &= ~(CACHELINESIZE - 1); + while (start < end) { + asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start) + : "memory"); + start += CACHELINESIZE; + } + } while (!rsp->is_complete); + + if (resp_buf) + memcpy(resp_buf, scm_get_response_buffer(rsp), resp_len); +out: + free_scm_command(cmd); + return ret; +} +EXPORT_SYMBOL(scm_call); + +u32 scm_get_version(void) +{ + int context_id; + static u32 version = -1; + register u32 r0 asm("r0"); + register u32 r1 asm("r1"); + + if (version != -1) + return version; + + mutex_lock(&scm_lock); + + r0 = 0x1 << 8; + r1 = (u32)&context_id; + do { + asm volatile( + __asmeq("%0", "r0") + __asmeq("%1", "r1") + __asmeq("%2", "r0") + __asmeq("%3", "r1") +#ifdef REQUIRES_SEC + ".arch_extension sec\n" +#endif + "smc #0 @ switch to secure world\n" + : "=r" (r0), "=r" (r1) + : "r" (r0), "r" (r1) + : "r2", "r3"); + } while (r0 == SCM_INTERRUPTED); + + version = r1; + mutex_unlock(&scm_lock); + + return version; +} +EXPORT_SYMBOL(scm_get_version); diff --git a/arch/arm/mach-qcom/scm.h b/arch/arm/mach-qcom/scm.h new file mode 100644 index 000000000000..00b31ea58f29 --- /dev/null +++ b/arch/arm/mach-qcom/scm.h @@ -0,0 +1,25 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __MACH_SCM_H +#define __MACH_SCM_H + +#define SCM_SVC_BOOT 0x1 +#define SCM_SVC_PIL 0x2 + +extern int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len, + void *resp_buf, size_t resp_len); + +#define SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) + +extern u32 scm_get_version(void); + +#endif -- cgit v1.2.3 From 7d6d45f86969acd57850ab4d91ea002db08ff235 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 29 Jan 2014 17:01:37 -0600 Subject: clocksource: qcom: split building of legacy vs multiplatform support The majority of the clocksource code for the Qualcomm platform is shared between newer (multiplatform) and older platforms. However there is a bit of code that isn't, so only build it for the appropriate config. Acked-by: Olof Johansson Signed-off-by: Kumar Gala --- drivers/clocksource/qcom-timer.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index dca829ec859b..e807acf4c665 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c @@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs) return readl_relaxed(source_base + TIMER_COUNT_VAL); } -static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) -{ - /* - * Shift timer count down by a constant due to unreliable lower bits - * on some targets. - */ - return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; -} - static struct clocksource msm_clocksource = { .name = "dg_timer", .rating = 300, @@ -228,7 +219,7 @@ err: sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); } -#ifdef CONFIG_OF +#ifdef CONFIG_ARCH_QCOM static void __init msm_dt_timer_init(struct device_node *np) { u32 freq; @@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np) } CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); -#endif +#else static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, u32 sts) @@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, return 0; } +static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) +{ + /* + * Shift timer count down by a constant due to unreliable lower bits + * on some targets. + */ + return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; +} + void __init msm7x01_timer_init(void) { struct clocksource *cs = &msm_clocksource; @@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void) return; msm_timer_init(19200000 / 4, 32, 7, false); } +#endif -- cgit v1.2.3 From cf1e8f0cd665e2a9966d2bee4e11ecc0938ff166 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 4 Feb 2014 15:38:45 -0600 Subject: ARM: qcom: Rename various msm prefixed functions to qcom As mach-qcom will support a number of different Qualcomm SoC platforms we replace the msm prefix on function names with qcom to be a bit more generic. Signed-off-by: Kumar Gala --- arch/arm/mach-qcom/board.c | 4 ++-- arch/arm/mach-qcom/platsmp.c | 22 +++++++++++----------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c index 4529f6b222d3..830f69c3a3ce 100644 --- a/arch/arm/mach-qcom/board.c +++ b/arch/arm/mach-qcom/board.c @@ -17,7 +17,7 @@ #include #include -extern struct smp_operations msm_smp_ops; +extern struct smp_operations qcom_smp_ops; static const char * const qcom_dt_match[] __initconst = { "qcom,msm8660-surf", @@ -31,7 +31,7 @@ static const char * const apq8074_dt_match[] __initconst = { }; DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") - .smp = smp_ops(msm_smp_ops), + .smp = smp_ops(qcom_smp_ops), .dt_compat = qcom_dt_match, MACHINE_END diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c index 67823a7bec0d..9c53ea70550d 100644 --- a/arch/arm/mach-qcom/platsmp.c +++ b/arch/arm/mach-qcom/platsmp.c @@ -30,7 +30,7 @@ extern void secondary_startup(void); static DEFINE_SPINLOCK(boot_lock); #ifdef CONFIG_HOTPLUG_CPU -static void __ref msm_cpu_die(unsigned int cpu) +static void __ref qcom_cpu_die(unsigned int cpu) { wfi(); } @@ -42,7 +42,7 @@ static inline int get_core_count(void) return ((read_cpuid_id() >> 4) & 3) + 1; } -static void msm_secondary_init(unsigned int cpu) +static void qcom_secondary_init(unsigned int cpu) { /* * Synchronise with the boot thread. @@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned int cpu) "address\n"); } -static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) +static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle) { static int cold_boot_done; @@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) * does not support the ARM SCU, so just set the possible cpu mask to * NR_CPUS. */ -static void __init msm_smp_init_cpus(void) +static void __init qcom_smp_init_cpus(void) { unsigned int i, ncores = get_core_count(); @@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(void) set_cpu_possible(i, true); } -static void __init msm_smp_prepare_cpus(unsigned int max_cpus) +static void __init qcom_smp_prepare_cpus(unsigned int max_cpus) { } -struct smp_operations msm_smp_ops __initdata = { - .smp_init_cpus = msm_smp_init_cpus, - .smp_prepare_cpus = msm_smp_prepare_cpus, - .smp_secondary_init = msm_secondary_init, - .smp_boot_secondary = msm_boot_secondary, +struct smp_operations qcom_smp_ops __initdata = { + .smp_init_cpus = qcom_smp_init_cpus, + .smp_prepare_cpus = qcom_smp_prepare_cpus, + .smp_secondary_init = qcom_secondary_init, + .smp_boot_secondary = qcom_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU - .cpu_die = msm_cpu_die, + .cpu_die = qcom_cpu_die, #endif }; -- cgit v1.2.3 From a8cacc0a45f7d81e6ff1cfe92d38372c0718df9b Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Tue, 11 Feb 2014 10:24:02 -0600 Subject: ARM: mvebu: make use of of_find_matching_node_and_match Instead of the of_find_matching_node()/of_match_node() pair, which requires two iterations through the match table, make use of of_find_matching_node_and_match(), which only iterates through the table once. While we're here, mark the of_system_controller table const. Signed-off-by: Josh Cartwright Reviewed-by: Thomas Petazzoni Acked-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/system-controller.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index a7fb89a5b5d9..e6e300afe836 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -54,7 +54,7 @@ static const struct mvebu_system_controller orion_system_controller = { .system_soft_reset = 0x1, }; -static struct of_device_id of_system_controller_table[] = { +static const struct of_device_id of_system_controller_table[] = { { .compatible = "marvell,orion-system-controller", .data = (void *) &orion_system_controller, @@ -90,13 +90,12 @@ void mvebu_restart(enum reboot_mode mode, const char *cmd) static int __init mvebu_system_controller_init(void) { + const struct of_device_id *match; struct device_node *np; - np = of_find_matching_node(NULL, of_system_controller_table); + np = of_find_matching_node_and_match(NULL, of_system_controller_table, + &match); if (np) { - const struct of_device_id *match = - of_match_node(of_system_controller_table, np); - BUG_ON(!match); system_controller_base = of_iomap(np, 0); mvebu_sc = (struct mvebu_system_controller *)match->data; of_node_put(np); -- cgit v1.2.3 From 08bb3adfd3adeb4653095e7968b6a46cef940404 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 11 Feb 2014 18:07:11 +0100 Subject: ARM: mvebu: remove unneeded ->map_io field for Armada 370/XP The ->map_io() implementation of Armada 370/XP simply calls debug_ll_io_init(), which is exactly what the kernel does when ->map_io is NULL. Therefore, there is no need to have a specific ->map_io() implementation in Armada 370/XP. Signed-off-by: Thomas Petazzoni Acked-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/armada-370-xp.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index f6c9d1d85c14..161cf2f54220 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -31,11 +31,6 @@ #include "coherency.h" #include "mvebu-soc-id.h" -static void __init armada_370_xp_map_io(void) -{ - debug_ll_io_init(); -} - static void __init armada_370_xp_timer_and_clk_init(void) { of_clk_init(NULL); @@ -90,7 +85,6 @@ static const char * const armada_370_xp_dt_compat[] = { DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)") .smp = smp_ops(armada_xp_smp_ops), .init_machine = armada_370_xp_dt_init, - .map_io = armada_370_xp_map_io, .init_time = armada_370_xp_timer_and_clk_init, .restart = mvebu_restart, .dt_compat = armada_370_xp_dt_compat, -- cgit v1.2.3 From 4b687170846639eb8d79866e1c09462278c9784a Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Feb 2014 07:14:56 +0900 Subject: ARM: SAMSUNG: remove obsolete tick.h Commit 48cf83dc(ARM: samsung: remove unused tick.h) removed some occurences of tick.h. tick.h itself and s3c24xx_ostimer_pending was only used by the old timer driver and is not used anymore. Therefore remove the last 3 occurences. Signed-off-by: Heiko Stuebner Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/tick.h | 15 --------------- arch/arm/mach-s3c64xx/include/mach/tick.h | 31 ------------------------------- arch/arm/mach-s5pc100/include/mach/tick.h | 31 ------------------------------- 3 files changed, 77 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/tick.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/tick.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/tick.h diff --git a/arch/arm/mach-s3c24xx/include/mach/tick.h b/arch/arm/mach-s3c24xx/include/mach/tick.h deleted file mode 100644 index 544da41979db..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/tick.h +++ /dev/null @@ -1,15 +0,0 @@ -/* linux/arch/arm/mach-s3c2410/include/mach/tick.h - * - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C2410 - timer tick support - */ - -#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0)) - -static inline int s3c24xx_ostimer_pending(void) -{ - return __raw_readl(S3C2410_SRCPND) & SRCPND_TIMER4; -} diff --git a/arch/arm/mach-s3c64xx/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h deleted file mode 100644 index db9c1b1d56a4..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/tick.h +++ /dev/null @@ -1,31 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/tick.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C64XX - Timer tick support definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TICK_H -#define __ASM_ARCH_TICK_H __FILE__ - -#include - -/* note, the timer interrutps turn up in 2 places, the vic and then - * the timer block. We take the VIC as the base at the moment. - */ -static inline u32 s3c24xx_ostimer_pending(void) -{ - u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); - return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); -} - -#define TICK_MAX (0xffffffff) - -#endif /* __ASM_ARCH_6400_TICK_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h deleted file mode 100644 index 0af8e41230ed..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/tick.h +++ /dev/null @@ -1,31 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/tick.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min - * - * S3C64XX - Timer tick support definitions - * - * Based on mach-s3c6400/include/mach/tick.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TICK_H -#define __ASM_ARCH_TICK_H __FILE__ - -#include - -/* note, the timer interrutps turn up in 2 places, the vic and then - * the timer block. We take the VIC as the base at the moment. - */ -static inline u32 s3c24xx_ostimer_pending(void) -{ - u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); - return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); -} - -#define TICK_MAX (0xffffffff) - -#endif /* __ASM_ARCH_TICK_H */ -- cgit v1.2.3 From a31ccfd626cd93267066af477b0ccf93f9308401 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Feb 2014 07:17:53 +0900 Subject: ARM: SAMSUNG: remove unneeded s3c24xx_init_cpu() The function is nearly empty and samsung_cpu_rev is static so already 0 making the function obsolete, therefore remove it. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/common.c | 1 - arch/arm/plat-samsung/cpu.c | 7 ------- arch/arm/plat-samsung/include/plat/cpu.h | 1 - 3 files changed, 9 deletions(-) diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 4adaa4b43ffe..4aa76b0a50e2 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -240,7 +240,6 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) } else { samsung_cpu_id = s3c24xx_read_idcode_v4(); } - s3c24xx_init_cpu(); s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c index 46b426e8aff5..364963a0a344 100644 --- a/arch/arm/plat-samsung/cpu.c +++ b/arch/arm/plat-samsung/cpu.c @@ -28,13 +28,6 @@ unsigned int samsung_rev(void) } EXPORT_SYMBOL(samsung_rev); -void __init s3c24xx_init_cpu(void) -{ - /* nothing here yet */ - - samsung_cpu_rev = 0; -} - void __init s3c64xx_init_cpu(void) { samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118); diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 335beb341355..31164b34d4c4 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -199,7 +199,6 @@ extern void s5p_init_irq(u32 *vic, u32 num_vic); extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); -extern void s3c24xx_init_cpu(void); extern void s3c64xx_init_cpu(void); extern void s5p_init_cpu(void __iomem *cpuid_addr); -- cgit v1.2.3 From 3581e56fd33b87ef485140c246d0db6c43fe4c58 Mon Sep 17 00:00:00 2001 From: Pankaj Dubey Date: Fri, 14 Feb 2014 07:25:05 +0900 Subject: clocksource: exynos_mct: remove unwanted header file inclusion remove unwanted header file inclusion "asm/mach/time.h" from exynos_mct.c Signed-off-by: Pankaj Dubey Signed-off-by: Kukjin Kim --- drivers/clocksource/exynos_mct.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 48f76bc05da0..ed49b25fa552 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -25,8 +25,6 @@ #include #include -#include - #define EXYNOS4_MCTREG(x) (x) #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) #define EXYNOS4_MCT_G_CNT_U EXYNOS4_MCTREG(0x104) -- cgit v1.2.3 From a83784859ccde07ebdc3a7acfbb2f74cb6c75a80 Mon Sep 17 00:00:00 2001 From: Pankaj Dubey Date: Fri, 14 Feb 2014 07:27:40 +0900 Subject: irqchip: exynos-combiner: call handle_bad_irq directly This patch is inspired from following commit aec00956 (irqchip: gic: Call handle_bad_irq() directly) Also this will help in removing unwanted inclusion of header file "asm/mach/irq.h" Signed-off-by: Pankaj Dubey Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- drivers/irqchip/exynos-combiner.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c index 40e6440348ff..f8636a650cf6 100644 --- a/drivers/irqchip/exynos-combiner.c +++ b/drivers/irqchip/exynos-combiner.c @@ -17,7 +17,6 @@ #include #include #include -#include #include "irqchip.h" @@ -81,7 +80,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq); if (unlikely(!cascade_irq)) - do_bad_IRQ(irq, desc); + handle_bad_irq(irq, desc); else generic_handle_irq(cascade_irq); -- cgit v1.2.3 From 1b81c94376e9bffc5aef51e47ff7016fbce78d6e Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Fri, 14 Feb 2014 07:59:40 +0900 Subject: ARM: S3C24XX: get rid of unneeded selects Commit c67d0f29262b ("ARM: s3c24xx: get rid of custom ") got rid of the Kconfig symbols S3C24XX_GPIO_EXTRA64 and S3C24XX_GPIO_EXTRA128. It missed one select of both of these symbols, so get rid of those now. Signed-off-by: Paul Bolle Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index d876431d64c0..bb1fa6032179 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -521,7 +521,6 @@ config MACH_ANUBIS select HAVE_PATA_PLATFORM select S3C2440_XTAL_12000000 select S3C24XX_DCLK - select S3C24XX_GPIO_EXTRA64 select S3C24XX_SIMTEC_PM if PM select S3C_DEV_USB_HOST help @@ -562,7 +561,6 @@ config MACH_OSIRIS select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_12000000 select S3C24XX_DCLK - select S3C24XX_GPIO_EXTRA128 select S3C24XX_SIMTEC_PM if PM select S3C_DEV_NAND select S3C_DEV_USB_HOST -- cgit v1.2.3 From be670daf501e9176c4f378bb4351082f21cf396a Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 14 Feb 2014 10:30:39 +0900 Subject: ARM: SAMSUNG: Remove platform dependency from samsung.S regs-serial.h only includes linux/serial_s3c.h. Include this header directly in samsung.S to remove unnecessary platform dependency. Signed-off-by: Sachin Kamat Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/include/debug/samsung.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S index f3a9cff6d5d4..8d8d922e5e44 100644 --- a/arch/arm/include/debug/samsung.S +++ b/arch/arm/include/debug/samsung.S @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -#include +#include /* The S5PV210/S5PC110 implementations are as belows. */ -- cgit v1.2.3 From 334a1c70bb03d7077849e88d8571a32d1d36194d Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Fri, 14 Feb 2014 10:32:45 +0900 Subject: ARM: SAMSUNG: Replace inclusion of plat/regs-serial.h header file regs-serial.h only includes linux/serial_s3c.h. Include this header directly to remove unnecessary platform dependency. Signed-off-by: Tushar Behera [broonie@linaro.org: Acked for S3C64XX related changes] Acked-by: Mark Brown Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 2 +- arch/arm/mach-s3c24xx/clock-s3c2410.c | 3 +-- arch/arm/mach-s3c24xx/clock-s3c2412.c | 3 +-- arch/arm/mach-s3c24xx/clock-s3c2440.c | 2 +- arch/arm/mach-s3c24xx/common.c | 2 +- arch/arm/mach-s3c24xx/dma-s3c2410.c | 2 +- arch/arm/mach-s3c24xx/dma-s3c2412.c | 2 +- arch/arm/mach-s3c24xx/dma-s3c2440.c | 2 +- arch/arm/mach-s3c24xx/dma-s3c2443.c | 2 +- arch/arm/mach-s3c24xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-s3c24xx/mach-amlm5900.c | 2 +- arch/arm/mach-s3c24xx/mach-anubis.c | 2 +- arch/arm/mach-s3c24xx/mach-at2440evb.c | 2 +- arch/arm/mach-s3c24xx/mach-bast.c | 2 +- arch/arm/mach-s3c24xx/mach-gta02.c | 2 +- arch/arm/mach-s3c24xx/mach-h1940.c | 2 +- arch/arm/mach-s3c24xx/mach-jive.c | 2 +- arch/arm/mach-s3c24xx/mach-mini2440.c | 2 +- arch/arm/mach-s3c24xx/mach-n30.c | 2 +- arch/arm/mach-s3c24xx/mach-nexcoder.c | 2 +- arch/arm/mach-s3c24xx/mach-osiris.c | 2 +- arch/arm/mach-s3c24xx/mach-otom.c | 2 +- arch/arm/mach-s3c24xx/mach-qt2410.c | 2 +- arch/arm/mach-s3c24xx/mach-rx1950.c | 2 +- arch/arm/mach-s3c24xx/mach-rx3715.c | 2 +- arch/arm/mach-s3c24xx/mach-s3c2416-dt.c | 2 +- arch/arm/mach-s3c24xx/mach-smdk2410.c | 2 +- arch/arm/mach-s3c24xx/mach-smdk2413.c | 2 +- arch/arm/mach-s3c24xx/mach-smdk2416.c | 2 +- arch/arm/mach-s3c24xx/mach-smdk2440.c | 2 +- arch/arm/mach-s3c24xx/mach-smdk2443.c | 2 +- arch/arm/mach-s3c24xx/mach-tct_hammer.c | 2 +- arch/arm/mach-s3c24xx/mach-vr1000.c | 2 +- arch/arm/mach-s3c24xx/mach-vstms.c | 2 +- arch/arm/mach-s3c24xx/pm.c | 2 +- arch/arm/mach-s3c24xx/s3c2410.c | 2 +- arch/arm/mach-s3c24xx/s3c2412.c | 2 +- arch/arm/mach-s3c24xx/s3c244x.c | 2 +- arch/arm/mach-s3c24xx/sleep-s3c2410.S | 2 +- arch/arm/mach-s3c24xx/sleep.S | 2 +- arch/arm/mach-s3c64xx/common.c | 2 +- arch/arm/mach-s3c64xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-s3c64xx/irq-pm.c | 2 +- arch/arm/mach-s3c64xx/mach-anw6410.c | 2 +- arch/arm/mach-s3c64xx/mach-crag6410.c | 2 +- arch/arm/mach-s3c64xx/mach-hmt.c | 2 +- arch/arm/mach-s3c64xx/mach-mini6410.c | 2 +- arch/arm/mach-s3c64xx/mach-ncp.c | 2 +- arch/arm/mach-s3c64xx/mach-real6410.c | 2 +- arch/arm/mach-s3c64xx/mach-smartq.c | 2 +- arch/arm/mach-s3c64xx/mach-smdk6400.c | 3 +-- arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +- arch/arm/mach-s3c64xx/s3c6400.c | 2 +- arch/arm/mach-s3c64xx/s3c6410.c | 2 +- arch/arm/mach-s5p64x0/common.c | 2 +- arch/arm/mach-s5p64x0/include/mach/debug-macro.S | 3 +-- arch/arm/mach-s5p64x0/irq-pm.c | 2 +- arch/arm/mach-s5p64x0/mach-smdk6440.c | 2 +- arch/arm/mach-s5p64x0/mach-smdk6450.c | 2 +- arch/arm/mach-s5pc100/common.c | 2 +- arch/arm/mach-s5pc100/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pc100/mach-smdkc100.c | 2 +- arch/arm/mach-s5pv210/common.c | 2 +- arch/arm/mach-s5pv210/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pv210/mach-aquila.c | 2 +- arch/arm/mach-s5pv210/mach-goni.c | 2 +- arch/arm/mach-s5pv210/mach-smdkc110.c | 2 +- arch/arm/mach-s5pv210/mach-smdkv210.c | 2 +- arch/arm/mach-s5pv210/mach-torbreck.c | 2 +- arch/arm/plat-samsung/clock.c | 2 +- arch/arm/plat-samsung/devs.c | 2 +- arch/arm/plat-samsung/include/plat/uncompress.h | 2 +- arch/arm/plat-samsung/init.c | 3 +-- arch/arm/plat-samsung/pm.c | 3 +-- 74 files changed, 74 insertions(+), 80 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f18be40e5b21..025fd8215ca3 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -40,7 +41,6 @@ #include #include -#include #include "common.h" #include "regs-pmu.h" diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c index d39d3c787580..d1afcf9252d1 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2410.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c @@ -30,13 +30,12 @@ #include #include #include +#include #include #include #include - -#include #include #include diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c index 11b3b28457bb..192a5b2550b0 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2412.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c @@ -31,13 +31,12 @@ #include #include #include +#include #include #include #include - -#include #include #include diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index aaf006d1d6dc..5527226fd61f 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -43,7 +44,6 @@ #include #include -#include /* S3C2440 extended clock support */ diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 4aa76b0a50e2..64b6eda380a4 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -44,7 +45,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/dma-s3c2410.c b/arch/arm/mach-s3c24xx/dma-s3c2410.c index 30aa53ff07a6..09aa12da1789 100644 --- a/arch/arm/mach-s3c24xx/dma-s3c2410.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2410.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -23,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c index b7e094671522..0c0106d1a4d1 100644 --- a/arch/arm/mach-s3c24xx/dma-s3c2412.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -23,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/dma-s3c2440.c b/arch/arm/mach-s3c24xx/dma-s3c2440.c index cd25de28804c..2f8e8a3017df 100644 --- a/arch/arm/mach-s3c24xx/dma-s3c2440.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2440.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -23,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c index 95b9f759fe97..f4096ec0700a 100644 --- a/arch/arm/mach-s3c24xx/dma-s3c2443.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2443.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -23,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S index 2558952e3147..2f39737544c0 100644 --- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include #include -#include +#include #define S3C2410_UART1_OFF (0x4000) #define SHIFT_2440TXF (14-9) diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c index 284ea1f44205..8ac9554aa996 100644 --- a/arch/arm/mach-s3c24xx/mach-amlm5900.c +++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -49,7 +50,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c index 2a16f8fb3584..81a270af2336 100644 --- a/arch/arm/mach-s3c24xx/mach-anubis.c +++ b/arch/arm/mach-s3c24xx/mach-anubis.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -32,7 +33,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c index 6beab674c147..d8f6bb1096cb 100644 --- a/arch/arm/mach-s3c24xx/mach-at2440evb.c +++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -33,7 +34,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c index 981ba1eb9fdc..e371ff53a408 100644 --- a/arch/arm/mach-s3c24xx/mach-bast.c +++ b/arch/arm/mach-s3c24xx/mach-bast.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -55,7 +56,6 @@ #include #include #include -#include #include #include "bast.h" diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index d9170e9f8ccd..8e0581317f17 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include @@ -81,7 +82,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index de0832181d8c..e453acd92cbf 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -62,7 +63,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c index 67cb8e948b7e..5faa7239e7d6 100644 --- a/arch/arm/mach-s3c24xx/mach-jive.c +++ b/arch/arm/mach-s3c24xx/mach-jive.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -31,7 +32,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index 1f1559713d8b..9e57fd9f4f3b 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -37,7 +38,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c index 997684f17930..4cccaad34847 100644 --- a/arch/arm/mach-s3c24xx/mach-n30.c +++ b/arch/arm/mach-s3c24xx/mach-n30.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -43,7 +44,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c index 575d28c9e6c6..3066851f584d 100644 --- a/arch/arm/mach-s3c24xx/mach-nexcoder.c +++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -38,7 +39,6 @@ //#include #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c index f84f2a4c0c6d..a4ae4bb3666d 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris.c +++ b/arch/arm/mach-s3c24xx/mach-osiris.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -44,7 +45,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c index 7e16b0740ec1..bdb3faac2d9b 100644 --- a/arch/arm/mach-s3c24xx/mach-otom.c +++ b/arch/arm/mach-s3c24xx/mach-otom.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -32,7 +33,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c index b534b76812e3..8c12787a8fd3 100644 --- a/arch/arm/mach-s3c24xx/mach-qt2410.c +++ b/arch/arm/mach-s3c24xx/mach-qt2410.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -49,7 +50,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 0a5456cda1bc..afb784e934c8 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -57,7 +58,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c index b36edce8b2b8..e6535ce1bc5c 100644 --- a/arch/arm/mach-s3c24xx/mach-rx3715.c +++ b/arch/arm/mach-s3c24xx/mach-rx3715.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -49,7 +50,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c index f50454a34f72..70f0900d4bca 100644 --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c @@ -19,13 +19,13 @@ #include #include #include +#include #include #include #include #include -#include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c index a773789e4f38..f32924ee0e9f 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2410.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -46,7 +47,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c index f5bc721217e3..233fe52d2015 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -33,7 +34,6 @@ #include //#include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c index 12023cae4378..b3b54d8e1410 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -34,7 +35,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c index de2e5d39a847..d071dcfea548 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2440.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -31,7 +32,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c index d9933fcc6cc8..06c4d77de3a5 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2443.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -31,7 +32,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c index 7fad8f055cab..4108b2f0cede 100644 --- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c +++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -44,7 +45,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index 755df489a45f..1cc5b1bd51cd 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -45,7 +46,6 @@ #include #include #include -#include #include #include "bast.h" diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c index f7ec9c550787..40868c0e0a68 100644 --- a/arch/arm/mach-s3c24xx/mach-vstms.c +++ b/arch/arm/mach-s3c24xx/mach-vstms.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -32,7 +33,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c index 052ca23393a7..68ea5b7e5dc7 100644 --- a/arch/arm/mach-s3c24xx/pm.c +++ b/arch/arm/mach-s3c24xx/pm.c @@ -33,9 +33,9 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index ffb92cbca08c..04b58cb49888 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -37,7 +38,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index 0251650cbf80..657cbaca80ac 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -43,7 +44,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index 911b555029fc..fe30ebb234d2 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -35,7 +36,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2410.S b/arch/arm/mach-s3c24xx/sleep-s3c2410.S index dd47c8fa07fa..c9b91223697c 100644 --- a/arch/arm/mach-s3c24xx/sleep-s3c2410.S +++ b/arch/arm/mach-s3c24xx/sleep-s3c2410.S @@ -25,13 +25,13 @@ */ #include +#include #include #include #include #include #include -#include #include "regs-mem.h" diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S index 7f378b662da6..d833d616bd2e 100644 --- a/arch/arm/mach-s3c24xx/sleep.S +++ b/arch/arm/mach-s3c24xx/sleep.S @@ -25,13 +25,13 @@ */ #include +#include #include #include #include #include #include -#include /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not * reset the UART configuration, only enable if you really need this! diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index 76ab595d849b..5c45aae675b6 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -50,7 +51,6 @@ #include #include #include -#include #include #include "common.h" diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index dd9ccca5de1f..c9b95325b672 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S @@ -12,8 +12,8 @@ /* pull in the relevant register and map files. */ +#include #include -#include /* note, for the boot process to work we have to keep the UART * virtual address aligned to an 1MiB boundary for the L1 diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c index 1649c0d1c1b8..a61247bb6e7a 100644 --- a/arch/arm/mach-s3c64xx/irq-pm.c +++ b/arch/arm/mach-s3c64xx/irq-pm.c @@ -20,13 +20,13 @@ #include #include #include +#include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index ddeb0e51a962..55eb6a69655b 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -41,7 +42,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 3df3c372ee1f..4b0199fff9f5 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -51,7 +52,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 0431016925b9..72cee08c8bf5 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -33,7 +34,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 8d553a418e1c..9cbc07602ef3 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -38,7 +39,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 2067b0bf55b4..67f06a9ae656 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -36,7 +37,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 5152026f0e19..fbad2af1ef16 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -38,7 +39,6 @@ #include #include #include -#include #include #include