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path: root/drivers/pci/endpoint
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2020-04-02PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table addressKishon Vijay Abraham I1-0/+2
commit beb4641a787d ("PCI: dwc: Add MSI-X callbacks handler"), in order to raise MSI-X interrupt, obtained MSIX table address from Base Address Register (BAR). However BAR only holds PCI address programmed by the host whereas the MSI-X table should be in the local memory. Store the MSI-X table address (virtual address) as part of ->set_bar() callback and use that to get the message address and message data here. Fixes: beb4641a787d ("PCI: dwc: Add MSI-X callbacks handler") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-04-02PCI: endpoint: Fix ->set_msix() to take BIR and offset as argumentsKishon Vijay Abraham I2-8/+31
commit 8963106eabdc ("PCI: endpoint: Add MSI-X interfaces") while adding support to raise MSI-X interrupts from endpoint didn't include BAR Indicator register (BIR) configuration and MSI-X table offset as arguments in pci_epc_set_msix(). This would result in endpoint controller register using random BAR indicator register, the memory for which might not be allocated by the endpoint function driver. Add BAR indicator register and MSI-X table offset as arguments in pci_epc_set_msix() and allocate space for MSI-X table and pending bit array (PBA) in pci-epf-test endpoint function driver. Fixes: 8963106eabdc ("PCI: endpoint: Add MSI-X interfaces") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-04-02PCI: endpoint: functions/pci-epf-test: Print throughput informationKishon Vijay Abraham I1-0/+48
Print throughput information in KB/s after every completed transfer, including information on whether DMA is used or not. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Alan Mikhak <alan.mikhak@sifive.com>
2020-04-02PCI: endpoint: functions/pci-epf-test: Add DMA support to transfer dataKishon Vijay Abraham I1-3/+202
Use dmaengine API and add support for transferring data using DMA. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Alan Mikhak <alan.mikhak@sifive.com>
2020-03-31PCI: endpoint: Fix clearing start entry in configfsKunihiko Hayashi1-0/+1
After an endpoint is started through configfs, if 0 is written to the configfs entry 'start', the controller stops but the epc_group->start value remains 1. A subsequent unlinking of the function from the controller would trigger a spurious WARN_ON_ONCE() in pci_epc_epf_unlink() despite right behavior. Fix it by setting epc_group->start = 0 when a controller is stopped using configfs. Fixes: d74679911610 ("PCI: endpoint: Introduce configfs entry for configuring EP functions") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2020-02-26PCI: pci-epf-test: Add support to defer core initializationVidya Sagar1-41/+77
Add support to defer core initialization for the endpoint mode of operation. This would enable support for implementations where the core initialization needs to be deferred until the PCIe reference clock is available from the host system. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-02-25PCI: endpoint: Add notification for core init completionVidya Sagar1-1/+18
Add support to send notifications to EPF from EPC once the core registers initialization is complete. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-02-24PCI: endpoint: Assign function number for each PF in EPC coreKishon Vijay Abraham I2-26/+27
The PCIe endpoint core relies on the drivers that invoke the pci_epc_add_epf() API to allocate and assign a function number to each physical function (PF). Since endpoint function device can be created by multiple mechanisms (configfs, devicetree, etc..), allowing each of these mechanisms to assign a function number would result in mutliple endpoint function devices having the same function number. In order to avoid this, let EPC core assign a function number to the endpoint device. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-02-24PCI: endpoint: Protect concurrent access to pci_epf_ops with mutexKishon Vijay Abraham I1-1/+10
Protect concurrent access to pci_epf_ops with a mutex. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-02-24PCI: endpoint: Fix for concurrent memory allocation in OB address regionKishon Vijay Abraham I1-2/+8
pci-epc-mem uses a bitmap to manage the Endpoint outbound (OB) address region. This address region will be shared by multiple endpoint functions (in the case of multi function endpoint) and it has to be protected from concurrent access to avoid updating an inconsistent state. Use a mutex to protect bitmap updates to prevent the memory allocation API from returning incorrect addresses. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: stable@vger.kernel.org # v4.14+
2020-02-24PCI: endpoint: Replace spinlock with mutexKishon Vijay Abraham I1-51/+31
The pci_epc_ops is not intended to be invoked from interrupt context. Hence replace spin_lock_irqsave and spin_unlock_irqrestore with mutex_lock and mutex_unlock respectively. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-02-24PCI: endpoint: Use notification chain mechanism to notify EPC events to EPFKishon Vijay Abraham I3-31/+13
Use atomic_notifier_call_chain() to notify EPC events like linkup to EPF driver instead of using linkup ops in EPF driver. This is in preparation for adding proper locking mechanism to EPF ops. This will also enable to add more events (in addition to linkup) in the future. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Vidya Sagar <vidyas@nvidia.com>
2019-11-28Merge branch 'remotes/lorenzo/pci/endpoint'Bjorn Helgaas1-1/+1
- Fix endpoint driver sign extension problem when shifting page number to phys_addr_t (Alan Mikhak) * remotes/lorenzo/pci/endpoint: PCI: endpoint: Cast the page number to phys_addr_t
2019-10-15PCI: endpoint: Cast the page number to phys_addr_tAlan Mikhak1-1/+1
Modify pci_epc_mem_alloc_addr() to cast the variable 'pageno' from type 'int' to 'phys_addr_t' before shifting left. This cast is needed to avoid treating bit 31 of 'pageno' as the sign bit which would otherwise get sign-extended to produce a negative value. When added to the base address of PCI memory space, the negative value would produce an invalid physical address which falls before the start of the PCI memory space. Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-10-14PCI: Add PCI_STD_NUM_BARS for the number of standard BARsDenis Efremov1-5/+5
Code that iterates over all standard PCI BARs typically uses PCI_STD_RESOURCE_END. However, that requires the unusual test "i <= PCI_STD_RESOURCE_END" rather than something the typical "i < PCI_STD_NUM_BARS". Add a definition for PCI_STD_NUM_BARS and change loops to use the more idiomatic C style to help avoid fencepost errors. Link: https://lore.kernel.org/r/20190927234026.23342-1-efremov@linux.com Link: https://lore.kernel.org/r/20190927234308.23935-1-efremov@linux.com Link: https://lore.kernel.org/r/20190916204158.6889-3-efremov@linux.com Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Sebastian Ott <sebott@linux.ibm.com> # arch/s390/ Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> # video/fbdev/ Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> # pci/controller/dwc/ Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> # scsi/pm8001/ Acked-by: Martin K. Petersen <martin.petersen@oracle.com> # scsi/pm8001/ Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # memstick/
2019-06-11PCI: endpoint: Clear BAR before freeing its spaceAlan Mikhak1-1/+1
Associated pci_epf_bar structure is needed in pci_epc_clear_bar() to clear a BAR correctly but it is reset in pci_epf_free_space() (that is called first) which results in pci_epc_clear_bar() failure. Reorder the pci_epc_clear_bar()/pci_epf_free_space() calls execution to fix the issue. Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com> [lorenzo.pieralisi@arm.com: reworded the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-06-11PCI: endpoint: Skip odd BAR when skipping 64bit BARAlan Mikhak1-13/+12
Always skip odd BAR when skipping 64bit BARs in pci_epf_test_set_bar() and pci_epf_test_alloc_space() otherwise pci_epf_test_set_bar() will call pci_epc_set_bar() on an odd loop index when skipping reserved 64bit BAR. Moreover, pci_epf_test_alloc_space() will call pci_epf_alloc_space() on bind for an odd loop index when BAR is 64bit but leaks on subsequent unbind by not calling pci_epf_free_space(). Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-06-11PCI: endpoint: Allocate enough space for fixed size BARAlan Mikhak1-1/+7
PCI endpoint test function code should honor the .bar_fixed_size parameter from underlying endpoint controller drivers or results may be unexpected. In pci_epf_test_alloc_space(), check if BAR being used for test register space is a fixed size BAR. If so, allocate the required fixed size. Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-06-11PCI: endpoint: Set endpoint controller pointer to NULLAlan Mikhak1-1/+2
Set endpoint controller pointer to NULL in pci_epc_remove_epf() to avoid -EBUSY on subsequent call to pci_epc_add_epf(). Add a check for NULL endpoint function pointer. Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-05-13Merge branch 'remotes/lorenzo/pci/misc'Bjorn Helgaas1-0/+5
- Exit pcitest with error code when test fails (Jean-Jacques Hiblot) - Fix leaked of_node references in dra7xx, uniphier, layerscape, rockchip, aardvark, iproc, mediatek, rpadlpar (Wen Yang) - Fix pcitest "help" option parsing (Kishon Vijay Abraham I) - Fix Makefile bug that inadvertently removes pcitest.sh (Kishon Vijay Abraham I) - Check for alloc_workqueue() failure in endpoint test driver (Kangjie Lu) * remotes/lorenzo/pci/misc: PCI: endpoint: Fix a potential NULL pointer dereference tools: PCI: Handle pcitest.sh independently from pcitest tools: PCI: Add 'h' in optstring of getopt() PCI: mediatek: Fix a leaked reference by adding missing of_node_put() PCI: iproc: Fix a leaked reference by adding missing of_node_put() PCI: aardvark: Fix a leaked reference by adding missing of_node_put() PCI: rockchip: Fix a leaked reference by adding missing of_node_put() PCI: dwc: layerscape: Fix a leaked reference by adding missing of_node_put() PCI: uniphier: Fix a leaked reference by adding missing of_node_put() PCI: dwc: pci-dra7xx: Fix a leaked reference by adding missing of_node_put() tools: PCI: Exit with error code when test fails
2019-04-15PCI: endpoint: Add support to specify alignment for buffers allocated to BARsKishon Vijay Abraham I2-4/+11
The address that is allocated using pci_epf_alloc_space() is directly written to the target address of the Inbound Address Translation unit (ie the HW component implementing inbound address decoding) on endpoint controllers. Designware IP [1] has a configuration parameter (CX_ATU_MIN_REGION_SIZE [2]) which has 64KB as default value and the lower 16 bits of the Base, Limit and Target registers of the Inbound ATU are fixed to zero. If the programmed memory address is not aligned to 64 KB boundary this causes memory corruption. Modify pci_epf_alloc_space() API to take alignment size as argument in order to allocate buffers to be mapped to BARs with an alignment that suits the platform where they are used. Add an 'align' parameter to epc_features which can be used by platform drivers to specify the BAR allocation alignment requirements and use this while invoking pci_epf_alloc_space(). [1] "I/O and MEM Match Modes" section in DesignWare Cores PCI Express Controller Databook version 4.90a [2] http://www.ti.com/lit/ug/spruid7c/spruid7c.pdf Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-04-12PCI: endpoint: Fix a potential NULL pointer dereferenceKangjie Lu1-0/+5
In case alloc_workqueue() fails, return -ENOMEM to avoid potential NULL pointer dereferences. Signed-off-by: Kangjie Lu <kjlu@umn.edu> [lorenzo.pieralisi@arm.com: commit log and code update] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-15PCI: pci-epf-test: Use pci_epc_get_features() to get EPC featuresKishon Vijay Abraham I1-33/+54
Use pci_epc_get_features() to get EPC features such as linkup notifier support, MSI/MSIX capable, BAR configuration etc and use it for configuring pci-epf-test. Since these features are now obtained directly from EPC driver, remove pci_epf_test_data which was initially added to have EPC features in endpoint function driver. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-15PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64BitKishon Vijay Abraham I1-0/+4
It's useless to allocate memory for next BAR if the current BAR is a 64Bit BAR. Stop allocating memory for the next BAR, if the current BARs flag indicates this is a 64Bit BAR. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-15PCI: pci-epf-test: Remove setting epf_bar flags in function driverKishon Vijay Abraham I1-4/+0
Now that pci_epf_alloc_space() sets BAR MEM TYPE flags as 64Bit or 32Bit based on size, remove setting it in function driver. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-15PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flagsKishon Vijay Abraham I1-1/+3
pci_epf_alloc_space() sets the MEM TYPE flags to indicate a 32-bit Base Address Register irrespective of the size. Fix it here to indicate 64-bit BAR if the size is > 2GB. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-15PCI: endpoint: Add helper to get first unreserved BARKishon Vijay Abraham I1-0/+23
Add a helper function pci_epc_get_first_free_bar() to get the first unreserved BAR that can be used for endpoint function. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-14PCI: endpoint: Add new pci_epc_ops to get EPC featuresKishon Vijay Abraham I1-0/+30
Add a new pci_epc_ops ->get_features() to get the features supported by the EPC. Since EPC can provide different features to different functions, the ->get_features() ops takes _func_no_ as an argument. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-13PCI: endpoint: functions: Use memcpy_fromio()/memcpy_toio()Wen Yang1-2/+2
Functions copying from/to IO addresses should use the memcpy_fromio()/memcpy_toio() API rather than plain memcpy(). Fix the issue detected through the sparse tool. Fixes: 349e7a85b25f ("PCI: endpoint: functions: Add an EP function to test PCI") Suggested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> [lorenzo.pieralisi@arm.com: updated log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> CC: Bjorn Helgaas <bhelgaas@google.com> CC: Gustavo Pimentel <gustavo.pimentel@synopsys.com> CC: Niklas Cassel <niklas.cassel@axis.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> CC: linux-pci@vger.kernel.org CC: linux-kernel@vger.kernel.org
2018-11-23PCI: consolidate PCI config entry in drivers/pciChristoph Hellwig1-1/+1
There is no good reason to duplicate the PCI menu in every architecture. Instead provide a selectable HAVE_PCI symbol that indicates availability of PCI support, and a FORCE_PCI symbol to for PCI on and the handle the rest in drivers/pci. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-15Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas3-25/+153
- Add Kirin MSI support (Xiaowei Song) - Drop unnecessary root_bus_nr setting from exynos, imx6, keystone, armada8k, artpec6, designware-plat, histb, qcom, spear13xx (Shawn Guo) - Move link notification settings from DesignWare core to individual drivers (Gustavo Pimentel) - Add endpoint library MSI-X interfaces (Gustavo Pimentel) - Correct signature of endpoint library IRQ interfaces (Gustavo Pimentel) - Add DesignWare endpoint library MSI-X callbacks (Gustavo Pimentel) - Add endpoint library MSI-X test support (Gustavo Pimentel) * remotes/lorenzo/pci/dwc: PCI: endpoint: Add MSI set maximum restriction tools: PCI: Add MSI-X support pci_endpoint_test: Add 2 ioctl commands pci-epf-test/pci_endpoint_test: Add MSI-X support pci-epf-test/pci_endpoint_test: Use irq_type module parameter pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspace PCI: dwc: Add legacy interrupt callback handler PCI: dwc: Rework MSI callbacks handler PCI: dwc: Add MSI-X callbacks handler PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signatures PCI: endpoint: Add MSI-X interfaces PCI: dwc: Fix EP link notification implementation PCI: spear13xx: Drop unnecessary root_bus_nr setting PCI: qcom: Drop unnecessary root_bus_nr setting PCI: histb: Drop unnecessary root_bus_nr setting PCI: designware-plat: Drop unnecessary root_bus_nr setting PCI: artpec6: Drop unnecessary root_bus_nr setting PCI: armada8k: Drop unnecessary root_bus_nr setting PCI: keystone: Drop unnecessary root_bus_nr setting PCI: imx6: Drop unnecessary root_bus_nr setting PCI: exynos: Drop unnecessary root_bus_nr setting PCI: kirin: Add MSI support
2018-07-19PCI: endpoint: Add MSI set maximum restrictionGustavo Pimentel1-1/+2
Add pci_epc_set_msi() maximum 32 interrupts validation. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19pci-epf-test/pci_endpoint_test: Add MSI-X supportGustavo Pimentel1-2/+27
Add MSI-X support and update driver documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspaceGustavo Pimentel1-20/+41
Cleanup PCI_ENDPOINT_TEST memspace (by moving the interrupt number away from command section). Add IRQ_TYPE register to identify the triggered ID interrupt required for the READ/WRITE/COPY tests and raise IRQ test commands. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signaturesGustavo Pimentel1-4/+4
Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and pci_epc_raise_irq() signature, namely the interrupt_num variable type from u8 to u16 to accommodate 2048 maximum MSI-X interrupts. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Alan Douglas <adouglas@cadence.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19PCI: endpoint: Add MSI-X interfacesGustavo Pimentel2-0/+81
Add PCI_EPC_IRQ_MSIX type. Add MSI-X callbacks signatures to the ops structure. Add sysfs interface for set/get MSI-X capability maximum number. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-09PCI: endpoint: Fix NULL pointer dereference error when CONFIGFS is disabledKishon Vijay Abraham I1-19/+43
commit ef1433f717a2 ("PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry") while adding configfs entry for each pci_epf_device_id table entry introduced a NULL pointer dereference error when CONFIG_PCI_ENDPOINT_CONFIGFS is not enabled. Fix it here. Fixes: ef1433f717a2 ("PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [lorenzo.pieralisi: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-29PCI: endpoint: Use after free in pci_epf_unregister_driver()Dan Carpenter1-2/+2
We need to use list_for_each_entry_safe() because the pci_ep_cfs_remove_epf_group() function frees "group". Fixes: ef1433f717a2 ("PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-06-06Merge branch 'lorenzo/pci/endpoint'Bjorn Helgaas2-16/+35
- use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai) - add configfs entries for pci_epf_driver device IDs (Kishon Vijay Abraham I) - clean up pci_endpoint_test driver (Gustavo Pimentel) * lorenzo/pci/endpoint: PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry misc: pci_endpoint_test: Use pci_irq_vector function PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters misc: pci_endpoint_test: Replace lower into upper case characters PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()
2018-05-18PCI: endpoint: Create configfs entry for each pci_epf_device_id table entryKishon Vijay Abraham I1-2/+21
In order to be able to provide correct driver_data for pci_epf device, a separate configfs entry for each pci_epf_device_id table entry in pci_epf_driver is required. Add support to create configfs entry for each pci_epf_device_id table entry here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2018-05-15PCI: dwc: Add support for EP modeGustavo Pimentel1-0/+7
The PCIe controller dual mode is capable of operating in Root Complex (RC) mode as well as EP mode by configuration option. Add EP support to the DesignWare driver on top of RC mode support. Add new property on pci_epc structure which allow to configure pci_epf_test driver accordingly to the controller specific requirements. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-15PCI: endpoint: functions/pci-epf-test: Replace lower into upper case charactersGustavo Pimentel1-13/+13
Replace all initial lower case character into upper case in comments and debug printks. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-08PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()Jia-Ju Bai1-1/+1
pci_epf_test_write() is never called in atomic context. The call chain ending up at pci_epf_test_write() is: [1] pci_epf_test_write() <- pci_epf_test_cmd_handler() pci_epf_test_cmd_handler() is set as a parameter of INIT_DELAYED_WORK() in pci_epf_test_probe(). This function is not called in atomic context. Despite never getting called from atomic context, pci_epf_test_write() calls mdelay() to busy wait. This is not necessary and can be replaced with usleep_range() to avoid busy waiting. Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearingNiklas Cassel1-1/+3
Since a 64-bit BAR consists of a BAR pair, and since there is no BAR after BAR_5, BAR_5 cannot be 64-bits wide. This sanity check is done in pci_epc_clear_bar(), so that we don't need to do this sanity check in all epc->ops->clear_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct ↵Niklas Cassel2-4/+8
*epf_bar Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar. This is needed so that epc->ops->clear_bar() can clear the BAR pair, if the BAR is 64-bits wide. This also makes it possible for pci_epc_clear_bar() to sanity check the flags. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2018-04-03PCI: endpoint: Handle 64-bit BARs properlyNiklas Cassel1-0/+7
If a 64-bit BAR was set-up, we need to skip a BAR, since a 64-bit BAR consists of a BAR pair. We need to check what BAR width the epc->ops->set_bar() specific implementation actually did set-up, since some drivers, like the Cadence EP controller, sometimes sets up a 64-bit BAR, even though a 32-bit BAR was requested. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not setNiklas Cassel1-1/+3
Setting a BAR size > 4 GB is invalid if PCI_BASE_ADDRESS_MEM_TYPE_64 flag is not set. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Setting 64-bit/prefetch bit is invalid when IO is setNiklas Cassel1-1/+4
If flag PCI_BASE_ADDRESS_SPACE_IO is set, also having any PCI_BASE_ADDRESS_MEM_* bit set is invalid. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Setting BAR_5 to 64-bits wide is invalidNiklas Cassel1-1/+3
Since a 64-bit BAR consists of a BAR pair, and since there is no BAR after BAR_5, BAR_5 cannot be 64-bits wide. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-03PCI: endpoint: Simplify epc->ops->set_bar()/pci_epc_set_bar()Niklas Cassel3-12/+10
Add barno and flags to struct epf_bar. That way we can simplify epc->ops->set_bar()/pci_epc_set_bar() by passing a struct *epf_bar instead of a whole lot of arguments. This is needed so that epc->ops->set_bar() implementations can modify BAR flags. Will be utilized in a succeeding patch. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
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