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2020-12-07drm/amd/display: Avoid HDCP initialization in devices without outputamd-20.45Rodrigo Siqueira1-1/+1
The HDCP feature requires at least one connector attached to the device; however, some GPUs do not have a physical output, making the HDCP initialization irrelevant. This patch disables HDCP initialization when the graphic card does not have output. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
2020-12-04PCI: Use ioremap(), not phys_to_virt() for platform ROMMikel Rychliski0-0/+0
On some EFI systems, the video BIOS is provided by the EFI firmware. The boot stub code stores the physical address of the ROM image in pdev->rom. Currently we attempt to access this pointer using phys_to_virt(), which doesn't work with CONFIG_HIGHMEM. On these systems, attempting to load the radeon module on a x86_32 kernel can result in the following: BUG: unable to handle page fault for address: 3e8ed03c #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page *pde = 00000000 Oops: 0000 [#1] PREEMPT SMP CPU: 0 PID: 317 Comm: systemd-udevd Not tainted 5.6.0-rc3-next-20200228 #2 Hardware name: Apple Computer, Inc. MacPro1,1/Mac-F4208DC8, BIOS MP11.88Z.005C.B08.0707021221 07/02/07 EIP: radeon_get_bios+0x5ed/0xe50 [radeon] Code: 00 00 84 c0 0f 85 12 fd ff ff c7 87 64 01 00 00 00 00 00 00 8b 47 08 8b 55 b0 e8 1e 83 e1 d6 85 c0 74 1a 8b 55 c0 85 d2 74 13 <80> 38 55 75 0e 80 78 01 aa 0f 84 a4 03 00 00 8d 74 26 00 68 dc 06 EAX: 3e8ed03c EBX: 00000000 ECX: 3e8ed03c EDX: 00010000 ESI: 00040000 EDI: eec04000 EBP: eef3fc60 ESP: eef3fbe0 DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00010206 CR0: 80050033 CR2: 3e8ed03c CR3: 2ec77000 CR4: 000006d0 Call Trace: r520_init+0x26/0x240 [radeon] radeon_device_init+0x533/0xa50 [radeon] radeon_driver_load_kms+0x80/0x220 [radeon] drm_dev_register+0xa7/0x180 [drm] radeon_pci_probe+0x10f/0x1a0 [radeon] pci_device_probe+0xd4/0x140 Fix the issue by updating all drivers which can access a platform provided ROM. Instead of calling the helper function pci_platform_rom() which uses phys_to_virt(), call ioremap() directly on the pdev->rom. radeon_read_platform_bios() previously directly accessed an __iomem pointer. Avoid this by calling memcpy_fromio() instead of kmemdup(). pci_platform_rom() now has no remaining callers, so remove it. Link: https://lore.kernel.org/r/20200319021623.5426-1-mikel@mikelr.com Signed-off-by: Mikel Rychliski <mikel@mikelr.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-03PCI: Use ioremap(), not phys_to_virt() for platform ROMMikel Rychliski5-44/+52
On some EFI systems, the video BIOS is provided by the EFI firmware. The boot stub code stores the physical address of the ROM image in pdev->rom. Currently we attempt to access this pointer using phys_to_virt(), which doesn't work with CONFIG_HIGHMEM. On these systems, attempting to load the radeon module on a x86_32 kernel can result in the following: BUG: unable to handle page fault for address: 3e8ed03c #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page *pde = 00000000 Oops: 0000 [#1] PREEMPT SMP CPU: 0 PID: 317 Comm: systemd-udevd Not tainted 5.6.0-rc3-next-20200228 #2 Hardware name: Apple Computer, Inc. MacPro1,1/Mac-F4208DC8, BIOS MP11.88Z.005C.B08.0707021221 07/02/07 EIP: radeon_get_bios+0x5ed/0xe50 [radeon] Code: 00 00 84 c0 0f 85 12 fd ff ff c7 87 64 01 00 00 00 00 00 00 8b 47 08 8b 55 b0 e8 1e 83 e1 d6 85 c0 74 1a 8b 55 c0 85 d2 74 13 <80> 38 55 75 0e 80 78 01 aa 0f 84 a4 03 00 00 8d 74 26 00 68 dc 06 EAX: 3e8ed03c EBX: 00000000 ECX: 3e8ed03c EDX: 00010000 ESI: 00040000 EDI: eec04000 EBP: eef3fc60 ESP: eef3fbe0 DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00010206 CR0: 80050033 CR2: 3e8ed03c CR3: 2ec77000 CR4: 000006d0 Call Trace: r520_init+0x26/0x240 [radeon] radeon_device_init+0x533/0xa50 [radeon] radeon_driver_load_kms+0x80/0x220 [radeon] drm_dev_register+0xa7/0x180 [drm] radeon_pci_probe+0x10f/0x1a0 [radeon] pci_device_probe+0xd4/0x140 Fix the issue by updating all drivers which can access a platform provided ROM. Instead of calling the helper function pci_platform_rom() which uses phys_to_virt(), call ioremap() directly on the pdev->rom. radeon_read_platform_bios() previously directly accessed an __iomem pointer. Avoid this by calling memcpy_fromio() instead of kmemdup(). pci_platform_rom() now has no remaining callers, so remove it. Link: https://lore.kernel.org/r/20200319021623.5426-1-mikel@mikelr.com Signed-off-by: Mikel Rychliski <mikel@mikelr.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-02drm/amdgpu: enable DCN for navi10 headless SKUTianci.Yin1-2/+1
There is a NULL pointer crash when DCN disabled on headless SKU. On normal SKU, the variable adev->ddev.mode_config.funcs is initialized in dm_hw_init(), and it is fine to access it in amdgpu_device_resume(). But on headless SKU, DCN is disabled, the funcs variable is not initialized, then crash arises. Enable DCN to fix this issue. Change-Id: I33bc30210e3420e60ceb59175e39855d00b05b06 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
2020-12-02drm/amdgpu: rename nv_is_headless_sku()Flora Cui1-3/+3
for headless NAVI ASICs Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com>
2020-12-02drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKUFlora Cui1-2/+3
Navi14 0x7340/C9 SKU has no display and video support, remove them. Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com>
2020-12-02drm/amdgpu: disable DCN and VCN for navi10 blockchain SKU(v3)Tianci.Yin1-2/+12
The blockchain SKU has no display and video support, remove them. Change-Id: I419cfae8b00125f3bff18c0a8cd92f3266d5f04a Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
2020-12-02drm/amdgpu: add DID for navi10 blockchain SKUTianci.Yin1-0/+1
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
2020-11-30drm/amdkfd: keep BOs in system memory if restore failedPhilip Yang1-2/+15
If vram is used up, display allocate vram evict the KFD BOs to system memory. KFD schedule restore work to restore BOs back to vram. If display BOs are pinned in vram, KFD restore work will keep retry, and may never success. If restore BO back to vram failed, keep the BO in system memory to prevent endless retry restore, and GPU mapping will update to system memory. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2020-11-25drm/amdgpu: increase reserved VRAM size to 8MBLikun Gao1-1/+1
4MB reserved VRAM size which used for page tables was not enough for some condition, increase it to 8MB to reduce page table contention. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Change-Id: I016ce351fa9b6b1335d19d83e58ad0fa5f3b8c05
2020-11-16drm/amd/pm: update driver if file for sienna cichlidLikun Gao3-29/+12
Update driver if file for sienna cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Change-Id: I42af8c935e558d9fcf3892e89fd29b766d8051cd
2020-11-11drm/amdgpu: add UMC to ip discovery mapJohn Clements1-0/+1
resolve issue with UMC base offset not being set correctly in ip discovery sequence Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Change-Id: I145c93ae57ea07818d762f9402ff9efa3efc39c2
2020-11-10drm/amdgpu: disable bad page reservationJohn Clements2-7/+1
in event of ECC RAS error do not reserve bad page Signed-off-by: John Clements <john.clements@amd.com> Change-Id: I5f5c126d026ee0cbc6a70046d0af6cdfe32115cf
2020-11-03drm/amdgpu: resolved ASD loading issue on siennaJohn Clements1-0/+1
updated fw header v2 parser to set asd fw memory Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Change-Id: I81da4c24f005510faee5a423a5617067c0dff91b
2020-11-02drm/amdkfd: Use same SQ prefetch setting as amdgpuJay Cornwall1-2/+3
0 causes instruction fetch stall at cache line boundary under some conditions on Navi10. A non-zero prefetch is the preferred default in any case. Fixes soft hang in Luxmark. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2020-10-30Revert drm/amdgpu: disable sienna chichlid UMC RASJohn Clements1-2/+2
This reverts commit bbb645ecdf474d6134cb082693da95bcc9738131. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Change-Id: Ic89ba09069643a5bf9d90ffca48bf54e0aa77272
2020-10-22drm/amd/pm: fix the wrong fan speed in fan1_inputKenneth Feng1-8/+3
fix the wrong fan speed in fan1_input when the fan control mode is manual. the fan speed value is not correct when we set manual mode to fan1_enalbe - 1. since the fan speed in the metrics table always reflects the real fan speed,we can fetch the fan speed for both auto and manual mode. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com>
2020-10-22drm/amd/pm: fix pp_dpm_fclkKenneth Feng1-0/+3
fclk value is missing in pp_dpm_fclk. add this to correctly show the current value. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com>
2020-10-22drm/amd/pm: remove the average clock value in sysfsKenneth Feng1-4/+8
if it's fine-grained clock dpm, remove the average clock value and reflects the real clock. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com>
2020-10-22drm/amdgpu: correct the cu and rb info for sienna cichlidLikun Gao1-0/+9
Skip disabled sa to correct the cu_info and active_rbs for sienna cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Change-Id: Id0fd2e0ab3b41a8049c1fc5ad2f344d2d5cf46f2
2020-10-20drm/amd/pm: update driver if file for sienna cichlidLikun Gao2-3/+13
Update driver if file for sienna cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Change-Id: I9909a4542e5a3c0817592b16d52f0724f0f15b3f
2020-10-20drm/amd/pm: fix pcie information for sienna cichlidLikun Gao1-2/+2
Fix the function used for sienna cichlid to get correct PCIE information by pp_dpm_pcie. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Change-Id: If3bc7330eb27a481c79485c593ee98121a7b24a5
2020-10-19drm/amd/swsmu: correct wrong feature bit mappingKevin Wang1-10/+17
1. when smc feature bit isn't mapped, the feature state isn't showed on sysfs node of pp_features. 2. add pp_features table title Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
2020-10-16drm/amd/display: Add missing pflip irqBhawanpreet Lakha1-2/+2
If we have more than 4 displays we will run into dummy irq calls or flip timout issues. Change-Id: I53f6ad33d9a0d372375904d1f8e5c552e29447c9 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-16drm/amdkcl: guard the change under drm version specifically for rhel distroShiwu Zhang2-0/+47
This is caused by "Move disable interrupt into commit tail" v5.9-rc2-322-g042198ce8735 v2: move the macro definition into display specific header file. Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Reviewed-by: Flora Cui <flora.cui@amd.com>
2020-10-16drm/amdgpu: update golden setting for sienna_cichlidLikun Gao1-0/+1
Update golden setting for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Change-Id: Ie4516b1121a1531c9c960efbcdd3a23c26c09bc8
2020-10-16drm/amd/swsmu: add missing feature map for sienna_cichlidKevin Wang2-0/+4
it will cause smu sysfs node of "pp_features" show error. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com>
2020-10-15drm/amdgpu: add rlc iram and dram firmware supportLikun Gao6-8/+66
Support to load RLC iram and dram ucode when RLC firmware struct use v2.2 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Change-Id: Id782492e50c86d1c761ef3b314ac0cc189e70424
2020-10-15drm/amdgpu: add function to program pbb mode for sienna cichlidLikun Gao1-0/+62
Add function for sienna_cichlid to force PBB workload mode to zero by checking whether there have SE been harvested. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Change-Id: I03ee7b2fc9abdc0afa76e95bf09641ea739d050a
2020-10-09drm/amd/display: Avoid set zero in the requested clkRodrigo Siqueira1-2/+1
Sometimes CRTCs can be disabled due to display unplugging or temporarily transition in the userspace; in these circumstances, DCE tries to set the minimum clock threshold. When we have this situation, the function bw_calcs is invoked with number_of_displays set to zero, making DCE set dispclk_khz and sclk_khz to zero. For these reasons, we have seen some ATOM bios errors that look like: [drm:atom_op_jump [amdgpu]] *ERROR* atombios stuck in loop for more than 5secs aborting [drm:amdgpu_atom_execute_table_locked [amdgpu]] *ERROR* atombios stuck executing EA8A (len 761, WS 0, PS 0) @ 0xEABA This error happens due to an attempt to optimize the bandwidth using the sclk, and the dispclk clock set to zero. Technically we handle this in the function dce112_set_clock, but we are not considering the case that this value is set to zero. This commit fixes this issue by ensuring that we never set a minimum value below the minimum clock threshold. Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
2020-10-09Revert "drm/amdgpu: Disable encoder UVD and VCE functionalities for Linux ↵Guchun Chen1-1/+1
Guest Virtual Machine" This reverts commit 8b1d728b2ff45bb285fd9858d7f1fb03cbb3b6f1. Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2020-10-09Revert "drm/amdgpu: Fix for timeout after TDR"Guchun Chen1-3/+0
This reverts commit b29cd4677d7b29381b851a24cedb6d7cd15f747b. Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2020-10-09Revert "drm/amdgpu/kcl: Fix centOS passthrough issue"Guchun Chen1-1/+1
This reverts commit 5a8ad34a916b07af3aee0504ad30adbef7979f99. Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2020-10-09Revert "drm/amdgpu: Fails on shutting down VM"Guchun Chen1-13/+6
This reverts commit dc89a58996bf91bf7c5b0dd1dfa9d7df8716204b. Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2020-10-09Revert "drm/amdgpu: Correct the irq numbers for virtual ctrc"Guchun Chen1-1/+1
This reverts commit 1a1fbcd497314dc623b60c77e8a50b4419b185e4. Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2020-10-08drm/amd/display: add copy of drm_dp_mst_add_affected_dsc_crtc()Bhawanpreet Lakha1-1/+48
There is a bug in drm_dp_mst_add_affected_dsc_crtc(), that caused mst dsc hotplugs to not work because atomic check will fail. This was fixed upstream but is not guaranteed to be in the kernel that dkms is running on. Add a copy of drm_dp_mst_add_affected_dsc_crtc() with the fix. Reference: 2ee394a19a39 ("drm/dp_mst: Don't return error code when crtc is null") Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05drm/amd/display: Move disable interrupt into commit tailAurabindo Pillai1-38/+18
[Why&How] Since there is no need for accessing crtc state in the interrupt handler, interrupts need not be disabled well in advance, and can be moved to commit_tail where it should be. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05drm/amd/display: Refactor to prevent crtc state access in DM IRQ handlerAurabindo Pillai3-55/+70
[Why&How] Currently commit_tail holds global locks and wait for dependencies which is against the DRM API contracts. Inorder to fix this, IRQ handler should be able to run without having to access crtc state. Required parameters are copied over so that they can be directly accessed from the interrupt handler Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05drm/amdgpu: Move existing pflip fields into separate structAurabindo Pillai3-3/+38
[Why&How] To refactor DM IRQ management, all fields used by IRQ is best moved to a separate struct so that main amdgpu_crtc struct need not be changed Location of the new struct shall be in DM Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-30drm/amdgpu: Use SKU instead of DID for FRU check v2Kent Russell1-11/+24
The VG20 DIDs 66a0, 66a1 and 66a4 are used for various SKUs that may or may not have the FRU EEPROM on it. Parse the VBIOS to check for server SKU variants (D131 or D134) until a more general solution can be determined. v2: Remove string-based logic, correct the VBIOS string comment Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2020-09-25drm/amdgpu: clean up ras sysfs creation (v2)Guchun Chen1-56/+31
Merge ras sysfs creation together by calling sysfs_create_group once, as sysfs_update_group may not work properly as expected. v2: improve commit message Signed-off-by: Guchun Chen <guchun.chen@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com>
2020-09-25drm/amdgpu: disable sienna chichlid UMC RASJohn Clements1-2/+2
disable UMC RAS in lieu of stability issues on certain sku Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Change-Id: Ibd6f634548e99fb895b4a12601935d1a843af2a1
2020-09-24drm/amdgpu: Correct the irq numbers for virtual ctrcEmily Deng1-1/+1
Change-Id: I02035f65b71ec52795c3e8ae979fb582c3cce592 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Victor <Victor.Zhao@amd.com>
2020-09-22drm/amdgpu: Fails on shutting down VMVictor1-6/+13
When vf is set to available state, host will not respond to event 3 from guest. Linux guest will continue unload even no full access from host. In this case, when guest touches hw and tried to act on registers, the operations will fail and unload will stuck. On Amazon Linux2, poweroff vm goes to amdgpu_pci_shutdown, so skip hw suspend during this process if vf get full access failed. Change-Id: I521d41514b06fddec4dd9f4cdae500bc85db0ae0 Signed-off-by: Victor <Victor.Zhao@amd.com>
2020-09-22drm/amdgpu/kcl: Fix centOS passthrough issueEmily Deng1-1/+1
Need to add HAVE_DRIVER_ATOMIC, or it will report some warnings. Change-Id: I7b3e49e660a2fd35ea7083ab659f13cdf04358b7 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Victor <Victor.Zhao@amd.com>
2020-09-22drm/amdgpu: Fix for timeout after TDRBojan Radovic1-0/+3
Adding update of guilty flag for job that caused hang in amdgpu_device_gpu_recover Change-Id: Ia6db7231d1aa47b4ad6223e66161bc7e35207511 Signed-off-by: Bojan Radovic <Bojan.Radovic@amd.com>
2020-09-22drm/amdgpu: Disable encoder UVD and VCE functionalities for Linux Guest ↵Surbhi Kakarya1-1/+1
Virtual Machine Signed-off-by: Surbhi Kakarya <Surbhi.Kakarya@amd.com> Change-Id: I9a876c372098a5cef320286b3145bab670ab8843
2020-09-22drm/amd/pm: update driver if file for sienna cichlidLikun Gao2-3/+3
Update driver if file for sienna cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Change-Id: Ib26978b1923a5a77c7bdd12289df1077f8949d2d
2020-09-22drm/amd/pm: update driver if file for sienna cichlidLikun Gao3-11/+16
Update drive if file for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Change-Id: Ib96e4f6d9887a22b67957dda25bbbdcba3ec2ee1
2020-09-21drm/amdgpu: add device ID for sienna_cichlid (v2)Likun Gao1-0/+8
Add device ID for sienna_cichlid. v2: squash in additional device ids. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Change-Id: I7fdbb674a14b69aa57973192f7b92f345a0f3288
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