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2013-08-30clk: fix new_parent dereference before null checkJames Hogan1-6/+7
2013-08-30clk: wm831x: Initialise wm831x pointer on initMark Brown1-0/+2
2013-08-29clk/exynos5420: assign dout_pixel id to pixel clock dividerRahul Sharma2-1/+9
2013-08-29clk/exynos5420: add hdmi mux to change parents in hdmi driverRahul Sharma2-1/+9
2013-08-29clk/exynos5420: fix the order of parents of hdmi muxRahul Sharma1-1/+1
2013-08-29clk/exynos5420: add gate clock for mixer sysmmuRahul Sharma2-1/+3
2013-08-29clk/exynos5420: add sclk_hdmiphy to the list of special clocksRahul Sharma2-2/+3
2013-08-29clk: wm831x: Provide is_prepared() rather than is_enabled()Mark Brown1-7/+7
2013-08-28clk/exynos5250: change parent to aclk200_disp1 for hdmi subsystemRahul Sharma1-2/+2
2013-08-28clk: tegra30: Don't wait for PLL_U lock bitTuomas Tynkkynen1-1/+1
2013-08-27clk: s3c64xx: Fix incorrect placement of __initdataSachin Kamat1-2/+2
2013-08-27clk: sunxi: Fix incorrect placement of __initconstSachin Kamat1-30/+30
2013-08-27clk: kirkwood: Fix incorrect placement of __initconstSachin Kamat1-7/+7
2013-08-27clk: dove: Fix incorrect placement of __initconstSachin Kamat1-6/+6
2013-08-27clk: armada-xp: Fix incorrect placement of __initconstSachin Kamat1-6/+6
2013-08-27clk: armada-370: Fix incorrect placement of __initconstSachin Kamat1-7/+7
2013-08-27clk: u300: Fix incorrect placement of __initconstSachin Kamat1-2/+2
2013-08-27clk: nomadik: Fix incorrect placement of __initconstSachin Kamat1-2/+2
2013-08-27clk: bcm2835: Fix incorrect placement of __initconstSachin Kamat1-1/+1
2013-08-27Merge tag 'sunxi-clk-for-3.12' of https://github.com/mripard/linux into clk-n...Mike Turquette5-38/+462
2013-08-27clk: wrap I/O access for improved portabilityGerhard Sittig4-9/+26
2013-08-27Merge branch 'clk-next-s3c64xx-delta' into clk-nextMike Turquette2-98/+13
2013-08-27clk: get matching entry under lock in of_clk_init()Alex Elder1-2/+2
2013-08-27clk: sunxi: fix initialization of basic clocksEmilio López1-8/+3
2013-08-26clk: samsung: pll: Use new registration method for PLL6552 and PLL6553Tomasz Figa2-98/+13
2013-08-26clk: sunxi: Add Allwinner A20 gatesMaxime Ripard3-0/+116
2013-08-26clk: sunxi: Add A31 clocks supportMaxime Ripard3-0/+213
2013-08-26clk: sunxi: Allow to specify the divider width from the dividers dataMaxime Ripard1-11/+13
2013-08-26clk: sunxi: Rename the structure to prepare the addition of sun6iMaxime Ripard1-27/+27
2013-08-26clk: sunxi: fix initialization of basic clocksEmilio López1-8/+3
2013-08-26clk: sunxi: Add A10s gatesMaxime Ripard3-0/+93
2013-08-23clk: mvebu: add missing iounmapJisheng Zhang2-7/+15
2013-08-21clk: handle NULL struct clk gracefullyMike Turquette1-1/+7
2013-08-20Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-nextMike Turquette1-5/+14
2013-08-20clk/zynq/pll: Use #defines for fbdiv min/max valuesSoren Brinkmann1-4/+7
2013-08-20clk/zynq/pll: Fix documentation for PLL register functionSoren Brinkmann1-1/+7
2013-08-19clk: clk-mux: implement remuxing on set_rateJames Hogan3-0/+53
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan18-276/+388
2013-08-19clk: add support for clock reparent on set_rateJames Hogan4-66/+132
2013-08-19clk: move some parent related functions upwardsJames Hogan1-104/+104
2013-08-19clk: abstract parent cacheJames Hogan2-7/+15
2013-08-16clk: export fixed-factor, gate & mux registrationMike Turquette3-0/+5
2013-08-16clk: clk-divider: Export clk_register_divider()Fabio Estevam1-0/+2
2013-08-16clk: fixed-rate: Export clk_fixed_rate_register()Stephen Boyd1-0/+1
2013-08-08clk: prima2: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra30: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra20: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra114: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: exynos5440: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: exynos5420: Fix incorrect placement of __initdataSachin Kamat1-3/+3