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authorPaul Mundt <lethal@linux-sh.org>2008-09-17 23:24:02 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-09-17 23:24:02 +0900
commit81b669952ed5fe0d6f65f8b9a97d1fdeac93ff10 (patch)
tree219d4c3b78017d2df96457136d61948ccac267ec /arch/sh/include/asm/processor.h
parent8a80a5e9e89cf3aacf8165dd34b40c7c3fe91b4d (diff)
sh: Consolidate struct sh_cpuinfo definitions across _32/_64 split.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/processor.h')
-rw-r--r--arch/sh/include/asm/processor.h40
1 files changed, 39 insertions, 1 deletions
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 58e2be55ab93..693364a20ad7 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -3,6 +3,7 @@
#include <asm/cpu-features.h>
#include <asm/segment.h>
+#include <asm/cache.h>
#ifndef __ASSEMBLY__
/*
@@ -43,8 +44,45 @@ enum cpu_type {
CPU_SH_NONE
};
+/*
+ * TLB information structure
+ *
+ * Defined for both I and D tlb, per-processor.
+ */
+struct tlb_info {
+ unsigned long long next;
+ unsigned long long first;
+ unsigned long long last;
+
+ unsigned int entries;
+ unsigned int step;
+
+ unsigned long flags;
+};
+
+struct sh_cpuinfo {
+ unsigned int type;
+ int cut_major, cut_minor;
+ unsigned long loops_per_jiffy;
+ unsigned long asid_cache;
+
+ struct cache_info icache; /* Primary I-cache */
+ struct cache_info dcache; /* Primary D-cache */
+ struct cache_info scache; /* Secondary cache */
+
+ /* TLB info */
+ struct tlb_info itlb;
+ struct tlb_info dtlb;
+
+ unsigned long flags;
+} __attribute__ ((aligned(L1_CACHE_BYTES)));
+
+extern struct sh_cpuinfo cpu_data[];
+#define boot_cpu_data cpu_data[0]
+#define current_cpu_data cpu_data[smp_processor_id()]
+#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
+
/* Forward decl */
-struct sh_cpuinfo;
struct seq_operations;
extern struct pt_regs fake_swapper_regs;