diff options
| author | Thomas Zimmermann <tzimmermann@suse.de> | 2020-04-17 08:12:22 +0200 |
|---|---|---|
| committer | Thomas Zimmermann <tzimmermann@suse.de> | 2020-04-17 08:12:22 +0200 |
| commit | 08d99b2c23dfa84ca5b5e5c194062a0550888b71 (patch) | |
| tree | f4cf81ba52b375bbafd3b7ee2603b3a4cae7fe30 /Documentation | |
| parent | 13e3d94110d82e318d640d0980896d32e02ba4d6 (diff) | |
| parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) | |
Merge drm/drm-next into drm-misc-next
Backmerging required to pull topic/phy-compliance.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'Documentation')
875 files changed, 36179 insertions, 16302 deletions
diff --git a/Documentation/.gitignore b/Documentation/.gitignore index e74fec8693b2..d6dc7c9b8e25 100644 --- a/Documentation/.gitignore +++ b/Documentation/.gitignore @@ -1,2 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only output *.pyc diff --git a/Documentation/ABI/obsolete/sysfs-kernel-fadump_enabled b/Documentation/ABI/obsolete/sysfs-kernel-fadump_enabled new file mode 100644 index 000000000000..e9c2de8b3688 --- /dev/null +++ b/Documentation/ABI/obsolete/sysfs-kernel-fadump_enabled @@ -0,0 +1,9 @@ +This ABI is renamed and moved to a new location /sys/kernel/fadump/enabled. + +What: /sys/kernel/fadump_enabled +Date: Feb 2012 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read only + Primarily used to identify whether the FADump is enabled in + the kernel or not. +User: Kdump service diff --git a/Documentation/ABI/obsolete/sysfs-kernel-fadump_registered b/Documentation/ABI/obsolete/sysfs-kernel-fadump_registered new file mode 100644 index 000000000000..0360be39c98e --- /dev/null +++ b/Documentation/ABI/obsolete/sysfs-kernel-fadump_registered @@ -0,0 +1,10 @@ +This ABI is renamed and moved to a new location /sys/kernel/fadump/registered.¬ + +What: /sys/kernel/fadump_registered +Date: Feb 2012 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read/write + Helps to control the dump collect feature from userspace. + Setting 1 to this file enables the system to collect the + dump and 0 to disable it. +User: Kdump service diff --git a/Documentation/ABI/obsolete/sysfs-kernel-fadump_release_mem b/Documentation/ABI/obsolete/sysfs-kernel-fadump_release_mem new file mode 100644 index 000000000000..6ce0b129ab12 --- /dev/null +++ b/Documentation/ABI/obsolete/sysfs-kernel-fadump_release_mem @@ -0,0 +1,10 @@ +This ABI is renamed and moved to a new location /sys/kernel/fadump/release_mem.¬ + +What: /sys/kernel/fadump_release_mem +Date: Feb 2012 +Contact: linuxppc-dev@lists.ozlabs.org +Description: write only + This is a special sysfs file and only available when + the system is booted to capture the vmcore using FADump. + It is used to release the memory reserved by FADump to + save the crash dump. diff --git a/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot b/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot new file mode 100644 index 000000000000..49ed9c8fd1e5 --- /dev/null +++ b/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot @@ -0,0 +1,23 @@ +What: /sys/fs/selinux/checkreqprot +Date: April 2005 (predates git) +KernelVersion: 2.6.12-rc2 (predates git) +Contact: selinux@vger.kernel.org +Description: + + The selinuxfs "checkreqprot" node allows SELinux to be configured + to check the protection requested by userspace for mmap/mprotect + calls instead of the actual protection applied by the kernel. + This was a compatibility mechanism for legacy userspace and + for the READ_IMPLIES_EXEC personality flag. However, if set to + 1, it weakens security by allowing mappings to be made executable + without authorization by policy. The default value of checkreqprot + at boot was changed starting in Linux v4.4 to 0 (i.e. check the + actual protection), and Android and Linux distributions have been + explicitly writing a "0" to /sys/fs/selinux/checkreqprot during + initialization for some time. Support for setting checkreqprot to 1 + will be removed in a future kernel release, at which point the kernel + will always cease using checkreqprot internally and will always + check the actual protections being applied upon mmap/mprotect calls. + The checkreqprot selinuxfs node will remain for backward compatibility + but will discard writes of the "0" value and will reject writes of the + "1" value when this mechanism is removed. diff --git a/Documentation/ABI/removed/sysfs-kernel-fadump_release_opalcore b/Documentation/ABI/removed/sysfs-kernel-fadump_release_opalcore new file mode 100644 index 000000000000..a8d46cd0f4e6 --- /dev/null +++ b/Documentation/ABI/removed/sysfs-kernel-fadump_release_opalcore @@ -0,0 +1,9 @@ +This ABI is moved to /sys/firmware/opal/mpipl/release_core. + +What: /sys/kernel/fadump_release_opalcore +Date: Sep 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: write only + The sysfs file is available when the system is booted to + collect the dump on OPAL based machine. It used to release + the memory used to collect the opalcore. diff --git a/Documentation/ABI/testing/sysfs-kernel-uids b/Documentation/ABI/removed/sysfs-kernel-uids index 4182b7061816..dc4463f190a7 100644 --- a/Documentation/ABI/testing/sysfs-kernel-uids +++ b/Documentation/ABI/removed/sysfs-kernel-uids @@ -1,5 +1,5 @@ What: /sys/kernel/uids/<uid>/cpu_shares -Date: December 2007 +Date: December 2007, finally removed in kernel v2.6.34-rc1 Contact: Dhaval Giani <dhaval@linux.vnet.ibm.com> Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com> Description: diff --git a/Documentation/ABI/testing/configfs-most b/Documentation/ABI/testing/configfs-most new file mode 100644 index 000000000000..ed67a4d9f6d6 --- /dev/null +++ b/Documentation/ABI/testing/configfs-most @@ -0,0 +1,196 @@ +What: /sys/kernel/config/most_<component> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: Interface is used to configure and connect device channels + to component drivers. + + Attributes are visible only when configfs is mounted. To mount + configfs in /sys/kernel/config directory use: + # mount -t configfs none /sys/kernel/config/ + + +What: /sys/kernel/config/most_cdev/<link> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: + The attributes: + + buffer_size configure the buffer size for this channel + + subbuffer_size configure the sub-buffer size for this channel + (needed for synchronous and isochrnous data) + + + num_buffers configure number of buffers used for this + channel + + datatype configure type of data that will travel over + this channel + + direction configure whether this link will be an input + or output + + dbr_size configure DBR data buffer size (this is used + for MediaLB communication only) + + packets_per_xact + configure the number of packets that will be + collected from the network before being + transmitted via USB (this is used for USB + communication only) + + device name of the device the link is to be attached to + + channel name of the channel the link is to be attached to + + comp_params pass parameters needed by some components + + create_link write '1' to this attribute to trigger the + creation of the link. In case of speculative + configuration, the creation is post-poned until + a physical device is being attached to the bus. + + destroy_link write '1' to this attribute to destroy an + active link + +What: /sys/kernel/config/most_video/<link> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: + The attributes: + + buffer_size configure the buffer size for this channel + + subbuffer_size configure the sub-buffer size for this channel + (needed for synchronous and isochrnous data) + + + num_buffers configure number of buffers used for this + channel + + datatype configure type of data that will travel over + this channel + + direction configure whether this link will be an input + or output + + dbr_size configure DBR data buffer size (this is used + for MediaLB communication only) + + packets_per_xact + configure the number of packets that will be + collected from the network before being + transmitted via USB (this is used for USB + communication only) + + device name of the device the link is to be attached to + + channel name of the channel the link is to be attached to + + comp_params pass parameters needed by some components + + create_link write '1' to this attribute to trigger the + creation of the link. In case of speculative + configuration, the creation is post-poned until + a physical device is being attached to the bus. + + destroy_link write '1' to this attribute to destroy an + active link + +What: /sys/kernel/config/most_net/<link> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: + The attributes: + + buffer_size configure the buffer size for this channel + + subbuffer_size configure the sub-buffer size for this channel + (needed for synchronous and isochrnous data) + + + num_buffers configure number of buffers used for this + channel + + datatype configure type of data that will travel over + this channel + + direction configure whether this link will be an input + or output + + dbr_size configure DBR data buffer size (this is used + for MediaLB communication only) + + packets_per_xact + configure the number of packets that will be + collected from the network before being + transmitted via USB (this is used for USB + communication only) + + device name of the device the link is to be attached to + + channel name of the channel the link is to be attached to + + comp_params pass parameters needed by some components + + create_link write '1' to this attribute to trigger the + creation of the link. In case of speculative + configuration, the creation is post-poned until + a physical device is being attached to the bus. + + destroy_link write '1' to this attribute to destroy an + active link + +What: /sys/kernel/config/most_sound/<card> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: + The attributes: + + create_card write '1' to this attribute to trigger the + registration of the sound card with the ALSA + subsystem. + +What: /sys/kernel/config/most_sound/<card>/<link> +Date: March 8, 2019 +KernelVersion: 5.2 +Description: + The attributes: + + buffer_size configure the buffer size for this channel + + subbuffer_size configure the sub-buffer size for this channel + (needed for synchronous and isochrnous data) + + + num_buffers configure number of buffers used for this + channel + + datatype configure type of data that will travel over + this channel + + direction configure whether this link will be an input + or output + + dbr_size configure DBR data buffer size (this is used + for MediaLB communication only) + + packets_per_xact + configure the number of packets that will be + collected from the network before being + transmitted via USB (this is used for USB + communication only) + + device name of the device the link is to be attached to + + channel name of the channel the link is to be attached to + + comp_params pass parameters needed by some components + + create_link write '1' to this attribute to trigger the + creation of the link. In case of speculative + configuration, the creation is post-poned until + a physical device is being attached to the bus. + + destroy_link write '1' to this attribute to destroy an + active link diff --git a/Documentation/ABI/testing/debugfs-driver-habanalabs b/Documentation/ABI/testing/debugfs-driver-habanalabs index f0ac14b70ecb..a73601c5121e 100644 --- a/Documentation/ABI/testing/debugfs-driver-habanalabs +++ b/Documentation/ABI/testing/debugfs-driver-habanalabs @@ -43,6 +43,20 @@ Description: Allows the root user to read or write directly through the If the IOMMU is disabled, it also allows the root user to read or write from the host a device VA of a host mapped memory +What: /sys/kernel/debug/habanalabs/hl<n>/data64 +Date: Jan 2020 +KernelVersion: 5.6 +Contact: oded.gabbay@gmail.com +Description: Allows the root user to read or write 64 bit data directly + through the device's PCI bar. Writing to this file generates a + write transaction while reading from the file generates a read + transaction. This custom interface is needed (instead of using + the generic Linux user-space PCI mapping) because the DDR bar + is very small compared to the DDR memory and only the driver can + move the bar before and after the transaction. + If the IOMMU is disabled, it also allows the root user to read + or write from the host a device VA of a host mapped memory + What: /sys/kernel/debug/habanalabs/hl<n>/device Date: Jan 2019 KernelVersion: 5.1 diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti new file mode 100644 index 000000000000..9d11502b4390 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti @@ -0,0 +1,241 @@ +What: /sys/bus/coresight/devices/<cti-name>/enable +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Enable/Disable the CTI hardware. + +What: /sys/bus/coresight/devices/<cti-name>/powered +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Indicate if the CTI hardware is powered. + +What: /sys/bus/coresight/devices/<cti-name>/ctmid +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Display the associated CTM ID + +What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Number of devices connected to triggers on this CTI + +What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Name of connected device <N> + +What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Input trigger signals from connected device <N> + +What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Functional types for the input trigger signals + from connected device <N> + +What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Output trigger signals to connected device <N> + +What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Functional types for the output trigger signals + to connected device <N> + +What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Select the index for inen and outen registers. + +What: /sys/bus/coresight/devices/<cti-name>/regs/inen +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Read or write the CTIINEN register selected by inout_sel. + +What: /sys/bus/coresight/devices/<cti-name>/regs/outen +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Read or write the CTIOUTEN register selected by inout_sel. + +What: /sys/bus/coresight/devices/<cti-name>/regs/gate +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Read or write CTIGATE register. + +What: /sys/bus/coresight/devices/<cti-name>/regs/asicctl +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Read or write ASICCTL register. + +What: /sys/bus/coresight/devices/<cti-name>/regs/intack +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Write the INTACK register. + +What: /sys/bus/coresight/devices/<cti-name>/regs/appset +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Set CTIAPPSET register to activate channel. Read back to + determine current value of register. + +What: /sys/bus/coresight/devices/<cti-name>/regs/appclear +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Write APPCLEAR register to deactivate channel. + +What: /sys/bus/coresight/devices/<cti-name>/regs/apppulse +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Write APPPULSE to pulse a channel active for one clock + cycle. + +What: /sys/bus/coresight/devices/<cti-name>/regs/chinstatus +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Read current status of channel inputs. + +What: /sys/bus/coresight/devices/<cti-name>/regs/choutstatus +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) read current status of channel outputs. + +What: /sys/bus/coresight/devices/<cti-name>/regs/triginstatus +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) read current status of input trigger signals + +What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) read current status of output trigger signals. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_attach +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Attach a CTI input trigger to a CTM channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_detach +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Detach a CTI input trigger from a CTM channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_attach +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Attach a CTI output trigger to a CTM channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_detach +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Detach a CTI output trigger from a CTM channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_enable +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Enable CTIGATE for single channel (W) or list enabled + channels through the gate (R). + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_disable +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Disable CTIGATE for single channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_set +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Activate a single channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_clear +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Deactivate a single channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_pulse +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Pulse a single channel - activate for a single clock cycle. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_filtered +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) List of output triggers filtered across all connections. + +What: /sys/bus/coresight/devices/<cti-name>/channels/trig_filter_enable +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Enable or disable trigger output signal filtering. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_inuse +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) show channels with at least one attached trigger signal. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_free +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) show channels with no attached trigger signals. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_sel +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (RW) Write channel number to select a channel to view, read to + see selected channel number. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_in +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Read to see input triggers connected to selected view + channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_out +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (R) Read to see output triggers connected to selected view + channel. + +What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_reset +Date: March 2020 +KernelVersion 5.7 +Contact: Mike Leach or Mathieu Poirier +Description: (W) Clear all channel / trigger programming. diff --git a/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8 b/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8 index 46b1f33b2fce..eac32180c40d 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8 +++ b/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8 @@ -1,3 +1,28 @@ +What: /sys/bus/counter/devices/counterX/signalY/cable_fault +KernelVersion: 5.7 +Contact: linux-iio@vger.kernel.org +Description: + Read-only attribute that indicates whether a differential + encoder cable fault (not connected or loose wires) is detected + for the respective channel of Signal Y. Valid attribute values + are boolean. Detection must first be enabled via the + corresponding cable_fault_enable attribute. + +What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable +KernelVersion: 5.7 +Contact: linux-iio@vger.kernel.org +Description: + Whether detection of differential encoder cable faults for the + respective channel of Signal Y is enabled. Valid attribute + values are boolean. + +What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler +KernelVersion: 5.7 +Contact: linux-iio@vger.kernel.org +Description: + Filter clock factor for input Signal Y. This prescaler value + affects the inputs of both quadrature pair signals. + What: /sys/bus/counter/devices/counterX/signalY/index_polarity KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 index 7627d3be08f5..f8315202c8f0 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 @@ -2,17 +2,22 @@ What: /sys/bus/iio/devices/iio:deviceX/ac_excitation_en KernelVersion: Contact: linux-iio@vger.kernel.org Description: - Reading gives the state of AC excitation. - Writing '1' enables AC excitation. + This attribute, if available, is used to enable the AC + excitation mode found on some converters. In ac excitation mode, + the polarity of the excitation voltage is reversed on + alternate cycles, to eliminate DC errors. What: /sys/bus/iio/devices/iio:deviceX/bridge_switch_en KernelVersion: Contact: linux-iio@vger.kernel.org Description: - This bridge switch is used to disconnect it when there is a - need to minimize the system current consumption. - Reading gives the state of the bridge switch. - Writing '1' enables the bridge switch. + This attribute, if available, is used to close or open the + bridge power down switch found on some converters. + In bridge applications, such as strain gauges and load cells, + the bridge itself consumes the majority of the current in the + system. To minimize the current consumption of the system, + the bridge can be disconnected (when it is not being used + using the bridge_switch_en attribute. What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration KernelVersion: @@ -21,6 +26,13 @@ Description: Initiates the system calibration procedure. This is done on a single channel at a time. Write '1' to start the calibration. +What: /sys/bus/iio/devices/iio:deviceX/in_voltage2-voltage2_shorted_raw +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + Measure voltage from AIN2 pin connected to AIN(+) + and AIN(-) shorted. + What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration_mode_available KernelVersion: Contact: linux-iio@vger.kernel.org diff --git a/Documentation/ABI/testing/sysfs-bus-intel_th-devices-msc b/Documentation/ABI/testing/sysfs-bus-intel_th-devices-msc index 456cb62b384c..7fd2601c2831 100644 --- a/Documentation/ABI/testing/sysfs-bus-intel_th-devices-msc +++ b/Documentation/ABI/testing/sysfs-bus-intel_th-devices-msc @@ -40,3 +40,11 @@ Description: (RW) Trigger window switch for the MSC's buffer, in triggering a window switch for the buffer. Returns an error in any other operating mode or attempts to write something other than "1". +What: /sys/bus/intel_th/devices/<intel_th_id>-msc<msc-id>/stop_on_full +Date: March 2020 +KernelVersion: 5.7 +Contact: Alexander Shishkin <alexander.shishkin@linux.intel.com> +Description: (RW) Configure whether trace stops when the last available window + becomes full (1/y/Y) or wraps around and continues until the next + window becomes available again (0/n/N). + diff --git a/Documentation/ABI/testing/sysfs-bus-most b/Documentation/ABI/testing/sysfs-bus-most new file mode 100644 index 000000000000..6b1d06e3285e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-most @@ -0,0 +1,295 @@ +What: /sys/bus/most/devices/.../description +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Provides information about the interface type and the physical + location of the device. Hardware attached via USB, for instance, + might return <1-1.1:1.0> +Users: + +What: /sys/bus/most/devices/.../interface +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the type of peripheral interface the device uses. +Users: + +What: /sys/bus/most/devices/.../dci +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + If the network interface controller is attached via USB, a dci + directory is created that allows applications to read and + write the controller's DCI registers. +Users: + +What: /sys/bus/most/devices/.../dci/arb_address +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to set an arbitrary DCI register address an + application wants to read from or write to. +Users: + +What: /sys/bus/most/devices/.../dci/arb_value +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to read and write the DCI register whose address + is stored in arb_address. +Users: + +What: /sys/bus/most/devices/.../dci/mep_eui48_hi +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MAC address. +Users: + +What: /sys/bus/most/devices/.../dci/mep_eui48_lo +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MAC address. +Users: + +What: /sys/bus/most/devices/.../dci/mep_eui48_mi +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MAC address. +Users: + +What: /sys/bus/most/devices/.../dci/mep_filter +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MEP filter address. +Users: + +What: /sys/bus/most/devices/.../dci/mep_hash0 +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MEP hash table. +Users: + +What: /sys/bus/most/devices/.../dci/mep_hash1 +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MEP hash table. +Users: + +What: /sys/bus/most/devices/.../dci/mep_hash2 +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MEP hash table. +Users: + +What: /sys/bus/most/devices/.../dci/mep_hash3 +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to check and configure the MEP hash table. +Users: + +What: /sys/bus/most/devices/.../dci/ni_state +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the current network interface state. +Users: + +What: /sys/bus/most/devices/.../dci/node_address +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the current node address. +Users: + +What: /sys/bus/most/devices/.../dci/node_position +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the current node position. +Users: + +What: /sys/bus/most/devices/.../dci/packet_bandwidth +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the configured packet bandwidth. +Users: + +What: /sys/bus/most/devices/.../dci/sync_ep +Date: June 2016 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Triggers the controller's synchronization process for a certain + endpoint. +Users: + +What: /sys/bus/most/devices/.../<channel>/ +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + For every channel of the device a directory is created, whose + name is dictated by the HDM. This enables an application to + collect information about the channel's capabilities and + configure it. +Users: + +What: /sys/bus/most/devices/.../<channel>/available_datatypes +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the data types the current channel can transport. +Users: + +What: /sys/bus/most/devices/.../<channel>/available_directions +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the directions the current channel is capable of. +Users: + +What: /sys/bus/most/devices/.../<channel>/number_of_packet_buffers +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the number of packet buffers the current channel can + handle. +Users: + +What: /sys/bus/most/devices/.../<channel>/number_of_stream_buffers +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the number of streaming buffers the current channel can + handle. +Users: + +What: /sys/bus/most/devices/.../<channel>/size_of_packet_buffer +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the size of a packet buffer the current channel can + handle. +Users: + +What: /sys/bus/most/devices/.../<channel>/size_of_stream_buffer +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates the size of a streaming buffer the current channel can + handle. +Users: + +What: /sys/bus/most/devices/.../<channel>/set_number_of_buffers +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the number of buffers of the current channel. +Users: + +What: /sys/bus/most/devices/.../<channel>/set_buffer_size +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the size of a buffer of the current channel. +Users: + +What: /sys/bus/most/devices/.../<channel>/set_direction +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the direction of the current channel. + The following strings will be accepted: + 'dir_tx', + 'dir_rx' +Users: + +What: /sys/bus/most/devices/.../<channel>/set_datatype +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the data type of the current channel. + The following strings will be accepted: + 'control', + 'async', + 'sync', + 'isoc_avp' +Users: + +What: /sys/bus/most/devices/.../<channel>/set_subbuffer_size +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the subbuffer size of the current channel. +Users: + +What: /sys/bus/most/devices/.../<channel>/set_packets_per_xact +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is to configure the number of packets per transaction of + the current channel. This is only needed network interface + controller is attached via USB. +Users: + +What: /sys/bus/most/devices/.../<channel>/channel_starving +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + Indicates whether current channel ran out of buffers. +Users: + +What: /sys/bus/most/drivers/most_core/components +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to retrieve a list of registered components. +Users: + +What: /sys/bus/most/drivers/most_core/links +Date: March 2017 +KernelVersion: 4.15 +Contact: Christian Gromm <christian.gromm@microchip.com> +Description: + This is used to retrieve a list of established links. +Users: diff --git a/Documentation/ABI/testing/sysfs-class-typec b/Documentation/ABI/testing/sysfs-class-typec index d7647b258c3c..b834671522d6 100644 --- a/Documentation/ABI/testing/sysfs-class-typec +++ b/Documentation/ABI/testing/sysfs-class-typec @@ -20,13 +20,13 @@ Date: April 2017 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> Description: The supported power roles. This attribute can be used to request - power role swap on the port when the port supports USB Power - Delivery. Swapping is supported as synchronous operation, so - write(2) to the attribute will not return until the operation - has finished. The attribute is notified about role changes so - that poll(2) on the attribute wakes up. Change on the role will - also generate uevent KOBJ_CHANGE. The current role is show in - brackets, for example "[source] sink" when in source mode. + power role swap on the port. Swapping is supported as + synchronous operation, so write(2) to the attribute will not + return until the operation has finished. The attribute is + notified about role changes so that poll(2) on the attribute + wakes up. Change on the role will also generate uevent + KOBJ_CHANGE. The current role is show in brackets, for example + "[source] sink" when in source mode. Valid values: source, sink @@ -108,6 +108,15 @@ Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> Description: Revision number of the supported USB Type-C specification. +What: /sys/class/typec/<port>/orientation +Date: February 2020 +Contact: Badhri Jagan Sridharan <badhri@google.com> +Description: + Indicates the active orientation of the Type-C connector. + Valid values: + - "normal": CC1 orientation + - "reverse": CC2 orientation + - "unknown": Orientation cannot be determined. USB Type-C partner devices (eg. /sys/class/typec/port0-partner/) diff --git a/Documentation/ABI/testing/sysfs-driver-jz4780-efuse b/Documentation/ABI/testing/sysfs-driver-jz4780-efuse new file mode 100644 index 000000000000..bb6f5d6ceea0 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-jz4780-efuse @@ -0,0 +1,16 @@ +What: /sys/devices/*/<our-device>/nvmem +Date: December 2017 +Contact: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> +Description: read-only access to the efuse on the Ingenic JZ4780 SoC + The SoC has a one time programmable 8K efuse that is + split into segments. The driver supports read only. + The segments are + 0x000 64 bit Random Number + 0x008 128 bit Ingenic Chip ID + 0x018 128 bit Customer ID + 0x028 3520 bit Reserved + 0x1E0 8 bit Protect Segment + 0x1E1 2296 bit HDMI Key + 0x300 2048 bit Security boot key +Users: any user space application which wants to read the Chip + and Customer ID diff --git a/Documentation/ABI/testing/sysfs-driver-uacce b/Documentation/ABI/testing/sysfs-driver-uacce new file mode 100644 index 000000000000..08f2591138af --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-uacce @@ -0,0 +1,39 @@ +What: /sys/class/uacce/<dev_name>/api +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Api of the device + Can be any string and up to userspace to parse. + Application use the api to match the correct driver + +What: /sys/class/uacce/<dev_name>/flags +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Attributes of the device, see UACCE_DEV_xxx flag defined in uacce.h + +What: /sys/class/uacce/<dev_name>/available_instances +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Available instances left of the device + Return -ENODEV if uacce_ops get_available_instances is not provided + +What: /sys/class/uacce/<dev_name>/algorithms +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Algorithms supported by this accelerator, separated by new line. + Can be any string and up to userspace to parse. + +What: /sys/class/uacce/<dev_name>/region_mmio_size +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Size (bytes) of mmio region queue file + +What: /sys/class/uacce/<dev_name>/region_dus_size +Date: Feb 2020 +KernelVersion: 5.7 +Contact: linux-accelerators@lists.ozlabs.org +Description: Size (bytes) of dus region queue file diff --git a/Documentation/ABI/testing/sysfs-firmware-opal-sensor-groups b/Documentation/ABI/testing/sysfs-firmware-opal-sensor-groups new file mode 100644 index 000000000000..3a2dfe542e8c --- /dev/null +++ b/Documentation/ABI/testing/sysfs-firmware-opal-sensor-groups @@ -0,0 +1,21 @@ +What: /sys/firmware/opal/sensor_groups +Date: August 2017 +Contact: Linux for PowerPC mailing list <linuxppc-dev@ozlabs.org> +Description: Sensor groups directory for POWER9 powernv servers + + Each folder in this directory contains a sensor group + which are classified based on type of the sensor + like power, temperature, frequency, current, etc. They + can also indicate the group of sensors belonging to + different owners like CSM, Profiler, Job-Scheduler + +What: /sys/firmware/opal/sensor_groups/<sensor_group_name>/clear +Date: August 2017 +Contact: Linux for PowerPC mailing list <linuxppc-dev@ozlabs.org> +Description: Sysfs file to clear the min-max of all the sensors + belonging to the group. + + Writing 1 to this file will clear the minimum and + maximum values of all the sensors in the group. + In POWER9, the min-max of a sensor is the historical minimum + and maximum value of the sensor cached by OCC. diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 1a6cd5397129..bd8a0d19abe6 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -318,3 +318,8 @@ Date: September 2019 Contact: "Hridya Valsaraju" <hridya@google.com> Description: Average number of valid blocks. Available when CONFIG_F2FS_STAT_FS=y. + +What: /sys/fs/f2fs/<disk>/mounted_time_sec +Date: February 2020 +Contact: "Jaegeuk Kim" <jaegeuk@kernel.org> +Description: Show the mounted time in secs of this partition. diff --git a/Documentation/ABI/testing/sysfs-kernel-fadump b/Documentation/ABI/testing/sysfs-kernel-fadump new file mode 100644 index 000000000000..8f7a64a81783 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-kernel-fadump @@ -0,0 +1,40 @@ +What: /sys/kernel/fadump/* +Date: Dec 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: + The /sys/kernel/fadump/* is a collection of FADump sysfs + file provide information about the configuration status + of Firmware Assisted Dump (FADump). + +What: /sys/kernel/fadump/enabled +Date: Dec 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read only + Primarily used to identify whether the FADump is enabled in + the kernel or not. +User: Kdump service + +What: /sys/kernel/fadump/registered +Date: Dec 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read/write + Helps to control the dump collect feature from userspace. + Setting 1 to this file enables the system to collect the + dump and 0 to disable it. +User: Kdump service + +What: /sys/kernel/fadump/release_mem +Date: Dec 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: write only + This is a special sysfs file and only available when + the system is booted to capture the vmcore using FADump. + It is used to release the memory reserved by FADump to + save the crash dump. + +What: /sys/kernel/fadump/mem_reserved +Date: Dec 2019 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read only + Provide information about the amount of memory reserved by + FADump to save the crash dump in bytes. diff --git a/Documentation/ABI/testing/sysfs-platform-dell-laptop b/Documentation/ABI/testing/sysfs-platform-dell-laptop index 8c6a0b8e1131..9b917c7453de 100644 --- a/Documentation/ABI/testing/sysfs-platform-dell-laptop +++ b/Documentation/ABI/testing/sysfs-platform-dell-laptop @@ -2,7 +2,7 @@ What: /sys/class/leds/dell::kbd_backlight/als_enabled Date: December 2014 KernelVersion: 3.19 Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>, - Pali Rohár <pali.rohar@gmail.com> + Pali Rohár <pali@kernel.org> Description: This file allows to control the automatic keyboard illumination mode on some systems that have an ambient @@ -13,7 +13,7 @@ What: /sys/class/leds/dell::kbd_backlight/als_setting Date: December 2014 KernelVersion: 3.19 Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>, - Pali Rohár <pali.rohar@gmail.com> + Pali Rohár <pali@kernel.org> Description: This file allows to specifiy the on/off threshold value, as reported by the ambient light sensor. @@ -22,7 +22,7 @@ What: /sys/class/leds/dell::kbd_backlight/start_triggers Date: December 2014 KernelVersion: 3.19 Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>, - Pali Rohár <pali.rohar@gmail.com> + Pali Rohár <pali@kernel.org> Description: This file allows to control the input triggers that turn on the keyboard backlight illumination that is @@ -45,7 +45,7 @@ What: /sys/class/leds/dell::kbd_backlight/stop_timeout Date: December 2014 KernelVersion: 3.19 Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>, - Pali Rohár <pali.rohar@gmail.com> + Pali Rohár <pali@kernel.org> Description: This file allows to specify the interval after which the keyboard illumination is disabled because of inactivity. diff --git a/Documentation/ABI/testing/sysfs-tty b/Documentation/ABI/testing/sysfs-tty index 9eb3c2b6b040..e157130a6792 100644 --- a/Documentation/ABI/testing/sysfs-tty +++ b/Documentation/ABI/testing/sysfs-tty @@ -154,3 +154,10 @@ Description: device specification. For example, when user sets 7bytes on 16550A, which has 1/4/8/14 bytes trigger, the RX trigger is automatically changed to 4 bytes. + +What: /sys/class/tty/ttyS0/console +Date: February 2020 +Contact: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Description: + Allows user to detach or attach back the given device as + kernel console. It shows and accepts a boolean variable. diff --git a/Documentation/EDID/1024x768.S b/Documentation/EDID/1024x768.S deleted file mode 100644 index 4aed3f9ab88a..000000000000 --- a/Documentation/EDID/1024x768.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - 1024x768.S: EDID data set for standard 1024x768 60 Hz monitor - - Copyright (C) 2011 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 65000 /* kHz */ -#define XPIX 1024 -#define YPIX 768 -#define XY_RATIO XY_RATIO_4_3 -#define XBLANK 320 -#define YBLANK 38 -#define XOFFSET 8 -#define XPULSE 144 -#define YOFFSET 3 -#define YPULSE 6 -#define DPI 72 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux XGA" -#define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */ -#define HSYNC_POL 0 -#define VSYNC_POL 0 - -#include "edid.S" diff --git a/Documentation/EDID/1280x1024.S b/Documentation/EDID/1280x1024.S deleted file mode 100644 index b26dd424cad7..000000000000 --- a/Documentation/EDID/1280x1024.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - 1280x1024.S: EDID data set for standard 1280x1024 60 Hz monitor - - Copyright (C) 2011 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 108000 /* kHz */ -#define XPIX 1280 -#define YPIX 1024 -#define XY_RATIO XY_RATIO_5_4 -#define XBLANK 408 -#define YBLANK 42 -#define XOFFSET 48 -#define XPULSE 112 -#define YOFFSET 1 -#define YPULSE 3 -#define DPI 72 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux SXGA" -/* No ESTABLISHED_TIMINGx_BITS */ -#define HSYNC_POL 1 -#define VSYNC_POL 1 - -#include "edid.S" diff --git a/Documentation/EDID/1600x1200.S b/Documentation/EDID/1600x1200.S deleted file mode 100644 index 0d091b282768..000000000000 --- a/Documentation/EDID/1600x1200.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - 1600x1200.S: EDID data set for standard 1600x1200 60 Hz monitor - - Copyright (C) 2013 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 162000 /* kHz */ -#define XPIX 1600 -#define YPIX 1200 -#define XY_RATIO XY_RATIO_4_3 -#define XBLANK 560 -#define YBLANK 50 -#define XOFFSET 64 -#define XPULSE 192 -#define YOFFSET 1 -#define YPULSE 3 -#define DPI 72 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux UXGA" -/* No ESTABLISHED_TIMINGx_BITS */ -#define HSYNC_POL 1 -#define VSYNC_POL 1 - -#include "edid.S" diff --git a/Documentation/EDID/1680x1050.S b/Documentation/EDID/1680x1050.S deleted file mode 100644 index 7dfed9a33eab..000000000000 --- a/Documentation/EDID/1680x1050.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - 1680x1050.S: EDID data set for standard 1680x1050 60 Hz monitor - - Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 146250 /* kHz */ -#define XPIX 1680 -#define YPIX 1050 -#define XY_RATIO XY_RATIO_16_10 -#define XBLANK 560 -#define YBLANK 39 -#define XOFFSET 104 -#define XPULSE 176 -#define YOFFSET 3 -#define YPULSE 6 -#define DPI 96 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux WSXGA" -/* No ESTABLISHED_TIMINGx_BITS */ -#define HSYNC_POL 1 -#define VSYNC_POL 1 - -#include "edid.S" diff --git a/Documentation/EDID/1920x1080.S b/Documentation/EDID/1920x1080.S deleted file mode 100644 index d6ffbba28e95..000000000000 --- a/Documentation/EDID/1920x1080.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - 1920x1080.S: EDID data set for standard 1920x1080 60 Hz monitor - - Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 148500 /* kHz */ -#define XPIX 1920 -#define YPIX 1080 -#define XY_RATIO XY_RATIO_16_9 -#define XBLANK 280 -#define YBLANK 45 -#define XOFFSET 88 -#define XPULSE 44 -#define YOFFSET 4 -#define YPULSE 5 -#define DPI 96 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux FHD" -/* No ESTABLISHED_TIMINGx_BITS */ -#define HSYNC_POL 1 -#define VSYNC_POL 1 - -#include "edid.S" diff --git a/Documentation/EDID/800x600.S b/Documentation/EDID/800x600.S deleted file mode 100644 index a5616588de08..000000000000 --- a/Documentation/EDID/800x600.S +++ /dev/null @@ -1,40 +0,0 @@ -/* - 800x600.S: EDID data set for standard 800x600 60 Hz monitor - - Copyright (C) 2011 Carsten Emde <C.Emde@osadl.org> - Copyright (C) 2014 Linaro Limited - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. -*/ - -/* EDID */ -#define VERSION 1 -#define REVISION 3 - -/* Display */ -#define CLOCK 40000 /* kHz */ -#define XPIX 800 -#define YPIX 600 -#define XY_RATIO XY_RATIO_4_3 -#define XBLANK 256 -#define YBLANK 28 -#define XOFFSET 40 -#define XPULSE 128 -#define YOFFSET 1 -#define YPULSE 4 -#define DPI 72 -#define VFREQ 60 /* Hz */ -#define TIMING_NAME "Linux SVGA" -#define ESTABLISHED_TIMING1_BITS 0x01 /* Bit 0: 800x600 @ 60Hz */ -#define HSYNC_POL 1 -#define VSYNC_POL 1 - -#include "edid.S" diff --git a/Documentation/EDID/Makefile b/Documentation/EDID/Makefile deleted file mode 100644 index 85a927dfab02..000000000000 --- a/Documentation/EDID/Makefile +++ /dev/null @@ -1,37 +0,0 @@ - -SOURCES := $(wildcard [0-9]*x[0-9]*.S) - -BIN := $(patsubst %.S, %.bin, $(SOURCES)) - -IHEX := $(patsubst %.S, %.bin.ihex, $(SOURCES)) - -CODE := $(patsubst %.S, %.c, $(SOURCES)) - -all: $(BIN) $(IHEX) $(CODE) - -clean: - @rm -f *.o *.bin.ihex *.bin *.c - -%.o: %.S - @cc -c $^ - -%.bin.nocrc: %.o - @objcopy -Obinary $^ $@ - -%.crc: %.bin.nocrc - @list=$$(for i in `seq 1 127`; do head -c$$i $^ | tail -c1 \ - | hexdump -v -e '/1 "%02X+"'; done); \ - echo "ibase=16;100-($${list%?})%100" | bc >$@ - -%.p: %.crc %.S - @cc -c -DCRC="$$(cat $*.crc)" -o $@ $*.S - -%.bin: %.p - @objcopy -Obinary $^ $@ - -%.bin.ihex: %.p - @objcopy -Oihex $^ $@ - @dos2unix $@ 2>/dev/null - -%.c: %.bin - @echo "{" >$@; hexdump -f hex $^ >>$@; echo "};" >>$@ diff --git a/Documentation/EDID/edid.S b/Documentation/EDID/edid.S deleted file mode 100644 index c3d13815526d..000000000000 --- a/Documentation/EDID/edid.S +++ /dev/null @@ -1,274 +0,0 @@ -/* - edid.S: EDID data template - - Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org> - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -*/ - - -/* Manufacturer */ -#define MFG_LNX1 'L' -#define MFG_LNX2 'N' -#define MFG_LNX3 'X' -#define SERIAL 0 -#define YEAR 2012 -#define WEEK 5 - -/* EDID 1.3 standard definitions */ -#define XY_RATIO_16_10 0b00 -#define XY_RATIO_4_3 0b01 -#define XY_RATIO_5_4 0b10 -#define XY_RATIO_16_9 0b11 - -/* Provide defaults for the timing bits */ -#ifndef ESTABLISHED_TIMING1_BITS -#define ESTABLISHED_TIMING1_BITS 0x00 -#endif -#ifndef ESTABLISHED_TIMING2_BITS -#define ESTABLISHED_TIMING2_BITS 0x00 -#endif -#ifndef ESTABLISHED_TIMING3_BITS -#define ESTABLISHED_TIMING3_BITS 0x00 -#endif - -#define mfgname2id(v1,v2,v3) \ - ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) -#define swap16(v1) ((v1>>8)+((v1&0xff)<<8)) -#define lsbs2(v1,v2) (((v1&0x0f)<<4)+(v2&0x0f)) -#define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f)) -#define msbs4(v1,v2,v3,v4) \ - ((((v1>>8)&0x03)<<6)+(((v2>>8)&0x03)<<4)+\ - (((v3>>4)&0x03)<<2)+((v4>>4)&0x03)) -#define pixdpi2mm(pix,dpi) ((pix*25)/dpi) -#define xsize pixdpi2mm(XPIX,DPI) -#define ysize pixdpi2mm(YPIX,DPI) - - .data - -/* Fixed header pattern */ -header: .byte 0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00 - -mfg_id: .hword swap16(mfgname2id(MFG_LNX1, MFG_LNX2, MFG_LNX3)) - -prod_code: .hword 0 - -/* Serial number. 32 bits, little endian. */ -serial_number: .long SERIAL - -/* Week of manufacture */ -week: .byte WEEK - -/* Year of manufacture, less 1990. (1990-2245) - If week=255, it is the model year instead */ -year: .byte YEAR-1990 - -version: .byte VERSION /* EDID version, usually 1 (for 1.3) */ -revision: .byte REVISION /* EDID revision, usually 3 (for 1.3) */ - -/* If Bit 7=1 Digital input. If set, the following bit definitions apply: - Bits 6-1 Reserved, must be 0 - Bit 0 Signal is compatible with VESA DFP 1.x TMDS CRGB, - 1 pixel per clock, up to 8 bits per color, MSB aligned, - If Bit 7=0 Analog input. If clear, the following bit definitions apply: - Bits 6-5 Video white and sync levels, relative to blank - 00=+0.7/-0.3 V; 01=+0.714/-0.286 V; - 10=+1.0/-0.4 V; 11=+0.7/0 V - Bit 4 Blank-to-black setup (pedestal) expected - Bit 3 Separate sync supported - Bit 2 Composite sync (on HSync) supported - Bit 1 Sync on green supported - Bit 0 VSync pulse must be serrated when somposite or - sync-on-green is used. */ -video_parms: .byte 0x6d - -/* Maximum horizontal image size, in centimetres - (max 292 cm/115 in at 16:9 aspect ratio) */ -max_hor_size: .byte xsize/10 - -/* Maximum vertical image size, in centimetres. - If either byte is 0, undefined (e.g. projector) */ -max_vert_size: .byte ysize/10 - -/* Display gamma, minus 1, times 100 (range 1.00-3.5 */ -gamma: .byte 120 - -/* Bit 7 DPMS standby supported - Bit 6 DPMS suspend supported - Bit 5 DPMS active-off supported - Bits 4-3 Display type: 00=monochrome; 01=RGB colour; - 10=non-RGB multicolour; 11=undefined - Bit 2 Standard sRGB colour space. Bytes 25-34 must contain - sRGB standard values. - Bit 1 Preferred timing mode specified in descriptor block 1. - Bit 0 GTF supported with default parameter values. */ -dsp_features: .byte 0xea - -/* Chromaticity coordinates. */ -/* Red and green least-significant bits - Bits 7-6 Red x value least-significant 2 bits - Bits 5-4 Red y value least-significant 2 bits - Bits 3-2 Green x value lst-significant 2 bits - Bits 1-0 Green y value least-significant 2 bits */ -red_green_lsb: .byte 0x5e - -/* Blue and white least-significant 2 bits */ -blue_white_lsb: .byte 0xc0 - -/* Red x value most significant 8 bits. - 0-255 encodes 0-0.996 (255/256); 0-0.999 (1023/1024) with lsbits */ -red_x_msb: .byte 0xa4 - -/* Red y value most significant 8 bits */ -red_y_msb: .byte 0x59 - -/* Green x and y value most significant 8 bits */ -green_x_y_msb: .byte 0x4a,0x98 - -/* Blue x and y value most significant 8 bits */ -blue_x_y_msb: .byte 0x25,0x20 - -/* Default white point x and y value most significant 8 bits */ -white_x_y_msb: .byte 0x50,0x54 - -/* Established timings */ -/* Bit 7 720x400 @ 70 Hz - Bit 6 720x400 @ 88 Hz - Bit 5 640x480 @ 60 Hz - Bit 4 640x480 @ 67 Hz - Bit 3 640x480 @ 72 Hz - Bit 2 640x480 @ 75 Hz - Bit 1 800x600 @ 56 Hz - Bit 0 800x600 @ 60 Hz */ -estbl_timing1: .byte ESTABLISHED_TIMING1_BITS - -/* Bit 7 800x600 @ 72 Hz - Bit 6 800x600 @ 75 Hz - Bit 5 832x624 @ 75 Hz - Bit 4 1024x768 @ 87 Hz, interlaced (1024x768) - Bit 3 1024x768 @ 60 Hz - Bit 2 1024x768 @ 72 Hz - Bit 1 1024x768 @ 75 Hz - Bit 0 1280x1024 @ 75 Hz */ -estbl_timing2: .byte ESTABLISHED_TIMING2_BITS - -/* Bit 7 1152x870 @ 75 Hz (Apple Macintosh II) - Bits 6-0 Other manufacturer-specific display mod */ -estbl_timing3: .byte ESTABLISHED_TIMING3_BITS - -/* Standard timing */ -/* X resolution, less 31, divided by 8 (256-2288 pixels) */ -std_xres: .byte (XPIX/8)-31 -/* Y resolution, X:Y pixel ratio - Bits 7-6 X:Y pixel ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9. - Bits 5-0 Vertical frequency, less 60 (60-123 Hz) */ -std_vres: .byte (XY_RATIO<<6)+VFREQ-60 - .fill 7,2,0x0101 /* Unused */ - -descriptor1: -/* Pixel clock in 10 kHz units. (0.-655.35 MHz, little-endian) */ -clock: .hword CLOCK/10 - -/* Horizontal active pixels 8 lsbits (0-4095) */ -x_act_lsb: .byte XPIX&0xff -/* Horizontal blanking pixels 8 lsbits (0-4095) - End of active to start of next active. */ -x_blk_lsb: .byte XBLANK&0xff -/* Bits 7-4 Horizontal active pixels 4 msbits - Bits 3-0 Horizontal blanking pixels 4 msbits */ -x_msbs: .byte msbs2(XPIX,XBLANK) - -/* Vertical active lines 8 lsbits (0-4095) */ -y_act_lsb: .byte YPIX&0xff -/* Vertical blanking lines 8 lsbits (0-4095) */ -y_blk_lsb: .byte YBLANK&0xff -/* Bits 7-4 Vertical active lines 4 msbits - Bits 3-0 Vertical blanking lines 4 msbits */ -y_msbs: .byte msbs2(YPIX,YBLANK) - -/* Horizontal sync offset pixels 8 lsbits (0-1023) From blanking start */ -x_snc_off_lsb: .byte XOFFSET&0xff -/* Horizontal sync pulse width pixels 8 lsbits (0-1023) */ -x_snc_pls_lsb: .byte XPULSE&0xff -/* Bits 7-4 Vertical sync offset lines 4 lsbits (0-63) - Bits 3-0 Vertical sync pulse width lines 4 lsbits (0-63) */ -y_snc_lsb: .byte lsbs2(YOFFSET, YPULSE) -/* Bits 7-6 Horizontal sync offset pixels 2 msbits - Bits 5-4 Horizontal sync pulse width pixels 2 msbits - Bits 3-2 Vertical sync offset lines 2 msbits - Bits 1-0 Vertical sync pulse width lines 2 msbits */ -xy_snc_msbs: .byte msbs4(XOFFSET,XPULSE,YOFFSET,YPULSE) - -/* Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in) */ -x_dsp_size: .byte xsize&0xff - -/* Vertical display size, mm, 8 lsbits (0-4095 mm, 161 in) */ -y_dsp_size: .byte ysize&0xff - -/* Bits 7-4 Horizontal display size, mm, 4 msbits - Bits 3-0 Vertical display size, mm, 4 msbits */ -dsp_size_mbsb: .byte msbs2(xsize,ysize) - -/* Horizontal border pixels (each side; total is twice this) */ -x_border: .byte 0 -/* Vertical border lines (each side; total is twice this) */ -y_border: .byte 0 - -/* Bit 7 Interlaced - Bits 6-5 Stereo mode: 00=No stereo; other values depend on bit 0: - Bit 0=0: 01=Field sequential, sync=1 during right; 10=similar, - sync=1 during left; 11=4-way interleaved stereo - Bit 0=1 2-way interleaved stereo: 01=Right image on even lines; - 10=Left image on even lines; 11=side-by-side - Bits 4-3 Sync type: 00=Analog composite; 01=Bipolar analog composite; - 10=Digital composite (on HSync); 11=Digital separate - Bit 2 If digital separate: Vertical sync polarity (1=positive) - Other types: VSync serrated (HSync during VSync) - Bit 1 If analog sync: Sync on all 3 RGB lines (else green only) - Digital: HSync polarity (1=positive) - Bit 0 2-way line-interleaved stereo, if bits 4-3 are not 00. */ -features: .byte 0x18+(VSYNC_POL<<2)+(HSYNC_POL<<1) - -descriptor2: .byte 0,0 /* Not a detailed timing descriptor */ - .byte 0 /* Must be zero */ - .byte 0xff /* Descriptor is monitor serial number (text) */ - .byte 0 /* Must be zero */ -start1: .ascii "Linux #0" -end1: .byte 0x0a /* End marker */ - .fill 12-(end1-start1), 1, 0x20 /* Padded spaces */ -descriptor3: .byte 0,0 /* Not a detailed timing descriptor */ - .byte 0 /* Must be zero */ - .byte 0xfd /* Descriptor is monitor range limits */ - .byte 0 /* Must be zero */ -start2: .byte VFREQ-1 /* Minimum vertical field rate (1-255 Hz) */ - .byte VFREQ+1 /* Maximum vertical field rate (1-255 Hz) */ - .byte (CLOCK/(XPIX+XBLANK))-1 /* Minimum horizontal line rate - (1-255 kHz) */ - .byte (CLOCK/(XPIX+XBLANK))+1 /* Maximum horizontal line rate - (1-255 kHz) */ - .byte (CLOCK/10000)+1 /* Maximum pixel clock rate, rounded up - to 10 MHz multiple (10-2550 MHz) */ - .byte 0 /* No extended timing information type */ -end2: .byte 0x0a /* End marker */ - .fill 12-(end2-start2), 1, 0x20 /* Padded spaces */ -descriptor4: .byte 0,0 /* Not a detailed timing descriptor */ - .byte 0 /* Must be zero */ - .byte 0xfc /* Descriptor is text */ - .byte 0 /* Must be zero */ -start3: .ascii TIMING_NAME -end3: .byte 0x0a /* End marker */ - .fill 12-(end3-start3), 1, 0x20 /* Padded spaces */ -extensions: .byte 0 /* Number of extensions to follow */ -checksum: .byte CRC /* Sum of all bytes must be 0 */ diff --git a/Documentation/EDID/hex b/Documentation/EDID/hex deleted file mode 100644 index 8873ebb618af..000000000000 --- a/Documentation/EDID/hex +++ /dev/null @@ -1 +0,0 @@ -"\t" 8/1 "0x%02x, " "\n" diff --git a/Documentation/Makefile b/Documentation/Makefile index d77bb607aea4..cc786d11a028 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -2,7 +2,8 @@ # Makefile for Sphinx documentation # -subdir-y := devicetree/bindings/ +# for cleaning +subdir- := devicetree/bindings # Check for broken documentation file references ifeq ($(CONFIG_WARN_MISSING_DOCUMENTS),y) @@ -13,7 +14,7 @@ endif SPHINXBUILD = sphinx-build SPHINXOPTS = SPHINXDIRS = . -_SPHINXDIRS = $(patsubst $(srctree)/Documentation/%/index.rst,%,$(wildcard $(srctree)/Documentation/*/index.rst)) +_SPHINXDIRS = $(sort $(patsubst $(srctree)/Documentation/%/index.rst,%,$(wildcard $(srctree)/Documentation/*/index.rst))) SPHINX_CONF = conf.py PAPER = BUILDDIR = $(obj)/output diff --git a/Documentation/PCI/boot-interrupts.rst b/Documentation/PCI/boot-interrupts.rst new file mode 100644 index 000000000000..d078ef3eb192 --- /dev/null +++ b/Documentation/PCI/boot-interrupts.rst @@ -0,0 +1,155 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============== +Boot Interrupts +=============== + +:Author: - Sean V Kelley <sean.v.kelley@linux.intel.com> + +Overview +======== + +On PCI Express, interrupts are represented with either MSI or inbound +interrupt messages (Assert_INTx/Deassert_INTx). The integrated IO-APIC in a +given Core IO converts the legacy interrupt messages from PCI Express to +MSI interrupts. If the IO-APIC is disabled (via the mask bits in the +IO-APIC table entries), the messages are routed to the legacy PCH. This +in-band interrupt mechanism was traditionally necessary for systems that +did not support the IO-APIC and for boot. Intel in the past has used the +term "boot interrupts" to describe this mechanism. Further, the PCI Express +protocol describes this in-band legacy wire-interrupt INTx mechanism for +I/O devices to signal PCI-style level interrupts. The subsequent paragraphs +describe problems with the Core IO handling of INTx message routing to the +PCH and mitigation within BIOS and the OS. + + +Issue +===== + +When in-band legacy INTx messages are forwarded to the PCH, they in turn +trigger a new interrupt for which the OS likely lacks a handler. When an +interrupt goes unhandled over time, they are tracked by the Linux kernel as +Spurious Interrupts. The IRQ will be disabled by the Linux kernel after it +reaches a specific count with the error "nobody cared". This disabled IRQ +now prevents valid usage by an existing interrupt which may happen to share +the IRQ line. + + irq 19: nobody cared (try booting with the "irqpoll" option) + CPU: 0 PID: 2988 Comm: irq/34-nipalk Tainted: 4.14.87-rt49-02410-g4a640ec-dirty #1 + Hardware name: National Instruments NI PXIe-8880/NI PXIe-8880, BIOS 2.1.5f1 01/09/2020 + Call Trace: + <IRQ> + ? dump_stack+0x46/0x5e + ? __report_bad_irq+0x2e/0xb0 + ? note_interrupt+0x242/0x290 + ? nNIKAL100_memoryRead16+0x8/0x10 [nikal] + ? handle_irq_event_percpu+0x55/0x70 + ? handle_irq_event+0x4f/0x80 + ? handle_fasteoi_irq+0x81/0x180 + ? handle_irq+0x1c/0x30 + ? do_IRQ+0x41/0xd0 + ? common_interrupt+0x84/0x84 + </IRQ> + + handlers: + irq_default_primary_handler threaded usb_hcd_irq + Disabling IRQ #19 + + +Conditions +========== + +The use of threaded interrupts is the most likely condition to trigger +this problem today. Threaded interrupts may not be reenabled after the IRQ +handler wakes. These "one shot" conditions mean that the threaded interrupt +needs to keep the interrupt line masked until the threaded handler has run. +Especially when dealing with high data rate interrupts, the thread needs to +run to completion; otherwise some handlers will end up in stack overflows +since the interrupt of the issuing device is still active. + +Affected Chipsets +================= + +The legacy interrupt forwarding mechanism exists today in a number of +devices including but not limited to chipsets from AMD/ATI, Broadcom, and +Intel. Changes made through the mitigations below have been applied to +drivers/pci/quirks.c + +Starting with ICX there are no longer any IO-APICs in the Core IO's +devices. IO-APIC is only in the PCH. Devices connected to the Core IO's +PCIe Root Ports will use native MSI/MSI-X mechanisms. + +Mitigations +=========== + +The mitigations take the form of PCI quirks. The preference has been to +first identify and make use of a means to disable the routing to the PCH. +In such a case a quirk to disable boot interrupt generation can be +added.[1] + + Intel® 6300ESB I/O Controller Hub + Alternate Base Address Register: + BIE: Boot Interrupt Enable + 0 = Boot interrupt is enabled. + 1 = Boot interrupt is disabled. + + Intel® Sandy Bridge through Sky Lake based Xeon servers: + Coherent Interface Protocol Interrupt Control + dis_intx_route2pch/dis_intx_route2ich/dis_intx_route2dmi2: + When this bit is set. Local INTx messages received from the + Intel® Quick Data DMA/PCI Express ports are not routed to legacy + PCH - they are either converted into MSI via the integrated IO-APIC + (if the IO-APIC mask bit is clear in the appropriate entries) + or cause no further action (when mask bit is set) + +In the absence of a way to directly disable the routing, another approach +has been to make use of PCI Interrupt pin to INTx routing tables for +purposes of redirecting the interrupt handler to the rerouted interrupt +line by default. Therefore, on chipsets where this INTx routing cannot be +disabled, the Linux kernel will reroute the valid interrupt to its legacy +interrupt. This redirection of the handler will prevent the occurrence of +the spurious interrupt detection which would ordinarily disable the IRQ +line due to excessive unhandled counts.[2] + +The config option X86_REROUTE_FOR_BROKEN_BOOT_IRQS exists to enable (or +disable) the redirection of the interrupt handler to the PCH interrupt +line. The option can be overridden by either pci=ioapicreroute or +pci=noioapicreroute.[3] + + +More Documentation +================== + +There is an overview of the legacy interrupt handling in several datasheets +(6300ESB and 6700PXH below). While largely the same, it provides insight +into the evolution of its handling with chipsets. + +Example of disabling of the boot interrupt +------------------------------------------ + +Intel® 6300ESB I/O Controller Hub (Document # 300641-004US) + 5.7.3 Boot Interrupt + https://www.intel.com/content/dam/doc/datasheet/6300esb-io-controller-hub-datasheet.pdf + +Intel® Xeon® Processor E5-1600/2400/2600/4600 v3 Product Families +Datasheet - Volume 2: Registers (Document # 330784-003) + 6.6.41 cipintrc Coherent Interface Protocol Interrupt Control + https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v3-datasheet-vol-2.pdf + +Example of handler rerouting +---------------------------- + +Intel® 6700PXH 64-bit PCI Hub (Document # 302628) + 2.15.2 PCI Express Legacy INTx Support and Boot Interrupt + https://www.intel.com/content/dam/doc/datasheet/6700pxh-64-bit-pci-hub-datasheet.pdf + + +If you have any legacy PCI interrupt questions that aren't answered, email me. + +Cheers, + Sean V Kelley + sean.v.kelley@linux.intel.com + +[1] https://lore.kernel.org/r/12131949181903-git-send-email-sassmann@suse.de/ +[2] https://lore.kernel.org/r/12131949182094-git-send-email-sassmann@suse.de/ +[3] https://lore.kernel.org/r/487C8EA7.6020205@suse.de/ diff --git a/Documentation/PCI/index.rst b/Documentation/PCI/index.rst index 6768305e4c26..8f66feaafd4f 100644 --- a/Documentation/PCI/index.rst +++ b/Documentation/PCI/index.rst @@ -16,3 +16,4 @@ Linux PCI Bus Subsystem pci-error-recovery pcieaer-howto endpoint/index + boot-interrupts diff --git a/Documentation/PCI/pci.rst b/Documentation/PCI/pci.rst index 6864f9a70f5f..8c016d8c9862 100644 --- a/Documentation/PCI/pci.rst +++ b/Documentation/PCI/pci.rst @@ -239,7 +239,7 @@ from the PCI device config space. Use the values in the pci_dev structure as the PCI "bus address" might have been remapped to a "host physical" address by the arch/chip-set specific kernel support. -See Documentation/io-mapping.txt for how to access device registers +See Documentation/driver-api/io-mapping.rst for how to access device registers or device memory. The device driver needs to call pci_request_region() to verify diff --git a/Documentation/PCI/pcieaer-howto.rst b/Documentation/PCI/pcieaer-howto.rst index 18bdefaafd1a..0b36b9ebfa4b 100644 --- a/Documentation/PCI/pcieaer-howto.rst +++ b/Documentation/PCI/pcieaer-howto.rst @@ -156,12 +156,6 @@ default reset_link function, but different upstream ports might have different specifications to reset pci express link, so all upstream ports should provide their own reset_link functions. -In struct pcie_port_service_driver, a new pointer, reset_link, is -added. -:: - - pci_ers_result_t (*reset_link) (struct pci_dev *dev); - Section 3.2.2.2 provides more detailed info on when to call reset_link. @@ -212,15 +206,10 @@ error_detected(dev, pci_channel_io_frozen) to all drivers within a hierarchy in question. Then, performing link reset at upstream is necessary. As different kinds of devices might use different approaches to reset link, AER port service driver is required to provide the -function to reset link. Firstly, kernel looks for if the upstream -component has an aer driver. If it has, kernel uses the reset_link -callback of the aer driver. If the upstream component has no aer driver -and the port is downstream port, we will perform a hot reset as the -default by setting the Secondary Bus Reset bit of the Bridge Control -register associated with the downstream port. As for upstream ports, -they should provide their own aer service drivers with reset_link -function. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER and -reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes +function to reset link via callback parameter of pcie_do_recovery() +function. If reset_link is not NULL, recovery function will use it +to reset the link. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER +and reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes to mmio_enabled. helper functions @@ -243,9 +232,9 @@ messages to root port when an error is detected. :: - int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);` + int pci_aer_clear_nonfatal_status(struct pci_dev *dev);` -pci_cleanup_aer_uncorrect_error_status cleanups the uncorrectable +pci_aer_clear_nonfatal_status clears non-fatal errors in the uncorrectable error status register. Frequent Asked Questions diff --git a/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst b/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst index 1a8b129cfc04..83ae3b79a643 100644 --- a/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst +++ b/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst @@ -4,7 +4,7 @@ A Tour Through TREE_RCU's Grace-Period Memory Ordering August 8, 2017 -This article was contributed by Paul E. McKenney +This article was contributed by Paul E. McKenney Introduction ============ @@ -48,7 +48,7 @@ Tree RCU Grace Period Memory Ordering Building Blocks The workhorse for RCU's grace-period memory ordering is the critical section for the ``rcu_node`` structure's -``->lock``. These critical sections use helper functions for lock +``->lock``. These critical sections use helper functions for lock acquisition, including ``raw_spin_lock_rcu_node()``, ``raw_spin_lock_irq_rcu_node()``, and ``raw_spin_lock_irqsave_rcu_node()``. Their lock-release counterparts are ``raw_spin_unlock_rcu_node()``, @@ -102,9 +102,9 @@ lock-acquisition and lock-release functions:: 23 r3 = READ_ONCE(x); 24 } 25 - 26 WARN_ON(r1 == 0 && r2 == 0 && r3 == 0); + 26 WARN_ON(r1 == 0 && r2 == 0 && r3 == 0); -The ``WARN_ON()`` is evaluated at “the end of time”, +The ``WARN_ON()`` is evaluated at "the end of time", after all changes have propagated throughout the system. Without the ``smp_mb__after_unlock_lock()`` provided by the acquisition functions, this ``WARN_ON()`` could trigger, for example diff --git a/Documentation/RCU/listRCU.rst b/Documentation/RCU/listRCU.rst index 7956ff33042b..2a643e293fb4 100644 --- a/Documentation/RCU/listRCU.rst +++ b/Documentation/RCU/listRCU.rst @@ -4,12 +4,61 @@ Using RCU to Protect Read-Mostly Linked Lists ============================================= One of the best applications of RCU is to protect read-mostly linked lists -("struct list_head" in list.h). One big advantage of this approach +(``struct list_head`` in list.h). One big advantage of this approach is that all of the required memory barriers are included for you in the list macros. This document describes several applications of RCU, with the best fits first. -Example 1: Read-Side Action Taken Outside of Lock, No In-Place Updates + +Example 1: Read-mostly list: Deferred Destruction +------------------------------------------------- + +A widely used usecase for RCU lists in the kernel is lockless iteration over +all processes in the system. ``task_struct::tasks`` represents the list node that +links all the processes. The list can be traversed in parallel to any list +additions or removals. + +The traversal of the list is done using ``for_each_process()`` which is defined +by the 2 macros:: + + #define next_task(p) \ + list_entry_rcu((p)->tasks.next, struct task_struct, tasks) + + #define for_each_process(p) \ + for (p = &init_task ; (p = next_task(p)) != &init_task ; ) + +The code traversing the list of all processes typically looks like:: + + rcu_read_lock(); + for_each_process(p) { + /* Do something with p */ + } + rcu_read_unlock(); + +The simplified code for removing a process from a task list is:: + + void release_task(struct task_struct *p) + { + write_lock(&tasklist_lock); + list_del_rcu(&p->tasks); + write_unlock(&tasklist_lock); + call_rcu(&p->rcu, delayed_put_task_struct); + } + +When a process exits, ``release_task()`` calls ``list_del_rcu(&p->tasks)`` under +``tasklist_lock`` writer lock protection, to remove the task from the list of +all tasks. The ``tasklist_lock`` prevents concurrent list additions/removals +from corrupting the list. Readers using ``for_each_process()`` are not protected +with the ``tasklist_lock``. To prevent readers from noticing changes in the list +pointers, the ``task_struct`` object is freed only after one or more grace +periods elapse (with the help of call_rcu()). This deferring of destruction +ensures that any readers traversing the list will see valid ``p->tasks.next`` +pointers and deletion/freeing can happen in parallel with traversal of the list. +This pattern is also called an **existence lock**, since RCU pins the object in +memory until all existing readers finish. + + +Example 2: Read-Side Action Taken Outside of Lock: No In-Place Updates ---------------------------------------------------------------------- The best applications are cases where, if reader-writer locking were @@ -26,7 +75,7 @@ added or deleted, rather than being modified in place. A straightforward example of this use of RCU may be found in the system-call auditing support. For example, a reader-writer locked -implementation of audit_filter_task() might be as follows:: +implementation of ``audit_filter_task()`` might be as follows:: static enum audit_state audit_filter_task(struct task_struct *tsk) { @@ -34,7 +83,7 @@ implementation of audit_filter_task() might be as follows:: enum audit_state state; read_lock(&auditsc_lock); - /* Note: audit_netlink_sem held by caller. */ + /* Note: audit_filter_mutex held by caller. */ list_for_each_entry(e, &audit_tsklist, list) { if (audit_filter_rules(tsk, &e->rule, NULL, &state)) { read_unlock(&auditsc_lock); @@ -58,7 +107,7 @@ This means that RCU can be easily applied to the read side, as follows:: enum audit_state state; rcu_read_lock(); - /* Note: audit_netlink_sem held by caller. */ + /* Note: audit_filter_mutex held by caller. */ list_for_each_entry_rcu(e, &audit_tsklist, list) { if (audit_filter_rules(tsk, &e->rule, NULL, &state)) { rcu_read_unlock(); @@ -69,18 +118,18 @@ This means that RCU can be easily applied to the read side, as follows:: return AUDIT_BUILD_CONTEXT; } -The read_lock() and read_unlock() calls have become rcu_read_lock() +The ``read_lock()`` and ``read_unlock()`` calls have become rcu_read_lock() and rcu_read_unlock(), respectively, and the list_for_each_entry() has -become list_for_each_entry_rcu(). The _rcu() list-traversal primitives +become list_for_each_entry_rcu(). The **_rcu()** list-traversal primitives insert the read-side memory barriers that are required on DEC Alpha CPUs. -The changes to the update side are also straightforward. A reader-writer -lock might be used as follows for deletion and insertion:: +The changes to the update side are also straightforward. A reader-writer lock +might be used as follows for deletion and insertion:: static inline int audit_del_rule(struct audit_rule *rule, struct list_head *list) { - struct audit_entry *e; + struct audit_entry *e; write_lock(&auditsc_lock); list_for_each_entry(e, list, list) { @@ -113,9 +162,9 @@ Following are the RCU equivalents for these two functions:: static inline int audit_del_rule(struct audit_rule *rule, struct list_head *list) { - struct audit_entry *e; + struct audit_entry *e; - /* Do not use the _rcu iterator here, since this is the only + /* No need to use the _rcu iterator here, since this is the only * deletion routine. */ list_for_each_entry(e, list, list) { if (!audit_compare_rule(rule, &e->rule)) { @@ -139,45 +188,45 @@ Following are the RCU equivalents for these two functions:: return 0; } -Normally, the write_lock() and write_unlock() would be replaced by -a spin_lock() and a spin_unlock(), but in this case, all callers hold -audit_netlink_sem, so no additional locking is required. The auditsc_lock -can therefore be eliminated, since use of RCU eliminates the need for -writers to exclude readers. Normally, the write_lock() calls would -be converted into spin_lock() calls. +Normally, the ``write_lock()`` and ``write_unlock()`` would be replaced by a +spin_lock() and a spin_unlock(). But in this case, all callers hold +``audit_filter_mutex``, so no additional locking is required. The +``auditsc_lock`` can therefore be eliminated, since use of RCU eliminates the +need for writers to exclude readers. The list_del(), list_add(), and list_add_tail() primitives have been replaced by list_del_rcu(), list_add_rcu(), and list_add_tail_rcu(). -The _rcu() list-manipulation primitives add memory barriers that are -needed on weakly ordered CPUs (most of them!). The list_del_rcu() -primitive omits the pointer poisoning debug-assist code that would -otherwise cause concurrent readers to fail spectacularly. +The **_rcu()** list-manipulation primitives add memory barriers that are needed on +weakly ordered CPUs (most of them!). The list_del_rcu() primitive omits the +pointer poisoning debug-assist code that would otherwise cause concurrent +readers to fail spectacularly. -So, when readers can tolerate stale data and when entries are either added -or deleted, without in-place modification, it is very easy to use RCU! +So, when readers can tolerate stale data and when entries are either added or +deleted, without in-place modification, it is very easy to use RCU! -Example 2: Handling In-Place Updates + +Example 3: Handling In-Place Updates ------------------------------------ -The system-call auditing code does not update auditing rules in place. -However, if it did, reader-writer-locked code to do so might look as -follows (presumably, the field_count is only permitted to decrease, -otherwise, the added fields would need to be filled in):: +The system-call auditing code does not update auditing rules in place. However, +if it did, the reader-writer-locked code to do so might look as follows +(assuming only ``field_count`` is updated, otherwise, the added fields would +need to be filled in):: static inline int audit_upd_rule(struct audit_rule *rule, struct list_head *list, __u32 newaction, __u32 newfield_count) { - struct audit_entry *e; - struct audit_newentry *ne; + struct audit_entry *e; + struct audit_entry *ne; write_lock(&auditsc_lock); - /* Note: audit_netlink_sem held by caller. */ + /* Note: audit_filter_mutex held by caller. */ list_for_each_entry(e, list, list) { if (!audit_compare_rule(rule, &e->rule)) { e->rule.action = newaction; - e->rule.file_count = newfield_count; + e->rule.field_count = newfield_count; write_unlock(&auditsc_lock); return 0; } @@ -188,16 +237,16 @@ otherwise, the added fields would need to be filled in):: The RCU version creates a copy, updates the copy, then replaces the old entry with the newly updated entry. This sequence of actions, allowing -concurrent reads while doing a copy to perform an update, is what gives -RCU ("read-copy update") its name. The RCU code is as follows:: +concurrent reads while making a copy to perform an update, is what gives +RCU (*read-copy update*) its name. The RCU code is as follows:: static inline int audit_upd_rule(struct audit_rule *rule, struct list_head *list, __u32 newaction, __u32 newfield_count) { - struct audit_entry *e; - struct audit_newentry *ne; + struct audit_entry *e; + struct audit_entry *ne; list_for_each_entry(e, list, list) { if (!audit_compare_rule(rule, &e->rule)) { @@ -206,7 +255,7 @@ RCU ("read-copy update") its name. The RCU code is as follows:: return -ENOMEM; audit_copy_rule(&ne->rule, &e->rule); ne->rule.action = newaction; - ne->rule.file_count = newfield_count; + ne->rule.field_count = newfield_count; list_replace_rcu(&e->list, &ne->list); call_rcu(&e->rcu, audit_free_rule); return 0; @@ -215,34 +264,45 @@ RCU ("read-copy update") its name. The RCU code is as follows:: return -EFAULT; /* No matching rule */ } -Again, this assumes that the caller holds audit_netlink_sem. Normally, -the reader-writer lock would become a spinlock in this sort of code. +Again, this assumes that the caller holds ``audit_filter_mutex``. Normally, the +writer lock would become a spinlock in this sort of code. -Example 3: Eliminating Stale Data +Another use of this pattern can be found in the openswitch driver's *connection +tracking table* code in ``ct_limit_set()``. The table holds connection tracking +entries and has a limit on the maximum entries. There is one such table +per-zone and hence one *limit* per zone. The zones are mapped to their limits +through a hashtable using an RCU-managed hlist for the hash chains. When a new +limit is set, a new limit object is allocated and ``ct_limit_set()`` is called +to replace the old limit object with the new one using list_replace_rcu(). +The old limit object is then freed after a grace period using kfree_rcu(). + + +Example 4: Eliminating Stale Data --------------------------------- -The auditing examples above tolerate stale data, as do most algorithms +The auditing example above tolerates stale data, as do most algorithms that are tracking external state. Because there is a delay from the time the external state changes before Linux becomes aware of the change, -additional RCU-induced staleness is normally not a problem. +additional RCU-induced staleness is generally not a problem. However, there are many examples where stale data cannot be tolerated. -One example in the Linux kernel is the System V IPC (see the ipc_lock() -function in ipc/util.c). This code checks a "deleted" flag under a -per-entry spinlock, and, if the "deleted" flag is set, pretends that the +One example in the Linux kernel is the System V IPC (see the shm_lock() +function in ipc/shm.c). This code checks a *deleted* flag under a +per-entry spinlock, and, if the *deleted* flag is set, pretends that the entry does not exist. For this to be helpful, the search function must -return holding the per-entry spinlock, as ipc_lock() does in fact do. +return holding the per-entry spinlock, as shm_lock() does in fact do. + +.. _quick_quiz: Quick Quiz: - Why does the search function need to return holding the per-entry lock for - this deleted-flag technique to be helpful? + For the deleted-flag technique to be helpful, why is it necessary + to hold the per-entry lock while returning from the search function? -:ref:`Answer to Quick Quiz <answer_quick_quiz_list>` +:ref:`Answer to Quick Quiz <quick_quiz_answer>` -If the system-call audit module were to ever need to reject stale data, -one way to accomplish this would be to add a "deleted" flag and a "lock" -spinlock to the audit_entry structure, and modify audit_filter_task() -as follows:: +If the system-call audit module were to ever need to reject stale data, one way +to accomplish this would be to add a ``deleted`` flag and a ``lock`` spinlock to the +audit_entry structure, and modify ``audit_filter_task()`` as follows:: static enum audit_state audit_filter_task(struct task_struct *tsk) { @@ -267,20 +327,20 @@ as follows:: } Note that this example assumes that entries are only added and deleted. -Additional mechanism is required to deal correctly with the -update-in-place performed by audit_upd_rule(). For one thing, -audit_upd_rule() would need additional memory barriers to ensure -that the list_add_rcu() was really executed before the list_del_rcu(). +Additional mechanism is required to deal correctly with the update-in-place +performed by ``audit_upd_rule()``. For one thing, ``audit_upd_rule()`` would +need additional memory barriers to ensure that the list_add_rcu() was really +executed before the list_del_rcu(). -The audit_del_rule() function would need to set the "deleted" -flag under the spinlock as follows:: +The ``audit_del_rule()`` function would need to set the ``deleted`` flag under the +spinlock as follows:: static inline int audit_del_rule(struct audit_rule *rule, struct list_head *list) { - struct audit_entry *e; + struct audit_entry *e; - /* Do not need to use the _rcu iterator here, since this + /* No need to use the _rcu iterator here, since this * is the only deletion routine. */ list_for_each_entry(e, list, list) { if (!audit_compare_rule(rule, &e->rule)) { @@ -295,6 +355,91 @@ flag under the spinlock as follows:: return -EFAULT; /* No matching rule */ } +This too assumes that the caller holds ``audit_filter_mutex``. + + +Example 5: Skipping Stale Objects +--------------------------------- + +For some usecases, reader performance can be improved by skipping stale objects +during read-side list traversal if the object in concern is pending destruction +after one or more grace periods. One such example can be found in the timerfd +subsystem. When a ``CLOCK_REALTIME`` clock is reprogrammed - for example due to +setting of the system time, then all programmed timerfds that depend on this +clock get triggered and processes waiting on them to expire are woken up in +advance of their scheduled expiry. To facilitate this, all such timers are added +to an RCU-managed ``cancel_list`` when they are setup in +``timerfd_setup_cancel()``:: + + static void timerfd_setup_cancel(struct timerfd_ctx *ctx, int flags) + { + spin_lock(&ctx->cancel_lock); + if ((ctx->clockid == CLOCK_REALTIME && + (flags & TFD_TIMER_ABSTIME) && (flags & TFD_TIMER_CANCEL_ON_SET)) { + if (!ctx->might_cancel) { + ctx->might_cancel = true; + spin_lock(&cancel_lock); + list_add_rcu(&ctx->clist, &cancel_list); + spin_unlock(&cancel_lock); + } + } + spin_unlock(&ctx->cancel_lock); + } + +When a timerfd is freed (fd is closed), then the ``might_cancel`` flag of the +timerfd object is cleared, the object removed from the ``cancel_list`` and +destroyed:: + + int timerfd_release(struct inode *inode, struct file *file) + { + struct timerfd_ctx *ctx = file->private_data; + + spin_lock(&ctx->cancel_lock); + if (ctx->might_cancel) { + ctx->might_cancel = false; + spin_lock(&cancel_lock); + list_del_rcu(&ctx->clist); + spin_unlock(&cancel_lock); + } + spin_unlock(&ctx->cancel_lock); + + hrtimer_cancel(&ctx->t.tmr); + kfree_rcu(ctx, rcu); + return 0; + } + +If the ``CLOCK_REALTIME`` clock is set, for example by a time server, the +hrtimer framework calls ``timerfd_clock_was_set()`` which walks the +``cancel_list`` and wakes up processes waiting on the timerfd. While iterating +the ``cancel_list``, the ``might_cancel`` flag is consulted to skip stale +objects:: + + void timerfd_clock_was_set(void) + { + struct timerfd_ctx *ctx; + unsigned long flags; + + rcu_read_lock(); + list_for_each_entry_rcu(ctx, &cancel_list, clist) { + if (!ctx->might_cancel) + continue; + spin_lock_irqsave(&ctx->wqh.lock, flags); + if (ctx->moffs != ktime_mono_to_real(0)) { + ctx->moffs = KTIME_MAX; + ctx->ticks++; + wake_up_locked_poll(&ctx->wqh, EPOLLIN); + } + spin_unlock_irqrestore(&ctx->wqh.lock, flags); + } + rcu_read_unlock(); + } + +The key point here is, because RCU-traversal of the ``cancel_list`` happens +while objects are being added and removed to the list, sometimes the traversal +can step on an object that has been removed from the list. In this example, it +is seen that it is better to skip such objects using a flag. + + Summary ------- @@ -303,19 +448,21 @@ the most amenable to use of RCU. The simplest case is where entries are either added or deleted from the data structure (or atomically modified in place), but non-atomic in-place modifications can be handled by making a copy, updating the copy, then replacing the original with the copy. -If stale data cannot be tolerated, then a "deleted" flag may be used +If stale data cannot be tolerated, then a *deleted* flag may be used in conjunction with a per-entry spinlock in order to allow the search function to reject newly deleted data. -.. _answer_quick_quiz_list: +.. _quick_quiz_answer: Answer to Quick Quiz: - Why does the search function need to return holding the per-entry - lock for this deleted-flag technique to be helpful? + For the deleted-flag technique to be helpful, why is it necessary + to hold the per-entry lock while returning from the search function? If the search function drops the per-entry lock before returning, then the caller will be processing stale data in any case. If it is really OK to be processing stale data, then you don't need a - "deleted" flag. If processing stale data really is a problem, + *deleted* flag. If processing stale data really is a problem, then you need to hold the per-entry lock across all of the code that uses the value that was returned. + +:ref:`Back to Quick Quiz <quick_quiz>` diff --git a/Documentation/RCU/rcu.rst b/Documentation/RCU/rcu.rst index 8dfb437dacc3..0e03c6ef3147 100644 --- a/Documentation/RCU/rcu.rst +++ b/Documentation/RCU/rcu.rst @@ -11,8 +11,8 @@ must be long enough that any readers accessing the item being deleted have since dropped their references. For example, an RCU-protected deletion from a linked list would first remove the item from the list, wait for a grace period to elapse, then free the element. See the -Documentation/RCU/listRCU.rst file for more information on using RCU with -linked lists. +:ref:`Documentation/RCU/listRCU.rst <list_rcu_doc>` for more information on +using RCU with linked lists. Frequently Asked Questions -------------------------- @@ -50,7 +50,7 @@ Frequently Asked Questions - If I am running on a uniprocessor kernel, which can only do one thing at a time, why should I wait for a grace period? - See the Documentation/RCU/UP.rst file for more information. + See :ref:`Documentation/RCU/UP.rst <up_doc>` for more information. - How can I see where RCU is currently used in the Linux kernel? @@ -68,18 +68,18 @@ Frequently Asked Questions - Why the name "RCU"? - "RCU" stands for "read-copy update". The file Documentation/RCU/listRCU.rst - has more information on where this name came from, search for - "read-copy update" to find it. + "RCU" stands for "read-copy update". + :ref:`Documentation/RCU/listRCU.rst <list_rcu_doc>` has more information on where + this name came from, search for "read-copy update" to find it. - I hear that RCU is patented? What is with that? Yes, it is. There are several known patents related to RCU, - search for the string "Patent" in RTFP.txt to find them. + search for the string "Patent" in Documentation/RCU/RTFP.txt to find them. Of these, one was allowed to lapse by the assignee, and the others have been contributed to the Linux kernel under GPL. There are now also LGPL implementations of user-level RCU - available (http://liburcu.org/). + available (https://liburcu.org/). - I hear that RCU needs work in order to support realtime kernels? @@ -88,5 +88,5 @@ Frequently Asked Questions - Where can I find more information on RCU? - See the RTFP.txt file in this directory. + See the Documentation/RCU/RTFP.txt file. Or point your browser at (http://www.rdrop.com/users/paulmck/RCU/). diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt index a41a0384d20c..af712a3c5b6a 100644 --- a/Documentation/RCU/torture.txt +++ b/Documentation/RCU/torture.txt @@ -124,9 +124,14 @@ using a dynamically allocated srcu_struct (hence "srcud-" rather than debugging. The final "T" entry contains the totals of the counters. -USAGE +USAGE ON SPECIFIC KERNEL BUILDS -The following script may be used to torture RCU: +It is sometimes desirable to torture RCU on a specific kernel build, +for example, when preparing to put that kernel build into production. +In that case, the kernel should be built with CONFIG_RCU_TORTURE_TEST=m +so that the test can be started using modprobe and terminated using rmmod. + +For example, the following script may be used to torture RCU: #!/bin/sh @@ -142,8 +147,136 @@ checked for such errors. The "rmmod" command forces a "SUCCESS", two are self-explanatory, while the last indicates that while there were no RCU failures, CPU-hotplug problems were detected. -However, the tools/testing/selftests/rcutorture/bin/kvm.sh script -provides better automation, including automatic failure analysis. -It assumes a qemu/kvm-enabled platform, and runs guest OSes out of initrd. -See tools/testing/selftests/rcutorture/doc/initrd.txt for instructions -on setting up such an initrd. + +USAGE ON MAINLINE KERNELS + +When using rcutorture to test changes to RCU itself, it is often +necessary to build a number of kernels in order to test that change +across a broad range of combinations of the relevant Kconfig options +and of the relevant kernel boot parameters. In this situation, use +of modprobe and rmmod can be quite time-consuming and error-prone. + +Therefore, the tools/testing/selftests/rcutorture/bin/kvm.sh +script is available for mainline testing for x86, arm64, and +powerpc. By default, it will run the series of tests specified by +tools/testing/selftests/rcutorture/configs/rcu/CFLIST, with each test +running for 30 minutes within a guest OS using a minimal userspace +supplied by an automatically generated initrd. After the tests are +complete, the resulting build products and console output are analyzed +for errors and the results of the runs are summarized. + +On larger systems, rcutorture testing can be accelerated by passing the +--cpus argument to kvm.sh. For example, on a 64-CPU system, "--cpus 43" +would use up to 43 CPUs to run tests concurrently, which as of v5.4 would +complete all the scenarios in two batches, reducing the time to complete +from about eight hours to about one hour (not counting the time to build +the sixteen kernels). The "--dryrun sched" argument will not run tests, +but rather tell you how the tests would be scheduled into batches. This +can be useful when working out how many CPUs to specify in the --cpus +argument. + +Not all changes require that all scenarios be run. For example, a change +to Tree SRCU might run only the SRCU-N and SRCU-P scenarios using the +--configs argument to kvm.sh as follows: "--configs 'SRCU-N SRCU-P'". +Large systems can run multiple copies of of the full set of scenarios, +for example, a system with 448 hardware threads can run five instances +of the full set concurrently. To make this happen: + + kvm.sh --cpus 448 --configs '5*CFLIST' + +Alternatively, such a system can run 56 concurrent instances of a single +eight-CPU scenario: + + kvm.sh --cpus 448 --configs '56*TREE04' + +Or 28 concurrent instances of each of two eight-CPU scenarios: + + kvm.sh --cpus 448 --configs '28*TREE03 28*TREE04' + +Of course, each concurrent instance will use memory, which can be +limited using the --memory argument, which defaults to 512M. Small +values for memory may require disabling the callback-flooding tests +using the --bootargs parameter discussed below. + +Sometimes additional debugging is useful, and in such cases the --kconfig +parameter to kvm.sh may be used, for example, "--kconfig 'CONFIG_KASAN=y'". + +Kernel boot arguments can also be supplied, for example, to control +rcutorture's module parameters. For example, to test a change to RCU's +CPU stall-warning code, use "--bootargs 'rcutorture.stall_cpu=30'". +This will of course result in the scripting reporting a failure, namely +the resuling RCU CPU stall warning. As noted above, reducing memory may +require disabling rcutorture's callback-flooding tests: + + kvm.sh --cpus 448 --configs '56*TREE04' --memory 128M \ + --bootargs 'rcutorture.fwd_progress=0' + +Sometimes all that is needed is a full set of kernel builds. This is +what the --buildonly argument does. + +Finally, the --trust-make argument allows each kernel build to reuse what +it can from the previous kernel build. + +There are additional more arcane arguments that are documented in the +source code of the kvm.sh script. + +If a run contains failures, the number of buildtime and runtime failures +is listed at the end of the kvm.sh output, which you really should redirect +to a file. The build products and console output of each run is kept in +tools/testing/selftests/rcutorture/res in timestamped directories. A +given directory can be supplied to kvm-find-errors.sh in order to have +it cycle you through summaries of errors and full error logs. For example: + + tools/testing/selftests/rcutorture/bin/kvm-find-errors.sh \ + tools/testing/selftests/rcutorture/res/2020.01.20-15.54.23 + +However, it is often more convenient to access the files directly. +Files pertaining to all scenarios in a run reside in the top-level +directory (2020.01.20-15.54.23 in the example above), while per-scenario +files reside in a subdirectory named after the scenario (for example, +"TREE04"). If a given scenario ran more than once (as in "--configs +'56*TREE04'" above), the directories corresponding to the second and +subsequent runs of that scenario include a sequence number, for example, +"TREE04.2", "TREE04.3", and so on. + +The most frequently used file in the top-level directory is testid.txt. +If the test ran in a git repository, then this file contains the commit +that was tested and any uncommitted changes in diff format. + +The most frequently used files in each per-scenario-run directory are: + +.config: This file contains the Kconfig options. + +Make.out: This contains build output for a specific scenario. + +console.log: This contains the console output for a specific scenario. + This file may be examined once the kernel has booted, but + it might not exist if the build failed. + +vmlinux: This contains the kernel, which can be useful with tools like + objdump and gdb. + +A number of additional files are available, but are less frequently used. +Many are intended for debugging of rcutorture itself or of its scripting. + +As of v5.4, a successful run with the default set of scenarios produces +the following summary at the end of the run on a 12-CPU system: + +SRCU-N ------- 804233 GPs (148.932/s) [srcu: g10008272 f0x0 ] +SRCU-P ------- 202320 GPs (37.4667/s) [srcud: g1809476 f0x0 ] +SRCU-t ------- 1122086 GPs (207.794/s) [srcu: g0 f0x0 ] +SRCU-u ------- 1111285 GPs (205.794/s) [srcud: g1 f0x0 ] +TASKS01 ------- 19666 GPs (3.64185/s) [tasks: g0 f0x0 ] +TASKS02 ------- 20541 GPs (3.80389/s) [tasks: g0 f0x0 ] +TASKS03 ------- 19416 GPs (3.59556/s) [tasks: g0 f0x0 ] +TINY01 ------- 836134 GPs (154.84/s) [rcu: g0 f0x0 ] n_max_cbs: 34198 +TINY02 ------- 850371 GPs (157.476/s) [rcu: g0 f0x0 ] n_max_cbs: 2631 +TREE01 ------- 162625 GPs (30.1157/s) [rcu: g1124169 f0x0 ] +TREE02 ------- 333003 GPs (61.6672/s) [rcu: g2647753 f0x0 ] n_max_cbs: 35844 +TREE03 ------- 306623 GPs (56.782/s) [rcu: g2975325 f0x0 ] n_max_cbs: 1496497 +CPU count limited from 16 to 12 +TREE04 ------- 246149 GPs (45.5831/s) [rcu: g1695737 f0x0 ] n_max_cbs: 434961 +TREE05 ------- 314603 GPs (58.2598/s) [rcu: g2257741 f0x2 ] n_max_cbs: 193997 +TREE07 ------- 167347 GPs (30.9902/s) [rcu: g1079021 f0x0 ] n_max_cbs: 478732 +CPU count limited from 16 to 12 +TREE09 ------- 752238 GPs (139.303/s) [rcu: g13075057 f0x0 ] n_max_cbs: 99011 diff --git a/Documentation/accounting/psi.rst b/Documentation/accounting/psi.rst index 621111ce5740..f2b3439edcc2 100644 --- a/Documentation/accounting/psi.rst +++ b/Documentation/accounting/psi.rst @@ -1,3 +1,5 @@ +.. _psi: + ================================ PSI - Pressure Stall Information ================================ diff --git a/Documentation/admin-guide/binderfs.rst b/Documentation/admin-guide/binderfs.rst index c009671f8434..8243af9b3510 100644 --- a/Documentation/admin-guide/binderfs.rst +++ b/Documentation/admin-guide/binderfs.rst @@ -33,6 +33,12 @@ max a per-instance limit. If ``max=<count>`` is set then only ``<count>`` number of binder devices can be allocated in this binderfs instance. +stats + Using ``stats=global`` enables global binder statistics. + ``stats=global`` is only available for a binderfs instance mounted in the + initial user namespace. An attempt to use the option to mount a binderfs + instance in another user namespace will return a permission error. + Allocating binder Devices ------------------------- diff --git a/Documentation/admin-guide/binfmt-misc.rst b/Documentation/admin-guide/binfmt-misc.rst index 97b0d7927078..7a864131e5ea 100644 --- a/Documentation/admin-guide/binfmt-misc.rst +++ b/Documentation/admin-guide/binfmt-misc.rst @@ -1,5 +1,5 @@ -Kernel Support for miscellaneous (your favourite) Binary Formats v1.1 -===================================================================== +Kernel Support for miscellaneous Binary Formats (binfmt_misc) +============================================================= This Kernel feature allows you to invoke almost (for restrictions see below) every program by simply typing its name in the shell. @@ -140,8 +140,8 @@ Hints ----- If you want to pass special arguments to your interpreter, you can -write a wrapper script for it. See Documentation/admin-guide/java.rst for an -example. +write a wrapper script for it. +See :doc:`Documentation/admin-guide/java.rst <./java>` for an example. Your interpreter should NOT look in the PATH for the filename; the kernel passes it the full filename (or the file descriptor) to use. Using ``$PATH`` can diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst index 27c77d853028..a6fd1f9b5faf 100644 --- a/Documentation/admin-guide/blockdev/zram.rst +++ b/Documentation/admin-guide/blockdev/zram.rst @@ -251,8 +251,6 @@ line of text and contains the following stats separated by whitespace: ================ ============================================================= orig_data_size uncompressed size of data stored in this disk. - This excludes same-element-filled pages (same_pages) since - no memory is allocated for them. Unit: bytes compr_data_size compressed size of data stored in this disk mem_used_total the amount of memory allocated for this disk. This diff --git a/Documentation/admin-guide/bootconfig.rst b/Documentation/admin-guide/bootconfig.rst index cf2edcd09183..d6b3b77a4129 100644 --- a/Documentation/admin-guide/bootconfig.rst +++ b/Documentation/admin-guide/bootconfig.rst @@ -23,7 +23,7 @@ of dot-connected-words, and key and value are connected by ``=``. The value has to be terminated by semi-colon (``;``) or newline (``\n``). For array value, array entries are separated by comma (``,``). :: -KEY[.WORD[...]] = VALUE[, VALUE2[...]][;] + KEY[.WORD[...]] = VALUE[, VALUE2[...]][;] Unlike the kernel command line syntax, spaces are OK around the comma and ``=``. diff --git a/Documentation/admin-guide/cgroup-v1/cpusets.rst b/Documentation/admin-guide/cgroup-v1/cpusets.rst index 86a6ae995d54..7ade3abd342a 100644 --- a/Documentation/admin-guide/cgroup-v1/cpusets.rst +++ b/Documentation/admin-guide/cgroup-v1/cpusets.rst @@ -223,6 +223,17 @@ cpu_online_mask using a CPU hotplug notifier, and the mems file automatically tracks the value of node_states[N_MEMORY]--i.e., nodes with memory--using the cpuset_track_online_nodes() hook. +The cpuset.effective_cpus and cpuset.effective_mems files are +normally read-only copies of cpuset.cpus and cpuset.mems files +respectively. If the cpuset cgroup filesystem is mounted with the +special "cpuset_v2_mode" option, the behavior of these files will become +similar to the corresponding files in cpuset v2. In other words, hotplug +events will not change cpuset.cpus and cpuset.mems. Those events will +only affect cpuset.effective_cpus and cpuset.effective_mems which show +the actual cpus and memory nodes that are currently used by this cpuset. +See Documentation/admin-guide/cgroup-v2.rst for more information about +cpuset v2 behavior. + 1.4 What are exclusive cpusets ? -------------------------------- diff --git a/Documentation/admin-guide/cgroup-v1/hugetlb.rst b/Documentation/admin-guide/cgroup-v1/hugetlb.rst index a3902aa253a9..338f2c7d7a1c 100644 --- a/Documentation/admin-guide/cgroup-v1/hugetlb.rst +++ b/Documentation/admin-guide/cgroup-v1/hugetlb.rst @@ -2,13 +2,6 @@ HugeTLB Controller ================== -The HugeTLB controller allows to limit the HugeTLB usage per control group and -enforces the controller limit during page fault. Since HugeTLB doesn't -support page reclaim, enforcing the limit at page fault time implies that, -the application will get SIGBUS signal if it tries to access HugeTLB pages -beyond its limit. This requires the application to know beforehand how much -HugeTLB pages it would require for its use. - HugeTLB controller can be created by first mounting the cgroup filesystem. # mount -t cgroup -o hugetlb none /sys/fs/cgroup @@ -28,10 +21,14 @@ process (bash) into it. Brief summary of control files:: - hugetlb.<hugepagesize>.limit_in_bytes # set/show limit of "hugepagesize" hugetlb usage - hugetlb.<hugepagesize>.max_usage_in_bytes # show max "hugepagesize" hugetlb usage recorded - hugetlb.<hugepagesize>.usage_in_bytes # show current usage for "hugepagesize" hugetlb - hugetlb.<hugepagesize>.failcnt # show the number of allocation failure due to HugeTLB limit + hugetlb.<hugepagesize>.rsvd.limit_in_bytes # set/show limit of "hugepagesize" hugetlb reservations + hugetlb.<hugepagesize>.rsvd.max_usage_in_bytes # show max "hugepagesize" hugetlb reservations and no-reserve faults + hugetlb.<hugepagesize>.rsvd.usage_in_bytes # show current reservations and no-reserve faults for "hugepagesize" hugetlb + hugetlb.<hugepagesize>.rsvd.failcnt # show the number of allocation failure due to HugeTLB reservation limit + hugetlb.<hugepagesize>.limit_in_bytes # set/show limit of "hugepagesize" hugetlb faults + hugetlb.<hugepagesize>.max_usage_in_bytes # show max "hugepagesize" hugetlb usage recorded + hugetlb.<hugepagesize>.usage_in_bytes # show current usage for "hugepagesize" hugetlb + hugetlb.<hugepagesize>.failcnt # show the number of allocation failure due to HugeTLB usage limit For a system supporting three hugepage sizes (64k, 32M and 1G), the control files include:: @@ -40,11 +37,95 @@ files include:: hugetlb.1GB.max_usage_in_bytes hugetlb.1GB.usage_in_bytes hugetlb.1GB.failcnt + hugetlb.1GB.rsvd.limit_in_bytes + hugetlb.1GB.rsvd.max_usage_in_bytes + hugetlb.1GB.rsvd.usage_in_bytes + hugetlb.1GB.rsvd.failcnt hugetlb.64KB.limit_in_bytes hugetlb.64KB.max_usage_in_bytes hugetlb.64KB.usage_in_bytes hugetlb.64KB.failcnt + hugetlb.64KB.rsvd.limit_in_bytes + hugetlb.64KB.rsvd.max_usage_in_bytes + hugetlb.64KB.rsvd.usage_in_bytes + hugetlb.64KB.rsvd.failcnt hugetlb.32MB.limit_in_bytes hugetlb.32MB.max_usage_in_bytes hugetlb.32MB.usage_in_bytes hugetlb.32MB.failcnt + hugetlb.32MB.rsvd.limit_in_bytes + hugetlb.32MB.rsvd.max_usage_in_bytes + hugetlb.32MB.rsvd.usage_in_bytes + hugetlb.32MB.rsvd.failcnt + + +1. Page fault accounting + +hugetlb.<hugepagesize>.limit_in_bytes +hugetlb.<hugepagesize>.max_usage_in_bytes +hugetlb.<hugepagesize>.usage_in_bytes +hugetlb.<hugepagesize>.failcnt + +The HugeTLB controller allows users to limit the HugeTLB usage (page fault) per +control group and enforces the limit during page fault. Since HugeTLB +doesn't support page reclaim, enforcing the limit at page fault time implies +that, the application will get SIGBUS signal if it tries to fault in HugeTLB +pages beyond its limit. Therefore the application needs to know exactly how many +HugeTLB pages it uses before hand, and the sysadmin needs to make sure that +there are enough available on the machine for all the users to avoid processes +getting SIGBUS. + + +2. Reservation accounting + +hugetlb.<hugepagesize>.rsvd.limit_in_bytes +hugetlb.<hugepagesize>.rsvd.max_usage_in_bytes +hugetlb.<hugepagesize>.rsvd.usage_in_bytes +hugetlb.<hugepagesize>.rsvd.failcnt + +The HugeTLB controller allows to limit the HugeTLB reservations per control +group and enforces the controller limit at reservation time and at the fault of +HugeTLB memory for which no reservation exists. Since reservation limits are +enforced at reservation time (on mmap or shget), reservation limits never causes +the application to get SIGBUS signal if the memory was reserved before hand. For +MAP_NORESERVE allocations, the reservation limit behaves the same as the fault +limit, enforcing memory usage at fault time and causing the application to +receive a SIGBUS if it's crossing its limit. + +Reservation limits are superior to page fault limits described above, since +reservation limits are enforced at reservation time (on mmap or shget), and +never causes the application to get SIGBUS signal if the memory was reserved +before hand. This allows for easier fallback to alternatives such as +non-HugeTLB memory for example. In the case of page fault accounting, it's very +hard to avoid processes getting SIGBUS since the sysadmin needs precisely know +the HugeTLB usage of all the tasks in the system and make sure there is enough +pages to satisfy all requests. Avoiding tasks getting SIGBUS on overcommited +systems is practically impossible with page fault accounting. + + +3. Caveats with shared memory + +For shared HugeTLB memory, both HugeTLB reservation and page faults are charged +to the first task that causes the memory to be reserved or faulted, and all +subsequent uses of this reserved or faulted memory is done without charging. + +Shared HugeTLB memory is only uncharged when it is unreserved or deallocated. +This is usually when the HugeTLB file is deleted, and not when the task that +caused the reservation or fault has exited. + + +4. Caveats with HugeTLB cgroup offline. + +When a HugeTLB cgroup goes offline with some reservations or faults still +charged to it, the behavior is as follows: + +- The fault charges are charged to the parent HugeTLB cgroup (reparented), +- the reservation charges remain on the offline HugeTLB cgroup. + +This means that if a HugeTLB cgroup gets offlined while there is still HugeTLB +reservations charged to it, that cgroup persists as a zombie until all HugeTLB +reservations are uncharged. HugeTLB reservations behave in this manner to match +the memory controller whose cgroups also persist as zombie until all charged +memory is uncharged. Also, the tracking of HugeTLB reservations is a bit more +complex compared to the tracking of HugeTLB faults, so it is significantly +harder to reparent reservations at offline time. diff --git a/Documentation/admin-guide/cgroup-v1/index.rst b/Documentation/admin-guide/cgroup-v1/index.rst index 10bf48bae0b0..226f64473e8e 100644 --- a/Documentation/admin-guide/cgroup-v1/index.rst +++ b/Documentation/admin-guide/cgroup-v1/index.rst @@ -1,3 +1,5 @@ +.. _cgroup-v1: + ======================== Control Groups version 1 ======================== diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index 3f801461f0f3..bcc80269bb6a 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -9,7 +9,7 @@ This is the authoritative documentation on the design, interface and conventions of cgroup v2. It describes all userland-visible aspects of cgroup including core and specific controller behaviors. All future changes must be reflected in this document. Documentation for -v1 is available under Documentation/admin-guide/cgroup-v1/. +v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`. .. CONTENTS @@ -188,6 +188,17 @@ cgroup v2 currently supports the following mount options. modified through remount from the init namespace. The mount option is ignored on non-init namespace mounts. + memory_recursiveprot + + Recursively apply memory.min and memory.low protection to + entire subtrees, without requiring explicit downward + propagation into leaf cgroups. This allows protecting entire + subtrees from one another, while retaining free competition + within those subtrees. This should have been the default + behavior but is a mount-option to avoid regressing setups + relying on the original semantics (e.g. specifying bogusly + high 'bypass' protection values at higher tree levels). + Organizing Processes and Threads -------------------------------- @@ -1023,7 +1034,7 @@ All time durations are in microseconds. A read-only nested-key file which exists on non-root cgroups. Shows pressure stall information for CPU. See - Documentation/accounting/psi.rst for details. + :ref:`Documentation/accounting/psi.rst <psi>` for details. cpu.uclamp.min A read-write single value file which exists on non-root cgroups. @@ -1103,7 +1114,7 @@ PAGE_SIZE multiple when read back. proportionally to the overage, reducing reclaim pressure for smaller overages. - Effective min boundary is limited by memory.min values of + Effective min boundary is limited by memory.min values of all ancestor cgroups. If there is memory.min overcommitment (child cgroup or cgroups are requiring more protected memory than parent will allow), then each child cgroup will get @@ -1313,53 +1324,41 @@ PAGE_SIZE multiple when read back. Number of major page faults incurred workingset_refault - Number of refaults of previously evicted pages workingset_activate - Number of refaulted pages that were immediately activated workingset_nodereclaim - Number of times a shadow node has been reclaimed pgrefill - Amount of scanned pages (in an active LRU list) pgscan - Amount of scanned pages (in an inactive LRU list) pgsteal - Amount of reclaimed pages pgactivate - Amount of pages moved to the active LRU list pgdeactivate - Amount of pages moved to the inactive LRU list pglazyfree - Amount of pages postponed to be freed under memory pressure pglazyfreed - Amount of reclaimed lazyfree pages thp_fault_alloc - Number of transparent hugepages which were allocated to satisfy a page fault, including COW faults. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE is not set. thp_collapse_alloc - Number of transparent hugepages which were allocated to allow collapsing an existing range of pages. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE is not set. @@ -1403,7 +1402,7 @@ PAGE_SIZE multiple when read back. A read-only nested-key file which exists on non-root cgroups. Shows pressure stall information for memory. See - Documentation/accounting/psi.rst for details. + :ref:`Documentation/accounting/psi.rst <psi>` for details. Usage Guidelines @@ -1478,7 +1477,7 @@ IO Interface Files dios Number of discard IOs ====== ===================== - An example read output follows: + An example read output follows:: 8:16 rbytes=1459200 wbytes=314773504 rios=192 wios=353 dbytes=0 dios=0 8:0 rbytes=90430464 wbytes=299008000 rios=8950 wios=1252 dbytes=50331648 dios=3021 @@ -1643,7 +1642,7 @@ IO Interface Files A read-only nested-key file which exists on non-root cgroups. Shows pressure stall information for IO. See - Documentation/accounting/psi.rst for details. + :ref:`Documentation/accounting/psi.rst <psi>` for details. Writeback @@ -1853,7 +1852,7 @@ Cpuset Interface Files from the requested CPUs. The CPU numbers are comma-separated numbers or ranges. - For example: + For example:: # cat cpuset.cpus 0-4,6,8-10 @@ -1892,7 +1891,7 @@ Cpuset Interface Files from the requested memory nodes. The memory node numbers are comma-separated numbers or ranges. - For example: + For example:: # cat cpuset.mems 0-1,3 diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 252e5ef324e5..0dc2eb8e44e5 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -54,6 +54,9 @@ If you make a mistake with the syntax, the write will fail thus:: <debugfs>/dynamic_debug/control -bash: echo: write error: Invalid argument +Note, for systems without 'debugfs' enabled, the control file can be +found in ``/proc/dynamic_debug/control``. + Viewing Dynamic Debug Behaviour =============================== diff --git a/Documentation/driver-api/edid.rst b/Documentation/admin-guide/edid.rst index b1b5acd501ed..80deeb21a265 100644 --- a/Documentation/driver-api/edid.rst +++ b/Documentation/admin-guide/edid.rst @@ -11,11 +11,13 @@ Today, with the advent of Kernel Mode Setting, a graphics board is either correctly working because all components follow the standards - or the computer is unusable, because the screen remains dark after booting or it displays the wrong area. Cases when this happens are: + - The graphics board does not recognize the monitor. - The graphics board is unable to detect any EDID data. - The graphics board incorrectly forwards EDID data to the driver. - The monitor sends no or bogus EDID data. - A KVM sends its own EDID data instead of querying the connected monitor. + Adding the kernel parameter "nomodeset" helps in most cases, but causes restrictions later on. @@ -32,7 +34,7 @@ individual data for a specific misbehaving monitor, commented sources and a Makefile environment are given here. To create binary EDID and C source code files from the existing data -material, simply type "make". +material, simply type "make" in tools/edid/. If you want to create your own EDID file, copy the file 1024x768.S, replace the settings with your own data and add a new target to the diff --git a/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst b/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst index af6865b822d2..68d96f0e9c95 100644 --- a/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst +++ b/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst @@ -136,8 +136,6 @@ enables the mitigation by default. The mitigation can be controlled at boot time via a kernel command line option. See :ref:`taa_mitigation_control_command_line`. -.. _virt_mechanism: - Virtualization mitigation ^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst index f1d0ccffbe72..5a6269fb8593 100644 --- a/Documentation/admin-guide/index.rst +++ b/Documentation/admin-guide/index.rst @@ -75,6 +75,7 @@ configure specific aspects of kernel behavior to your liking. cputopology dell_rbu device-mapper/index + edid efi-stub ext4 nfs/index diff --git a/Documentation/admin-guide/iostats.rst b/Documentation/admin-guide/iostats.rst index df5b8345c41d..9b14b0c2c9c4 100644 --- a/Documentation/admin-guide/iostats.rst +++ b/Documentation/admin-guide/iostats.rst @@ -100,7 +100,7 @@ Field 10 -- # of milliseconds spent doing I/Os (unsigned int) Since 5.0 this field counts jiffies when at least one request was started or completed. If request runs more than 2 jiffies then some - I/O time will not be accounted unless there are other requests. + I/O time might be not accounted in case of concurrent requests. Field 11 -- weighted # of milliseconds spent doing I/Os (unsigned int) This field is incremented at each I/O start, I/O completion, I/O @@ -143,6 +143,9 @@ are summed (possibly overflowing the unsigned long variable they are summed to) and the result given to the user. There is no convenient user interface for accessing the per-CPU counters themselves. +Since 4.19 request times are measured with nanoseconds precision and +truncated to milliseconds before showing in this interface. + Disks vs Partitions ------------------- diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index c07815d230bc..f2a93c8679e8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -22,11 +22,13 @@ default: 0 acpi_backlight= [HW,ACPI] - acpi_backlight=vendor - acpi_backlight=video - If set to vendor, prefer vendor specific driver + { vendor | video | native | none } + If set to vendor, prefer vendor-specific driver (e.g. thinkpad_acpi, sony_acpi, etc.) instead of the ACPI video.ko driver. + If set to video, use the ACPI video.ko driver. + If set to native, use the device's native backlight mode. + If set to none, disable the ACPI backlight interface. acpi_force_32bit_fadt_addr force FADT to use 32 bit addresses rather than the @@ -450,6 +452,9 @@ bert_disable [ACPI] Disable BERT OS support on buggy BIOSes. + bgrt_disable [ACPI][X86] + Disable BGRT to avoid flickering OEM logo. + bttv.card= [HW,V4L] bttv (bt848 + bt878 based grabber cards) bttv.radio= Most important insmod options are available as kernel args too. @@ -522,6 +527,7 @@ Default value is set via a kernel config option. Value can be changed at runtime via /sys/fs/selinux/checkreqprot. + Setting checkreqprot to 1 is deprecated. cio_ignore= [S390] See Documentation/s390/common_io.rst for details. @@ -679,7 +685,7 @@ coredump_filter= [KNL] Change the default value for /proc/<pid>/coredump_filter. - See also Documentation/filesystems/proc.txt. + See also Documentation/filesystems/proc.rst. coresight_cpu_debug.enable [ARM,ARM64] @@ -956,7 +962,7 @@ edid/1680x1050.bin, or edid/1920x1080.bin is given and no file with the same name exists. Details and instructions how to build your own EDID data are - available in Documentation/driver-api/edid.rst. An EDID + available in Documentation/admin-guide/edid.rst. An EDID data set will only be used for a particular connector, if its name and a colon are prepended to the EDID name. Each connector may use a unique EDID data @@ -986,10 +992,6 @@ Documentation/admin-guide/dynamic-debug-howto.rst for details. - nompx [X86] Disables Intel Memory Protection Extensions. - See Documentation/x86/intel_mpx.rst for more - information about the feature. - nopku [X86] Disable Memory Protection Keys CPU feature found in some Intel CPUs. @@ -1099,6 +1101,12 @@ A valid base address must be provided, and the serial port must already be setup and configured. + ec_imx21,<addr> + ec_imx6q,<addr> + Start an early, polled-mode, output-only console on the + Freescale i.MX UART at the specified address. The UART + must already be setup and configured. + ar3700_uart,<addr> Start an early, polled-mode console on the Armada 3700 serial port at the specified @@ -1354,6 +1362,24 @@ can be changed at run time by the max_graph_depth file in the tracefs tracing directory. default: 0 (no limit) + fw_devlink= [KNL] Create device links between consumer and supplier + devices by scanning the firmware to infer the + consumer/supplier relationships. This feature is + especially useful when drivers are loaded as modules as + it ensures proper ordering of tasks like device probing + (suppliers first, then consumers), supplier boot state + clean up (only after all consumers have probed), + suspend/resume & runtime PM (consumers first, then + suppliers). + Format: { off | permissive | on | rpm } + off -- Don't create device links from firmware info. + permissive -- Create device links from firmware info + but use it only for ordering boot state clean + up (sync_state() calls). + on -- Create device links from firmware info and use it + to enforce probe and suspend/resume ordering. + rpm -- Like "on", but also use to order runtime PM. + gamecon.map[2|3]= [HW,JOY] Multisystem joystick and NES/SNES/PSX pad support via parallel port (up to 5 devices per port) @@ -1445,6 +1471,14 @@ hpet_mmap= [X86, HPET_MMAP] Allow userspace to mmap HPET registers. Default set by CONFIG_HPET_MMAP_DEFAULT. + hugetlb_cma= [HW] The size of a cma area used for allocation + of gigantic hugepages. + Format: nn[KMGTPE] + + Reserve a cma area of given size and allocate gigantic + hugepages using the cma allocator. If enabled, the + boot-time allocation of gigantic hugepages is skipped. + hugepages= [HW,X86-32,IA-64] HugeTLB pages to allocate at boot. hugepagesz= [HW,IA-64,PPC,X86-64] The size of the HugeTLB pages. On x86-64 and powerpc, this option can be specified @@ -1779,7 +1813,7 @@ provided by tboot because it makes the system vulnerable to DMA attacks. nobounce [Default off] - Disable bounce buffer for unstrusted devices such as + Disable bounce buffer for untrusted devices such as the Thunderbolt devices. This will treat the untrusted devices as the trusted ones, hence might expose security risks of DMA attacks. @@ -1883,7 +1917,7 @@ No delay ip= [IP_PNP] - See Documentation/filesystems/nfs/nfsroot.txt. + See Documentation/admin-guide/nfs/nfsroot.rst. ipcmni_extend [KNL] Extend the maximum number of unique System V IPC identifiers from 32,768 to 16,777,216. @@ -2543,13 +2577,22 @@ For details see: Documentation/admin-guide/hw-vuln/mds.rst mem=nn[KMG] [KNL,BOOT] Force usage of a specific amount of memory - Amount of memory to be used when the kernel is not able - to see the whole system memory or for test. + Amount of memory to be used in cases as follows: + + 1 for test; + 2 when the kernel is not able to see the whole system memory; + 3 memory that lies after 'mem=' boundary is excluded from + the hypervisor, then assigned to KVM guests. + [X86] Work as limiting max address. Use together with memmap= to avoid physical address space collisions. Without memmap= PCI devices could be placed at addresses belonging to unused RAM. + Note that this only takes effects during boot time since + in above case 3, memory may need be hot added after boot + if system memory of hypervisor is not sufficient. + mem=nopentium [BUGS=X86-32] Disable usage of 4MB pages for kernel memory. @@ -2795,7 +2838,7 @@ <name>,<region-number>[,<base>,<size>,<buswidth>,<altbuswidth>] mtdparts= [MTD] - See drivers/mtd/cmdlinepart.c. + See drivers/mtd/parsers/cmdlinepart.c multitce=off [PPC] This parameter disables the use of the pSeries firmware feature for updating multiple TCE entries @@ -2853,13 +2896,13 @@ Default value is 0. nfsaddrs= [NFS] Deprecated. Use ip= instead. - See Documentation/filesystems/nfs/nfsroot.txt. + See Documentation/admin-guide/nfs/nfsroot.rst. nfsroot= [NFS] nfs root filesystem for disk-less boxes. - See Documentation/filesystems/nfs/nfsroot.txt. + See Documentation/admin-guide/nfs/nfsroot.rst. nfsrootdebug [NFS] enable nfsroot debugging messages. - See Documentation/filesystems/nfs/nfsroot.txt. + See Documentation/admin-guide/nfs/nfsroot.rst. nfs.callback_nr_threads= [NFSv4] set the total number of threads that the @@ -3174,7 +3217,7 @@ [X86,PV_OPS] Disable paravirtualized VMware scheduler clock and use the default one. - no-steal-acc [X86,KVM,ARM64] Disable paravirtualized steal time + no-steal-acc [X86,PV_OPS,ARM64] Disable paravirtualized steal time accounting. steal time is computed, but won't influence scheduler behaviour @@ -3285,12 +3328,6 @@ This can be set from sysctl after boot. See Documentation/admin-guide/sysctl/vm.rst for details. - of_devlink [OF, KNL] Create device links between consumer and - supplier devices by scanning the devictree to infer the - consumer/supplier relationships. A consumer device - will not be probed until all the supplier devices have - probed successfully. - ohci1394_dma=early [HW] enable debugging via the ohci1394 driver. See Documentation/debugging-via-ohci1394.txt for more info. @@ -3698,6 +3735,9 @@ Override pmtimer IOPort with a hex value. e.g. pmtmr=0x508 + pm_debug_messages [SUSPEND,KNL] + Enable suspend/resume debug messages during boot up. + pnp.debug=1 [PNP] Enable PNP debug messages (depends on the CONFIG_PNP_DEBUG_MESSAGES option). Change at run-time @@ -3799,6 +3839,11 @@ before loading. See Documentation/admin-guide/blockdev/ramdisk.rst. + prot_virt= [S390] enable hosting protected virtual machines + isolated from the hypervisor (if hardware supports + that). + Format: <bool> + psi= [KNL] Enable or disable pressure stall information tracking. Format: <bool> @@ -3984,6 +4029,15 @@ Set threshold of queued RCU callbacks below which batch limiting is re-enabled. + rcutree.qovld= [KNL] + Set threshold of queued RCU callbacks beyond which + RCU's force-quiescent-state scan will aggressively + enlist help from cond_resched() and sched IPIs to + help CPUs more quickly reach quiescent states. + Set to less than zero to make this be set based + on rcutree.qhimark at boot time and to zero to + disable more aggressive help enlistment. + rcutree.rcu_idle_gp_delay= [KNL] Set wakeup interval for idle CPUs that have RCU callbacks (RCU_FAST_NO_HZ=y). @@ -4199,6 +4253,12 @@ rcupdate.rcu_cpu_stall_suppress= [KNL] Suppress RCU CPU stall warning messages. + rcupdate.rcu_cpu_stall_suppress_at_boot= [KNL] + Suppress RCU CPU stall warning messages and + rcutorture writer stall warnings that occur + during early boot, that is, during the time + before the init task is spawned. + rcupdate.rcu_cpu_stall_timeout= [KNL] Set timeout for RCU CPU stall warning messages. @@ -4392,6 +4452,22 @@ incurs a small amount of overhead in the scheduler but is useful for debugging and performance tuning. + sched_thermal_decay_shift= + [KNL, SMP] Set a decay shift for scheduler thermal + pressure signal. Thermal pressure signal follows the + default decay period of other scheduler pelt + signals(usually 32 ms but configurable). Setting + sched_thermal_decay_shift will left shift the decay + period for the thermal pressure signal by the shift + value. + i.e. with the default pelt decay period of 32 ms + sched_thermal_decay_shift thermal pressure decay pr + 1 64 ms + 2 128 ms + and so on. + Format: integer between 0 and 10 + Default is 0. + skew_tick= [KNL] Offset the periodic timer tick per cpu to mitigate xtime_lock contention on larger systems, and/or RCU lock contention on all systems with CONFIG_MAXSMP set. @@ -4514,10 +4590,10 @@ Format: <integer> A nonzero value instructs the soft-lockup detector - to panic the machine when a soft-lockup occurs. This - is also controlled by CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC - which is the respective build-time switch to that - functionality. + to panic the machine when a soft-lockup occurs. It is + also controlled by the kernel.softlockup_panic sysctl + and CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC, which is the + respective build-time switch to that functionality. softlockup_all_cpu_backtrace= [KNL] Should the soft-lockup detector generate @@ -4659,6 +4735,28 @@ spia_pedr= spia_peddr= + split_lock_detect= + [X86] Enable split lock detection + + When enabled (and if hardware support is present), atomic + instructions that access data across cache line + boundaries will result in an alignment check exception. + + off - not enabled + + warn - the kernel will emit rate limited warnings + about applications triggering the #AC + exception. This mode is the default on CPUs + that supports split lock detection. + + fatal - the kernel will send SIGBUS to applications + that trigger the #AC exception. + + If an #AC exception is hit in the kernel or in + firmware (i.e. not while executing in user mode) + the kernel will oops in either "warn" or "fatal" + mode. + srcutree.counter_wrap_check [KNL] Specifies how frequently to check for grace-period sequence counter wrap for the @@ -4871,6 +4969,10 @@ topology updates sent by the hypervisor to this LPAR. + torture.disable_onoff_at_boot= [KNL] + Prevent the CPU-hotplug component of torturing + until after init has spawned. + tp720= [HW,PS2] tpm_suspend_pcr=[HW,TPM] diff --git a/Documentation/admin-guide/kernel-per-CPU-kthreads.rst b/Documentation/admin-guide/kernel-per-CPU-kthreads.rst index baeeba8762ae..21818aca4708 100644 --- a/Documentation/admin-guide/kernel-per-CPU-kthreads.rst +++ b/Documentation/admin-guide/kernel-per-CPU-kthreads.rst @@ -234,7 +234,7 @@ To reduce its OS jitter, do any of the following: Such a workqueue can be confined to a given subset of the CPUs using the ``/sys/devices/virtual/workqueue/*/cpumask`` sysfs files. The set of WQ_SYSFS workqueues can be displayed using - "ls sys/devices/virtual/workqueue". That said, the workqueues + "ls /sys/devices/virtual/workqueue". That said, the workqueues maintainer would like to caution people against indiscriminately sprinkling WQ_SYSFS across all the workqueues. The reason for caution is that it is easy to add WQ_SYSFS, but because sysfs is diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation/admin-guide/mm/transhuge.rst index bd5714547cee..2f31de8f7c74 100644 --- a/Documentation/admin-guide/mm/transhuge.rst +++ b/Documentation/admin-guide/mm/transhuge.rst @@ -310,6 +310,11 @@ thp_fault_fallback is incremented if a page fault fails to allocate a huge page and instead falls back to using small pages. +thp_fault_fallback_charge + is incremented if a page fault fails to charge a huge page and + instead falls back to using small pages even though the + allocation was successful. + thp_collapse_alloc_failed is incremented if khugepaged found a range of pages that should be collapsed into one huge page but failed @@ -319,6 +324,15 @@ thp_file_alloc is incremented every time a file huge page is successfully allocated. +thp_file_fallback + is incremented if a file huge page is attempted to be allocated + but fails and instead falls back to using small pages. + +thp_file_fallback_charge + is incremented if a file huge page cannot be charged and instead + falls back to using small pages even though the allocation was + successful. + thp_file_mapped is incremented every time a file huge page is mapped into user address space. diff --git a/Documentation/admin-guide/mm/userfaultfd.rst b/Documentation/admin-guide/mm/userfaultfd.rst index 5048cf661a8a..c30176e67900 100644 --- a/Documentation/admin-guide/mm/userfaultfd.rst +++ b/Documentation/admin-guide/mm/userfaultfd.rst @@ -108,6 +108,57 @@ UFFDIO_COPY. They're atomic as in guaranteeing that nothing can see an half copied page since it'll keep userfaulting until the copy has finished. +Notes: + +- If you requested UFFDIO_REGISTER_MODE_MISSING when registering then + you must provide some kind of page in your thread after reading from + the uffd. You must provide either UFFDIO_COPY or UFFDIO_ZEROPAGE. + The normal behavior of the OS automatically providing a zero page on + an annonymous mmaping is not in place. + +- None of the page-delivering ioctls default to the range that you + registered with. You must fill in all fields for the appropriate + ioctl struct including the range. + +- You get the address of the access that triggered the missing page + event out of a struct uffd_msg that you read in the thread from the + uffd. You can supply as many pages as you want with UFFDIO_COPY or + UFFDIO_ZEROPAGE. Keep in mind that unless you used DONTWAKE then + the first of any of those IOCTLs wakes up the faulting thread. + +- Be sure to test for all errors including (pollfd[0].revents & + POLLERR). This can happen, e.g. when ranges supplied were + incorrect. + +Write Protect Notifications +--------------------------- + +This is equivalent to (but faster than) using mprotect and a SIGSEGV +signal handler. + +Firstly you need to register a range with UFFDIO_REGISTER_MODE_WP. +Instead of using mprotect(2) you use ioctl(uffd, UFFDIO_WRITEPROTECT, +struct *uffdio_writeprotect) while mode = UFFDIO_WRITEPROTECT_MODE_WP +in the struct passed in. The range does not default to and does not +have to be identical to the range you registered with. You can write +protect as many ranges as you like (inside the registered range). +Then, in the thread reading from uffd the struct will have +msg.arg.pagefault.flags & UFFD_PAGEFAULT_FLAG_WP set. Now you send +ioctl(uffd, UFFDIO_WRITEPROTECT, struct *uffdio_writeprotect) again +while pagefault.mode does not have UFFDIO_WRITEPROTECT_MODE_WP set. +This wakes up the thread which will continue to run with writes. This +allows you to do the bookkeeping about the write in the uffd reading +thread before the ioctl. + +If you registered with both UFFDIO_REGISTER_MODE_MISSING and +UFFDIO_REGISTER_MODE_WP then you need to think about the sequence in +which you supply a page and undo write protect. Note that there is a +difference between writes into a WP area and into a !WP area. The +former will have UFFD_PAGEFAULT_FLAG_WP set, the latter +UFFD_PAGEFAULT_FLAG_WRITE. The latter did not fail on protection but +you still need to supply a page when UFFDIO_REGISTER_MODE_MISSING was +used. + QEMU/KVM ======== diff --git a/Documentation/admin-guide/perf/imx-ddr.rst b/Documentation/admin-guide/perf/imx-ddr.rst index 3726a10a03ba..f05f56c73b7d 100644 --- a/Documentation/admin-guide/perf/imx-ddr.rst +++ b/Documentation/admin-guide/perf/imx-ddr.rst @@ -43,7 +43,8 @@ value 1 for supported. AXI_ID and AXI_MASKING are mapped on DPCR1 register in performance counter. When non-masked bits are matching corresponding AXI_ID bits then counter is - incremented. Perf counter is incremented if + incremented. Perf counter is incremented if:: + AxID && AXI_MASKING == AXI_ID && AXI_MASKING This filter doesn't support filter different AXI ID for axid-read and axid-write diff --git a/Documentation/admin-guide/pm/cpufreq_drivers.rst b/Documentation/admin-guide/pm/cpufreq_drivers.rst new file mode 100644 index 000000000000..9a134ae65803 --- /dev/null +++ b/Documentation/admin-guide/pm/cpufreq_drivers.rst @@ -0,0 +1,274 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================================================= +Legacy Documentation of CPU Performance Scaling Drivers +======================================================= + +Included below are historic documents describing assorted +:doc:`CPU performance scaling <cpufreq>` drivers. They are reproduced verbatim, +with the original white space formatting and indentation preserved, except for +the added leading space character in every line of text. + + +AMD PowerNow! Drivers +===================== + +:: + + PowerNow! and Cool'n'Quiet are AMD names for frequency + management capabilities in AMD processors. As the hardware + implementation changes in new generations of the processors, + there is a different cpu-freq driver for each generation. + + Note that the driver's will not load on the "wrong" hardware, + so it is safe to try each driver in turn when in doubt as to + which is the correct driver. + + Note that the functionality to change frequency (and voltage) + is not available in all processors. The drivers will refuse + to load on processors without this capability. The capability + is detected with the cpuid instruction. + + The drivers use BIOS supplied tables to obtain frequency and + voltage information appropriate for a particular platform. + Frequency transitions will be unavailable if the BIOS does + not supply these tables. + + 6th Generation: powernow-k6 + + 7th Generation: powernow-k7: Athlon, Duron, Geode. + + 8th Generation: powernow-k8: Athlon, Athlon 64, Opteron, Sempron. + Documentation on this functionality in 8th generation processors + is available in the "BIOS and Kernel Developer's Guide", publication + 26094, in chapter 9, available for download from www.amd.com. + + BIOS supplied data, for powernow-k7 and for powernow-k8, may be + from either the PSB table or from ACPI objects. The ACPI support + is only available if the kernel config sets CONFIG_ACPI_PROCESSOR. + The powernow-k8 driver will attempt to use ACPI if so configured, + and fall back to PST if that fails. + The powernow-k7 driver will try to use the PSB support first, and + fall back to ACPI if the PSB support fails. A module parameter, + acpi_force, is provided to force ACPI support to be used instead + of PSB support. + + +``cpufreq-nforce2`` +=================== + +:: + + The cpufreq-nforce2 driver changes the FSB on nVidia nForce2 platforms. + + This works better than on other platforms, because the FSB of the CPU + can be controlled independently from the PCI/AGP clock. + + The module has two options: + + fid: multiplier * 10 (for example 8.5 = 85) + min_fsb: minimum FSB + + If not set, fid is calculated from the current CPU speed and the FSB. + min_fsb defaults to FSB at boot time - 50 MHz. + + IMPORTANT: The available range is limited downwards! + Also the minimum available FSB can differ, for systems + booting with 200 MHz, 150 should always work. + + +``pcc-cpufreq`` +=============== + +:: + + /* + * pcc-cpufreq.txt - PCC interface documentation + * + * Copyright (C) 2009 Red Hat, Matthew Garrett <mjg@redhat.com> + * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. + * Nagananda Chumbalkar <nagananda.chumbalkar@hp.com> + */ + + + Processor Clocking Control Driver + --------------------------------- + + Contents: + --------- + 1. Introduction + 1.1 PCC interface + 1.1.1 Get Average Frequency + 1.1.2 Set Desired Frequency + 1.2 Platforms affected + 2. Driver and /sys details + 2.1 scaling_available_frequencies + 2.2 cpuinfo_transition_latency + 2.3 cpuinfo_cur_freq + 2.4 related_cpus + 3. Caveats + + 1. Introduction: + ---------------- + Processor Clocking Control (PCC) is an interface between the platform + firmware and OSPM. It is a mechanism for coordinating processor + performance (ie: frequency) between the platform firmware and the OS. + + The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC + interface. + + OS utilizes the PCC interface to inform platform firmware what frequency the + OS wants for a logical processor. The platform firmware attempts to achieve + the requested frequency. If the request for the target frequency could not be + satisfied by platform firmware, then it usually means that power budget + conditions are in place, and "power capping" is taking place. + + 1.1 PCC interface: + ------------------ + The complete PCC specification is available here: + https://acpica.org/sites/acpica/files/Processor-Clocking-Control-v1p0.pdf + + PCC relies on a shared memory region that provides a channel for communication + between the OS and platform firmware. PCC also implements a "doorbell" that + is used by the OS to inform the platform firmware that a command has been + sent. + + The ACPI PCCH() method is used to discover the location of the PCC shared + memory region. The shared memory region header contains the "command" and + "status" interface. PCCH() also contains details on how to access the platform + doorbell. + + The following commands are supported by the PCC interface: + * Get Average Frequency + * Set Desired Frequency + + The ACPI PCCP() method is implemented for each logical processor and is + used to discover the offsets for the input and output buffers in the shared + memory region. + + When PCC mode is enabled, the platform will not expose processor performance + or throttle states (_PSS, _TSS and related ACPI objects) to OSPM. Therefore, + the native P-state driver (such as acpi-cpufreq for Intel, powernow-k8 for + AMD) will not load. + + However, OSPM remains in control of policy. The governor (eg: "ondemand") + computes the required performance for each processor based on server workload. + The PCC driver fills in the command interface, and the input buffer and + communicates the request to the platform firmware. The platform firmware is + responsible for delivering the requested performance. + + Each PCC command is "global" in scope and can affect all the logical CPUs in + the system. Therefore, PCC is capable of performing "group" updates. With PCC + the OS is capable of getting/setting the frequency of all the logical CPUs in + the system with a single call to the BIOS. + + 1.1.1 Get Average Frequency: + ---------------------------- + This command is used by the OSPM to query the running frequency of the + processor since the last time this command was completed. The output buffer + indicates the average unhalted frequency of the logical processor expressed as + a percentage of the nominal (ie: maximum) CPU frequency. The output buffer + also signifies if the CPU frequency is limited by a power budget condition. + + 1.1.2 Set Desired Frequency: + ---------------------------- + This command is used by the OSPM to communicate to the platform firmware the + desired frequency for a logical processor. The output buffer is currently + ignored by OSPM. The next invocation of "Get Average Frequency" will inform + OSPM if the desired frequency was achieved or not. + + 1.2 Platforms affected: + ----------------------- + The PCC driver will load on any system where the platform firmware: + * supports the PCC interface, and the associated PCCH() and PCCP() methods + * assumes responsibility for managing the hardware clocking controls in order + to deliver the requested processor performance + + Currently, certain HP ProLiant platforms implement the PCC interface. On those + platforms PCC is the "default" choice. + + However, it is possible to disable this interface via a BIOS setting. In + such an instance, as is also the case on platforms where the PCC interface + is not implemented, the PCC driver will fail to load silently. + + 2. Driver and /sys details: + --------------------------- + When the driver loads, it merely prints the lowest and the highest CPU + frequencies supported by the platform firmware. + + The PCC driver loads with a message such as: + pcc-cpufreq: (v1.00.00) driver loaded with frequency limits: 1600 MHz, 2933 + MHz + + This means that the OPSM can request the CPU to run at any frequency in + between the limits (1600 MHz, and 2933 MHz) specified in the message. + + Internally, there is no need for the driver to convert the "target" frequency + to a corresponding P-state. + + The VERSION number for the driver will be of the format v.xy.ab. + eg: 1.00.02 + ----- -- + | | + | -- this will increase with bug fixes/enhancements to the driver + |-- this is the version of the PCC specification the driver adheres to + + + The following is a brief discussion on some of the fields exported via the + /sys filesystem and how their values are affected by the PCC driver: + + 2.1 scaling_available_frequencies: + ---------------------------------- + scaling_available_frequencies is not created in /sys. No intermediate + frequencies need to be listed because the BIOS will try to achieve any + frequency, within limits, requested by the governor. A frequency does not have + to be strictly associated with a P-state. + + 2.2 cpuinfo_transition_latency: + ------------------------------- + The cpuinfo_transition_latency field is 0. The PCC specification does + not include a field to expose this value currently. + + 2.3 cpuinfo_cur_freq: + --------------------- + A) Often cpuinfo_cur_freq will show a value different than what is declared + in the scaling_available_frequencies or scaling_cur_freq, or scaling_max_freq. + This is due to "turbo boost" available on recent Intel processors. If certain + conditions are met the BIOS can achieve a slightly higher speed than requested + by OSPM. An example: + + scaling_cur_freq : 2933000 + cpuinfo_cur_freq : 3196000 + + B) There is a round-off error associated with the cpuinfo_cur_freq value. + Since the driver obtains the current frequency as a "percentage" (%) of the + nominal frequency from the BIOS, sometimes, the values displayed by + scaling_cur_freq and cpuinfo_cur_freq may not match. An example: + + scaling_cur_freq : 1600000 + cpuinfo_cur_freq : 1583000 + + In this example, the nominal frequency is 2933 MHz. The driver obtains the + current frequency, cpuinfo_cur_freq, as 54% of the nominal frequency: + + 54% of 2933 MHz = 1583 MHz + + Nominal frequency is the maximum frequency of the processor, and it usually + corresponds to the frequency of the P0 P-state. + + 2.4 related_cpus: + ----------------- + The related_cpus field is identical to affected_cpus. + + affected_cpus : 4 + related_cpus : 4 + + Currently, the PCC driver does not evaluate _PSD. The platforms that support + PCC do not implement SW_ALL. So OSPM doesn't need to perform any coordination + to ensure that the same frequency is requested of all dependent CPUs. + + 3. Caveats: + ----------- + The "cpufreq_stats" module in its present form cannot be loaded and + expected to work with the PCC driver. Since the "cpufreq_stats" module + provides information wrt each P-state, it is not applicable to the PCC driver. diff --git a/Documentation/admin-guide/pm/cpuidle.rst b/Documentation/admin-guide/pm/cpuidle.rst index 6a06dc473dd6..5605cc6f9560 100644 --- a/Documentation/admin-guide/pm/cpuidle.rst +++ b/Documentation/admin-guide/pm/cpuidle.rst @@ -583,20 +583,17 @@ Power Management Quality of Service for CPUs The power management quality of service (PM QoS) framework in the Linux kernel allows kernel code and user space processes to set constraints on various energy-efficiency features of the kernel to prevent performance from dropping -below a required level. The PM QoS constraints can be set globally, in -predefined categories referred to as PM QoS classes, or against individual -devices. +below a required level. CPU idle time management can be affected by PM QoS in two ways, through the -global constraint in the ``PM_QOS_CPU_DMA_LATENCY`` class and through the -resume latency constraints for individual CPUs. Kernel code (e.g. device -drivers) can set both of them with the help of special internal interfaces -provided by the PM QoS framework. User space can modify the former by opening -the :file:`cpu_dma_latency` special device file under :file:`/dev/` and writing -a binary value (interpreted as a signed 32-bit integer) to it. In turn, the -resume latency constraint for a CPU can be modified by user space by writing a -string (representing a signed 32-bit integer) to the -:file:`power/pm_qos_resume_latency_us` file under +global CPU latency limit and through the resume latency constraints for +individual CPUs. Kernel code (e.g. device drivers) can set both of them with +the help of special internal interfaces provided by the PM QoS framework. User +space can modify the former by opening the :file:`cpu_dma_latency` special +device file under :file:`/dev/` and writing a binary value (interpreted as a +signed 32-bit integer) to it. In turn, the resume latency constraint for a CPU +can be modified from user space by writing a string (representing a signed +32-bit integer) to the :file:`power/pm_qos_resume_latency_us` file under :file:`/sys/devices/system/cpu/cpu<N>/` in ``sysfs``, where the CPU number ``<N>`` is allocated at the system initialization time. Negative values will be rejected in both cases and, also in both cases, the written integer @@ -605,32 +602,34 @@ number will be interpreted as a requested PM QoS constraint in microseconds. The requested value is not automatically applied as a new constraint, however, as it may be less restrictive (greater in this particular case) than another constraint previously requested by someone else. For this reason, the PM QoS -framework maintains a list of requests that have been made so far in each -global class and for each device, aggregates them and applies the effective -(minimum in this particular case) value as the new constraint. +framework maintains a list of requests that have been made so far for the +global CPU latency limit and for each individual CPU, aggregates them and +applies the effective (minimum in this particular case) value as the new +constraint. In fact, opening the :file:`cpu_dma_latency` special device file causes a new -PM QoS request to be created and added to the priority list of requests in the -``PM_QOS_CPU_DMA_LATENCY`` class and the file descriptor coming from the -"open" operation represents that request. If that file descriptor is then -used for writing, the number written to it will be associated with the PM QoS -request represented by it as a new requested constraint value. Next, the -priority list mechanism will be used to determine the new effective value of -the entire list of requests and that effective value will be set as a new -constraint. Thus setting a new requested constraint value will only change the -real constraint if the effective "list" value is affected by it. In particular, -for the ``PM_QOS_CPU_DMA_LATENCY`` class it only affects the real constraint if -it is the minimum of the requested constraints in the list. The process holding -a file descriptor obtained by opening the :file:`cpu_dma_latency` special device -file controls the PM QoS request associated with that file descriptor, but it -controls this particular PM QoS request only. +PM QoS request to be created and added to a global priority list of CPU latency +limit requests and the file descriptor coming from the "open" operation +represents that request. If that file descriptor is then used for writing, the +number written to it will be associated with the PM QoS request represented by +it as a new requested limit value. Next, the priority list mechanism will be +used to determine the new effective value of the entire list of requests and +that effective value will be set as a new CPU latency limit. Thus requesting a +new limit value will only change the real limit if the effective "list" value is +affected by it, which is the case if it is the minimum of the requested values +in the list. + +The process holding a file descriptor obtained by opening the +:file:`cpu_dma_latency` special device file controls the PM QoS request +associated with that file descriptor, but it controls this particular PM QoS +request only. Closing the :file:`cpu_dma_latency` special device file or, more precisely, the file descriptor obtained while opening it, causes the PM QoS request associated -with that file descriptor to be removed from the ``PM_QOS_CPU_DMA_LATENCY`` -class priority list and destroyed. If that happens, the priority list mechanism -will be used, again, to determine the new effective value for the whole list -and that value will become the new real constraint. +with that file descriptor to be removed from the global priority list of CPU +latency limit requests and destroyed. If that happens, the priority list +mechanism will be used again, to determine the new effective value for the whole +list and that value will become the new limit. In turn, for each CPU there is one resume latency PM QoS request associated with the :file:`power/pm_qos_resume_latency_us` file under @@ -647,10 +646,10 @@ CPU in question every time the list of requests is updated this way or another (there may be other requests coming from kernel code in that list). CPU idle time governors are expected to regard the minimum of the global -effective ``PM_QOS_CPU_DMA_LATENCY`` class constraint and the effective -resume latency constraint for the given CPU as the upper limit for the exit -latency of the idle states they can select for that CPU. They should never -select any idle states with exit latency beyond that limit. +(effective) CPU latency limit and the effective resume latency constraint for +the given CPU as the upper limit for the exit latency of the idle states that +they are allowed to select for that CPU. They should never select any idle +states with exit latency beyond that limit. Idle States Control Via Kernel Command Line diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst index 67e414e34f37..ad392f3aee06 100644 --- a/Documentation/admin-guide/pm/intel_pstate.rst +++ b/Documentation/admin-guide/pm/intel_pstate.rst @@ -734,10 +734,10 @@ References ========== .. [1] Kristen Accardi, *Balancing Power and Performance in the Linux Kernel*, - http://events.linuxfoundation.org/sites/events/files/slides/LinuxConEurope_2015.pdf + https://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdf .. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*, - http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html + https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html .. [3] *Advanced Configuration and Power Interface Specification*, https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf diff --git a/Documentation/admin-guide/pm/suspend-flows.rst b/Documentation/admin-guide/pm/suspend-flows.rst new file mode 100644 index 000000000000..c479d7462647 --- /dev/null +++ b/Documentation/admin-guide/pm/suspend-flows.rst @@ -0,0 +1,270 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +========================= +System Suspend Code Flows +========================= + +:Copyright: |copy| 2020 Intel Corporation + +:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com> + +At least one global system-wide transition needs to be carried out for the +system to get from the working state into one of the supported +:doc:`sleep states <sleep-states>`. Hibernation requires more than one +transition to occur for this purpose, but the other sleep states, commonly +referred to as *system-wide suspend* (or simply *system suspend*) states, need +only one. + +For those sleep states, the transition from the working state of the system into +the target sleep state is referred to as *system suspend* too (in the majority +of cases, whether this means a transition or a sleep state of the system should +be clear from the context) and the transition back from the sleep state into the +working state is referred to as *system resume*. + +The kernel code flows associated with the suspend and resume transitions for +different sleep states of the system are quite similar, but there are some +significant differences between the :ref:`suspend-to-idle <s2idle>` code flows +and the code flows related to the :ref:`suspend-to-RAM <s2ram>` and +:ref:`standby <standby>` sleep states. + +The :ref:`suspend-to-RAM <s2ram>` and :ref:`standby <standby>` sleep states +cannot be implemented without platform support and the difference between them +boils down to the platform-specific actions carried out by the suspend and +resume hooks that need to be provided by the platform driver to make them +available. Apart from that, the suspend and resume code flows for these sleep +states are mostly identical, so they both together will be referred to as +*platform-dependent suspend* states in what follows. + + +.. _s2idle_suspend: + +Suspend-to-idle Suspend Code Flow +================================= + +The following steps are taken in order to transition the system from the working +state to the :ref:`suspend-to-idle <s2idle>` sleep state: + + 1. Invoking system-wide suspend notifiers. + + Kernel subsystems can register callbacks to be invoked when the suspend + transition is about to occur and when the resume transition has finished. + + That allows them to prepare for the change of the system state and to clean + up after getting back to the working state. + + 2. Freezing tasks. + + Tasks are frozen primarily in order to avoid unchecked hardware accesses + from user space through MMIO regions or I/O registers exposed directly to + it and to prevent user space from entering the kernel while the next step + of the transition is in progress (which might have been problematic for + various reasons). + + All user space tasks are intercepted as though they were sent a signal and + put into uninterruptible sleep until the end of the subsequent system resume + transition. + + The kernel threads that choose to be frozen during system suspend for + specific reasons are frozen subsequently, but they are not intercepted. + Instead, they are expected to periodically check whether or not they need + to be frozen and to put themselves into uninterruptible sleep if so. [Note, + however, that kernel threads can use locking and other concurrency controls + available in kernel space to synchronize themselves with system suspend and + resume, which can be much more precise than the freezing, so the latter is + not a recommended option for kernel threads.] + + 3. Suspending devices and reconfiguring IRQs. + + Devices are suspended in four phases called *prepare*, *suspend*, + *late suspend* and *noirq suspend* (see :ref:`driverapi_pm_devices` for more + information on what exactly happens in each phase). + + Every device is visited in each phase, but typically it is not physically + accessed in more than two of them. + + The runtime PM API is disabled for every device during the *late* suspend + phase and high-level ("action") interrupt handlers are prevented from being + invoked before the *noirq* suspend phase. + + Interrupts are still handled after that, but they are only acknowledged to + interrupt controllers without performing any device-specific actions that + would be triggered in the working state of the system (those actions are + deferred till the subsequent system resume transition as described + `below <s2idle_resume_>`_). + + IRQs associated with system wakeup devices are "armed" so that the resume + transition of the system is started when one of them signals an event. + + 4. Freezing the scheduler tick and suspending timekeeping. + + When all devices have been suspended, CPUs enter the idle loop and are put + into the deepest available idle state. While doing that, each of them + "freezes" its own scheduler tick so that the timer events associated with + the tick do not occur until the CPU is woken up by another interrupt source. + + The last CPU to enter the idle state also stops the timekeeping which + (among other things) prevents high resolution timers from triggering going + forward until the first CPU that is woken up restarts the timekeeping. + That allows the CPUs to stay in the deep idle state relatively long in one + go. + + From this point on, the CPUs can only be woken up by non-timer hardware + interrupts. If that happens, they go back to the idle state unless the + interrupt that woke up one of them comes from an IRQ that has been armed for + system wakeup, in which case the system resume transition is started. + + +.. _s2idle_resume: + +Suspend-to-idle Resume Code Flow +================================ + +The following steps are taken in order to transition the system from the +:ref:`suspend-to-idle <s2idle>` sleep state into the working state: + + 1. Resuming timekeeping and unfreezing the scheduler tick. + + When one of the CPUs is woken up (by a non-timer hardware interrupt), it + leaves the idle state entered in the last step of the preceding suspend + transition, restarts the timekeeping (unless it has been restarted already + by another CPU that woke up earlier) and the scheduler tick on that CPU is + unfrozen. + + If the interrupt that has woken up the CPU was armed for system wakeup, + the system resume transition begins. + + 2. Resuming devices and restoring the working-state configuration of IRQs. + + Devices are resumed in four phases called *noirq resume*, *early resume*, + *resume* and *complete* (see :ref:`driverapi_pm_devices` for more + information on what exactly happens in each phase). + + Every device is visited in each phase, but typically it is not physically + accessed in more than two of them. + + The working-state configuration of IRQs is restored after the *noirq* resume + phase and the runtime PM API is re-enabled for every device whose driver + supports it during the *early* resume phase. + + 3. Thawing tasks. + + Tasks frozen in step 2 of the preceding `suspend <s2idle_suspend_>`_ + transition are "thawed", which means that they are woken up from the + uninterruptible sleep that they went into at that time and user space tasks + are allowed to exit the kernel. + + 4. Invoking system-wide resume notifiers. + + This is analogous to step 1 of the `suspend <s2idle_suspend_>`_ transition + and the same set of callbacks is invoked at this point, but a different + "notification type" parameter value is passed to them. + + +Platform-dependent Suspend Code Flow +==================================== + +The following steps are taken in order to transition the system from the working +state to platform-dependent suspend state: + + 1. Invoking system-wide suspend notifiers. + + This step is the same as step 1 of the suspend-to-idle suspend transition + described `above <s2idle_suspend_>`_. + + 2. Freezing tasks. + + This step is the same as step 2 of the suspend-to-idle suspend transition + described `above <s2idle_suspend_>`_. + + 3. Suspending devices and reconfiguring IRQs. + + This step is analogous to step 3 of the suspend-to-idle suspend transition + described `above <s2idle_suspend_>`_, but the arming of IRQs for system + wakeup generally does not have any effect on the platform. + + There are platforms that can go into a very deep low-power state internally + when all CPUs in them are in sufficiently deep idle states and all I/O + devices have been put into low-power states. On those platforms, + suspend-to-idle can reduce system power very effectively. + + On the other platforms, however, low-level components (like interrupt + controllers) need to be turned off in a platform-specific way (implemented + in the hooks provided by the platform driver) to achieve comparable power + reduction. + + That usually prevents in-band hardware interrupts from waking up the system, + which must be done in a special platform-dependent way. Then, the + configuration of system wakeup sources usually starts when system wakeup + devices are suspended and is finalized by the platform suspend hooks later + on. + + 4. Disabling non-boot CPUs. + + On some platforms the suspend hooks mentioned above must run in a one-CPU + configuration of the system (in particular, the hardware cannot be accessed + by any code running in parallel with the platform suspend hooks that may, + and often do, trap into the platform firmware in order to finalize the + suspend transition). + + For this reason, the CPU offline/online (CPU hotplug) framework is used + to take all of the CPUs in the system, except for one (the boot CPU), + offline (typically, the CPUs that have been taken offline go into deep idle + states). + + This means that all tasks are migrated away from those CPUs and all IRQs are + rerouted to the only CPU that remains online. + + 5. Suspending core system components. + + This prepares the core system components for (possibly) losing power going + forward and suspends the timekeeping. + + 6. Platform-specific power removal. + + This is expected to remove power from all of the system components except + for the memory controller and RAM (in order to preserve the contents of the + latter) and some devices designated for system wakeup. + + In many cases control is passed to the platform firmware which is expected + to finalize the suspend transition as needed. + + +Platform-dependent Resume Code Flow +=================================== + +The following steps are taken in order to transition the system from a +platform-dependent suspend state into the working state: + + 1. Platform-specific system wakeup. + + The platform is woken up by a signal from one of the designated system + wakeup devices (which need not be an in-band hardware interrupt) and + control is passed back to the kernel (the working configuration of the + platform may need to be restored by the platform firmware before the + kernel gets control again). + + 2. Resuming core system components. + + The suspend-time configuration of the core system components is restored and + the timekeeping is resumed. + + 3. Re-enabling non-boot CPUs. + + The CPUs disabled in step 4 of the preceding suspend transition are taken + back online and their suspend-time configuration is restored. + + 4. Resuming devices and restoring the working-state configuration of IRQs. + + This step is the same as step 2 of the suspend-to-idle suspend transition + described `above <s2idle_resume_>`_. + + 5. Thawing tasks. + + This step is the same as step 3 of the suspend-to-idle suspend transition + described `above <s2idle_resume_>`_. + + 6. Invoking system-wide resume notifiers. + + This step is the same as step 4 of the suspend-to-idle suspend transition + described `above <s2idle_resume_>`_. diff --git a/Documentation/admin-guide/pm/system-wide.rst b/Documentation/admin-guide/pm/system-wide.rst index 2b1f987b34f0..1a1924d71006 100644 --- a/Documentation/admin-guide/pm/system-wide.rst +++ b/Documentation/admin-guide/pm/system-wide.rst @@ -8,3 +8,4 @@ System-Wide Power Management :maxdepth: 2 sleep-states + suspend-flows diff --git a/Documentation/admin-guide/pm/working-state.rst b/Documentation/admin-guide/pm/working-state.rst index 88f717e59a42..0a38cdf39df1 100644 --- a/Documentation/admin-guide/pm/working-state.rst +++ b/Documentation/admin-guide/pm/working-state.rst @@ -11,4 +11,5 @@ Working-State Power Management intel_idle cpufreq intel_pstate + cpufreq_drivers intel_epb diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index def074807cee..39c95c0e13d3 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -2,262 +2,197 @@ Documentation for /proc/sys/kernel/ =================================== -kernel version 2.2.10 +.. See scripts/check-sysctl-docs to keep this up to date + Copyright (c) 1998, 1999, Rik van Riel <riel@nl.linux.org> Copyright (c) 2009, Shen Feng<shen@cn.fujitsu.com> -For general info and legal blurb, please look in index.rst. +For general info and legal blurb, please look in :doc:`index`. ------------------------------------------------------------------------------ This file contains documentation for the sysctl files in -/proc/sys/kernel/ and is valid for Linux kernel version 2.2. +``/proc/sys/kernel/`` and is valid for Linux kernel version 2.2. The files in this directory can be used to tune and monitor miscellaneous and general things in the operation of the Linux -kernel. Since some of the files _can_ be used to screw up your +kernel. Since some of the files *can* be used to screw up your system, it is advisable to read both documentation and source before actually making adjustments. Currently, these files might (depending on your configuration) -show up in /proc/sys/kernel: - -- acct -- acpi_video_flags -- auto_msgmni -- bootloader_type [ X86 only ] -- bootloader_version [ X86 only ] -- cap_last_cap -- core_pattern -- core_pipe_limit -- core_uses_pid -- ctrl-alt-del -- dmesg_restrict -- domainname -- hostname -- hotplug -- hardlockup_all_cpu_backtrace -- hardlockup_panic -- hung_task_panic -- hung_task_check_count -- hung_task_timeout_secs -- hung_task_check_interval_secs -- hung_task_warnings -- hyperv_record_panic_msg -- kexec_load_disabled -- kptr_restrict -- l2cr [ PPC only ] -- modprobe ==> Documentation/debugging-modules.txt -- modules_disabled -- msg_next_id [ sysv ipc ] -- msgmax -- msgmnb -- msgmni -- nmi_watchdog -- osrelease -- ostype -- overflowgid -- overflowuid -- panic -- panic_on_oops -- panic_on_stackoverflow -- panic_on_unrecovered_nmi -- panic_on_warn -- panic_print -- panic_on_rcu_stall -- perf_cpu_time_max_percent -- perf_event_paranoid -- perf_event_max_stack -- perf_event_mlock_kb -- perf_event_max_contexts_per_stack -- pid_max -- powersave-nap [ PPC only ] -- printk -- printk_delay -- printk_ratelimit -- printk_ratelimit_burst -- pty ==> Documentation/filesystems/devpts.txt -- randomize_va_space -- real-root-dev ==> Documentation/admin-guide/initrd.rst -- reboot-cmd [ SPARC only ] -- rtsig-max -- rtsig-nr -- sched_energy_aware -- seccomp/ ==> Documentation/userspace-api/seccomp_filter.rst -- sem -- sem_next_id [ sysv ipc ] -- sg-big-buff [ generic SCSI device (sg) ] -- shm_next_id [ sysv ipc ] -- shm_rmid_forced -- shmall -- shmmax [ sysv ipc ] -- shmmni -- softlockup_all_cpu_backtrace -- soft_watchdog -- stack_erasing -- stop-a [ SPARC only ] -- sysrq ==> Documentation/admin-guide/sysrq.rst -- sysctl_writes_strict -- tainted ==> Documentation/admin-guide/tainted-kernels.rst -- threads-max -- unknown_nmi_panic -- watchdog -- watchdog_thresh -- version - - -acct: -===== +show up in ``/proc/sys/kernel``: + +.. contents:: :local: + + +acct +==== + +:: -highwater lowwater frequency + highwater lowwater frequency If BSD-style process accounting is enabled these values control its behaviour. If free space on filesystem where the log lives -goes below <lowwater>% accounting suspends. If free space gets -above <highwater>% accounting resumes. <Frequency> determines +goes below ``lowwater``% accounting suspends. If free space gets +above ``highwater``% accounting resumes. ``frequency`` determines how often do we check the amount of free space (value is in seconds). Default: -4 2 30 -That is, suspend accounting if there left <= 2% free; resume it -if we got >=4%; consider information about amount of free space -valid for 30 seconds. +:: -acpi_video_flags: -================= + 4 2 30 + +That is, suspend accounting if free space drops below 2%; resume it +if it increases to at least 4%; consider information about amount of +free space valid for 30 seconds. -flags -See Doc*/kernel/power/video.txt, it allows mode of video boot to be -set during run time. +acpi_video_flags +================ +See :doc:`/power/video`. This allows the video resume mode to be set, +in a similar fashion to the ``acpi_sleep`` kernel parameter, by +combining the following values: + += ======= +1 s3_bios +2 s3_mode +4 s3_beep += ======= -auto_msgmni: -============ + +auto_msgmni +=========== This variable has no effect and may be removed in future kernel releases. Reading it always returns 0. -Up to Linux 3.17, it enabled/disabled automatic recomputing of msgmni -upon memory add/remove or upon ipc namespace creation/removal. +Up to Linux 3.17, it enabled/disabled automatic recomputing of +`msgmni`_ +upon memory add/remove or upon IPC namespace creation/removal. Echoing "1" into this file enabled msgmni automatic recomputing. -Echoing "0" turned it off. auto_msgmni default value was 1. - +Echoing "0" turned it off. The default value was 1. -bootloader_type: -================ -x86 bootloader identification +bootloader_type (x86 only) +========================== This gives the bootloader type number as indicated by the bootloader, shifted left by 4, and OR'd with the low four bits of the bootloader version. The reason for this encoding is that this used to match the -type_of_loader field in the kernel header; the encoding is kept for +``type_of_loader`` field in the kernel header; the encoding is kept for backwards compatibility. That is, if the full bootloader type number is 0x15 and the full version number is 0x234, this file will contain the value 340 = 0x154. -See the type_of_loader and ext_loader_type fields in -Documentation/x86/boot.rst for additional information. +See the ``type_of_loader`` and ``ext_loader_type`` fields in +:doc:`/x86/boot` for additional information. -bootloader_version: -=================== - -x86 bootloader version +bootloader_version (x86 only) +============================= The complete bootloader version number. In the example above, this file will contain the value 564 = 0x234. -See the type_of_loader and ext_loader_ver fields in -Documentation/x86/boot.rst for additional information. +See the ``type_of_loader`` and ``ext_loader_ver`` fields in +:doc:`/x86/boot` for additional information. -cap_last_cap: -============= +cap_last_cap +============ Highest valid capability of the running kernel. Exports -CAP_LAST_CAP from the kernel. +``CAP_LAST_CAP`` from the kernel. -core_pattern: -============= +core_pattern +============ -core_pattern is used to specify a core dumpfile pattern name. +``core_pattern`` is used to specify a core dumpfile pattern name. * max length 127 characters; default value is "core" -* core_pattern is used as a pattern template for the output filename; - certain string patterns (beginning with '%') are substituted with - their actual values. -* backward compatibility with core_uses_pid: +* ``core_pattern`` is used as a pattern template for the output + filename; certain string patterns (beginning with '%') are + substituted with their actual values. +* backward compatibility with ``core_uses_pid``: - If core_pattern does not include "%p" (default does not) - and core_uses_pid is set, then .PID will be appended to + If ``core_pattern`` does not include "%p" (default does not) + and ``core_uses_pid`` is set, then .PID will be appended to the filename. -* corename format specifiers:: - - %<NUL> '%' is dropped - %% output one '%' - %p pid - %P global pid (init PID namespace) - %i tid - %I global tid (init PID namespace) - %u uid (in initial user namespace) - %g gid (in initial user namespace) - %d dump mode, matches PR_SET_DUMPABLE and - /proc/sys/fs/suid_dumpable - %s signal number - %t UNIX time of dump - %h hostname - %e executable filename (may be shortened) - %E executable path - %<OTHER> both are dropped +* corename format specifiers + + ======== ========================================== + %<NUL> '%' is dropped + %% output one '%' + %p pid + %P global pid (init PID namespace) + %i tid + %I global tid (init PID namespace) + %u uid (in initial user namespace) + %g gid (in initial user namespace) + %d dump mode, matches ``PR_SET_DUMPABLE`` and + ``/proc/sys/fs/suid_dumpable`` + %s signal number + %t UNIX time of dump + %h hostname + %e executable filename (may be shortened) + %E executable path + %c maximum size of core file by resource limit RLIMIT_CORE + %<OTHER> both are dropped + ======== ========================================== * If the first character of the pattern is a '|', the kernel will treat the rest of the pattern as a command to run. The core dump will be written to the standard input of that program instead of to a file. -core_pipe_limit: -================ +core_pipe_limit +=============== -This sysctl is only applicable when core_pattern is configured to pipe -core files to a user space helper (when the first character of -core_pattern is a '|', see above). When collecting cores via a pipe -to an application, it is occasionally useful for the collecting -application to gather data about the crashing process from its -/proc/pid directory. In order to do this safely, the kernel must wait -for the collecting process to exit, so as not to remove the crashing -processes proc files prematurely. This in turn creates the -possibility that a misbehaving userspace collecting process can block -the reaping of a crashed process simply by never exiting. This sysctl -defends against that. It defines how many concurrent crashing -processes may be piped to user space applications in parallel. If -this value is exceeded, then those crashing processes above that value -are noted via the kernel log and their cores are skipped. 0 is a -special value, indicating that unlimited processes may be captured in -parallel, but that no waiting will take place (i.e. the collecting -process is not guaranteed access to /proc/<crashing pid>/). This -value defaults to 0. - - -core_uses_pid: -============== +This sysctl is only applicable when `core_pattern`_ is configured to +pipe core files to a user space helper (when the first character of +``core_pattern`` is a '|', see above). +When collecting cores via a pipe to an application, it is occasionally +useful for the collecting application to gather data about the +crashing process from its ``/proc/pid`` directory. +In order to do this safely, the kernel must wait for the collecting +process to exit, so as not to remove the crashing processes proc files +prematurely. +This in turn creates the possibility that a misbehaving userspace +collecting process can block the reaping of a crashed process simply +by never exiting. +This sysctl defends against that. +It defines how many concurrent crashing processes may be piped to user +space applications in parallel. +If this value is exceeded, then those crashing processes above that +value are noted via the kernel log and their cores are skipped. +0 is a special value, indicating that unlimited processes may be +captured in parallel, but that no waiting will take place (i.e. the +collecting process is not guaranteed access to ``/proc/<crashing +pid>/``). +This value defaults to 0. + + +core_uses_pid +============= The default coredump filename is "core". By setting -core_uses_pid to 1, the coredump filename becomes core.PID. -If core_pattern does not include "%p" (default does not) -and core_uses_pid is set, then .PID will be appended to +``core_uses_pid`` to 1, the coredump filename becomes core.PID. +If `core_pattern`_ does not include "%p" (default does not) +and ``core_uses_pid`` is set, then .PID will be appended to the filename. -ctrl-alt-del: -============= +ctrl-alt-del +============ When the value in this file is 0, ctrl-alt-del is trapped and -sent to the init(1) program to handle a graceful restart. +sent to the ``init(1)`` program to handle a graceful restart. When, however, the value is > 0, Linux's reaction to a Vulcan Nerve Pinch (tm) will be an immediate reboot, without even syncing its dirty buffers. @@ -269,21 +204,22 @@ Note: to decide what to do with it. -dmesg_restrict: -=============== +dmesg_restrict +============== This toggle indicates whether unprivileged users are prevented -from using dmesg(8) to view messages from the kernel's log buffer. -When dmesg_restrict is set to (0) there are no restrictions. When -dmesg_restrict is set set to (1), users must have CAP_SYSLOG to use -dmesg(8). +from using ``dmesg(8)`` to view messages from the kernel's log +buffer. +When ``dmesg_restrict`` is set to 0 there are no restrictions. +When ``dmesg_restrict`` is set set to 1, users must have +``CAP_SYSLOG`` to use ``dmesg(8)``. -The kernel config option CONFIG_SECURITY_DMESG_RESTRICT sets the -default value of dmesg_restrict. +The kernel config option ``CONFIG_SECURITY_DMESG_RESTRICT`` sets the +default value of ``dmesg_restrict``. -domainname & hostname: -====================== +domainname & hostname +===================== These files can be used to set the NIS/YP domainname and the hostname of your box in exactly the same way as the commands @@ -302,167 +238,206 @@ hostname "darkstar" and DNS (Internet Domain Name Server) domainname "frop.org", not to be confused with the NIS (Network Information Service) or YP (Yellow Pages) domainname. These two domain names are in general different. For a detailed discussion -see the hostname(1) man page. +see the ``hostname(1)`` man page. -hardlockup_all_cpu_backtrace: -============================= +hardlockup_all_cpu_backtrace +============================ This value controls the hard lockup detector behavior when a hard lockup condition is detected as to whether or not to gather further debug information. If enabled, arch-specific all-CPU stack dumping will be initiated. -0: do nothing. This is the default behavior. += ============================================ +0 Do nothing. This is the default behavior. +1 On detection capture more debug information. += ============================================ -1: on detection capture more debug information. - -hardlockup_panic: -================= +hardlockup_panic +================ This parameter can be used to control whether the kernel panics when a hard lockup is detected. - 0 - don't panic on hard lockup - 1 - panic on hard lockup += =========================== +0 Don't panic on hard lockup. +1 Panic on hard lockup. += =========================== -See Documentation/admin-guide/lockup-watchdogs.rst for more information. This can -also be set using the nmi_watchdog kernel parameter. +See :doc:`/admin-guide/lockup-watchdogs` for more information. +This can also be set using the nmi_watchdog kernel parameter. -hotplug: -======== +hotplug +======= Path for the hotplug policy agent. -Default value is "/sbin/hotplug". +Default value is "``/sbin/hotplug``". -hung_task_panic: -================ +hung_task_panic +=============== Controls the kernel's behavior when a hung task is detected. -This file shows up if CONFIG_DETECT_HUNG_TASK is enabled. - -0: continue operation. This is the default behavior. +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. -1: panic immediately. += ================================================= +0 Continue operation. This is the default behavior. +1 Panic immediately. += ================================================= -hung_task_check_count: -====================== +hung_task_check_count +===================== The upper bound on the number of tasks that are checked. -This file shows up if CONFIG_DETECT_HUNG_TASK is enabled. +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. -hung_task_timeout_secs: -======================= +hung_task_timeout_secs +====================== When a task in D state did not get scheduled for more than this value report a warning. -This file shows up if CONFIG_DETECT_HUNG_TASK is enabled. +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. -0: means infinite timeout - no checking done. +0 means infinite timeout, no checking is done. -Possible values to set are in range {0..LONG_MAX/HZ}. +Possible values to set are in range {0:``LONG_MAX``/``HZ``}. -hung_task_check_interval_secs: -============================== +hung_task_check_interval_secs +============================= Hung task check interval. If hung task checking is enabled -(see hung_task_timeout_secs), the check is done every -hung_task_check_interval_secs seconds. -This file shows up if CONFIG_DETECT_HUNG_TASK is enabled. +(see `hung_task_timeout_secs`_), the check is done every +``hung_task_check_interval_secs`` seconds. +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. -0 (default): means use hung_task_timeout_secs as checking interval. -Possible values to set are in range {0..LONG_MAX/HZ}. +0 (default) means use ``hung_task_timeout_secs`` as checking +interval. +Possible values to set are in range {0:``LONG_MAX``/``HZ``}. -hung_task_warnings: -=================== + +hung_task_warnings +================== The maximum number of warnings to report. During a check interval if a hung task is detected, this value is decreased by 1. When this value reaches 0, no more warnings will be reported. -This file shows up if CONFIG_DETECT_HUNG_TASK is enabled. +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. -1: report an infinite number of warnings. -hyperv_record_panic_msg: -======================== +hyperv_record_panic_msg +======================= Controls whether the panic kmsg data should be reported to Hyper-V. -0: do not report panic kmsg data. - -1: report the panic kmsg data. This is the default behavior. += ========================================================= +0 Do not report panic kmsg data. +1 Report the panic kmsg data. This is the default behavior. += ========================================================= -kexec_load_disabled: -==================== +kexec_load_disabled +=================== -A toggle indicating if the kexec_load syscall has been disabled. This -value defaults to 0 (false: kexec_load enabled), but can be set to 1 -(true: kexec_load disabled). Once true, kexec can no longer be used, and -the toggle cannot be set back to false. This allows a kexec image to be -loaded before disabling the syscall, allowing a system to set up (and -later use) an image without it being altered. Generally used together -with the "modules_disabled" sysctl. +A toggle indicating if the ``kexec_load`` syscall has been disabled. +This value defaults to 0 (false: ``kexec_load`` enabled), but can be +set to 1 (true: ``kexec_load`` disabled). +Once true, kexec can no longer be used, and the toggle cannot be set +back to false. +This allows a kexec image to be loaded before disabling the syscall, +allowing a system to set up (and later use) an image without it being +altered. +Generally used together with the `modules_disabled`_ sysctl. -kptr_restrict: -============== +kptr_restrict +============= This toggle indicates whether restrictions are placed on -exposing kernel addresses via /proc and other interfaces. +exposing kernel addresses via ``/proc`` and other interfaces. + +When ``kptr_restrict`` is set to 0 (the default) the address is hashed +before printing. +(This is the equivalent to %p.) + +When ``kptr_restrict`` is set to 1, kernel pointers printed using the +%pK format specifier will be replaced with 0s unless the user has +``CAP_SYSLOG`` and effective user and group ids are equal to the real +ids. +This is because %pK checks are done at read() time rather than open() +time, so if permissions are elevated between the open() and the read() +(e.g via a setuid binary) then %pK will not leak kernel pointers to +unprivileged users. +Note, this is a temporary solution only. +The correct long-term solution is to do the permission checks at +open() time. +Consider removing world read permissions from files that use %pK, and +using `dmesg_restrict`_ to protect against uses of %pK in ``dmesg(8)`` +if leaking kernel pointer values to unprivileged users is a concern. + +When ``kptr_restrict`` is set to 2, kernel pointers printed using +%pK will be replaced with 0s regardless of privileges. + + +modprobe +======== -When kptr_restrict is set to 0 (the default) the address is hashed before -printing. (This is the equivalent to %p.) +This gives the full path of the modprobe command which the kernel will +use to load modules. This can be used to debug module loading +requests:: -When kptr_restrict is set to (1), kernel pointers printed using the %pK -format specifier will be replaced with 0's unless the user has CAP_SYSLOG -and effective user and group ids are equal to the real ids. This is -because %pK checks are done at read() time rather than open() time, so -if permissions are elevated between the open() and the read() (e.g via -a setuid binary) then %pK will not leak kernel pointers to unprivileged -users. Note, this is a temporary solution only. The correct long-term -solution is to do the permission checks at open() time. Consider removing -world read permissions from files that use %pK, and using dmesg_restrict -to protect against uses of %pK in dmesg(8) if leaking kernel pointer -values to unprivileged users is a concern. + echo '#! /bin/sh' > /tmp/modprobe + echo 'echo "$@" >> /tmp/modprobe.log' >> /tmp/modprobe + echo 'exec /sbin/modprobe "$@"' >> /tmp/modprobe + chmod a+x /tmp/modprobe + echo /tmp/modprobe > /proc/sys/kernel/modprobe -When kptr_restrict is set to (2), kernel pointers printed using -%pK will be replaced with 0's regardless of privileges. +This only applies when the *kernel* is requesting that the module be +loaded; it won't have any effect if the module is being loaded +explicitly using ``modprobe`` from userspace. -l2cr: (PPC only) +modules_disabled ================ -This flag controls the L2 cache of G3 processor boards. If -0, the cache is disabled. Enabled if nonzero. - - -modules_disabled: -================= - A toggle value indicating if modules are allowed to be loaded in an otherwise modular kernel. This toggle defaults to off (0), but can be set true (1). Once true, modules can be neither loaded nor unloaded, and the toggle cannot be set back -to false. Generally used with the "kexec_load_disabled" toggle. +to false. Generally used with the `kexec_load_disabled`_ toggle. -msg_next_id, sem_next_id, and shm_next_id: -========================================== +.. _msgmni: + +msgmax, msgmnb, and msgmni +========================== + +``msgmax`` is the maximum size of an IPC message, in bytes. 8192 by +default (``MSGMAX``). + +``msgmnb`` is the maximum size of an IPC queue, in bytes. 16384 by +default (``MSGMNB``). + +``msgmni`` is the maximum number of IPC queues. 32000 by default +(``MSGMNI``). + + +msg_next_id, sem_next_id, and shm_next_id (System V IPC) +======================================================== These three toggles allows to specify desired id for next allocated IPC object: message, semaphore or shared memory respectively. By default they are equal to -1, which means generic allocation logic. -Possible values to set are in range {0..INT_MAX}. +Possible values to set are in range {0:``INT_MAX``}. Notes: 1) kernel doesn't guarantee, that new object will have desired id. So, @@ -471,16 +446,38 @@ Notes: successful IPC object allocation. If an IPC object allocation syscall fails, it is undefined if the value remains unmodified or is reset to -1. +modprobe: +========= -nmi_watchdog: -============= +The path to the usermode helper for autoloading kernel modules, by +default "/sbin/modprobe". This binary is executed when the kernel +requests a module. For example, if userspace passes an unknown +filesystem type to mount(), then the kernel will automatically request +the corresponding filesystem module by executing this usermode helper. +This usermode helper should insert the needed module into the kernel. + +This sysctl only affects module autoloading. It has no effect on the +ability to explicitly insert modules. + +If this sysctl is set to the empty string, then module autoloading is +completely disabled. The kernel will not try to execute a usermode +helper at all, nor will it call the kernel_module_request LSM hook. + +If CONFIG_STATIC_USERMODEHELPER=y is set in the kernel configuration, +then the configured static usermode helper overrides this sysctl, +except that the empty string is still accepted to completely disable +module autoloading as described above. + +nmi_watchdog +============ This parameter can be used to control the NMI watchdog (i.e. the hard lockup detector) on x86 systems. -0 - disable the hard lockup detector - -1 - enable the hard lockup detector += ================================= +0 Disable the hard lockup detector. +1 Enable the hard lockup detector. += ================================= The hard lockup detector monitors each CPU for its ability to respond to timer interrupts. The mechanism utilizes CPU performance counter registers @@ -492,11 +489,11 @@ in a KVM virtual machine. This default can be overridden by adding:: nmi_watchdog=1 -to the guest kernel command line (see Documentation/admin-guide/kernel-parameters.rst). +to the guest kernel command line (see :doc:`/admin-guide/kernel-parameters`). -numa_balancing: -=============== +numa_balancing +============== Enables/disables automatic page fault based NUMA memory balancing. Memory is moved automatically to nodes @@ -514,9 +511,10 @@ ideally is offset by improved memory locality but there is no universal guarantee. If the target workload is already bound to NUMA nodes then this feature should be disabled. Otherwise, if the system overhead from the feature is too high then the rate the kernel samples for NUMA hinting -faults may be controlled by the numa_balancing_scan_period_min_ms, +faults may be controlled by the `numa_balancing_scan_period_min_ms, numa_balancing_scan_delay_ms, numa_balancing_scan_period_max_ms, -numa_balancing_scan_size_mb, and numa_balancing_settle_count sysctls. +numa_balancing_scan_size_mb`_, and numa_balancing_settle_count sysctls. + numa_balancing_scan_period_min_ms, numa_balancing_scan_delay_ms, numa_balancing_scan_period_max_ms, numa_balancing_scan_size_mb =============================================================================================================================== @@ -542,23 +540,23 @@ workload pattern changes and minimises performance impact due to remote memory accesses. These sysctls control the thresholds for scan delays and the number of pages scanned. -numa_balancing_scan_period_min_ms is the minimum time in milliseconds to +``numa_balancing_scan_period_min_ms`` is the minimum time in milliseconds to scan a tasks virtual memory. It effectively controls the maximum scanning rate for each task. -numa_balancing_scan_delay_ms is the starting "scan delay" used for a task +``numa_balancing_scan_delay_ms`` is the starting "scan delay" used for a task when it initially forks. -numa_balancing_scan_period_max_ms is the maximum time in milliseconds to +``numa_balancing_scan_period_max_ms`` is the maximum time in milliseconds to scan a tasks virtual memory. It effectively controls the minimum scanning rate for each task. -numa_balancing_scan_size_mb is how many megabytes worth of pages are +``numa_balancing_scan_size_mb`` is how many megabytes worth of pages are scanned for a given scan. -osrelease, ostype & version: -============================ +osrelease, ostype & version +=========================== :: @@ -569,15 +567,16 @@ osrelease, ostype & version: # cat version #5 Wed Feb 25 21:49:24 MET 1998 -The files osrelease and ostype should be clear enough. Version +The files ``osrelease`` and ``ostype`` should be clear enough. +``version`` needs a little more clarification however. The '#5' means that this is the fifth kernel built from this source base and the date behind it indicates the time the kernel was built. The only way to tune these values is to rebuild the kernel :-) -overflowgid & overflowuid: -========================== +overflowgid & overflowuid +========================= if your architecture did not always support 32-bit UIDs (i.e. arm, i386, m68k, sh, and sparc32), a fixed UID and GID will be returned to @@ -588,108 +587,119 @@ These sysctls allow you to change the value of the fixed UID and GID. The default is 65534. +panic +===== + +The value in this file determines the behaviour of the kernel on a panic: -====== -The value in this file represents the number of seconds the kernel -waits before rebooting on a panic. When you use the software watchdog, -the recommended setting is 60. +* if zero, the kernel will loop forever; +* if negative, the kernel will reboot immediately; +* if positive, the kernel will reboot after the corresponding number + of seconds. +When you use the software watchdog, the recommended setting is 60. -panic_on_io_nmi: -================ + +panic_on_io_nmi +=============== Controls the kernel's behavior when a CPU receives an NMI caused by an IO error. -0: try to continue operation (default) - -1: panic immediately. The IO error triggered an NMI. This indicates a - serious system condition which could result in IO data corruption. - Rather than continuing, panicking might be a better choice. Some - servers issue this sort of NMI when the dump button is pushed, - and you can use this option to take a crash dump. += ================================================================== +0 Try to continue operation (default). +1 Panic immediately. The IO error triggered an NMI. This indicates a + serious system condition which could result in IO data corruption. + Rather than continuing, panicking might be a better choice. Some + servers issue this sort of NMI when the dump button is pushed, + and you can use this option to take a crash dump. += ================================================================== -panic_on_oops: -============== +panic_on_oops +============= Controls the kernel's behaviour when an oops or BUG is encountered. -0: try to continue operation - -1: panic immediately. If the `panic` sysctl is also non-zero then the - machine will be rebooted. += =================================================================== +0 Try to continue operation. +1 Panic immediately. If the `panic` sysctl is also non-zero then the + machine will be rebooted. += =================================================================== -panic_on_stackoverflow: -======================= +panic_on_stackoverflow +====================== Controls the kernel's behavior when detecting the overflows of kernel, IRQ and exception stacks except a user stack. -This file shows up if CONFIG_DEBUG_STACKOVERFLOW is enabled. - -0: try to continue operation. +This file shows up if ``CONFIG_DEBUG_STACKOVERFLOW`` is enabled. -1: panic immediately. += ========================== +0 Try to continue operation. +1 Panic immediately. += ========================== -panic_on_unrecovered_nmi: -========================= +panic_on_unrecovered_nmi +======================== The default Linux behaviour on an NMI of either memory or unknown is to continue operation. For many environments such as scientific computing it is preferable that the box is taken out and the error dealt with than an uncorrected parity/ECC error get propagated. -A small number of systems do generate NMI's for bizarre random reasons +A small number of systems do generate NMIs for bizarre random reasons such as power management so the default is off. That sysctl works like the existing panic controls already in that directory. -panic_on_warn: -============== +panic_on_warn +============= Calls panic() in the WARN() path when set to 1. This is useful to avoid a kernel rebuild when attempting to kdump at the location of a WARN(). -0: only WARN(), default behaviour. += ================================================ +0 Only WARN(), default behaviour. +1 Call panic() after printing out WARN() location. += ================================================ -1: call panic() after printing out WARN() location. - -panic_print: -============ +panic_print +=========== Bitmask for printing system info when panic happens. User can chose combination of the following bits: -===== ======================================== +===== ============================================ bit 0 print all tasks info bit 1 print system memory info bit 2 print timer info -bit 3 print locks info if CONFIG_LOCKDEP is on +bit 3 print locks info if ``CONFIG_LOCKDEP`` is on bit 4 print ftrace buffer -===== ======================================== +===== ============================================ So for example to print tasks and memory info on panic, user can:: echo 3 > /proc/sys/kernel/panic_print -panic_on_rcu_stall: -=================== +panic_on_rcu_stall +================== When set to 1, calls panic() after RCU stall detection messages. This is useful to define the root cause of RCU stalls using a vmcore. -0: do not panic() when RCU stall takes place, default behavior. += ============================================================ +0 Do not panic() when RCU stall takes place, default behavior. +1 panic() after printing RCU stall messages. += ============================================================ -1: panic() after printing RCU stall messages. - -perf_cpu_time_max_percent: -========================== +perf_cpu_time_max_percent +========================= Hints to the kernel how much CPU time it should be allowed to use to handle perf sampling events. If the perf subsystem @@ -702,171 +712,179 @@ unexpectedly take too long to execute, the NMIs can become stacked up next to each other so much that nothing else is allowed to execute. -0: - disable the mechanism. Do not monitor or correct perf's - sampling rate no matter how CPU time it takes. +===== ======================================================== +0 Disable the mechanism. Do not monitor or correct perf's + sampling rate no matter how CPU time it takes. -1-100: - attempt to throttle perf's sample rate to this - percentage of CPU. Note: the kernel calculates an - "expected" length of each sample event. 100 here means - 100% of that expected length. Even if this is set to - 100, you may still see sample throttling if this - length is exceeded. Set to 0 if you truly do not care - how much CPU is consumed. +1-100 Attempt to throttle perf's sample rate to this + percentage of CPU. Note: the kernel calculates an + "expected" length of each sample event. 100 here means + 100% of that expected length. Even if this is set to + 100, you may still see sample throttling if this + length is exceeded. Set to 0 if you truly do not care + how much CPU is consumed. +===== ======================================================== -perf_event_paranoid: -==================== +perf_event_paranoid +=================== Controls use of the performance events system by unprivileged users (without CAP_SYS_ADMIN). The default value is 2. === ================================================================== - -1 Allow use of (almost) all events by all users + -1 Allow use of (almost) all events by all users. - Ignore mlock limit after perf_event_mlock_kb without CAP_IPC_LOCK + Ignore mlock limit after perf_event_mlock_kb without + ``CAP_IPC_LOCK``. ->=0 Disallow ftrace function tracepoint by users without CAP_SYS_ADMIN +>=0 Disallow ftrace function tracepoint by users without + ``CAP_SYS_ADMIN``. - Disallow raw tracepoint access by users without CAP_SYS_ADMIN + Disallow raw tracepoint access by users without ``CAP_SYS_ADMIN``. ->=1 Disallow CPU event access by users without CAP_SYS_ADMIN +>=1 Disallow CPU event access by users without ``CAP_SYS_ADMIN``. ->=2 Disallow kernel profiling by users without CAP_SYS_ADMIN +>=2 Disallow kernel profiling by users without ``CAP_SYS_ADMIN``. === ================================================================== -perf_event_max_stack: -===================== +perf_event_max_stack +==================== -Controls maximum number of stack frames to copy for (attr.sample_type & -PERF_SAMPLE_CALLCHAIN) configured events, for instance, when using -'perf record -g' or 'perf trace --call-graph fp'. +Controls maximum number of stack frames to copy for (``attr.sample_type & +PERF_SAMPLE_CALLCHAIN``) configured events, for instance, when using +'``perf record -g``' or '``perf trace --call-graph fp``'. This can only be done when no events are in use that have callchains -enabled, otherwise writing to this file will return -EBUSY. +enabled, otherwise writing to this file will return ``-EBUSY``. The default value is 127. -perf_event_mlock_kb: -==================== +perf_event_mlock_kb +=================== Control size of per-cpu ring buffer not counted agains mlock limit. The default value is 512 + 1 page -perf_event_max_contexts_per_stack: -================================== +perf_event_max_contexts_per_stack +================================= Controls maximum number of stack frame context entries for -(attr.sample_type & PERF_SAMPLE_CALLCHAIN) configured events, for -instance, when using 'perf record -g' or 'perf trace --call-graph fp'. +(``attr.sample_type & PERF_SAMPLE_CALLCHAIN``) configured events, for +instance, when using '``perf record -g``' or '``perf trace --call-graph fp``'. This can only be done when no events are in use that have callchains -enabled, otherwise writing to this file will return -EBUSY. +enabled, otherwise writing to this file will return ``-EBUSY``. The default value is 8. -pid_max: -======== +pid_max +======= PID allocation wrap value. When the kernel's next PID value reaches this value, it wraps back to a minimum PID value. -PIDs of value pid_max or larger are not allocated. +PIDs of value ``pid_max`` or larger are not allocated. -ns_last_pid: -============ +ns_last_pid +=========== The last pid allocated in the current (the one task using this sysctl lives in) pid namespace. When selecting a pid for a next task on fork kernel tries to allocate a number starting from this one. -powersave-nap: (PPC only) -========================= +powersave-nap (PPC only) +======================== If set, Linux-PPC will use the 'nap' mode of powersaving, otherwise the 'doze' mode will be used. + ============================================================== -printk: -======= +printk +====== -The four values in printk denote: console_loglevel, -default_message_loglevel, minimum_console_loglevel and -default_console_loglevel respectively. +The four values in printk denote: ``console_loglevel``, +``default_message_loglevel``, ``minimum_console_loglevel`` and +``default_console_loglevel`` respectively. These values influence printk() behavior when printing or -logging error messages. See 'man 2 syslog' for more info on +logging error messages. See '``man 2 syslog``' for more info on the different loglevels. -- console_loglevel: - messages with a higher priority than - this will be printed to the console -- default_message_loglevel: - messages without an explicit priority - will be printed with this priority -- minimum_console_loglevel: - minimum (highest) value to which - console_loglevel can be set -- default_console_loglevel: - default value for console_loglevel +======================== ===================================== +console_loglevel messages with a higher priority than + this will be printed to the console +default_message_loglevel messages without an explicit priority + will be printed with this priority +minimum_console_loglevel minimum (highest) value to which + console_loglevel can be set +default_console_loglevel default value for console_loglevel +======================== ===================================== -printk_delay: -============= +printk_delay +============ -Delay each printk message in printk_delay milliseconds +Delay each printk message in ``printk_delay`` milliseconds Value from 0 - 10000 is allowed. -printk_ratelimit: -================= +printk_ratelimit +================ -Some warning messages are rate limited. printk_ratelimit specifies +Some warning messages are rate limited. ``printk_ratelimit`` specifies the minimum length of time between these messages (in seconds). The default value is 5 seconds. A value of 0 will disable rate limiting. -printk_ratelimit_burst: -======================= +printk_ratelimit_burst +====================== -While long term we enforce one message per printk_ratelimit +While long term we enforce one message per `printk_ratelimit`_ seconds, we do allow a burst of messages to pass through. -printk_ratelimit_burst specifies the number of messages we can +``printk_ratelimit_burst`` specifies the number of messages we can send before ratelimiting kicks in. The default value is 10 messages. -printk_devkmsg: -=============== - -Control the logging to /dev/kmsg from userspace: - -ratelimit: - default, ratelimited +printk_devkmsg +============== -on: unlimited logging to /dev/kmsg from userspace +Control the logging to ``/dev/kmsg`` from userspace: -off: logging to /dev/kmsg disabled +========= ============================================= +ratelimit default, ratelimited +on unlimited logging to /dev/kmsg from userspace +off logging to /dev/kmsg disabled +========= ============================================= -The kernel command line parameter printk.devkmsg= overrides this and is +The kernel command line parameter ``printk.devkmsg=`` overrides this and is a one-time setting until next reboot: once set, it cannot be changed by this sysctl interface anymore. +============================================================== -randomize_va_space: -=================== + +pty +=== + +See Documentation/filesystems/devpts.txt. + + +randomize_va_space +================== This option can be used to select the type of process address space randomization that is used in the system, for architectures @@ -881,10 +899,10 @@ that support this feature. This, among other things, implies that shared libraries will be loaded to random addresses. Also for PIE-linked binaries, the location of code start is randomized. This is the default if the - CONFIG_COMPAT_BRK option is enabled. + ``CONFIG_COMPAT_BRK`` option is enabled. 2 Additionally enable heap randomization. This is the default if - CONFIG_COMPAT_BRK is disabled. + ``CONFIG_COMPAT_BRK`` is disabled. There are a few legacy applications out there (such as some ancient versions of libc.so.5 from 1996) that assume that brk area starts @@ -894,31 +912,27 @@ that support this feature. systems it is safe to choose full randomization. Systems with ancient and/or broken binaries should be configured - with CONFIG_COMPAT_BRK enabled, which excludes the heap from process + with ``CONFIG_COMPAT_BRK`` enabled, which excludes the heap from process address space randomization. == =========================================================================== -reboot-cmd: (Sparc only) -======================== - -??? This seems to be a way to give an argument to the Sparc -ROM/Flash boot loader. Maybe to tell it what to do after -rebooting. ??? +real-root-dev +============= +See :doc:`/admin-guide/initrd`. -rtsig-max & rtsig-nr: -===================== -The file rtsig-max can be used to tune the maximum number -of POSIX realtime (queued) signals that can be outstanding -in the system. +reboot-cmd (SPARC only) +======================= -rtsig-nr shows the number of RT signals currently queued. +??? This seems to be a way to give an argument to the Sparc +ROM/Flash boot loader. Maybe to tell it what to do after +rebooting. ??? -sched_energy_aware: -=================== +sched_energy_aware +================== Enables/disables Energy Aware Scheduling (EAS). EAS starts automatically on platforms where it can run (that is, @@ -928,75 +942,88 @@ requirements for EAS but you do not want to use it, change this value to 0. -sched_schedstats: -================= +sched_schedstats +================ Enables/disables scheduler statistics. Enabling this feature incurs a small amount of overhead in the scheduler but is useful for debugging and performance tuning. -sg-big-buff: -============ +seccomp +======= + +See :doc:`/userspace-api/seccomp_filter`. + + +sg-big-buff +=========== This file shows the size of the generic SCSI (sg) buffer. You can't tune it just yet, but you could change it on -compile time by editing include/scsi/sg.h and changing -the value of SG_BIG_BUFF. +compile time by editing ``include/scsi/sg.h`` and changing +the value of ``SG_BIG_BUFF``. There shouldn't be any reason to change this value. If you can come up with one, you probably know what you are doing anyway :) -shmall: -======= +shmall +====== This parameter sets the total amount of shared memory pages that -can be used system wide. Hence, SHMALL should always be at least -ceil(shmmax/PAGE_SIZE). +can be used system wide. Hence, ``shmall`` should always be at least +``ceil(shmmax/PAGE_SIZE)``. -If you are not sure what the default PAGE_SIZE is on your Linux -system, you can run the following command: +If you are not sure what the default ``PAGE_SIZE`` is on your Linux +system, you can run the following command:: # getconf PAGE_SIZE -shmmax: -======= +shmmax +====== This value can be used to query and set the run time limit on the maximum shared memory segment size that can be created. Shared memory segments up to 1Gb are now supported in the -kernel. This value defaults to SHMMAX. +kernel. This value defaults to ``SHMMAX``. -shm_rmid_forced: -================ +shmmni +====== + +This value determines the maximum number of shared memory segments. +4096 by default (``SHMMNI``). + + +shm_rmid_forced +=============== Linux lets you set resource limits, including how much memory one -process can consume, via setrlimit(2). Unfortunately, shared memory +process can consume, via ``setrlimit(2)``. Unfortunately, shared memory segments are allowed to exist without association with any process, and thus might not be counted against any resource limits. If enabled, shared memory segments are automatically destroyed when their attach count becomes zero after a detach or a process termination. It will also destroy segments that were created, but never attached to, on exit -from the process. The only use left for IPC_RMID is to immediately +from the process. The only use left for ``IPC_RMID`` is to immediately destroy an unattached segment. Of course, this breaks the way things are defined, so some applications might stop working. Note that this feature will do you no good unless you also configure your resource -limits (in particular, RLIMIT_AS and RLIMIT_NPROC). Most systems don't +limits (in particular, ``RLIMIT_AS`` and ``RLIMIT_NPROC``). Most systems don't need this. Note that if you change this from 0 to 1, already created segments without users and with a dead originative process will be destroyed. -sysctl_writes_strict: -===================== +sysctl_writes_strict +==================== Control how file position affects the behavior of updating sysctl values -via the /proc/sys interface: +via the ``/proc/sys`` interface: == ====================================================================== -1 Legacy per-write sysctl value handling, with no printk warnings. @@ -1013,8 +1040,8 @@ via the /proc/sys interface: == ====================================================================== -softlockup_all_cpu_backtrace: -============================= +softlockup_all_cpu_backtrace +============================ This value controls the soft lockup detector thread's behavior when a soft lockup condition is detected as to whether or not @@ -1024,43 +1051,80 @@ be issued an NMI and instructed to capture stack trace. This feature is only applicable for architectures which support NMI. -0: do nothing. This is the default behavior. += ============================================ +0 Do nothing. This is the default behavior. +1 On detection capture more debug information. += ============================================ -1: on detection capture more debug information. +softlockup_panic +================= -soft_watchdog: -============== +This parameter can be used to control whether the kernel panics +when a soft lockup is detected. -This parameter can be used to control the soft lockup detector. += ============================================ +0 Don't panic on soft lockup. +1 Panic on soft lockup. += ============================================ - 0 - disable the soft lockup detector +This can also be set using the softlockup_panic kernel parameter. - 1 - enable the soft lockup detector + +soft_watchdog +============= + +This parameter can be used to control the soft lockup detector. + += ================================= +0 Disable the soft lockup detector. +1 Enable the soft lockup detector. += ================================= The soft lockup detector monitors CPUs for threads that are hogging the CPUs without rescheduling voluntarily, and thus prevent the 'watchdog/N' threads from running. The mechanism depends on the CPUs ability to respond to timer interrupts which are needed for the 'watchdog/N' threads to be woken up by -the watchdog timer function, otherwise the NMI watchdog - if enabled - can +the watchdog timer function, otherwise the NMI watchdog — if enabled — can detect a hard lockup condition. -stack_erasing: -============== +stack_erasing +============= This parameter can be used to control kernel stack erasing at the end -of syscalls for kernels built with CONFIG_GCC_PLUGIN_STACKLEAK. +of syscalls for kernels built with ``CONFIG_GCC_PLUGIN_STACKLEAK``. That erasing reduces the information which kernel stack leak bugs can reveal and blocks some uninitialized stack variable attacks. The tradeoff is the performance impact: on a single CPU system kernel compilation sees a 1% slowdown, other systems and workloads may vary. - 0: kernel stack erasing is disabled, STACKLEAK_METRICS are not updated. += ==================================================================== +0 Kernel stack erasing is disabled, STACKLEAK_METRICS are not updated. +1 Kernel stack erasing is enabled (default), it is performed before + returning to the userspace at the end of syscalls. += ==================================================================== - 1: kernel stack erasing is enabled (default), it is performed before - returning to the userspace at the end of syscalls. + +stop-a (SPARC only) +=================== + +Controls Stop-A: + += ==================================== +0 Stop-A has no effect. +1 Stop-A breaks to the PROM (default). += ==================================== + +Stop-A is always enabled on a panic, so that the user can return to +the boot PROM. + + +sysrq +===== + +See :doc:`/admin-guide/sysrq`. tainted @@ -1090,30 +1154,30 @@ ORed together. The letters are seen in "Tainted" line of Oops reports. 131072 `(T)` The kernel was built with the struct randomization plugin ====== ===== ============================================================== -See Documentation/admin-guide/tainted-kernels.rst for more information. +See :doc:`/admin-guide/tainted-kernels` for more information. -threads-max: -============ +threads-max +=========== This value controls the maximum number of threads that can be created -using fork(). +using ``fork()``. During initialization the kernel sets this value such that even if the maximum number of threads is created, the thread structures occupy only a part (1/8th) of the available RAM pages. -The minimum value that can be written to threads-max is 1. +The minimum value that can be written to ``threads-max`` is 1. -The maximum value that can be written to threads-max is given by the -constant FUTEX_TID_MASK (0x3fffffff). +The maximum value that can be written to ``threads-max`` is given by the +constant ``FUTEX_TID_MASK`` (0x3fffffff). -If a value outside of this range is written to threads-max an error -EINVAL occurs. +If a value outside of this range is written to ``threads-max`` an +``EINVAL`` error occurs. -unknown_nmi_panic: -================== +unknown_nmi_panic +================= The value in this file affects behavior of handling NMI. When the value is non-zero, unknown NMI is trapped and then panic occurs. At @@ -1123,37 +1187,39 @@ NMI switch that most IA32 servers have fires unknown NMI up, for example. If a system hangs up, try pressing the NMI switch. -watchdog: -========= +watchdog +======== This parameter can be used to disable or enable the soft lockup detector -_and_ the NMI watchdog (i.e. the hard lockup detector) at the same time. - - 0 - disable both lockup detectors +*and* the NMI watchdog (i.e. the hard lockup detector) at the same time. - 1 - enable both lockup detectors += ============================== +0 Disable both lockup detectors. +1 Enable both lockup detectors. += ============================== The soft lockup detector and the NMI watchdog can also be disabled or -enabled individually, using the soft_watchdog and nmi_watchdog parameters. -If the watchdog parameter is read, for example by executing:: +enabled individually, using the ``soft_watchdog`` and ``nmi_watchdog`` +parameters. +If the ``watchdog`` parameter is read, for example by executing:: cat /proc/sys/kernel/watchdog -the output of this command (0 or 1) shows the logical OR of soft_watchdog -and nmi_watchdog. +the output of this command (0 or 1) shows the logical OR of +``soft_watchdog`` and ``nmi_watchdog``. -watchdog_cpumask: -================= +watchdog_cpumask +================ This value can be used to control on which cpus the watchdog may run. -The default cpumask is all possible cores, but if NO_HZ_FULL is +The default cpumask is all possible cores, but if ``NO_HZ_FULL`` is enabled in the kernel config, and cores are specified with the -nohz_full= boot argument, those cores are excluded by default. +``nohz_full=`` boot argument, those cores are excluded by default. Offline cores can be included in this mask, and if the core is later brought online, the watchdog will be started based on the mask value. -Typically this value would only be touched in the nohz_full case +Typically this value would only be touched in the ``nohz_full`` case to re-enable cores that by default were not running the watchdog, if a kernel lockup was suspected on those cores. @@ -1164,12 +1230,12 @@ might say:: echo 0,2-4 > /proc/sys/kernel/watchdog_cpumask -watchdog_thresh: -================ +watchdog_thresh +=============== This value can be used to control the frequency of hrtimer and NMI events and the soft and hard lockup thresholds. The default threshold is 10 seconds. -The softlockup threshold is (2 * watchdog_thresh). Setting this +The softlockup threshold is (``2 * watchdog_thresh``). Setting this tunable to zero will disable lockup detection altogether. diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst index 287b98708a40..e043c9213388 100644 --- a/Documentation/admin-guide/sysctl/net.rst +++ b/Documentation/admin-guide/sysctl/net.rst @@ -67,7 +67,8 @@ two flavors of JITs, the newer eBPF JIT currently supported on: - sparc64 - mips64 - s390x - - riscv + - riscv64 + - riscv32 And the older cBPF JIT supported on the following archs: diff --git a/Documentation/admin-guide/sysctl/user.rst b/Documentation/admin-guide/sysctl/user.rst index 650eaa03f15e..c45824589339 100644 --- a/Documentation/admin-guide/sysctl/user.rst +++ b/Documentation/admin-guide/sysctl/user.rst @@ -65,6 +65,12 @@ max_pid_namespaces The maximum number of pid namespaces that any user in the current user namespace may create. +max_time_namespaces +=================== + + The maximum number of time namespaces that any user in the current + user namespace may create. + max_user_namespaces =================== diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 64aeee1009ca..0329a4d3fa9e 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -128,6 +128,9 @@ allowed to examine the unevictable lru (mlocked pages) for pages to compact. This should be used on systems where stalls for minor page faults are an acceptable trade for large contiguous free memory. Set to 0 to prevent compaction from moving pages that are unevictable. Default value is 1. +On CONFIG_PREEMPT_RT the default value is 0 in order to avoid a page fault, due +to compaction, which would block the task from becomming active until the fault +is resolved. dirty_background_bytes diff --git a/Documentation/admin-guide/sysrq.rst b/Documentation/admin-guide/sysrq.rst index 72b2cfb066f4..a46209f4636c 100644 --- a/Documentation/admin-guide/sysrq.rst +++ b/Documentation/admin-guide/sysrq.rst @@ -48,9 +48,10 @@ always allowed (by a user with admin privileges). How do I use the magic SysRq key? ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -On x86 - You press the key combo :kbd:`ALT-SysRq-<command key>`. +On x86 + You press the key combo :kbd:`ALT-SysRq-<command key>`. -.. note:: + .. note:: Some keyboards may not have a key labeled 'SysRq'. The 'SysRq' key is also known as the 'Print Screen' key. Also some keyboards cannot @@ -58,14 +59,15 @@ On x86 - You press the key combo :kbd:`ALT-SysRq-<command key>`. have better luck with press :kbd:`Alt`, press :kbd:`SysRq`, release :kbd:`SysRq`, press :kbd:`<command key>`, release everything. -On SPARC - You press :kbd:`ALT-STOP-<command key>`, I believe. +On SPARC + You press :kbd:`ALT-STOP-<command key>`, I believe. On the serial console (PC style standard serial ports only) You send a ``BREAK``, then within 5 seconds a command key. Sending ``BREAK`` twice is interpreted as a normal BREAK. On PowerPC - Press :kbd:`ALT - Print Screen` (or :kbd:`F13`) - :kbd:`<command key>`, + Press :kbd:`ALT - Print Screen` (or :kbd:`F13`) - :kbd:`<command key>`. :kbd:`Print Screen` (or :kbd:`F13`) - :kbd:`<command key>` may suffice. On other @@ -73,7 +75,7 @@ On other let me know so I can add them to this section. On all - write a character to /proc/sysrq-trigger. e.g.:: + Write a character to /proc/sysrq-trigger. e.g.:: echo t > /proc/sysrq-trigger @@ -282,7 +284,7 @@ Just ask them on the linux-kernel mailing list: Credits ~~~~~~~ -Written by Mydraal <vulpyne@vulpyne.net> -Updated by Adam Sulmicki <adam@cfar.umd.edu> -Updated by Jeremy M. Dolan <jmd@turbogeek.org> 2001/01/28 10:15:59 -Added to by Crutcher Dunnavant <crutcher+kernel@datastacks.com> +- Written by Mydraal <vulpyne@vulpyne.net> +- Updated by Adam Sulmicki <adam@cfar.umd.edu> +- Updated by Jeremy M. Dolan <jmd@turbogeek.org> 2001/01/28 10:15:59 +- Added to by Crutcher Dunnavant <crutcher+kernel@datastacks.com> diff --git a/Documentation/arm/tcm.rst b/Documentation/arm/tcm.rst index effd9c7bc968..b256f9783883 100644 --- a/Documentation/arm/tcm.rst +++ b/Documentation/arm/tcm.rst @@ -4,18 +4,18 @@ ARM TCM (Tightly-Coupled Memory) handling in Linux Written by Linus Walleij <linus.walleij@stericsson.com> -Some ARM SoC:s have a so-called TCM (Tightly-Coupled Memory). +Some ARM SoCs have a so-called TCM (Tightly-Coupled Memory). This is usually just a few (4-64) KiB of RAM inside the ARM processor. -Due to being embedded inside the CPU The TCM has a +Due to being embedded inside the CPU, the TCM has a Harvard-architecture, so there is an ITCM (instruction TCM) and a DTCM (data TCM). The DTCM can not contain any instructions, but the ITCM can actually contain data. The size of DTCM or ITCM is minimum 4KiB so the typical minimum configuration is 4KiB ITCM and 4KiB DTCM. -ARM CPU:s have special registers to read out status, physical +ARM CPUs have special registers to read out status, physical location and size of TCM memories. arch/arm/include/asm/cputype.h defines a CPUID_TCM register that you can read out from the system control coprocessor. Documentation from ARM can be found diff --git a/Documentation/arm64/amu.rst b/Documentation/arm64/amu.rst new file mode 100644 index 000000000000..5057b11100ed --- /dev/null +++ b/Documentation/arm64/amu.rst @@ -0,0 +1,112 @@ +======================================================= +Activity Monitors Unit (AMU) extension in AArch64 Linux +======================================================= + +Author: Ionela Voinescu <ionela.voinescu@arm.com> + +Date: 2019-09-10 + +This document briefly describes the provision of Activity Monitors Unit +support in AArch64 Linux. + + +Architecture overview +--------------------- + +The activity monitors extension is an optional extension introduced by the +ARMv8.4 CPU architecture. + +The activity monitors unit, implemented in each CPU, provides performance +counters intended for system management use. The AMU extension provides a +system register interface to the counter registers and also supports an +optional external memory-mapped interface. + +Version 1 of the Activity Monitors architecture implements a counter group +of four fixed and architecturally defined 64-bit event counters. + - CPU cycle counter: increments at the frequency of the CPU. + - Constant counter: increments at the fixed frequency of the system + clock. + - Instructions retired: increments with every architecturally executed + instruction. + - Memory stall cycles: counts instruction dispatch stall cycles caused by + misses in the last level cache within the clock domain. + +When in WFI or WFE these counters do not increment. + +The Activity Monitors architecture provides space for up to 16 architected +event counters. Future versions of the architecture may use this space to +implement additional architected event counters. + +Additionally, version 1 implements a counter group of up to 16 auxiliary +64-bit event counters. + +On cold reset all counters reset to 0. + + +Basic support +------------- + +The kernel can safely run a mix of CPUs with and without support for the +activity monitors extension. Therefore, when CONFIG_ARM64_AMU_EXTN is +selected we unconditionally enable the capability to allow any late CPU +(secondary or hotplugged) to detect and use the feature. + +When the feature is detected on a CPU, we flag the availability of the +feature but this does not guarantee the correct functionality of the +counters, only the presence of the extension. + +Firmware (code running at higher exception levels, e.g. arm-tf) support is +needed to: + - Enable access for lower exception levels (EL2 and EL1) to the AMU + registers. + - Enable the counters. If not enabled these will read as 0. + - Save/restore the counters before/after the CPU is being put/brought up + from the 'off' power state. + +When using kernels that have this feature enabled but boot with broken +firmware the user may experience panics or lockups when accessing the +counter registers. Even if these symptoms are not observed, the values +returned by the register reads might not correctly reflect reality. Most +commonly, the counters will read as 0, indicating that they are not +enabled. + +If proper support is not provided in firmware it's best to disable +CONFIG_ARM64_AMU_EXTN. To be noted that for security reasons, this does not +bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to +EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers +are not trapped in EL2/EL3. + +The fixed counters of AMUv1 are accessible though the following system +register definitions: + - SYS_AMEVCNTR0_CORE_EL0 + - SYS_AMEVCNTR0_CONST_EL0 + - SYS_AMEVCNTR0_INST_RET_EL0 + - SYS_AMEVCNTR0_MEM_STALL_EL0 + +Auxiliary platform specific counters can be accessed using +SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15. + +Details can be found in: arch/arm64/include/asm/sysreg.h. + + +Userspace access +---------------- + +Currently, access from userspace to the AMU registers is disabled due to: + - Security reasons: they might expose information about code executed in + secure mode. + - Purpose: AMU counters are intended for system management use. + +Also, the presence of the feature is not visible to userspace. + + +Virtualization +-------------- + +Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM +guest side is disabled due to: + - Security reasons: they might expose information about code executed + by other guests or the host. + +Any attempt to access the AMU registers will result in an UNDEFINED +exception being injected into the guest. diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst index 5d78a6f5b0ae..a3f1a47b6f1c 100644 --- a/Documentation/arm64/booting.rst +++ b/Documentation/arm64/booting.rst @@ -248,6 +248,20 @@ Before jumping into the kernel, the following conditions must be met: - HCR_EL2.APK (bit 40) must be initialised to 0b1 - HCR_EL2.API (bit 41) must be initialised to 0b1 + For CPUs with Activity Monitors Unit v1 (AMUv1) extension present: + - If EL3 is present: + CPTR_EL3.TAM (bit 30) must be initialised to 0b0 + CPTR_EL2.TAM (bit 30) must be initialised to 0b0 + AMCNTENSET0_EL0 must be initialised to 0b1111 + AMCNTENSET1_EL0 must be initialised to a platform specific value + having 0b1 set for the corresponding bit for each of the auxiliary + counters present. + - If the kernel is entered at EL1: + AMCNTENSET0_EL0 must be initialised to 0b1111 + AMCNTENSET1_EL0 must be initialised to a platform specific value + having 0b1 set for the corresponding bit for each of the auxiliary + counters present. + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level. diff --git a/Documentation/arm64/index.rst b/Documentation/arm64/index.rst index 5c0c69dc58aa..09cbb4ed2237 100644 --- a/Documentation/arm64/index.rst +++ b/Documentation/arm64/index.rst @@ -6,6 +6,7 @@ ARM64 Architecture :maxdepth: 1 acpi_object_usage + amu arm-acpi booting cpu-feature-registers diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index 9120e59578dc..2c08c628febd 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -110,6 +110,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 | +----------------+-----------------+-----------------+-----------------------------+ +| Cavium | ThunderX GICv3 | #38539 | N/A | ++----------------+-----------------+-----------------+-----------------------------+ | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 | +----------------+-----------------+-----------------+-----------------------------+ | Cavium | ThunderX Core | #30115 | CAVIUM_ERRATUM_30115 | diff --git a/Documentation/block/capability.rst b/Documentation/block/capability.rst index 2cf258d64bbe..160a5148b915 100644 --- a/Documentation/block/capability.rst +++ b/Documentation/block/capability.rst @@ -2,17 +2,9 @@ Generic Block Device Capability =============================== -This file documents the sysfs file block/<disk>/capability +This file documents the sysfs file ``block/<disk>/capability``. -capability is a hex word indicating which capabilities a specific disk -supports. For more information on bits not listed here, see -include/linux/genhd.h +``capability`` is a bitfield, printed in hexadecimal, indicating which +capabilities a specific block device supports: -GENHD_FL_MEDIA_CHANGE_NOTIFY ----------------------------- - -Value: 4 - -When this bit is set, the disk supports Asynchronous Notification -of media change events. These events will be broadcast to user -space via kernel uevent. +.. kernel-doc:: include/linux/genhd.h diff --git a/Documentation/bpf/bpf_devel_QA.rst b/Documentation/bpf/bpf_devel_QA.rst index c9856b927055..38c15c6fcb14 100644 --- a/Documentation/bpf/bpf_devel_QA.rst +++ b/Documentation/bpf/bpf_devel_QA.rst @@ -20,11 +20,11 @@ Reporting bugs Q: How do I report bugs for BPF kernel code? -------------------------------------------- A: Since all BPF kernel development as well as bpftool and iproute2 BPF -loader development happens through the netdev kernel mailing list, +loader development happens through the bpf kernel mailing list, please report any found issues around BPF to the following mailing list: - netdev@vger.kernel.org + bpf@vger.kernel.org This may also include issues related to XDP, BPF tracing, etc. @@ -46,17 +46,12 @@ Submitting patches Q: To which mailing list do I need to submit my BPF patches? ------------------------------------------------------------ -A: Please submit your BPF patches to the netdev kernel mailing list: +A: Please submit your BPF patches to the bpf kernel mailing list: - netdev@vger.kernel.org - -Historically, BPF came out of networking and has always been maintained -by the kernel networking community. Although these days BPF touches -many other subsystems as well, the patches are still routed mainly -through the networking community. + bpf@vger.kernel.org In case your patch has changes in various different subsystems (e.g. -tracing, security, etc), make sure to Cc the related kernel mailing +networking, tracing, security, etc), make sure to Cc the related kernel mailing lists and maintainers from there as well, so they are able to review the changes and provide their Acked-by's to the patches. @@ -168,7 +163,7 @@ a BPF point of view. Be aware that this is not a final verdict that the patch will automatically get accepted into net or net-next trees eventually: -On the netdev kernel mailing list reviews can come in at any point +On the bpf kernel mailing list reviews can come in at any point in time. If discussions around a patch conclude that they cannot get included as-is, we will either apply a follow-up fix or drop them from the trees entirely. Therefore, we also reserve to rebase @@ -494,15 +489,15 @@ A: You need cmake and gcc-c++ as build requisites for LLVM. Once you have that set up, proceed with building the latest LLVM and clang version from the git repositories:: - $ git clone http://llvm.org/git/llvm.git - $ cd llvm/tools - $ git clone --depth 1 http://llvm.org/git/clang.git - $ cd ..; mkdir build; cd build - $ cmake .. -DLLVM_TARGETS_TO_BUILD="BPF;X86" \ + $ git clone https://github.com/llvm/llvm-project.git + $ mkdir -p llvm-project/llvm/build/install + $ cd llvm-project/llvm/build + $ cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="BPF;X86" \ + -DLLVM_ENABLE_PROJECTS="clang" \ -DBUILD_SHARED_LIBS=OFF \ -DCMAKE_BUILD_TYPE=Release \ -DLLVM_BUILD_RUNTIME=OFF - $ make -j $(getconf _NPROCESSORS_ONLN) + $ ninja The built binaries can then be found in the build/bin/ directory, where you can point the PATH variable to. diff --git a/Documentation/bpf/bpf_lsm.rst b/Documentation/bpf/bpf_lsm.rst new file mode 100644 index 000000000000..1c0a75a51d79 --- /dev/null +++ b/Documentation/bpf/bpf_lsm.rst @@ -0,0 +1,142 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2020 Google LLC. + +================ +LSM BPF Programs +================ + +These BPF programs allow runtime instrumentation of the LSM hooks by privileged +users to implement system-wide MAC (Mandatory Access Control) and Audit +policies using eBPF. + +Structure +--------- + +The example shows an eBPF program that can be attached to the ``file_mprotect`` +LSM hook: + +.. c:function:: int file_mprotect(struct vm_area_struct *vma, unsigned long reqprot, unsigned long prot); + +Other LSM hooks which can be instrumented can be found in +``include/linux/lsm_hooks.h``. + +eBPF programs that use :doc:`/bpf/btf` do not need to include kernel headers +for accessing information from the attached eBPF program's context. They can +simply declare the structures in the eBPF program and only specify the fields +that need to be accessed. + +.. code-block:: c + + struct mm_struct { + unsigned long start_brk, brk, start_stack; + } __attribute__((preserve_access_index)); + + struct vm_area_struct { + unsigned long start_brk, brk, start_stack; + unsigned long vm_start, vm_end; + struct mm_struct *vm_mm; + } __attribute__((preserve_access_index)); + + +.. note:: The order of the fields is irrelevant. + +This can be further simplified (if one has access to the BTF information at +build time) by generating the ``vmlinux.h`` with: + +.. code-block:: console + + # bpftool btf dump file <path-to-btf-vmlinux> format c > vmlinux.h + +.. note:: ``path-to-btf-vmlinux`` can be ``/sys/kernel/btf/vmlinux`` if the + build environment matches the environment the BPF programs are + deployed in. + +The ``vmlinux.h`` can then simply be included in the BPF programs without +requiring the definition of the types. + +The eBPF programs can be declared using the``BPF_PROG`` +macros defined in `tools/lib/bpf/bpf_tracing.h`_. In this +example: + + * ``"lsm/file_mprotect"`` indicates the LSM hook that the program must + be attached to + * ``mprotect_audit`` is the name of the eBPF program + +.. code-block:: c + + SEC("lsm/file_mprotect") + int BPF_PROG(mprotect_audit, struct vm_area_struct *vma, + unsigned long reqprot, unsigned long prot, int ret) + { + /* ret is the return value from the previous BPF program + * or 0 if it's the first hook. + */ + if (ret != 0) + return ret; + + int is_heap; + + is_heap = (vma->vm_start >= vma->vm_mm->start_brk && + vma->vm_end <= vma->vm_mm->brk); + + /* Return an -EPERM or write information to the perf events buffer + * for auditing + */ + if (is_heap) + return -EPERM; + } + +The ``__attribute__((preserve_access_index))`` is a clang feature that allows +the BPF verifier to update the offsets for the access at runtime using the +:doc:`/bpf/btf` information. Since the BPF verifier is aware of the types, it +also validates all the accesses made to the various types in the eBPF program. + +Loading +------- + +eBPF programs can be loaded with the :manpage:`bpf(2)` syscall's +``BPF_PROG_LOAD`` operation: + +.. code-block:: c + + struct bpf_object *obj; + + obj = bpf_object__open("./my_prog.o"); + bpf_object__load(obj); + +This can be simplified by using a skeleton header generated by ``bpftool``: + +.. code-block:: console + + # bpftool gen skeleton my_prog.o > my_prog.skel.h + +and the program can be loaded by including ``my_prog.skel.h`` and using +the generated helper, ``my_prog__open_and_load``. + +Attachment to LSM Hooks +----------------------- + +The LSM allows attachment of eBPF programs as LSM hooks using :manpage:`bpf(2)` +syscall's ``BPF_RAW_TRACEPOINT_OPEN`` operation or more simply by +using the libbpf helper ``bpf_program__attach_lsm``. + +The program can be detached from the LSM hook by *destroying* the ``link`` +link returned by ``bpf_program__attach_lsm`` using ``bpf_link__destroy``. + +One can also use the helpers generated in ``my_prog.skel.h`` i.e. +``my_prog__attach`` for attachment and ``my_prog__destroy`` for cleaning up. + +Examples +-------- + +An example eBPF program can be found in +`tools/testing/selftests/bpf/progs/lsm.c`_ and the corresponding +userspace code in `tools/testing/selftests/bpf/prog_tests/test_lsm.c`_ + +.. Links +.. _tools/lib/bpf/bpf_tracing.h: + https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/tools/lib/bpf/bpf_tracing.h +.. _tools/testing/selftests/bpf/progs/lsm.c: + https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/tools/testing/selftests/bpf/progs/lsm.c +.. _tools/testing/selftests/bpf/prog_tests/test_lsm.c: + https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/tools/testing/selftests/bpf/prog_tests/test_lsm.c diff --git a/Documentation/bpf/drgn.rst b/Documentation/bpf/drgn.rst new file mode 100644 index 000000000000..41f223c3161e --- /dev/null +++ b/Documentation/bpf/drgn.rst @@ -0,0 +1,213 @@ +.. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) + +============== +BPF drgn tools +============== + +drgn scripts is a convenient and easy to use mechanism to retrieve arbitrary +kernel data structures. drgn is not relying on kernel UAPI to read the data. +Instead it's reading directly from ``/proc/kcore`` or vmcore and pretty prints +the data based on DWARF debug information from vmlinux. + +This document describes BPF related drgn tools. + +See `drgn/tools`_ for all tools available at the moment and `drgn/doc`_ for +more details on drgn itself. + +bpf_inspect.py +-------------- + +Description +=========== + +`bpf_inspect.py`_ is a tool intended to inspect BPF programs and maps. It can +iterate over all programs and maps in the system and print basic information +about these objects, including id, type and name. + +The main use-case `bpf_inspect.py`_ covers is to show BPF programs of types +``BPF_PROG_TYPE_EXT`` and ``BPF_PROG_TYPE_TRACING`` attached to other BPF +programs via ``freplace``/``fentry``/``fexit`` mechanisms, since there is no +user-space API to get this information. + +Getting started +=============== + +List BPF programs (full names are obtained from BTF):: + + % sudo bpf_inspect.py prog + 27: BPF_PROG_TYPE_TRACEPOINT tracepoint__tcp__tcp_send_reset + 4632: BPF_PROG_TYPE_CGROUP_SOCK_ADDR tw_ipt_bind + 49464: BPF_PROG_TYPE_RAW_TRACEPOINT raw_tracepoint__sched_process_exit + +List BPF maps:: + + % sudo bpf_inspect.py map + 2577: BPF_MAP_TYPE_HASH tw_ipt_vips + 4050: BPF_MAP_TYPE_STACK_TRACE stack_traces + 4069: BPF_MAP_TYPE_PERCPU_ARRAY ned_dctcp_cntr + +Find BPF programs attached to BPF program ``test_pkt_access``:: + + % sudo bpf_inspect.py p | grep test_pkt_access + 650: BPF_PROG_TYPE_SCHED_CLS test_pkt_access + 654: BPF_PROG_TYPE_TRACING test_main linked:[650->25: BPF_TRAMP_FEXIT test_pkt_access->test_pkt_access()] + 655: BPF_PROG_TYPE_TRACING test_subprog1 linked:[650->29: BPF_TRAMP_FEXIT test_pkt_access->test_pkt_access_subprog1()] + 656: BPF_PROG_TYPE_TRACING test_subprog2 linked:[650->31: BPF_TRAMP_FEXIT test_pkt_access->test_pkt_access_subprog2()] + 657: BPF_PROG_TYPE_TRACING test_subprog3 linked:[650->21: BPF_TRAMP_FEXIT test_pkt_access->test_pkt_access_subprog3()] + 658: BPF_PROG_TYPE_EXT new_get_skb_len linked:[650->16: BPF_TRAMP_REPLACE test_pkt_access->get_skb_len()] + 659: BPF_PROG_TYPE_EXT new_get_skb_ifindex linked:[650->23: BPF_TRAMP_REPLACE test_pkt_access->get_skb_ifindex()] + 660: BPF_PROG_TYPE_EXT new_get_constant linked:[650->19: BPF_TRAMP_REPLACE test_pkt_access->get_constant()] + +It can be seen that there is a program ``test_pkt_access``, id 650 and there +are multiple other tracing and ext programs attached to functions in +``test_pkt_access``. + +For example the line:: + + 658: BPF_PROG_TYPE_EXT new_get_skb_len linked:[650->16: BPF_TRAMP_REPLACE test_pkt_access->get_skb_len()] + +, means that BPF program id 658, type ``BPF_PROG_TYPE_EXT``, name +``new_get_skb_len`` replaces (``BPF_TRAMP_REPLACE``) function ``get_skb_len()`` +that has BTF id 16 in BPF program id 650, name ``test_pkt_access``. + +Getting help: + +.. code-block:: none + + % sudo bpf_inspect.py + usage: bpf_inspect.py [-h] {prog,p,map,m} ... + + drgn script to list BPF programs or maps and their properties + unavailable via kernel API. + + See https://github.com/osandov/drgn/ for more details on drgn. + + optional arguments: + -h, --help show this help message and exit + + subcommands: + {prog,p,map,m} + prog (p) list BPF programs + map (m) list BPF maps + +Customization +============= + +The script is intended to be customized by developers to print relevant +information about BPF programs, maps and other objects. + +For example, to print ``struct bpf_prog_aux`` for BPF program id 53077: + +.. code-block:: none + + % git diff + diff --git a/tools/bpf_inspect.py b/tools/bpf_inspect.py + index 650e228..aea2357 100755 + --- a/tools/bpf_inspect.py + +++ b/tools/bpf_inspect.py + @@ -112,7 +112,9 @@ def list_bpf_progs(args): + if linked: + linked = f" linked:[{linked}]" + + - print(f"{id_:>6}: {type_:32} {name:32} {linked}") + + if id_ == 53077: + + print(f"{id_:>6}: {type_:32} {name:32}") + + print(f"{bpf_prog.aux}") + + + def list_bpf_maps(args): + +It produces the output:: + + % sudo bpf_inspect.py p + 53077: BPF_PROG_TYPE_XDP tw_xdp_policer + *(struct bpf_prog_aux *)0xffff8893fad4b400 = { + .refcnt = (atomic64_t){ + .counter = (long)58, + }, + .used_map_cnt = (u32)1, + .max_ctx_offset = (u32)8, + .max_pkt_offset = (u32)15, + .max_tp_access = (u32)0, + .stack_depth = (u32)8, + .id = (u32)53077, + .func_cnt = (u32)0, + .func_idx = (u32)0, + .attach_btf_id = (u32)0, + .linked_prog = (struct bpf_prog *)0x0, + .verifier_zext = (bool)0, + .offload_requested = (bool)0, + .attach_btf_trace = (bool)0, + .func_proto_unreliable = (bool)0, + .trampoline_prog_type = (enum bpf_tramp_prog_type)BPF_TRAMP_FENTRY, + .trampoline = (struct bpf_trampoline *)0x0, + .tramp_hlist = (struct hlist_node){ + .next = (struct hlist_node *)0x0, + .pprev = (struct hlist_node **)0x0, + }, + .attach_func_proto = (const struct btf_type *)0x0, + .attach_func_name = (const char *)0x0, + .func = (struct bpf_prog **)0x0, + .jit_data = (void *)0x0, + .poke_tab = (struct bpf_jit_poke_descriptor *)0x0, + .size_poke_tab = (u32)0, + .ksym_tnode = (struct latch_tree_node){ + .node = (struct rb_node [2]){ + { + .__rb_parent_color = (unsigned long)18446612956263126665, + .rb_right = (struct rb_node *)0x0, + .rb_left = (struct rb_node *)0xffff88a0be3d0088, + }, + { + .__rb_parent_color = (unsigned long)18446612956263126689, + .rb_right = (struct rb_node *)0x0, + .rb_left = (struct rb_node *)0xffff88a0be3d00a0, + }, + }, + }, + .ksym_lnode = (struct list_head){ + .next = (struct list_head *)0xffff88bf481830b8, + .prev = (struct list_head *)0xffff888309f536b8, + }, + .ops = (const struct bpf_prog_ops *)xdp_prog_ops+0x0 = 0xffffffff820fa350, + .used_maps = (struct bpf_map **)0xffff889ff795de98, + .prog = (struct bpf_prog *)0xffffc9000cf2d000, + .user = (struct user_struct *)root_user+0x0 = 0xffffffff82444820, + .load_time = (u64)2408348759285319, + .cgroup_storage = (struct bpf_map *[2]){}, + .name = (char [16])"tw_xdp_policer", + .security = (void *)0xffff889ff795d548, + .offload = (struct bpf_prog_offload *)0x0, + .btf = (struct btf *)0xffff8890ce6d0580, + .func_info = (struct bpf_func_info *)0xffff889ff795d240, + .func_info_aux = (struct bpf_func_info_aux *)0xffff889ff795de20, + .linfo = (struct bpf_line_info *)0xffff888a707afc00, + .jited_linfo = (void **)0xffff8893fad48600, + .func_info_cnt = (u32)1, + .nr_linfo = (u32)37, + .linfo_idx = (u32)0, + .num_exentries = (u32)0, + .extable = (struct exception_table_entry *)0xffffffffa032d950, + .stats = (struct bpf_prog_stats *)0x603fe3a1f6d0, + .work = (struct work_struct){ + .data = (atomic_long_t){ + .counter = (long)0, + }, + .entry = (struct list_head){ + .next = (struct list_head *)0x0, + .prev = (struct list_head *)0x0, + }, + .func = (work_func_t)0x0, + }, + .rcu = (struct callback_head){ + .next = (struct callback_head *)0x0, + .func = (void (*)(struct callback_head *))0x0, + }, + } + + +.. Links +.. _drgn/doc: https://drgn.readthedocs.io/en/latest/ +.. _drgn/tools: https://github.com/osandov/drgn/tree/master/tools +.. _bpf_inspect.py: + https://github.com/osandov/drgn/blob/master/tools/bpf_inspect.py diff --git a/Documentation/bpf/index.rst b/Documentation/bpf/index.rst index 4f5410b61441..f99677f3572f 100644 --- a/Documentation/bpf/index.rst +++ b/Documentation/bpf/index.rst @@ -45,14 +45,16 @@ Program types prog_cgroup_sockopt prog_cgroup_sysctl prog_flow_dissector + bpf_lsm -Testing BPF -=========== +Testing and debugging BPF +========================= .. toctree:: :maxdepth: 1 + drgn s390 diff --git a/Documentation/conf.py b/Documentation/conf.py index 3c7bdf4cd31f..9ae8e9abf846 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -38,7 +38,11 @@ needs_sphinx = '1.3' # ones. extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain', 'kfigure', 'sphinx.ext.ifconfig', 'automarkup', - 'maintainers_include'] + 'maintainers_include', 'sphinx.ext.autosectionlabel' ] + +# Ensure that autosectionlabel will produce unique names +autosectionlabel_prefix_document = True +autosectionlabel_maxdepth = 2 # The name of the math extension changed on Sphinx 1.4 if (major == 1 and minor > 3) or (major > 1): diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index a501dc1c90d0..0897ad12c119 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -8,41 +8,81 @@ This is the beginning of a manual for core kernel APIs. The conversion Core utilities ============== +This section has general and "core core" documentation. The first is a +massive grab-bag of kerneldoc info left over from the docbook days; it +should really be broken up someday when somebody finds the energy to do +it. + .. toctree:: :maxdepth: 1 kernel-api + workqueue + printk-formats + symbol-namespaces + +Data structures and low-level utilities +======================================= + +Library functionality that is used throughout the kernel. + +.. toctree:: + :maxdepth: 1 + + kobject assoc_array + xarray + idr + circular-buffers + generic-radix-tree + packing + timekeeping + errseq + +Concurrency primitives +====================== + +How Linux keeps everything from happening at the same time. See +:doc:`/locking/index` for more related documentation. + +.. toctree:: + :maxdepth: 1 + atomic_ops - cachetlb refcount-vs-atomic - cpu_hotplug - idr local_ops - workqueue + padata + ../RCU/index + +Low-level hardware management +============================= + +Cache management, managing CPU hotplug, etc. + +.. toctree:: + :maxdepth: 1 + + cachetlb + cpu_hotplug + memory-hotplug genericirq - xarray - librs - genalloc - errseq - packing - printk-formats - circular-buffers - generic-radix-tree + protection-keys + +Memory management +================= + +How to allocate and use memory in the kernel. Note that there is a lot +more memory-management documentation in :doc:`/vm/index`. + +.. toctree:: + :maxdepth: 1 + memory-allocation mm-api + genalloc pin_user_pages - gfp_mask-from-fs-io - timekeeping boot-time-mm - memory-hotplug - protection-keys - ../RCU/index - gcc-plugins - symbol-namespaces - padata - ioctl - + gfp_mask-from-fs-io Interfaces for kernel debugging =============================== @@ -53,6 +93,16 @@ Interfaces for kernel debugging debug-objects tracepoint +Everything else +=============== + +Documents that don't fit elsewhere or which have yet to be categorized. + +.. toctree:: + :maxdepth: 1 + + librs + .. only:: subproject and html Indices diff --git a/Documentation/kobject.txt b/Documentation/core-api/kobject.rst index ff4c25098119..1f62d4d7d966 100644 --- a/Documentation/kobject.txt +++ b/Documentation/core-api/kobject.rst @@ -25,7 +25,7 @@ some terms we will be working with. usually embedded within some other structure which contains the stuff the code is really interested in. - No structure should EVER have more than one kobject embedded within it. + No structure should **EVER** have more than one kobject embedded within it. If it does, the reference counting for the object is sure to be messed up and incorrect, and your code will be buggy. So do not do this. @@ -55,7 +55,7 @@ a larger, domain-specific object. To this end, kobjects will be found embedded in other structures. If you are used to thinking of things in object-oriented terms, kobjects can be seen as a top-level, abstract class from which other classes are derived. A kobject implements a set of -capabilities which are not particularly useful by themselves, but which are +capabilities which are not particularly useful by themselves, but are nice to have in other objects. The C language does not allow for the direct expression of inheritance, so other techniques - such as structure embedding - must be used. @@ -65,12 +65,12 @@ this is analogous as to how "list_head" structs are rarely useful on their own, but are invariably found embedded in the larger objects of interest.) -So, for example, the UIO code in drivers/uio/uio.c has a structure that +So, for example, the UIO code in ``drivers/uio/uio.c`` has a structure that defines the memory region associated with a uio device:: struct uio_map { - struct kobject kobj; - struct uio_mem *mem; + struct kobject kobj; + struct uio_mem *mem; }; If you have a struct uio_map structure, finding its embedded kobject is @@ -78,30 +78,30 @@ just a matter of using the kobj member. Code that works with kobjects will often have the opposite problem, however: given a struct kobject pointer, what is the pointer to the containing structure? You must avoid tricks (such as assuming that the kobject is at the beginning of the structure) -and, instead, use the container_of() macro, found in <linux/kernel.h>:: +and, instead, use the container_of() macro, found in ``<linux/kernel.h>``:: container_of(pointer, type, member) where: - * "pointer" is the pointer to the embedded kobject, - * "type" is the type of the containing structure, and - * "member" is the name of the structure field to which "pointer" points. + * ``pointer`` is the pointer to the embedded kobject, + * ``type`` is the type of the containing structure, and + * ``member`` is the name of the structure field to which ``pointer`` points. The return value from container_of() is a pointer to the corresponding -container type. So, for example, a pointer "kp" to a struct kobject -embedded *within* a struct uio_map could be converted to a pointer to the -*containing* uio_map structure with:: +container type. So, for example, a pointer ``kp`` to a struct kobject +embedded **within** a struct uio_map could be converted to a pointer to the +**containing** uio_map structure with:: struct uio_map *u_map = container_of(kp, struct uio_map, kobj); -For convenience, programmers often define a simple macro for "back-casting" +For convenience, programmers often define a simple macro for **back-casting** kobject pointers to the containing type. Exactly this happens in the -earlier drivers/uio/uio.c, as you can see here:: +earlier ``drivers/uio/uio.c``, as you can see here:: struct uio_map { - struct kobject kobj; - struct uio_mem *mem; + struct kobject kobj; + struct uio_mem *mem; }; #define to_map(map) container_of(map, struct uio_map, kobj) @@ -125,7 +125,7 @@ must have an associated kobj_type. After calling kobject_init(), to register the kobject with sysfs, the function kobject_add() must be called:: int kobject_add(struct kobject *kobj, struct kobject *parent, - const char *fmt, ...); + const char *fmt, ...); This sets up the parent of the kobject and the name for the kobject properly. If the kobject is to be associated with a specific kset, @@ -172,13 +172,13 @@ call to kobject_uevent():: int kobject_uevent(struct kobject *kobj, enum kobject_action action); -Use the KOBJ_ADD action for when the kobject is first added to the kernel. +Use the **KOBJ_ADD** action for when the kobject is first added to the kernel. This should be done only after any attributes or children of the kobject have been initialized properly, as userspace will instantly start to look for them when this call happens. When the kobject is removed from the kernel (details on how to do that are -below), the uevent for KOBJ_REMOVE will be automatically created by the +below), the uevent for **KOBJ_REMOVE** will be automatically created by the kobject core, so the caller does not have to worry about doing that by hand. @@ -238,7 +238,7 @@ Both types of attributes used here, with a kobject that has been created with the kobject_create_and_add(), can be of type kobj_attribute, so no special custom attribute is needed to be created. -See the example module, samples/kobject/kobject-example.c for an +See the example module, ``samples/kobject/kobject-example.c`` for an implementation of a simple kobject and attributes. @@ -270,10 +270,10 @@ such a method has a form like:: void my_object_release(struct kobject *kobj) { - struct my_object *mine = container_of(kobj, struct my_object, kobj); + struct my_object *mine = container_of(kobj, struct my_object, kobj); - /* Perform any additional cleanup on this object, then... */ - kfree(mine); + /* Perform any additional cleanup on this object, then... */ + kfree(mine); } One important point cannot be overstated: every kobject must have a @@ -297,11 +297,11 @@ instead, it is associated with the ktype. So let us introduce struct kobj_type:: struct kobj_type { - void (*release)(struct kobject *kobj); - const struct sysfs_ops *sysfs_ops; - struct attribute **default_attrs; - const struct kobj_ns_type_operations *(*child_ns_type)(struct kobject *kobj); - const void *(*namespace)(struct kobject *kobj); + void (*release)(struct kobject *kobj); + const struct sysfs_ops *sysfs_ops; + struct attribute **default_attrs; + const struct kobj_ns_type_operations *(*child_ns_type)(struct kobject *kobj); + const void *(*namespace)(struct kobject *kobj); }; This structure is used to describe a particular type of kobject (or, more @@ -352,8 +352,8 @@ created and never declared statically or on the stack. To create a new kset use:: struct kset *kset_create_and_add(const char *name, - struct kset_uevent_ops *u, - struct kobject *parent); + struct kset_uevent_ops *u, + struct kobject *parent); When you are finished with the kset, call:: @@ -365,16 +365,16 @@ Because other references to the kset may still exist, the release may happen after kset_unregister() returns. An example of using a kset can be seen in the -samples/kobject/kset-example.c file in the kernel tree. +``samples/kobject/kset-example.c`` file in the kernel tree. If a kset wishes to control the uevent operations of the kobjects associated with it, it can use the struct kset_uevent_ops to handle it:: struct kset_uevent_ops { - int (*filter)(struct kset *kset, struct kobject *kobj); - const char *(*name)(struct kset *kset, struct kobject *kobj); - int (*uevent)(struct kset *kset, struct kobject *kobj, - struct kobj_uevent_env *env); + int (*filter)(struct kset *kset, struct kobject *kobj); + const char *(*name)(struct kset *kset, struct kobject *kobj); + int (*uevent)(struct kset *kset, struct kobject *kobj, + struct kobj_uevent_env *env); }; @@ -408,8 +408,8 @@ Kobject removal After a kobject has been registered with the kobject core successfully, it must be cleaned up when the code is finished with it. To do that, call kobject_put(). By doing this, the kobject core will automatically clean up -all of the memory allocated by this kobject. If a KOBJ_ADD uevent has been -sent for the object, a corresponding KOBJ_REMOVE uevent will be sent, and +all of the memory allocated by this kobject. If a ``KOBJ_ADD`` uevent has been +sent for the object, a corresponding ``KOBJ_REMOVE`` uevent will be sent, and any other sysfs housekeeping will be handled for the caller properly. If you need to do a two-stage delete of the kobject (say you are not @@ -430,5 +430,5 @@ Example code to copy from ========================= For a more complete example of using ksets and kobjects properly, see the -example programs samples/kobject/{kobject-example.c,kset-example.c}, -which will be built as loadable modules if you select CONFIG_SAMPLE_KOBJECT. +example programs ``samples/kobject/{kobject-example.c,kset-example.c}``, +which will be built as loadable modules if you select ``CONFIG_SAMPLE_KOBJECT``. diff --git a/Documentation/core-api/mm-api.rst b/Documentation/core-api/mm-api.rst index be726986ff75..2adffb3f7914 100644 --- a/Documentation/core-api/mm-api.rst +++ b/Documentation/core-api/mm-api.rst @@ -73,6 +73,9 @@ File Mapping and Page Cache .. kernel-doc:: mm/truncate.c :export: +.. kernel-doc:: include/linux/pagemap.h + :internal: + Memory pools ============ diff --git a/Documentation/core-api/pin_user_pages.rst b/Documentation/core-api/pin_user_pages.rst index 1d490155ecd7..2e939ff10b86 100644 --- a/Documentation/core-api/pin_user_pages.rst +++ b/Documentation/core-api/pin_user_pages.rst @@ -52,8 +52,22 @@ Which flags are set by each wrapper For these pin_user_pages*() functions, FOLL_PIN is OR'd in with whatever gup flags the caller provides. The caller is required to pass in a non-null struct -pages* array, and the function then pin pages by incrementing each by a special -value. For now, that value is +1, just like get_user_pages*().:: +pages* array, and the function then pins pages by incrementing each by a special +value: GUP_PIN_COUNTING_BIAS. + +For huge pages (and in fact, any compound page of more than 2 pages), the +GUP_PIN_COUNTING_BIAS scheme is not used. Instead, an exact form of pin counting +is achieved, by using the 3rd struct page in the compound page. A new struct +page field, hpage_pinned_refcount, has been added in order to support this. + +This approach for compound pages avoids the counting upper limit problems that +are discussed below. Those limitations would have been aggravated severely by +huge pages, because each tail page adds a refcount to the head page. And in +fact, testing revealed that, without a separate hpage_pinned_refcount field, +page overflows were seen in some huge page stress tests. + +This also means that huge pages and compound pages (of order > 1) do not suffer +from the false positives problem that is mentioned below.:: Function -------- @@ -99,27 +113,6 @@ pages: This also leads to limitations: there are only 31-10==21 bits available for a counter that increments 10 bits at a time. -TODO: for 1GB and larger huge pages, this is cutting it close. That's because -when pin_user_pages() follows such pages, it increments the head page by "1" -(where "1" used to mean "+1" for get_user_pages(), but now means "+1024" for -pin_user_pages()) for each tail page. So if you have a 1GB huge page: - -* There are 256K (18 bits) worth of 4 KB tail pages. -* There are 21 bits available to count up via GUP_PIN_COUNTING_BIAS (that is, - 10 bits at a time) -* There are 21 - 18 == 3 bits available to count. Except that there aren't, - because you need to allow for a few normal get_page() calls on the head page, - as well. Fortunately, the approach of using addition, rather than "hard" - bitfields, within page->_refcount, allows for sharing these bits gracefully. - But we're still looking at about 8 references. - -This, however, is a missing feature more than anything else, because it's easily -solved by addressing an obvious inefficiency in the original get_user_pages() -approach of retrieving pages: stop treating all the pages as if they were -PAGE_SIZE. Retrieve huge pages as huge pages. The callers need to be aware of -this, so some work is required. Once that's in place, this limitation mostly -disappears from view, because there will be ample refcounting range available. - * Callers must specifically request "dma-pinned tracking of pages". In other words, just calling get_user_pages() will not suffice; a new set of functions, pin_user_page() and related, must be used. @@ -173,8 +166,8 @@ CASE 4: Pinning for struct page manipulation only ------------------------------------------------- Here, normal GUP calls are sufficient, so neither flag needs to be set. -page_dma_pinned(): the whole point of pinning -============================================= +page_maybe_dma_pinned(): the whole point of pinning +=================================================== The whole point of marking pages as "DMA-pinned" or "gup-pinned" is to be able to query, "is this page DMA-pinned?" That allows code such as page_mkclean() @@ -186,7 +179,7 @@ and debates (see the References at the end of this document). It's a TODO item here: fill in the details once that's worked out. Meanwhile, it's safe to say that having this available: :: - static inline bool page_dma_pinned(struct page *page) + static inline bool page_maybe_dma_pinned(struct page *page) ...is a prerequisite to solving the long-running gup+DMA problem. @@ -215,12 +208,42 @@ has the following new calls to exercise the new pin*() wrapper functions: You can monitor how many total dma-pinned pages have been acquired and released since the system was booted, via two new /proc/vmstat entries: :: - /proc/vmstat/nr_foll_pin_requested - /proc/vmstat/nr_foll_pin_requested + /proc/vmstat/nr_foll_pin_acquired + /proc/vmstat/nr_foll_pin_released + +Under normal conditions, these two values will be equal unless there are any +long-term [R]DMA pins in place, or during pin/unpin transitions. + +* nr_foll_pin_acquired: This is the number of logical pins that have been + acquired since the system was powered on. For huge pages, the head page is + pinned once for each page (head page and each tail page) within the huge page. + This follows the same sort of behavior that get_user_pages() uses for huge + pages: the head page is refcounted once for each tail or head page in the huge + page, when get_user_pages() is applied to a huge page. + +* nr_foll_pin_released: The number of logical pins that have been released since + the system was powered on. Note that pages are released (unpinned) on a + PAGE_SIZE granularity, even if the original pin was applied to a huge page. + Becaused of the pin count behavior described above in "nr_foll_pin_acquired", + the accounting balances out, so that after doing this:: + + pin_user_pages(huge_page); + for (each page in huge_page) + unpin_user_page(page); + +...the following is expected:: + + nr_foll_pin_released == nr_foll_pin_acquired + +(...unless it was already out of balance due to a long-term RDMA pin being in +place.) + +Other diagnostics +================= -Those are both going to show zero, unless CONFIG_DEBUG_VM is set. This is -because there is a noticeable performance drop in unpin_user_page(), when they -are activated. +dump_page() has been enhanced slightly, to handle these new counting fields, and +to better report on compound pages in general. Specifically, for compound pages +with order > 1, the exact (hpage_pinned_refcount) pincount is reported. References ========== @@ -228,5 +251,6 @@ References * `Some slow progress on get_user_pages() (Apr 2, 2019) <https://lwn.net/Articles/784574/>`_ * `DMA and get_user_pages() (LPC: Dec 12, 2018) <https://lwn.net/Articles/774411/>`_ * `The trouble with get_user_pages() (Apr 30, 2018) <https://lwn.net/Articles/753027/>`_ +* `LWN kernel index: get_user_pages() <https://lwn.net/Kernel/Index/#Memory_management-get_user_pages>`_ John Hubbard, October, 2019 diff --git a/Documentation/cpu-freq/amd-powernow.txt b/Documentation/cpu-freq/amd-powernow.txt deleted file mode 100644 index 254da155fa47..000000000000 --- a/Documentation/cpu-freq/amd-powernow.txt +++ /dev/null @@ -1,38 +0,0 @@ - -PowerNow! and Cool'n'Quiet are AMD names for frequency -management capabilities in AMD processors. As the hardware -implementation changes in new generations of the processors, -there is a different cpu-freq driver for each generation. - -Note that the driver's will not load on the "wrong" hardware, -so it is safe to try each driver in turn when in doubt as to -which is the correct driver. - -Note that the functionality to change frequency (and voltage) -is not available in all processors. The drivers will refuse -to load on processors without this capability. The capability -is detected with the cpuid instruction. - -The drivers use BIOS supplied tables to obtain frequency and -voltage information appropriate for a particular platform. -Frequency transitions will be unavailable if the BIOS does -not supply these tables. - -6th Generation: powernow-k6 - -7th Generation: powernow-k7: Athlon, Duron, Geode. - -8th Generation: powernow-k8: Athlon, Athlon 64, Opteron, Sempron. -Documentation on this functionality in 8th generation processors -is available in the "BIOS and Kernel Developer's Guide", publication -26094, in chapter 9, available for download from www.amd.com. - -BIOS supplied data, for powernow-k7 and for powernow-k8, may be -from either the PSB table or from ACPI objects. The ACPI support -is only available if the kernel config sets CONFIG_ACPI_PROCESSOR. -The powernow-k8 driver will attempt to use ACPI if so configured, -and fall back to PST if that fails. -The powernow-k7 driver will try to use the PSB support first, and -fall back to ACPI if the PSB support fails. A module parameter, -acpi_force, is provided to force ACPI support to be used instead -of PSB support. diff --git a/Documentation/cpu-freq/core.txt b/Documentation/cpu-freq/core.rst index ed577d9c154b..33cb90bd1d8f 100644 --- a/Documentation/cpu-freq/core.txt +++ b/Documentation/cpu-freq/core.rst @@ -1,31 +1,23 @@ - CPU frequency and voltage scaling code in the Linux(TM) kernel +.. SPDX-License-Identifier: GPL-2.0 +============================================================= +General description of the CPUFreq core and CPUFreq notifiers +============================================================= - L i n u x C P U F r e q +Authors: + - Dominik Brodowski <linux@brodo.de> + - David Kimdon <dwhedon@debian.org> + - Rafael J. Wysocki <rafael.j.wysocki@intel.com> + - Viresh Kumar <viresh.kumar@linaro.org> - C P U F r e q C o r e +.. Contents: - - Dominik Brodowski <linux@brodo.de> - David Kimdon <dwhedon@debian.org> - Rafael J. Wysocki <rafael.j.wysocki@intel.com> - Viresh Kumar <viresh.kumar@linaro.org> - - - - Clock scaling allows you to change the clock speed of the CPUs on the - fly. This is a nice method to save battery power, because the lower - the clock speed, the less power the CPU consumes. - - -Contents: ---------- -1. CPUFreq core and interfaces -2. CPUFreq notifiers -3. CPUFreq Table Generation with Operating Performance Point (OPP) + 1. CPUFreq core and interfaces + 2. CPUFreq notifiers + 3. CPUFreq Table Generation with Operating Performance Point (OPP) 1. General Information -======================= +====================== The CPUFreq core code is located in drivers/cpufreq/cpufreq.c. This cpufreq code offers a standardized interface for the CPUFreq @@ -63,7 +55,7 @@ The phase is specified in the second argument to the notifier. The phase is CPUFREQ_CREATE_POLICY when the policy is first created and it is CPUFREQ_REMOVE_POLICY when the policy is removed. -The third argument, a void *pointer, points to a struct cpufreq_policy +The third argument, a ``void *pointer``, points to a struct cpufreq_policy consisting of several values, including min, max (the lower and upper frequencies (in kHz) of the new policy). @@ -80,10 +72,13 @@ CPUFREQ_POSTCHANGE. The third argument is a struct cpufreq_freqs with the following values: -cpu - number of the affected CPU -old - old frequency -new - new frequency -flags - flags of the cpufreq driver + +===== =========================== +cpu number of the affected CPU +old old frequency +new new frequency +flags flags of the cpufreq driver +===== =========================== 3. CPUFreq Table Generation with Operating Performance Point (OPP) ================================================================== @@ -94,9 +89,12 @@ dev_pm_opp_init_cpufreq_table - the OPP layer's internal information about the available frequencies into a format readily providable to cpufreq. - WARNING: Do not use this function in interrupt context. + .. Warning:: + + Do not use this function in interrupt context. + + Example:: - Example: soc_pm_init() { /* Do things */ @@ -106,7 +104,10 @@ dev_pm_opp_init_cpufreq_table - /* Do other things */ } - NOTE: This function is available only if CONFIG_CPU_FREQ is enabled in - addition to CONFIG_PM_OPP. + .. note:: + + This function is available only if CONFIG_CPU_FREQ is enabled in + addition to CONFIG_PM_OPP. -dev_pm_opp_free_cpufreq_table - Free up the table allocated by dev_pm_opp_init_cpufreq_table +dev_pm_opp_free_cpufreq_table + Free up the table allocated by dev_pm_opp_init_cpufreq_table diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.rst index 6e353d00cdc6..a697278ce190 100644 --- a/Documentation/cpu-freq/cpu-drivers.txt +++ b/Documentation/cpu-freq/cpu-drivers.rst @@ -1,35 +1,27 @@ - CPU frequency and voltage scaling code in the Linux(TM) kernel +.. SPDX-License-Identifier: GPL-2.0 +=============================================== +How to Implement a new CPUFreq Processor Driver +=============================================== - L i n u x C P U F r e q +Authors: - C P U D r i v e r s - - information for developers - + - Dominik Brodowski <linux@brodo.de> + - Rafael J. Wysocki <rafael.j.wysocki@intel.com> + - Viresh Kumar <viresh.kumar@linaro.org> +.. Contents - Dominik Brodowski <linux@brodo.de> - Rafael J. Wysocki <rafael.j.wysocki@intel.com> - Viresh Kumar <viresh.kumar@linaro.org> - - - - Clock scaling allows you to change the clock speed of the CPUs on the - fly. This is a nice method to save battery power, because the lower - the clock speed, the less power the CPU consumes. - - -Contents: ---------- -1. What To Do? -1.1 Initialization -1.2 Per-CPU Initialization -1.3 verify -1.4 target/target_index or setpolicy? -1.5 target/target_index -1.6 setpolicy -1.7 get_intermediate and target_intermediate -2. Frequency Table Helpers + 1. What To Do? + 1.1 Initialization + 1.2 Per-CPU Initialization + 1.3 verify + 1.4 target/target_index or setpolicy? + 1.5 target/target_index + 1.6 setpolicy + 1.7 get_intermediate and target_intermediate + 2. Frequency Table Helpers @@ -49,7 +41,7 @@ function check whether this kernel runs on the right CPU and the right chipset. If so, register a struct cpufreq_driver with the CPUfreq core using cpufreq_register_driver() -What shall this struct cpufreq_driver contain? +What shall this struct cpufreq_driver contain? .name - The name of this driver. @@ -108,37 +100,42 @@ Whenever a new CPU is registered with the device model, or after the cpufreq driver registers itself, the per-policy initialization function cpufreq_driver.init is called if no cpufreq policy existed for the CPU. Note that the .init() and .exit() routines are called only once for the -policy and not for each CPU managed by the policy. It takes a struct -cpufreq_policy *policy as argument. What to do now? +policy and not for each CPU managed by the policy. It takes a ``struct +cpufreq_policy *policy`` as argument. What to do now? If necessary, activate the CPUfreq support on your CPU. Then, the driver must fill in the following values: -policy->cpuinfo.min_freq _and_ -policy->cpuinfo.max_freq - the minimum and maximum frequency - (in kHz) which is supported by - this CPU -policy->cpuinfo.transition_latency the time it takes on this CPU to - switch between two frequencies in - nanoseconds (if appropriate, else - specify CPUFREQ_ETERNAL) - -policy->cur The current operating frequency of - this CPU (if appropriate) -policy->min, -policy->max, -policy->policy and, if necessary, -policy->governor must contain the "default policy" for - this CPU. A few moments later, - cpufreq_driver.verify and either - cpufreq_driver.setpolicy or - cpufreq_driver.target/target_index is called - with these values. -policy->cpus Update this with the masks of the - (online + offline) CPUs that do DVFS - along with this CPU (i.e. that share - clock/voltage rails with it). ++-----------------------------------+--------------------------------------+ +|policy->cpuinfo.min_freq _and_ | | +|policy->cpuinfo.max_freq | the minimum and maximum frequency | +| | (in kHz) which is supported by | +| | this CPU | ++-----------------------------------+--------------------------------------+ +|policy->cpuinfo.transition_latency | the time it takes on this CPU to | +| | switch between two frequencies in | +| | nanoseconds (if appropriate, else | +| | specify CPUFREQ_ETERNAL) | ++-----------------------------------+--------------------------------------+ +|policy->cur | The current operating frequency of | +| | this CPU (if appropriate) | ++-----------------------------------+--------------------------------------+ +|policy->min, | | +|policy->max, | | +|policy->policy and, if necessary, | | +|policy->governor | must contain the "default policy" for| +| | this CPU. A few moments later, | +| | cpufreq_driver.verify and either | +| | cpufreq_driver.setpolicy or | +| | cpufreq_driver.target/target_index is| +| | called with these values. | ++-----------------------------------+--------------------------------------+ +|policy->cpus | Update this with the masks of the | +| | (online + offline) CPUs that do DVFS | +| | along with this CPU (i.e. that share| +| | clock/voltage rails with it). | ++-----------------------------------+--------------------------------------+ For setting some of these values (cpuinfo.min[max]_freq, policy->min[max]), the frequency table helpers might be helpful. See the section 2 for more information @@ -151,8 +148,8 @@ on them. When the user decides a new policy (consisting of "policy,governor,min,max") shall be set, this policy must be validated so that incompatible values can be corrected. For verifying these -values cpufreq_verify_within_limits(struct cpufreq_policy *policy, -unsigned int min_freq, unsigned int max_freq) function might be helpful. +values cpufreq_verify_within_limits(``struct cpufreq_policy *policy``, +``unsigned int min_freq``, ``unsigned int max_freq``) function might be helpful. See section 2 for details on frequency table helpers. You need to make sure that at least one valid frequency (or operating @@ -163,7 +160,7 @@ policy->max first, and only if this is no solution, decrease policy->min. 1.4 target or target_index or setpolicy or fast_switch? ------------------------------------------------------- -Most cpufreq drivers or even most cpu frequency scaling algorithms +Most cpufreq drivers or even most cpu frequency scaling algorithms only allow the CPU frequency to be set to predefined fixed values. For these, you use the ->target(), ->target_index() or ->fast_switch() callbacks. @@ -175,8 +172,8 @@ limits on their own. These shall use the ->setpolicy() callback. 1.5. target/target_index ------------------------ -The target_index call has two arguments: struct cpufreq_policy *policy, -and unsigned int index (into the exposed frequency table). +The target_index call has two arguments: ``struct cpufreq_policy *policy``, +and ``unsigned int`` index (into the exposed frequency table). The CPUfreq driver must set the new frequency when called here. The actual frequency must be determined by freq_table[index].frequency. @@ -184,9 +181,9 @@ actual frequency must be determined by freq_table[index].frequency. It should always restore to earlier frequency (i.e. policy->restore_freq) in case of errors, even if we switched to intermediate frequency earlier. -Deprecated: +Deprecated ---------- -The target call has three arguments: struct cpufreq_policy *policy, +The target call has three arguments: ``struct cpufreq_policy *policy``, unsigned int target_frequency, unsigned int relation. The CPUfreq driver must set the new frequency when called here. The @@ -210,14 +207,14 @@ Not all drivers are expected to implement it, as sleeping from within this callback isn't allowed. This callback must be highly optimized to do switching as fast as possible. -This function has two arguments: struct cpufreq_policy *policy and -unsigned int target_frequency. +This function has two arguments: ``struct cpufreq_policy *policy`` and +``unsigned int target_frequency``. 1.7 setpolicy ------------- -The setpolicy call only takes a struct cpufreq_policy *policy as +The setpolicy call only takes a ``struct cpufreq_policy *policy`` as argument. You need to set the lower limit of the in-processor or in-chipset dynamic frequency switching to policy->min, the upper limit to policy->max, and -if supported- select a performance-oriented @@ -278,10 +275,10 @@ table. cpufreq_for_each_valid_entry(pos, table) - iterates over all entries, excluding CPUFREQ_ENTRY_INVALID frequencies. -Use arguments "pos" - a cpufreq_frequency_table * as a loop cursor and -"table" - the cpufreq_frequency_table * you want to iterate over. +Use arguments "pos" - a ``cpufreq_frequency_table *`` as a loop cursor and +"table" - the ``cpufreq_frequency_table *`` you want to iterate over. -For example: +For example:: struct cpufreq_frequency_table *pos, *driver_freq_table; diff --git a/Documentation/cpu-freq/cpufreq-nforce2.txt b/Documentation/cpu-freq/cpufreq-nforce2.txt deleted file mode 100644 index babce1315026..000000000000 --- a/Documentation/cpu-freq/cpufreq-nforce2.txt +++ /dev/null @@ -1,19 +0,0 @@ - -The cpufreq-nforce2 driver changes the FSB on nVidia nForce2 platforms. - -This works better than on other platforms, because the FSB of the CPU -can be controlled independently from the PCI/AGP clock. - -The module has two options: - - fid: multiplier * 10 (for example 8.5 = 85) - min_fsb: minimum FSB - -If not set, fid is calculated from the current CPU speed and the FSB. -min_fsb defaults to FSB at boot time - 50 MHz. - -IMPORTANT: The available range is limited downwards! - Also the minimum available FSB can differ, for systems - booting with 200 MHz, 150 should always work. - - diff --git a/Documentation/cpu-freq/cpufreq-stats.txt b/Documentation/cpu-freq/cpufreq-stats.rst index 14378cecb172..9ad695b1c7db 100644 --- a/Documentation/cpu-freq/cpufreq-stats.txt +++ b/Documentation/cpu-freq/cpufreq-stats.rst @@ -1,21 +1,23 @@ +.. SPDX-License-Identifier: GPL-2.0 - CPU frequency and voltage scaling statistics in the Linux(TM) kernel +========================================== +General Description of sysfs CPUFreq Stats +========================================== +information for users - L i n u x c p u f r e q - s t a t s d r i v e r - - information for users - +Author: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> +.. Contents - Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> - -Contents -1. Introduction -2. Statistics Provided (with example) -3. Configuring cpufreq-stats + 1. Introduction + 2. Statistics Provided (with example) + 3. Configuring cpufreq-stats 1. Introduction +=============== cpufreq-stats is a driver that provides CPU frequency statistics for each CPU. These statistics are provided in /sysfs as a bunch of read_only interfaces. This @@ -28,8 +30,10 @@ that may be running on your CPU. So, it will work with any cpufreq_driver. 2. Statistics Provided (with example) +===================================== cpufreq stats provides following statistics (explained in detail below). + - time_in_state - total_trans - trans_table @@ -39,53 +43,57 @@ All the statistics will be from the time the stats driver has been inserted statistic is done. Obviously, stats driver will not have any information about the frequency transitions before the stats driver insertion. --------------------------------------------------------------------------------- -<mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l -total 0 -drwxr-xr-x 2 root root 0 May 14 16:06 . -drwxr-xr-x 3 root root 0 May 14 15:58 .. ---w------- 1 root root 4096 May 14 16:06 reset --r--r--r-- 1 root root 4096 May 14 16:06 time_in_state --r--r--r-- 1 root root 4096 May 14 16:06 total_trans --r--r--r-- 1 root root 4096 May 14 16:06 trans_table --------------------------------------------------------------------------------- - -- reset +:: + + <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l + total 0 + drwxr-xr-x 2 root root 0 May 14 16:06 . + drwxr-xr-x 3 root root 0 May 14 15:58 .. + --w------- 1 root root 4096 May 14 16:06 reset + -r--r--r-- 1 root root 4096 May 14 16:06 time_in_state + -r--r--r-- 1 root root 4096 May 14 16:06 total_trans + -r--r--r-- 1 root root 4096 May 14 16:06 trans_table + +- **reset** + Write-only attribute that can be used to reset the stat counters. This can be useful for evaluating system behaviour under different governors without the need for a reboot. -- time_in_state +- **time_in_state** + This gives the amount of time spent in each of the frequencies supported by this CPU. The cat output will have "<frequency> <time>" pair in each line, which will mean this CPU spent <time> usertime units of time at <frequency>. Output -will have one line for each of the supported frequencies. usertime units here +will have one line for each of the supported frequencies. usertime units here is 10mS (similar to other time exported in /proc). --------------------------------------------------------------------------------- -<mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat time_in_state -3600000 2089 -3400000 136 -3200000 34 -3000000 67 -2800000 172488 --------------------------------------------------------------------------------- +:: + <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat time_in_state + 3600000 2089 + 3400000 136 + 3200000 34 + 3000000 67 + 2800000 172488 -- total_trans -This gives the total number of frequency transitions on this CPU. The cat + +- **total_trans** + +This gives the total number of frequency transitions on this CPU. The cat output will have a single count which is the total number of frequency transitions. --------------------------------------------------------------------------------- -<mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat total_trans -20 --------------------------------------------------------------------------------- +:: + + <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat total_trans + 20 + +- **trans_table** -- trans_table This will give a fine grained information about all the CPU frequency transitions. The cat output here is a two dimensional matrix, where an entry -<i,j> (row i, column j) represents the count of number of transitions from +<i,j> (row i, column j) represents the count of number of transitions from Freq_i to Freq_j. Freq_i rows and Freq_j columns follow the sorting order in which the driver has provided the frequency table initially to the cpufreq core and so can be sorted (ascending or descending) or unsorted. The output here @@ -95,26 +103,27 @@ readability. If the transition table is bigger than PAGE_SIZE, reading this will return an -EFBIG error. --------------------------------------------------------------------------------- -<mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat trans_table - From : To - : 3600000 3400000 3200000 3000000 2800000 - 3600000: 0 5 0 0 0 - 3400000: 4 0 2 0 0 - 3200000: 0 1 0 2 0 - 3000000: 0 0 1 0 3 - 2800000: 0 0 0 2 0 --------------------------------------------------------------------------------- +:: + <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat trans_table + From : To + : 3600000 3400000 3200000 3000000 2800000 + 3600000: 0 5 0 0 0 + 3400000: 4 0 2 0 0 + 3200000: 0 1 0 2 0 + 3000000: 0 0 1 0 3 + 2800000: 0 0 0 2 0 3. Configuring cpufreq-stats +============================ + +To configure cpufreq-stats in your kernel:: -To configure cpufreq-stats in your kernel -Config Main Menu - Power management options (ACPI, APM) ---> - CPU Frequency scaling ---> - [*] CPU Frequency scaling - [*] CPU frequency translation statistics + Config Main Menu + Power management options (ACPI, APM) ---> + CPU Frequency scaling ---> + [*] CPU Frequency scaling + [*] CPU frequency translation statistics "CPU Frequency scaling" (CONFIG_CPU_FREQ) should be enabled to configure diff --git a/Documentation/cpu-freq/index.rst b/Documentation/cpu-freq/index.rst new file mode 100644 index 000000000000..aba7831ab1cb --- /dev/null +++ b/Documentation/cpu-freq/index.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================================================== +Linux CPUFreq - CPU frequency and voltage scaling code in the Linux(TM) kernel +============================================================================== + +Author: Dominik Brodowski <linux@brodo.de> + + Clock scaling allows you to change the clock speed of the CPUs on the + fly. This is a nice method to save battery power, because the lower + the clock speed, the less power the CPU consumes. + + +.. toctree:: + :maxdepth: 1 + + core + cpu-drivers + cpufreq-stats + +Mailing List +------------ +There is a CPU frequency changing CVS commit and general list where +you can report bugs, problems or submit patches. To post a message, +send an email to linux-pm@vger.kernel.org. + +Links +----- +the FTP archives: +* ftp://ftp.linux.org.uk/pub/linux/cpufreq/ + +how to access the CVS repository: +* http://cvs.arm.linux.org.uk/ + +the CPUFreq Mailing list: +* http://vger.kernel.org/vger-lists.html#linux-pm + +Clock and voltage scaling for the SA-1100: +* http://www.lartmaker.nl/projects/scaling diff --git a/Documentation/cpu-freq/index.txt b/Documentation/cpu-freq/index.txt deleted file mode 100644 index c15e75386a05..000000000000 --- a/Documentation/cpu-freq/index.txt +++ /dev/null @@ -1,56 +0,0 @@ - CPU frequency and voltage scaling code in the Linux(TM) kernel - - - L i n u x C P U F r e q - - - - - Dominik Brodowski <linux@brodo.de> - - - - Clock scaling allows you to change the clock speed of the CPUs on the - fly. This is a nice method to save battery power, because the lower - the clock speed, the less power the CPU consumes. - - - -Documents in this directory: ----------------------------- - -amd-powernow.txt - AMD powernow driver specific file. - -core.txt - General description of the CPUFreq core and - of CPUFreq notifiers. - -cpu-drivers.txt - How to implement a new cpufreq processor driver. - -cpufreq-nforce2.txt - nVidia nForce2 platform specific file. - -cpufreq-stats.txt - General description of sysfs cpufreq stats. - -index.txt - File index, Mailing list and Links (this document) - -pcc-cpufreq.txt - PCC cpufreq driver specific file. - - -Mailing List ------------- -There is a CPU frequency changing CVS commit and general list where -you can report bugs, problems or submit patches. To post a message, -send an email to linux-pm@vger.kernel.org. - -Links ------ -the FTP archives: -* ftp://ftp.linux.org.uk/pub/linux/cpufreq/ - -how to access the CVS repository: -* http://cvs.arm.linux.org.uk/ - -the CPUFreq Mailing list: -* http://vger.kernel.org/vger-lists.html#linux-pm - -Clock and voltage scaling for the SA-1100: -* http://www.lartmaker.nl/projects/scaling diff --git a/Documentation/cpu-freq/pcc-cpufreq.txt b/Documentation/cpu-freq/pcc-cpufreq.txt deleted file mode 100644 index 9e3c3b33514c..000000000000 --- a/Documentation/cpu-freq/pcc-cpufreq.txt +++ /dev/null @@ -1,207 +0,0 @@ -/* - * pcc-cpufreq.txt - PCC interface documentation - * - * Copyright (C) 2009 Red Hat, Matthew Garrett <mjg@redhat.com> - * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. - * Nagananda Chumbalkar <nagananda.chumbalkar@hp.com> - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or NON - * INFRINGEMENT. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - */ - - - Processor Clocking Control Driver - --------------------------------- - -Contents: ---------- -1. Introduction -1.1 PCC interface -1.1.1 Get Average Frequency -1.1.2 Set Desired Frequency -1.2 Platforms affected -2. Driver and /sys details -2.1 scaling_available_frequencies -2.2 cpuinfo_transition_latency -2.3 cpuinfo_cur_freq -2.4 related_cpus -3. Caveats - -1. Introduction: ----------------- -Processor Clocking Control (PCC) is an interface between the platform -firmware and OSPM. It is a mechanism for coordinating processor -performance (ie: frequency) between the platform firmware and the OS. - -The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC -interface. - -OS utilizes the PCC interface to inform platform firmware what frequency the -OS wants for a logical processor. The platform firmware attempts to achieve -the requested frequency. If the request for the target frequency could not be -satisfied by platform firmware, then it usually means that power budget -conditions are in place, and "power capping" is taking place. - -1.1 PCC interface: ------------------- -The complete PCC specification is available here: -http://www.acpica.org/download/Processor-Clocking-Control-v1p0.pdf - -PCC relies on a shared memory region that provides a channel for communication -between the OS and platform firmware. PCC also implements a "doorbell" that -is used by the OS to inform the platform firmware that a command has been -sent. - -The ACPI PCCH() method is used to discover the location of the PCC shared -memory region. The shared memory region header contains the "command" and -"status" interface. PCCH() also contains details on how to access the platform -doorbell. - -The following commands are supported by the PCC interface: -* Get Average Frequency -* Set Desired Frequency - -The ACPI PCCP() method is implemented for each logical processor and is -used to discover the offsets for the input and output buffers in the shared -memory region. - -When PCC mode is enabled, the platform will not expose processor performance -or throttle states (_PSS, _TSS and related ACPI objects) to OSPM. Therefore, -the native P-state driver (such as acpi-cpufreq for Intel, powernow-k8 for -AMD) will not load. - -However, OSPM remains in control of policy. The governor (eg: "ondemand") -computes the required performance for each processor based on server workload. -The PCC driver fills in the command interface, and the input buffer and -communicates the request to the platform firmware. The platform firmware is -responsible for delivering the requested performance. - -Each PCC command is "global" in scope and can affect all the logical CPUs in -the system. Therefore, PCC is capable of performing "group" updates. With PCC -the OS is capable of getting/setting the frequency of all the logical CPUs in -the system with a single call to the BIOS. - -1.1.1 Get Average Frequency: ----------------------------- -This command is used by the OSPM to query the running frequency of the -processor since the last time this command was completed. The output buffer -indicates the average unhalted frequency of the logical processor expressed as -a percentage of the nominal (ie: maximum) CPU frequency. The output buffer -also signifies if the CPU frequency is limited by a power budget condition. - -1.1.2 Set Desired Frequency: ----------------------------- -This command is used by the OSPM to communicate to the platform firmware the -desired frequency for a logical processor. The output buffer is currently -ignored by OSPM. The next invocation of "Get Average Frequency" will inform -OSPM if the desired frequency was achieved or not. - -1.2 Platforms affected: ------------------------ -The PCC driver will load on any system where the platform firmware: -* supports the PCC interface, and the associated PCCH() and PCCP() methods -* assumes responsibility for managing the hardware clocking controls in order -to deliver the requested processor performance - -Currently, certain HP ProLiant platforms implement the PCC interface. On those -platforms PCC is the "default" choice. - -However, it is possible to disable this interface via a BIOS setting. In -such an instance, as is also the case on platforms where the PCC interface -is not implemented, the PCC driver will fail to load silently. - -2. Driver and /sys details: ---------------------------- -When the driver loads, it merely prints the lowest and the highest CPU -frequencies supported by the platform firmware. - -The PCC driver loads with a message such as: -pcc-cpufreq: (v1.00.00) driver loaded with frequency limits: 1600 MHz, 2933 -MHz - -This means that the OPSM can request the CPU to run at any frequency in -between the limits (1600 MHz, and 2933 MHz) specified in the message. - -Internally, there is no need for the driver to convert the "target" frequency -to a corresponding P-state. - -The VERSION number for the driver will be of the format v.xy.ab. -eg: 1.00.02 - ----- -- - | | - | -- this will increase with bug fixes/enhancements to the driver - |-- this is the version of the PCC specification the driver adheres to - - -The following is a brief discussion on some of the fields exported via the -/sys filesystem and how their values are affected by the PCC driver: - -2.1 scaling_available_frequencies: ----------------------------------- -scaling_available_frequencies is not created in /sys. No intermediate -frequencies need to be listed because the BIOS will try to achieve any -frequency, within limits, requested by the governor. A frequency does not have -to be strictly associated with a P-state. - -2.2 cpuinfo_transition_latency: -------------------------------- -The cpuinfo_transition_latency field is 0. The PCC specification does -not include a field to expose this value currently. - -2.3 cpuinfo_cur_freq: ---------------------- -A) Often cpuinfo_cur_freq will show a value different than what is declared -in the scaling_available_frequencies or scaling_cur_freq, or scaling_max_freq. -This is due to "turbo boost" available on recent Intel processors. If certain -conditions are met the BIOS can achieve a slightly higher speed than requested -by OSPM. An example: - -scaling_cur_freq : 2933000 -cpuinfo_cur_freq : 3196000 - -B) There is a round-off error associated with the cpuinfo_cur_freq value. -Since the driver obtains the current frequency as a "percentage" (%) of the -nominal frequency from the BIOS, sometimes, the values displayed by -scaling_cur_freq and cpuinfo_cur_freq may not match. An example: - -scaling_cur_freq : 1600000 -cpuinfo_cur_freq : 1583000 - -In this example, the nominal frequency is 2933 MHz. The driver obtains the -current frequency, cpuinfo_cur_freq, as 54% of the nominal frequency: - - 54% of 2933 MHz = 1583 MHz - -Nominal frequency is the maximum frequency of the processor, and it usually -corresponds to the frequency of the P0 P-state. - -2.4 related_cpus: ------------------ -The related_cpus field is identical to affected_cpus. - -affected_cpus : 4 -related_cpus : 4 - -Currently, the PCC driver does not evaluate _PSD. The platforms that support -PCC do not implement SW_ALL. So OSPM doesn't need to perform any coordination -to ensure that the same frequency is requested of all dependent CPUs. - -3. Caveats: ------------ -The "cpufreq_stats" module in its present form cannot be loaded and -expected to work with the PCC driver. Since the "cpufreq_stats" module -provides information wrt each P-state, it is not applicable to the PCC driver. diff --git a/Documentation/debugging-modules.txt b/Documentation/debugging-modules.txt deleted file mode 100644 index 172ad4aec493..000000000000 --- a/Documentation/debugging-modules.txt +++ /dev/null @@ -1,22 +0,0 @@ -Debugging Modules after 2.6.3 ------------------------------ - -In almost all distributions, the kernel asks for modules which don't -exist, such as "net-pf-10" or whatever. Changing "modprobe -q" to -"succeed" in this case is hacky and breaks some setups, and also we -want to know if it failed for the fallback code for old aliases in -fs/char_dev.c, for example. - -In the past a debugging message which would fill people's logs was -emitted. This debugging message has been removed. The correct way -of debugging module problems is something like this: - -echo '#! /bin/sh' > /tmp/modprobe -echo 'echo "$@" >> /tmp/modprobe.log' >> /tmp/modprobe -echo 'exec /sbin/modprobe "$@"' >> /tmp/modprobe -chmod a+x /tmp/modprobe -echo /tmp/modprobe > /proc/sys/kernel/modprobe - -Note that the above applies only when the *kernel* is requesting -that the module be loaded -- it won't have any effect if that module -is being loaded explicitly using "modprobe" from userspace. diff --git a/Documentation/dev-tools/gcov.rst b/Documentation/dev-tools/gcov.rst index 46aae52a41d0..7bd013596217 100644 --- a/Documentation/dev-tools/gcov.rst +++ b/Documentation/dev-tools/gcov.rst @@ -203,7 +203,7 @@ Cause may not correctly copy files from sysfs. Solution - Use ``cat``' to read ``.gcda`` files and ``cp -d`` to copy links. + Use ``cat`` to read ``.gcda`` files and ``cp -d`` to copy links. Alternatively use the mechanism shown in Appendix B. diff --git a/Documentation/dev-tools/kmemleak.rst b/Documentation/dev-tools/kmemleak.rst index 3a289e8a1d12..fce262883984 100644 --- a/Documentation/dev-tools/kmemleak.rst +++ b/Documentation/dev-tools/kmemleak.rst @@ -8,7 +8,8 @@ with the difference that the orphan objects are not freed but only reported via /sys/kernel/debug/kmemleak. A similar method is used by the Valgrind tool (``memcheck --leak-check``) to detect the memory leaks in user-space applications. -Kmemleak is supported on x86, arm, powerpc, sparc, sh, microblaze, ppc, mips, s390 and tile. +Kmemleak is supported on x86, arm, arm64, powerpc, sparc, sh, microblaze, mips, +s390, nds32, arc and xtensa. Usage ----- diff --git a/Documentation/dev-tools/kunit/index.rst b/Documentation/dev-tools/kunit/index.rst index d16a4d2c3a41..e93606ecfb01 100644 --- a/Documentation/dev-tools/kunit/index.rst +++ b/Documentation/dev-tools/kunit/index.rst @@ -17,14 +17,23 @@ What is KUnit? ============== KUnit is a lightweight unit testing and mocking framework for the Linux kernel. -These tests are able to be run locally on a developer's workstation without a VM -or special hardware. KUnit is heavily inspired by JUnit, Python's unittest.mock, and Googletest/Googlemock for C++. KUnit provides facilities for defining unit test cases, grouping related test cases into test suites, providing common infrastructure for running tests, and much more. +KUnit consists of a kernel component, which provides a set of macros for easily +writing unit tests. Tests written against KUnit will run on kernel boot if +built-in, or when loaded if built as a module. These tests write out results to +the kernel log in `TAP <https://testanything.org/>`_ format. + +To make running these tests (and reading the results) easier, KUnit offers +:doc:`kunit_tool <kunit-tool>`, which builds a `User Mode Linux +<http://user-mode-linux.sourceforge.net>`_ kernel, runs it, and parses the test +results. This provides a quick way of running KUnit tests during development, +without requiring a virtual machine or separate hardware. + Get started now: :doc:`start` Why KUnit? @@ -36,21 +45,20 @@ allow all possible code paths to be tested in the code under test; this is only possible if the code under test is very small and does not have any external dependencies outside of the test's control like hardware. -Outside of KUnit, there are no testing frameworks currently -available for the kernel that do not require installing the kernel on a test -machine or in a VM and all require tests to be written in userspace running on -the kernel; this is true for Autotest, and kselftest, disqualifying -any of them from being considered unit testing frameworks. +KUnit provides a common framework for unit tests within the kernel. + +KUnit tests can be run on most architectures, and most tests are architecture +independent. All built-in KUnit tests run on kernel startup. Alternatively, +KUnit and KUnit tests can be built as modules and tests will run when the test +module is loaded. -KUnit addresses the problem of being able to run tests without needing a virtual -machine or actual hardware with User Mode Linux. User Mode Linux is a Linux -architecture, like ARM or x86; however, unlike other architectures it compiles -to a standalone program that can be run like any other program directly inside -of a host operating system; to be clear, it does not require any virtualization -support; it is just a regular program. +.. note:: -Alternatively, kunit and kunit tests can be built as modules and tests will -run when the test module is loaded. + KUnit can also run tests without needing a virtual machine or actual + hardware under User Mode Linux. User Mode Linux is a Linux architecture, + like ARM or x86, which compiles the kernel as a Linux executable. KUnit + can be used with UML either by building with ``ARCH=um`` (like any other + architecture), or by using :doc:`kunit_tool <kunit-tool>`. KUnit is fast. Excluding build time, from invocation to completion KUnit can run several dozen tests in only 10 to 20 seconds; this might not sound like a big @@ -81,3 +89,5 @@ How do I use it? * :doc:`start` - for new users of KUnit * :doc:`usage` - for a more detailed explanation of KUnit features * :doc:`api/index` - for the list of KUnit APIs used for testing +* :doc:`kunit-tool` - for more information on the kunit_tool helper script +* :doc:`faq` - for answers to some common questions about KUnit diff --git a/Documentation/dev-tools/kunit/kunit-tool.rst b/Documentation/dev-tools/kunit/kunit-tool.rst index 50d46394e97e..949af2da81e5 100644 --- a/Documentation/dev-tools/kunit/kunit-tool.rst +++ b/Documentation/dev-tools/kunit/kunit-tool.rst @@ -12,6 +12,13 @@ the Linux kernel as UML (`User Mode Linux <http://user-mode-linux.sourceforge.net/>`_), running KUnit tests, parsing the test results and displaying them in a user friendly manner. +kunit_tool addresses the problem of being able to run tests without needing a +virtual machine or actual hardware with User Mode Linux. User Mode Linux is a +Linux architecture, like ARM or x86; however, unlike other architectures it +compiles the kernel as a standalone Linux executable that can be run like any +other program directly inside of a host operating system. To be clear, it does +not require any virtualization support: it is just a regular program. + What is a kunitconfig? ====================== diff --git a/Documentation/dev-tools/kunit/start.rst b/Documentation/dev-tools/kunit/start.rst index 4e1d24db6b13..e1c5ce80ce12 100644 --- a/Documentation/dev-tools/kunit/start.rst +++ b/Documentation/dev-tools/kunit/start.rst @@ -9,11 +9,10 @@ Installing dependencies KUnit has the same dependencies as the Linux kernel. As long as you can build the kernel, you can run KUnit. -KUnit Wrapper -============= -Included with KUnit is a simple Python wrapper that helps format the output to -easily use and read KUnit output. It handles building and running the kernel, as -well as formatting the output. +Running tests with the KUnit Wrapper +==================================== +Included with KUnit is a simple Python wrapper which runs tests under User Mode +Linux, and formats the test results. The wrapper can be run with: @@ -21,22 +20,42 @@ The wrapper can be run with: ./tools/testing/kunit/kunit.py run --defconfig -For more information on this wrapper (also called kunit_tool) checkout the +For more information on this wrapper (also called kunit_tool) check out the :doc:`kunit-tool` page. Creating a .kunitconfig -======================= -The Python script is a thin wrapper around Kbuild. As such, it needs to be -configured with a ``.kunitconfig`` file. This file essentially contains the -regular Kernel config, with the specific test targets as well. - +----------------------- +If you want to run a specific set of tests (rather than those listed in the +KUnit defconfig), you can provide Kconfig options in the ``.kunitconfig`` file. +This file essentially contains the regular Kernel config, with the specific +test targets as well. The ``.kunitconfig`` should also contain any other config +options required by the tests. + +A good starting point for a ``.kunitconfig`` is the KUnit defconfig: .. code-block:: bash cd $PATH_TO_LINUX_REPO cp arch/um/configs/kunit_defconfig .kunitconfig -Verifying KUnit Works ---------------------- +You can then add any other Kconfig options you wish, e.g.: +.. code-block:: none + + CONFIG_LIST_KUNIT_TEST=y + +:doc:`kunit_tool <kunit-tool>` will ensure that all config options set in +``.kunitconfig`` are set in the kernel ``.config`` before running the tests. +It'll warn you if you haven't included the dependencies of the options you're +using. + +.. note:: + Note that removing something from the ``.kunitconfig`` will not trigger a + rebuild of the ``.config`` file: the configuration is only updated if the + ``.kunitconfig`` is not a subset of ``.config``. This means that you can use + other tools (such as make menuconfig) to adjust other config options. + + +Running the tests +----------------- To make sure that everything is set up correctly, simply invoke the Python wrapper from your kernel repo: @@ -62,6 +81,41 @@ followed by a list of tests that are run. All of them should be passing. Because it is building a lot of sources for the first time, the ``Building KUnit kernel`` step may take a while. +Running tests without the KUnit Wrapper +======================================= + +If you'd rather not use the KUnit Wrapper (if, for example, you need to +integrate with other systems, or use an architecture other than UML), KUnit can +be included in any kernel, and the results read out and parsed manually. + +.. note:: + KUnit is not designed for use in a production system, and it's possible that + tests may reduce the stability or security of the system. + + + +Configuring the kernel +---------------------- + +In order to enable KUnit itself, you simply need to enable the ``CONFIG_KUNIT`` +Kconfig option (it's under Kernel Hacking/Kernel Testing and Coverage in +menuconfig). From there, you can enable any KUnit tests you want: they usually +have config options ending in ``_KUNIT_TEST``. + +KUnit and KUnit tests can be compiled as modules: in this case the tests in a +module will be run when the module is loaded. + +Running the tests +----------------- + +Build and run your kernel as usual. Test output will be written to the kernel +log in `TAP <https://testanything.org/>`_ format. + +.. note:: + It's possible that there will be other lines and/or data interspersed in the + TAP output. + + Writing your first test ======================= diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst index 607758a66a99..473a2361ec37 100644 --- a/Documentation/dev-tools/kunit/usage.rst +++ b/Documentation/dev-tools/kunit/usage.rst @@ -591,3 +591,17 @@ able to run one test case per invocation. .. TODO(brendanhiggins@google.com): Add an actual example of an architecture dependent KUnit test. + +KUnit debugfs representation +============================ +When kunit test suites are initialized, they create an associated directory +in /sys/kernel/debug/kunit/<test-suite>. The directory contains one file + +- results: "cat results" displays results of each test case and the results + of the entire suite for the last test run. + +The debugfs representation is primarily of use when kunit test suites are +run in a native environment, either as modules or builtin. Having a way +to display results like this is valuable as otherwise results can be +intermixed with other events in dmesg output. The maximum size of each +results file is KUNIT_LOG_SIZE bytes (defined in include/kunit/test.h). diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore index ef82fcfcccab..5c6d8ea1a09c 100644 --- a/Documentation/devicetree/bindings/.gitignore +++ b/Documentation/devicetree/bindings/.gitignore @@ -1,2 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only *.example.dts -processed-schema.yaml +processed-schema*.yaml diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 646cb3525373..1df680d07461 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -2,7 +2,6 @@ DT_DOC_CHECKER ?= dt-doc-validate DT_EXTRACT_EX ?= dt-extract-example DT_MK_SCHEMA ?= dt-mk-schema -DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u) quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \ @@ -11,26 +10,35 @@ quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) $(obj)/%.example.dts: $(src)/%.yaml FORCE $(call if_changed,chk_binding) -DT_TMP_SCHEMA := processed-schema.yaml +# Use full schemas when checking %.example.dts +DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml quiet_cmd_mk_schema = SCHEMA $@ cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(real-prereqs) -DT_DOCS = $(shell \ +DT_DOCS = $(addprefix $(src)/, \ + $(shell \ cd $(srctree)/$(src) && \ find * \( -name '*.yaml' ! \ - -name $(DT_TMP_SCHEMA) ! \ + -name 'processed-schema*' ! \ -name '*.example.dt.yaml' \) \ - ) + )) -DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS)) +DT_SCHEMA_FILES ?= $(DT_DOCS) -ifeq ($(CHECK_DTBS),) -extra-y += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) -extra-y += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) -endif +extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) +extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) +extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml -$(obj)/$(DT_TMP_SCHEMA): $(DT_SCHEMA_FILES) FORCE +override DTC_FLAGS := \ + -Wno-avoid_unnecessary_addr_size \ + -Wno-graph_child_address + +$(obj)/processed-schema-examples.yaml: $(DT_DOCS) FORCE + $(call if_changed,mk_schema) + +$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u +$(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) FORCE $(call if_changed,mk_schema) -extra-y += $(DT_TMP_SCHEMA) +extra-y += processed-schema.yaml diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml index e4131fa42b26..572381306681 100644 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml @@ -21,6 +21,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | clkmgr@ffd04000 { diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml index 853d7d2b56f5..66213bd95e6e 100644 --- a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -43,6 +43,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | ao-secure@140 { diff --git a/Documentation/devicetree/bindings/arm/arm,integrator.yaml b/Documentation/devicetree/bindings/arm/arm,integrator.yaml new file mode 100644 index 000000000000..192ded470e32 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,integrator.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,integrator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Integrator Boards Device Tree Bindings + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: |+ + These were the first ARM platforms officially supported by ARM Ltd. + They are ARMv4, ARMv5 and ARMv6-capable using different core tiles, + so the system is modular and can host a variety of CPU tiles called + "core tiles" and referred to in the device tree as "core modules". + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: ARM Integrator Application Platform, this board has a PCI + host and several PCI slots, as well as a number of slots for logical + expansion modules, it is referred to as an "ASIC Development + Motherboard" and is extended with custom FPGA and is intended for + rapid prototyping. See ARM DUI 0098B. This board can physically come + pre-packaged in a PC Tower form factor called Integrator/PP1 or a + special metal fixture called Integrator/PP2, see ARM DUI 0169A. + items: + - const: arm,integrator-ap + - description: ARM Integrator Compact Platform (HBI-0086), this board has + a compact form factor and mainly consists of the bare minimum + peripherals to make use of the core module. See ARM DUI 0159B. + items: + - const: arm,integrator-cp + - description: ARM Integrator Standard Development Board (SDB) Platform, + this board is a PCI-based board conforming to the Microsoft SDB + (HARP) specification. See ARM DUI 0099A. + items: + - const: arm,integrator-sp + + core-module@10000000: + type: object + description: the root node in the Integrator platforms must contain + a core module child node. They are always at physical address + 0x10000000 in all the Integrator variants. + properties: + compatible: + items: + - const: arm,core-module-integrator + - const: syscon + - const: simple-mfd + reg: + maxItems: 1 + + required: + - compatible + - reg + +patternProperties: + "^syscon@[0-9a-f]+$": + description: All Integrator boards must provide a system controller as a + node in the root of the device tree. + type: object + properties: + compatible: + items: + - enum: + - arm,integrator-ap-syscon + - arm,integrator-cp-syscon + - arm,integrator-sp-syscon + - const: syscon + reg: + maxItems: 1 + + required: + - compatible + - reg + + +required: + - compatible + - core-module@10000000 + +... diff --git a/Documentation/devicetree/bindings/arm/arm,realview.yaml b/Documentation/devicetree/bindings/arm/arm,realview.yaml new file mode 100644 index 000000000000..d6e85d198afe --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,realview.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,realview.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM RealView Boards Device Tree Bindings + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: |+ + The ARM RealView series of reference designs were built to explore the ARM + 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to + the earlier CPUs such as TrustZone and multicore (MPCore). + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: ARM RealView Emulation Baseboard (HBI-0140) was created + as a generic platform to test different FPGA designs, and has + pluggable CPU modules, see ARM DUI 0303E. + items: + - const: arm,realview-eb + - description: ARM RealView Platform Baseboard for ARM1176JZF-S + (HBI-0147) was created as a development board to test ARM TrustZone, + CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F. + items: + - const: arm,realview-pb1176 + - description: ARM RealView Platform Baseboard for ARM 11 MPCore + (HBI-0159, HBI-0175 and HBI-0176) was created to showcase + multiprocessing with ARM11 using MPCore using symmetric + multiprocessing (SMP). See ARM DUI 0351E. + items: + - const: arm,realview-pb11mp + - description: ARM RealView Platform Baseboard for Cortex-A8 (HBI-0178, + HBI-0176 and HBI-0175) was the first reference platform for the + Cortex CPU family, including a Cortex-A8 test chip. + items: + - const: arm,realview-pba8 + - description: ARM RealView Platform Baseboard Explore for Cortex-A9 + (HBI-0182 and HBI-0183) was the reference platform for the Cortex-A9 + CPU. + items: + - const: arm,realview-pbx + + soc: + description: All RealView boards must provide a soc node in the root of the + device tree, representing the System-on-Chip since these test chips are + rather complex. + type: object + properties: + compatible: + oneOf: + - items: + - const: arm,realview-eb-soc + - const: simple-bus + - items: + - const: arm,realview-pb1176-soc + - const: simple-bus + - items: + - const: arm,realview-pb11mp-soc + - const: simple-bus + - items: + - const: arm,realview-pba8-soc + - const: simple-bus + - items: + - const: arm,realview-pbx-soc + - const: simple-bus + + patternProperties: + "^.*syscon@[0-9a-f]+$": + type: object + description: All RealView boards must provide a syscon system controller + node inside the soc node. + properties: + compatible: + oneOf: + - items: + - const: arm,realview-eb11mp-revb-syscon + - const: arm,realview-eb-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-eb11mp-revc-syscon + - const: arm,realview-eb-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-eb-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-pb1176-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-pb11mp-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-pba8-syscon + - const: syscon + - const: simple-mfd + - items: + - const: arm,realview-pbx-syscon + - const: syscon + - const: simple-mfd + + required: + - compatible + - reg + + required: + - compatible + +required: + - compatible + - soc + +... diff --git a/Documentation/devicetree/bindings/arm/arm,versatile.yaml b/Documentation/devicetree/bindings/arm/arm,versatile.yaml new file mode 100644 index 000000000000..06efd2a075c9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,versatile.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,versatile.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Versatile Boards Device Tree Bindings + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: |+ + The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards + with various pluggable interface boards, in essence the Versatile PB version + is a superset of the Versatile AB version. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: The ARM Versatile Application Baseboard (HBI-0118) is an + evaluation board specifically for the ARM926EJ-S. It can be connected + to an IB1 interface board for a touchscreen-type use case or an IB2 + for a candybar phone-type use case. See ARM DUI 0225D. + items: + - const: arm,versatile-ab + - description: The ARM Versatile Platform Baseboard (HBI-0117) is an + extension of the Versatile Application Baseboard that includes a + PCI host controller. Like the sibling board, it is done specifically + for ARM926EJ-S. See ARM DUI 0224B. + items: + - const: arm,versatile-pb + + core-module@10000000: + type: object + description: the root node in the Versatile platforms must contain + a core module child node. They are always at physical address + 0x10000000 in all the Versatile variants. + properties: + compatible: + items: + - const: arm,core-module-versatile + - const: syscon + - const: simple-mfd + reg: + maxItems: 1 + + required: + - compatible + - reg + +patternProperties: + "^syscon@[0-9a-f]+$": + type: object + description: When fitted with the IB2 Interface Board, the Versatile + AB will present an optional system controller node which controls the + extra peripherals on the interface board. + properties: + compatible: + contains: + const: arm,versatile-ib2-syscon + required: + - compatible + - reg + +required: + - compatible + - core-module@10000000 + +... diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml new file mode 100644 index 000000000000..8c06a73f716c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -0,0 +1,223 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Versatile Express and Juno Boards Device Tree Bindings + +maintainers: + - Sudeep Holla <sudeep.holla@arm.com> + - Linus Walleij <linus.walleij@linaro.org> + +description: |+ + ARM's Versatile Express platform were built as reference designs for exploring + multicore Cortex-A class systems. The Versatile Express family contains both + 32 bit (Aarch32) and 64 bit (Aarch64) systems. + + The board consist of a motherboard and one or more daughterboards (tiles). The + motherboard provides a set of peripherals. Processor and RAM "live" on the + tiles. + + The motherboard and each core tile should be described by a separate Device + Tree source file, with the tile's description including the motherboard file + using an include directive. As the motherboard can be initialized in one of + two different configurations ("memory maps"), care must be taken to include + the correct one. + + When a new generation of boards were introduced under the name "Juno", these + shared to many common characteristics with the Versatile Express that the + "arm,vexpress" compatible was retained in the root node, and these are + included in this binding schema as well. + + The root node indicates the CPU SoC on the core tile, and this + is a daughterboard to the main motherboard. The name used in the compatible + string shall match the name given in the core tile's technical reference + manual, followed by "arm,vexpress" as an additional compatible value. If + further subvariants are released of the core tile, even more fine-granular + compatible strings with up to three compatible strings are used. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores + in MPCore configuration in a test chip on the core tile. See ARM + DUI 0448I. This was the first Versatile Express platform. + items: + - const: arm,vexpress,v2p-ca9 + - const: arm,vexpress + - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores + in a test chip on the core tile. It is intended to evaluate NEON, FPU + and Jazelle support in the Cortex A5 family. See ARM DUI 0541C. + items: + - const: arm,vexpress,v2p-ca5s + - const: arm,vexpress + - description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU + cores in a MPCore configuration in a test chip on the core tile. See + ARM DUI 0604F. + items: + - const: arm,vexpress,v2p-ca15 + - const: arm,vexpress + - description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex + A15 CPU cores in a test chip on the core tile. This is the first test + chip called "TC1". + items: + - const: arm,vexpress,v2p-ca15,tc1 + - const: arm,vexpress,v2p-ca15 + - const: arm,vexpress + - description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15 + CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration + in a test chip on the core tile. See ARM DDI 0503I. + items: + - const: arm,vexpress,v2p-ca15_a7 + - const: arm,vexpress + - description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU + cores in a test chip on the core tile. See ARM DDI 0498D. + items: + - const: arm,vexpress,v2f-1xv7,ca53x2 + - const: arm,vexpress,v2f-1xv7 + - const: arm,vexpress + - description: Arm Versatile Express Juno "r0" (the first Juno board, + V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on + AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53 + cores in a big.LITTLE configuration. It also features the MALI T624 + GPU. See ARM document 100113_0000_07_en. + items: + - const: arm,juno + - const: arm,vexpress + - description: Arm Versatile Express Juno r1 Development Platform + (V2M-Juno r1) was introduced mainly aimed at development of PCIe + based systems. Juno r1 also has support for AXI masters placed on + the TLX connectors to join the coherency domain. Otherwise it is the + same configuration as Juno r0. See ARM document 100122_0100_06_en. + items: + - const: arm,juno-r1 + - const: arm,juno + - const: arm,vexpress + - description: Arm Versatile Express Juno r2 Development Platform + (V2M-Juno r2). It has the same feature set as Juno r0 and r1. See + ARM document 100114_0200_04_en. + items: + - const: arm,juno-r2 + - const: arm,juno + - const: arm,vexpress + - description: Arm AEMv8a Versatile Express Real-Time System Model + (VE RTSM) is a programmers view of the Versatile Express with Arm + v8A hardware. See ARM DUI 0575D. + items: + - const: arm,rtsm_ve,aemv8a + - const: arm,vexpress + - description: Arm FVP (Fixed Virtual Platform) base model revision C + See ARM Document 100964_1190_00_en. + items: + - const: arm,fvp-base-revc + - const: arm,vexpress + - description: Arm Foundation model for Aarch64 + items: + - const: arm,foundation-aarch64 + - const: arm,vexpress + + arm,hbi: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: This indicates the ARM HBI (Hardware Board ID), this is + ARM's unique board model ID, visible on the PCB's silkscreen. + + arm,vexpress,site: + description: As Versatile Express can be configured in number of physically + different setups, the device tree should describe platform topology. + For this reason the root node and main motherboard node must define this + property, describing the physical location of the children nodes. + 0 means motherboard site, while 1 and 2 are daughterboard sites, and + 0xf means "sisterboard" which is the site containing the main CPU tile. + allOf: + - $ref: '/schemas/types.yaml#/definitions/uint32' + - minimum: 0 + maximum: 15 + + arm,vexpress,position: + description: When daughterboards are stacked on one site, their position + in the stack be be described this attribute. + allOf: + - $ref: '/schemas/types.yaml#/definitions/uint32' + - minimum: 0 + maximum: 3 + + arm,vexpress,dcc: + description: When describing tiles consisting of more than one DCC, its + number can be specified with this attribute. + allOf: + - $ref: '/schemas/types.yaml#/definitions/uint32' + - minimum: 0 + maximum: 3 + +patternProperties: + "^bus@[0-9a-f]+$": + description: Static Memory Bus (SMB) node, if this exists it describes + the connection between the motherboard and any tiles. Sometimes the + compatible is placed directly under this node, sometimes it is placed + in a subnode named "motherboard". Sometimes the compatible includes + "arm,vexpress,v2?-p1" sometimes (on software models) is is just + "simple-bus". If the compatible is placed in the "motherboard" node, + it is stricter and always has two compatibles. + type: object + allOf: + - $ref: '/schemas/simple-bus.yaml' + + properties: + compatible: + oneOf: + - items: + - enum: + - arm,vexpress,v2m-p1 + - arm,vexpress,v2p-p1 + - const: simple-bus + - const: simple-bus + motherboard: + type: object + description: The motherboard description provides a single "motherboard" + node using 2 address cells corresponding to the Static Memory Bus + used between the motherboard and the tile. The first cell defines the + Chip Select (CS) line number, the second cell address offset within + the CS. All interrupt lines between the motherboard and the tile + are active high and are described using single cell. + properties: + "#address-cells": + const: 2 + "#size-cells": + const: 1 + compatible: + items: + - enum: + - arm,vexpress,v2m-p1 + - arm,vexpress,v2p-p1 + - const: simple-bus + arm,v2m-memory-map: + description: This describes the memory map type. + allOf: + - $ref: '/schemas/types.yaml#/definitions/string' + - enum: + - rs1 + - rs2 + required: + - compatible + required: + - compatible + +allOf: + - if: + properties: + compatible: + contains: + enum: + - arm,vexpress,v2p-ca9 + - arm,vexpress,v2p-ca5s + - arm,vexpress,v2p-ca15 + - arm,vexpress,v2p-ca15_a7 + - arm,vexpress,v2f-1xv7,ca53x2 + then: + required: + - arm,hbi + +... diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards deleted file mode 100644 index 96b1dad58253..000000000000 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ /dev/null @@ -1,237 +0,0 @@ -ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform) ------------------------------------------------------------------------------ -ARM's oldest Linux-supported platform with connectors for different core -tiles of ARMv4, ARMv5 and ARMv6 type. - -Required properties (in root node): - compatible = "arm,integrator-ap"; /* Application Platform */ - compatible = "arm,integrator-cp"; /* Compact Platform */ - -FPGA type interrupt controllers, see the versatile-fpga-irq binding doc. - -Required nodes: - -- core-module: the root node to the Integrator platforms must have - a core-module with regs and the compatible string - "arm,core-module-integrator" -- external-bus-interface: the root node to the Integrator platforms - must have an external bus interface with regs and the - compatible-string "arm,external-bus-interface" - - Required properties for the core module: - - regs: the location and size of the core module registers, one - range of 0x200 bytes. - -- syscon: the root node of the Integrator platforms must have a - system controller node pointing to the control registers, - with the compatible string - "arm,integrator-ap-syscon" - "arm,integrator-cp-syscon" - respectively. - - Required properties for the system controller: - - regs: the location and size of the system controller registers, - one range of 0x100 bytes. - - Required properties for the AP system controller: - - interrupts: the AP syscon node must include the logical module - interrupts, stated in order of module instance <module 0>, - <module 1>, <module 2> ... for the CP system controller this - is not required not of any use. - -/dts-v1/; -/include/ "integrator.dtsi" - -/ { - model = "ARM Integrator/AP"; - compatible = "arm,integrator-ap"; - - core-module@10000000 { - compatible = "arm,core-module-integrator"; - reg = <0x10000000 0x200>; - }; - - ebi@12000000 { - compatible = "arm,external-bus-interface"; - reg = <0x12000000 0x100>; - }; - - syscon { - compatible = "arm,integrator-ap-syscon"; - reg = <0x11000000 0x100>; - interrupt-parent = <&pic>; - /* These are the logic module IRQs */ - interrupts = <9>, <10>, <11>, <12>; - }; -}; - - -ARM Versatile Application and Platform Baseboards -------------------------------------------------- -ARM's development hardware platform with connectors for customizable -core tiles. The hardware configuration of the Versatile boards is -highly customizable. - -Required properties (in root node): - compatible = "arm,versatile-ab"; /* Application baseboard */ - compatible = "arm,versatile-pb"; /* Platform baseboard */ - -Interrupt controllers: -- VIC required properties: - compatible = "arm,versatile-vic"; - interrupt-controller; - #interrupt-cells = <1>; - -- SIC required properties: - compatible = "arm,versatile-sic"; - interrupt-controller; - #interrupt-cells = <1>; - -Required nodes: - -- core-module: the root node to the Versatile platforms must have - a core-module with regs and the compatible strings - "arm,core-module-versatile", "syscon" - -Optional nodes: - -- arm,versatile-ib2-syscon : if the Versatile has an IB2 interface - board mounted, this has a separate system controller that is - defined in this node. - Required properties: - compatible = "arm,versatile-ib2-syscon", "syscon" - -ARM RealView Boards -------------------- -The RealView boards cover tailored evaluation boards that are used to explore -the ARM11 and Cortex A-8 and Cortex A-9 processors. - -Required properties (in root node): - /* RealView Emulation Baseboard */ - compatible = "arm,realview-eb"; - /* RealView Platform Baseboard for ARM1176JZF-S */ - compatible = "arm,realview-pb1176"; - /* RealView Platform Baseboard for ARM11 MPCore */ - compatible = "arm,realview-pb11mp"; - /* RealView Platform Baseboard for Cortex A-8 */ - compatible = "arm,realview-pba8"; - /* RealView Platform Baseboard Explore for Cortex A-9 */ - compatible = "arm,realview-pbx"; - -Required nodes: - -- soc: some node of the RealView platforms must be the SoC - node that contain the SoC-specific devices, with the compatible - string set to one of these tuples: - "arm,realview-eb-soc", "simple-bus" - "arm,realview-pb1176-soc", "simple-bus" - "arm,realview-pb11mp-soc", "simple-bus" - "arm,realview-pba8-soc", "simple-bus" - "arm,realview-pbx-soc", "simple-bus" - -- syscon: some subnode of the RealView SoC node must be a - system controller node pointing to the control registers, - with the compatible string set to one of these: - "arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon" - "arm,realview-eb11mp-revc-syscon", "arm,realview-eb-syscon", "syscon" - "arm,realview-eb-syscon", "syscon" - "arm,realview-pb1176-syscon", "syscon" - "arm,realview-pb11mp-syscon", "syscon" - "arm,realview-pba8-syscon", "syscon" - "arm,realview-pbx-syscon", "syscon" - - Required properties for the system controller: - - regs: the location and size of the system controller registers, - one range of 0x1000 bytes. - -Example: - -/dts-v1/; -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "ARM RealView PB1176 with device tree"; - compatible = "arm,realview-pb1176"; - #address-cells = <1>; - #size-cells = <1>; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "arm,realview-pb1176-soc", "simple-bus"; - ranges; - - syscon: syscon@10000000 { - compatible = "arm,realview-syscon", "syscon"; - reg = <0x10000000 0x1000>; - }; - - }; -}; - -ARM Versatile Express Boards ------------------------------ -For details on the device tree bindings for ARM Versatile Express boards -please consult the vexpress.txt file in the same directory as this file. - -ARM Juno Boards ----------------- -The Juno boards are targeting development for AArch64 systems. The first -iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64, -with the second iteration, Juno r1, mainly aimed at development of PCIe -based systems. Juno r1 also has support for AXI masters placed on the TLX -connectors to join the coherency domain. - -Juno boards are described in a similar way to ARM Versatile Express boards, -with the motherboard part of the hardware being described in a separate file -to highlight the fact that is part of the support infrastructure for the SoC. -Juno device tree bindings also share the Versatile Express bindings as -described under the RS1 memory mapping. - -Required properties (in root node): - compatible = "arm,juno"; /* For Juno r0 board */ - compatible = "arm,juno-r1"; /* For Juno r1 board */ - compatible = "arm,juno-r2"; /* For Juno r2 board */ - -Required nodes: -The description for the board must include: - - a "psci" node describing the boot method used for the secondary CPUs. - A detailed description of the bindings used for "psci" nodes is present - in the psci.yaml file. - - a "cpus" node describing the available cores and their associated - "enable-method"s. For more details see cpus.yaml file. - -Example: - -/dts-v1/; -/ { - model = "ARM Juno development board (r0)"; - compatible = "arm,juno", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - A57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - device_type = "cpu"; - enable-method = "psci"; - }; - - ..... - - A53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x0 0x100>; - device_type = "cpu"; - enable-method = "psci"; - }; - - ..... - }; - -}; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt deleted file mode 100644 index e3f996920403..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt +++ /dev/null @@ -1,36 +0,0 @@ -Broadcom Kona Family CPU Enable Method --------------------------------------- -This binding defines the enable method used for starting secondary -CPUs in the following Broadcom SoCs: - BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664 - -The enable method is specified by defining the following required -properties in the "cpu" device tree node: - - enable-method = "brcm,bcm11351-cpu-method"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register used to request the ROM holding pen -code release a secondary CPU. The value written to the register is -formed by encoding the target CPU id into the low bits of the -physical start address it should jump to. - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "brcm,bcm11351-cpu-method"; - secondary-boot-reg = <0x3500417c>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.txt deleted file mode 100644 index 0ff6560e6094..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.txt +++ /dev/null @@ -1,10 +0,0 @@ -Broadcom BCM11351 device tree bindings -------------------------------------------- - -Boards with the bcm281xx SoC family (which includes bcm11130, bcm11140, -bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties: - -Required root node property: - -compatible = "brcm,bcm11351"; -DEPRECATED: compatible = "bcm,bcm11351"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml new file mode 100644 index 000000000000..b5ef2666e6b2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm11351.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM11351 device tree bindings + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm28155-ap + - const: brcm,bcm11351 + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.txt deleted file mode 100644 index e0774255e1a6..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.txt +++ /dev/null @@ -1,15 +0,0 @@ -Broadcom BCM21664 device tree bindings --------------------------------------- - -This document describes the device tree bindings for boards with the BCM21664 -SoC. - -Required root node property: - - compatible: brcm,bcm21664 - -Example: - / { - model = "BCM21664 SoC"; - compatible = "brcm,bcm21664"; - [...] - } diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml new file mode 100644 index 000000000000..aafbd6a27708 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm21664.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM21664 device tree bindings + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm21664-garnet + - const: brcm,bcm21664 + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt deleted file mode 100644 index a3af54c0e404..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt +++ /dev/null @@ -1,36 +0,0 @@ -Broadcom Kona Family CPU Enable Method --------------------------------------- -This binding defines the enable method used for starting secondary -CPUs in the following Broadcom SoCs: - BCM23550 - -The enable method is specified by defining the following required -properties in the "cpu" device tree node: - - enable-method = "brcm,bcm23550"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register used to request the ROM holding pen -code release a secondary CPU. The value written to the register is -formed by encoding the target CPU id into the low bits of the -physical start address it should jump to. - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "brcm,bcm23550"; - secondary-boot-reg = <0x3500417c>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt deleted file mode 100644 index 080baad923d6..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt +++ /dev/null @@ -1,15 +0,0 @@ -Broadcom BCM23550 device tree bindings --------------------------------------- - -This document describes the device tree bindings for boards with the BCM23550 -SoC. - -Required root node property: - - compatible: brcm,bcm23550 - -Example: - / { - model = "BCM23550 SoC"; - compatible = "brcm,bcm23550"; - [...] - } diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml new file mode 100644 index 000000000000..c4b4efd28a55 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm23550.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM23550 device tree bindings + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm23550-sparrow + - const: brcm,bcm23550 + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt deleted file mode 100644 index 8608a776caa7..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt +++ /dev/null @@ -1,15 +0,0 @@ -Broadcom BCM4708 device tree bindings -------------------------------------------- - -Boards with the BCM4708 SoC shall have the following properties: - -Required root node property: - -bcm4708 -compatible = "brcm,bcm4708"; - -bcm4709 -compatible = "brcm,bcm4709"; - -bcm53012 -compatible = "brcm,bcm53012"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml new file mode 100644 index 000000000000..d48313c7ae45 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4708.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM4708 device tree bindings + +description: + Broadcom BCM4708/47081/4709/47094/53012 Wi-Fi/network SoCs based + on the iProc architecture (Northstar). + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + - Hauke Mehrtens <hauke@hauke-m.de> + - Rafal Milecki <zajec5@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: BCM4708 based boards + items: + - enum: + - asus,rt-ac56u + - asus,rt-ac68u + - buffalo,wzr-1750dhp + - linksys,ea6300-v1 + - linksys,ea6500-v2 + - luxul,xap-1510v1 + - luxul,xwc-1000 + - netgear,r6250v1 + - netgear,r6300v2 + - smartrg,sr400ac + - brcm,bcm94708 + - const: brcm,bcm4708 + + - description: BCM47081 based boards + items: + - enum: + - asus,rt-n18u + - buffalo,wzr-600dhp2 + - buffalo,wzr-900dhp + - luxul,xap-1410v1 + - luxul,xwr-1200v1 + - tplink,archer-c5-v2 + - const: brcm,bcm47081 + - const: brcm,bcm4708 + + - description: BCM4709 based boards + items: + - enum: + - asus,rt-ac87u + - buffalo,wxr-1900dhp + - linksys,ea9200 + - netgear,r7000 + - netgear,r8000 + - tplink,archer-c9-v1 + - brcm,bcm94709 + - const: brcm,bcm4709 + - const: brcm,bcm4708 + + - description: BCM47094 based boards + items: + - enum: + - dlink,dir-885l + - linksys,panamera + - luxul,abr-4500-v1 + - luxul,xap-1610-v1 + - luxul,xbr-4500-v1 + - luxul,xwc-2000-v1 + - luxul,xwr-3100v1 + - luxul,xwr-3150-v1 + - netgear,r8500 + - phicomm,k3 + - const: brcm,bcm47094 + - const: brcm,bcm4708 + + - description: BCM53012 based boards + items: + - enum: + - brcm,bcm953012er + - brcm,bcm953012hr + - brcm,bcm953012k + - const: brcm,brcm53012 + - const: brcm,bcm4708 +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.txt deleted file mode 100644 index 4c77169bb534..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.txt +++ /dev/null @@ -1,31 +0,0 @@ -Broadcom Cygnus device tree bindings ------------------------------------- - - -Boards with Cygnus SoCs shall have the following properties: - -Required root node property: - -BCM11300 -compatible = "brcm,bcm11300", "brcm,cygnus"; - -BCM11320 -compatible = "brcm,bcm11320", "brcm,cygnus"; - -BCM11350 -compatible = "brcm,bcm11350", "brcm,cygnus"; - -BCM11360 -compatible = "brcm,bcm11360", "brcm,cygnus"; - -BCM58300 -compatible = "brcm,bcm58300", "brcm,cygnus"; - -BCM58302 -compatible = "brcm,bcm58302", "brcm,cygnus"; - -BCM58303 -compatible = "brcm,bcm58303", "brcm,cygnus"; - -BCM58305 -compatible = "brcm,bcm58305", "brcm,cygnus"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml new file mode 100644 index 000000000000..fe111e72dac3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Cygnus device tree bindings + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm11300 + - brcm,bcm11320 + - brcm,bcm11350 + - brcm,bcm11360 + - brcm,bcm58300 + - brcm,bcm58302 + - brcm,bcm58303 + - brcm,bcm58305 + - const: brcm,cygnus + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt deleted file mode 100644 index a124c7fc4dcd..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt +++ /dev/null @@ -1,14 +0,0 @@ -Broadcom Hurricane 2 device tree bindings ---------------------------------------- - -Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs -are based on Broadcom's iProc SoC architecture and feature a single core Cortex -A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND -flash and a PCIe attached integrated switching engine. - -Boards with Hurricane SoCs shall have the following properties: - -Required root node property: - -BCM53342 -compatible = "brcm,bcm53342", "brcm,hr2"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml new file mode 100644 index 000000000000..1158f49b0b83 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,hr2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Hurricane 2 device tree bindings + +description: + Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs + are based on Broadcom's iProc SoC architecture and feature a single core Cortex + A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND + flash and a PCIe attached integrated switching engine. + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - ubnt,unifi-switch8 + - const: brcm,bcm53342 + - const: brcm,hr2 + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt deleted file mode 100644 index 35f056f4a1c3..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt +++ /dev/null @@ -1,9 +0,0 @@ -Broadcom North Star 2 (NS2) device tree bindings ------------------------------------------------- - -Boards with NS2 shall have the following properties: - -Required root node property: - -NS2 SVK board -compatible = "brcm,ns2-svk", "brcm,ns2"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml new file mode 100644 index 000000000000..2451704f87f0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,ns2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom North Star 2 (NS2) device tree bindings + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,ns2-svk + - brcm,ns2-xmc + - const: brcm,ns2 + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt deleted file mode 100644 index 677ef9d9f445..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt +++ /dev/null @@ -1,39 +0,0 @@ -Broadcom Northstar Plus SoC CPU Enable Method ---------------------------------------------- -This binding defines the enable method used for starting secondary -CPU in the following Broadcom SoCs: - BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 - -The enable method is specified by defining the following required -properties in the corresponding secondary "cpu" device tree node: - - enable-method = "brcm,bcm-nsp-smp"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register which should hold the common -entry point for a secondary CPU. This entry is cpu node specific -and should be added per cpu. E.g., in case of NSP (BCM58625) which -is a dual core CPU SoC, this entry should be added to cpu1 node. - - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <0xffff042c>; - reg = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt deleted file mode 100644 index eae53e4556be..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt +++ /dev/null @@ -1,34 +0,0 @@ -Broadcom Northstar Plus device tree bindings --------------------------------------------- - -Broadcom Northstar Plus family of SoCs are used for switching control -and management applications as well as residential router/gateway -applications. The SoC features dual core Cortex A9 ARM CPUs, integrating -several peripheral interfaces including multiple Gigabit Ethernet PHYs, -DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash, -SATA and several other IO controllers. - -Boards with Northstar Plus SoCs shall have the following properties: - -Required root node property: - -BCM58522 -compatible = "brcm,bcm58522", "brcm,nsp"; - -BCM58525 -compatible = "brcm,bcm58525", "brcm,nsp"; - -BCM58535 -compatible = "brcm,bcm58535", "brcm,nsp"; - -BCM58622 -compatible = "brcm,bcm58622", "brcm,nsp"; - -BCM58623 -compatible = "brcm,bcm58623", "brcm,nsp"; - -BCM58625 -compatible = "brcm,bcm58625", "brcm,nsp"; - -BCM88312 -compatible = "brcm,bcm88312", "brcm,nsp"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml new file mode 100644 index 000000000000..fe364cebf57f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Northstar Plus device tree bindings + +description: + Broadcom Northstar Plus family of SoCs are used for switching control + and management applications as well as residential router/gateway + applications. The SoC features dual core Cortex A9 ARM CPUs, integrating + several peripheral interfaces including multiple Gigabit Ethernet PHYs, + DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash, + SATA and several other IO controllers. + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm58522 + - brcm,bcm58525 + - brcm,bcm58535 + - brcm,bcm58622 + - brcm,bcm58623 + - brcm,bcm58625 + - brcm,bcm88312 + - const: brcm,nsp + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.txt deleted file mode 100644 index 23a02178dd44..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.txt +++ /dev/null @@ -1,12 +0,0 @@ -Broadcom Stingray device tree bindings ------------------------------------------------- - -Boards with Stingray shall have the following properties: - -Required root node property: - -Stingray Combo SVK board -compatible = "brcm,bcm958742k", "brcm,stingray"; - -Stingray SST100 board -compatible = "brcm,bcm958742t", "brcm,stingray"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml new file mode 100644 index 000000000000..4ad2b2124ab4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,stingray.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Stingray device tree bindings + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,bcm958742k + - brcm,bcm958742t + - brcm,bcm958802a802x + - const: brcm,stingray + +... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt deleted file mode 100644 index 223ed3471c08..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt +++ /dev/null @@ -1,10 +0,0 @@ -Broadcom Vulcan device tree bindings ------------------------------------- - -Boards with Broadcom Vulcan shall have the following root property: - -Broadcom Vulcan Evaluation Board: - compatible = "brcm,vulcan-eval", "brcm,vulcan-soc"; - -Generic Vulcan board: - compatible = "brcm,vulcan-soc"; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml new file mode 100644 index 000000000000..c5b6f31c20b9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml @@ -0,0 +1,22 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Vulcan device tree bindings + +maintainers: + - Robert Richter <rrichter@marvell.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - brcm,vulcan-eval + - cavium,thunderx2-cn9900 + - const: brcm,vulcan-soc + +... diff --git a/Documentation/devicetree/bindings/arm/coresight-cti.yaml b/Documentation/devicetree/bindings/arm/coresight-cti.yaml new file mode 100644 index 000000000000..3db3642bd532 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/coresight-cti.yaml @@ -0,0 +1,336 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright 2019 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/coresight-cti.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Coresight Cross Trigger Interface (CTI) device. + +description: | + The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected + to one or more CoreSight components and/or a CPU, with CTIs interconnected in + a star topology via the Cross Trigger Matrix (CTM), which is not programmable. + The ECT components are not part of the trace generation data path and are thus + not part of the CoreSight graph described in the general CoreSight bindings + file coresight.txt. + + The CTI component properties define the connections between the individual + CTI and the components it is directly connected to, consisting of input and + output hardware trigger signals. CTIs can have a maximum number of input and + output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The + number is defined at design time, the maximum of each defined in the DEVID + register. + + CTIs are interconnected in a star topology via the CTM, using a number of + programmable channels, usually 4, but again implementation defined and + described in the DEVID register. The star topology is not required to be + described in the bindings as the actual connections are software + programmable. + + In general the connections between CTI and components via the trigger signals + are implementation defined, except when the CTI is connected to an ARM v8 + architecture core and optional ETM. + + In this case the ARM v8 architecture defines the required signal connections + between CTI and the CPU core and ETM if present. In the case of a v8 + architecturally connected CTI an additional compatible string is used to + indicate this feature (arm,coresight-cti-v8-arch). + + When CTI trigger connection information is unavailable then a minimal driver + binding can be declared with no explicit trigger signals. This will result + the driver detecting the maximum available triggers and channels from the + DEVID register and make them all available for use as a single default + connection. Any user / client application will require additional information + on the connections between the CTI and other components for correct operation. + This information might be found by enabling the Integration Test registers in + the driver (set CONFIG_CORESIGHT_CTI_INTEGRATION_TEST in Kernel + configuration). These registers may be used to explore the trigger connections + between CTI and other CoreSight components. + + Certain triggers between CoreSight devices and the CTI have specific types + and usages. These can be defined along with the signal indexes with the + constants defined in <dt-bindings/arm/coresight-cti-dt.h> + + For example a CTI connected to a core will usually have a DBGREQ signal. This + is defined in the binding as type PE_EDBGREQ. These types will appear in an + optional array alongside the signal indexes. Omitting types will default all + signals to GEN_IO. + + Note that some hardware trigger signals can be connected to non-CoreSight + components (e.g. UART etc) depending on hardware implementation. + +maintainers: + - Mike Leach <mike.leach@linaro.org> + +allOf: + - $ref: /schemas/arm/primecell.yaml# + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - arm,coresight-cti + required: + - compatible + +properties: + $nodename: + pattern: "^cti(@[0-9a-f]+)$" + compatible: + oneOf: + - items: + - const: arm,coresight-cti + - const: arm,primecell + - items: + - const: arm,coresight-cti-v8-arch + - const: arm,coresight-cti + - const: arm,primecell + + reg: + maxItems: 1 + + cpu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Handle to cpu this device is associated with. This must appear in the + base cti node if compatible string arm,coresight-cti-v8-arch is used, + or may appear in a trig-conns child node when appropriate. + + arm,cti-ctm-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Defines the CTM this CTI is connected to, in large systems with multiple + separate CTI/CTM nets. Typically multi-socket systems where the CTM is + propagated between sockets. + + arm,cs-dev-assoc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + defines a phandle reference to an associated CoreSight trace device. + When the associated trace device is enabled, then the respective CTI + will be enabled. Use in a trig-conns node, or in CTI base node when + compatible string arm,coresight-cti-v8-arch used. If the associated + device has not been registered then the node name will be stored as + the connection name for later resolution. If the associated device is + not a CoreSight device or not registered then the node name will remain + the connection name and automatic enabling will not occur. + + # size cells and address cells required if trig-conns node present. + "#size-cells": + const: 0 + + "#address-cells": + const: 1 + +patternProperties: + '^trig-conns@([0-9]+)$': + type: object + description: + A trigger connections child node which describes the trigger signals + between this CTI and another hardware device. This device may be a CPU, + CoreSight device, any other hardware device or simple external IO lines. + The connection may have both input and output triggers, or only one or the + other. + + properties: + reg: + maxItems: 1 + + arm,trig-in-sigs: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 32 + description: + List of CTI trigger in signal numbers in use by a trig-conns node. + + arm,trig-in-types: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 32 + description: + List of constants representing the types for the CTI trigger in + signals. Types in this array match to the corresponding signal in the + arm,trig-in-sigs array. If the -types array is smaller, or omitted + completely, then the types will default to GEN_IO. + + arm,trig-out-sigs: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 32 + description: + List of CTI trigger out signal numbers in use by a trig-conns node. + + arm,trig-out-types: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 32 + description: + List of constants representing the types for the CTI trigger out + signals. Types in this array match to the corresponding signal + in the arm,trig-out-sigs array. If the "-types" array is smaller, + or omitted completely, then the types will default to GEN_IO. + + arm,trig-filters: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 32 + description: + List of CTI trigger out signals that will be blocked from becoming + active, unless filtering is disabled on the driver. + + arm,trig-conn-name: + allOf: + - $ref: /schemas/types.yaml#/definitions/string + description: + Defines a connection name that will be displayed, if the cpu or + arm,cs-dev-assoc properties are not being used in this connection. + Principle use for CTI that are connected to non-CoreSight devices, or + external IO. + + anyOf: + - required: + - arm,trig-in-sigs + - required: + - arm,trig-out-sigs + oneOf: + - required: + - arm,trig-conn-name + - required: + - cpu + - required: + - arm,cs-dev-assoc + required: + - reg + +required: + - compatible + - reg + - clocks + - clock-names + +if: + properties: + compatible: + contains: + const: arm,coresight-cti-v8-arch + +then: + required: + - cpu + +examples: + # minimum CTI definition. DEVID register used to set number of triggers. + - | + cti@20020000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x20020000 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + }; + # v8 architecturally defined CTI - CPU + ETM connections generated by the + # driver according to the v8 architecture specification. + - | + cti@859000 { + compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", + "arm,primecell"; + reg = <0x859000 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + + cpu = <&CPU1>; + arm,cs-dev-assoc = <&etm1>; + }; + # Implementation defined CTI - CPU + ETM connections explicitly defined.. + # Shows use of type constants from dt-bindings/arm/coresight-cti-dt.h + # #size-cells and #address-cells are required if trig-conns@ nodes present. + - | + #include <dt-bindings/arm/coresight-cti-dt.h> + + cti@858000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x858000 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + + arm,cti-ctm-id = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + trig-conns@0 { + reg = <0>; + arm,trig-in-sigs = <4 5 6 7>; + arm,trig-in-types = <ETM_EXTOUT + ETM_EXTOUT + ETM_EXTOUT + ETM_EXTOUT>; + arm,trig-out-sigs = <4 5 6 7>; + arm,trig-out-types = <ETM_EXTIN + ETM_EXTIN + ETM_EXTIN + ETM_EXTIN>; + arm,cs-dev-assoc = <&etm0>; + }; + + trig-conns@1 { + reg = <1>; + cpu = <&CPU0>; + arm,trig-in-sigs = <0 1>; + arm,trig-in-types = <PE_DBGTRIGGER + PE_PMUIRQ>; + arm,trig-out-sigs=<0 1 2 >; + arm,trig-out-types = <PE_EDBGREQ + PE_DBGRESTART + PE_CTIIRQ>; + + arm,trig-filters = <0>; + }; + }; + # Implementation defined CTI - non CoreSight component connections. + - | + cti@20110000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0 0x20110000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + + #address-cells = <1>; + #size-cells = <0>; + + trig-conns@0 { + reg = <0>; + arm,trig-in-sigs=<0>; + arm,trig-in-types=<GEN_INTREQ>; + arm,trig-out-sigs=<0>; + arm,trig-out-types=<GEN_HALTREQ>; + arm,trig-conn-name = "sys_profiler"; + }; + + trig-conns@1 { + reg = <1>; + arm,trig-out-sigs=<2 3>; + arm,trig-out-types=<GEN_HALTREQ GEN_RESTARTREQ>; + arm,trig-conn-name = "watchdog"; + }; + + trig-conns@2 { + reg = <2>; + arm,trig-in-sigs=<1 6>; + arm,trig-in-types=<GEN_HALTREQ GEN_RESTARTREQ>; + arm,trig-conn-name = "g_counter"; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index d02c42d21f2f..846f6daae71b 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -45,6 +45,10 @@ its hardware characteristcs. - Coresight Address Translation Unit (CATU) "arm,coresight-catu", "arm,primecell"; + - Coresight Cross Trigger Interface (CTI): + "arm,coresight-cti", "arm,primecell"; + See coresight-cti.yaml for full CTI definitions. + * reg: physical base address and length of the register set(s) of the component. @@ -72,6 +76,9 @@ its hardware characteristcs. * reg-names: the only acceptable values are "stm-base" and "stm-stimulus-base", each corresponding to the areas defined in "reg". +* Required properties for Coresight Cross Trigger Interface (CTI) + See coresight-cti.yaml for full CTI definitions. + * Required properties for devices that don't show up on the AMBA bus, such as non-configurable replicators and non-configurable funnels: diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 0d5b61056b10..a01814765ddb 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -123,11 +123,18 @@ properties: - arm,cortex-a12 - arm,cortex-a15 - arm,cortex-a17 + - arm,cortex-a32 + - arm,cortex-a34 + - arm,cortex-a35 - arm,cortex-a53 - arm,cortex-a55 - arm,cortex-a57 + - arm,cortex-a65 - arm,cortex-a72 - arm,cortex-a73 + - arm,cortex-a75 + - arm,cortex-a76 + - arm,cortex-a77 - arm,cortex-m0 - arm,cortex-m0+ - arm,cortex-m1 @@ -136,6 +143,8 @@ properties: - arm,cortex-r4 - arm,cortex-r5 - arm,cortex-r7 + - arm,neoverse-e1 + - arm,neoverse-n1 - brcm,brahma-b15 - brcm,brahma-b53 - brcm,vulcan @@ -155,6 +164,8 @@ properties: - nvidia,tegra194-carmel - qcom,krait - qcom,kryo + - qcom,kryo260 + - qcom,kryo280 - qcom,kryo385 - qcom,kryo485 - qcom,scorpion @@ -201,6 +212,8 @@ properties: - rockchip,rk3066-smp - socionext,milbeaut-m10v-smp - ste,dbx500-smp + - ti,am3352 + - ti,am4372 cpu-release-addr: $ref: '/schemas/types.yaml#/definitions/uint64' @@ -287,6 +300,39 @@ properties: While optional, it is the preferred way to get access to the cpu-core power-domains. + secondary-boot-reg: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + Required for systems that have an "enable-method" property value of + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". + + This includes the following SoCs: | + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 + + The secondary-boot-reg property is a u32 value that specifies the + physical address of the register used to request the ROM holding pen + code release a secondary CPU. The value written to the register is + formed by encoding the target CPU id into the low bits of the + physical start address it should jump to. + +if: + # If the enable-method property contains one of those values + properties: + enable-method: + contains: + enum: + - brcm,bcm11351-cpu-method + - brcm,bcm23550 + - brcm,bcm-nsp-smp + # and if enable-method is present + required: + - enable-method + +then: + required: + - secondary-boot-reg + required: - device_type - reg diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index e07735a8c2c7..623fedf12180 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -164,7 +164,18 @@ Required properties: - compatible: should be: "fsl,imx8qxp-sc-key" followed by "fsl,imx-sc-key"; -- linux,keycodes: See Documentation/devicetree/bindings/input/keys.txt +- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml + +Thermal bindings based on SCU Message Protocol +------------------------------------------------------------ + +Required properties: +- compatible: Should be : + "fsl,imx8qxp-sc-thermal" + followed by "fsl,imx-sc-thermal"; + +- #thermal-sensor-cells: See Documentation/devicetree/bindings/thermal/thermal.txt + for a description. Example (imx8qxp): ------------- @@ -238,6 +249,11 @@ firmware { compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; timeout-sec = <60>; }; + + tsens: thermal-sensor { + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; + #thermal-sensor-cells = <1>; + }; }; }; diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 0e17e1f6fb80..cd3fbe7e3948 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -119,6 +119,10 @@ properties: - fsl,imx6q-sabreauto - fsl,imx6q-sabrelite - fsl,imx6q-sabresd + - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf + - technexion,imx6q-pico-hobbit # TechNexion i.MX6Q Pico-Hobbit + - technexion,imx6q-pico-nymph # TechNexion i.MX6Q Pico-Nymph + - technexion,imx6q-pico-pi # TechNexion i.MX6Q Pico-Pi - technologic,imx6q-ts4900 - technologic,imx6q-ts7970 - toradex,apalis_imx6q # Apalis iMX6 Module @@ -166,6 +170,10 @@ properties: - emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base - fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board - fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board + - technexion,imx6dl-pico-dwarf # TechNexion i.MX6DL Pico-Dwarf + - technexion,imx6dl-pico-hobbit # TechNexion i.MX6DL Pico-Hobbit + - technexion,imx6dl-pico-nymph # TechNexion i.MX6DL Pico-Nymph + - technexion,imx6dl-pico-pi # TechNexion i.MX6DL Pico-Pi - technologic,imx6dl-ts4900 - technologic,imx6dl-ts7970 - toradex,colibri_imx6dl # Colibri iMX6 Module @@ -225,6 +233,9 @@ properties: - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board - kontron,imx6ul-n6310-som # Kontron N6310 SOM - kontron,imx6ul-n6311-som # Kontron N6311 SOM + - technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf + - technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit + - technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi - const: fsl,imx6ul - description: Kontron N6310 S Board @@ -274,6 +285,7 @@ properties: items: - enum: - toradex,colibri-imx7s # Colibri iMX7 Solo Module + - toradex,colibri-imx7s-aster # Colibri iMX7 Solo Module on Aster Carrier Board - toradex,colibri-imx7s-eval-v3 # Colibri iMX7 Solo Module on Colibri Evaluation Board V3 - tq,imx7s-mba7 # i.MX7S TQ MBa7 with TQMa7S SoM - const: fsl,imx7s @@ -284,8 +296,14 @@ properties: - fsl,imx7d-sdb # i.MX7 SabreSD Board - fsl,imx7d-sdb-reva # i.MX7 SabreSD Rev-A Board - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board + - technexion,imx7d-pico-dwarf # TechNexion i.MX7D Pico-Dwarf + - technexion,imx7d-pico-hobbit # TechNexion i.MX7D Pico-Hobbit + - technexion,imx7d-pico-nymph # TechNexion i.MX7D Pico-Nymph + - technexion,imx7d-pico-pi # TechNexion i.MX7D Pico-Pi - toradex,colibri-imx7d # Colibri iMX7 Dual Module + - toradex,colibri-imx7d-aster # Colibri iMX7 Dual Module on Aster Carrier Board - toradex,colibri-imx7d-emmc # Colibri iMX7 Dual 1GB (eMMC) Module + - toradex,colibri-imx7d-emmc-aster # Colibri iMX7 Dual 1GB (eMMC) Module on Aster Carrier Board - toradex,colibri-imx7d-emmc-eval-v3 # Colibri iMX7 Dual 1GB (eMMC) Module on Colibri Evaluation Board V3 - toradex,colibri-imx7d-eval-v3 # Colibri iMX7 Dual Module on Colibri Evaluation Board V3 - tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM @@ -324,6 +342,12 @@ properties: - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board - const: fsl,imx8mn + - description: i.MX8MP based Boards + items: + - enum: + - fsl,imx8mp-evk # i.MX8MP EVK Board + - const: fsl,imx8mp + - description: i.MX8MQ based Boards items: - enum: @@ -395,6 +419,51 @@ properties: - fsl,ls1021a-twr - const: fsl,ls1021a + - description: LS1028A based Boards + items: + - enum: + - fsl,ls1028a-qds + - fsl,ls1028a-rdb + - const: fsl,ls1028a + + - description: Kontron KBox A-230-LS + items: + - const: kontron,kbox-a-230-ls + - const: kontron,sl28-var4 + - const: kontron,sl28 + - const: fsl,ls1028a + - description: + Kontron SMARC-sAL28 board on the SMARC Eval Carrier 2.0 + items: + - enum: + - kontron,sl28-var2-ads2 + - kontron,sl28-var3-ads2 + - kontron,sl28-var4-ads2 + - enum: + - kontron,sl28-var2 + - kontron,sl28-var3 + - kontron,sl28-var4 + - const: kontron,sl28 + - const: fsl,ls1028a + + - description: + Kontron SMARC-sAL28 board (on a generic/undefined carrier) + items: + - enum: + - kontron,sl28-var2 + - kontron,sl28-var3 + - kontron,sl28-var4 + - const: kontron,sl28 + - const: fsl,ls1028a + + - description: + Kontron SMARC-sAL28 board (base). This is used in the base device + tree which is compatible with the overlays provided by the + vendor. + items: + - const: kontron,sl28 + - const: fsl,ls1028a + - description: LS1043A based Boards items: - enum: diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml b/Documentation/devicetree/bindings/arm/l2c2x0.yaml index 913a8cd8b2c0..5d1d50eea26e 100644 --- a/Documentation/devicetree/bindings/arm/l2c2x0.yaml +++ b/Documentation/devicetree/bindings/arm/l2c2x0.yaml @@ -29,27 +29,30 @@ allOf: properties: compatible: - enum: - - arm,pl310-cache - - arm,l220-cache - - arm,l210-cache - # DEPRECATED by "brcm,bcm11351-a2-pl310-cache" - - bcm,bcm11351-a2-pl310-cache - # For Broadcom bcm11351 chipset where an - # offset needs to be added to the address before passing down to the L2 - # cache controller - - brcm,bcm11351-a2-pl310-cache - # Marvell Controller designed to be - # compatible with the ARM one, with system cache mode (meaning - # maintenance operations on L1 are broadcasted to the L2 and L2 - # performs the same operation). - - marvell,aurora-system-cache - # Marvell Controller designed to be - # compatible with the ARM one with outer cache mode. - - marvell,aurora-outer-cache - # Marvell Tauros3 cache controller, compatible - # with arm,pl310-cache controller. - - marvell,tauros3-cache + oneOf: + - enum: + - arm,pl310-cache + - arm,l220-cache + - arm,l210-cache + # DEPRECATED by "brcm,bcm11351-a2-pl310-cache" + - bcm,bcm11351-a2-pl310-cache + # For Broadcom bcm11351 chipset where an + # offset needs to be added to the address before passing down to the L2 + # cache controller + - brcm,bcm11351-a2-pl310-cache + # Marvell Controller designed to be + # compatible with the ARM one, with system cache mode (meaning + # maintenance operations on L1 are broadcasted to the L2 and L2 + # performs the same operation). + - marvell,aurora-system-cache + # Marvell Controller designed to be + # compatible with the ARM one with outer cache mode. + - marvell,aurora-outer-cache + - items: + # Marvell Tauros3 cache controller, compatible + # with arm,pl310-cache controller. + - const: marvell,tauros3-cache + - const: arm,pl310-cache cache-level: const: 2 diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml index 818dfe6de512..3235ec9e9bad 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml @@ -28,8 +28,11 @@ properties: items: - enum: - mrvl,mmp2-brownstone + - olpc,xo-1.75 - const: mrvl,mmp2 - description: MMP3 based boards items: - - const: mrvl,mmp3 + - enum: + - dell,wyse-ariel + - const: marvell,mmp3 ... diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 79902f470e4b..c3a8604dfa80 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -43,6 +43,8 @@ required: - reg-names - interrupts +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 52ae094ce330..97df36d301c9 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -20,27 +20,36 @@ properties: items: - enum: - apm,potenza-pmu - - arm,armv8-pmuv3 - - arm,cortex-a73-pmu - - arm,cortex-a72-pmu - - arm,cortex-a57-pmu - - arm,cortex-a53-pmu - - arm,cortex-a35-pmu - - arm,cortex-a17-pmu - - arm,cortex-a15-pmu - - arm,cortex-a12-pmu - - arm,cortex-a9-pmu - - arm,cortex-a8-pmu - - arm,cortex-a7-pmu - - arm,cortex-a5-pmu - - arm,arm11mpcore-pmu - - arm,arm1176-pmu + - arm,armv8-pmuv3 # Only for s/w models - arm,arm1136-pmu + - arm,arm1176-pmu + - arm,arm11mpcore-pmu + - arm,cortex-a5-pmu + - arm,cortex-a7-pmu + - arm,cortex-a8-pmu + - arm,cortex-a9-pmu + - arm,cortex-a12-pmu + - arm,cortex-a15-pmu + - arm,cortex-a17-pmu + - arm,cortex-a32-pmu + - arm,cortex-a34-pmu + - arm,cortex-a35-pmu + - arm,cortex-a53-pmu + - arm,cortex-a55-pmu + - arm,cortex-a57-pmu + - arm,cortex-a65-pmu + - arm,cortex-a72-pmu + - arm,cortex-a73-pmu + - arm,cortex-a75-pmu + - arm,cortex-a76-pmu + - arm,cortex-a77-pmu + - arm,neoverse-e1-pmu + - arm,neoverse-n1-pmu - brcm,vulcan-pmu - cavium,thunder-pmu + - qcom,krait-pmu - qcom,scorpion-pmu - qcom,scorpion-mp-pmu - - qcom,krait-pmu interrupts: # Don't know how many CPUs, so no constraints to specify diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 5e66934455bb..9247b58c26fc 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -32,6 +32,9 @@ description: |+ http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf properties: + $nodename: + const: psci + compatible: oneOf: - description: @@ -141,6 +144,8 @@ allOf: - cpu_off - cpu_on +additionalProperties: false + examples: - |+ diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 5976c0b16b65..64ddae3bd39f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -28,6 +28,7 @@ description: | apq8074 apq8084 apq8096 + ipq6018 ipq8074 mdm9615 msm8916 @@ -41,6 +42,7 @@ description: | The 'board' element must be one of the following strings: cdp + cp01-c1 dragonboard hk01 idp @@ -150,4 +152,10 @@ properties: - enum: - qcom,sc7180-idp - const: qcom,sc7180 + + - items: + - enum: + - qcom,ipq6018-cp01-c1 + - const: qcom,ipq6018 + ... diff --git a/Documentation/devicetree/bindings/arm/renesas,prr.yaml b/Documentation/devicetree/bindings/arm/renesas,prr.yaml index 7f8d17f33983..dd087643a9f8 100644 --- a/Documentation/devicetree/bindings/arm/renesas,prr.yaml +++ b/Documentation/devicetree/bindings/arm/renesas,prr.yaml @@ -27,6 +27,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | prr: chipid@ff000044 { diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 9436124c5809..611094d9186b 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -208,6 +208,7 @@ properties: - description: R-Car M3-W+ (R8A77961) items: - enum: + - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP8J77961ASKB0SK0SA05A (M3 ES3.0)) - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012SA5A) - const: renesas,r8a77961 diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 874b0eaa2a75..715586dea9bb 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -402,6 +402,11 @@ properties: - const: phytec,rk3288-phycore-som - const: rockchip,rk3288 + - description: Pine64 PinebookPro + items: + - const: pine64,pinebook-pro + - const: rockchip,rk3399 + - description: Pine64 Rock64 items: - const: pine64,rock64 @@ -443,7 +448,7 @@ properties: - description: Rockchip Kylin items: - - const: rockchip,kylin-rk3036 + - const: rockchip,rk3036-kylin - const: rockchip,rk3036 - description: Rockchip PX3 Evaluation board @@ -468,6 +473,11 @@ properties: - const: rockchip,r88 - const: rockchip,rk3368 + - description: Rockchip RK3036 Evaluation board + items: + - const: rockchip,rk3036-evb + - const: rockchip,rk3036 + - description: Rockchip RK3228 Evaluation board items: - const: rockchip,rk3228-evb diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml index afcd70803c12..0425d333b50d 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml @@ -30,6 +30,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | chipid@10000000 { diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml index 73b56fc5bf58..c9651892710e 100644 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml @@ -89,6 +89,8 @@ required: - clock-names - clocks +additionalProperties: false + examples: - | #include <dt-bindings/clock/exynos5250.h> diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-secure-firmware.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-secure-firmware.yaml index 51d23b6f8a94..3d9abad3c749 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-secure-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-secure-firmware.yaml @@ -23,6 +23,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | firmware@203f000 { diff --git a/Documentation/devicetree/bindings/arm/socionext/cache-uniphier.txt b/Documentation/devicetree/bindings/arm/socionext/cache-uniphier.txt deleted file mode 100644 index d27a646f48a9..000000000000 --- a/Documentation/devicetree/bindings/arm/socionext/cache-uniphier.txt +++ /dev/null @@ -1,60 +0,0 @@ -UniPhier outer cache controller - -UniPhier SoCs are integrated with a full-custom outer cache controller system. -All of them have a level 2 cache controller, and some have a level 3 cache -controller as well. - -Required properties: -- compatible: should be "socionext,uniphier-system-cache" -- reg: offsets and lengths of the register sets for the device. It should - contain 3 regions: control register, revision register, operation register, - in this order. -- cache-unified: specifies the cache is a unified cache. -- cache-size: specifies the size in bytes of the cache -- cache-sets: specifies the number of associativity sets of the cache -- cache-line-size: specifies the line size in bytes -- cache-level: specifies the level in the cache hierarchy. The value should - be 2 for L2 cache, 3 for L3 cache, etc. - -Optional properties: -- next-level-cache: phandle to the next level cache if present. The next level - cache should be also compatible with "socionext,uniphier-system-cache". - -The L2 cache must exist to use the L3 cache; the cache hierarchy must be -indicated correctly with "next-level-cache" properties. - -Example 1 (system with L2): - l2: l2-cache@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; - cache-unified; - cache-size = <0x80000>; - cache-sets = <256>; - cache-line-size = <128>; - cache-level = <2>; - }; - -Example 2 (system with L2 and L3): - l2: l2-cache@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, - <0x506c0000 0x400>; - cache-unified; - cache-size = <0x200000>; - cache-sets = <512>; - cache-line-size = <128>; - cache-level = <2>; - next-level-cache = <&l3>; - }; - - l3: l3-cache@500c8000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, - <0x506c8000 0x400>; - cache-unified; - cache-size = <0x400000>; - cache-sets = <512>; - cache-line-size = <256>; - cache-level = <3>; - }; diff --git a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml b/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml new file mode 100644 index 000000000000..2e765bb3e6f6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier outer cache controller + +description: | + UniPhier ARM 32-bit SoCs are integrated with a full-custom outer cache + controller system. All of them have a level 2 cache controller, and some + have a level 3 cache controller as well. + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + const: socionext,uniphier-system-cache + + reg: + description: | + should contain 3 regions: control register, revision register, + operation register, in this order. + minItems: 3 + maxItems: 3 + + interrupts: + description: | + Interrupts can be used to notify the completion of cache operations. + The number of interrupts should match to the number of CPU cores. + The specified interrupts correspond to CPU0, CPU1, ... in this order. + minItems: 1 + maxItems: 4 + + cache-unified: true + + cache-size: true + + cache-sets: true + + cache-line-size: true + + cache-level: + minimum: 2 + maximum: 3 + + next-level-cache: true + +allOf: + - $ref: /schemas/cache-controller.yaml# + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - cache-unified + - cache-size + - cache-sets + - cache-line-size + - cache-level + +examples: + - | + // System with L2. + cache-controller@500c0000 { + compatible = "socionext,uniphier-system-cache"; + reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; + interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; + cache-unified; + cache-size = <0x140000>; + cache-sets = <512>; + cache-line-size = <128>; + cache-level = <2>; + }; + - | + // System with L2 and L3. + // L2 should specify the next level cache by 'next-level-cache'. + l2: cache-controller@500c0000 { + compatible = "socionext,uniphier-system-cache"; + reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; + interrupts = <0 190 4>, <0 191 4>; + cache-unified; + cache-size = <0x200000>; + cache-sets = <512>; + cache-line-size = <128>; + cache-level = <2>; + next-level-cache = <&l3>; + }; + + l3: cache-controller@500c8000 { + compatible = "socionext,uniphier-system-cache"; + reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>; + interrupts = <0 174 4>, <0 175 4>; + cache-unified; + cache-size = <0x200000>; + cache-sets = <512>; + cache-line-size = <256>; + cache-level = <3>; + }; diff --git a/Documentation/devicetree/bindings/arm/socionext/uniphier.txt b/Documentation/devicetree/bindings/arm/socionext/uniphier.txt deleted file mode 100644 index b3ed1033740e..000000000000 --- a/Documentation/devicetree/bindings/arm/socionext/uniphier.txt +++ /dev/null @@ -1,47 +0,0 @@ -Socionext UniPhier SoC family ------------------------------ - -Required properties in the root node: - - compatible: should contain board and SoC compatible strings - -SoC and board compatible strings: - (sorted chronologically) - - - LD4 SoC: "socionext,uniphier-ld4" - - Reference Board: "socionext,uniphier-ld4-ref" - - - Pro4 SoC: "socionext,uniphier-pro4" - - Reference Board: "socionext,uniphier-pro4-ref" - - Ace Board: "socionext,uniphier-pro4-ace" - - Sanji Board: "socionext,uniphier-pro4-sanji" - - - sLD8 SoC: "socionext,uniphier-sld8" - - Reference Board: "socionext,uniphier-sld8-ref" - - - PXs2 SoC: "socionext,uniphier-pxs2" - - Gentil Board: "socionext,uniphier-pxs2-gentil" - - Vodka Board: "socionext,uniphier-pxs2-vodka" - - - LD6b SoC: "socionext,uniphier-ld6b" - - Reference Board: "socionext,uniphier-ld6b-ref" - - - LD11 SoC: "socionext,uniphier-ld11" - - Reference Board: "socionext,uniphier-ld11-ref" - - Global Board: "socionext,uniphier-ld11-global" - - - LD20 SoC: "socionext,uniphier-ld20" - - Reference Board: "socionext,uniphier-ld20-ref" - - Global Board: "socionext,uniphier-ld20-global" - - - PXs3 SoC: "socionext,uniphier-pxs3" - - Reference Board: "socionext,uniphier-pxs3-ref" - -Example: - -/dts-v1/; - -/ { - compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20"; - - ... -}; diff --git a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml new file mode 100644 index 000000000000..65ad6d8a3c99 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/socionext/uniphier.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier platform device tree bindings + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + $nodename: + const: / + compatible: + oneOf: + - description: LD4 SoC boards + items: + - enum: + - socionext,uniphier-ld4-ref + - const: socionext,uniphier-ld4 + - description: Pro4 SoC boards + items: + - enum: + - socionext,uniphier-pro4-ace + - socionext,uniphier-pro4-ref + - socionext,uniphier-pro4-sanji + - const: socionext,uniphier-pro4 + - description: sLD8 SoC boards + items: + - enum: + - socionext,uniphier-sld8-ref + - const: socionext,uniphier-sld8 + - description: PXs2 SoC boards + items: + - enum: + - socionext,uniphier-pxs2-gentil + - socionext,uniphier-pxs2-vodka + - const: socionext,uniphier-pxs2 + - description: LD6b SoC boards + items: + - enum: + - socionext,uniphier-ld6b-ref + - const: socionext,uniphier-ld6b + - description: LD11 SoC boards + items: + - enum: + - socionext,uniphier-ld11-global + - socionext,uniphier-ld11-ref + - const: socionext,uniphier-ld11 + - description: LD20 SoC boards + items: + - enum: + - socionext,uniphier-ld20-global + - socionext,uniphier-ld20-ref + - const: socionext,uniphier-ld20 + - description: PXs3 SoC boards + items: + - enum: + - socionext,uniphier-pxs3-ref + - const: socionext,uniphier-pxs3 diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml index 0dedf94c8578..baff80197d5a 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml @@ -29,6 +29,8 @@ required: - reg - clocks +additionalProperties: false + examples: - | #include <dt-bindings/clock/stm32mp1-clks.h> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 327ce6730823..abf2d97fb7ae 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -394,6 +394,12 @@ properties: - const: linksprite,pcduino3-nano - const: allwinner,sun7i-a20 + - description: Linutronix Testbox v2 + items: + - const: linutronix,testbox-v2 + - const: lamobo,lamobo-r1 + - const: allwinner,sun7i-a20 + - description: HAOYU Electronics Marsboard A10 items: - const: haoyu,a10-marsboard @@ -636,6 +642,21 @@ properties: - const: pine64,pinebook - const: allwinner,sun50i-a64 + - description: Pine64 PinePhone Developer Batch (1.0) + items: + - const: pine64,pinephone-1.0 + - const: allwinner,sun50i-a64 + + - description: Pine64 PinePhone Braveheart (1.1) + items: + - const: pine64,pinephone-1.1 + - const: allwinner,sun50i-a64 + + - description: Pine64 PineTab + items: + - const: pine64,pinetab + - const: allwinner,sun50i-a64 + - description: Pine64 SoPine Baseboard items: - const: pine64,sopine-baseboard @@ -647,6 +668,11 @@ properties: - const: pineriver,mini-xplus - const: allwinner,sun4i-a10 + - description: PocketBook Touch Lux 3 + items: + - const: pocketbook,touch-lux-3 + - const: allwinner,sun5i-a13 + - description: Point of View Protab2-IPS9 items: - const: pov,protab2-ips9 diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml index 9370e64992dd..aa0738b4d534 100644 --- a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml @@ -30,6 +30,7 @@ properties: enum: - allwinner,sun5i-a13-mbus - allwinner,sun8i-h3-mbus + - allwinner,sun50i-a64-mbus reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt deleted file mode 100644 index cb12f33a247f..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt +++ /dev/null @@ -1,300 +0,0 @@ -NVIDIA Tegra Power Management Controller (PMC) - -== Power Management Controller Node == - -The PMC block interacts with an external Power Management Unit. The PMC -mostly controls the entry and exit of the system from different sleep -modes. It provides power-gating controllers for SoC and CPU power-islands. - -Required properties: -- name : Should be pmc -- compatible : Should contain one of the following: - For Tegra20 must contain "nvidia,tegra20-pmc". - For Tegra30 must contain "nvidia,tegra30-pmc". - For Tegra114 must contain "nvidia,tegra114-pmc" - For Tegra124 must contain "nvidia,tegra124-pmc" - For Tegra132 must contain "nvidia,tegra124-pmc" - For Tegra210 must contain "nvidia,tegra210-pmc" -- reg : Offset and length of the register set for the device -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names : Must include the following entries: - "pclk" (The Tegra clock of that name), - "clk32k_in" (The 32KHz clock input to Tegra). - -Optional properties: -- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal. - The PMU is an external Power Management Unit, whose interrupt output - signal is fed into the PMC. This signal is optionally inverted, and then - fed into the ARM GIC. The PMC is not involved in the detection or - handling of this interrupt signal, merely its inversion. -- nvidia,suspend-mode : The suspend mode that the platform should use. - Valid values are 0, 1 and 2: - 0 (LP0): CPU + Core voltage off and DRAM in self-refresh - 1 (LP1): CPU voltage off and DRAM in self-refresh - 2 (LP2): CPU voltage off -- nvidia,core-power-req-active-high : Boolean, core power request active-high -- nvidia,sys-clock-req-active-high : Boolean, system clock request active-high -- nvidia,combined-power-req : Boolean, combined power request for CPU & Core -- nvidia,cpu-pwr-good-en : Boolean, CPU power good signal (from PMIC to PMC) - is enabled. - -Required properties when nvidia,suspend-mode is specified: -- nvidia,cpu-pwr-good-time : CPU power good time in uS. -- nvidia,cpu-pwr-off-time : CPU power off time in uS. -- nvidia,core-pwr-good-time : <Oscillator-stable-time Power-stable-time> - Core power good time in uS. -- nvidia,core-pwr-off-time : Core power off time in uS. - -Required properties when nvidia,suspend-mode=<0>: -- nvidia,lp0-vec : <start length> Starting address and length of LP0 vector - The LP0 vector contains the warm boot code that is executed by AVP when - resuming from the LP0 state. The AVP (Audio-Video Processor) is an ARM7 - processor and always being the first boot processor when chip is power on - or resume from deep sleep mode. When the system is resumed from the deep - sleep mode, the warm boot code will restore some PLLs, clocks and then - bring up CPU0 for resuming the system. - -Hardware-triggered thermal reset: -On Tegra30, Tegra114 and Tegra124, if the 'i2c-thermtrip' subnode exists, -hardware-triggered thermal reset will be enabled. - -Required properties for hardware-triggered thermal reset (inside 'i2c-thermtrip'): -- nvidia,i2c-controller-id : ID of I2C controller to send poweroff command to. Valid values are - described in section 9.2.148 "APBDEV_PMC_SCRATCH53_0" of the - Tegra K1 Technical Reference Manual. -- nvidia,bus-addr : Bus address of the PMU on the I2C bus -- nvidia,reg-addr : I2C register address to write poweroff command to -- nvidia,reg-data : Poweroff command to write to PMU - -Optional properties for hardware-triggered thermal reset (inside 'i2c-thermtrip'): -- nvidia,pinmux-id : Pinmux used by the hardware when issuing poweroff command. - Defaults to 0. Valid values are described in section 12.5.2 - "Pinmux Support" of the Tegra4 Technical Reference Manual. - -Optional nodes: -- powergates : This node contains a hierarchy of power domain nodes, which - should match the powergates on the Tegra SoC. See "Powergate - Nodes" below. - -Example: - -/ SoC dts including file -pmc@7000f400 { - compatible = "nvidia,tegra20-pmc"; - reg = <0x7000e400 0x400>; - clocks = <&tegra_car 110>, <&clk32k_in>; - clock-names = "pclk", "clk32k_in"; - nvidia,invert-interrupt; - nvidia,suspend-mode = <1>; - nvidia,cpu-pwr-good-time = <2000>; - nvidia,cpu-pwr-off-time = <100>; - nvidia,core-pwr-good-time = <3845 3845>; - nvidia,core-pwr-off-time = <458>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - nvidia,lp0-vec = <0xbdffd000 0x2000>; -}; - -/ Tegra board dts file -{ - ... - pmc@7000f400 { - i2c-thermtrip { - nvidia,i2c-controller-id = <4>; - nvidia,bus-addr = <0x40>; - nvidia,reg-addr = <0x36>; - nvidia,reg-data = <0x2>; - }; - }; - ... - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - ... -}; - - -== Powergate Nodes == - -Each of the powergate nodes represents a power-domain on the Tegra SoC -that can be power-gated by the Tegra PMC. The name of the powergate node -should be one of the below. Note that not every powergate is applicable -to all Tegra devices and the following list shows which powergates are -applicable to which devices. Please refer to the Tegra TRM for more -details on the various powergates. - - Name Description Devices Applicable - 3d 3D Graphics Tegra20/114/124/210 - 3d0 3D Graphics 0 Tegra30 - 3d1 3D Graphics 1 Tegra30 - aud Audio Tegra210 - dfd Debug Tegra210 - dis Display A Tegra114/124/210 - disb Display B Tegra114/124/210 - heg 2D Graphics Tegra30/114/124/210 - iram Internal RAM Tegra124/210 - mpe MPEG Encode All - nvdec NVIDIA Video Decode Engine Tegra210 - nvjpg NVIDIA JPEG Engine Tegra210 - pcie PCIE Tegra20/30/124/210 - sata SATA Tegra30/124/210 - sor Display interfaces Tegra124/210 - ve2 Video Encode Engine 2 Tegra210 - venc Video Encode Engine All - vdec Video Decode Engine Tegra20/30/114/124 - vic Video Imaging Compositor Tegra124/210 - xusba USB Partition A Tegra114/124/210 - xusbb USB Partition B Tegra114/124/210 - xusbc USB Partition C Tegra114/124/210 - -Required properties: - - clocks: Must contain an entry for each clock required by the PMC for - controlling a power-gate. See ../clocks/clock-bindings.txt for details. - - resets: Must contain an entry for each reset required by the PMC for - controlling a power-gate. See ../reset/reset.txt for details. - - #power-domain-cells: Must be 0. - -Example: - - pmc: pmc@7000e400 { - compatible = "nvidia,tegra210-pmc"; - reg = <0x0 0x7000e400 0x0 0x400>; - clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; - clock-names = "pclk", "clk32k_in"; - - powergates { - pd_audio: aud { - clocks = <&tegra_car TEGRA210_CLK_APE>, - <&tegra_car TEGRA210_CLK_APB2APE>; - resets = <&tegra_car 198>; - #power-domain-cells = <0>; - }; - }; - }; - - -== Powergate Clients == - -Hardware blocks belonging to a power domain should contain a "power-domains" -property that is a phandle pointing to the corresponding powergate node. - -Example: - - adma: adma@702e2000 { - ... - power-domains = <&pd_audio>; - ... - }; - -== Pad Control == - -On Tegra SoCs a pad is a set of pins which are configured as a group. -The pin grouping is a fixed attribute of the hardware. The PMC can be -used to set pad power state and signaling voltage. A pad can be either -in active or power down mode. The support for power state and signaling -voltage configuration varies depending on the pad in question. 3.3 V and -1.8 V signaling voltages are supported on pins where software -controllable signaling voltage switching is available. - -The pad configuration state nodes are placed under the pmc node and they -are referred to by the pinctrl client properties. For more information -see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. -The pad name should be used as the value of the pins property in pin -configuration nodes. - -The following pads are present on Tegra124 and Tegra132: -audio bb cam comp -csia csb cse dsi -dsib dsic dsid hdmi -hsic hv lvds mipi-bias -nand pex-bias pex-clk1 pex-clk2 -pex-cntrl sdmmc1 sdmmc3 sdmmc4 -sys_ddc uart usb0 usb1 -usb2 usb_bias - -The following pads are present on Tegra210: -audio audio-hv cam csia -csib csic csid csie -csif dbg debug-nonao dmic -dp dsi dsib dsic -dsid emmc emmc2 gpio -hdmi hsic lvds mipi-bias -pex-bias pex-clk1 pex-clk2 pex-cntrl -sdmmc1 sdmmc3 spi spi-hv -uart usb0 usb1 usb2 -usb3 usb-bias - -Required pin configuration properties: - - pins: Must contain name of the pad(s) to be configured. - -Optional pin configuration properties: - - low-power-enable: Configure the pad into power down mode - - low-power-disable: Configure the pad into active mode - - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 - or TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. - The values are defined in - include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. - -Note: The power state can be configured on all of the Tegra124 and - Tegra132 pads. None of the Tegra124 or Tegra132 pads support - signaling voltage switching. - -Note: All of the listed Tegra210 pads except pex-cntrl support power - state configuration. Signaling voltage switching is supported on - following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio, - pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart. - -Pad configuration state example: - pmc: pmc@7000e400 { - compatible = "nvidia,tegra210-pmc"; - reg = <0x0 0x7000e400 0x0 0x400>; - clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; - clock-names = "pclk", "clk32k_in"; - - ... - - sdmmc1_3v3: sdmmc1-3v3 { - pins = "sdmmc1"; - power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; - }; - - sdmmc1_1v8: sdmmc1-1v8 { - pins = "sdmmc1"; - power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; - }; - - hdmi_off: hdmi-off { - pins = "hdmi"; - low-power-enable; - } - - hdmi_on: hdmi-on { - pins = "hdmi"; - low-power-disable; - } - }; - -Pinctrl client example: - sdmmc1: sdhci@700b0000 { - ... - pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; - pinctrl-0 = <&sdmmc1_3v3>; - pinctrl-1 = <&sdmmc1_1v8>; - }; - ... - sor@54540000 { - ... - pinctrl-0 = <&hdmi_off>; - pinctrl-1 = <&hdmi_on>; - pinctrl-names = "hdmi-on", "hdmi-off"; - }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml new file mode 100644 index 000000000000..f17bb353f65e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml @@ -0,0 +1,354 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Tegra Power Management Controller (PMC) + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - Jonathan Hunter <jonathanh@nvidia.com> + +properties: + compatible: + enum: + - nvidia,tegra20-pmc + - nvidia,tegra20-pmc + - nvidia,tegra30-pmc + - nvidia,tegra114-pmc + - nvidia,tegra124-pmc + - nvidia,tegra210-pmc + + reg: + maxItems: 1 + description: + Offset and length of the register set for the device. + + clock-names: + items: + - const: pclk + - const: clk32k_in + description: + Must includes entries pclk and clk32k_in. + pclk is the Tegra clock of that name and clk32k_in is 32KHz clock + input to Tegra. + + clocks: + maxItems: 2 + description: + Must contain an entry for each entry in clock-names. + See ../clocks/clocks-bindings.txt for details. + + '#clock-cells': + const: 1 + description: + Tegra PMC has clk_out_1, clk_out_2, and clk_out_3. + PMC also has blink control which allows 32Khz clock output to + Tegra blink pad. + Consumer of PMC clock should specify the desired clock by having + the clock ID in its "clocks" phandle cell with pmc clock provider. + See include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC + clock IDs. + + '#interrupt-cells': + const: 2 + description: + Specifies number of cells needed to encode an interrupt source. + The value must be 2. + + interrupt-controller: true + + nvidia,invert-interrupt: + $ref: /schemas/types.yaml#/definitions/flag + description: Inverts the PMU interrupt signal. + The PMU is an external Power Management Unit, whose interrupt output + signal is fed into the PMC. This signal is optionally inverted, and + then fed into the ARM GIC. The PMC is not involved in the detection + or handling of this interrupt signal, merely its inversion. + + nvidia,core-power-req-active-high: + $ref: /schemas/types.yaml#/definitions/flag + description: Core power request active-high. + + nvidia,sys-clock-req-active-high: + $ref: /schemas/types.yaml#/definitions/flag + description: System clock request active-high. + + nvidia,combined-power-req: + $ref: /schemas/types.yaml#/definitions/flag + description: combined power request for CPU and Core. + + nvidia,cpu-pwr-good-en: + $ref: /schemas/types.yaml#/definitions/flag + description: + CPU power good signal from external PMIC to PMC is enabled. + + nvidia,suspend-mode: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 2] + description: + The suspend mode that the platform should use. + Mode 0 is for LP0, CPU + Core voltage off and DRAM in self-refresh + Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh + Mode 2 is for LP2, CPU voltage off + + nvidia,cpu-pwr-good-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: CPU power good time in uSec. + + nvidia,cpu-pwr-off-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: CPU power off time in uSec. + + nvidia,core-pwr-good-time: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + <Oscillator-stable-time Power-stable-time> + Core power good time in uSec. + + nvidia,core-pwr-off-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Core power off time in uSec. + + nvidia,lp0-vec: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + <start length> Starting address and length of LP0 vector. + The LP0 vector contains the warm boot code that is executed + by AVP when resuming from the LP0 state. + The AVP (Audio-Video Processor) is an ARM7 processor and + always being the first boot processor when chip is power on + or resume from deep sleep mode. When the system is resumed + from the deep sleep mode, the warm boot code will restore + some PLLs, clocks and then brings up CPU0 for resuming the + system. + + i2c-thermtrip: + type: object + description: + On Tegra30, Tegra114 and Tegra124 if i2c-thermtrip subnode exists, + hardware-triggered thermal reset will be enabled. + + properties: + nvidia,i2c-controller-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + ID of I2C controller to send poweroff command to PMU. + Valid values are described in section 9.2.148 + "APBDEV_PMC_SCRATCH53_0" of the Tegra K1 Technical Reference + Manual. + + nvidia,bus-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Bus address of the PMU on the I2C bus. + + nvidia,reg-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: PMU I2C register address to issue poweroff command. + + nvidia,reg-data: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Poweroff command to write to PMU. + + nvidia,pinmux-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Pinmux used by the hardware when issuing Poweroff command. + Defaults to 0. Valid values are described in section 12.5.2 + "Pinmux Support" of the Tegra4 Technical Reference Manual. + + required: + - nvidia,i2c-controller-id + - nvidia,bus-addr + - nvidia,reg-addr + - nvidia,reg-data + + additionalProperties: false + + powergates: + type: object + description: | + This node contains a hierarchy of power domain nodes, which should + match the powergates on the Tegra SoC. Each powergate node + represents a power-domain on the Tegra SoC that can be power-gated + by the Tegra PMC. + Hardware blocks belonging to a power domain should contain + "power-domains" property that is a phandle pointing to corresponding + powergate node. + The name of the powergate node should be one of the below. Note that + not every powergate is applicable to all Tegra devices and the following + list shows which powergates are applicable to which devices. + Please refer to Tegra TRM for mode details on the powergate nodes to + use for each power-gate block inside Tegra. + Name Description Devices Applicable + 3d 3D Graphics Tegra20/114/124/210 + 3d0 3D Graphics 0 Tegra30 + 3d1 3D Graphics 1 Tegra30 + aud Audio Tegra210 + dfd Debug Tegra210 + dis Display A Tegra114/124/210 + disb Display B Tegra114/124/210 + heg 2D Graphics Tegra30/114/124/210 + iram Internal RAM Tegra124/210 + mpe MPEG Encode All + nvdec NVIDIA Video Decode Engine Tegra210 + nvjpg NVIDIA JPEG Engine Tegra210 + pcie PCIE Tegra20/30/124/210 + sata SATA Tegra30/124/210 + sor Display interfaces Tegra124/210 + ve2 Video Encode Engine 2 Tegra210 + venc Video Encode Engine All + vdec Video Decode Engine Tegra20/30/114/124 + vic Video Imaging Compositor Tegra124/210 + xusba USB Partition A Tegra114/124/210 + xusbb USB Partition B Tegra114/124/210 + xusbc USB Partition C Tegra114/124/210 + + patternProperties: + "^[a-z0-9]+$": + type: object + + patternProperties: + clocks: + minItems: 1 + maxItems: 8 + description: + Must contain an entry for each clock required by the PMC + for controlling a power-gate. + See ../clocks/clock-bindings.txt document for more details. + + resets: + minItems: 1 + maxItems: 8 + description: + Must contain an entry for each reset required by the PMC + for controlling a power-gate. + See ../reset/reset.txt for more details. + + '#power-domain-cells': + const: 0 + description: Must be 0. + + required: + - clocks + - resets + - '#power-domain-cells' + + additionalProperties: false + +patternProperties: + "^[a-f0-9]+-[a-f0-9]+$": + type: object + description: + This is a Pad configuration node. On Tegra SOCs a pad is a set of + pins which are configured as a group. The pin grouping is a fixed + attribute of the hardware. The PMC can be used to set pad power state + and signaling voltage. A pad can be either in active or power down mode. + The support for power state and signaling voltage configuration varies + depending on the pad in question. 3.3V and 1.8V signaling voltages + are supported on pins where software controllable signaling voltage + switching is available. + + The pad configuration state nodes are placed under the pmc node and they + are referred to by the pinctrl client properties. For more information + see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. + The pad name should be used as the value of the pins property in pin + configuration nodes. + + The following pads are present on Tegra124 and Tegra132 + audio, bb, cam, comp, csia, csb, cse, dsi, dsib, dsic, dsid, hdmi, hsic, + hv, lvds, mipi-bias, nand, pex-bias, pex-clk1, pex-clk2, pex-cntrl, + sdmmc1, sdmmc3, sdmmc4, sys_ddc, uart, usb0, usb1, usb2, usb_bias. + + The following pads are present on Tegra210 + audio, audio-hv, cam, csia, csib, csic, csid, csie, csif, dbg, + debug-nonao, dmic, dp, dsi, dsib, dsic, dsid, emmc, emmc2, gpio, hdmi, + hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1, + sdmmc3, spi, spi-hv, uart, usb0, usb1, usb2, usb3, usb-bias. + + properties: + pins: + $ref: /schemas/types.yaml#/definitions/string + description: Must contain name of the pad(s) to be configured. + + low-power-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Configure the pad into power down mode. + + low-power-disable: + $ref: /schemas/types.yaml#/definitions/flag + description: Configure the pad into active mode. + + power-source: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or + TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. + The values are defined in + include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. + Power state can be configured on all Tegra124 and Tegra132 + pads. None of the Tegra124 or Tegra132 pads support signaling + voltage switching. + All of the listed Tegra210 pads except pex-cntrl support power + state configuration. Signaling voltage switching is supported + on below Tegra210 pads. + audio, audio-hv, cam, dbg, dmic, gpio, pex-cntrl, sdmmc1, + sdmmc3, spi, spi-hv, and uart. + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + - clock-names + - clocks + - '#clock-cells' + +dependencies: + "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"] + "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"] + "nvidia,cpu-pwr-off-time": ["nvidia,cpu-pwr-good-time"] + +examples: + - | + + #include <dt-bindings/clock/tegra210-car.h> + #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> + #include <dt-bindings/soc/tegra-pmc.h> + + tegra_pmc: pmc@7000e400 { + compatible = "nvidia,tegra210-pmc"; + reg = <0x0 0x7000e400 0x0 0x400>; + clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; + clock-names = "pclk", "clk32k_in"; + #clock-cells = <1>; + + nvidia,invert-interrupt; + nvidia,suspend-mode = <0>; + nvidia,cpu-pwr-good-time = <0>; + nvidia,cpu-pwr-off-time = <0>; + nvidia,core-pwr-good-time = <4587 3876>; + nvidia,core-pwr-off-time = <39065>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + + powergates { + pd_audio: aud { + clocks = <&tegra_car TEGRA210_CLK_APE>, + <&tegra_car TEGRA210_CLK_APB2APE>; + resets = <&tegra_car 198>; + #power-domain-cells = <0>; + }; + + pd_xusbss: xusba { + clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; + resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; + #power-domain-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/vexpress.txt b/Documentation/devicetree/bindings/arm/vexpress.txt deleted file mode 100644 index 39844cd0bcce..000000000000 --- a/Documentation/devicetree/bindings/arm/vexpress.txt +++ /dev/null @@ -1,229 +0,0 @@ -ARM Versatile Express boards family ------------------------------------ - -ARM's Versatile Express platform consists of a motherboard and one -or more daughterboards (tiles). The motherboard provides a set of -peripherals. Processor and RAM "live" on the tiles. - -The motherboard and each core tile should be described by a separate -Device Tree source file, with the tile's description including -the motherboard file using a /include/ directive. As the motherboard -can be initialized in one of two different configurations ("memory -maps"), care must be taken to include the correct one. - - -Root node ---------- - -Required properties in the root node: -- compatible value: - compatible = "arm,vexpress,<model>", "arm,vexpress"; - where <model> is the full tile model name (as used in the tile's - Technical Reference Manual), eg.: - - for Coretile Express A5x2 (V2P-CA5s): - compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress"; - - for Coretile Express A9x4 (V2P-CA9): - compatible = "arm,vexpress,v2p-ca9", "arm,vexpress"; - If a tile comes in several variants or can be used in more then one - configuration, the compatible value should be: - compatible = "arm,vexpress,<model>,<variant>", \ - "arm,vexpress,<model>", "arm,vexpress"; - eg: - - Coretile Express A15x2 (V2P-CA15) with Tech Chip 1: - compatible = "arm,vexpress,v2p-ca15,tc1", \ - "arm,vexpress,v2p-ca15", "arm,vexpress"; - - LogicTile Express 13MG (V2F-2XV6) running Cortex-A7 (3 cores) SMM: - compatible = "arm,vexpress,v2f-2xv6,ca7x3", \ - "arm,vexpress,v2f-2xv6", "arm,vexpress"; - -Optional properties in the root node: -- tile model name (use name from the tile's Technical Reference - Manual, eg. "V2P-CA5s") - model = "<model>"; -- tile's HBI number (unique ARM's board model ID, visible on the - PCB's silkscreen) in hexadecimal transcription: - arm,hbi = <0xhbi> - eg: - - for Coretile Express A5x2 (V2P-CA5s) HBI-0191: - arm,hbi = <0x191>; - - Coretile Express A9x4 (V2P-CA9) HBI-0225: - arm,hbi = <0x225>; - - -CPU nodes ---------- - -Top-level standard "cpus" node is required. It must contain a node -with device_type = "cpu" property for every available core, eg.: - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - reg = <0>; - }; - }; - - -Configuration infrastructure ----------------------------- - -The platform has an elaborated configuration system, consisting of -microcontrollers residing on the mother- and daughterboards known -as Motherboard/Daughterboard Configuration Controller (MCC and DCC). -The controllers are responsible for the platform initialization -(reset generation, flash programming, FPGA bitfiles loading etc.) -but also control clock generators, voltage regulators, gather -environmental data like temperature, power consumption etc. Even -the video output switch (FPGA) is controlled that way. - -The controllers are not mapped into normal memory address space -and must be accessed through bridges - other devices capable -of generating transactions on the configuration bus. - -The nodes describing configuration controllers must define -the following properties: -- compatible value: - compatible = "arm,vexpress,config-bus"; -- bridge phandle: - arm,vexpress,config-bridge = <phandle>; -and children describing available functions. - - -Platform topology ------------------ - -As Versatile Express can be configured in number of physically -different setups, the device tree should describe platform topology. -Root node and main motherboard node must define the following -property, describing physical location of the children nodes: -- site number: - arm,vexpress,site = <number>; - where 0 means motherboard, 1 or 2 are daugtherboard sites, - 0xf means "master" site (site containing main CPU tile) -- when daughterboards are stacked on one site, their position - in the stack be be described with: - arm,vexpress,position = <number>; -- when describing tiles consisting more than one DCC, its number - can be described with: - arm,vexpress,dcc = <number>; - -Any of the numbers above defaults to zero if not defined in -the node or any of its parent. - - -Motherboard ------------ - -The motherboard description file provides a single "motherboard" node -using 2 address cells corresponding to the Static Memory Bus used -between the motherboard and the tile. The first cell defines the Chip -Select (CS) line number, the second cell address offset within the CS. -All interrupt lines between the motherboard and the tile are active -high and are described using single cell. - -Optional properties of the "motherboard" node: -- motherboard's memory map variant: - arm,v2m-memory-map = "<name>"; - where name is one of: - - "rs1" - for RS1 map (i.a. peripherals on CS3); this map is also - referred to as "ARM Cortex-A Series memory map": - arm,v2m-memory-map = "rs1"; - When this property is missing, the motherboard is using the original - memory map (also known as the "Legacy memory map", primarily used - with the original CoreTile Express A9x4) with peripherals on CS7. - -Motherboard .dtsi files provide a set of labelled peripherals that -can be used to obtain required phandle in the tile's "aliases" node: -- UARTs, note that the numbers correspond to the physical connectors - on the motherboard's back panel: - v2m_serial0, v2m_serial1, v2m_serial2 and v2m_serial3 -- I2C controllers: - v2m_i2c_dvi and v2m_i2c_pcie -- SP804 timers: - v2m_timer01 and v2m_timer23 - -The tile description should define a "smb" node, describing the -Static Memory Bus between the tile and motherboard. It must define -the following properties: -- "simple-bus" compatible value (to ensure creation of the children) - compatible = "simple-bus"; -- mapping of the SMB CS/offset addresses into main address space: - #address-cells = <2>; - #size-cells = <1>; - ranges = <...>; -- interrupts mapping: - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <...>; - - -Example of a VE tile description (simplified) ---------------------------------------------- - -/dts-v1/; - -/ { - model = "V2P-CA5s"; - arm,hbi = <0x225>; - arm,vexpress,site = <0xf>; - compatible = "arm,vexpress-v2p-ca5s", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - reg = <0>; - }; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x2c001000 0x1000>, - <0x2c000100 0x100>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - compatible = "arm,vexpress-osc"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - /* CS0 is visible at 0x08000000 */ - ranges = <0 0 0x08000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - /* Active high IRQ 0 is connected to GIC's SPI0 */ - interrupt-map = <0 0 0 &gic 0 0 4>; - - /include/ "vexpress-v2m-rs1.dtsi" - }; -}; - diff --git a/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml b/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml new file mode 100644 index 000000000000..7b69831060d8 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/ata/renesas,rcar-sata.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas R-Car Serial-ATA Interface + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,sata-r8a7779 # R-Car H1 + - items: + - enum: + - renesas,sata-r8a7790-es1 # R-Car H2 ES1 + - renesas,sata-r8a7790 # R-Car H2 other than ES1 + - renesas,sata-r8a7791 # R-Car M2-W + - renesas,sata-r8a7793 # R-Car M2-N + - const: renesas,rcar-gen2-sata # generic R-Car Gen2 + - items: + - enum: + - renesas,sata-r8a774b1 # RZ/G2N + - renesas,sata-r8a7795 # R-Car H3 + - renesas,sata-r8a77965 # R-Car M3-N + - const: renesas,rcar-gen3-sata # generic R-Car Gen3 or RZ/G2 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r8a7791-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7791-sysc.h> + + sata@ee300000 { + compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; + reg = <0xee300000 0x200000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 815>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 815>; + }; diff --git a/Documentation/devicetree/bindings/ata/sata_rcar.txt b/Documentation/devicetree/bindings/ata/sata_rcar.txt deleted file mode 100644 index a2fbdc91570d..000000000000 --- a/Documentation/devicetree/bindings/ata/sata_rcar.txt +++ /dev/null @@ -1,36 +0,0 @@ -* Renesas R-Car SATA - -Required properties: -- compatible : should contain one or more of the following: - - "renesas,sata-r8a774b1" for RZ/G2N - - "renesas,sata-r8a7779" for R-Car H1 - - "renesas,sata-r8a7790-es1" for R-Car H2 ES1 - - "renesas,sata-r8a7790" for R-Car H2 other than ES1 - - "renesas,sata-r8a7791" for R-Car M2-W - - "renesas,sata-r8a7793" for R-Car M2-N - - "renesas,sata-r8a7795" for R-Car H3 - - "renesas,sata-r8a77965" for R-Car M3-N - - "renesas,rcar-gen2-sata" for a generic R-Car Gen2 - compatible device - - "renesas,rcar-gen3-sata" for a generic R-Car Gen3 or - RZ/G2 compatible device - - "renesas,rcar-sata" is deprecated - - When compatible with the generic version nodes - must list the SoC-specific version corresponding - to the platform first followed by the generic - version. - -- reg : address and length of the SATA registers; -- interrupts : must consist of one interrupt specifier. -- clocks : must contain a reference to the functional clock. - -Example: - -sata0: sata@ee300000 { - compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; - reg = <0 0xee300000 0 0x2000>; - interrupt-parent = <&gic>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp8_clks R8A7791_CLK_SATA0>; -}; diff --git a/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml new file mode 100644 index 000000000000..c4c9119e4a20 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier System Bus + +description: | + The UniPhier System Bus is an external bus that connects on-board devices to + the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and + some control signals. It supports up to 8 banks (chip selects). + + Before any access to the bus, the bus controller must be configured; the bus + controller registers provide the control for the translation from the offset + within each bank to the CPU-viewed address. The needed setup includes the + base address, the size of each bank. Optionally, some timing parameters can + be optimized for faster bus access. + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + const: socionext,uniphier-system-bus + + reg: + maxItems: 1 + + "#address-cells": + description: | + The first cell is the bank number (chip select). + The second cell is the address offset within the bank. + const: 2 + + "#size-cells": + const: 1 + + ranges: + description: | + Provide address translation from the System Bus to the parent bus. + + Note: + The address region(s) that can be assigned for the System Bus is + implementation defined. Some SoCs can use 0x00000000-0x0fffffff and + 0x40000000-0x4fffffff, while other SoCs only 0x40000000-0x4fffffff. + There might be additional limitations depending on SoCs and the boot mode. + The address translation is arbitrary as long as the banks are assigned in + the supported address space with the required alignment and they do not + overlap one another. + + For example, it is possible to map: + bank 0 to 0x42000000-0x43ffffff, bank 5 to 0x46000000-0x46ffffff + It is also possible to map: + bank 0 to 0x48000000-0x49ffffff, bank 5 to 0x44000000-0x44ffffff + There is no reason to stick to a particular translation mapping, but the + "ranges" property should provide a "reasonable" default that is known to + work. The software should initialize the bus controller according to it. + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +examples: + - | + // In this example, + // - the Ethernet device is connected at the offset 0x01f00000 of CS1 and + // mapped to 0x43f00000 of the parent bus. + // - the UART device is connected at the offset 0x00200000 of CS5 and + // mapped to 0x46200000 of the parent bus. + + system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0x00000000 0x42000000 0x02000000>, + <5 0x00000000 0x46000000 0x01000000>; + + ethernet@1,01f00000 { + compatible = "smsc,lan9115"; + reg = <1 0x01f00000 0x1000>; + interrupts = <0 48 4>; + phy-mode = "mii"; + }; + + uart@5,00200000 { + compatible = "ns16550a"; + reg = <5 0x00200000 0x20>; + interrupts = <0 49 4>; + clock-frequency = <12288000>; + }; + }; diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.txt b/Documentation/devicetree/bindings/bus/ti-sysc.txt index 233eb8294204..c984143d08d2 100644 --- a/Documentation/devicetree/bindings/bus/ti-sysc.txt +++ b/Documentation/devicetree/bindings/bus/ti-sysc.txt @@ -38,6 +38,7 @@ Required standard properties: "ti,sysc-dra7-mcasp" "ti,sysc-usb-host-fs" "ti,sysc-dra7-mcan" + "ti,sysc-pruss" - reg shall have register areas implemented for the interconnect target module in question such as revision, sysc and syss diff --git a/Documentation/devicetree/bindings/bus/uniphier-system-bus.txt b/Documentation/devicetree/bindings/bus/uniphier-system-bus.txt deleted file mode 100644 index 68ef80afff16..000000000000 --- a/Documentation/devicetree/bindings/bus/uniphier-system-bus.txt +++ /dev/null @@ -1,66 +0,0 @@ -UniPhier System Bus - -The UniPhier System Bus is an external bus that connects on-board devices to -the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and -some control signals. It supports up to 8 banks (chip selects). - -Before any access to the bus, the bus controller must be configured; the bus -controller registers provide the control for the translation from the offset -within each bank to the CPU-viewed address. The needed setup includes the base -address, the size of each bank. Optionally, some timing parameters can be -optimized for faster bus access. - -Required properties: -- compatible: should be "socionext,uniphier-system-bus". -- reg: offset and length of the register set for the bus controller device. -- #address-cells: should be 2. The first cell is the bank number (chip select). - The second cell is the address offset within the bank. -- #size-cells: should be 1. -- ranges: should provide a proper address translation from the System Bus to - the parent bus. - -Note: -The address region(s) that can be assigned for the System Bus is implementation -defined. Some SoCs can use 0x00000000-0x0fffffff and 0x40000000-0x4fffffff, -while other SoCs can only use 0x40000000-0x4fffffff. There might be additional -limitations depending on SoCs and the boot mode. The address translation is -arbitrary as long as the banks are assigned in the supported address space with -the required alignment and they do not overlap one another. -For example, it is possible to map: - bank 0 to 0x42000000-0x43ffffff, bank 5 to 0x46000000-0x46ffffff -It is also possible to map: - bank 0 to 0x48000000-0x49ffffff, bank 5 to 0x44000000-0x44ffffff -There is no reason to stick to a particular translation mapping, but the -"ranges" property should provide a "reasonable" default that is known to work. -The software should initialize the bus controller according to it. - -Example: - - system-bus { - compatible = "socionext,uniphier-system-bus"; - reg = <0x58c00000 0x400>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <1 0x00000000 0x42000000 0x02000000 - 5 0x00000000 0x46000000 0x01000000>; - - ethernet@1,01f00000 { - compatible = "smsc,lan9115"; - reg = <1 0x01f00000 0x1000>; - interrupts = <0 48 4> - phy-mode = "mii"; - }; - - uart@5,00200000 { - compatible = "ns16550a"; - reg = <5 0x00200000 0x20>; - interrupts = <0 49 4> - clock-frequency = <12288000>; - }; - }; - -In this example, - - the Ethernet device is connected at the offset 0x01f00000 of CS1 and - mapped to 0x43f00000 of the parent bus. - - the UART device is connected at the offset 0x00200000 of CS5 and - mapped to 0x46200000 of the parent bus. diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml new file mode 100644 index 000000000000..6d7396ab8bee --- /dev/null +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Chrome OS EC(Embedded Controller) Type C port driver. + +maintainers: + - Benson Leung <bleung@chromium.org> + - Prashant Malani <pmalani@chromium.org> + +description: + Chrome OS devices have an Embedded Controller(EC) which has access to + Type C port state. This node is intended to allow the host to read and + control the Type C ports. The node for this device should be under a + cros-ec node like google,cros-ec-spi. + +properties: + compatible: + const: google,cros-ec-typec + + connector: + $ref: /schemas/connector/usb-connector.yaml# + +required: + - compatible + +examples: + - |+ + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + cros_ec: ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0>; + + typec { + compatible = "google,cros-ec-typec"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + try-power-role = "source"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml new file mode 100644 index 000000000000..de9a465096db --- /dev/null +++ b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM System Controller ICST Clocks + +maintainers: + - Linus Walleij <linusw@kernel.org> + +description: | + The ICS525 and ICS307 oscillators are produced by Integrated + Devices Technology (IDT). ARM integrated these oscillators deeply into their + reference designs by adding special control registers that manage such + oscillators to their system controllers. + + The various ARM system controllers contain logic to serialize and initialize + an ICST clock request after a write to the 32 bit register at an offset + into the system controller. Furthermore, to even be able to alter one of + these frequencies, the system controller must first be unlocked by + writing a special token to another offset in the system controller. + + Some ARM hardware contain special versions of the serial interface that only + connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to + different values and sometimes also hard-wires the output divider. They + therefore have special compatible strings as per this table (the OD value is + the value on the pins, not the resulting output divider). + + In the core modules and logic tiles, the ICST is a configurable clock fed + from a 24 MHz clock on the motherboard (usually the main crystal) used for + generating e.g. video clocks. It is located on the core module and there is + only one of these. This clock node must be a subnode of the core module. + + Hardware variant RDW OD VDW + + Integrator/AP 22 1 Bit 8 0, rest variable + integratorap-cm + + Integrator/AP 46 3 Bit 8 0, rest variable + integratorap-sys + + Integrator/AP 22 or 1 17 or (33 or 25 MHz) + integratorap-pci 14 1 14 + + Integrator/CP 22 variable Bit 8 0, rest variable + integratorcp-cm-core + + Integrator/CP 22 variable Bit 8 0, rest variable + integratorcp-cm-mem + + The ICST oscillator must be provided inside a system controller node. + +properties: + "#clock-cells": + const: 0 + + compatible: + enum: + - arm,syscon-icst525 + - arm,syscon-icst307 + - arm,syscon-icst525-integratorap-cm + - arm,syscon-icst525-integratorap-sys + - arm,syscon-icst525-integratorap-pci + - arm,syscon-icst525-integratorcp-cm-core + - arm,syscon-icst525-integratorcp-cm-mem + - arm,integrator-cm-auxosc + - arm,versatile-cm-auxosc + - arm,impd-vco1 + - arm,impd-vco2 + + clocks: + description: Parent clock for the ICST VCO + maxItems: 1 + + clock-output-names: + maxItems: 1 + + lock-offset: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Offset to the unlocking register for the oscillator + + vco-offset: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Offset to the VCO register for the oscillator + +required: + - "#clock-cells" + - compatible + - clocks + +examples: + - | + vco1: clock@00 { + compatible = "arm,impd1-vco1"; + #clock-cells = <0>; + lock-offset = <0x08>; + vco-offset = <0x00>; + clocks = <&sysclk>; + clock-output-names = "IM-PD1-VCO1"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/arm-integrator.txt b/Documentation/devicetree/bindings/clock/arm-integrator.txt deleted file mode 100644 index 11f5f95f571b..000000000000 --- a/Documentation/devicetree/bindings/clock/arm-integrator.txt +++ /dev/null @@ -1,34 +0,0 @@ -Clock bindings for ARM Integrator and Versatile Core Module clocks - -Auxiliary Oscillator Clock - -This is a configurable clock fed from a 24 MHz chrystal, -used for generating e.g. video clocks. It is located on the -core module and there is only one of these. - -This clock node *must* be a subnode of the core module, since -it obtains the base address for it's address range from its -parent node. - - -Required properties: -- compatible: must be "arm,integrator-cm-auxosc" or "arm,versatile-cm-auxosc" -- #clock-cells: must be <0> - -Optional properties: -- clocks: parent clock(s) - -Example: - -core-module@10000000 { - xtal24mhz: xtal24mhz@24M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - }; - auxosc: cm_aux_osc@25M { - #clock-cells = <0>; - compatible = "arm,integrator-cm-auxosc"; - clocks = <&xtal24mhz>; - }; -}; diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt deleted file mode 100644 index 4cd81742038f..000000000000 --- a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt +++ /dev/null @@ -1,70 +0,0 @@ -ARM System Controller ICST clocks - -The ICS525 and ICS307 oscillators are produced by Integrated Devices -Technology (IDT). ARM integrated these oscillators deeply into their -reference designs by adding special control registers that manage such -oscillators to their system controllers. - -The various ARM system controllers contain logic to serialize and initialize -an ICST clock request after a write to the 32 bit register at an offset -into the system controller. Furthermore, to even be able to alter one of -these frequencies, the system controller must first be unlocked by -writing a special token to another offset in the system controller. - -Some ARM hardware contain special versions of the serial interface that only -connects the low 8 bits of the VDW (missing one bit), hardwires RDW to -different values and sometimes also hardwire the output divider. They -therefore have special compatible strings as per this table (the OD value is -the value on the pins, not the resulting output divider): - -Hardware variant: RDW OD VDW - -Integrator/AP 22 1 Bit 8 0, rest variable -integratorap-cm - -Integrator/AP 46 3 Bit 8 0, rest variable -integratorap-sys - -Integrator/AP 22 or 1 17 or (33 or 25 MHz) -integratorap-pci 14 1 14 - -Integrator/CP 22 variable Bit 8 0, rest variable -integratorcp-cm-core - -Integrator/CP 22 variable Bit 8 0, rest variable -integratorcp-cm-mem - -The ICST oscillator must be provided inside a system controller node. - -Required properties: -- compatible: must be one of - "arm,syscon-icst525" - "arm,syscon-icst307" - "arm,syscon-icst525-integratorap-cm" - "arm,syscon-icst525-integratorap-sys" - "arm,syscon-icst525-integratorap-pci" - "arm,syscon-icst525-integratorcp-cm-core" - "arm,syscon-icst525-integratorcp-cm-mem" -- lock-offset: the offset address into the system controller where the - unlocking register is located -- vco-offset: the offset address into the system controller where the - ICST control register is located (even 32 bit address) -- #clock-cells: must be <0> -- clocks: parent clock, since the ICST needs a parent clock to derive its - frequency from, this attribute is compulsory. - -Example: - -syscon: syscon@10000000 { - compatible = "syscon"; - reg = <0x10000000 0x1000>; - - oscclk0: osc0@c { - compatible = "arm,syscon-icst307"; - #clock-cells = <0>; - lock-offset = <0x20>; - vco-offset = <0x0c>; - clocks = <&xtal24mhz>; - }; - (...) -}; diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt index b646bbcf7f92..8a55fdcf96ee 100644 --- a/Documentation/devicetree/bindings/clock/clock-bindings.txt +++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt @@ -94,7 +94,7 @@ clock is connected to output 0 of the &ref. /* external oscillator */ osc: oscillator { compatible = "fixed-clock"; - #clock-cells = <1>; + #clock-cells = <0>; clock-frequency = <32678>; clock-output-names = "osc"; }; diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.yaml b/Documentation/devicetree/bindings/clock/fsl,plldig.yaml index c8350030b374..a203d5d498db 100644 --- a/Documentation/devicetree/bindings/clock/fsl,plldig.yaml +++ b/Documentation/devicetree/bindings/clock/fsl,plldig.yaml @@ -21,6 +21,9 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + '#clock-cells': const: 0 @@ -41,6 +44,8 @@ required: - clocks - '#clock-cells' +additionalProperties: false + examples: # Display PIXEL Clock node: - | diff --git a/Documentation/devicetree/bindings/clock/imx8mm-clock.txt b/Documentation/devicetree/bindings/clock/imx8mm-clock.txt deleted file mode 100644 index 8e4ab9e619a1..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mm-clock.txt +++ /dev/null @@ -1,29 +0,0 @@ -* Clock bindings for NXP i.MX8M Mini - -Required properties: -- compatible: Should be "fsl,imx8mm-ccm" -- reg: Address and length of the register set -- #clock-cells: Should be <1> -- clocks: list of clock specifiers, must contain an entry for each required - entry in clock-names -- clock-names: should include the following entries: - - "osc_32k" - - "osc_24m" - - "clk_ext1" - - "clk_ext2" - - "clk_ext3" - - "clk_ext4" - -clk: clock-controller@30380000 { - compatible = "fsl,imx8mm-ccm"; - reg = <0x0 0x30380000 0x0 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; -}; - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mm-clock.h -for the full list of i.MX8M Mini clock IDs. diff --git a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml new file mode 100644 index 000000000000..ec830db1367b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx8mm-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Mini Clock Control Module Binding + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: | + NXP i.MX8M Mini clock control module is an integrated clock controller, which + generates and supplies to all modules. + +properties: + compatible: + const: fsl,imx8mm-ccm + + reg: + maxItems: 1 + + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: osc_32k + - const: osc_24m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mm-clock.h + for the full list of i.MX8M Mini clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +examples: + # Clock Control Module node: + - | + clk: clock-controller@30380000 { + compatible = "fsl,imx8mm-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml index cd0b8a341321..bdaa29616ab1 100644 --- a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml @@ -40,7 +40,7 @@ properties: '#clock-cells': const: 1 - description: | + description: The clock consumer should specify the desired clock by having the clock ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h for the full list of i.MX8M Nano clock IDs. @@ -52,12 +52,14 @@ required: - clock-names - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | clk: clock-controller@30380000 { compatible = "fsl,imx8mn-ccm"; - reg = <0x0 0x30380000 0x0 0x10000>; + reg = <0x30380000 0x10000>; #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; @@ -65,48 +67,4 @@ examples: "clk_ext2", "clk_ext3", "clk_ext4"; }; - # Required external clocks for Clock Control Module node: - - | - osc_32k: clock-osc-32k { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "osc_32k"; - }; - - osc_24m: clock-osc-24m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "osc_24m"; - }; - - clk_ext1: clock-ext1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <133000000>; - clock-output-names = "clk_ext1"; - }; - - clk_ext2: clock-ext2 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <133000000>; - clock-output-names = "clk_ext2"; - }; - - clk_ext3: clock-ext3 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <133000000>; - clock-output-names = "clk_ext3"; - }; - - clk_ext4: clock-ext4 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency= <133000000>; - clock-output-names = "clk_ext4"; - }; - ... diff --git a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml index 89aee63c9019..4351a1dbb4f7 100644 --- a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml @@ -52,6 +52,8 @@ required: - clock-names - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx8mq-clock.txt b/Documentation/devicetree/bindings/clock/imx8mq-clock.txt deleted file mode 100644 index 52de8263e012..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mq-clock.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Clock bindings for NXP i.MX8M Quad - -Required properties: -- compatible: Should be "fsl,imx8mq-ccm" -- reg: Address and length of the register set -- #clock-cells: Should be <1> -- clocks: list of clock specifiers, must contain an entry for each required - entry in clock-names -- clock-names: should include the following entries: - - "ckil" - - "osc_25m" - - "osc_27m" - - "clk_ext1" - - "clk_ext2" - - "clk_ext3" - - "clk_ext4" - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mq-clock.h -for the full list of i.MX8M Quad clock IDs. diff --git a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml new file mode 100644 index 000000000000..05d7d1471e0c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx8mq-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Quad Clock Control Module Binding + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: | + NXP i.MX8M Quad clock control module is an integrated clock controller, which + generates and supplies to all modules. + +properties: + compatible: + const: fsl,imx8mq-ccm + + reg: + maxItems: 1 + + clocks: + items: + - description: 32k osc + - description: 25m osc + - description: 27m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: ckil + - const: osc_25m + - const: osc_27m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mq-clock.h + for the full list of i.MX8M Quad clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +examples: + # Clock Control Module node: + - | + clk: clock-controller@30380000 { + compatible = "fsl,imx8mq-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&ckil>, <&osc_25m>, <&osc_27m>, + <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "ckil", "osc_25m", "osc_27m", + "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/marvell,mmp2-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,mmp2-clock.yaml new file mode 100644 index 000000000000..e2b6ac96bbcb --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,mmp2-clock.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MMP2 and MMP3 Clock Controller + +maintainers: + - Lubomir Rintel <lkundrak@v3.sk> + +description: | + The clock subsystem on MMP2 or MMP3 generates and supplies clock to various + controllers within the SoC. + + Each clock is assigned an identifier and client nodes use this identifier + to specify the clock which they consume. + + All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. + +properties: + compatible: + enum: + - marvell,mmp2-clock # controller compatible with MMP2 SoC + - marvell,mmp3-clock # controller compatible with MMP3 SoC + + reg: + items: + - description: MPMU register region + - description: APMU register region + - description: APBC register region + + reg-names: + items: + - const: mpmu + - const: apmu + - const: apbc + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - reg-names + - '#clock-cells' + - '#reset-cells' + +additionalProperties: false + +examples: + - | + clock-controller@d4050000 { + compatible = "marvell,mmp2-clock"; + reg = <0xd4050000 0x1000>, + <0xd4282800 0x400>, + <0xd4015000 0x1000>; + reg-names = "mpmu", "apmu", "apbc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/marvell,mmp2.txt b/Documentation/devicetree/bindings/clock/marvell,mmp2.txt deleted file mode 100644 index 23b52dc02266..000000000000 --- a/Documentation/devicetree/bindings/clock/marvell,mmp2.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Marvell MMP2 Clock Controller - -The MMP2 clock subsystem generates and supplies clock to various -controllers within the MMP2 SoC. - -Required Properties: - -- compatible: should be one of the following. - - "marvell,mmp2-clock" - controller compatible with MMP2 SoC. - -- reg: physical base address of the clock subsystem and length of memory mapped - region. There are 3 places in SOC has clock control logic: - "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Each clock is assigned an identifier and client nodes use this identifier -to specify the clock which they consume. - -All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. diff --git a/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml b/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml index f0b804a7f096..0e8b07710451 100644 --- a/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml +++ b/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml @@ -35,6 +35,8 @@ required: - clocks - '#clock-cells' +additionalProperties: false + examples: # Clock controller node: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml index 3647007f82ca..eacccc88bbf6 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml @@ -68,6 +68,8 @@ required: - nvmem-cell-names - '#thermal-sensor-cells' +additionalProperties: false + examples: - | clock-controller@900000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 89c6e070e7ac..98572b4a9b60 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -40,6 +40,8 @@ required: - '#clock-cells' - '#reset-cells' +additionalProperties: false + examples: - | clock-controller@1800000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml index 18e4e77b8cfa..5a5b2214f0ca 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml @@ -56,6 +56,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | clock-controller@300000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml index 1d3cae980471..a0bb713929b0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml @@ -66,6 +66,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,rpmcc.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml index 8cdece395eba..ce06f3f8c3e3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml @@ -40,6 +40,8 @@ required: - '#clock-cells' - '#reset-cells' +additionalProperties: false + examples: - | clock-controller@1800000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml index ee4f968e2909..a345320e0e49 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml @@ -58,6 +58,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,rpmh.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml index 888e9a708390..36f3b3668ced 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml @@ -56,6 +56,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,rpmh.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml new file mode 100644 index 000000000000..2c40a8aa9815 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for SM8250 + +maintainers: + - Stephen Boyd <sboyd@kernel.org> + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on SM8250. + + See also: + - dt-bindings/clock/qcom,gcc-sm8250.h + +properties: + compatible: + const: qcom,gcc-sm8250 + + clocks: + items: + - description: Board XO source + - description: Sleep clock source + + clock-names: + items: + - const: bi_tcxo + - const: sleep_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding. + +required: + - compatible + - clocks + - clock-names + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@100000 { + compatible = "qcom,gcc-sm8250"; + reg = <0 0x00100000 0 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>; + clock-names = "bi_tcxo", "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml index d18f8ab9eeee..e533bb0cfd2b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml @@ -74,6 +74,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: # Example for GCC for MSM8960: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index 85518494ce43..f684fe67db84 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -74,6 +74,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + if: properties: compatible: diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml index 7d853c1a85e5..d747bb58f0a7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml @@ -50,6 +50,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-msm8998.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt index 944719bd586f..90a1349bc713 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt @@ -14,7 +14,9 @@ Required properties : "qcom,rpmcc-apq8060", "qcom,rpmcc" "qcom,rpmcc-msm8916", "qcom,rpmcc" "qcom,rpmcc-msm8974", "qcom,rpmcc" + "qcom,rpmcc-msm8976", "qcom,rpmcc" "qcom,rpmcc-apq8064", "qcom,rpmcc" + "qcom,rpmcc-ipq806x", "qcom,rpmcc" "qcom,rpmcc-msm8996", "qcom,rpmcc" "qcom,rpmcc-msm8998", "qcom,rpmcc" "qcom,rpmcc-qcs404", "qcom,rpmcc" diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index 2cd158f13bab..a46a3a799a70 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -20,6 +20,7 @@ properties: - qcom,sc7180-rpmh-clk - qcom,sdm845-rpmh-clk - qcom,sm8150-rpmh-clk + - qcom,sm8250-rpmh-clk clocks: maxItems: 1 @@ -35,6 +36,8 @@ required: - compatible - '#clock-cells' +additionalProperties: false + examples: # Example for GCC for SDM845: The below node should be defined inside # &apps_rsc node. diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml index 0429062f1585..58cdfd5924d3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml @@ -58,6 +58,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-sc7180.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml index 5785192cc4be..8635e35fd3f0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml @@ -52,6 +52,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-sc7180.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml new file mode 100644 index 000000000000..0dd5d25ae7d7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7180-mss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Modem Clock Controller Binding for SC7180 + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm modem clock control module which supports the clocks on SC7180. + + See also: + - dt-bindings/clock/qcom,mss-sc7180.h + +properties: + compatible: + const: qcom,sc7180-mss + + clocks: + items: + - description: gcc_mss_mfab_axi clock from GCC + - description: gcc_mss_nav_axi clock from GCC + - description: gcc_mss_cfg_ahb clock from GCC + + clock-names: + items: + - const: gcc_mss_mfab_axis + - const: gcc_mss_nav_axi + - const: cfg_ahb + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7180.h> + clock-controller@41a8000 { + compatible = "qcom,sc7180-mss"; + reg = <0 0x041a8000 0 0x8000>; + clocks = <&gcc GCC_MSS_MFAB_AXIS_CLK>, + <&gcc GCC_MSS_NAV_AXI_CLK>, + <&gcc GCC_MSS_CFG_AHB_CLK>; + clock-names = "gcc_mss_mfab_axis", + "gcc_mss_nav_axi", + "cfg_ahb"; + #clock-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml index 31df901884ac..0071b9701960 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml @@ -48,6 +48,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,rpmh.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml index 89269ddfbdcd..ad47d747a3e4 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml @@ -67,6 +67,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-sdm845.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml index bac04f1c5d79..7a052ac5dc00 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml @@ -52,6 +52,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-sdm845.h> diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml index 9d216c0f11d4..2a6a81ab0318 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml @@ -48,6 +48,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include <dt-bindings/clock/qcom,rpmh.h> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt deleted file mode 100644 index f4d153f24a0f..000000000000 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +++ /dev/null @@ -1,100 +0,0 @@ -* Renesas Clock Pulse Generator / Module Standby and Software Reset - -On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator) -and MSSR (Module Standby and Software Reset) blocks are intimately connected, -and share the same register block. - -They provide the following functionalities: - - The CPG block generates various core clocks, - - The MSSR block provides two functions: - 1. Module Standby, providing a Clock Domain to control the clock supply - to individual SoC devices, - 2. Reset Control, to perform a software reset of individual SoC devices. - -Required Properties: - - compatible: Must be one of: - - "renesas,r7s9210-cpg-mssr" for the r7s9210 SoC (RZ/A2) - - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M) - - "renesas,r8a7744-cpg-mssr" for the r8a7744 SoC (RZ/G1N) - - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E) - - "renesas,r8a77470-cpg-mssr" for the r8a77470 SoC (RZ/G1C) - - "renesas,r8a774a1-cpg-mssr" for the r8a774a1 SoC (RZ/G2M) - - "renesas,r8a774b1-cpg-mssr" for the r8a774b1 SoC (RZ/G2N) - - "renesas,r8a774c0-cpg-mssr" for the r8a774c0 SoC (RZ/G2E) - - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2) - - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W) - - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H) - - "renesas,r8a7793-cpg-mssr" for the r8a7793 SoC (R-Car M2-N) - - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2) - - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) - - "renesas,r8a7796-cpg-mssr" for the r8a77960 SoC (R-Car M3-W) - - "renesas,r8a77961-cpg-mssr" for the r8a77961 SoC (R-Car M3-W+) - - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N) - - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M) - - "renesas,r8a77980-cpg-mssr" for the r8a77980 SoC (R-Car V3H) - - "renesas,r8a77990-cpg-mssr" for the r8a77990 SoC (R-Car E3) - - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3) - - - reg: Base address and length of the memory resource used by the CPG/MSSR - block - - - clocks: References to external parent clocks, one entry for each entry in - clock-names - - clock-names: List of external parent clock names. Valid names are: - - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1, - r8a774b1, r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793, - r8a7794, r8a7795, r8a77960, r8a77961, r8a77965, r8a77970, - r8a77980, r8a77990, r8a77995) - - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a77960, r8a77961, r8a77965, - r8a77970, r8a77980) - - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791, - r8a7793, r8a7794) - - - #clock-cells: Must be 2 - - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" - and a core clock reference, as defined in - <dt-bindings/clock/*-cpg-mssr.h>. - - For module clocks, the two clock specifier cells must be "CPG_MOD" and - a module number, as defined in the datasheet. - - - #power-domain-cells: Must be 0 - - SoC devices that are part of the CPG/MSSR Clock Domain and can be - power-managed through Module Standby should refer to the CPG device - node in their "power-domains" property, as documented by the generic PM - Domain bindings in - Documentation/devicetree/bindings/power/power-domain.yaml. - - - #reset-cells: Must be 1 - - The single reset specifier cell must be the module number, as defined - in the datasheet. - - -Examples --------- - - - CPG device node: - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7795-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - - - CPG/MSSR Clock Domain member device node: - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a7795", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>; - clock-names = "fck"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>; - dma-names = "tx", "rx"; - power-domains = <&cpg>; - resets = <&cpg 310>; - }; diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml new file mode 100644 index 000000000000..9cd102e5fed5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Clock Pulse Generator / Module Standby and Software Reset + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +description: | + On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator) + and MSSR (Module Standby and Software Reset) blocks are intimately connected, + and share the same register block. + + They provide the following functionalities: + - The CPG block generates various core clocks, + - The MSSR block provides two functions: + 1. Module Standby, providing a Clock Domain to control the clock supply + to individual SoC devices, + 2. Reset Control, to perform a software reset of individual SoC devices. + +properties: + compatible: + enum: + - renesas,r7s9210-cpg-mssr # RZ/A2 + - renesas,r8a7743-cpg-mssr # RZ/G1M + - renesas,r8a7744-cpg-mssr # RZ/G1N + - renesas,r8a7745-cpg-mssr # RZ/G1E + - renesas,r8a77470-cpg-mssr # RZ/G1C + - renesas,r8a774a1-cpg-mssr # RZ/G2M + - renesas,r8a774b1-cpg-mssr # RZ/G2N + - renesas,r8a774c0-cpg-mssr # RZ/G2E + - renesas,r8a7790-cpg-mssr # R-Car H2 + - renesas,r8a7791-cpg-mssr # R-Car M2-W + - renesas,r8a7792-cpg-mssr # R-Car V2H + - renesas,r8a7793-cpg-mssr # R-Car M2-N + - renesas,r8a7794-cpg-mssr # R-Car E2 + - renesas,r8a7795-cpg-mssr # R-Car H3 + - renesas,r8a7796-cpg-mssr # R-Car M3-W + - renesas,r8a77961-cpg-mssr # R-Car M3-W+ + - renesas,r8a77965-cpg-mssr # R-Car M3-N + - renesas,r8a77970-cpg-mssr # R-Car V3M + - renesas,r8a77980-cpg-mssr # R-Car V3H + - renesas,r8a77990-cpg-mssr # R-Car E3 + - renesas,r8a77995-cpg-mssr # R-Car D3 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + items: + enum: + - extal # All + - extalr # Most R-Car Gen3 and RZ/G2 + - usb_extal # Most R-Car Gen2 and RZ/G1 + + '#clock-cells': + description: | + - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" + and a core clock reference, as defined in + <dt-bindings/clock/*-cpg-mssr.h> + - For module clocks, the two clock specifier cells must be "CPG_MOD" and + a module number, as defined in the datasheet. + const: 2 + + '#power-domain-cells': + description: + SoC devices that are part of the CPG/MSSR Clock Domain and can be + power-managed through Module Standby should refer to the CPG device node + in their "power-domains" property, as documented by the generic PM Domain + bindings in Documentation/devicetree/bindings/power/power-domain.yaml. + const: 0 + + '#reset-cells': + description: + The single reset specifier cell must be the module number, as defined in + the datasheet. + const: 1 + +if: + not: + properties: + compatible: + items: + enum: + - renesas,r7s9210-cpg-mssr +then: + required: + - '#reset-cells' + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + cpg: clock-controller@e6150000 { + compatible = "renesas,r8a7795-cpg-mssr"; + reg = <0xe6150000 0x1000>; + clocks = <&extal_clk>, <&extalr_clk>; + clock-names = "extal", "extalr"; + #clock-cells = <2>; + #power-domain-cells = <0>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt index 83f6c6a7c41c..4bf6f53bd95e 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt @@ -38,10 +38,17 @@ Required properties: - reg: offset and length of the USB 2.0 clock selector register block. - clocks: A list of phandles and specifier pairs. - clock-names: Name of the clocks. - - The functional clock must be "ehci_ohci" + - The functional clock of USB 2.0 host side must be "ehci_ohci" + - The functional clock of HS-USB side must be "hs-usb-if" - The USB_EXTAL clock pin must be "usb_extal" - The USB_XTAL clock pin must be "usb_xtal" - #clock-cells: Must be 0 +- power-domains: A phandle and symbolic PM domain specifier. + See power/renesas,rcar-sysc.yaml. +- resets: A list of phandles and specifier pairs. +- reset-names: Name of the resets. + - The reset of USB 2.0 host side must be "ehci_ohci" + - The reset of HS-USB side must be "hs-usb-if" Example (R-Car H3): @@ -49,7 +56,11 @@ Example (R-Car H3): compatible = "renesas,r8a7795-rcar-usb2-clock-sel", "renesas,rcar-gen3-usb2-clock-sel"; reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&usb_extal>, <&usb_xtal>; - clock-names = "ehci_ohci", "usb_extal", "usb_xtal"; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, + <&usb_extal>, <&usb_xtal>; + clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal"; #clock-cells = <0>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 703>, <&cpg 704>; + reset-names = "ehci_ohci", "hs-usb-if"; }; diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml new file mode 100644 index 000000000000..c3930edc410f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier clock controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + oneOf: + - description: System clock + enum: + - socionext,uniphier-ld4-clock + - socionext,uniphier-pro4-clock + - socionext,uniphier-sld8-clock + - socionext,uniphier-pro5-clock + - socionext,uniphier-pxs2-clock + - socionext,uniphier-ld6b-clock + - socionext,uniphier-ld11-clock + - socionext,uniphier-ld20-clock + - socionext,uniphier-pxs3-clock + - description: Media I/O (MIO) clock, SD clock + enum: + - socionext,uniphier-ld4-mio-clock + - socionext,uniphier-pro4-mio-clock + - socionext,uniphier-sld8-mio-clock + - socionext,uniphier-pro5-sd-clock + - socionext,uniphier-pxs2-sd-clock + - socionext,uniphier-ld11-mio-clock + - socionext,uniphier-ld20-sd-clock + - socionext,uniphier-pxs3-sd-clock + - description: Peripheral clock + enum: + - socionext,uniphier-ld4-peri-clock + - socionext,uniphier-pro4-peri-clock + - socionext,uniphier-sld8-peri-clock + - socionext,uniphier-pro5-peri-clock + - socionext,uniphier-pxs2-peri-clock + - socionext,uniphier-ld11-peri-clock + - socionext,uniphier-ld20-peri-clock + - socionext,uniphier-pxs3-peri-clock + + "#clock-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - "#clock-cells" + +examples: + - | + sysctrl@61840000 { + compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + clock { + compatible = "socionext,uniphier-ld11-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + mioctrl@59810000 { + compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; + reg = <0x59810000 0x800>; + + clock { + compatible = "socionext,uniphier-ld11-mio-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + perictrl@59820000 { + compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + clock { + compatible = "socionext,uniphier-ld11-peri-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; diff --git a/Documentation/devicetree/bindings/clock/sprd.txt b/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.txt index e9d179e882d9..aaaf02ca2a6a 100644 --- a/Documentation/devicetree/bindings/clock/sprd.txt +++ b/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.txt @@ -1,4 +1,4 @@ -Spreadtrum Clock Binding +Spreadtrum SC9860 Clock Binding ------------------------ Required properties: diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml new file mode 100644 index 000000000000..bb3a78d8105e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 Unisoc Inc. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: SC9863A Clock Control Unit Device Tree Bindings + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +properties: + "#clock-cells": + const: 1 + + compatible : + enum: + - sprd,sc9863a-ap-clk + - sprd,sc9863a-aon-clk + - sprd,sc9863a-apahb-gate + - sprd,sc9863a-pmu-gate + - sprd,sc9863a-aonapb-gate + - sprd,sc9863a-pll + - sprd,sc9863a-mpll + - sprd,sc9863a-rpll + - sprd,sc9863a-dpll + - sprd,sc9863a-mm-gate + - sprd,sc9863a-apapb-gate + + clocks: + minItems: 1 + maxItems: 4 + description: | + The input parent clock(s) phandle for this clock, only list fixed + clocks which are declared in devicetree. + + clock-names: + minItems: 1 + maxItems: 4 + items: + - const: ext-26m + - const: ext-32k + - const: ext-4m + - const: rco-100m + + reg: + maxItems: 1 + +required: + - compatible + - '#clock-cells' + +if: + properties: + compatible: + enum: + - sprd,sc9863a-ap-clk + - sprd,sc9863a-aon-clk +then: + required: + - reg + +else: + description: | + Other SC9863a clock nodes should be the child of a syscon node in + which compatible string shoule be: + "sprd,sc9863a-glbregs", "syscon", "simple-mfd" + + The 'reg' property for the clock node is also required if there is a sub + range of registers for the clocks. + +examples: + - | + ap_clk: clock-controller@21500000 { + compatible = "sprd,sc9863a-ap-clk"; + reg = <0 0x21500000 0 0x1000>; + clocks = <&ext_26m>, <&ext_32k>; + clock-names = "ext-26m", "ext-32k"; + #clock-cells = <1>; + }; + + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + ap_ahb_regs: syscon@20e00000 { + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; + reg = <0 0x20e00000 0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x20e00000 0x4000>; + + apahb_gate: apahb-gate@0 { + compatible = "sprd,sc9863a-apahb-gate"; + reg = <0x0 0x1020>; + #clock-cells = <1>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml new file mode 100644 index 000000000000..869b18ac88d7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti,am654-ehrpwm-tbclk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI EHRPWM Time Base Clock + +maintainers: + - Vignesh Raghavendra <vigneshr@ti.com> + +properties: + compatible: + items: + - const: ti,am654-ehrpwm-tbclk + - const: syscon + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - reg + +examples: + - | + ehrpwm_tbclk: syscon@4140 { + compatible = "ti,am654-ehrpwm-tbclk", "syscon"; + reg = <0x4140 0x18>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/uniphier-clock.txt b/Documentation/devicetree/bindings/clock/uniphier-clock.txt deleted file mode 100644 index 7b5f602765fe..000000000000 --- a/Documentation/devicetree/bindings/clock/uniphier-clock.txt +++ /dev/null @@ -1,132 +0,0 @@ -UniPhier clock controller - - -System clock ------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-clock" - for LD4 SoC. - "socionext,uniphier-pro4-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-clock" - for LD11 SoC. - "socionext,uniphier-ld20-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - clock { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 8: ST DMAC -12: GIO (Giga bit stream I/O) -14: USB3 ch0 host -15: USB3 ch1 host -16: USB3 ch0 PHY0 -17: USB3 ch0 PHY1 -20: USB3 ch1 PHY0 -21: USB3 ch1 PHY1 - - -Media I/O (MIO) clock, SD clock -------------------------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-mio-clock" - for LD4 SoC. - "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. - "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-sd-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - clock { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: SD ch0 host - 1: eMMC host - 2: SD ch1 host - 7: MIO DMAC - 8: USB2 ch0 host - 9: USB2 ch1 host -10: USB2 ch2 host -12: USB2 ch0 PHY -13: USB2 ch1 PHY -14: USB2 ch2 PHY - - -Peripheral clock ----------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-peri-clock" - for LD4 SoC. - "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. - "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-peri-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - clock { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: UART ch0 - 1: UART ch1 - 2: UART ch2 - 3: UART ch3 - 4: I2C ch0 - 5: I2C ch1 - 6: I2C ch2 - 7: I2C ch3 - 8: I2C ch4 - 9: I2C ch5 -10: I2C ch6 diff --git a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt b/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt index 22256e295a7a..3dd8961154ab 100644 --- a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt +++ b/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt @@ -19,7 +19,7 @@ Required nodes: 0: High Speed (HS), 3: Mobile High-Definition Link (MHL), specific to 11-pin Samsung micro-USB. -[1]: bindings/connector/usb-connector.txt +[1]: bindings/connector/usb-connector.yaml Example ------- diff --git a/Documentation/devicetree/bindings/connector/usb-connector.txt b/Documentation/devicetree/bindings/connector/usb-connector.txt deleted file mode 100644 index 88578ac1a8a7..000000000000 --- a/Documentation/devicetree/bindings/connector/usb-connector.txt +++ /dev/null @@ -1,135 +0,0 @@ -USB Connector -============= - -A USB connector node represents a physical USB connector. It should be -a child of a USB interface controller. - -Required properties: -- compatible: describes type of the connector, must be one of: - "usb-a-connector", - "usb-b-connector", - "usb-c-connector". - -Optional properties: -- label: symbolic name for the connector, -- type: size of the connector, should be specified in case of USB-A, USB-B - non-fullsize connectors: "mini", "micro". -- self-powered: Set this property if the usb device that has its own power - source. - -Optional properties for usb-b-connector: -- id-gpios: an input gpio for USB ID pin. -- vbus-gpios: an input gpio for USB VBUS pin, used to detect presence of - VBUS 5V. - see gpio/gpio.txt. -- vbus-supply: a phandle to the regulator for USB VBUS if needed when host - mode or dual role mode is supported. - Particularly, if use an output GPIO to control a VBUS regulator, should - model it as a regulator. - see regulator/fixed-regulator.yaml -- pinctrl-names : a pinctrl state named "default" is optional -- pinctrl-0 : pin control group - see pinctrl/pinctrl-bindings.txt - -Optional properties for usb-c-connector: -- power-role: should be one of "source", "sink" or "dual"(DRP) if typec - connector has power support. -- try-power-role: preferred power role if "dual"(DRP) can support Try.SNK - or Try.SRC, should be "sink" for Try.SNK or "source" for Try.SRC. -- data-role: should be one of "host", "device", "dual"(DRD) if typec - connector supports USB data. - -Required properties for usb-c-connector with power delivery support: -- source-pdos: An array of u32 with each entry providing supported power - source data object(PDO), the detailed bit definitions of PDO can be found - in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2 - Source_Capabilities Message, the order of each entry(PDO) should follow - the PD spec chapter 6.4.1. Required for power source and power dual role. - User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() - defined in dt-bindings/usb/pd.h. -- sink-pdos: An array of u32 with each entry providing supported power - sink data object(PDO), the detailed bit definitions of PDO can be found - in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3 - Sink Capabilities Message, the order of each entry(PDO) should follow - the PD spec chapter 6.4.1. Required for power sink and power dual role. - User can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined - in dt-bindings/usb/pd.h. -- op-sink-microwatt: Sink required operating power in microwatt, if source - can't offer the power, Capability Mismatch is set. Required for power - sink and power dual role. - -Required nodes: -- any data bus to the connector should be modeled using the OF graph bindings - specified in bindings/graph.txt, unless the bus is between parent node and - the connector. Since single connector can have multiple data buses every bus - has assigned OF graph port number as follows: - 0: High Speed (HS), present in all connectors, - 1: Super Speed (SS), present in SS capable connectors, - 2: Sideband use (SBU), present in USB-C. - -Examples --------- - -1. Micro-USB connector with HS lines routed via controller (MUIC): - -muic-max77843@66 { - ... - usb_con: connector { - compatible = "usb-b-connector"; - label = "micro-USB"; - type = "micro"; - }; -}; - -2. USB-C connector attached to CC controller (s2mm005), HS lines routed -to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort. -DisplayPort video lines are routed to the connector via SS mux in USB3 PHY. - -ccic: s2mm005@33 { - ... - usb_con: connector { - compatible = "usb-c-connector"; - label = "USB-C"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usb_con_hs: endpoint { - remote-endpoint = <&max77865_usbc_hs>; - }; - }; - port@1 { - reg = <1>; - usb_con_ss: endpoint { - remote-endpoint = <&usbdrd_phy_ss>; - }; - }; - port@2 { - reg = <2>; - usb_con_sbu: endpoint { - remote-endpoint = <&dp_aux>; - }; - }; - }; - }; -}; - -3. USB-C connector attached to a typec port controller(ptn5110), which has -power delivery support and enables drp. - -typec: ptn5110@50 { - ... - usb_con: connector { - compatible = "usb-c-connector"; - label = "USB-C"; - power-role = "dual"; - try-power-role = "sink"; - source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; - sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) - PDO_VAR(5000, 12000, 2000)>; - op-sink-microwatt = <10000000>; - }; -}; diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml new file mode 100644 index 000000000000..4638d7adb806 --- /dev/null +++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml @@ -0,0 +1,206 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/connector/usb-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: USB Connector + +maintainers: + - Rob Herring <robh@kernel.org> + +description: + A USB connector node represents a physical USB connector. It should be a child + of a USB interface controller. + +properties: + compatible: + enum: + - usb-a-connector + - usb-b-connector + - usb-c-connector + + label: + description: Symbolic name for the connector. + + type: + description: Size of the connector, should be specified in case of + non-fullsize 'usb-a-connector' or 'usb-b-connector' compatible + connectors. + allOf: + - $ref: /schemas/types.yaml#definitions/string + enum: + - mini + - micro + + self-powered: + description: Set this property if the USB device has its own power source. + type: boolean + + # The following are optional properties for "usb-b-connector". + id-gpios: + description: An input gpio for USB ID pin. + maxItems: 1 + + vbus-gpios: + description: An input gpio for USB VBus pin, used to detect presence of + VBUS 5V. + maxItems: 1 + + vbus-supply: + description: A phandle to the regulator for USB VBUS if needed when host + mode or dual role mode is supported. + Particularly, if use an output GPIO to control a VBUS regulator, should + model it as a regulator. See bindings/regulator/fixed-regulator.yaml + + # The following are optional properties for "usb-c-connector". + power-role: + description: Determines the power role that the Type C connector will + support. "dual" refers to Dual Role Port (DRP). + allOf: + - $ref: /schemas/types.yaml#definitions/string + enum: + - source + - sink + - dual + + try-power-role: + description: Preferred power role. + allOf: + - $ref: /schemas/types.yaml#definitions/string + enum: + - source + - sink + - dual + + data-role: + description: Data role if Type C connector supports USB data. "dual" refers + Dual Role Device (DRD). + allOf: + - $ref: /schemas/types.yaml#definitions/string + enum: + - host + - device + - dual + + # The following are optional properties for "usb-c-connector" with power + # delivery support. + source-pdos: + description: An array of u32 with each entry providing supported power + source data object(PDO), the detailed bit definitions of PDO can be found + in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2 + Source_Capabilities Message, the order of each entry(PDO) should follow + the PD spec chapter 6.4.1. Required for power source and power dual role. + User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() + defined in dt-bindings/usb/pd.h. + minItems: 1 + maxItems: 7 + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + + sink-pdos: + description: An array of u32 with each entry providing supported power sink + data object(PDO), the detailed bit definitions of PDO can be found in + "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3 + Sink Capabilities Message, the order of each entry(PDO) should follow the + PD spec chapter 6.4.1. Required for power sink and power dual role. User + can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined + in dt-bindings/usb/pd.h. + minItems: 1 + maxItems: 7 + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + + op-sink-microwatt: + description: Sink required operating power in microwatt, if source can't + offer the power, Capability Mismatch is set. Required for power sink and + power dual role. + + ports: + description: OF graph bindings (specified in bindings/graph.txt) that model + any data bus to the connector unless the bus is between parent node and + the connector. Since a single connector can have multiple data buses every + bus has an assigned OF graph port number as described below. + type: object + properties: + port@0: + type: object + description: High Speed (HS), present in all connectors. + + port@1: + type: object + description: Super Speed (SS), present in SS capable connectors. + + port@2: + type: object + description: Sideband Use (SBU), present in USB-C. This describes the + alternate mode connection of which SBU is a part. + + required: + - port@0 + +required: + - compatible + +examples: + # Micro-USB connector with HS lines routed via controller (MUIC). + - |+ + muic-max77843 { + usb_con1: connector { + compatible = "usb-b-connector"; + label = "micro-USB"; + type = "micro"; + }; + }; + + # USB-C connector attached to CC controller (s2mm005), HS lines routed + # to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort. + # DisplayPort video lines are routed to the connector via SS mux in USB3 PHY. + - |+ + ccic: s2mm005 { + usb_con2: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&max77865_usbc_hs>; + }; + }; + port@1 { + reg = <1>; + usb_con_ss: endpoint { + remote-endpoint = <&usbdrd_phy_ss>; + }; + }; + port@2 { + reg = <2>; + usb_con_sbu: endpoint { + remote-endpoint = <&dp_aux>; + }; + }; + }; + }; + }; + + # USB-C connector attached to a typec port controller(ptn5110), which has + # power delivery support and enables drp. + - |+ + #include <dt-bindings/usb/pd.h> + typec: ptn5110 { + usb_con3: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 12000, 2000)>; + op-sink-microwatt = <10000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml index 33c7842917f6..8b9a8f337f16 100644 --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -23,6 +23,8 @@ properties: - items: - const: allwinner,sun7i-a20-crypto - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun8i-a33-crypto reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt index 4e4d387e38a5..513499fcdb5b 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt @@ -11,7 +11,7 @@ Required properties: Example: -dcp@80028000 { +dcp: crypto@80028000 { compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; reg = <0x80028000 0x2000>; interrupts = <52 53>; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt index e8a35c71e947..db690b10e582 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt @@ -8,7 +8,7 @@ Required properties: Example: -sah@10025000 { +sah: crypto@10025000 { compatible = "fsl,imx27-sahara"; reg = < 0x10025000 0x800>; interrupts = <75>; diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 2fe245ca816a..8f359f473ada 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -138,7 +138,7 @@ iMX6QDL/SX requires four clocks iMX6UL does only require three clocks - crypto: caam@2140000 { + crypto: crypto@2140000 { compatible = "fsl,sec-v4.0"; #address-cells = <1>; #size-cells = <1>; diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml new file mode 100644 index 000000000000..55dd6e3d270d --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings + +maintainers: + - Kalyani Akula <kalyani.akula@xilinx.com> + - Michal Simek <michal.simek@xilinx.com> + +description: | + The ZynqMP AES-GCM hardened cryptographic accelerator is used to + encrypt or decrypt the data with provided key and initialization vector. + +properties: + compatible: + const: xlnx,zynqmp-aes + +required: + - compatible + +additionalProperties: false + +examples: + - | + firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + xlnx_aes: zynqmp-aes { + compatible = "xlnx,zynqmp-aes"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml index d1205a6697a0..a8d202c9d004 100644 --- a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml +++ b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml @@ -71,9 +71,9 @@ properties: maxItems: 2 reg-names: - items: - - const: vpu - - const: hhi + items: + - const: vpu + - const: hhi interrupts: maxItems: 1 @@ -107,6 +107,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + examples: - | vpu: vpu@d0100000 { diff --git a/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt b/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt index 0c0970c210ab..883bcb2604c7 100644 --- a/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt @@ -6,16 +6,22 @@ Required properties: Optional properties: - label: a symbolic name for the connector +- sdtv-standards: limit the supported TV standards on a connector to the given + ones. If not specified all TV standards are allowed. + Possible TV standards are defined in + include/dt-bindings/display/sdtv-standards.h. Required nodes: - Video port for TV input Example ------- +#include <dt-bindings/display/sdtv-standards.h> tv: connector { compatible = "composite-video-connector"; label = "tv"; + sdtv-standards = <(SDTV_STD_PAL | SDTV_STD_NTSC)>; port { tv_connector_in: endpoint { diff --git a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt deleted file mode 100644 index 8def11b16a24..000000000000 --- a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt +++ /dev/null @@ -1,36 +0,0 @@ -Vivante GPU core devices -======================== - -Required properties: -- compatible: Should be "vivante,gc" - A more specific compatible is not needed, as the cores contain chip - identification registers at fixed locations, which provide all the - necessary information to the driver. -- reg: should be register base and length as documented in the - datasheet -- interrupts: Should contain the cores interrupt line -- clocks: should contain one clock for entry in clock-names - see Documentation/devicetree/bindings/clock/clock-bindings.txt -- clock-names: - - "bus": AXI/master interface clock - - "reg": AHB/slave interface clock - (only required if GPU can gate slave interface independently) - - "core": GPU core clock - - "shader": Shader clock (only required if GPU has feature PIPE_3D) - -Optional properties: -- power-domains: a power domain consumer specifier according to - Documentation/devicetree/bindings/power/power_domain.txt - -example: - -gpu_3d: gpu@130000 { - compatible = "vivante,gc"; - reg = <0x00130000 0x4000>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>, - <&clks IMX6QDL_CLK_GPU3D_CORE>, - <&clks IMX6QDL_CLK_GPU3D_SHADER>; - clock-names = "bus", "core", "shader"; - power-domains = <&gpc 1>; -}; diff --git a/Documentation/devicetree/bindings/display/msm/gmu.txt b/Documentation/devicetree/bindings/display/msm/gmu.txt deleted file mode 100644 index bf9c7a2a495c..000000000000 --- a/Documentation/devicetree/bindings/display/msm/gmu.txt +++ /dev/null @@ -1,116 +0,0 @@ -Qualcomm adreno/snapdragon GMU (Graphics management unit) - -The GMU is a programmable power controller for the GPU. the CPU controls the -GMU which in turn handles power controls for the GPU. - -Required properties: -- compatible: "qcom,adreno-gmu-XYZ.W", "qcom,adreno-gmu" - for example: "qcom,adreno-gmu-630.2", "qcom,adreno-gmu" - Note that you need to list the less specific "qcom,adreno-gmu" - for generic matches and the more specific identifier to identify - the specific device. -- reg: Physical base address and length of the GMU registers. -- reg-names: Matching names for the register regions - * "gmu" - * "gmu_pdc" - * "gmu_pdc_seg" -- interrupts: The interrupt signals from the GMU. -- interrupt-names: Matching names for the interrupts - * "hfi" - * "gmu" -- clocks: phandles to the device clocks -- clock-names: Matching names for the clocks - * "gmu" - * "cxo" - * "axi" - * "mnoc" -- power-domains: should be: - <&clock_gpucc GPU_CX_GDSC> - <&clock_gpucc GPU_GX_GDSC> -- power-domain-names: Matching names for the power domains -- iommus: phandle to the adreno iommu -- operating-points-v2: phandle to the OPP operating points - -Optional properties: -- sram: phandle to the On Chip Memory (OCMEM) that's present on some Snapdragon - SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml. - -Example: - -/ { - ... - - gmu: gmu@506a000 { - compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu"; - - reg = <0x506a000 0x30000>, - <0xb280000 0x10000>, - <0xb480000 0x10000>; - reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; - - interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hfi", "gmu"; - - clocks = <&gpucc GPU_CC_CX_GMU_CLK>, - <&gpucc GPU_CC_CXO_CLK>, - <&gcc GCC_DDRSS_GPU_AXI_CLK>, - <&gcc GCC_GPU_MEMNOC_GFX_CLK>; - clock-names = "gmu", "cxo", "axi", "memnoc"; - - power-domains = <&gpucc GPU_CX_GDSC>, - <&gpucc GPU_GX_GDSC>; - power-domain-names = "cx", "gx"; - - iommus = <&adreno_smmu 5>; - - operating-points-v2 = <&gmu_opp_table>; - }; -}; - -a3xx example with OCMEM support: - -/ { - ... - - gpu: adreno@fdb00000 { - compatible = "qcom,adreno-330.2", - "qcom,adreno"; - reg = <0xfdb00000 0x10000>; - reg-names = "kgsl_3d0_reg_memory"; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "kgsl_3d0_irq"; - clock-names = "core", - "iface", - "mem_iface"; - clocks = <&mmcc OXILI_GFX3D_CLK>, - <&mmcc OXILICX_AHB_CLK>, - <&mmcc OXILICX_AXI_CLK>; - sram = <&gmu_sram>; - power-domains = <&mmcc OXILICX_GDSC>; - operating-points-v2 = <&gpu_opp_table>; - iommus = <&gpu_iommu 0>; - }; - - ocmem@fdd00000 { - compatible = "qcom,msm8974-ocmem"; - - reg = <0xfdd00000 0x2000>, - <0xfec00000 0x180000>; - reg-names = "ctrl", - "mem"; - - clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, - <&mmcc OCMEMCX_OCMEMNOC_CLK>; - clock-names = "core", - "iface"; - - #address-cells = <1>; - #size-cells = <1>; - - gmu_sram: gmu-sram@0 { - reg = <0x0 0x100000>; - ranges = <0 0 0xfec00000 0x100000>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml new file mode 100644 index 000000000000..0b8736a9384e --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright 2019-2020, The Linux Foundation, All Rights Reserved +%YAML 1.2 +--- + +$id: "http://devicetree.org/schemas/display/msm/gmu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Devicetree bindings for the GMU attached to certain Adreno GPUs + +maintainers: + - Rob Clark <robdclark@gmail.com> + +description: | + These bindings describe the Graphics Management Unit (GMU) that is attached + to members of the Adreno A6xx GPU family. The GMU provides on-device power + management and support to improve power efficiency and reduce the load on + the CPU. + +properties: + compatible: + items: + - enum: + - qcom,adreno-gmu-630.2 + - const: qcom,adreno-gmu + + reg: + items: + - description: Core GMU registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + + reg-names: + items: + - const: gmu + - const: gmu_pdc + - const: gmu_pdc_seq + + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + + interrupts: + items: + - description: GMU HFI interrupt + - description: GMU interrupt + + + interrupt-names: + items: + - const: hfi + - const: gmu + + power-domains: + items: + - description: CX power domain + - description: GX power domain + + power-domain-names: + items: + - const: cx + - const: gx + + iommus: + maxItems: 1 + + operating-points-v2: true + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - power-domains + - power-domain-names + - iommus + - operating-points-v2 + +examples: + - | + #include <dt-bindings/clock/qcom,gpucc-sdm845.h> + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gmu: gmu@506a000 { + compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu"; + + reg = <0x506a000 0x30000>, + <0xb280000 0x10000>, + <0xb480000 0x10000>; + reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; + + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>; + clock-names = "gmu", "cxo", "axi", "memnoc"; + + interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hfi", "gmu"; + + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + + iommus = <&adreno_smmu 5>; + operating-points-v2 = <&gmu_opp_table>; + }; diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 7edc298a15f2..fd779cd6994d 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -35,25 +35,54 @@ Required properties: bring the GPU out of secure mode. - firmware-name: optional property of the 'zap-shader' node, listing the relative path of the device specific zap firmware. +- sram: phandle to the On Chip Memory (OCMEM) that's present on some a3xx and + a4xx Snapdragon SoCs. See + Documentation/devicetree/bindings/sram/qcom,ocmem.yaml. -Example 3xx/4xx/a5xx: +Example 3xx/4xx: / { ... - gpu: qcom,kgsl-3d0@4300000 { - compatible = "qcom,adreno-320.2", "qcom,adreno"; - reg = <0x04300000 0x20000>; + gpu: adreno@fdb00000 { + compatible = "qcom,adreno-330.2", + "qcom,adreno"; + reg = <0xfdb00000 0x10000>; reg-names = "kgsl_3d0_reg_memory"; - interrupts = <GIC_SPI 80 0>; - clock-names = - "core", - "iface", - "mem_iface"; - clocks = - <&mmcc GFX3D_CLK>, - <&mmcc GFX3D_AHB_CLK>, - <&mmcc MMSS_IMEM_AHB_CLK>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "kgsl_3d0_irq"; + clock-names = "core", + "iface", + "mem_iface"; + clocks = <&mmcc OXILI_GFX3D_CLK>, + <&mmcc OXILICX_AHB_CLK>, + <&mmcc OXILICX_AXI_CLK>; + sram = <&gpu_sram>; + power-domains = <&mmcc OXILICX_GDSC>; + operating-points-v2 = <&gpu_opp_table>; + iommus = <&gpu_iommu 0>; + }; + + gpu_sram: ocmem@fdd00000 { + compatible = "qcom,msm8974-ocmem"; + + reg = <0xfdd00000 0x2000>, + <0xfec00000 0x180000>; + reg-names = "ctrl", + "mem"; + + clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, + <&mmcc OCMEMCX_OCMEMNOC_CLK>; + clock-names = "core", + "iface"; + + #address-cells = <1>; + #size-cells = <1>; + + gpu_sram: gpu-sram@0 { + reg = <0x0 0x100000>; + ranges = <0 0 0xfec00000 0x100000>; + }; }; }; diff --git a/Documentation/devicetree/bindings/display/panel/panel-dpi.yaml b/Documentation/devicetree/bindings/display/panel/panel-dpi.yaml index f63870384c00..0cd74c8dab42 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-dpi.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-dpi.yaml @@ -21,15 +21,6 @@ properties: - {} - const: panel-dpi - data-mapping: - enum: - - rgb24 - - rgb565 - - bgr666 - description: | - Describes the media format, how the display panel is connected - to the display interface. - backlight: true enable-gpios: true height-mm: true @@ -52,7 +43,6 @@ examples: compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; label = "osddisplay"; power-supply = <&vcc_supply>; - data-mapping = "rgb565"; backlight = <&backlight>; port { diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index cac61a998203..eb04c2330698 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -65,7 +65,7 @@ properties: ports: type: object description: - Ports as described in Documentation/devictree/bindings/graph.txt + Ports as described in Documentation/devicetree/bindings/graph.txt properties: "#address-cells": const: 1 @@ -121,7 +121,7 @@ examples: #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/soc/ti,sci_pm_domain.h> - dss: dss@04a00000 { + dss: dss@4a00000 { compatible = "ti,am65x-dss"; reg = <0x0 0x04a00000 0x0 0x1000>, /* common */ <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */ diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml index ade9b2f513f5..eb4b1a266210 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml @@ -98,7 +98,7 @@ properties: ports: type: object description: - Ports as described in Documentation/devictree/bindings/graph.txt + Ports as described in Documentation/devicetree/bindings/graph.txt properties: "#address-cells": const: 1 @@ -154,7 +154,7 @@ examples: #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/soc/ti,sci_pm_domain.h> - dss: dss@04a00000 { + dss: dss@4a00000 { compatible = "ti,j721e-dss"; reg = <0x00 0x04a00000 0x00 0x10000>, /* common_m */ <0x00 0x04a10000 0x00 0x10000>, /* common_s0*/ diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml index 385bd060ccf9..8f87b82c6695 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml @@ -56,7 +56,7 @@ properties: port: type: object description: - Port as described in Documentation/devictree/bindings/graph.txt. + Port as described in Documentation/devicetree/bindings/graph.txt. The DSS DPI output port node max-memory-bandwidth: @@ -81,7 +81,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> - dss: dss@02540000 { + dss: dss@2540000 { compatible = "ti,k2g-dss"; reg = <0x02540000 0x400>, <0x02550000 0x1000>, diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt index f1f95f678739..e8f6c42e80f2 100644 --- a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt +++ b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt @@ -16,6 +16,7 @@ Required Properties: - "renesas,r8a7794-usb-dmac" (R-Car E2) - "renesas,r8a7795-usb-dmac" (R-Car H3) - "renesas,r8a7796-usb-dmac" (R-Car M3-W) + - "renesas,r8a77961-usb-dmac" (R-Car M3-W+) - "renesas,r8a77965-usb-dmac" (R-Car M3-N) - "renesas,r8a77990-usb-dmac" (R-Car E3) - "renesas,r8a77995-usb-dmac" (R-Car D3) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index 2ca3ddbe1ff4..e7f2ad7dab5e 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -43,6 +43,8 @@ required: - interrupts - '#dma-cells' +additionalProperties: false + examples: - | dma@3000000 { diff --git a/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml b/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml new file mode 100644 index 000000000000..e7bf6dd7da29 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier Media IO DMA controller + +description: | + This works as an external DMA engine for SD/eMMC controllers etc. + found in UniPhier LD4, Pro4, sLD8 SoCs. + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + const: socionext,uniphier-mio-dmac + + reg: + maxItems: 1 + + interrupts: + description: | + A list of interrupt specifiers associated with the DMA channels. + The number of interrupt lines is SoC-dependent. + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + '#dma-cells': + description: The single cell represents the channel index. + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - '#dma-cells' + +additionalProperties: false + +examples: + - | + // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a + // typo. The first two channels share a single interrupt line. + + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + resets = <&mio_rst 7>; + #dma-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml b/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml new file mode 100644 index 000000000000..86cfb599256e --- /dev/null +++ b/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier external DMA controller + +description: | + This describes the devicetree bindings for an external DMA engine to perform + memory-to-memory or peripheral-to-memory data transfer capable of supporting + 16 channels, implemented in Socionext UniPhier SoCs. + +maintainers: + - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + const: socionext,uniphier-xdmac + + reg: + items: + - description: XDMAC base register region (offset and length) + - description: XDMAC extension register region (offset and length) + + interrupts: + maxItems: 1 + + "#dma-cells": + const: 2 + description: | + DMA request from clients consists of 2 cells: + 1. Channel index + 2. Transfer request factor number, If no transfer factor, use 0. + The number is SoC-specific, and this should be specified with + relation to the device to use the DMA controller. + + dma-channels: + minimum: 1 + maximum: 16 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + +examples: + - | + xdmac: dma-controller@5fc10000 { + compatible = "socionext,uniphier-xdmac"; + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>; + interrupts = <0 188 4>; + #dma-cells = <2>; + dma-channels = <16>; + }; + +... diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt index 0e1398f93aa2..29fcd37082e8 100644 --- a/Documentation/devicetree/bindings/dma/ti-edma.txt +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt @@ -180,7 +180,7 @@ edma1_tptc0: tptc@27b0000 { }; edma1_tptc1: tptc@27b8000 { - compatible = "ti, k2g-edma3-tptc", "ti,edma3-tptc"; + compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; reg = <0x027b8000 0x400>; power-domains = <&k2g_pds 0x4f>; }; diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml index 34780d7535b8..39ea05e6e5ff 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -45,7 +45,8 @@ allOf: properties: "#dma-cells": - const: 1 + minimum: 1 + maximum: 2 description: | The cell is the PSI-L thread ID of the remote (to UDMAP) end. Valid ranges for thread ID depends on the data movement direction: @@ -55,6 +56,8 @@ properties: Please refer to the device documentation for the PSI-L thread map and also the PSI-L peripheral chapter for the correct thread ID. + When #dma-cells is 2, the second parameter is the channel ATYPE. + compatible: enum: - ti,am654-navss-main-udmap @@ -131,6 +134,20 @@ required: - ti,sci-rm-range-rchan - ti,sci-rm-range-rflow +if: + properties: + "#dma-cells": + const: 2 +then: + properties: + ti,udma-atype: + description: ATYPE value which should be used by non slave channels + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - ti,udma-atype + examples: - |+ cbass_main { diff --git a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt deleted file mode 100644 index b12388dc7eac..000000000000 --- a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt +++ /dev/null @@ -1,25 +0,0 @@ -UniPhier Media IO DMA controller - -This works as an external DMA engine for SD/eMMC controllers etc. -found in UniPhier LD4, Pro4, sLD8 SoCs. - -Required properties: -- compatible: should be "socionext,uniphier-mio-dmac". -- reg: offset and length of the register set for the device. -- interrupts: a list of interrupt specifiers associated with the DMA channels. -- clocks: a single clock specifier. -- #dma-cells: should be <1>. The single cell represents the channel index. - -Example: - dmac: dma-controller@5a000000 { - compatible = "socionext,uniphier-mio-dmac"; - reg = <0x5a000000 0x1000>; - interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, - <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; - clocks = <&mio_clk 7>; - #dma-cells = <1>; - }; - -Note: -In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. -The first two channels share a single interrupt line. diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml index f04870d84542..a5dc070d0ca7 100644 --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml @@ -68,6 +68,8 @@ required: - mbox-names - memory-region +additionalProperties: false + examples: - | #include <dt-bindings/firmware/imx/rsrc.h> diff --git a/Documentation/devicetree/bindings/edac/dmc-520.yaml b/Documentation/devicetree/bindings/edac/dmc-520.yaml new file mode 100644 index 000000000000..9272d2bd8634 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/dmc-520.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/dmc-520.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM DMC-520 EDAC bindings + +maintainers: + - Lei Wang <lewan@microsoft.com> + +description: |+ + DMC-520 node is defined to describe DRAM error detection and correction. + + https://static.docs.arm.com/100000/0200/corelink_dmc520_trm_100000_0200_01_en.pdf + +properties: + compatible: + items: + - const: brcm,dmc-520 + - const: arm,dmc-520 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 10 + + interrupt-names: + minItems: 1 + maxItems: 10 + items: + enum: + - ram_ecc_errc + - ram_ecc_errd + - dram_ecc_errc + - dram_ecc_errd + - failed_access + - failed_prog + - link_err + - temperature_event + - arch_fsm + - phy_request + +required: + - compatible + - reg + - interrupts + - interrupt-names + +examples: + - | + dmc0: dmc@200000 { + compatible = "brcm,dmc-520", "arm,dmc-520"; + reg = <0x200000 0x80000>; + interrupts = <0x0 0x349 0x4>, <0x0 0x34B 0x4>; + interrupt-names = "dram_ecc_errc", "dram_ecc_errd"; + }; diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 0f6d8db18d6c..a15787e504f0 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -172,6 +172,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 4ddcf709cc3c..62811a1b5058 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -7,9 +7,9 @@ # $id is a unique identifier based on the filename. There may or may not be a # file present at the URL. -$id: "http://devicetree.org/schemas/example-schema.yaml#" +$id: http://devicetree.org/schemas/example-schema.yaml# # $schema is the meta-schema this schema should be validated with. -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$schema: http://devicetree.org/meta-schemas/core.yaml# title: An example schema annotated with jsonschema details diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.txt b/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.txt deleted file mode 100644 index 8e8625c00dfa..000000000000 --- a/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.txt +++ /dev/null @@ -1,24 +0,0 @@ -ChromeOS EC USB Type-C cable and accessories detection - -On ChromeOS systems with USB Type C ports, the ChromeOS Embedded Controller is -able to detect the state of external accessories such as display adapters -or USB devices when said accessories are attached or detached. - -The node for this device must be under a cros-ec node like google,cros-ec-spi -or google,cros-ec-i2c. - -Required properties: -- compatible: Should be "google,extcon-usbc-cros-ec". -- google,usb-port-id: Specifies the USB port ID to use. - -Example: - cros-ec@0 { - compatible = "google,cros-ec-i2c"; - - ... - - extcon { - compatible = "google,extcon-usbc-cros-ec"; - google,usb-port-id = <0>; - }; - } diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml b/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml new file mode 100644 index 000000000000..9c5849b341ea --- /dev/null +++ b/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/extcon-usbc-cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS EC USB Type-C cable and accessories detection + +maintainers: + - Benson Leung <bleung@chromium.org> + - Enric Balletbo i Serra <enric.balletbo@collabora.com> + +description: | + On ChromeOS systems with USB Type C ports, the ChromeOS Embedded Controller is + able to detect the state of external accessories such as display adapters + or USB devices when said accessories are attached or detached. + The node for this device must be under a cros-ec node like google,cros-ec-spi + or google,cros-ec-i2c. + +properties: + compatible: + const: google,extcon-usbc-cros-ec + + google,usb-port-id: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + description: the port id + minimum: 0 + maximum: 255 + +required: + - compatible + - google,usb-port-id + +additionalProperties: false + +examples: + - | + spi0 { + #address-cells = <1>; + #size-cells = <0>; + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0>; + + usbc_extcon0: extcon0 { + compatible = "google,extcon-usbc-cros-ec"; + google,usb-port-id = <0>; + }; + + usbc_extcon1: extcon1 { + compatible = "google,extcon-usbc-cros-ec"; + google,usb-port-id = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml index 878a2079ebb6..1bd2870c3a9c 100644 --- a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml +++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml @@ -34,9 +34,12 @@ required: - compatible - reg +additionalProperties: false + examples: - | npe@c8006000 { compatible = "intel,ixp4xx-network-processing-engine"; reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>; }; +... diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 3f29ea04b5fe..354b448fc0c3 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -10,6 +10,7 @@ Required properties: * "qcom,scm-apq8064" * "qcom,scm-apq8084" * "qcom,scm-ipq4019" + * "qcom,scm-ipq806x" * "qcom,scm-msm8660" * "qcom,scm-msm8916" * "qcom,scm-msm8960" diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index 90c44694a30b..8ab19d1d3f9a 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt @@ -263,7 +263,7 @@ Overlay contains: gpio@10040 { compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; - altr,gpio-bank-width = <4>; + altr,ngpio = <4>; #gpio-cells = <2>; clocks = <2>; gpio-controller; @@ -468,8 +468,7 @@ programming is the FPGA based bridge of fpga_region1. compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; clocks = <0x2>; - altr,gpio-bank-width = <0x4>; - resetvalue = <0x0>; + altr,ngpio = <0x4>; #gpio-cells = <0x2>; gpio-controller; }; diff --git a/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml new file mode 100644 index 000000000000..893d81e54caa --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SPI controllers + +maintainers: + - Eddie James <eajames@linux.ibm.com> + +description: | + This binding describes an FSI CFAM engine called the FSI2SPI. Therefore this + node will always be a child of an FSI CFAM node; see fsi.txt for details on + FSI slave and CFAM nodes. This FSI2SPI engine provides access to a number of + SPI controllers. + +properties: + compatible: + enum: + - ibm,fsi2spi + + reg: + items: + - description: FSI slave address + +required: + - compatible + - reg + +examples: + - | + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + }; diff --git a/Documentation/devicetree/bindings/gnss/gnss.txt b/Documentation/devicetree/bindings/gnss/gnss.txt index f547bd4549fe..d6dc9c0d8249 100644 --- a/Documentation/devicetree/bindings/gnss/gnss.txt +++ b/Documentation/devicetree/bindings/gnss/gnss.txt @@ -8,7 +8,7 @@ bus (e.g. UART, I2C or SPI). Please refer to the following documents for generic properties: - Documentation/devicetree/bindings/serial/slave-device.txt + Documentation/devicetree/bindings/serial/serial.yaml Documentation/devicetree/bindings/spi/spi-bus.txt Required properties: diff --git a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml index 64e279a4bc10..5f1ed20e43ee 100644 --- a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml @@ -47,6 +47,8 @@ required: - "#gpio-cells" - gpio-controller +additionalProperties: false + dependencies: interrupt-controller: [ interrupts ] diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt index 2e097b57f170..0fc6700ed800 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt @@ -14,7 +14,7 @@ Required properties: "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K SoCs (either from AP or CP), see - Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt + Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt for specific details about the offset property. - reg: Address and length of the register set for the device. Only one diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt deleted file mode 100644 index f281f12dac18..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt +++ /dev/null @@ -1,51 +0,0 @@ -UniPhier GPIO controller - -Required properties: -- compatible: Should be "socionext,uniphier-gpio". -- reg: Specifies offset and length of the register set for the device. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be 2. The first cell is the pin number and the second - cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be 2. The first cell defines the interrupt number. - The second cell bits[3:0] is used to specify trigger type as follows: - 1 = low-to-high edge triggered - 2 = high-to-low edge triggered - 4 = active high level-sensitive - 8 = active low level-sensitive - Valid combinations are 1, 2, 3, 4, 8. -- ngpios: Specifies the number of GPIO lines. -- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) -- socionext,interrupt-ranges: Specifies an interrupt number mapping between - this GPIO controller and its interrupt parent, in the form of arbitrary - number of <child-interrupt-base parent-interrupt-base length> triplets. - -Optional properties: -- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) - -Example: - gpio: gpio@55000000 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000000 0x200>; - interrupt-parent = <&aidet>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl 0 0 0>; - gpio-ranges-group-names = "gpio_range"; - ngpios = <248>; - socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; - }; - -Consumer Example: - - sdhci0_pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>; - }; - -Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC document. -Unfortunately, only the one's place is octal in the port numbering. (That is, -PORT 8, 9, 18, 19, 28, 29, ... are missing.) UNIPHIER_GPIO_PORT() is a helper -macro to calculate 29 * 8 + 4. diff --git a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml new file mode 100644 index 000000000000..c58ff9a94f45 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier GPIO controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: socionext,uniphier-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + description: | + The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. + const: 2 + + ngpios: + minimum: 0 + maximum: 512 + + gpio-ranges: true + + gpio-ranges-group-names: + $ref: /schemas/types.yaml#/definitions/string-array + + socionext,interrupt-ranges: + description: | + Specifies an interrupt number mapping between this GPIO controller and + its interrupt parent, in the form of arbitrary number of + <child-interrupt-base parent-interrupt-base length> triplets. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - ngpios + - gpio-ranges + - socionext,interrupt-ranges + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/gpio/uniphier-gpio.h> + + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; + }; + + // Consumer: + // Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC + // document. Unfortunately, only the one's place is octal in the port + // numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.) + // UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4. + sdhci0_pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>; + }; diff --git a/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml b/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml index d102888c1be7..a36aec27069c 100644 --- a/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml @@ -49,6 +49,8 @@ required: - "#gpio-cells" - gpio-controller +additionalProperties: false + examples: - | logicvc: logicvc@43c00000 { diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index e8b99adcb1bd..0b229a7d4a98 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -43,6 +43,9 @@ properties: operating-points-v2: true + resets: + maxItems: 2 + required: - compatible - reg @@ -50,6 +53,8 @@ required: - interrupt-names - clocks +additionalProperties: false + allOf: - if: properties: @@ -57,9 +62,6 @@ allOf: contains: const: amlogic,meson-g12a-mali then: - properties: - resets: - minItems: 2 required: - resets diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 8d966f3ff3db..0407e45eb8c4 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -75,6 +75,9 @@ properties: mali-supply: true + power-domains: + maxItems: 1 + resets: minItems: 1 maxItems: 2 @@ -91,6 +94,8 @@ required: - interrupt-names - clocks +additionalProperties: false + allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index afde81be3c29..f5401cc8de4a 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -115,6 +115,8 @@ required: - clocks - clock-names +additionalProperties: false + allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml index f4dfa6fc724c..665c6e3b31d3 100644 --- a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml +++ b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml @@ -36,6 +36,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | rotator@12810000 { diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml new file mode 100644 index 000000000000..0bc4b38d5cbb --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/vivante,gc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Vivante GPU Bindings + +description: Vivante GPU core devices + +maintainers: + - Lucas Stach <l.stach@pengutronix.de> + +properties: + compatible: + const: vivante,gc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AXI/master interface clock + - description: GPU core clock + - description: Shader clock (only required if GPU has feature PIPE_3D) + - description: AHB/slave interface clock (only required if GPU can gate slave interface independently) + minItems: 1 + maxItems: 4 + + clock-names: + items: + enum: [ bus, core, shader, reg ] + minItems: 1 + maxItems: 4 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx6qdl-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + gpu@130000 { + compatible = "vivante,gc"; + reg = <0x00130000 0x4000>; + interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>, + <&clks IMX6QDL_CLK_GPU3D_CORE>, + <&clks IMX6QDL_CLK_GPU3D_SHADER>; + clock-names = "bus", "core", "shader"; + power-domains = <&gpc 1>; + }; + +... diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml index 2a9822075b36..154bee851139 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml new file mode 100644 index 000000000000..57a240d2d026 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/hwmon/adi,axi-fan-control.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AXI FAN Control Device Tree Bindings + +maintainers: + - Nuno Sá <nuno.sa@analog.com> + +description: |+ + Bindings for the Analog Devices AXI FAN Control driver. Spefications of the + core can be found in: + + https://wiki.analog.com/resources/fpga/docs/axi_fan_control + +properties: + compatible: + enum: + - adi,axi-fan-control-1.00.a + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + pulses-per-revolution: + description: + Value specifying the number of pulses per revolution of the controlled + FAN. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 4] + +required: + - compatible + - reg + - clocks + - interrupts + - pulses-per-revolution + +examples: + - | + fpga_axi: fpga-axi@0 { + #address-cells = <0x2>; + #size-cells = <0x1>; + + axi_fan_control: axi-fan-control@80000000 { + compatible = "adi,axi-fan-control-1.00.a"; + reg = <0x0 0x80000000 0x10000>; + clocks = <&clk 71>; + interrupts = <0 110 0>; + pulses-per-revolution = <2>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml index 6a742a51e2f9..44a63fffb4be 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml @@ -87,6 +87,8 @@ required: - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml new file mode 100644 index 000000000000..76985034ea73 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/adt7475.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/adt7475.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADT7475 hwmon sensor + +maintainers: + - Jean Delvare <jdelvare@suse.com> + +description: | + The ADT7473, ADT7475, ADT7476, and ADT7490 are thermal monitors and multiple + PWN fan controllers. + + They support monitoring and controlling up to four fans (the ADT7490 can only + control up to three). They support reading a single on chip temperature + sensor and two off chip temperature sensors (the ADT7490 additionally + supports measuring up to three current external temperature sensors with + series resistance cancellation (SRC)). + + Datasheets: + https://www.onsemi.com/pub/Collateral/ADT7473-D.PDF + https://www.onsemi.com/pub/Collateral/ADT7475-D.PDF + https://www.onsemi.com/pub/Collateral/ADT7476-D.PDF + https://www.onsemi.com/pub/Collateral/ADT7490-D.PDF + + Description taken from onsemiconductors specification sheets, with minor + rephrasing. + +properties: + compatible: + enum: + - adi,adt7473 + - adi,adt7475 + - adi,adt7476 + - adi,adt7490 + + reg: + maxItems: 1 + +patternProperties: + "^adi,bypass-attenuator-in[0-4]$": + description: | + Configures bypassing the individual voltage input attenuator. If + set to 1 the attenuator is bypassed if set to 0 the attenuator is + not bypassed. If the property is absent then the attenuator + retains it's configuration from the bios/bootloader. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + + "^adi,pwm-active-state$": + description: | + Integer array, represents the active state of the pwm outputs If set to 0 + the pwm uses a logic low output for 100% duty cycle. If set to 1 the pwm + uses a logic high output for 100% duty cycle. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - minItems: 3 + maxItems: 3 + items: + enum: [0, 1] + default: 1 + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hwmon@2e { + compatible = "adi,adt7476"; + reg = <0x2e>; + adi,bypass-attenuator-in0 = <1>; + adi,bypass-attenuator-in1 = <0>; + adi,pwm-active-state = <1 0 1>; + }; + }; + diff --git a/Documentation/devicetree/bindings/hwmon/ltc2978.txt b/Documentation/devicetree/bindings/hwmon/ltc2978.txt index b428a70a7cc0..4e7f6215a453 100644 --- a/Documentation/devicetree/bindings/hwmon/ltc2978.txt +++ b/Documentation/devicetree/bindings/hwmon/ltc2978.txt @@ -2,20 +2,30 @@ ltc2978 Required properties: - compatible: should contain one of: + * "lltc,ltc2972" * "lltc,ltc2974" * "lltc,ltc2975" * "lltc,ltc2977" * "lltc,ltc2978" + * "lltc,ltc2979" * "lltc,ltc2980" * "lltc,ltc3880" * "lltc,ltc3882" * "lltc,ltc3883" + * "lltc,ltc3884" * "lltc,ltc3886" * "lltc,ltc3887" + * "lltc,ltc3889" + * "lltc,ltc7880" * "lltc,ltm2987" + * "lltc,ltm4664" * "lltc,ltm4675" * "lltc,ltm4676" + * "lltc,ltm4677" + * "lltc,ltm4678" + * "lltc,ltm4680" * "lltc,ltm4686" + * "lltc,ltm4700" - reg: I2C slave address Optional properties: @@ -25,13 +35,17 @@ Optional properties: standard binding for regulators; see regulator.txt. Valid names of regulators depend on number of supplies supported per device: + * ltc2972 vout0 - vout1 * ltc2974, ltc2975 : vout0 - vout3 - * ltc2977, ltc2980, ltm2987 : vout0 - vout7 + * ltc2977, ltc2979, ltc2980, ltm2987 : vout0 - vout7 * ltc2978 : vout0 - vout7 - * ltc3880, ltc3882, ltc3886 : vout0 - vout1 + * ltc3880, ltc3882, ltc3884, ltc3886, ltc3887, ltc3889 : vout0 - vout1 + * ltc7880 : vout0 - vout1 * ltc3883 : vout0 - * ltm4676 : vout0 - vout1 - * ltm4686 : vout0 - vout1 + * ltm4664 : vout0 - vout1 + * ltm4675, ltm4676, ltm4677, ltm4678 : vout0 - vout1 + * ltm4680, ltm4686 : vout0 - vout1 + * ltm4700 : vout0 - vout1 Example: ltc2978@5e { diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/ti,ucd90320.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/ti,ucd90320.yaml index 5d42e1304202..e8feee38c76c 100644 --- a/Documentation/devicetree/bindings/hwmon/pmbus/ti,ucd90320.yaml +++ b/Documentation/devicetree/bindings/hwmon/pmbus/ti,ucd90320.yaml @@ -32,6 +32,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml index 168235ad5d81..3f043e943668 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml @@ -76,6 +76,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml b/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml new file mode 100644 index 000000000000..edbca2476128 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/brcm,brcmstb-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB BSC IIC Master Controller + +maintainers: + - Kamal Dasu <kdasu.kdev@gmail.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - brcm,bcm2711-hdmi-i2c + - brcm,brcmstb-i2c + - brcm,brcmper-i2c + + reg: + minItems: 1 + maxItems: 2 + items: + - description: BSC register range + - description: Auto-I2C register range + + reg-names: + items: + - const: bsc + - const: auto-i2c + + interrupts: + maxItems: 1 + + interrupt-names: + maxItems: 1 + + clock-frequency: + enum: + - 46875 + - 50000 + - 93750 + - 97500 + - 187500 + - 200000 + - 375000 + - 390000 + +required: + - compatible + - reg + - clock-frequency + +unevaluatedProperties: false + +if: + properties: + compatible: + contains: + enum: + - brcm,bcm2711-hdmi-i2c + +then: + properties: + reg: + minItems: 2 + + required: + - reg-names + +else: + properties: + reg: + maxItems: 1 + +examples: + - | + bsca: i2c@f0406200 { + clock-frequency = <390000>; + compatible = "brcm,brcmstb-i2c"; + interrupt-parent = <&irq0_intc>; + reg = <0xf0406200 0x58>; + interrupts = <0x18>; + interrupt-names = "upg_bsca"; + }; + + - | + ddc0: i2c@7ef04500 { + compatible = "brcm,bcm2711-hdmi-i2c"; + reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>; + reg-names = "bsc", "auto-i2c"; + clock-frequency = <390000>; + }; + +... diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt b/Documentation/devicetree/bindings/i2c/i2c-at91.txt index d4bad86107b8..96c914e048f5 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-at91.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-at91.txt @@ -28,8 +28,13 @@ Optional properties: "atmel,sama5d4-i2c", "atmel,sama5d2-i2c", "microchip,sam9x60-i2c". +- scl-gpios: specify the gpio related to SCL pin +- sda-gpios: specify the gpio related to SDA pin +- pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c + bus recovery, call it "gpio" state - Child nodes conforming to i2c bus binding + Examples : i2c0: i2c@fff84000 { @@ -64,6 +69,11 @@ i2c0: i2c@f8034600 { clocks = <&flx0>; atmel,fifo-size = <16>; i2c-sda-hold-time-ns = <336>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>; wm8731: wm8731@1a { compatible = "wm8731"; diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt deleted file mode 100644 index 0380609b177a..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt +++ /dev/null @@ -1,26 +0,0 @@ -Broadcom stb bsc iic master controller - -Required properties: - -- compatible: should be "brcm,brcmstb-i2c" or "brcm,brcmper-i2c" -- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz - valid values are 375000, 390000, 187500, 200000 - 93750, 97500, 46875 and 50000 -- reg: specifies the base physical address and size of the registers - -Optional properties : - -- interrupts: specifies the interrupt number, the irq line to be used -- interrupt-names: Interrupt name string - -Example: - -bsca: i2c@f0406200 { - clock-frequency = <390000>; - compatible = "brcm,brcmstb-i2c"; - interrupt-parent = <&irq0_intc>; - reg = <0xf0406200 0x58>; - interrupts = <0x18>; - interrupt-names = "upg_bsca"; -}; - diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt deleted file mode 100644 index 22f2eeb2c4c9..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt +++ /dev/null @@ -1,68 +0,0 @@ -* Rockchip RK3xxx I2C controller - -This driver interfaces with the native I2C controller present in Rockchip -RK3xxx SoCs. - -Required properties : - - - reg : Offset and length of the register set for the device - - compatible: should be one of the following: - - "rockchip,rv1108-i2c": for rv1108 - - "rockchip,rk3066-i2c": for rk3066 - - "rockchip,rk3188-i2c": for rk3188 - - "rockchip,rk3228-i2c": for rk3228 - - "rockchip,rk3288-i2c": for rk3288 - - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328 - - "rockchip,rk3399-i2c": for rk3399 - - interrupts : interrupt number - - clocks: See ../clock/clock-bindings.txt - - For older hardware (rk3066, rk3188, rk3228, rk3288): - - There is one clock that's used both to derive the functional clock - for the device and as the bus clock. - - For newer hardware (rk3399): specified by name - - "i2c": This is used to derive the functional clock. - - "pclk": This is the bus clock. - -Required on RK3066, RK3188 : - - - rockchip,grf : the phandle of the syscon node for the general register - file (GRF) - - on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF) - is also required. - -Optional properties : - - - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used. - - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise - (t(r) in I2C specification). If not specified this is assumed to be - the maximum the specification allows(1000 ns for Standard-mode, - 300 ns for Fast-mode) which might cause slightly slower communication. - - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall - (t(f) in the I2C specification). If not specified this is assumed to - be the maximum the specification allows (300 ns) which might cause - slightly slower communication. - - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall - (t(f) in the I2C specification). If not specified we'll use the SCL - value since they are the same in nearly all cases. - -Example: - -aliases { - i2c0 = &i2c0; -} - -i2c0: i2c@2002d000 { - compatible = "rockchip,rk3188-i2c"; - reg = <0x2002d000 0x1000>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clock-names = "i2c"; - clocks = <&cru PCLK_I2C0>; - - i2c-scl-rising-time-ns = <800>; - i2c-scl-falling-time-ns = <100>; -}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml new file mode 100644 index 000000000000..61eac76c84c4 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3xxx I2C controller + +description: + This driver interfaces with the native I2C controller present in Rockchip + RK3xxx SoCs. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +# Everything else is described in the common file +properties: + compatible: + oneOf: + - const: rockchip,rv1108-i2c + - const: rockchip,rk3066-i2c + - const: rockchip,rk3188-i2c + - const: rockchip,rk3228-i2c + - const: rockchip,rk3288-i2c + - const: rockchip,rk3399-i2c + - items: + - enum: + - rockchip,rk3036-i2c + - rockchip,rk3368-i2c + - const: rockchip,rk3288-i2c + - items: + - enum: + - rockchip,px30-i2c + - rockchip,rk3308-i2c + - rockchip,rk3328-i2c + - const: rockchip,rk3399-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: + For older hardware (rk3066, rk3188, rk3228, rk3288) + there is one clock that is used both to derive the functional clock + for the device and as the bus clock. + For newer hardware (rk3399) this clock is used to derive + the functional clock + - description: + For newer hardware (rk3399) this is the bus clock + + clock-names: + minItems: 1 + items: + - const: i2c + - const: pclk + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Required on RK3066, RK3188 the phandle of the syscon node for + the general register file (GRF) + On those SoCs an alias with the correct I2C bus ID + (bit offset in the GRF) is also required. + + clock-frequency: + default: 100000 + description: + SCL frequency to use (in Hz). If omitted, 100kHz is used. + + i2c-scl-rising-time-ns: + default: 1000 + description: + Number of nanoseconds the SCL signal takes to rise + (t(r) in I2C specification). If not specified this is assumed to be + the maximum the specification allows(1000 ns for Standard-mode, + 300 ns for Fast-mode) which might cause slightly slower communication. + + i2c-scl-falling-time-ns: + default: 300 + description: + Number of nanoseconds the SCL signal takes to fall + (t(f) in the I2C specification). If not specified this is assumed to + be the maximum the specification allows (300 ns) which might cause + slightly slower communication. + + i2c-sda-falling-time-ns: + default: 300 + description: + Number of nanoseconds the SDA signal takes to fall + (t(f) in the I2C specification). If not specified we will use the SCL + value since they are the same in nearly all cases. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +if: + properties: + compatible: + contains: + enum: + - rockchip,rk3066-i2c + - rockchip,rk3188-i2c + +then: + required: + - rockchip,grf + +examples: + - | + #include <dt-bindings/clock/rk3188-cru-common.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + i2c0: i2c@2002d000 { + compatible = "rockchip,rk3188-i2c"; + reg = <0x2002d000 0x1000>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_I2C0>; + clock-names = "i2c"; + rockchip,grf = <&grf>; + i2c-scl-falling-time-ns = <100>; + i2c-scl-rising-time-ns = <800>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt b/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt deleted file mode 100644 index 27fc6f8c798b..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt +++ /dev/null @@ -1,25 +0,0 @@ -UniPhier I2C controller (FIFO-builtin) - -Required properties: -- compatible: should be "socionext,uniphier-fi2c". -- #address-cells: should be 1. -- #size-cells: should be 0. -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: phandle to the input clock. - -Optional properties: -- clock-frequency: desired I2C bus frequency in Hz. The maximum supported - value is 400000. Defaults to 100000 if not specified. - -Examples: - - i2c0: i2c@58780000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 41 4>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt b/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt deleted file mode 100644 index 26f9d95b3436..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt +++ /dev/null @@ -1,25 +0,0 @@ -UniPhier I2C controller (FIFO-less) - -Required properties: -- compatible: should be "socionext,uniphier-i2c". -- #address-cells: should be 1. -- #size-cells: should be 0. -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: phandle to the input clock. - -Optional properties: -- clock-frequency: desired I2C bus frequency in Hz. The maximum supported - value is 400000. Defaults to 100000 if not specified. - -Examples: - - i2c0: i2c@58400000 { - compatible = "socionext,uniphier-i2c"; - reg = <0x58400000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 41 1>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml new file mode 100644 index 000000000000..15abc022968e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/socionext,uniphier-fi2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier I2C controller (FIFO-builtin) + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: socionext,uniphier-fi2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + minimum: 100000 + maximum: 400000 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - interrupts + - clocks + +examples: + - | + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml new file mode 100644 index 000000000000..ef998def554e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/socionext,uniphier-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier I2C controller (FIFO-less) + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: socionext,uniphier-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + minimum: 100000 + maximum: 400000 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - interrupts + - clocks + +examples: + - | + i2c0: i2c@58400000 { + compatible = "socionext,uniphier-i2c"; + reg = <0x58400000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index c602b6fe1c0c..d124eba1ce54 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -17,9 +17,13 @@ description: | properties: compatible: - enum: - - adi,adxl345 - - adi,adxl375 + oneOf: + - items: + - const: adi,adxl346 + - const: adi,adxl345 + - enum: + - adi,adxl345 + - adi,adxl375 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml index c1c6d6f223cf..8723a336229e 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml @@ -36,6 +36,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 84d25bd39488..d0913034b1d8 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -106,7 +106,6 @@ examples: spi-cpha; clocks = <&ad7192_mclk>; clock-names = "mclk"; - #interrupt-cells = <2>; interrupts = <25 0x2>; interrupt-parent = <&gpio>; dvdd-supply = <&dvdd>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml index 9acde6d2e2d9..a67ba67dab51 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml @@ -67,6 +67,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml new file mode 100644 index 000000000000..a11b918e0016 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7923.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7923 and similars with 4 and 8 Channel ADCs. + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + - Patrick Vasseur <patrick.vasseur@c-s.fr> + +description: | + Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908, + AD7918, AD7928 8 Channels ADCs. + + Specifications about the part can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7904_7914_7924.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7908_7918_7928.pdf + +properties: + compatible: + enum: + - adi,ad7904 + - adi,ad7914 + - adi,ad7923 + - adi,ad7924 + - adi,ad7908 + - adi,ad7918 + - adi,ad7928 + + reg: + maxItems: 1 + + refin-supply: + description: | + The regulator supply for ADC reference voltage. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + ad7928: adc@0 { + compatible = "adi,ad7928"; + reg = <0>; + spi-max-frequency = <25000000>; + refin-supply = <&adc_vref>; + + #address-cells = <1>; + #size-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml index 91ab9c842273..77605f17901c 100644 --- a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml +++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml @@ -53,6 +53,8 @@ required: - dout-gpios - avdd-supply +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml index 59009997dca0..118809a03279 100644 --- a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml @@ -32,6 +32,8 @@ required: - vref-supply - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/max1363.txt b/Documentation/devicetree/bindings/iio/adc/max1363.txt deleted file mode 100644 index 94a9011dd860..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/max1363.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Maxim 1x3x/136x/116xx Analog to Digital Converter (ADC) - -The node for this driver must be a child node of a I2C controller, hence -all mandatory properties for your controller must be specified. See directory: - - Documentation/devicetree/bindings/i2c - -for more details. - -Required properties: - - compatible: Should be one of - "maxim,max1361" - "maxim,max1362" - "maxim,max1363" - "maxim,max1364" - "maxim,max1036" - "maxim,max1037" - "maxim,max1038" - "maxim,max1039" - "maxim,max1136" - "maxim,max1137" - "maxim,max1138" - "maxim,max1139" - "maxim,max1236" - "maxim,max1237" - "maxim,max1238" - "maxim,max1239" - "maxim,max11600" - "maxim,max11601" - "maxim,max11602" - "maxim,max11603" - "maxim,max11604" - "maxim,max11605" - "maxim,max11606" - "maxim,max11607" - "maxim,max11608" - "maxim,max11609" - "maxim,max11610" - "maxim,max11611" - "maxim,max11612" - "maxim,max11613" - "maxim,max11614" - "maxim,max11615" - "maxim,max11616" - "maxim,max11617" - "maxim,max11644" - "maxim,max11645" - "maxim,max11646" - "maxim,max11647" - - reg: Should contain the ADC I2C address - -Optional properties: - - vcc-supply: phandle to the regulator that provides power to the ADC. - - vref-supply: phandle to the regulator for ADC reference voltage. - - interrupts: IRQ line for the ADC. If not used the driver will use - polling. - -Example: -adc: max11644@36 { - compatible = "maxim,max11644"; - reg = <0x36>; - vref-supply = <&adc_vref>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml new file mode 100644 index 000000000000..a0ebb4680140 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1238.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1238 and similar ADCs + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Family of simple ADCs with i2c inteface and internal references. + +properties: + compatible: + enum: + - maxim,max1036 + - maxim,max1037 + - maxim,max1038 + - maxim,max1039 + - maxim,max1136 + - maxim,max1137 + - maxim,max1138 + - maxim,max1139 + - maxim,max1236 + - maxim,max1237 + - maxim,max1238 + - maxim,max1239 + - maxim,max11600 + - maxim,max11601 + - maxim,max11602 + - maxim,max11603 + - maxim,max11604 + - maxim,max11605 + - maxim,max11606 + - maxim,max11607 + - maxim,max11608 + - maxim,max11609 + - maxim,max11610 + - maxim,max11611 + - maxim,max11612 + - maxim,max11613 + - maxim,max11614 + - maxim,max11615 + - maxim,max11616 + - maxim,max11617 + - maxim,max11644 + - maxim,max11645 + - maxim,max11646 + - maxim,max11647 + + reg: + maxItems: 1 + + vcc-supply: true + vref-supply: + description: Optional external reference. If not supplied, internal + reference will be used. + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@36 { + compatible = "maxim,max1238"; + reg = <0x36>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml new file mode 100644 index 000000000000..48377549c39a --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1363.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1363 and similar ADCs + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Family of ADCs with i2c inteface, internal references and threshold + monitoring. + +properties: + compatible: + enum: + - maxim,max1361 + - maxim,max1362 + - maxim,max1363 + - maxim,max1364 + + reg: + maxItems: 1 + + vcc-supply: true + vref-supply: + description: Optional external reference. If not supplied, internal + reference will be used. + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@36 { + compatible = "maxim,max1363"; + reg = <0x36>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml index 0ce290473fb0..8ffeceb6abae 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -52,6 +52,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt index eb939fe77836..ef8eeec1a997 100644 --- a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt @@ -6,6 +6,7 @@ Required properties: - compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC. - reg: specifies physical base address and size of the registers. - interrupts: Contain the ADC interrupt with flags for falling edge. +- resets : phandle to the reset control for this device. Optional properties: - clocks: phandle of ADC reference clock, in case the clock is not @@ -21,4 +22,5 @@ adc: adc@f000c000 { reg = <0xf000c000 0x8>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk NPCM7XX_CLK_ADC>; + resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>; }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt deleted file mode 100644 index 8de933146771..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt +++ /dev/null @@ -1,149 +0,0 @@ -STMicroelectronics STM32 ADC device driver - -STM32 ADC is a successive approximation analog-to-digital converter. -It has several multiplexed input channels. Conversions can be performed -in single, continuous, scan or discontinuous mode. Result of the ADC is -stored in a left-aligned or right-aligned 32-bit data register. -Conversions can be launched in software or using hardware triggers. - -The analog watchdog feature allows the application to detect if the input -voltage goes beyond the user-defined, higher or lower thresholds. - -Each STM32 ADC block can have up to 3 ADC instances. - -Each instance supports two contexts to manage conversions, each one has its -own configurable sequence and trigger: -- regular conversion can be done in sequence, running in background -- injected conversions have higher priority, and so have the ability to - interrupt regular conversion sequence (either triggered in SW or HW). - Regular sequence is resumed, in case it has been interrupted. - -Contents of a stm32 adc root node: ------------------------------------ -Required properties: -- compatible: Should be one of: - "st,stm32f4-adc-core" - "st,stm32h7-adc-core" - "st,stm32mp1-adc-core" -- reg: Offset and length of the ADC block register set. -- interrupts: One or more interrupts for ADC block. Some parts like stm32f4 - and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate - interrupt lines, one for each ADC within ADC block. -- clocks: Core can use up to two clocks, depending on part used: - - "adc" clock: for the analog circuitry, common to all ADCs. - It's required on stm32f4. - It's optional on stm32h7. - - "bus" clock: for registers access, common to all ADCs. - It's not present on stm32f4. - It's required on stm32h7. -- clock-names: Must be "adc" and/or "bus" depending on part used. -- interrupt-controller: Identifies the controller node as interrupt-parent -- vdda-supply: Phandle to the vdda input analog voltage. -- vref-supply: Phandle to the vref input analog reference voltage. -- #interrupt-cells = <1>; -- #address-cells = <1>; -- #size-cells = <0>; - -Optional properties: -- A pinctrl state named "default" for each ADC channel may be defined to set - inX ADC pins in mode of operation for analog input on external pin. -- booster-supply: Phandle to the embedded booster regulator that can be used - to supply ADC analog input switches on stm32h7 and stm32mp1. -- vdd-supply: Phandle to the vdd input voltage. It can be used to supply ADC - analog input switches on stm32mp1. -- st,syscfg: Phandle to system configuration controller. It can be used to - control the analog circuitry on stm32mp1. -- st,max-clk-rate-hz: Allow to specify desired max clock rate used by analog - circuitry. - -Contents of a stm32 adc child node: ------------------------------------ -An ADC block node should contain at least one subnode, representing an -ADC instance available on the machine. - -Required properties: -- compatible: Should be one of: - "st,stm32f4-adc" - "st,stm32h7-adc" - "st,stm32mp1-adc" -- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). -- clocks: Input clock private to this ADC instance. It's required only on - stm32f4, that has per instance clock input for registers access. -- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or - 2 for adc@200). -- st,adc-channels: List of single-ended channels muxed for this ADC. - It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered - from 0 to 15 or 19 (resp. for in0..in15 or in0..in19). -- st,adc-diff-channels: List of differential channels muxed for this ADC. - Depending on part used, some channels can be configured as differential - instead of single-ended (e.g. stm32h7). List here positive and negative - inputs pairs as <vinp vinn>, <vinp vinn>,... vinp and vinn are numbered - from 0 to 19 on stm32h7) - Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is required. - Both properties can be used together. Some channels can be used as - single-ended and some other ones as differential (mixed). But channels - can't be configured both as single-ended and differential (invalid). -- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in - Documentation/devicetree/bindings/iio/iio-bindings.txt - -Optional properties: -- dmas: Phandle to dma channel for this ADC instance. - See ../../dma/dma.txt for details. -- dma-names: Must be "rx" when dmas property is being used. -- assigned-resolution-bits: Resolution (bits) to use for conversions. Must - match device available resolutions: - * can be 6, 8, 10 or 12 on stm32f4 - * can be 8, 10, 12, 14 or 16 on stm32h7 - Default is maximum resolution if unset. -- st,min-sample-time-nsecs: Minimum sampling time in nanoseconds. - Depending on hardware (board) e.g. high/low analog input source impedance, - fine tune of ADC sampling time may be recommended. - This can be either one value or an array that matches 'st,adc-channels' list, - to set sample time resp. for all channels, or independently for each channel. - -Example: - adc: adc@40012000 { - compatible = "st,stm32f4-adc-core"; - reg = <0x40012000 0x400>; - interrupts = <18>; - clocks = <&rcc 0 168>; - clock-names = "adc"; - vref-supply = <®_vref>; - interrupt-controller; - pinctrl-names = "default"; - pinctrl-0 = <&adc3_in8_pin>; - - #interrupt-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - adc@0 { - compatible = "st,stm32f4-adc"; - #io-channel-cells = <1>; - reg = <0x0>; - clocks = <&rcc 0 168>; - interrupt-parent = <&adc>; - interrupts = <0>; - st,adc-channels = <8>; - dmas = <&dma2 0 0 0x400 0x0>; - dma-names = "rx"; - assigned-resolution-bits = <8>; - }; - ... - other adc child nodes follow... - }; - -Example to setup: -- channel 1 as single-ended -- channels 2 & 3 as differential (with resp. 6 & 7 negative inputs) - - adc: adc@40022000 { - compatible = "st,stm32h7-adc-core"; - ... - adc1: adc@0 { - compatible = "st,stm32h7-adc"; - ... - st,adc-channels = <1>; - st,adc-diff-channels = <2 6>, <3 7>; - }; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml new file mode 100644 index 000000000000..933ba37944d7 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml @@ -0,0 +1,458 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/bindings/iio/adc/st,stm32-adc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: STMicroelectronics STM32 ADC bindings + +description: | + STM32 ADC is a successive approximation analog-to-digital converter. + It has several multiplexed input channels. Conversions can be performed + in single, continuous, scan or discontinuous mode. Result of the ADC is + stored in a left-aligned or right-aligned 32-bit data register. + Conversions can be launched in software or using hardware triggers. + + The analog watchdog feature allows the application to detect if the input + voltage goes beyond the user-defined, higher or lower thresholds. + + Each STM32 ADC block can have up to 3 ADC instances. + +maintainers: + - Fabrice Gasnier <fabrice.gasnier@st.com> + +properties: + compatible: + enum: + - st,stm32f4-adc-core + - st,stm32h7-adc-core + - st,stm32mp1-adc-core + + reg: + maxItems: 1 + + interrupts: + description: | + One or more interrupts for ADC block, depending on part used: + - stm32f4 and stm32h7 share a common ADC interrupt line. + - stm32mp1 has two separate interrupt lines, one for each ADC within + ADC block. + minItems: 1 + maxItems: 2 + + clocks: + description: | + Core can use up to two clocks, depending on part used: + - "adc" clock: for the analog circuitry, common to all ADCs. + It's required on stm32f4. + It's optional on stm32h7 and stm32mp1. + - "bus" clock: for registers access, common to all ADCs. + It's not present on stm32f4. + It's required on stm32h7 and stm32mp1. + + clock-names: true + + st,max-clk-rate-hz: + description: + Allow to specify desired max clock rate used by analog circuitry. + + vdda-supply: + description: Phandle to the vdda input analog voltage. + + vref-supply: + description: Phandle to the vref input analog reference voltage. + + booster-supply: + description: + Phandle to the embedded booster regulator that can be used to supply ADC + analog input switches on stm32h7 and stm32mp1. + + vdd-supply: + description: + Phandle to the vdd input voltage. It can be used to supply ADC analog + input switches on stm32mp1. + + st,syscfg: + description: + Phandle to system configuration controller. It can be used to control the + analog circuitry on stm32mp1. + allOf: + - $ref: "/schemas/types.yaml#/definitions/phandle-array" + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +allOf: + - if: + properties: + compatible: + contains: + const: st,stm32f4-adc-core + + then: + properties: + clocks: + maxItems: 1 + + clock-names: + const: adc + + interrupts: + items: + - description: interrupt line common for all ADCs + + st,max-clk-rate-hz: + minimum: 600000 + maximum: 36000000 + default: 36000000 + + booster-supply: false + + vdd-supply: false + + st,syscfg: false + + - if: + properties: + compatible: + contains: + const: st,stm32h7-adc-core + + then: + properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: bus + - const: adc + minItems: 1 + maxItems: 2 + + interrupts: + items: + - description: interrupt line common for all ADCs + + st,max-clk-rate-hz: + minimum: 120000 + maximum: 36000000 + default: 36000000 + + vdd-supply: false + + st,syscfg: false + + - if: + properties: + compatible: + contains: + const: st,stm32mp1-adc-core + + then: + properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: bus + - const: adc + minItems: 1 + maxItems: 2 + + interrupts: + items: + - description: interrupt line for ADC1 + - description: interrupt line for ADC2 + + st,max-clk-rate-hz: + minimum: 120000 + maximum: 36000000 + default: 36000000 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vdda-supply + - vref-supply + - interrupt-controller + - '#interrupt-cells' + - '#address-cells' + - '#size-cells' + +patternProperties: + "^adc@[0-9]+$": + type: object + description: + An ADC block node should contain at least one subnode, representing an + ADC instance available on the machine. + + properties: + compatible: + enum: + - st,stm32f4-adc + - st,stm32h7-adc + - st,stm32mp1-adc + + reg: + description: | + Offset of ADC instance in ADC block. Valid values are: + - 0x0: ADC1 + - 0x100: ADC2 + - 0x200: ADC3 (stm32f4 only) + maxItems: 1 + + '#io-channel-cells': + const: 1 + + interrupts: + description: | + IRQ Line for the ADC instance. Valid values are: + - 0 for adc@0 + - 1 for adc@100 + - 2 for adc@200 (stm32f4 only) + maxItems: 1 + + clocks: + description: + Input clock private to this ADC instance. It's required only on + stm32f4, that has per instance clock input for registers access. + maxItems: 1 + + dmas: + description: RX DMA Channel + maxItems: 1 + + dma-names: + const: rx + + assigned-resolution-bits: + description: | + Resolution (bits) to use for conversions: + - can be 6, 8, 10 or 12 on stm32f4 + - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1 + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + + st,adc-channels: + description: | + List of single-ended channels muxed for this ADC. It can have up to: + - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4 + - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and + stm32mp1. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + + st,adc-diff-channels: + description: | + List of differential channels muxed for this ADC. Some channels can + be configured as differential instead of single-ended on stm32h7 and + on stm32mp1. Positive and negative inputs pairs are listed: + <vinp vinn>, <vinp vinn>,... vinp and vinn are numbered from 0 to 19. + + Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is + required. Both properties can be used together. Some channels can be + used as single-ended and some other ones as differential (mixed). But + channels can't be configured both as single-ended and differential. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-matrix + - items: + items: + - description: | + "vinp" indicates positive input number + minimum: 0 + maximum: 19 + - description: | + "vinn" indicates negative input number + minimum: 0 + maximum: 19 + + st,min-sample-time-nsecs: + description: + Minimum sampling time in nanoseconds. Depending on hardware (board) + e.g. high/low analog input source impedance, fine tune of ADC + sampling time may be recommended. This can be either one value or an + array that matches "st,adc-channels" and/or "st,adc-diff-channels" + list, to set sample time resp. for all channels, or independently for + each channel. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + + allOf: + - if: + properties: + compatible: + contains: + const: st,stm32f4-adc + + then: + properties: + reg: + enum: + - 0x0 + - 0x100 + - 0x200 + + interrupts: + minimum: 0 + maximum: 2 + + assigned-resolution-bits: + enum: [6, 8, 10, 12] + default: 12 + + st,adc-channels: + minItems: 1 + maxItems: 16 + items: + minimum: 0 + maximum: 15 + + st,adc-diff-channels: false + + st,min-sample-time-nsecs: + minItems: 1 + maxItems: 16 + items: + minimum: 80 + + required: + - clocks + + - if: + properties: + compatible: + contains: + enum: + - st,stm32h7-adc + - st,stm32mp1-adc + + then: + properties: + reg: + enum: + - 0x0 + - 0x100 + + interrupts: + minimum: 0 + maximum: 1 + + assigned-resolution-bits: + enum: [8, 10, 12, 14, 16] + default: 16 + + st,adc-channels: + minItems: 1 + maxItems: 20 + items: + minimum: 0 + maximum: 19 + + st,min-sample-time-nsecs: + minItems: 1 + maxItems: 20 + items: + minimum: 40 + + additionalProperties: false + + anyOf: + - required: + - st,adc-channels + - required: + - st,adc-diff-channels + + required: + - compatible + - reg + - interrupts + - '#io-channel-cells' + +examples: + - | + // Example 1: with stm32f429, ADC1, single-ended channel 8 + adc123: adc@40012000 { + compatible = "st,stm32f4-adc-core"; + reg = <0x40012000 0x400>; + interrupts = <18>; + clocks = <&rcc 0 168>; + clock-names = "adc"; + st,max-clk-rate-hz = <36000000>; + vdda-supply = <&vdda>; + vref-supply = <&vref>; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + adc@0 { + compatible = "st,stm32f4-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + clocks = <&rcc 0 168>; + interrupt-parent = <&adc123>; + interrupts = <0>; + st,adc-channels = <8>; + dmas = <&dma2 0 0 0x400 0x0>; + dma-names = "rx"; + assigned-resolution-bits = <8>; + }; + // ... + // other adc child nodes follow... + }; + + - | + // Example 2: with stm32mp157c to setup ADC1 with: + // - channels 0 & 1 as single-ended + // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs) + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + adc12: adc@48003000 { + compatible = "st,stm32mp1-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC12>, <&rcc ADC12_K>; + clock-names = "bus", "adc"; + booster-supply = <&booster>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vref>; + st,syscfg = <&syscfg>; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + adc@0 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + interrupt-parent = <&adc12>; + interrupts = <0>; + st,adc-channels = <0 1>; + st,adc-diff-channels = <2 6>, <3 7>; + st,min-sample-time-nsecs = <5000>; + dmas = <&dmamux1 9 0x400 0x05>; + dma-names = "rx"; + }; + // ... + // other adc child node follow... + }; + +... diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml index acf36eef728b..b1627441a0b2 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -69,6 +69,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + patternProperties: "^filter@[0-9]+$": type: object diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml new file mode 100644 index 000000000000..1c6d49685e9f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/amplifiers/adi,hmc425a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HMC425A 6-bit Digital Step Attenuator + +maintainers: +- Michael Hennerich <michael.hennerich@analog.com> +- Beniamin Bia <beniamin.bia@analog.com> + +description: | + Digital Step Attenuator IIO device with gpio interface. + HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz + https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf + +properties: + compatible: + enum: + - adi,hmc425a + + vcc-supply: true + + ctrl-gpios: + description: + Must contain an array of 6 GPIO specifiers, referring to the GPIO pins + connected to the control pins V1-V6. + minItems: 6 + maxItems: 6 + +required: + - compatible + - ctrl-gpios + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + gpio_hmc425a: hmc425a { + compatible = "adi,hmc425a"; + ctrl-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>, + <&gpio 39 GPIO_ACTIVE_HIGH>, + <&gpio 38 GPIO_ACTIVE_HIGH>, + <&gpio 37 GPIO_ACTIVE_HIGH>, + <&gpio 36 GPIO_ACTIVE_HIGH>, + <&gpio 35 GPIO_ACTIVE_HIGH>; + vcc-supply = <&foo>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/chemical/atlas,ec-sm.txt b/Documentation/devicetree/bindings/iio/chemical/atlas,ec-sm.txt deleted file mode 100644 index f4320595b851..000000000000 --- a/Documentation/devicetree/bindings/iio/chemical/atlas,ec-sm.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Atlas Scientific EC-SM OEM sensor - -http://www.atlas-scientific.com/_files/_datasheets/_oem/EC_oem_datasheet.pdf - -Required properties: - - - compatible: must be "atlas,ec-sm" - - reg: the I2C address of the sensor - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic interrupt client - node bindings. - -Example: - -atlas@64 { - compatible = "atlas,ec-sm"; - reg = <0x64>; - interrupt-parent = <&gpio1>; - interrupts = <16 2>; -}; diff --git a/Documentation/devicetree/bindings/iio/chemical/atlas,orp-sm.txt b/Documentation/devicetree/bindings/iio/chemical/atlas,orp-sm.txt deleted file mode 100644 index af1f5a9aa4da..000000000000 --- a/Documentation/devicetree/bindings/iio/chemical/atlas,orp-sm.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Atlas Scientific ORP-SM OEM sensor - -https://www.atlas-scientific.com/_files/_datasheets/_oem/ORP_oem_datasheet.pdf - -Required properties: - - - compatible: must be "atlas,orp-sm" - - reg: the I2C address of the sensor - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic interrupt client - node bindings. - -Example: - -atlas@66 { - compatible = "atlas,orp-sm"; - reg = <0x66>; - interrupt-parent = <&gpio1>; - interrupts = <16 2>; -}; diff --git a/Documentation/devicetree/bindings/iio/chemical/atlas,ph-sm.txt b/Documentation/devicetree/bindings/iio/chemical/atlas,ph-sm.txt deleted file mode 100644 index 79d90f060327..000000000000 --- a/Documentation/devicetree/bindings/iio/chemical/atlas,ph-sm.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Atlas Scientific pH-SM OEM sensor - -http://www.atlas-scientific.com/_files/_datasheets/_oem/pH_oem_datasheet.pdf - -Required properties: - - - compatible: must be "atlas,ph-sm" - - reg: the I2C address of the sensor - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic interrupt client - node bindings. - -Example: - -atlas@65 { - compatible = "atlas,ph-sm"; - reg = <0x65>; - interrupt-parent = <&gpio1>; - interrupts = <16 2>; -}; diff --git a/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml b/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml new file mode 100644 index 000000000000..edcd2904d50e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/chemical/atlas,sensor.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atlas Scientific OEM sensors + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +description: | + Atlas Scientific OEM sensors connected via I2C + + Datasheets: + http://www.atlas-scientific.com/_files/_datasheets/_oem/DO_oem_datasheet.pdf + http://www.atlas-scientific.com/_files/_datasheets/_oem/EC_oem_datasheet.pdf + http://www.atlas-scientific.com/_files/_datasheets/_oem/ORP_oem_datasheet.pdf + http://www.atlas-scientific.com/_files/_datasheets/_oem/pH_oem_datasheet.pdf + +properties: + compatible: + enum: + - atlas,do-sm + - atlas,ec-sm + - atlas,orp-sm + - atlas,ph-sm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + atlas@66 { + compatible = "atlas,orp-sm"; + reg = <0x66>; + interrupt-parent = <&gpio1>; + interrupts = <16 2>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/chemical/plantower,pms7003.yaml b/Documentation/devicetree/bindings/iio/chemical/plantower,pms7003.yaml index 19e53930ebf6..1fe561574019 100644 --- a/Documentation/devicetree/bindings/iio/chemical/plantower,pms7003.yaml +++ b/Documentation/devicetree/bindings/iio/chemical/plantower,pms7003.yaml @@ -38,6 +38,8 @@ required: - compatible - vcc-supply +additionalProperties: false + examples: - | serial { diff --git a/Documentation/devicetree/bindings/iio/chemical/sensirion,sps30.yaml b/Documentation/devicetree/bindings/iio/chemical/sensirion,sps30.yaml index 50a50a0d7070..a93d1972a5c2 100644 --- a/Documentation/devicetree/bindings/iio/chemical/sensirion,sps30.yaml +++ b/Documentation/devicetree/bindings/iio/chemical/sensirion,sps30.yaml @@ -24,6 +24,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml new file mode 100644 index 000000000000..d9c25cf4b92f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/iio/dac/adi,ad5770r.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5770R DAC device driver + +maintainers: + - Mircea Caprioru <mircea.caprioru@analog.com> + +description: | + Bindings for the Analog Devices AD5770R current DAC device. Datasheet can be + found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD5770R.pdf + +properties: + compatible: + enum: + - adi,ad5770r + + reg: + maxItems: 1 + + avdd-supply: + description: + AVdd voltage supply. Represents two different supplies in the datasheet + that are in fact the same. + + iovdd-supply: + description: + Voltage supply for the chip interface. + + vref-supply: + description: Specify the voltage of the external reference used. + Available reference options are 1.25 V or 2.5 V. If no + external reference declared then the device will use the + internal reference of 1.25 V. + + adi,external-resistor: + description: Specify if an external 2.5k ohm resistor is used. If not + specified the device will use an internal 2.5k ohm resistor. + The precision resistor is used for reference current generation. + type: boolean + + reset-gpios: + description: GPIO spec for the RESET pin. If specified, it will be + asserted during driver probe. + maxItems: 1 + + channel0: + description: Represents an external channel which are + connected to the DAC. Channel 0 can act both as a current + source and sink. + type: object + + properties: + num: + description: This represents the channel number. + items: + const: 0 + + adi,range-microamp: + description: Output range of the channel. + oneOf: + - $ref: /schemas/types.yaml#/definitions/int32-array + - items: + - enum: [0 300000] + - enum: [-60000 0] + - enum: [-60000 300000] + + channel1: + description: Represents an external channel which are + connected to the DAC. + type: object + + properties: + num: + description: This represents the channel number. + items: + const: 1 + + adi,range-microamp: + description: Output range of the channel. + oneOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + - enum: [0 140000] + - enum: [0 250000] + + channel2: + description: Represents an external channel which are + connected to the DAC. + type: object + + properties: + num: + description: This represents the channel number. + items: + const: 2 + + adi,range-microamp: + description: Output range of the channel. + oneOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + - enum: [0 140000] + - enum: [0 250000] + +patternProperties: + "^channel@([3-5])$": + type: object + description: Represents the external channels which are connected to the DAC. + properties: + num: + description: This represents the channel number. + items: + minimum: 3 + maximum: 5 + + adi,range-microamp: + description: Output range of the channel. + oneOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + - enum: [0 45000] + - enum: [0 100000] + +required: +- reg +- diff-channels +- channel0 +- channel1 +- channel2 +- channel3 +- channel4 +- channel5 + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + ad5770r@0 { + compatible = "ad5770r"; + reg = <0>; + spi-max-frequency = <1000000>; + vref-supply = <&vref>; + adi,external-resistor; + reset-gpios = <&gpio 22 0>; + + channel@0 { + num = <0>; + adi,range-microamp = <(-60000) 300000>; + }; + + channel@1 { + num = <1>; + adi,range-microamp = <0 140000>; + }; + + channel@2 { + num = <2>; + adi,range-microamp = <0 55000>; + }; + + channel@3 { + num = <3>; + adi,range-microamp = <0 45000>; + }; + + channel@4 { + num = <4>; + adi,range-microamp = <0 45000>; + }; + + channel@5 { + num = <5>; + adi,range-microamp = <0 45000>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml b/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml index a285eaba7125..e51a585bd5a3 100644 --- a/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml +++ b/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml @@ -34,6 +34,8 @@ required: - reg - vref-supply +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt b/Documentation/devicetree/bindings/iio/dac/ltc2632.txt index e0d5fea33031..338c3220f01a 100644 --- a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt +++ b/Documentation/devicetree/bindings/iio/dac/ltc2632.txt @@ -1,4 +1,4 @@ -Linear Technology LTC2632 DAC device driver +Linear Technology LTC2632/2636 DAC Required properties: - compatible: Has to contain one of the following: @@ -8,6 +8,12 @@ Required properties: lltc,ltc2632-h12 lltc,ltc2632-h10 lltc,ltc2632-h8 + lltc,ltc2636-l12 + lltc,ltc2636-l10 + lltc,ltc2636-l8 + lltc,ltc2636-h12 + lltc,ltc2636-h10 + lltc,ltc2636-h8 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt apply. In particular, "reg" and "spi-max-frequency" properties must be given. diff --git a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt index c5ee8a20af9f..f2f64749e818 100644 --- a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt +++ b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt @@ -4,6 +4,7 @@ http://www.invensense.com/mems/gyro/mpu6050.html Required properties: - compatible : should be one of + "invensense,mpu6000" "invensense,mpu6050" "invensense,mpu6500" "invensense,mpu6515" @@ -11,7 +12,11 @@ Required properties: "invensense,mpu9250" "invensense,mpu9255" "invensense,icm20608" + "invensense,icm20609" + "invensense,icm20689" "invensense,icm20602" + "invensense,icm20690" + "invensense,iam20680" - reg : the I2C address of the sensor - interrupts: interrupt mapping for IRQ. It should be configured with flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or diff --git a/Documentation/devicetree/bindings/iio/light/adux1020.yaml b/Documentation/devicetree/bindings/iio/light/adux1020.yaml index 69bd5c06319d..d7d14f2f1c20 100644 --- a/Documentation/devicetree/bindings/iio/light/adux1020.yaml +++ b/Documentation/devicetree/bindings/iio/light/adux1020.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/light/bh1750.yaml b/Documentation/devicetree/bindings/iio/light/bh1750.yaml index 1cc60d7ecfa0..1a88b3c253d5 100644 --- a/Documentation/devicetree/bindings/iio/light/bh1750.yaml +++ b/Documentation/devicetree/bindings/iio/light/bh1750.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml new file mode 100644 index 000000000000..f671edda6641 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/dynaimage,al3010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dyna-Image AL3010 sensor + +maintainers: + - David Heidelberg <david@ixit.cz> + +properties: + compatible: + const: dynaimage,al3010 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: + description: Regulator that provides power to the sensor + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@1c { + compatible = "dynaimage,al3010"; + reg = <0x1c>; + vdd-supply = <&vdd_reg>; + interrupts = <0 99 4>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml new file mode 100644 index 000000000000..497300239d93 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/dynaimage,al3320a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dyna-Image AL3320A sensor + +maintainers: + - David Heidelberg <david@ixit.cz> + +properties: + compatible: + const: dynaimage,al3320a + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: + description: Regulator that provides power to the sensor + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@1c { + compatible = "dynaimage,al3320a"; + reg = <0x1c>; + vdd-supply = <&vdd_reg>; + interrupts = <0 99 4>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/light/isl29018.yaml b/Documentation/devicetree/bindings/iio/light/isl29018.yaml index cbb00be8f359..0ea278b07d1c 100644 --- a/Documentation/devicetree/bindings/iio/light/isl29018.yaml +++ b/Documentation/devicetree/bindings/iio/light/isl29018.yaml @@ -38,6 +38,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/light/noa1305.yaml b/Documentation/devicetree/bindings/iio/light/noa1305.yaml index 17e7f140b69b..fe7bfe1adbda 100644 --- a/Documentation/devicetree/bindings/iio/light/noa1305.yaml +++ b/Documentation/devicetree/bindings/iio/light/noa1305.yaml @@ -29,6 +29,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml new file mode 100644 index 000000000000..12aa16f24772 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/sharp,gp2ap002.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sharp GP2AP002A00F and GP2AP002S00F proximity and ambient light sensors + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: | + Proximity and ambient light sensor with IR LED for the proximity + sensing and an analog output for light intensity. The ambient light + sensor output is not available on the GP2AP002S00F variant. + +properties: + compatible: + enum: + - sharp,gp2ap002a00f + - sharp,gp2ap002s00f + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: an interrupt for proximity, usually a GPIO line + + vdd-supply: + description: VDD power supply a phandle to a regulator + + vio-supply: + description: VIO power supply a phandle to a regulator + + io-channels: + maxItems: 1 + description: ALSOUT ADC channel to read the ambient light + + io-channel-names: + const: alsout + + sharp,proximity-far-hysteresis: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + Hysteresis setting for "far" object detection, this setting is + device-unique and adjust the optical setting for proximity detection + of a "far away" object in front of the sensor. + + sharp,proximity-close-hysteresis: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + Hysteresis setting for "close" object detection, this setting is + device-unique and adjust the optical setting for proximity detection + of a "close" object in front of the sensor. + +required: + - compatible + - reg + - interrupts + - sharp,proximity-far-hysteresis + - sharp,proximity-close-hysteresis + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@44 { + compatible = "sharp,gp2ap002a00f"; + reg = <0x44>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&vdd_regulator>; + vio-supply = <&vio_regulator>; + io-channels = <&adc_channel>; + io-channel-names = "alsout"; + sharp,proximity-far-hysteresis = /bits/ 8 <0x2f>; + sharp,proximity-close-hysteresis = /bits/ 8 <0x0f>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/iio/light/stk33xx.yaml b/Documentation/devicetree/bindings/iio/light/stk33xx.yaml index aae8a6d627c9..f92bf7b2b7f0 100644 --- a/Documentation/devicetree/bindings/iio/light/stk33xx.yaml +++ b/Documentation/devicetree/bindings/iio/light/stk33xx.yaml @@ -30,6 +30,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/light/tsl2583.yaml b/Documentation/devicetree/bindings/iio/light/tsl2583.yaml index e86ef64ecf03..7b92ba8cbb9f 100644 --- a/Documentation/devicetree/bindings/iio/light/tsl2583.yaml +++ b/Documentation/devicetree/bindings/iio/light/tsl2583.yaml @@ -32,6 +32,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/light/tsl2772.yaml b/Documentation/devicetree/bindings/iio/light/tsl2772.yaml index ed2c3d5eadf5..e8f7d1ada57b 100644 --- a/Documentation/devicetree/bindings/iio/light/tsl2772.yaml +++ b/Documentation/devicetree/bindings/iio/light/tsl2772.yaml @@ -62,6 +62,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/light/veml6030.yaml b/Documentation/devicetree/bindings/iio/light/veml6030.yaml index 0ff9b11f9d18..fb19a2d7a849 100644 --- a/Documentation/devicetree/bindings/iio/light/veml6030.yaml +++ b/Documentation/devicetree/bindings/iio/light/veml6030.yaml @@ -45,6 +45,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml b/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml index 9f5ca9c42025..64c18f1693f0 100644 --- a/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml @@ -33,6 +33,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml index 519137e5c170..49257f9251e8 100644 --- a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml @@ -25,6 +25,9 @@ properties: - bosch,bmp280 - bosch,bme280 + reg: + maxItems: 1 + vddd-supply: description: digital voltage regulator (see regulator/regulator.txt) @@ -49,6 +52,8 @@ required: - vddd-supply - vdda-supply +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/proximity/devantech-srf04.yaml b/Documentation/devicetree/bindings/iio/proximity/devantech-srf04.yaml index 4e80ea7c1475..f86f8b23ef18 100644 --- a/Documentation/devicetree/bindings/iio/proximity/devantech-srf04.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/devantech-srf04.yaml @@ -51,11 +51,31 @@ properties: the time between two interrupts is measured in the driver. maxItems: 1 + power-gpios: + description: + Definition of the GPIO for power management of connected peripheral + (output). + This GPIO can be used by the external hardware for power management. + When the device gets suspended it's switched off and when it resumes + it's switched on again. After some period of inactivity the driver + get suspended automatically (autosuspend feature). + maxItems: 1 + + startup-time-ms: + description: + This is the startup time the device needs after a resume to be up and + running. + minimum: 0 + maximum: 1000 + default: 100 + required: - compatible - trig-gpios - echo-gpios +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/proximity/parallax-ping.yaml b/Documentation/devicetree/bindings/iio/proximity/parallax-ping.yaml index a079c9921af6..ada55f186f3c 100644 --- a/Documentation/devicetree/bindings/iio/proximity/parallax-ping.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/parallax-ping.yaml @@ -42,6 +42,8 @@ required: - compatible - ping-gpios +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml index d4922f9f0376..8fb46de6641d 100644 --- a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml @@ -123,12 +123,11 @@ patternProperties: sign. allOf: - $ref: /schemas/types.yaml#/definitions/uint64-matrix + minItems: 3 + maxItems: 64 items: - minItems: 3 - maxItems: 64 - items: - minItems: 2 - maxItems: 2 + minItems: 2 + maxItems: 2 "^diode@": type: object @@ -328,12 +327,11 @@ patternProperties: 78 and 79. allOf: - $ref: /schemas/types.yaml#/definitions/uint64-matrix + minItems: 3 + maxItems: 64 items: - minItems: 3 - maxItems: 64 - items: - minItems: 2 - maxItems: 2 + minItems: 2 + maxItems: 2 adi,custom-steinhart: description: @@ -398,6 +396,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> @@ -463,16 +463,16 @@ examples: adi,sensor-type = <9>; //custom thermocouple adi,single-ended; adi,custom-thermocouple = /bits/ 64 - <(-50220000) 0 - (-30200000) 99100000 - (-5300000) 135400000 - 0 273150000 - 40200000 361200000 - 55300000 522100000 - 88300000 720300000 - 132200000 811200000 - 188700000 922500000 - 460400000 1000000000>; //10 pairs + <(-50220000) 0>, + <(-30200000) 99100000>, + <(-5300000) 135400000>, + <0 273150000>, + <40200000 361200000>, + <55300000 522100000>, + <88300000 720300000>, + <132200000 811200000>, + <188700000 922500000>, + <460400000 1000000000>; //10 pairs }; }; diff --git a/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt b/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt index ef2ae729718f..921172f689b8 100644 --- a/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt +++ b/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt @@ -5,6 +5,7 @@ Required properties: * "cypress,tm2-touchkey" - for the touchkey found on the tm2 board * "cypress,midas-touchkey" - for the touchkey found on midas boards * "cypress,aries-touchkey" - for the touchkey found on aries boards + * "coreriver,tc360-touchkey" - for the Coreriver TouchCore 360 touchkey - reg: I2C address of the chip. - interrupts: interrupt to which the chip is connected (see interrupt binding[0]). diff --git a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml index b98bf9363c8f..2384465eaa19 100644 --- a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml +++ b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml @@ -26,6 +26,8 @@ required: - compatible - enable-gpios +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/input/iqs62x-keys.yaml b/Documentation/devicetree/bindings/input/iqs62x-keys.yaml new file mode 100644 index 000000000000..5625c222903a --- /dev/null +++ b/Documentation/devicetree/bindings/input/iqs62x-keys.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/iqs62x-keys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Azoteq IQS620A/621/622/624/625 Keys and Switches + +maintainers: + - Jeff LaBundy <jeff@labundy.com> + +description: | + The Azoteq IQS620A, IQS621, IQS622, IQS624 and IQS625 multi-function sensors + feature a variety of self-capacitive, mutual-inductive and Hall-effect sens- + ing capabilities that can facilitate a variety of contactless key and switch + applications. + + These functions are collectively represented by a "keys" child node from the + parent MFD driver. See Documentation/devicetree/bindings/mfd/iqs62x.yaml for + further details and examples. Sensor hardware configuration (self-capacitive + vs. mutual-inductive, etc.) is selected based on the device's firmware. + +properties: + compatible: + enum: + - azoteq,iqs620a-keys + - azoteq,iqs621-keys + - azoteq,iqs622-keys + - azoteq,iqs624-keys + - azoteq,iqs625-keys + + linux,keycodes: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - minItems: 1 + maxItems: 16 + description: | + Specifies the numeric keycodes associated with each available touch or + proximity event according to the following table. An 'x' indicates the + event is supported for a given device. Specify 0 for unused events. + + ------------------------------------------------------------------------- + | # | Event | IQS620A | IQS621 | IQS622 | IQS624 | IQS625 | + ------------------------------------------------------------------------- + | 0 | CH0 Touch | x | x | x | x | x | + | | Antenna 1 Touch* | x | | | | | + ------------------------------------------------------------------------- + | 1 | CH0 Proximity | x | x | x | x | x | + | | Antenna 1 Prox.* | x | | | | | + ------------------------------------------------------------------------- + | 2 | CH1 Touch | x | x | x | x | x | + | | Ant. 1 Deep Touch* | x | | | | | + ------------------------------------------------------------------------- + | 3 | CH1 Proximity | x | x | x | x | x | + ------------------------------------------------------------------------- + | 4 | CH2 Touch | x | | | | | + ------------------------------------------------------------------------- + | 5 | CH2 Proximity | x | | | | | + | | Antenna 2 Prox.* | x | | | | | + ------------------------------------------------------------------------- + | 6 | Metal (+) Touch** | x | x | | | | + | | Ant. 2 Deep Touch* | x | | | | | + ------------------------------------------------------------------------- + | 7 | Metal (+) Prox.** | x | x | | | | + | | Antenna 2 Touch* | x | | | | | + ------------------------------------------------------------------------- + | 8 | Metal (-) Touch** | x | x | | | | + ------------------------------------------------------------------------- + | 9 | Metal (-) Prox.** | x | x | | | | + ------------------------------------------------------------------------- + | 10 | SAR Active*** | x | | x | | | + ------------------------------------------------------------------------- + | 11 | SAR Quick Rel.*** | x | | x | | | + ------------------------------------------------------------------------- + | 12 | SAR Movement*** | x | | x | | | + ------------------------------------------------------------------------- + | 13 | SAR Filter Halt*** | x | | x | | | + ------------------------------------------------------------------------- + | 14 | Wheel Up | | | | x | | + ------------------------------------------------------------------------- + | 15 | Wheel Down | | | | x | | + ------------------------------------------------------------------------- + * Two-channel SAR. Replaces CH0-2 plus metal touch and proximity events + if enabled via firmware. + ** "+" and "-" refer to the polarity of a channel's delta (LTA - counts), + where "LTA" is defined as the channel's long-term average. + *** One-channel SAR. Replaces CH0-2 touch and proximity events if enabled + via firmware. + +patternProperties: + "^hall-switch-(north|south)$": + type: object + description: + Represents north/south-field Hall-effect sensor touch or proximity + events. Note that north/south-field orientation is reversed on the + IQS620AXzCSR device due to its flip-chip package. + + properties: + linux,code: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Numeric switch code associated with the event. + + azoteq,use-prox: + $ref: /schemas/types.yaml#/definitions/flag + description: + If present, specifies that Hall-effect sensor reporting should + use the device's wide-range proximity threshold instead of its + close-range touch threshold (default). + + required: + - linux,code + + additionalProperties: false + +if: + properties: + compatible: + contains: + enum: + - azoteq,iqs624-keys + - azoteq,iqs625-keys +then: + patternProperties: + "^hall-switch-(north|south)$": false + +required: + - compatible + - linux,keycodes + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/input/max77650-onkey.yaml b/Documentation/devicetree/bindings/input/max77650-onkey.yaml index 2f2e0b6ebbbd..3a2ad6ec64db 100644 --- a/Documentation/devicetree/bindings/input/max77650-onkey.yaml +++ b/Documentation/devicetree/bindings/input/max77650-onkey.yaml @@ -33,3 +33,6 @@ properties: required: - compatible +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/input/st,stpmic1-onkey.txt b/Documentation/devicetree/bindings/input/st,stpmic1-onkey.txt deleted file mode 100644 index eb8e83736c02..000000000000 --- a/Documentation/devicetree/bindings/input/st,stpmic1-onkey.txt +++ /dev/null @@ -1,28 +0,0 @@ -STMicroelectronics STPMIC1 Onkey - -Required properties: - -- compatible = "st,stpmic1-onkey"; -- interrupts: interrupt line to use -- interrupt-names = "onkey-falling", "onkey-rising" - onkey-falling: happens when onkey is pressed; IT_PONKEY_F of pmic - onkey-rising: happens when onkey is released; IT_PONKEY_R of pmic - -Optional properties: - -- st,onkey-clear-cc-flag: onkey is able power on after an - over-current shutdown event. -- st,onkey-pu-inactive: onkey pull up is not active -- power-off-time-sec: Duration in seconds which the key should be kept - pressed for device to power off automatically (from 1 to 16 seconds). - see See Documentation/devicetree/bindings/input/input.yaml - -Example: - -onkey { - compatible = "st,stpmic1-onkey"; - interrupt-parent = <&pmic>; - interrupts = <IT_PONKEY_F 0>,<IT_PONKEY_R 1>; - interrupt-names = "onkey-falling", "onkey-rising"; - power-off-time-sec = <10>; -}; diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt deleted file mode 100644 index 0e57315e9cbd..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt +++ /dev/null @@ -1,77 +0,0 @@ -FocalTech EDT-FT5x06 Polytouch driver -===================================== - -There are 5 variants of the chip for various touch panel sizes -FT5206GE1 2.8" .. 3.8" -FT5306DE4 4.3" .. 7" -FT5406EE8 7" .. 8.9" -FT5506EEG 7" .. 8.9" -FT5726NEI 5.7” .. 11.6" - -The software interface is identical for all those chips, so that -currently there is no need for the driver to distinguish between the -different chips. Nevertheless distinct compatible strings are used so -that a distinction can be added if necessary without changing the DT -bindings. - - -Required properties: - - compatible: "edt,edt-ft5206" - or: "edt,edt-ft5306" - or: "edt,edt-ft5406" - or: "edt,edt-ft5506" - or: "evervision,ev-ft5726" - or: "focaltech,ft6236" - - - reg: I2C slave address of the chip (0x38) - - interrupts: interrupt specification for the touchdetect - interrupt - -Optional properties: - - reset-gpios: GPIO specification for the RESET input - - wake-gpios: GPIO specification for the WAKE input - - vcc-supply: Regulator that supplies the touchscreen - - - pinctrl-names: should be "default" - - pinctrl-0: a phandle pointing to the pin settings for the - control gpios - - - wakeup-source: If present the device will act as wakeup-source - - - threshold: allows setting the "click"-threshold in the range - from 0 to 80. - - - gain: allows setting the sensitivity in the range from 0 to - 31. Note that lower values indicate higher - sensitivity. - - - offset: allows setting the edge compensation in the range from - 0 to 31. - - - offset-x: Same as offset, but applies only to the horizontal position. - Range from 0 to 80, only supported by evervision,ev-ft5726 - devices. - - - offset-y: Same as offset, but applies only to the vertical position. - Range from 0 to 80, only supported by evervision,ev-ft5726 - devices. - - - touchscreen-size-x : See touchscreen.txt - - touchscreen-size-y : See touchscreen.txt - - touchscreen-fuzz-x : See touchscreen.txt - - touchscreen-fuzz-y : See touchscreen.txt - - touchscreen-inverted-x : See touchscreen.txt - - touchscreen-inverted-y : See touchscreen.txt - - touchscreen-swapped-x-y : See touchscreen.txt - -Example: - polytouch: edt-ft5x06@38 { - compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&edt_ft5x06_pins>; - interrupt-parent = <&gpio2>; - interrupts = <5 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; - wake-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; - }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml new file mode 100644 index 000000000000..8d58709d4b47 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/edt-ft5x06.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FocalTech EDT-FT5x06 Polytouch Bindings + +description: | + There are 5 variants of the chip for various touch panel sizes + FT5206GE1 2.8" .. 3.8" + FT5306DE4 4.3" .. 7" + FT5406EE8 7" .. 8.9" + FT5506EEG 7" .. 8.9" + FT5726NEI 5.7” .. 11.6" + +maintainers: + - Dmitry Torokhov <dmitry.torokhov@gmail.com> + +allOf: + - $ref: touchscreen.yaml# + - if: + properties: + compatible: + contains: + enum: + - evervision,ev-ft5726 + + then: + properties: + offset-x: true + offset-y: true + +properties: + compatible: + enum: + - edt,edt-ft5206 + - edt,edt-ft5306 + - edt,edt-ft5406 + - edt,edt-ft5506 + - evervision,ev-ft5726 + - focaltech,ft6236 + + reg: + const: 0x38 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + wake-gpios: + maxItems: 1 + + wakeup-source: true + + vcc-supply: + maxItems: 1 + + gain: + description: Allows setting the sensitivity in the range from 0 to 31. + Note that lower values indicate higher sensitivity. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 31 + + offset: + description: Allows setting the edge compensation in the range from 0 to 31. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 31 + + offset-x: + description: Same as offset, but applies only to the horizontal position. + Range from 0 to 80, only supported by evervision,ev-ft5726 devices. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 80 + + offset-y: + description: Same as offset, but applies only to the vertical position. + Range from 0 to 80, only supported by evervision,ev-ft5726 devices. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 80 + + touchscreen-size-x: true + touchscreen-size-y: true + touchscreen-fuzz-x: true + touchscreen-fuzz-y: true + touchscreen-inverted-x: true + touchscreen-inverted-y: true + touchscreen-swapped-x-y: true + interrupt-controller: true + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + i2c@00000000 { + #address-cells = <1>; + #size-cells = <0>; + edt-ft5x06@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&gpio2>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; + wake-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml index c99ed3934d7e..c8ea9434c9cc 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml @@ -21,6 +21,8 @@ properties: - goodix,gt911 - goodix,gt9110 - goodix,gt912 + - goodix,gt9147 + - goodix,gt917s - goodix,gt927 - goodix,gt9271 - goodix,gt928 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml b/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml new file mode 100644 index 000000000000..5971fc1df08d --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm BCM-Voter Interconnect + +maintainers: + - Georgi Djakov <georgi.djakov@linaro.org> + +description: | + The Bus Clock Manager (BCM) is a dedicated hardware accelerator that manages + shared system resources by aggregating requests from multiple Resource State + Coordinators (RSC). Interconnect providers are able to vote for aggregated + thresholds values from consumers by communicating through their respective + RSCs. + +properties: + compatible: + enum: + - qcom,bcm-voter + +required: + - compatible + +additionalProperties: false + +examples: + # Example 1: apps bcm_voter on SDM845 SoC should be defined inside &apps_rsc node + # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt + - | + + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; + + # Example 2: disp bcm_voter on SDM845 should be defined inside &disp_rsc node + # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt + - | + + disp_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; +... diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml new file mode 100644 index 000000000000..91f70c9067d1 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider + +maintainers: + - Sibi Sankar <sibis@codeaurora.org> + +description: + L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM. + The OSM L3 interconnect provider aggregates the L3 bandwidth requests + from CPU/GPU and relays it to the OSM. + +properties: + compatible: + enum: + - qcom,sc7180-osm-l3 + - qcom,sdm845-osm-l3 + + reg: + maxItems: 1 + + clocks: + items: + - description: xo clock + - description: alternate clock + + clock-names: + items: + - const: xo + - const: alternate + + '#interconnect-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#interconnect-cells' + +additionalProperties: false + +examples: + - | + + #define GPLL0 165 + #define RPMH_CXO_CLK 0 + + osm_l3: interconnect@17d41000 { + compatible = "qcom,sdm845-osm-l3"; + reg = <0x17d41000 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml new file mode 100644 index 000000000000..50f78f87f3fb --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sc7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7180 Network-On-Chip Interconnect + +maintainers: + - Odelu Kukatla <okukatla@codeaurora.org> + +description: | + SC7180 interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + +properties: + reg: + maxItems: 1 + + compatible: + enum: + - qcom,sc7180-aggre1-noc + - qcom,sc7180-aggre2-noc + - qcom,sc7180-camnoc-virt + - qcom,sc7180-compute-noc + - qcom,sc7180-config-noc + - qcom,sc7180-dc-noc + - qcom,sc7180-gem-noc + - qcom,sc7180-ipa-virt + - qcom,sc7180-mc-virt + - qcom,sc7180-mmss-noc + - qcom,sc7180-npu-noc + - qcom,sc7180-qup-virt + - qcom,sc7180-system-noc + + '#interconnect-cells': + const: 1 + + qcom,bcm-voters: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + List of phandles to qcom,bcm-voter nodes that are required by + this interconnect to send RPMh commands. + + qcom,bcm-voter-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: | + Names for each of the qcom,bcm-voters specified. + +required: + - compatible + - reg + - '#interconnect-cells' + - qcom,bcm-voters + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interconnect/qcom,sc7180.h> + + config_noc: interconnect@1500000 { + compatible = "qcom,sc7180-config-noc"; + reg = <0 0x01500000 0 0x28000>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + system_noc: interconnect@1620000 { + compatible = "qcom,sc7180-system-noc"; + reg = <0 0x01620000 0 0x17080>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + mmss_noc: interconnect@1740000 { + compatible = "qcom,sc7180-mmss-noc"; + reg = <0 0x01740000 0 0x1c100>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.txt b/Documentation/devicetree/bindings/interconnect/qcom,sdm845.txt deleted file mode 100644 index 5c4f1d911630..000000000000 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.txt +++ /dev/null @@ -1,24 +0,0 @@ -Qualcomm SDM845 Network-On-Chip interconnect driver binding ------------------------------------------------------------ - -SDM845 interconnect providers support system bandwidth requirements through -RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is -able to communicate with the BCM through the Resource State Coordinator (RSC) -associated with each execution environment. Provider nodes must reside within -an RPMh device node pertaining to their RSC and each provider maps to a single -RPMh resource. - -Required properties : -- compatible : shall contain only one of the following: - "qcom,sdm845-rsc-hlos" -- #interconnect-cells : should contain 1 - -Examples: - -apps_rsc: rsc { - rsc_hlos: interconnect { - compatible = "qcom,sdm845-rsc-hlos"; - #interconnect-cells = <1>; - }; -}; - diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml new file mode 100644 index 000000000000..8b087e0b0b81 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sdm845.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM845 Network-On-Chip Interconnect + +maintainers: + - Georgi Djakov <georgi.djakov@linaro.org> + +description: | + SDM845 interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + +properties: + reg: + maxItems: 1 + + compatible: + enum: + - qcom,sdm845-aggre1-noc + - qcom,sdm845-aggre2-noc + - qcom,sdm845-config-noc + - qcom,sdm845-dc-noc + - qcom,sdm845-gladiator-noc + - qcom,sdm845-mem-noc + - qcom,sdm845-mmss-noc + - qcom,sdm845-system-noc + + '#interconnect-cells': + const: 1 + + qcom,bcm-voters: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + List of phandles to qcom,bcm-voter nodes that are required by + this interconnect to send RPMh commands. + + qcom,bcm-voter-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: | + Names for each of the qcom,bcm-voters specified. + +required: + - compatible + - reg + - '#interconnect-cells' + - qcom,bcm-voters + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interconnect/qcom,sdm845.h> + + mem_noc: interconnect@1380000 { + compatible = "qcom,sdm845-mem-noc"; + reg = <0 0x01380000 0 0x27200>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + mmss_noc: interconnect@1740000 { + compatible = "qcom,sdm845-mmss-noc"; + reg = <0 0x01740000 0 0x1c1000>; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "apps", "disp"; + qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml index 507c141ea760..ccc507f384d2 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml @@ -44,6 +44,8 @@ required: - interrupt-controller - '#interrupt-cells' +additionalProperties: false + examples: - | intcon: interrupt-controller@c8003000 { diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml new file mode 100644 index 000000000000..c8861cbbb8b5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson-3 HyperTransport Interrupt Controller + +maintainers: + - Jiaxun Yang <jiaxun.yang@flygoat.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +description: | + This interrupt controller is found in the Loongson-3 family of chips to transmit + interrupts from PCH PIC connected on HyperTransport bus. + +properties: + compatible: + const: loongson,htpic-1.0 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 4 + description: | + Four parent interrupts that receive chained interrupts. + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + htintc: interrupt-controller@1fb000080 { + compatible = "loongson,htintc-1.0"; + reg = <0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml new file mode 100644 index 000000000000..9c6b91fee477 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson Local I/O Interrupt Controller + +maintainers: + - Jiaxun Yang <jiaxun.yang@flygoat.com> + +description: | + This interrupt controller is found in the Loongson-3 family of chips as the primary + package interrupt controller which can route local I/O interrupt to interrupt lines + of cores. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + oneOf: + - const: loongson,liointc-1.0 + - const: loongson,liointc-1.0a + + reg: + maxItems: 1 + + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts. + minItems: 1 + maxItems: 4 + + interrupt-names: + description: List of names for the parent interrupts. + items: + - const: int0 + - const: int1 + - const: int2 + - const: int3 + minItems: 1 + maxItems: 4 + + '#interrupt-cells': + const: 2 + + 'loongson,parent_int_map': + description: | + This property points how the children interrupts will be mapped into CPU + interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 + and each bit in the cell refers to a children interrupt fron 0 to 31. + If a CPU interrupt line didn't connected with liointc, then keep it's + cell with zero. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + minItems: 4 + maxItems: 4 + + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - 'loongson,parent_int_map' + + +examples: + - | + iointc: interrupt-controller@3ff01400 { + compatible = "loongson,liointc-1.0"; + reg = <0x3ff01400 0x64>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>, <3>; + interrupt-names = "int0", "int1"; + + loongson,parent_int_map = <0xf0ffffff>, /* int0 */ + <0x0f000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + + }; + +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/msi.txt b/Documentation/devicetree/bindings/interrupt-controller/msi.txt index c60c034dcf19..c20b51df7138 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/msi.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/msi.txt @@ -98,7 +98,7 @@ Example }; msi_c: msi-controller@c { - reg = <0xb 0xf00>; + reg = <0xc 0xf00>; compatible = "vendor-b,another-controller"; msi-controller; /* Each device has some unique ID */ diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.txt b/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.txt deleted file mode 100644 index 48e71d3ac2ad..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.txt +++ /dev/null @@ -1,32 +0,0 @@ -UniPhier AIDET - -UniPhier AIDET (ARM Interrupt Detector) is an add-on block for ARM GIC (Generic -Interrupt Controller). GIC itself can handle only high level and rising edge -interrupts. The AIDET provides logic inverter to support low level and falling -edge interrupts. - -Required properties: -- compatible: Should be one of the following: - "socionext,uniphier-ld4-aidet" - for LD4 SoC - "socionext,uniphier-pro4-aidet" - for Pro4 SoC - "socionext,uniphier-sld8-aidet" - for sLD8 SoC - "socionext,uniphier-pro5-aidet" - for Pro5 SoC - "socionext,uniphier-pxs2-aidet" - for PXs2/LD6b SoC - "socionext,uniphier-ld11-aidet" - for LD11 SoC - "socionext,uniphier-ld20-aidet" - for LD20 SoC - "socionext,uniphier-pxs3-aidet" - for PXs3 SoC -- reg: Specifies offset and length of the register set for the device. -- interrupt-controller: Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an interrupt - source. The value should be 2. The first cell defines the interrupt number - (corresponds to the SPI interrupt number of GIC). The second cell specifies - the trigger type as defined in interrupts.txt in this directory. - -Example: - - aidet: aidet@5fc20000 { - compatible = "socionext,uniphier-pro4-aidet"; - reg = <0x5fc20000 0x200>; - interrupt-controller; - #interrupt-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml b/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml new file mode 100644 index 000000000000..f89ebde76dab --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/socionext,uniphier-aidet.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier AIDET + +description: | + UniPhier AIDET (ARM Interrupt Detector) is an add-on block for ARM GIC + (Generic Interrupt Controller). GIC itself can handle only high level and + rising edge interrupts. The AIDET provides logic inverter to support low + level and falling edge interrupts. + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - socionext,uniphier-ld4-aidet + - socionext,uniphier-pro4-aidet + - socionext,uniphier-sld8-aidet + - socionext,uniphier-pro5-aidet + - socionext,uniphier-pxs2-aidet + - socionext,uniphier-ld6b-aidet + - socionext,uniphier-ld11-aidet + - socionext,uniphier-ld20-aidet + - socionext,uniphier-pxs3-aidet + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: | + The first cell defines the interrupt number (corresponds to the SPI + interrupt number of GIC). The second cell specifies the trigger type as + defined in interrupts.txt in this directory. + const: 2 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@5fc20000 { + compatible = "socionext,uniphier-pro4-aidet"; + reg = <0x5fc20000 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + }; diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml index 7cdd3aaa2ba4..0e33cd9e010e 100644 --- a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml +++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml @@ -80,6 +80,8 @@ required: - clock-names - "#iommu-cells" +additionalProperties: false + examples: - | #include <dt-bindings/clock/exynos5250.h> diff --git a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt index d98a9bf45d6c..193e71ca96b0 100644 --- a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt +++ b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt @@ -1,9 +1,10 @@ -* Aspeed KCS (Keyboard Controller Style) IPMI interface +# Aspeed KCS (Keyboard Controller Style) IPMI interface The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs (Baseboard Management Controllers) and the KCS interface can be used to perform in-band IPMI communication with their host. +## v1 Required properties: - compatible : should be one of "aspeed,ast2400-kcs-bmc" @@ -12,14 +13,21 @@ Required properties: - kcs_chan : The LPC channel number in the controller - kcs_addr : The host CPU IO map address +## v2 +Required properties: +- compatible : should be one of + "aspeed,ast2400-kcs-bmc-v2" + "aspeed,ast2500-kcs-bmc-v2" +- reg : The address and size of the IDR, ODR and STR registers +- interrupts : interrupt generated by the controller +- aspeed,lpc-io-reg : The host CPU LPC IO address for the device Example: - kcs3: kcs3@0 { - compatible = "aspeed,ast2500-kcs-bmc"; - reg = <0x0 0x80>; + kcs3: kcs@24 { + compatible = "aspeed,ast2500-kcs-bmc-v2"; + reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; + aspeed,lpc-reg = <0xca2>; interrupts = <8>; - kcs_chan = <3>; - kcs_addr = <0xCA2>; status = "okay"; }; diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index c60b994fe116..4c270fde4567 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -167,13 +167,13 @@ examples: led-controller { compatible = "gpio-leds"; - led0 { + led-0 { function = LED_FUNCTION_STATUS; linux,default-trigger = "heartbeat"; gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; }; - led1 { + led-1 { function = LED_FUNCTION_USB; gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; trigger-sources = <&ohci_port1>, <&ehci_port1>; diff --git a/Documentation/devicetree/bindings/leds/leds-max77650.yaml b/Documentation/devicetree/bindings/leds/leds-max77650.yaml index 8c43f1e1bf7d..c6f96cabd4d1 100644 --- a/Documentation/devicetree/bindings/leds/leds-max77650.yaml +++ b/Documentation/devicetree/bindings/leds/leds-max77650.yaml @@ -49,3 +49,6 @@ required: - compatible - "#address-cells" - "#size-cells" +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml index b50f4bcc98f1..90edf9d33b33 100644 --- a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml +++ b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml @@ -50,3 +50,6 @@ patternProperties: required: - compatible +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml b/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml new file mode 100644 index 000000000000..75d5d97305e1 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner sunxi Message Box + +maintainers: + - Samuel Holland <samuel@sholland.org> + +description: | + The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a + two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt + is raised for received messages, but software must poll to know when a + transmitted message has been acknowledged by the remote user. Each FIFO can + hold four 32-bit messages; when a FIFO is full, clients must wait before + attempting more transmissions. + + Refer to ./mailbox.txt for generic information about mailbox device-tree + bindings. + +properties: + compatible: + oneOf: + - items: + - enum: + - allwinner,sun8i-a83t-msgbox + - allwinner,sun8i-h3-msgbox + - allwinner,sun9i-a80-msgbox + - allwinner,sun50i-a64-msgbox + - allwinner,sun50i-h6-msgbox + - const: allwinner,sun6i-a31-msgbox + - const: allwinner,sun6i-a31-msgbox + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: bus clock + + resets: + maxItems: 1 + description: bus reset + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + description: first cell is the channel number (0-7) + +required: + - compatible + - reg + - clocks + - resets + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun8i-h3-ccu.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/sun8i-h3-ccu.h> + + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + }; + +... diff --git a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml index 319280563648..aa2b3bf56b57 100644 --- a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml @@ -41,6 +41,8 @@ required: - interrupts - "#mbox-cells" +additionalProperties: false + examples: - | mailbox@c883c404 { diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt index 9c43357c5924..31486c9f6443 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt @@ -23,6 +23,8 @@ Required properties: be included together with SoC specific compatible. There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible to support it. + To communicate with i.MX8 SCU, "fsl,imx8-mu-scu" could be + used for fast IPC - reg : Should contain the registers location and length - interrupts : Interrupt number. The interrupt specifier format depends on the interrupt controller parent. diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt index 7b13787ab13d..0b5b2a6bcc48 100644 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt @@ -14,13 +14,11 @@ Required properties: - interrupts: The interrupt signal from the GCE block - clock: Clocks according to the common clock binding - clock-names: Must be "gce" to stand for GCE clock -- #mbox-cells: Should be 3. - <&phandle channel priority atomic_exec> +- #mbox-cells: Should be 2. + <&phandle channel priority> phandle: Label name of a gce node. channel: Channel of mailbox. Be equal to the thread id of GCE. priority: Priority of GCE thread. - atomic_exec: GCE processing continuous packets of commands in atomic - way. Required properties for a client device: - mboxes: Client use mailbox to communicate with GCE, it should have this @@ -54,8 +52,8 @@ Example for a client device: mmsys: clock-controller@14000000 { compatible = "mediatek,mt8173-mmsys"; - mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>, - <&gce 1 CMDQ_THR_PRIO_LOWEST 1>; + mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>, + <&gce 1 CMDQ_THR_PRIO_LOWEST>; mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF CMDQ_EVENT_MUTEX1_STREAM_EOF>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml new file mode 100644 index 000000000000..75196d11da58 --- /dev/null +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-de2-rotate.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A83T DE2 Rotate Device Tree Bindings + +maintainers: + - Jernej Skrabec <jernej.skrabec@siol.net> + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <mripard@kernel.org> + +description: |- + The Allwinner A83T and A64 have a rotation core used for + rotating and flipping images. + +properties: + compatible: + oneOf: + - const: allwinner,sun8i-a83t-de2-rotate + - items: + - const: allwinner,sun50i-a64-de2-rotate + - const: allwinner,sun8i-a83t-de2-rotate + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Rotate interface clock + - description: Rotate module clock + + clock-names: + items: + - const: bus + - const: mod + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sun8i-de2.h> + #include <dt-bindings/reset/sun8i-de2.h> + + rotate: rotate@1020000 { + compatible = "allwinner,sun8i-a83t-de2-rotate"; + reg = <0x1020000 0x10000>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&display_clocks CLK_BUS_ROT>, + <&display_clocks CLK_ROT>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_ROT>; + }; + +... diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml index 2e40f700e84f..8707df613f6c 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml @@ -17,7 +17,11 @@ description: |- properties: compatible: - const: allwinner,sun8i-h3-deinterlace + oneOf: + - const: allwinner,sun8i-h3-deinterlace + - items: + - const: allwinner,sun50i-a64-deinterlace + - const: allwinner,sun8i-h3-deinterlace reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml index 335717e15970..37d77e065491 100644 --- a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml +++ b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml @@ -124,6 +124,8 @@ required: - amlogic,ao-sysctrl - amlogic,canvas +additionalProperties: false + examples: - | vdec: video-decoder@c8820000 { diff --git a/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml b/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml index 41197578f19a..95ffa8bc0533 100644 --- a/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml +++ b/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml @@ -24,6 +24,12 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + interrupts: maxItems: 1 @@ -47,7 +53,6 @@ allOf: - description: AO-CEC clock clock-names: - maxItems: 1 items: - const: core @@ -66,7 +71,6 @@ allOf: - description: AO-CEC clock generator source clock-names: - maxItems: 1 items: - const: oscin @@ -78,6 +82,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | cec_AO: cec@100 { @@ -88,4 +94,3 @@ examples: clock-names = "core"; hdmi-phandle = <&hdmi_tx>; }; - diff --git a/Documentation/devicetree/bindings/media/aspeed-video.txt b/Documentation/devicetree/bindings/media/aspeed-video.txt index ce2894506e1f..d2ca32512272 100644 --- a/Documentation/devicetree/bindings/media/aspeed-video.txt +++ b/Documentation/devicetree/bindings/media/aspeed-video.txt @@ -1,11 +1,12 @@ * Device tree bindings for Aspeed Video Engine -The Video Engine (VE) embedded in the Aspeed AST2400 and AST2500 SOCs can +The Video Engine (VE) embedded in the Aspeed AST2400/2500/2600 SOCs can capture and compress video data from digital or analog sources. Required properties: - compatible: "aspeed,ast2400-video-engine" or - "aspeed,ast2500-video-engine" + "aspeed,ast2500-video-engine" or + "aspeed,ast2600-video-engine" - reg: contains the offset and length of the VE memory region - clocks: clock specifiers for the syscon clocks associated with the VE (ordering must match the clock-names property) diff --git a/Documentation/devicetree/bindings/media/i2c/imx219.yaml b/Documentation/devicetree/bindings/media/i2c/imx219.yaml new file mode 100644 index 000000000000..32d6b693274f --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/imx219.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/imx219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor + +maintainers: + - Dave Stevenson <dave.stevenson@raspberrypi.com> + +description: |- + The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor + with an active array size of 3280H x 2464V. It is programmable through + I2C interface. The I2C address is fixed to 0x10 as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx219 + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.8 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.2 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + If this property is omitted four-lane operation is assumed. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: + type: boolean + description: |- + MIPI CSI-2 clock is non-continuous if this property is present, + otherwise it's continuous. + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + imx219: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&imx219_clk>; + VANA-supply = <&imx219_vana>; /* 2.8v */ + VDIG-supply = <&imx219_vdig>; /* 1.8v */ + VDDL-supply = <&imx219_vddl>; /* 1.2v */ + + port { + imx219_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt index 8c0fc1a26bf0..6c88ce858d08 100644 --- a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt +++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt @@ -5,38 +5,150 @@ The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats. Required Properties: -- compatible: value must be "ti,tvp5150" -- reg: I2C slave address +==================== +- compatible: Value must be "ti,tvp5150". +- reg: I2C slave address. Optional Properties: -- pdn-gpios: phandle for the GPIO connected to the PDN pin, if any. -- reset-gpios: phandle for the GPIO connected to the RESETB pin, if any. +==================== +- pdn-gpios: Phandle for the GPIO connected to the PDN pin, if any. +- reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any. -The device node must contain one 'port' child node for its digital output -video port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. +The device node must contain one 'port' child node per device physical input +and output port, in accordance with the video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes +are numbered as follows -Required Endpoint Properties for parallel synchronization: + Name Type Port + -------------------------------------- + AIP1A sink 0 + AIP1B sink 1 + Y-OUT src 2 -- hsync-active: active state of the HSYNC signal. Must be <1> (HIGH). -- vsync-active: active state of the VSYNC signal. Must be <1> (HIGH). -- field-even-active: field signal level during the even field data - transmission. Must be <0>. +The device node must contain at least one sink port and the src port. Each input +port must be linked to an endpoint defined in [1]. The port/connector layout is +as follows -If none of hsync-active, vsync-active and field-even-active is specified, -the endpoint is assumed to use embedded BT.656 synchronization. +tvp-5150 port@0 (AIP1A) + endpoint@0 -----------> Comp0-Con port + endpoint@1 ------+----> Svideo-Con port +tvp-5150 port@1 (AIP1B) | + endpoint@1 ------+ + endpoint@0 -----------> Comp1-Con port +tvp-5150 port@2 + endpoint (video bitstream output at YOUT[0-7] parallel bus) -Example: +Required Endpoint Properties for parallel synchronization on output port: +========================================================================= + +- hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH). +- vsync-active: Active state of the VSYNC signal. Must be <1> (HIGH). +- field-even-active: Field signal level during the even field data + transmission. Must be <0>. + +Note: Do not specify any of these properties if you want to use the embedded + BT.656 synchronization. + +Optional Connector Properties: +============================== + +- sdtv-standards: Set the possible signals to which the hardware tries to lock + instead of using the autodetection mechnism. Please look at + [1] for more information. + +[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt. + +Example - three input sources: +#include <dt-bindings/display/sdtv-standards.h> + +comp_connector_0 { + compatible = "composite-video-connector"; + label = "Composite0"; + sdtv-standards = <SDTV_STD_PAL_M>; /* limit to pal-m signals */ + + port { + composite0_to_tvp5150: endpoint { + remote-endpoint = <&tvp5150_to_composite0>; + }; + }; +}; + +comp_connector_1 { + compatible = "composite-video-connector"; + label = "Composite1"; + sdtv-standards = <SDTV_STD_NTSC_M>; /* limit to ntsc-m signals */ + + port { + composite1_to_tvp5150: endpoint { + remote-endpoint = <&tvp5150_to_composite1>; + }; + }; +}; + +svideo_connector { + compatible = "svideo-connector"; + label = "S-Video"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + svideo_luma_to_tvp5150: endpoint@0 { + reg = <0>; + remote-endpoint = <&tvp5150_to_svideo_luma>; + }; + + svideo_chroma_to_tvp5150: endpoint@1 { + reg = <1>; + remote-endpoint = <&tvp5150_to_svideo_chroma>; + }; + }; +}; &i2c2 { - ... tvp5150@5c { compatible = "ti,tvp5150"; reg = <0x5c>; pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tvp5150_to_composite0: endpoint@0 { + reg = <0>; + remote-endpoint = <&composite0_to_tvp5150>; + }; + + tvp5150_to_svideo_luma: endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_luma_to_tvp5150>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tvp5150_to_composite1: endpoint@0 { + reg = <0>; + remote-endpoint = <&composite1_to_tvp5150>; + }; + + tvp5150_to_svideo_chroma: endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_chroma_to_tvp5150>; + }; + }; + + port@2 { + reg = <2>; - port { tvp5150_1: endpoint { remote-endpoint = <&ccdc_ep>; }; diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml new file mode 100644 index 000000000000..a2d1cd77c1e2 --- /dev/null +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs + +maintainers: + - Philipp Zabel <p.zabel@pengutronix.de> + +description: + Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs. + +properties: + compatible: + const: nxp,imx8mq-vpu + + reg: + maxItems: 3 + + reg-names: + items: + - const: g1 + - const: g2 + - const: ctrl + + interrupts: + maxItems: 2 + + interrupt-names: + items: + - const: g1 + - const: g2 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: g1 + - const: g2 + - const: bus + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/imx8mq-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + vpu: video-codec@38300000 { + compatible = "nxp,imx8mq-vpu"; + reg = <0x38300000 0x10000>, + <0x38310000 0x10000>, + <0x38320000 0x10000>; + reg-names = "g1", "g2", "ctrl"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "g1", "g2"; + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, + <&clk IMX8MQ_CLK_VPU_G2_ROOT>, + <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; + clock-names = "g1", "g2", "bus"; + power-domains = <&pgc_vpu>; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml new file mode 100644 index 000000000000..f9606df02d70 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.varbanov@linaro.org> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8916-venus + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: core + - const: iface + - const: bus + + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + + video-decoder: + type: object + + properties: + compatible: + const: "venus-decoder" + + required: + - compatible + + additionalProperties: false + + video-encoder: + type: object + + properties: + compatible: + const: "venus-encoder" + + required: + - compatible + + additionalProperties: false + + video-firmware: + type: object + + description: | + Firmware subnode is needed when the platform does not + have TrustZone. + + properties: + iommus: + maxItems: 1 + + required: + - iommus + +required: + - compatible + - reg + - interrupts + - power-domains + - clocks + - clock-names + - iommus + - memory-region + - video-decoder + - video-encoder + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,gcc-msm8916.h> + + video-codec@1d00000 { + compatible = "qcom,msm8916-venus"; + reg = <0x01d00000 0xff000>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, + <&gcc GCC_VENUS0_AHB_CLK>, + <&gcc GCC_VENUS0_AXI_CLK>; + clock-names = "core", "iface", "bus"; + power-domains = <&gcc VENUS_GDSC>; + iommus = <&apps_iommu 5>; + memory-region = <&venus_mem>; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml new file mode 100644 index 000000000000..fa0dc6c47f1d --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.varbanov@linaro.org> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8996-venus + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: core + - const: iface + - const: bus + - const: mbus + + iommus: + maxItems: 20 + + memory-region: + maxItems: 1 + + video-decoder: + type: object + + properties: + compatible: + const: venus-decoder + + clocks: + maxItems: 1 + + clock-names: + items: + - const: core + + power-domains: + maxItems: 1 + + required: + - compatible + - clocks + - clock-names + - power-domains + + additionalProperties: false + + video-encoder: + type: object + + properties: + compatible: + const: venus-encoder + + clocks: + maxItems: 1 + + clock-names: + items: + - const: core + + power-domains: + maxItems: 1 + + required: + - compatible + - clocks + - clock-names + - power-domains + + additionalProperties: false + + video-firmware: + type: object + + description: | + Firmware subnode is needed when the platform does not + have TrustZone. + + properties: + iommus: + maxItems: 1 + + required: + - iommus + +required: + - compatible + - reg + - interrupts + - power-domains + - clocks + - clock-names + - iommus + - memory-region + - video-decoder + - video-encoder + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,mmcc-msm8996.h> + + video-codec@c00000 { + compatible = "qcom,msm8996-venus"; + reg = <0x00c00000 0xff000>; + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mmcc VIDEO_CORE_CLK>, + <&mmcc VIDEO_AHB_CLK>, + <&mmcc VIDEO_AXI_CLK>, + <&mmcc VIDEO_MAXI_CLK>; + clock-names = "core", "iface", "bus", "mbus"; + power-domains = <&mmcc VENUS_GDSC>; + iommus = <&venus_smmu 0x00>, + <&venus_smmu 0x01>, + <&venus_smmu 0x0a>, + <&venus_smmu 0x07>, + <&venus_smmu 0x0e>, + <&venus_smmu 0x0f>, + <&venus_smmu 0x08>, + <&venus_smmu 0x09>, + <&venus_smmu 0x0b>, + <&venus_smmu 0x0c>, + <&venus_smmu 0x0d>, + <&venus_smmu 0x10>, + <&venus_smmu 0x11>, + <&venus_smmu 0x21>, + <&venus_smmu 0x28>, + <&venus_smmu 0x29>, + <&venus_smmu 0x2b>, + <&venus_smmu 0x2c>, + <&venus_smmu 0x2d>, + <&venus_smmu 0x31>; + memory-region = <&venus_mem>; + + video-decoder { + compatible = "venus-decoder"; + clocks = <&mmcc VIDEO_SUBCORE0_CLK>; + clock-names = "core"; + power-domains = <&mmcc VENUS_CORE0_GDSC>; + }; + + video-encoder { + compatible = "venus-encoder"; + clocks = <&mmcc VIDEO_SUBCORE1_CLK>; + clock-names = "core"; + power-domains = <&mmcc VENUS_CORE1_GDSC>; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml new file mode 100644 index 000000000000..764affa4877e --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.varbanov@linaro.org> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +properties: + compatible: + const: qcom,sc7180-venus + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 2 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + + clocks: + maxItems: 5 + + clock-names: + items: + - const: core + - const: iface + - const: bus + - const: vcodec0_core + - const: vcodec0_bus + + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: video-mem + - const: cpu-cfg + + video-decoder: + type: object + + properties: + compatible: + const: venus-decoder + + required: + - compatible + + additionalProperties: false + + video-encoder: + type: object + + properties: + compatible: + const: venus-encoder + + required: + - compatible + + additionalProperties: false + + video-firmware: + type: object + + description: | + Firmware subnode is needed when the platform does not + have TrustZone. + + properties: + iommus: + maxItems: 1 + + required: + - iommus + +required: + - compatible + - reg + - interrupts + - power-domains + - power-domain-names + - clocks + - clock-names + - iommus + - memory-region + - video-decoder + - video-encoder + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,videocc-sc7180.h> + + venus: video-codec@aa00000 { + compatible = "qcom,sc7180-venus"; + reg = <0 0x0aa00000 0 0xff000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&videocc VENUS_GDSC>, + <&videocc VCODEC0_GDSC>; + power-domain-names = "venus", "vcodec0"; + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, + <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; + clock-names = "core", "iface", "bus", + "vcodec0_core", "vcodec0_bus"; + iommus = <&apps_smmu 0x0c00 0x60>; + memory-region = <&venus_mem>; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml new file mode 100644 index 000000000000..8552f4ab907e --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.varbanov@linaro.org> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +properties: + compatible: + const: qcom,sdm845-venus-v2 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 3 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: vcodec1 + + clocks: + maxItems: 7 + + clock-names: + items: + - const: core + - const: iface + - const: bus + - const: vcodec0_core + - const: vcodec0_bus + - const: vcodec1_core + - const: vcodec1_bus + + iommus: + maxItems: 2 + + memory-region: + maxItems: 1 + + video-core0: + type: object + + properties: + compatible: + const: venus-decoder + + required: + - compatible + + additionalProperties: false + + video-core1: + type: object + + properties: + compatible: + const: venus-encoder + + required: + - compatible + + additionalProperties: false + + video-firmware: + type: object + + description: | + Firmware subnode is needed when the platform does not + have TrustZone. + + properties: + iommus: + maxItems: 1 + + required: + - iommus + +required: + - compatible + - reg + - interrupts + - power-domains + - power-domain-names + - clocks + - clock-names + - iommus + - memory-region + - video-core0 + - video-core1 + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,videocc-sdm845.h> + + video-codec@aa00000 { + compatible = "qcom,sdm845-venus-v2"; + reg = <0 0x0aa00000 0 0xff000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, + <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>, + <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; + clock-names = "core", "iface", "bus", + "vcodec0_core", "vcodec0_bus", + "vcodec1_core", "vcodec1_bus"; + power-domains = <&videocc VENUS_GDSC>, + <&videocc VCODEC0_GDSC>, + <&videocc VCODEC1_GDSC>; + power-domain-names = "venus", "vcodec0", "vcodec1"; + iommus = <&apps_smmu 0x10a0 0x8>, + <&apps_smmu 0x10b0 0x0>; + memory-region = <&venus_mem>; + + video-core0 { + compatible = "venus-decoder"; + }; + + video-core1 { + compatible = "venus-encoder"; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml new file mode 100644 index 000000000000..05cabe4e893a --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml @@ -0,0 +1,156 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.varbanov@linaro.org> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +properties: + compatible: + const: qcom,sdm845-venus + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: core + - const: iface + - const: bus + + iommus: + maxItems: 2 + + memory-region: + maxItems: 1 + + video-core0: + type: object + + properties: + compatible: + const: venus-decoder + + clocks: + maxItems: 2 + + clock-names: + items: + - const: core + - const: bus + + power-domains: + maxItems: 1 + + required: + - compatible + - clocks + - clock-names + - power-domains + + additionalProperties: false + + video-core1: + type: object + + properties: + compatible: + const: venus-encoder + + clocks: + maxItems: 2 + + clock-names: + items: + - const: core + - const: bus + + power-domains: + maxItems: 1 + + required: + - compatible + - clocks + - clock-names + - power-domains + + additionalProperties: false + + video-firmware: + type: object + + description: | + Firmware subnode is needed when the platform does not + have TrustZone. + + properties: + iommus: + maxItems: 1 + + required: + - iommus + +required: + - compatible + - reg + - interrupts + - power-domains + - clocks + - clock-names + - iommus + - memory-region + - video-core0 + - video-core1 + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,videocc-sdm845.h> + + video-codec@aa00000 { + compatible = "qcom,sdm845-venus"; + reg = <0 0x0aa00000 0 0xff000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; + clock-names = "core", "iface", "bus"; + power-domains = <&videocc VENUS_GDSC>; + iommus = <&apps_smmu 0x10a0 0x8>, + <&apps_smmu 0x10b0 0x0>; + memory-region = <&venus_mem>; + + video-core0 { + compatible = "venus-decoder"; + clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; + clock-names = "core", "bus"; + power-domains = <&videocc VCODEC0_GDSC>; + }; + + video-core1 { + compatible = "venus-encoder"; + clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; + clock-names = "core", "bus"; + power-domains = <&videocc VCODEC1_GDSC>; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,venus.txt b/Documentation/devicetree/bindings/media/qcom,venus.txt deleted file mode 100644 index b602c4c025e7..000000000000 --- a/Documentation/devicetree/bindings/media/qcom,venus.txt +++ /dev/null @@ -1,120 +0,0 @@ -* Qualcomm Venus video encoder/decoder accelerators - -- compatible: - Usage: required - Value type: <stringlist> - Definition: Value should contain one of: - - "qcom,msm8916-venus" - - "qcom,msm8996-venus" - - "qcom,sdm845-venus" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: Register base address and length of the register map. -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: Should contain interrupt line number. -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: A List of phandle and clock specifier pairs as listed - in clock-names property. -- clock-names: - Usage: required for msm8916 - Value type: <stringlist> - Definition: Should contain the following entries: - - "core" Core video accelerator clock - - "iface" Video accelerator AHB clock - - "bus" Video accelerator AXI clock -- clock-names: - Usage: required for msm8996 - Value type: <stringlist> - Definition: Should contain the following entries: - - "core" Core video accelerator clock - - "iface" Video accelerator AHB clock - - "bus" Video accelerator AXI clock - - "mbus" Video MAXI clock -- power-domains: - Usage: required - Value type: <prop-encoded-array> - Definition: A phandle and power domain specifier pairs to the - power domain which is responsible for collapsing - and restoring power to the peripheral. -- iommus: - Usage: required - Value type: <prop-encoded-array> - Definition: A list of phandle and IOMMU specifier pairs. -- memory-region: - Usage: required - Value type: <phandle> - Definition: reference to the reserved-memory for the firmware - memory region. - -* Subnodes -The Venus video-codec node must contain two subnodes representing -video-decoder and video-encoder, and one optional firmware subnode. -Firmware subnode is needed when the platform does not have TrustZone. - -Every of video-encoder or video-decoder subnode should have: - -- compatible: - Usage: required - Value type: <stringlist> - Definition: Value should contain "venus-decoder" or "venus-encoder" -- clocks: - Usage: required for msm8996 - Value type: <prop-encoded-array> - Definition: A List of phandle and clock specifier pairs as listed - in clock-names property. -- clock-names: - Usage: required for msm8996 - Value type: <stringlist> - Definition: Should contain the following entries: - - "core" Subcore video accelerator clock - -- power-domains: - Usage: required for msm8996 - Value type: <prop-encoded-array> - Definition: A phandle and power domain specifier pairs to the - power domain which is responsible for collapsing - and restoring power to the subcore. - -The firmware subnode must have: - -- iommus: - Usage: required - Value type: <prop-encoded-array> - Definition: A list of phandle and IOMMU specifier pairs. - -* An Example - video-codec@1d00000 { - compatible = "qcom,msm8916-venus"; - reg = <0x01d00000 0xff000>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, - <&gcc GCC_VENUS0_AHB_CLK>, - <&gcc GCC_VENUS0_AXI_CLK>; - clock-names = "core", "iface", "bus"; - power-domains = <&gcc VENUS_GDSC>; - iommus = <&apps_iommu 5>; - memory-region = <&venus_mem>; - - video-decoder { - compatible = "venus-decoder"; - clocks = <&mmcc VIDEO_SUBCORE0_CLK>; - clock-names = "core"; - power-domains = <&mmcc VENUS_CORE0_GDSC>; - }; - - video-encoder { - compatible = "venus-encoder"; - clocks = <&mmcc VIDEO_SUBCORE1_CLK>; - clock-names = "core"; - power-domains = <&mmcc VENUS_CORE1_GDSC>; - }; - - video-firmware { - iommus = <&apps_iommu 0x10b2 0x0>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml index a64ee038d235..b27c9385d490 100644 --- a/Documentation/devicetree/bindings/media/rc.yaml +++ b/Documentation/devicetree/bindings/media/rc.yaml @@ -143,6 +143,7 @@ properties: - rc-videomate-k100 - rc-videomate-s350 - rc-videomate-tv-pvr + - rc-videostrong-kii-pro - rc-wetek-hub - rc-wetek-play2 - rc-winfast diff --git a/Documentation/devicetree/bindings/media/renesas,ceu.yaml b/Documentation/devicetree/bindings/media/renesas,ceu.yaml index 8e9251a0f9ef..fcb5f13704a5 100644 --- a/Documentation/devicetree/bindings/media/renesas,ceu.yaml +++ b/Documentation/devicetree/bindings/media/renesas,ceu.yaml @@ -59,6 +59,8 @@ required: - interrupts - port +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/Documentation/devicetree/bindings/media/renesas,vin.txt b/Documentation/devicetree/bindings/media/renesas,vin.txt deleted file mode 100644 index 5eefd62ac5c5..000000000000 --- a/Documentation/devicetree/bindings/media/renesas,vin.txt +++ /dev/null @@ -1,217 +0,0 @@ -Renesas R-Car Video Input driver (rcar_vin) -------------------------------------------- - -The rcar_vin device provides video input capabilities for the Renesas R-Car -family of devices. - -Each VIN instance has a single parallel input that supports RGB and YUV video, -with both external synchronization and BT.656 synchronization for the latter. -Depending on the instance the VIN input is connected to external SoC pins, or -on Gen3 and RZ/G2 platforms to a CSI-2 receiver. - - - compatible: Must be one or more of the following - - "renesas,vin-r8a7743" for the R8A7743 device - - "renesas,vin-r8a7744" for the R8A7744 device - - "renesas,vin-r8a7745" for the R8A7745 device - - "renesas,vin-r8a77470" for the R8A77470 device - - "renesas,vin-r8a774a1" for the R8A774A1 device - - "renesas,vin-r8a774b1" for the R8A774B1 device - - "renesas,vin-r8a774c0" for the R8A774C0 device - - "renesas,vin-r8a7778" for the R8A7778 device - - "renesas,vin-r8a7779" for the R8A7779 device - - "renesas,vin-r8a7790" for the R8A7790 device - - "renesas,vin-r8a7791" for the R8A7791 device - - "renesas,vin-r8a7792" for the R8A7792 device - - "renesas,vin-r8a7793" for the R8A7793 device - - "renesas,vin-r8a7794" for the R8A7794 device - - "renesas,vin-r8a7795" for the R8A7795 device - - "renesas,vin-r8a7796" for the R8A7796 device - - "renesas,vin-r8a77965" for the R8A77965 device - - "renesas,vin-r8a77970" for the R8A77970 device - - "renesas,vin-r8a77980" for the R8A77980 device - - "renesas,vin-r8a77990" for the R8A77990 device - - "renesas,vin-r8a77995" for the R8A77995 device - - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible - device. - - When compatible with the generic version nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. - - - reg: the register base and size for the device registers - - interrupts: the interrupt for the device - - clocks: Reference to the parent clock - -The per-board settings for Gen2 and RZ/G1 platforms: - -- port - sub-node describing a single endpoint connected to the VIN - from external SoC pins as described in video-interfaces.txt[1]. - Only the first one will be considered as each vin interface has one - input port. - - - Optional properties for endpoint nodes: - - hsync-active: see [1] for description. Default is active high. - - vsync-active: see [1] for description. Default is active high. - If both HSYNC and VSYNC polarities are not specified, embedded - synchronization is selected. - - field-active-even: see [1] for description. Default is active high. - - bus-width: see [1] for description. The selected bus width depends on - the SoC type and selected input image format. - Valid values are: 8, 10, 12, 16, 24 and 32. - - data-shift: see [1] for description. Valid values are 0 and 8. - - data-enable-active: polarity of CLKENB signal, see [1] for - description. Default is active high. - -The per-board settings for Gen3 and RZ/G2 platforms: - -Gen3 and RZ/G2 platforms can support both a single connected parallel input -source from external SoC pins (port@0) and/or multiple parallel input sources -from local SoC CSI-2 receivers (port@1) depending on SoC. - -- renesas,id - ID number of the VIN, VINx in the documentation. -- ports - - port@0 - sub-node describing a single endpoint connected to the VIN - from external SoC pins as described in video-interfaces.txt[1]. - Describing more than one endpoint in port@0 is invalid. Only VIN - instances that are connected to external pins should have port@0. - - Endpoint nodes of port@0 support the optional properties listed in - the Gen2 per-board settings description. - - - port@1 - sub-nodes describing one or more endpoints connected to - the VIN from local SoC CSI-2 receivers. The endpoint numbers must - use the following schema. - - - endpoint@0 - sub-node describing the endpoint connected to CSI20 - - endpoint@1 - sub-node describing the endpoint connected to CSI21 - - endpoint@2 - sub-node describing the endpoint connected to CSI40 - - endpoint@3 - sub-node describing the endpoint connected to CSI41 - - Endpoint nodes of port@1 do not support any optional endpoint property. - -Device node example for Gen2 platforms --------------------------------------- - - aliases { - vin0 = &vin0; - }; - - vin0: vin@e6ef0000 { - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; - clocks = <&mstp8_clks R8A7790_CLK_VIN0>; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - -Board setup example for Gen2 platforms (vin1 composite video input) -------------------------------------------------------------------- - -&i2c2 { - status = "okay"; - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - remote = <&vin1>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin1ep0>; - }; - }; - }; -}; - -/* composite video input */ -&vin1 { - pinctrl-0 = <&vin1_pins>; - pinctrl-names = "default"; - - status = "okay"; - - port { - vin1ep0: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -Device node example for Gen3 platforms --------------------------------------- - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint= <&csi20vin0>; - }; - vin0csi21: endpoint@1 { - reg = <1>; - remote-endpoint= <&csi21vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint= <&csi40vin0>; - }; - }; - }; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a7795-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 714>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - csi20_in: endpoint { - clock-lanes = <0>; - data-lanes = <1>; - remote-endpoint = <&adv7482_txb>; - }; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - }; - }; - }; - -[1] video-interfaces.txt common video media interface diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml new file mode 100644 index 000000000000..1ec947b4781f --- /dev/null +++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml @@ -0,0 +1,402 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 2020 Renesas Electronics Corp. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/renesas,vin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car Video Input (VIN) + +maintainers: + - Niklas Söderlund <niklas.soderlund@ragnatech.se> + +description: + The R-Car Video Input (VIN) device provides video input capabilities for the + Renesas R-Car family of devices. + + Each VIN instance has a single parallel input that supports RGB and YUV video, + with both external synchronization and BT.656 synchronization for the latter. + Depending on the instance the VIN input is connected to external SoC pins, or + on Gen3 and RZ/G2 platforms to a CSI-2 receiver. + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,vin-r8a7743 # RZ/G1M + - renesas,vin-r8a7744 # RZ/G1N + - renesas,vin-r8a7745 # RZ/G1E + - renesas,vin-r8a77470 # RZ/G1C + - renesas,vin-r8a7790 # R-Car H2 + - renesas,vin-r8a7791 # R-Car M2-W + - renesas,vin-r8a7792 # R-Car V2H + - renesas,vin-r8a7793 # R-Car M2-N + - renesas,vin-r8a7794 # R-Car E2 + - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1 + + - items: + - enum: + - renesas,vin-r8a774a1 # RZ/G2M + - renesas,vin-r8a774b1 # RZ/G2N + - renesas,vin-r8a774c0 # RZ/G2E + - renesas,vin-r8a7778 # R-Car M1 + - renesas,vin-r8a7779 # R-Car H1 + - renesas,vin-r8a7795 # R-Car H3 + - renesas,vin-r8a7796 # R-Car M3-W + - renesas,vin-r8a77965 # R-Car M3-N + - renesas,vin-r8a77970 # R-Car V3M + - renesas,vin-r8a77980 # R-Car V3H + - renesas,vin-r8a77990 # R-Car E3 + - renesas,vin-r8a77995 # R-Car D3 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + #The per-board settings for Gen2 and RZ/G1 platforms: + port: + type: object + description: + A node containing a parallel input with a single endpoint definitions as + documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + + properties: + endpoint: + type: object + + properties: + hsync-active: + description: + If both HSYNC and VSYNC polarities are not specified, embedded + synchronization is selected. + default: 1 + + vsync-active: + description: + If both HSYNC and VSYNC polarities are not specified, embedded + synchronization is selected. + default: 1 + + field-active-even: true + + bus-width: true + + data-shift: true + + data-enable-active: + description: Polarity of CLKENB signal + default: 1 + + pclk-sample: true + + data-active: true + + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + additionalProperties: false + + #The per-board settings for Gen3 and RZ/G2 platforms: + renesas,id: + description: VIN channel number + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 15 + + ports: + type: object + description: + A node containing input nodes with endpoint definitions as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + + properties: + port@0: + type: object + description: + Input port node, single endpoint describing a parallel input source. + + properties: + reg: + const: 0 + + endpoint: + type: object + + properties: + hsync-active: + description: + If both HSYNC and VSYNC polarities are not specified, embedded + synchronization is selected. + default: 1 + + vsync-active: + description: + If both HSYNC and VSYNC polarities are not specified, embedded + synchronization is selected. + default: 1 + + field-active-even: true + + bus-width: true + + data-shift: true + + data-enable-active: + description: Polarity of CLKENB signal + default: 1 + + pclk-sample: true + + data-active: true + + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + required: + - endpoint + + additionalProperties: false + + port@1: + type: object + description: + Input port node, multiple endpoints describing all the R-Car CSI-2 + modules connected the VIN. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + const: 1 + + endpoint@0: + type: object + description: Endpoint connected to CSI20. + + properties: + reg: + const: 0 + + remote-endpoint: true + + required: + - reg + - remote-endpoint + + additionalProperties: false + + endpoint@1: + type: object + description: Endpoint connected to CSI21. + + properties: + reg: + const: 1 + + remote-endpoint: true + + required: + - reg + - remote-endpoint + + additionalProperties: false + + endpoint@2: + type: object + description: Endpoint connected to CSI40. + + properties: + reg: + const: 2 + + remote-endpoint: true + + required: + - reg + - remote-endpoint + + additionalProperties: false + + endpoint@3: + type: object + description: Endpoint connected to CSI41. + + properties: + reg: + const: 3 + + remote-endpoint: true + + required: + - reg + - remote-endpoint + + additionalProperties: false + + anyOf: + - required: + - endpoint@0 + - required: + - endpoint@1 + - required: + - endpoint@2 + - required: + - endpoint@3 + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - power-domains + - resets + +if: + properties: + compatible: + contains: + enum: + - renesas,vin-r8a7778 + - renesas,vin-r8a7779 + - renesas,rcar-gen2-vin +then: + required: + - port +else: + required: + - renesas,id + - ports + +additionalProperties: false + +examples: + # Device node example for Gen2 platform + - | + #include <dt-bindings/clock/r8a7790-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> + + vin1: vin@e6ef1000 { + compatible = "renesas,vin-r8a7790", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef1000 0 0x1000>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 810>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 810>; + + port { + vin1ep0: endpoint { + remote-endpoint = <&adv7180>; + bus-width = <8>; + }; + }; + }; + + # Device node example for Gen3 platform with only CSI-2 + - | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7795-sysc.h> + + vin0: video@e6ef0000 { + compatible = "renesas,vin-r8a7795"; + reg = <0 0xe6ef0000 0 0x1000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 811>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 811>; + renesas,id = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <1>; + + vin0csi20: endpoint@0 { + reg = <0>; + remote-endpoint= <&csi20vin0>; + }; + vin0csi40: endpoint@2 { + reg = <2>; + remote-endpoint= <&csi40vin0>; + }; + }; + }; + }; + + # Device node example for Gen3 platform with CSI-2 and parallel + - | + #include <dt-bindings/clock/r8a77970-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a77970-sysc.h> + + vin2: video@e6ef2000 { + compatible = "renesas,vin-r8a77970"; + reg = <0 0xe6ef2000 0 0x1000>; + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 809>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 809>; + renesas,id = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + vin2_in: endpoint { + remote-endpoint = <&adv7612_out>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <1>; + + vin2csi40: endpoint@2 { + reg = <2>; + remote-endpoint = <&csi40vin2>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt index fd5276abfad6..c53a8e5133f6 100644 --- a/Documentation/devicetree/bindings/media/rockchip-rga.txt +++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt @@ -6,8 +6,9 @@ BitBLT, alpha blending and image blur/sharpness. Required properties: - compatible: value should be one of the following - "rockchip,rk3288-rga"; - "rockchip,rk3399-rga"; + "rockchip,rk3228-rga", "rockchip,rk3288-rga": for Rockchip RK3228 + "rockchip,rk3288-rga": for Rockchip RK3288 + "rockchip,rk3399-rga": for Rockchip RK3399 - interrupts: RGA interrupt specifier. diff --git a/Documentation/devicetree/bindings/mfd/iqs62x.yaml b/Documentation/devicetree/bindings/mfd/iqs62x.yaml new file mode 100644 index 000000000000..541b06d80e73 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/iqs62x.yaml @@ -0,0 +1,179 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/iqs62x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Azoteq IQS620A/621/622/624/625 Multi-Function Sensors + +maintainers: + - Jeff LaBundy <jeff@labundy.com> + +description: | + The Azoteq IQS620A, IQS621, IQS622, IQS624 and IQS625 multi-function sensors + integrate multiple sensing technologies in a single package. + + Link to datasheets: https://www.azoteq.com/ + +properties: + compatible: + enum: + - azoteq,iqs620a + - azoteq,iqs621 + - azoteq,iqs622 + - azoteq,iqs624 + - azoteq,iqs625 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + Specifies the name of the calibration and configuration file selected by + the driver. If this property is omitted, the name is chosen based on the + device name with ".bin" as the extension (e.g. iqs620a.bin for IQS620A). + + keys: + $ref: ../input/iqs62x-keys.yaml + + pwm: + $ref: ../pwm/iqs620a-pwm.yaml + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + /* + * Dual capacitive buttons with proximity-activated function, unipolar lid + * switch and panel-mounted LED. + */ + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + iqs620a@44 { + compatible = "azoteq,iqs620a"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + + keys { + compatible = "azoteq,iqs620a-keys"; + + linux,keycodes = <KEY_SELECT>, + <KEY_MENU>, + <KEY_OK>, + <KEY_MENU>; + + hall-switch-south { + linux,code = <SW_LID>; + azoteq,use-prox; + }; + }; + + iqs620a_pwm: pwm { + compatible = "azoteq,iqs620a-pwm"; + #pwm-cells = <2>; + }; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + panel { + pwms = <&iqs620a_pwm 0 1000000>; + max-brightness = <255>; + }; + }; + + - | + /* Single inductive button with bipolar dock/tablet-mode switch. */ + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + iqs620a@44 { + compatible = "azoteq,iqs620a"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + + firmware-name = "iqs620a_coil.bin"; + + keys { + compatible = "azoteq,iqs620a-keys"; + + linux,keycodes = <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <KEY_MUTE>; + + hall-switch-north { + linux,code = <SW_DOCK>; + }; + + hall-switch-south { + linux,code = <SW_TABLET_MODE>; + }; + }; + }; + }; + + - | + /* Dual capacitive buttons with volume knob. */ + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + iqs624@44 { + compatible = "azoteq,iqs624"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + + keys { + compatible = "azoteq,iqs624-keys"; + + linux,keycodes = <BTN_0>, + <0>, + <BTN_1>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <KEY_VOLUMEUP>, + <KEY_VOLUMEDOWN>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/max77650.yaml b/Documentation/devicetree/bindings/mfd/max77650.yaml index 480385789394..b0a0f0d3d9d4 100644 --- a/Documentation/devicetree/bindings/mfd/max77650.yaml +++ b/Documentation/devicetree/bindings/mfd/max77650.yaml @@ -73,6 +73,8 @@ required: - gpio-controller - "#gpio-cells" +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt index 3c91ad430eea..b823b8625243 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt +++ b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt @@ -61,6 +61,7 @@ Regulator nodes are identified by their compatible: "qcom,rpm-pm8901-regulators" "qcom,rpm-pm8921-regulators" "qcom,rpm-pm8018-regulators" + "qcom,rpm-smb208-regulators" - vdd_l0_l1_lvs-supply: - vdd_l2_l11_l12-supply: @@ -171,6 +172,9 @@ pm8018: s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l14, lvs1 +smb208: + s1a, s1b, s2a, s2b + The content of each sub-node is defined by the standard binding for regulators - see regulator.txt - with additional custom properties described below: diff --git a/Documentation/devicetree/bindings/mfd/rn5t618.txt b/Documentation/devicetree/bindings/mfd/rn5t618.txt index b74e5e94d1cb..16778ea00dbc 100644 --- a/Documentation/devicetree/bindings/mfd/rn5t618.txt +++ b/Documentation/devicetree/bindings/mfd/rn5t618.txt @@ -15,6 +15,8 @@ Required properties: - reg: the I2C slave address of the device Optional properties: + - interrupts: interrupt mapping for IRQ + See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - system-power-controller: See Documentation/devicetree/bindings/power/power-controller.txt @@ -32,6 +34,8 @@ Example: pmic@32 { compatible = "ricoh,rn5t618"; reg = <0x32>; + interrupt-parent = <&gpio5>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; system-power-controller; regulators { diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml index 4fbb9e734284..3a6a1a26e2b3 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml @@ -41,6 +41,9 @@ properties: "#clock-cells": const: 0 + clock-output-names: + const: bd71828-32k-out + rohm,charger-sense-resistor-ohms: minimum: 10000000 maximum: 50000000 @@ -74,6 +77,8 @@ required: - gpio-controller - "#gpio-cells" +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt deleted file mode 100644 index f22d74c7a8db..000000000000 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt +++ /dev/null @@ -1,90 +0,0 @@ -* ROHM BD71837 and BD71847 Power Management Integrated Circuit bindings - -BD71837MWV and BD71847MWV are programmable Power Management ICs for powering -single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. They are -optimized for low BOM cost and compact solution footprint. BD71837MWV -integrates 8 Buck regulators and 7 LDOs. BD71847MWV contains 6 Buck regulators -and 6 LDOs. - -Datasheet for BD71837 is available at: -https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e -Datasheet for BD71847 is available at: -https://www.rohm.com/datasheet/BD71847AMWV/bd71847amwv-e - -Required properties: - - compatible : Should be "rohm,bd71837" for bd71837 - "rohm,bd71847" for bd71847. - - reg : I2C slave address. - - interrupt-parent : Phandle to the parent interrupt controller. - - interrupts : The interrupt line the device is connected to. - - clocks : The parent clock connected to PMIC. If this is missing - 32768 KHz clock is assumed. - - #clock-cells : Should be 0. - - regulators: : List of child nodes that specify the regulators. - Please see ../regulator/rohm,bd71837-regulator.txt - -Optional properties: -- clock-output-names : Should contain name for output clock. -- rohm,reset-snvs-powered : Transfer BD718x7 to SNVS state at reset. - -The BD718x7 supports two different HW states as reset target states. States -are called as SNVS and READY. At READY state all the PMIC power outputs go -down and OTP is reload. At the SNVS state all other logic and external -devices apart from the SNVS power domain are shut off. Please refer to NXP -i.MX8 documentation for further information regarding SNVS state. When a -reset is done via SNVS state the PMIC OTP data is not reload. This causes -power outputs that have been under SW control to stay down when reset has -switched power state to SNVS. If reset is done via READY state the power -outputs will be returned to HW control by OTP loading. Thus the reset -target state is set to READY by default. If SNVS state is used the boot -crucial regulators must have the regulator-always-on and regulator-boot-on -properties set in regulator node. - -- rohm,short-press-ms : Short press duration in milliseconds -- rohm,long-press-ms : Long press duration in milliseconds - -Configure the "short press" and "long press" timers for the power button. -Values are rounded to what hardware supports (500ms multiple for short and -1000ms multiple for long). If these properties are not present the existing -configuration (from bootloader or OTP) is not touched. - -Example: - - /* external oscillator node */ - osc: oscillator { - compatible = "fixed-clock"; - #clock-cells = <1>; - clock-frequency = <32768>; - clock-output-names = "osc"; - }; - - pmic: pmic@4b { - compatible = "rohm,bd71837"; - reg = <0x4b>; - interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_LOW>; - interrupt-names = "irq"; - #clock-cells = <0>; - clocks = <&osc 0>; - clock-output-names = "bd71837-32k-out"; - rohm,reset-snvs-powered; - - regulators { - buck1: BUCK1 { - regulator-name = "buck1"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <1250>; - }; - // [...] - }; - }; - - /* Clock consumer node */ - rtc@0 { - compatible = "company,my-rtc"; - clock-names = "my-clock"; - clocks = <&pmic>; - }; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml new file mode 100644 index 000000000000..aa922c560fcc --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml @@ -0,0 +1,236 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD71837 Power Management Integrated Circuit bindings + +maintainers: + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> + +description: | + BD71837MWV is programmable Power Management ICs for powering single-core, + dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low + BOM cost and compact solution footprint. BD71837MWV integrates 8 Buck + regulators and 7 LDOs. + Datasheet for BD71837 is available at + https://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applications/nxp-imx/bd71837amwv-product + +properties: + compatible: + const: rohm,bd71837 + + reg: + description: + I2C slave address. + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + "#clock-cells": + const: 0 + +# The BD718x7 supports two different HW states as reset target states. States +# are called as SNVS and READY. At READY state all the PMIC power outputs go +# down and OTP is reload. At the SNVS state all other logic and external +# devices apart from the SNVS power domain are shut off. Please refer to NXP +# i.MX8 documentation for further information regarding SNVS state. When a +# reset is done via SNVS state the PMIC OTP data is not reload. This causes +# power outputs that have been under SW control to stay down when reset has +# switched power state to SNVS. If reset is done via READY state the power +# outputs will be returned to HW control by OTP loading. Thus the reset +# target state is set to READY by default. If SNVS state is used the boot +# crucial regulators must have the regulator-always-on and regulator-boot-on +# properties set in regulator node. + + rohm,reset-snvs-powered: + description: | + Transfer PMIC to SNVS state at reset + type: boolean + +# Configure the "short press" and "long press" timers for the power button. +# Values are rounded to what hardware supports +# Short-press: +# Shortest being 10ms, next 500ms and then multiple of 500ms up to 7,5s +# Long-press: +# Shortest being 10ms, next 1000ms and then multiple of 1000ms up to 15s +# If these properties are not present the existing configuration (from +# bootloader or OTP) is not touched. + + rohm,short-press-ms: + description: + Short press duration in milliseconds + enum: + - 10 + - 500 + - 1000 + - 1500 + - 2000 + - 2500 + - 3000 + - 3500 + - 4000 + - 4500 + - 5000 + - 5500 + - 6000 + - 6500 + - 7000 + + rohm,long-press-ms: + description: + Long press duration in milliseconds + enum: + - 10 + - 1000 + - 2000 + - 3000 + - 4000 + - 5000 + - 6000 + - 7000 + - 8000 + - 9000 + - 10000 + - 11000 + - 12000 + - 13000 + - 14000 + + regulators: + $ref: ../regulator/rohm,bd71837-regulator.yaml + description: + List of child nodes that specify the regulators. + +required: + - compatible + - reg + - interrupts + - clocks + - "#clock-cells" + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/leds/common.h> + + i2c { + pmic: pmic@4b { + compatible = "rohm,bd71837"; + reg = <0x4b>; + interrupt-parent = <&gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <0>; + clocks = <&osc 0>; + rohm,reset-snvs-powered; + rohm,short-press-ms = <10>; + rohm,long-press-ms = <2000>; + + regulators { + buck1: BUCK1 { + regulator-name = "buck1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + rohm,dvs-run-voltage = <900000>; + rohm,dvs-idle-voltage = <850000>; + rohm,dvs-suspend-voltage = <800000>; + }; + buck2: BUCK2 { + regulator-name = "buck2"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + rohm,dvs-run-voltage = <1000000>; + rohm,dvs-idle-voltage = <900000>; + }; + buck3: BUCK3 { + regulator-name = "buck3"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + rohm,dvs-run-voltage = <1000000>; + }; + buck4: BUCK4 { + regulator-name = "buck4"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + rohm,dvs-run-voltage = <1000000>; + }; + buck5: BUCK5 { + regulator-name = "buck5"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + }; + buck6: BUCK6 { + regulator-name = "buck6"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + buck7: BUCK7 { + regulator-name = "buck7"; + regulator-min-microvolt = <1605000>; + regulator-max-microvolt = <1995000>; + regulator-boot-on; + }; + buck8: BUCK8 { + regulator-name = "buck8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + }; + + ldo1: LDO1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + ldo2: LDO2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + }; + ldo3: LDO3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + ldo4: LDO4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + }; + ldo5: LDO5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + ldo6: LDO6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + }; + ldo7_reg: LDO7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml new file mode 100644 index 000000000000..402e40dfe0b8 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml @@ -0,0 +1,222 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD71847 and BD71850 Power Management Integrated Circuit bindings + +maintainers: + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> + +description: | + BD71847AMWV and BD71850MWV are programmable Power Management ICs for powering + single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is + optimized for low BOM cost and compact solution footprint. BD71847MWV and + BD71850MWV integrate 6 Buck regulators and 6 LDOs. + Datasheets are available at + https://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applications/nxp-imx/bd71847amwv-product + https://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applications/nxp-imx/bd71850mwv-product + +properties: + compatible: + enum: + - rohm,bd71847 + - rohm,bd71850 + + reg: + description: + I2C slave address. + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + "#clock-cells": + const: 0 + +# The BD71847 abd BD71850 support two different HW states as reset target +# states. States are called as SNVS and READY. At READY state all the PMIC +# power outputs go down and OTP is reload. At the SNVS state all other logic +# and external devices apart from the SNVS power domain are shut off. Please +# refer to NXP i.MX8 documentation for further information regarding SNVS +# state. When a reset is done via SNVS state the PMIC OTP data is not reload. +# This causes power outputs that have been under SW control to stay down when +# reset has switched power state to SNVS. If reset is done via READY state the +# power outputs will be returned to HW control by OTP loading. Thus the reset +# target state is set to READY by default. If SNVS state is used the boot +# crucial regulators must have the regulator-always-on and regulator-boot-on +# properties set in regulator node. + + rohm,reset-snvs-powered: + description: + Transfer PMIC to SNVS state at reset. + type: boolean + +# Configure the "short press" and "long press" timers for the power button. +# Values are rounded to what hardware supports +# Short-press: +# Shortest being 10ms, next 500ms and then multiple of 500ms up to 7,5s +# Long-press: +# Shortest being 10ms, next 1000ms and then multiple of 1000ms up to 15s +# If these properties are not present the existing # configuration (from +# bootloader or OTP) is not touched. + + rohm,short-press-ms: + description: + Short press duration in milliseconds + enum: + - 10 + - 500 + - 1000 + - 1500 + - 2000 + - 2500 + - 3000 + - 3500 + - 4000 + - 4500 + - 5000 + - 5500 + - 6000 + - 6500 + - 7000 + - 7500 + + rohm,long-press-ms: + description: + Long press duration in milliseconds + enum: + - 10 + - 1000 + - 2000 + - 3000 + - 4000 + - 5000 + - 6000 + - 7000 + - 8000 + - 9000 + - 10000 + - 11000 + - 12000 + - 13000 + - 14000 + - 15000 + + regulators: + $ref: ../regulator/rohm,bd71847-regulator.yaml + description: + List of child nodes that specify the regulators. + +required: + - compatible + - reg + - interrupts + - clocks + - "#clock-cells" + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/leds/common.h> + + i2c { + pmic: pmic@4b { + compatible = "rohm,bd71847"; + reg = <0x4b>; + interrupt-parent = <&gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <0>; + clocks = <&osc 0>; + rohm,reset-snvs-powered; + rohm,short-press-ms = <10>; + rohm,long-press-ms = <2000>; + + regulators { + buck1: BUCK1 { + regulator-name = "buck1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + rohm,dvs-run-voltage = <900000>; + rohm,dvs-idle-voltage = <850000>; + rohm,dvs-suspend-voltage = <800000>; + }; + buck2: BUCK2 { + regulator-name = "buck2"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + rohm,dvs-run-voltage = <1000000>; + rohm,dvs-idle-voltage = <900000>; + }; + buck3: BUCK3 { + regulator-name = "buck3"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + }; + buck4: BUCK4 { + regulator-name = "buck4"; + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + buck5: BUCK5 { + regulator-name = "buck5"; + regulator-min-microvolt = <1605000>; + regulator-max-microvolt = <1995000>; + regulator-boot-on; + }; + buck8: BUCK6 { + regulator-name = "buck6"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + }; + + ldo1: LDO1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + ldo2: LDO2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + }; + ldo3: LDO3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + ldo4: LDO4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + }; + ldo5: LDO5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo6: LDO6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index 1a4cc5f3fb33..ddf190cb800b 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -39,6 +39,8 @@ properties: "#size-cells": const: 0 + wakeup-source: true + pwm: type: object @@ -81,6 +83,16 @@ patternProperties: required: - compatible + timer: + type: object + + properties: + compatible: + const: st,stm32-lptimer-timer + + required: + - compatible + required: - "#address-cells" - "#size-cells" @@ -115,6 +127,10 @@ examples: counter { compatible = "st,stm32-lptimer-counter"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + }; }; ... diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.txt b/Documentation/devicetree/bindings/mfd/st,stpmic1.txt deleted file mode 100644 index afd45c089585..000000000000 --- a/Documentation/devicetree/bindings/mfd/st,stpmic1.txt +++ /dev/null @@ -1,61 +0,0 @@ -* STMicroelectronics STPMIC1 Power Management IC - -Required properties: -- compatible: : "st,stpmic1" -- reg: : The I2C slave address for the STPMIC1 chip. -- interrupts: : The interrupt line the device is connected to. -- #interrupt-cells: : Should be 1. -- interrupt-controller: : Marks the device node as an interrupt controller. - Interrupt numbers are defined at - dt-bindings/mfd/st,stpmic1.h. - -STPMIC1 consists in a varied group of sub-devices. -Each sub-device binding is be described in own documentation file. - -Device Description ------- ------------ -st,stpmic1-onkey : Power on key, see ../input/st,stpmic1-onkey.txt -st,stpmic1-regulators : Regulators, see ../regulator/st,stpmic1-regulator.txt -st,stpmic1-wdt : Watchdog, see ../watchdog/st,stpmic1-wdt.txt - -Example: - -#include <dt-bindings/mfd/st,stpmic1.h> - -pmic: pmic@33 { - compatible = "st,stpmic1"; - reg = <0x33>; - interrupt-parent = <&gpioa>; - interrupts = <0 2>; - - interrupt-controller; - #interrupt-cells = <2>; - - onkey { - compatible = "st,stpmic1-onkey"; - interrupts = <IT_PONKEY_F 0>,<IT_PONKEY_R 1>; - interrupt-names = "onkey-falling", "onkey-rising"; - power-off-time-sec = <10>; - }; - - watchdog { - compatible = "st,stpmic1-wdt"; - }; - - regulators { - compatible = "st,stpmic1-regulators"; - - vdd_core: buck1 { - regulator-name = "vdd_core"; - regulator-boot-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - }; - vdd: buck3 { - regulator-name = "vdd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-pull-down; - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml new file mode 100644 index 000000000000..d9ad9260e348 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml @@ -0,0 +1,339 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/st,stpmic1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectonics STPMIC1 Power Management IC bindings + +description: STMicroelectronics STPMIC1 Power Management IC + +maintainers: + - pascal Paillet <p.paillet@st.com> + +properties: + compatible: + const: st,stpmic1 + + reg: + const: 0x33 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + onkey: + type: object + + allOf: + - $ref: ../input/input.yaml + + properties: + compatible: + const: st,stpmic1-onkey + + interrupts: + items: + - description: onkey-falling, happens when onkey is pressed. IT_PONKEY_F of pmic + - description: onkey-rising, happens when onkey is released. IT_PONKEY_R of pmic + + interrupt-names: + items: + - const: onkey-falling + - const: onkey-rising + + st,onkey-clear-cc-flag: + description: onkey is able power on after an over-current shutdown event. + $ref: /schemas/types.yaml#/definitions/flag + + st,onkey-pu-inactive: + description: onkey pull up is not active + $ref: /schemas/types.yaml#/definitions/flag + + power-off-time-sec: + minimum: 1 + maximum: 16 + + required: + - compatible + - interrupts + - interrupt-names + + additionalProperties: false + + watchdog: + type: object + + allOf: + - $ref: ../watchdog/watchdog.yaml + + properties: + compatible: + const: st,stpmic1-wdt + + timeout-sec: true + + required: + - compatible + + additionalProperties: false + + regulators: + type: object + + description: | + Available Regulators in STPMIC1 device are: + - buck1 for Buck BUCK1 + - buck2 for Buck BUCK2 + - buck3 for Buck BUCK3 + - buck4 for Buck BUCK4 + - ldo1 for LDO LDO1 + - ldo2 for LDO LDO2 + - ldo3 for LDO LDO3 + - ldo4 for LDO LDO4 + - ldo5 for LDO LDO5 + - ldo6 for LDO LDO6 + - vref_ddr for LDO Vref DDR + - boost for Buck BOOST + - pwr_sw1 for VBUS_OTG switch + - pwr_sw2 for SW_OUT switch + Switches are fixed voltage regulators with only enable/disable capability. + + properties: + compatible: + const: st,stpmic1-regulators + + ldo3: + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-min-microvolt: true + regulator-max-microvolt: true + regulator-allow-bypass: true + regulator-over-current-protection: true + + additionalProperties: false + + ldo4: + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-over-current-protection: true + + additionalProperties: false + + vref_ddr: + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + + additionalProperties: false + + boost: + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-over-current-protection: true + + additionalProperties: false + + patternProperties: + "^(buck[1-4]|ldo[1-6]|boost|pwr_sw[1-2])-supply$": + description: STPMIC1 voltage regulators supplies + + "^(buck[1-4]|ldo[1-6]|boost|vref_ddr|pwr_sw[1-2])$": + allOf: + - $ref: ../regulator/regulator.yaml + + "^ldo[1-2,5-6]$": + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-min-microvolt: true + regulator-max-microvolt: true + regulator-over-current-protection: true + regulator-enable-ramp-delay: true + + additionalProperties: false + + "^buck[1-4]$": + type: object + + properties: + interrupts: + maxItems: 1 + + st,mask-reset: + description: mask reset for this regulator, + the regulator configuration is maintained during pmic reset. + $ref: /schemas/types.yaml#/definitions/flag + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-min-microvolt: true + regulator-max-microvolt: true + regulator-initial-mode: true + regulator-pull-down: true + regulator-over-current-protection: true + regulator-enable-ramp-delay: true + + additionalProperties: false + + "^pwr_sw[1-2]$": + type: object + + properties: + interrupts: + maxItems: 1 + + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-over-current-protection: true + regulator-active-discharge: true + + additionalProperties: false + + required: + - compatible + + additionalProperties: false + + additionalProperties: false + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - "#interrupt-cells" + - interrupt-controller + +examples: + - | + #include <dt-bindings/mfd/st,stpmic1.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + pmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupt-parent = <&gpioa>; + interrupts = <0 2>; + + interrupt-controller; + #interrupt-cells = <2>; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = <IT_PONKEY_F 0>,<IT_PONKEY_R 1>; + interrupt-names = "onkey-falling", "onkey-rising"; + power-off-time-sec = <10>; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + }; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo6-supply = <&v3v3>; + + buck1 { + regulator-name = "vdd_core"; + interrupts = <IT_CURLIM_BUCK1 0>; + st,mask-reset; + regulator-boot-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1200000>; + }; + + buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-pull-down; + }; + + buck4 { + regulator-name = "v3v3"; + interrupts = <IT_CURLIM_BUCK4 0>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo6 { + regulator-name = "v1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-over-current-protection; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml new file mode 100644 index 000000000000..74ed4e397a78 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/loongson/devices.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/loongson/devices.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson based Platforms Device Tree Bindings + +maintainers: + - Jiaxun Yang <jiaxun.yang@flygoat.com> +description: | + Devices with a Loongson CPU shall have the following properties. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: Generic Loongson3 Quad Core + RS780E + items: + - const: loongson,loongson3-4core-rs780e + + - description: Generic Loongson3 Octa Core + RS780E + items: + - const: loongson,loongson3-8core-rs780e +... diff --git a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml index 0ea21a6f70b4..38ab0499102d 100644 --- a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml +++ b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml @@ -38,6 +38,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml new file mode 100644 index 000000000000..2f45dd0d04db --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + - Piotr Sroka <piotrs@cadence.com> + +allOf: + - $ref: mmc-controller.yaml + +properties: + compatible: + items: + - enum: + - socionext,uniphier-sd4hc + - const: cdns,sd4hc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + # PHY DLL input delays: + # They are used to delay the data valid window, and align the window to + # sampling clock. The delay starts from 5ns (for delay parameter equal to 0) + # and it is increased by 2.5ns in each step. + + cdns,phy-input-delay-sd-highspeed: + description: Value of the delay in the input path for SD high-speed timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-legacy: + description: Value of the delay in the input path for legacy timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-sd-uhs-sdr12: + description: Value of the delay in the input path for SD UHS SDR12 timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-sd-uhs-sdr25: + description: Value of the delay in the input path for SD UHS SDR25 timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-sd-uhs-sdr50: + description: Value of the delay in the input path for SD UHS SDR50 timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-sd-uhs-ddr50: + description: Value of the delay in the input path for SD UHS DDR50 timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-mmc-highspeed: + description: Value of the delay in the input path for MMC high-speed timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + cdns,phy-input-delay-mmc-ddr: + description: Value of the delay in the input path for eMMC high-speed DDR timing + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x1f + + # PHY DLL clock delays: + # Each delay property represents the fraction of the clock period. + # The approximate delay value will be + # (<delay property value>/128)*sdmclk_clock_period. + + cdns,phy-dll-delay-sdclk: + description: | + Value of the delay introduced on the sdclk output for all modes except + HS200, HS400 and HS400_ES. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x7f + + cdns,phy-dll-delay-sdclk-hsmmc: + description: | + Value of the delay introduced on the sdclk output for HS200, HS400 and + HS400_ES speed modes. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x7f + + cdns,phy-dll-delay-strobe: + description: | + Value of the delay introduced on the dat_strobe input used in + HS400 / HS400_ES speed modes. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + - maximum: 0x7f + +required: + - compatible + - reg + - interrupts + - clocks + +examples: + - | + emmc: mmc@5a000000 { + compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; + reg = <0x5a000000 0x400>; + interrupts = <0 78 4>; + clocks = <&clk 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cdns,phy-dll-delay-sdclk = <0>; + }; diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt index 0f97d711444e..de1b8bd550d3 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt @@ -43,6 +43,11 @@ Optional properties: This property allows user to change the tuning step to more than one delay cells which is useful for some special boards or cards when the default tuning step can't find the proper delay window within limited tuning retries. +- fsl,strobe-dll-delay-target: Specify the strobe dll control slave delay target. + This delay target programming host controller loopback read clock, and this + property allows user to change the delay target for the strobe input read clock. + If not use this property, driver default set the delay target to value 7. + Only eMMC HS400 mode need to take care of this property. Examples: diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 8fded83c519a..acc9f10871d4 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -351,7 +351,7 @@ dependencies: examples: - | - sdhci@ab000000 { + mmc@ab000000 { compatible = "sdhci"; reg = <0xab000000 0x200>; interrupts = <23>; diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 6d3c626e017d..4ec921e4bf34 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -28,6 +28,8 @@ specific for ux500 variant: - st,sig-pin-fbclk : feedback clock signal pin used. specific for sdmmc variant: +- reg : a second base register may be defined if a delay + block is present and used for tuning. - st,sig-dir : signal direction polarity used for cmd, dat0 dat123. - st,neg-edge : data & command phase relation, generated on sd clock falling edge. diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt b/Documentation/devicetree/bindings/mmc/sdhci-am654.txt index 50e87df47971..c6ccecb9ae5a 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.txt @@ -18,7 +18,20 @@ Required Properties: - clocks: Handles to the clock inputs. - clock-names: Tuple including "clk_xin" and "clk_ahb" - interrupts: Interrupt specifiers - - ti,otap-del-sel: Output Tap Delay select + Output tap delay for each speed mode: + - ti,otap-del-sel-legacy + - ti,otap-del-sel-mmc-hs + - ti,otap-del-sel-sd-hs + - ti,otap-del-sel-sdr12 + - ti,otap-del-sel-sdr25 + - ti,otap-del-sel-sdr50 + - ti,otap-del-sel-sdr104 + - ti,otap-del-sel-ddr50 + - ti,otap-del-sel-ddr52 + - ti,otap-del-sel-hs200 + - ti,otap-del-sel-hs400 + These bindings must be provided otherwise the driver will disable the + corresponding speed mode (i.e. all nodes must provide at least -legacy) Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit): - ti,trm-icp: DLL trim select @@ -38,6 +51,10 @@ Example: interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; sdhci-caps-mask = <0x80000007 0x0>; mmc-ddr-1_8v; - ti,otap-del-sel = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; ti,trm-icp = <0x8>; }; diff --git a/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt b/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt deleted file mode 100644 index fa423c277853..000000000000 --- a/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt +++ /dev/null @@ -1,80 +0,0 @@ -* Cadence SD/SDIO/eMMC Host Controller - -Required properties: -- compatible: should be one of the following: - "cdns,sd4hc" - default of the IP - "socionext,uniphier-sd4hc" - for Socionext UniPhier SoCs -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: phandle to the input clock. - -Optional properties: -For eMMC configuration, supported speed modes are not indicated by the SDHCI -Capabilities Register. Instead, the following properties should be specified -if supported. See mmc.txt for details. -- mmc-ddr-1_8v -- mmc-ddr-1_2v -- mmc-hs200-1_8v -- mmc-hs200-1_2v -- mmc-hs400-1_8v -- mmc-hs400-1_2v - -Some PHY delays can be configured by following properties. -PHY DLL input delays: -They are used to delay the data valid window, and align the window -to sampling clock. The delay starts from 5ns (for delay parameter equal to 0) -and it is increased by 2.5ns in each step. -- cdns,phy-input-delay-sd-highspeed: - Value of the delay in the input path for SD high-speed timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-legacy: - Value of the delay in the input path for legacy timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-sd-uhs-sdr12: - Value of the delay in the input path for SD UHS SDR12 timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-sd-uhs-sdr25: - Value of the delay in the input path for SD UHS SDR25 timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-sd-uhs-sdr50: - Value of the delay in the input path for SD UHS SDR50 timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-sd-uhs-ddr50: - Value of the delay in the input path for SD UHS DDR50 timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-mmc-highspeed: - Value of the delay in the input path for MMC high-speed timing - Valid range = [0:0x1F]. -- cdns,phy-input-delay-mmc-ddr: - Value of the delay in the input path for eMMC high-speed DDR timing - Valid range = [0:0x1F]. - -PHY DLL clock delays: -Each delay property represents the fraction of the clock period. -The approximate delay value will be -(<delay property value>/128)*sdmclk_clock_period. -- cdns,phy-dll-delay-sdclk: - Value of the delay introduced on the sdclk output - for all modes except HS200, HS400 and HS400_ES. - Valid range = [0:0x7F]. -- cdns,phy-dll-delay-sdclk-hsmmc: - Value of the delay introduced on the sdclk output - for HS200, HS400 and HS400_ES speed modes. - Valid range = [0:0x7F]. -- cdns,phy-dll-delay-strobe: - Value of the delay introduced on the dat_strobe input - used in HS400 / HS400_ES speed modes. - Valid range = [0:0x7F]. - -Example: - emmc: sdhci@5a000000 { - compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; - reg = <0x5a000000 0x400>; - interrupts = <0 78 4>; - clocks = <&clk 4>; - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - cdns,phy-dll-delay-sdclk = <0>; - }; diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 7ee639b1af03..5445931c5ab9 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -26,7 +26,13 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - - SD Core register map (required for msm-v4 and below) + - SD Core register map (required for controllers earlier than msm-v5) + - CQE register map (Optional, CQE support is present on SDHC instance meant + for eMMC and version v4.2 and above) +- reg-names: When CQE register map is supplied, below reg-names are required + - "hc" for Host controller register map + - "core" for SD core register map + - "cqhci" for CQE register map - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default". diff --git a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml new file mode 100644 index 000000000000..cdfac9b4411b --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier SD/SDIO/eMMC controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + description: version 2.91, 3.1, 3.1.1, respectively + enum: + - socionext,uniphier-sd-v2.91 + - socionext,uniphier-sd-v3.1 + - socionext,uniphier-sd-v3.1.1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + reset-names: + description: | + There are three reset signals at maximum + host: mandatory for all variants + bridge: exist only for version 2.91 + hw: optional. exist if eMMC hw reset line is available + oneOf: + - const: host + - items: + - const: host + - const: bridge + - items: + - const: host + - const: hw + - items: + - const: host + - const: bridge + - const: hw + + resets: + minItems: 1 + maxItems: 3 + +allOf: + - $ref: mmc-controller.yaml + + - if: + properties: + compatible: + contains: + const: socionext,uniphier-sd-v2.91 + then: + properties: + reset-names: + contains: + const: bridge + else: + properties: + reset-names: + not: + contains: + const: bridge + +required: + - compatible + - reg + - interrupts + - clocks + - reset-names + - resets + +examples: + - | + sd: mmc@5a400000 { + compatible = "socionext,uniphier-sd-v2.91"; + reg = <0x5a400000 0x200>; + interrupts = <0 76 4>; + pinctrl-names = "default", "uhs"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_uhs>; + clocks = <&mio_clk 0>; + reset-names = "host", "bridge"; + resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + }; diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml index 05f9f36dcb75..dd2c1b147142 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml @@ -62,7 +62,7 @@ examples: cap-mmc-highspeed; cap-sd-highspeed; card-detect-delay = <200>; - clock-freq-min-max = <400000 200000000>; + max-frequency = <200000000>; clock-frequency = <400000000>; data-addr = <0x200>; fifo-depth = <0x80>; diff --git a/Documentation/devicetree/bindings/mmc/uniphier-sd.txt b/Documentation/devicetree/bindings/mmc/uniphier-sd.txt deleted file mode 100644 index e1d658755722..000000000000 --- a/Documentation/devicetree/bindings/mmc/uniphier-sd.txt +++ /dev/null @@ -1,55 +0,0 @@ -UniPhier SD/eMMC controller - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-sd-v2.91" - IP version 2.91 - "socionext,uniphier-sd-v3.1" - IP version 3.1 - "socionext,uniphier-sd-v3.1.1" - IP version 3.1.1 -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: a single clock specifier of the controller clock. -- reset-names: should contain the following: - "host" - mandatory for all versions - "bridge" - should exist only for "socionext,uniphier-sd-v2.91" - "hw" - should exist if eMMC hw reset line is available -- resets: a list of reset specifiers, corresponding to the reset-names - -Optional properties: -- pinctrl-names: if present, should contain the following: - "default" - should exist for all instances - "uhs" - should exist for SD instance with UHS support -- pinctrl-0: pin control state for the default mode -- pinctrl-1: pin control state for the UHS mode -- dma-names: should be "rx-tx" if present. - This property can exist only for "socionext,uniphier-sd-v2.91". -- dmas: a single DMA channel specifier - This property can exist only for "socionext,uniphier-sd-v2.91". -- bus-width: see mmc.txt -- cap-sd-highspeed: see mmc.txt -- cap-mmc-highspeed: see mmc.txt -- sd-uhs-sdr12: see mmc.txt -- sd-uhs-sdr25: see mmc.txt -- sd-uhs-sdr50: see mmc.txt -- cap-mmc-hw-reset: should exist if reset-names contains "hw". see mmc.txt -- non-removable: see mmc.txt - -Example: - - sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sd-v2.91"; - reg = <0x5a400000 0x200>; - interrupts = <0 76 4>; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; - clocks = <&mio_clk 0>; - reset-names = "host", "bridge"; - resets = <&mio_rst 0>, <&mio_rst 3>; - dma-names = "rx-tx"; - dmas = <&dmac 4>; - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - }; diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt index 82156dc8f304..05651a654c66 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt @@ -35,11 +35,11 @@ Required properties: (optional) NAND flash cache range (if at non-standard offset) - reg-names : a list of the names corresponding to the previous register ranges. Should contain "nand" and (optionally) - "flash-dma" and/or "nand-cache". -- interrupts : The NAND CTLRDY interrupt and (if Flash DMA is available) - FLASH_DMA_DONE -- interrupt-names : May be "nand_ctlrdy" or "flash_dma_done", if broken out as - individual interrupts. + "flash-dma" or "flash-edu" and/or "nand-cache". +- interrupts : The NAND CTLRDY interrupt, (if Flash DMA is available) + FLASH_DMA_DONE and if EDU is avaialble and used FLASH_EDU_DONE +- interrupt-names : May be "nand_ctlrdy" or "flash_dma_done" or "flash_edu_done", + if broken out as individual interrupts. May be "nand", if the SoC has the individual NAND interrupts multiplexed behind another custom piece of hardware diff --git a/Documentation/devicetree/bindings/mtd/denali,nand.yaml b/Documentation/devicetree/bindings/mtd/denali,nand.yaml new file mode 100644 index 000000000000..46e6b6726bc0 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/denali,nand.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/denali,nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Denali NAND controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + enum: + - altr,socfpga-denali-nand + - socionext,uniphier-denali-nand-v5a + - socionext,uniphier-denali-nand-v5b + + reg-names: + description: | + There are two register regions: + nand_data: host data/command interface + denali_reg: register interface + items: + - const: nand_data + - const: denali_reg + + reg: + minItems: 2 + maxItems: 2 + + interrupts: + maxItems: 1 + + clock-names: + description: | + There are three clocks: + nand: controller core clock + nand_x: bus interface clock + ecc: ECC circuit clock + items: + - const: nand + - const: nand_x + - const: ecc + + clocks: + minItems: 3 + maxItems: 3 + + reset-names: + description: | + There are two optional resets: + nand: controller core reset + reg: register reset + oneOf: + - items: + - const: nand + - const: reg + - const: nand + - const: reg + + resets: + minItems: 1 + maxItems: 2 + +allOf: + - $ref: nand-controller.yaml + + - if: + properties: + compatible: + contains: + const: altr,socfpga-denali-nand + then: + patternProperties: + "^nand@[a-f0-9]$": + type: object + properties: + nand-ecc-strength: + enum: + - 8 + - 15 + nand-ecc-step-size: + enum: + - 512 + + - if: + properties: + compatible: + contains: + const: socionext,uniphier-denali-nand-v5a + then: + patternProperties: + "^nand@[a-f0-9]$": + type: object + properties: + nand-ecc-strength: + enum: + - 8 + - 16 + - 24 + nand-ecc-step-size: + enum: + - 1024 + + - if: + properties: + compatible: + contains: + const: socionext,uniphier-denali-nand-v5b + then: + patternProperties: + "^nand@[a-f0-9]$": + type: object + properties: + nand-ecc-strength: + enum: + - 8 + - 16 + nand-ecc-step-size: + enum: + - 1024 + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + +examples: + - | + nand-controller@ff900000 { + compatible = "altr,socfpga-denali-nand"; + reg-names = "nand_data", "denali_reg"; + reg = <0xff900000 0x20>, <0xffb80000 0x1000>; + interrupts = <0 144 4>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; + reset-names = "nand", "reg"; + resets = <&nand_rst>, <&nand_reg_rst>; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt deleted file mode 100644 index 98916a84bbf6..000000000000 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ /dev/null @@ -1,61 +0,0 @@ -* Denali NAND controller - -Required properties: - - compatible : should be one of the following: - "altr,socfpga-denali-nand" - for Altera SOCFPGA - "socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a) - "socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b) - - reg : should contain registers location and length for data and reg. - - reg-names: Should contain the reg names "nand_data" and "denali_reg" - - #address-cells: should be 1. The cell encodes the chip select connection. - - #size-cells : should be 0. - - interrupts : The interrupt number. - - clocks: should contain phandle of the controller core clock, the bus - interface clock, and the ECC circuit clock. - - clock-names: should contain "nand", "nand_x", "ecc" - -Optional properties: - - resets: may contain phandles to the controller core reset, the register - reset - - reset-names: may contain "nand", "reg" - -Sub-nodes: - Sub-nodes represent available NAND chips. - - Required properties: - - reg: should contain the bank ID of the controller to which each chip - select is connected. - - Optional properties: - - nand-ecc-step-size: see nand-controller.yaml for details. - If present, the value must be - 512 for "altr,socfpga-denali-nand" - 1024 for "socionext,uniphier-denali-nand-v5a" - 1024 for "socionext,uniphier-denali-nand-v5b" - - nand-ecc-strength: see nand-controller.yaml for details. Valid values are: - 8, 15 for "altr,socfpga-denali-nand" - 8, 16, 24 for "socionext,uniphier-denali-nand-v5a" - 8, 16 for "socionext,uniphier-denali-nand-v5b" - - nand-ecc-maximize: see nand-controller.yaml for details - -The chip nodes may optionally contain sub-nodes describing partitions of the -address space. See partition.txt for more detail. - -Examples: - -nand: nand@ff900000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "altr,socfpga-denali-nand"; - reg = <0xff900000 0x20>, <0xffb80000 0x1000>; - reg-names = "nand_data", "denali_reg"; - clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; - clock-names = "nand", "nand_x", "ecc"; - resets = <&nand_rst>, <&nand_reg_rst>; - reset-names = "nand", "reg"; - interrupts = <0 144 4>; - - nand@0 { - reg = <0>; - } -}; diff --git a/Documentation/devicetree/bindings/mtd/nand-macronix.txt b/Documentation/devicetree/bindings/mtd/nand-macronix.txt new file mode 100644 index 000000000000..ffab28a2c4d1 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/nand-macronix.txt @@ -0,0 +1,27 @@ +Macronix NANDs Device Tree Bindings +----------------------------------- + +Macronix NANDs support randomizer operation for scrambling user data, +which can be enabled with a SET_FEATURE. The penalty when using the +randomizer are subpage accesses prohibited and more time period needed +for program operation, i.e., tPROG 300us to 340us (randomizer enabled). +Enabling the randomizer is a one time persistent and non reversible +operation. + +For more high-reliability concern, if subpage write is not available +with hardware ECC and not enabled at UBI level, then enabling the +randomizer is recommended by default by adding a new specific property +in children nodes. + +Required NAND chip properties in children mode: +- randomizer enable: should be "mxic,enable-randomizer-otp" + +Example: + + nand: nand-controller@unit-address { + + nand@0 { + reg = <0>; + mxic,enable-randomizer-otp; + }; + }; diff --git a/Documentation/devicetree/bindings/net/broadcom-bluetooth.txt b/Documentation/devicetree/bindings/net/broadcom-bluetooth.txt index dd258674633c..a7d57ba5f2ac 100644 --- a/Documentation/devicetree/bindings/net/broadcom-bluetooth.txt +++ b/Documentation/devicetree/bindings/net/broadcom-bluetooth.txt @@ -20,7 +20,7 @@ Required properties: Optional properties: - - max-speed: see Documentation/devicetree/bindings/serial/slave-device.txt + - max-speed: see Documentation/devicetree/bindings/serial/serial.yaml - shutdown-gpios: GPIO specifier, used to enable the BT module - device-wakeup-gpios: GPIO specifier, used to wakeup the controller - host-wakeup-gpios: GPIO specifier, used to wakeup the host processor. diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml new file mode 100644 index 000000000000..cccf8202c8f7 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/bosch,m_can.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch MCAN controller Bindings + +description: Bosch MCAN controller for CAN bus + +maintainers: + - Sriram Dash <sriram.dash@samsung.com> + +properties: + compatible: + const: bosch,m_can + + reg: + items: + - description: M_CAN registers map + - description: message RAM + + reg-names: + items: + - const: m_can + - const: message_ram + + interrupts: + items: + - description: interrupt line0 + - description: interrupt line1 + minItems: 1 + maxItems: 2 + + interrupt-names: + items: + - const: int0 + - const: int1 + minItems: 1 + maxItems: 2 + + clocks: + items: + - description: peripheral clock + - description: bus clock + + clock-names: + items: + - const: hclk + - const: cclk + + bosch,mram-cfg: + description: | + Message RAM configuration data. + Multiple M_CAN instances can share the same Message RAM + and each element(e.g Rx FIFO or Tx Buffer and etc) number + in Message RAM is also configurable, so this property is + telling driver how the shared or private Message RAM are + used by this M_CAN controller. + + The format should be as follows: + <offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems> + The 'offset' is an address offset of the Message RAM where + the following elements start from. This is usually set to + 0x0 if you're using a private Message RAM. The remain cells + are used to specify how many elements are used for each FIFO/Buffer. + + M_CAN includes the following elements according to user manual: + 11-bit Filter 0-128 elements / 0-128 words + 29-bit Filter 0-64 elements / 0-128 words + Rx FIFO 0 0-64 elements / 0-1152 words + Rx FIFO 1 0-64 elements / 0-1152 words + Rx Buffers 0-64 elements / 0-1152 words + Tx Event FIFO 0-32 elements / 0-64 words + Tx Buffers 0-32 elements / 0-576 words + + Please refer to 2.4.1 Message RAM Configuration in Bosch + M_CAN user manual for details. + allOf: + - $ref: /schemas/types.yaml#/definitions/int32-array + - items: + items: + - description: The 'offset' is an address offset of the Message RAM + where the following elements start from. This is usually + set to 0x0 if you're using a private Message RAM. + default: 0 + - description: 11-bit Filter 0-128 elements / 0-128 words + minimum: 0 + maximum: 128 + - description: 29-bit Filter 0-64 elements / 0-128 words + minimum: 0 + maximum: 64 + - description: Rx FIFO 0 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Rx FIFO 1 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Rx Buffers 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Tx Event FIFO 0-32 elements / 0-64 words + minimum: 0 + maximum: 32 + - description: Tx Buffers 0-32 elements / 0-576 words + minimum: 0 + maximum: 32 + maxItems: 1 + + can-transceiver: + $ref: can-transceiver.yaml# + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - bosch,mram-cfg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx6sx-clock.h> + can@20e8000 { + compatible = "bosch,m_can"; + reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <0 114 0x04>, <0 114 0x04>; + interrupt-names = "int0", "int1"; + clocks = <&clks IMX6SX_CLK_CANFD>, + <&clks IMX6SX_CLK_CANFD>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>; + + can-transceiver { + max-bitrate = <5000000>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/net/can/can-transceiver.txt b/Documentation/devicetree/bindings/net/can/can-transceiver.txt deleted file mode 100644 index 0011f53ff159..000000000000 --- a/Documentation/devicetree/bindings/net/can/can-transceiver.txt +++ /dev/null @@ -1,24 +0,0 @@ -Generic CAN transceiver Device Tree binding ------------------------------- - -CAN transceiver typically limits the max speed in standard CAN and CAN FD -modes. Typically these limitations are static and the transceivers themselves -provide no way to detect this limitation at runtime. For this situation, -the "can-transceiver" node can be used. - -Required Properties: - max-bitrate: a positive non 0 value that determines the max - speed that CAN/CAN-FD can run. Any other value - will be ignored. - -Examples: - -Based on Texas Instrument's TCAN1042HGV CAN Transceiver - -m_can0 { - .... - can-transceiver { - max-bitrate = <5000000>; - }; - ... -}; diff --git a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml new file mode 100644 index 000000000000..6396977d29e5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/can-transceiver.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CAN transceiver Bindings + +description: CAN transceiver generic properties bindings + +maintainers: + - Rob Herring <robh@kernel.org> + +properties: + max-bitrate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: a positive non 0 value that determines the max speed that CAN/CAN-FD can run. + minimum: 1 diff --git a/Documentation/devicetree/bindings/net/can/m_can.txt b/Documentation/devicetree/bindings/net/can/m_can.txt deleted file mode 100644 index ed614383af9c..000000000000 --- a/Documentation/devicetree/bindings/net/can/m_can.txt +++ /dev/null @@ -1,75 +0,0 @@ -Bosch MCAN controller Device Tree Bindings -------------------------------------------------- - -Required properties: -- compatible : Should be "bosch,m_can" for M_CAN controllers -- reg : physical base address and size of the M_CAN - registers map and Message RAM -- reg-names : Should be "m_can" and "message_ram" -- interrupts : Should be the interrupt number of M_CAN interrupt - line 0 and line 1, could be same if sharing - the same interrupt. -- interrupt-names : Should contain "int0" and "int1" -- clocks : Clocks used by controller, should be host clock - and CAN clock. -- clock-names : Should contain "hclk" and "cclk" -- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt -- pinctrl-names : Names corresponding to the numbered pinctrl states -- bosch,mram-cfg : Message RAM configuration data. - Multiple M_CAN instances can share the same Message - RAM and each element(e.g Rx FIFO or Tx Buffer and etc) - number in Message RAM is also configurable, - so this property is telling driver how the shared or - private Message RAM are used by this M_CAN controller. - - The format should be as follows: - <offset sidf_elems xidf_elems rxf0_elems rxf1_elems - rxb_elems txe_elems txb_elems> - The 'offset' is an address offset of the Message RAM - where the following elements start from. This is - usually set to 0x0 if you're using a private Message - RAM. The remain cells are used to specify how many - elements are used for each FIFO/Buffer. - - M_CAN includes the following elements according to user manual: - 11-bit Filter 0-128 elements / 0-128 words - 29-bit Filter 0-64 elements / 0-128 words - Rx FIFO 0 0-64 elements / 0-1152 words - Rx FIFO 1 0-64 elements / 0-1152 words - Rx Buffers 0-64 elements / 0-1152 words - Tx Event FIFO 0-32 elements / 0-64 words - Tx Buffers 0-32 elements / 0-576 words - - Please refer to 2.4.1 Message RAM Configuration in - Bosch M_CAN user manual for details. - -Optional Subnode: -- can-transceiver : Can-transceiver subnode describing maximum speed - that can be used for CAN/CAN-FD modes. See - Documentation/devicetree/bindings/net/can/can-transceiver.txt - for details. -Example: -SoC dtsi: -m_can1: can@20e8000 { - compatible = "bosch,m_can"; - reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; - reg-names = "m_can", "message_ram"; - interrupts = <0 114 0x04>, - <0 114 0x04>; - interrupt-names = "int0", "int1"; - clocks = <&clks IMX6SX_CLK_CANFD>, - <&clks IMX6SX_CLK_CANFD>; - clock-names = "hclk", "cclk"; - bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>; -}; - -Board dts: -&m_can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_m_can1>; - status = "enabled"; - - can-transceiver { - max-bitrate = <5000000>; - }; -}; diff --git a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt index 6bdcc3f84bd3..3613c2c8f75d 100644 --- a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt +++ b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt @@ -14,7 +14,7 @@ Required properties: the interrupt. - interrupts: interrupt specification for data-ready. -See Documentation/devicetree/bindings/net/can/m_can.txt for additional +See Documentation/devicetree/bindings/net/can/bosch,m_can.yaml for additional required property details. Optional properties: diff --git a/Documentation/devicetree/bindings/net/dsa/ocelot.txt b/Documentation/devicetree/bindings/net/dsa/ocelot.txt new file mode 100644 index 000000000000..66a129fea705 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/ocelot.txt @@ -0,0 +1,116 @@ +Microchip Ocelot switch driver family +===================================== + +Felix +----- + +The VSC9959 core is currently the only switch supported by the driver, and is +found in the NXP LS1028A. It is a PCI device, part of the larger ENETC root +complex. As a result, the ethernet-switch node is a sub-node of the PCIe root +complex node and its "reg" property conforms to the parent node bindings: + +* reg: Specifies PCIe Device Number and Function Number of the endpoint device, + in this case for the Ethernet L2Switch it is PF5 (of device 0, bus 0). + +It does not require a "compatible" string. + +The interrupt line is used to signal availability of PTP TX timestamps and for +TSN frame preemption. + +For the external switch ports, depending on board configuration, "phy-mode" and +"phy-handle" are populated by board specific device tree instances. Ports 4 and +5 are fixed as internal ports in the NXP LS1028A instantiation. + +The CPU port property ("ethernet") configures the feature called "NPI port" in +the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are +connected, in the Node Processor Interface (NPI) mode, to an Ethernet port. +By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal +2.5Gbps port@4, but can be moved to the 1Gbps port@5, depending on the specific +use case. Moving the NPI port to an external switch port is hardware possible, +but there is no platform support for the Linux system on the LS1028A chip to +operate as an entire slave DSA chip. NPI functionality (and therefore DSA +tagging) is supported on a single port at a time. + +Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled +by default, and should be enabled on a per-board basis). But if any external +switch port is enabled at all, the ENETC PF2 (enetc_port2) should be enabled as +well, regardless of whether it is configured as the DSA master or not. This is +because the Felix PHYLINK implementation accesses the MAC PCS registers, which +in hardware truly belong to the ENETC port #2 and not to Felix. + +Supported PHY interface types (appropriate SerDes protocol setting changes are +needed in the RCW binary): + +* phy_mode = "internal": on ports 4 and 5 +* phy_mode = "sgmii": on ports 0, 1, 2, 3 +* phy_mode = "qsgmii": on ports 0, 1, 2, 3 +* phy_mode = "usxgmii": on ports 0, 1, 2, 3 +* phy_mode = "2500base-x": on ports 0, 1, 2, 3 + +For the rest of the device tree binding definitions, which are standard DSA and +PCI, refer to the following documents: + +Documentation/devicetree/bindings/net/dsa/dsa.txt +Documentation/devicetree/bindings/pci/pci.txt + +Example: + +&soc { + pcie@1f0000000 { /* Integrated Endpoint Root Complex */ + ethernet-switch@0,5 { + reg = <0x000500 0 0 0 0>; + /* IEP INT_B */ + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* External ports */ + port@0 { + reg = <0>; + label = "swp0"; + }; + + port@1 { + reg = <1>; + label = "swp1"; + }; + + port@2 { + reg = <2>; + label = "swp2"; + }; + + port@3 { + reg = <3>; + label = "swp3"; + }; + + /* Tagging CPU port */ + port@4 { + reg = <4>; + ethernet = <&enetc_port2>; + phy-mode = "internal"; + + fixed-link { + speed = <2500>; + full-duplex; + }; + }; + + /* Non-tagging CPU port */ + port@5 { + reg = <5>; + phy-mode = "internal"; + status = "disabled"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt index 250f8d8cdce4..c00fb0d22c7b 100644 --- a/Documentation/devicetree/bindings/net/fsl-fman.txt +++ b/Documentation/devicetree/bindings/net/fsl-fman.txt @@ -110,6 +110,13 @@ PROPERTIES Usage: required Definition: See soc/fsl/qman.txt and soc/fsl/bman.txt +- fsl,erratum-a050385 + Usage: optional + Value type: boolean + Definition: A boolean property. Indicates the presence of the + erratum A050385 which indicates that DMA transactions that are + split can result in a FMan lock. + ============================================================================= FMan MURAM Node diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml new file mode 100644 index 000000000000..68573762294b --- /dev/null +++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/marvell,mvusb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell USB to MDIO Controller + +maintainers: + - Tobias Waldekranz <tobias@waldekranz.com> + +description: |+ + This controller is mounted on development boards for Marvell's Link Street + family of Ethernet switches. It allows you to configure the switch's registers + using the standard MDIO interface. + + Since the device is connected over USB, there is no strict requirement of + having a device tree representation of the device. But in order to use it with + the mv88e6xxx driver, you need a device tree node in which to place the switch + definition. + +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + const: usb1286,1fa4 + reg: + maxItems: 1 + description: The USB port number on the host controller + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +examples: + - | + /* USB host controller */ + usb { + #address-cells = <1>; + #size-cells = <0>; + + mdio@1 { + compatible = "usb1286,1fa4"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + compatible = "marvell,mv88e6190"; + reg = <0x0>; + + ports { + /* Port definitions */ + }; + + mdio { + /* PHY definitions */ + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/mediatek-bluetooth.txt b/Documentation/devicetree/bindings/net/mediatek-bluetooth.txt index 112011c51d5e..219bcbd0d344 100644 --- a/Documentation/devicetree/bindings/net/mediatek-bluetooth.txt +++ b/Documentation/devicetree/bindings/net/mediatek-bluetooth.txt @@ -42,7 +42,7 @@ child node of the serial node with UART. Please refer to the following documents for generic properties: - Documentation/devicetree/bindings/serial/slave-device.txt + Documentation/devicetree/bindings/serial/serial.yaml Required properties: diff --git a/Documentation/devicetree/bindings/net/qca,qca7000.txt b/Documentation/devicetree/bindings/net/qca,qca7000.txt index 21c36e524993..8f5ae0b84eec 100644 --- a/Documentation/devicetree/bindings/net/qca,qca7000.txt +++ b/Documentation/devicetree/bindings/net/qca,qca7000.txt @@ -68,7 +68,7 @@ Required properties: Optional properties: - local-mac-address : see ./ethernet.txt - current-speed : current baud rate of QCA7000 which defaults to 115200 - if absent, see also ../serial/slave-device.txt + if absent, see also ../serial/serial.yaml UART Example: diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml new file mode 100644 index 000000000000..140f15245654 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -0,0 +1,198 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipa.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IP Accelerator (IPA) + +maintainers: + - Alex Elder <elder@kernel.org> + +description: + This binding describes the Qualcomm IPA. The IPA is capable of offloading + certain network processing tasks (e.g. filtering, routing, and NAT) from + the main processor. + + The IPA sits between multiple independent "execution environments," + including the Application Processor (AP) and the modem. The IPA presents + a Generic Software Interface (GSI) to each execution environment. + The GSI is an integral part of the IPA, but it is logically isolated + and has a distinct interrupt and a separately-defined address space. + + See also soc/qcom/qcom,smp2p.txt and interconnect/interconnect.txt. + + - | + -------- --------- + | | | | + | AP +<---. .----+ Modem | + | +--. | | .->+ | + | | | | | | | | + -------- | | | | --------- + v | v | + --+-+---+-+-- + | GSI | + |-----------| + | | + | IPA | + | | + ------------- + +properties: + compatible: + const: "qcom,sdm845-ipa" + + reg: + items: + - description: IPA registers + - description: IPA shared memory + - description: GSI registers + + reg-names: + items: + - const: ipa-reg + - const: ipa-shared + - const: gsi + + clocks: + maxItems: 1 + + clock-names: + const: core + + interrupts: + items: + - description: IPA interrupt (hardware IRQ) + - description: GSI interrupt (hardware IRQ) + - description: Modem clock query interrupt (smp2p interrupt) + - description: Modem setup ready interrupt (smp2p interrupt) + + interrupt-names: + items: + - const: ipa + - const: gsi + - const: ipa-clock-query + - const: ipa-setup-ready + + interconnects: + items: + - description: Interconnect path between IPA and main memory + - description: Interconnect path between IPA and internal memory + - description: Interconnect path between IPA and the AP subsystem + + interconnect-names: + items: + - const: memory + - const: imem + - const: config + + qcom,smem-states: + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle-array + description: State bits used in by the AP to signal the modem. + items: + - description: Whether the "ipa-clock-enabled" state bit is valid + - description: Whether the IPA clock is enabled (if valid) + + qcom,smem-state-names: + allOf: + - $ref: /schemas/types.yaml#/definitions/string-array + description: The names of the state bits used for SMP2P output + items: + - const: ipa-clock-enabled-valid + - const: ipa-clock-enabled + + modem-init: + type: boolean + description: + If present, it indicates that the modem is responsible for + performing early IPA initialization, including loading and + validating firwmare used by the GSI. + + modem-remoteproc: + $ref: /schemas/types.yaml#definitions/phandle + description: + This defines the phandle to the remoteproc node representing + the modem subsystem. This is requied so the IPA driver can + receive and act on notifications of modem up/down events. + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + description: + If present, a phandle for a reserved memory area that holds + the firmware passed to Trust Zone for authentication. Required + when Trust Zone (not the modem) performs early initialization. + +required: + - compatible + - reg + - clocks + - interrupts + - interconnects + - qcom,smem-states + - modem-remoteproc + +oneOf: + - required: + - modem-init + - required: + - memory-region + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interconnect/qcom,sdm845.h> + + smp2p-mpss { + compatible = "qcom,smp2p"; + ipa_smp2p_out: ipa-ap-to-modem { + qcom,entry-name = "ipa"; + #qcom,smem-state-cells = <1>; + }; + + ipa_smp2p_in: ipa-modem-to-ap { + qcom,entry-name = "ipa"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + ipa@1e40000 { + compatible = "qcom,sdm845-ipa"; + + modem-init; + modem-remoteproc = <&mss_pil>; + + reg = <0 0x1e40000 0 0x7000>, + <0 0x1e47000 0 0x2000>, + <0 0x1e04000 0 0x2c000>; + reg-names = "ipa-reg", + "ipa-shared", + "gsi"; + + interrupts-extended = <&intc 0 311 IRQ_TYPE_EDGE_RISING>, + <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = + <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_EBI1>, + <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>, + <&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>; + interconnect-names = "memory", + "imem", + "config"; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + }; diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml new file mode 100644 index 000000000000..b9f90081046f --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm ipq806x MDIO bus controller + +maintainers: + - Ansuel Smith <ansuelsmth@gmail.com> + +description: + The ipq806x soc have a MDIO dedicated controller that is + used to communicate with the gmac phy connected. + +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + const: qcom,ipq8064-mdio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - "#address-cells" + - "#size-cells" + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq806x.h> + + mdio0: mdio@37000000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "qcom,ipq8064-mdio"; + reg = <0x37000000 0x200000>; + + clocks = <&gcc GMAC_CORE1_CLK>; + + switch@10 { + compatible = "qca,qca8337"; + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt index 999aceadb985..beca6466d59a 100644 --- a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt +++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt @@ -31,6 +31,7 @@ Optional properties for compatible string qcom,wcn399x-bt: - max-speed: see Documentation/devicetree/bindings/serial/slave-device.txt - firmware-name: specify the name of nvm firmware to load + - clocks: clock provided to the controller Examples: @@ -57,5 +58,6 @@ serial@898000 { vddch0-supply = <&vreg_l25a_3p3>; max-speed = <3200000>; firmware-name = "crnv21.bin"; + clocks = <&rpmhcc RPMH_RF_CLK2>; }; }; diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml index ac8c76369a86..976f139bb66e 100644 --- a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml +++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml @@ -37,6 +37,12 @@ properties: description: The physical base address and size of full the CPSW module IO range + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + ranges: true clocks: @@ -111,13 +117,6 @@ properties: - reg - phys - mdio: - type: object - allOf: - - $ref: "ti,davinci-mdio.yaml#" - description: - CPSW MDIO bus. - cpts: type: object description: @@ -148,6 +147,15 @@ properties: - clocks - clock-names +patternProperties: + "^mdio@": + type: object + allOf: + - $ref: "ti,davinci-mdio.yaml#" + description: + CPSW MDIO bus. + + required: - compatible - reg @@ -159,6 +167,8 @@ required: - '#address-cells' - '#size-cells' +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> @@ -174,7 +184,6 @@ examples: #address-cells = <1>; #size-cells = <1>; syscon = <&scm_conf>; - inctrl-names = "default", "sleep"; interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml new file mode 100644 index 000000000000..78bf511e2892 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -0,0 +1,225 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: The TI AM654x/J721E SoC Gigabit Ethernet MAC (Media Access Controller) Device Tree Bindings + +maintainers: + - Grygorii Strashko <grygorii.strashko@ti.com> + - Sekhar Nori <nsekhar@ti.com> + +description: + The TI AM654x/J721E SoC Gigabit Ethernet MAC (CPSW2G NUSS) has two ports + (one external) and provides Ethernet packet communication for the device. + CPSW2G NUSS features - the Reduced Gigabit Media Independent Interface (RGMII), + Reduced Media Independent Interface (RMII), the Management Data + Input/Output (MDIO) interface for physical layer device (PHY) management, + new version of Common Platform Time Sync (CPTS), updated Address Lookup + Engine (ALE). + One external Ethernet port (port 1) with selectable RGMII/RMII interfaces and + an internal Communications Port Programming Interface (CPPI5) (Host port 0). + Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels + and one RX channels and operating by TI AM654x/J721E NAVSS Unified DMA + Peripheral Root Complex (UDMA-P) controller. + The CPSW2G NUSS is integrated into device MCU domain named MCU_CPSW0. + + Additional features + priority level Quality Of Service (QOS) support (802.1p) + Support for Audio/Video Bridging (P802.1Qav/D6.0) + Support for IEEE 1588 Clock Synchronization (2008 Annex D, Annex E and Annex F) + Flow Control (802.3x) Support + Time Sensitive Network Support + IEEE P902.3br/D2.0 Interspersing Express Traffic + IEEE 802.1Qbv/D2.2 Enhancements for Scheduled Traffic + Configurable number of addresses plus VLANs + Configurable number of classifier/policers + VLAN support, 802.1Q compliant, Auto add port VLAN for untagged frames on + ingress, Auto VLAN removal on egress and auto pad to minimum frame size. + RX/TX csum offload + + Specifications can be found at + http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf + http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf + +properties: + "#address-cells": true + "#size-cells": true + + compatible: + oneOf: + - const: ti,am654-cpsw-nuss + - const: ti,j721e-cpsw-nuss + + reg: + maxItems: 1 + description: + The physical base address and size of full the CPSW2G NUSS IO range + + reg-names: + items: + - const: cpsw_nuss + + ranges: true + + dma-coherent: true + + clocks: + description: CPSW2G NUSS functional clock + + clock-names: + items: + - const: fck + + power-domains: + maxItems: 1 + + dmas: + maxItems: 9 + + dma-names: + items: + - const: tx0 + - const: tx1 + - const: tx2 + - const: tx3 + - const: tx4 + - const: tx5 + - const: tx6 + - const: tx7 + - const: rx + + ethernet-ports: + type: object + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + port@1: + type: object + description: CPSW2G NUSS external ports + + allOf: + - $ref: ethernet-controller.yaml# + + properties: + reg: + items: + - const: 1 + description: CPSW port number + + phys: + maxItems: 1 + description: phandle on phy-gmii-sel PHY + + label: + description: label associated with this port + + ti,mac-only: + $ref: /schemas/types.yaml#definitions/flag + description: + Specifies the port works in mac-only mode. + + ti,syscon-efuse: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + Phandle to the system control device node which provides access + to efuse IO range with MAC addresses + + required: + - reg + - phys + + additionalProperties: false + +patternProperties: + "^mdio@[0-9a-f]+$": + type: object + allOf: + - $ref: "ti,davinci-mdio.yaml#" + description: + CPSW MDIO bus. + +required: + - compatible + - reg + - reg-names + - ranges + - clocks + - clock-names + - power-domains + - dmas + - dma-names + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/pinctrl/k3.h> + #include <dt-bindings/soc/ti,sci_pm_domain.h> + #include <dt-bindings/net/ti-dp83867.h> + + mcu_cpsw: ethernet@46000000 { + compatible = "ti,am654-cpsw-nuss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x46000000 0x0 0x200000>; + reg-names = "cpsw_nuss"; + ranges = <0x0 0x0 0x46000000 0x0 0x200000>; + dma-coherent; + clocks = <&k3_clks 5 10>; + clock-names = "fck"; + power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; + + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; + dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", + "rx"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + cpsw_port1: port@1 { + reg = <1>; + ti,mac-only; + label = "port1"; + ti,syscon-efuse = <&mcu_conf 0x200>; + phys = <&phy_gmii_sel 1>; + + phy-mode = "rgmii-rxid"; + phy-handle = <&phy0>; + }; + }; + + davinci_mdio: mdio@f00 { + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; + reg = <0x0 0xf00 0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&k3_clks 5 10>; + clock-names = "fck"; + bus_freq = <1000000>; + + phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/ti-bluetooth.txt b/Documentation/devicetree/bindings/net/ti-bluetooth.txt index 6d03ff8c7068..f48c17b38f58 100644 --- a/Documentation/devicetree/bindings/net/ti-bluetooth.txt +++ b/Documentation/devicetree/bindings/net/ti-bluetooth.txt @@ -15,8 +15,7 @@ standard BT HCI protocol with additional channels for the other functions. TI WiLink devices also have a separate WiFi interface as described in wireless/ti,wlcore.txt. -This bindings follows the UART slave device binding in -../serial/slave-device.txt. +This bindings follows the UART slave device binding in ../serial/serial.yaml. Required properties: - compatible: should be one of the following: diff --git a/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.txt b/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.txt index 7e675dafc256..3a76d8faaaed 100644 --- a/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.txt +++ b/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.txt @@ -4,17 +4,27 @@ This node provides properties for configuring the MediaTek mt76xx wireless device. The node is expected to be specified as a child node of the PCI controller to which the wireless chip is connected. -Alternatively, it can specify the wireless part of the MT7628/MT7688 SoC. -For SoC, use the compatible string "mediatek,mt7628-wmac" and the following -properties: +Alternatively, it can specify the wireless part of the MT7628/MT7688 or +MT7622 SoC. For SoC, use the following compatible strings: + +compatible: +- "mediatek,mt7628-wmac" for MT7628/MT7688 +- "mediatek,mt7622-wmac" for MT7622 +properties: - reg: Address and length of the register set for the device. - interrupts: Main device interrupt +MT7622 specific properties: +- power-domains: phandle to the power domain that the WMAC is part of +- mediatek,infracfg: phandle to the infrastructure bus fabric syscon node + Optional properties: - ieee80211-freq-limit: See ieee80211.txt - mediatek,mtd-eeprom: Specify a MTD partition + offset containing EEPROM data +- big-endian: if the radio eeprom partition is written in big-endian, specify + this property The MAC address can as well be set with corresponding optional properties defined in net/ethernet.txt. @@ -31,6 +41,7 @@ Optional nodes: reg = <0x0000 0 0 0 0>; ieee80211-freq-limit = <5000000 6000000>; mediatek,mtd-eeprom = <&factory 0x8000>; + big-endian; led { led-sources = <2>; @@ -50,3 +61,15 @@ wmac: wmac@10300000 { mediatek,mtd-eeprom = <&factory 0x0000>; }; + +MT7622 example: + +wmac: wmac@18000000 { + compatible = "mediatek,mt7622-wmac"; + reg = <0 0x18000000 0 0x100000>; + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; + + mediatek,infracfg = <&infracfg>; + + power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; +}; diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt index 616c87746d6f..71bf91f97386 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt @@ -91,6 +91,11 @@ Optional properties: - qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically mapped msa region. +- qcom,coexist-support : should contain eithr "0" or "1" to indicate coex + support by the hardware. +- qcom,coexist-gpio-pin : gpio pin number information to support coex + which will be used by wifi firmware. + Example (to supply PCI based wifi block details): In this example, the node is defined as child node of the PCI controller. @@ -159,6 +164,8 @@ wifi0: wifi@a000000 { qcom,msi_addr = <0x0b006040>; qcom,msi_base = <0x40>; qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ]; + qcom,coexist-support = <1>; + qcom,coexist-gpio-pin = <0x33>; }; Example (to supply wcn3990 SoC wifi block details): diff --git a/Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt b/Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt index f38950560982..88fd28d15eac 100644 --- a/Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt +++ b/Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt @@ -9,11 +9,12 @@ Required properties: - spi-max-frequency : Maximum SPI clocking speed of device in Hz - interrupts : Should contain interrupt line - vio-supply : phandle to regulator providing VIO -- ti,power-gpio : GPIO connected to chip's PMEN pin Optional properties: - ti,wl1251-has-eeprom : boolean, the wl1251 has an eeprom connected, which provides configuration data (calibration, MAC, ...) +- ti,power-gpio : GPIO connected to chip's PMEN pin if operated in + SPI mode - Please consult Documentation/devicetree/bindings/spi/spi-bus.txt for optional SPI connection related properties, diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml new file mode 100644 index 000000000000..1485d3fbabfd --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ EFUSE driver bindings + +maintainers: + - PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> + +allOf: + - $ref: "nvmem.yaml#" + +properties: + compatible: + enum: + - ingenic,jz4780-efuse + + reg: + maxItems: 1 + + clocks: + # Handle for the ahb for the efuse. + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/jz4780-cgu.h> + + efuse@134100d0 { + compatible = "ingenic,jz4780-efuse"; + reg = <0x134100d0 0x2c>; + + clocks = <&cgu JZ4780_CLK_AHB2>; + }; + +... diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt index 4751029b9b74..64f07417ecfb 100644 --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt @@ -19,7 +19,8 @@ In 'cpu' nodes: In 'operating-points-v2' table: - compatible: Should be - - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. + - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974, + apq8064, ipq8064, msm8960 and ipq8074. Optional properties: -------------------- diff --git a/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt b/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt index 84fdc422792e..b6acbe694ffb 100644 --- a/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt +++ b/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt @@ -18,7 +18,6 @@ Required properties: - reg-names: Must be - "elbi" External local bus interface registers - "cfg" Meson specific registers - - "phy" Meson PCIE PHY registers for AXG SoC Family - "config" PCIe configuration space - reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal. - clocks: Must contain an entry for each entry in clock-names. @@ -26,13 +25,13 @@ Required properties: - "pclk" PCIe GEN 100M PLL clock - "port" PCIe_x(A or B) RC clock gate - "general" PCIe Phy clock - - "mipi" PCIe_x(A or B) 100M ref clock gate for AXG SoC Family - resets: phandle to the reset lines. -- reset-names: must contain "phy" "port" and "apb" - - "phy" Share PHY reset for AXG SoC Family +- reset-names: must contain "port" and "apb" - "port" Port A or B reset - "apb" Share APB reset -- phys: should contain a phandle to the shared phy for G12A SoC Family +- phys: should contain a phandle to the PCIE phy +- phy-names: must contain "pcie" + - device_type: should be "pci". As specified in designware-pcie.txt @@ -43,9 +42,8 @@ Example configuration: compatible = "amlogic,axg-pcie", "snps,dw-pcie"; reg = <0x0 0xf9800000 0x0 0x400000 0x0 0xff646000 0x0 0x2000 - 0x0 0xff644000 0x0 0x2000 0x0 0xf9f00000 0x0 0x100000>; - reg-names = "elbi", "cfg", "phy", "config"; + reg-names = "elbi", "cfg", "config"; reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; #interrupt-cells = <1>; @@ -58,17 +56,15 @@ Example configuration: ranges = <0x82000000 0 0 0x0 0xf9c00000 0 0x00300000>; clocks = <&clkc CLKID_USB - &clkc CLKID_MIPI_ENABLE &clkc CLKID_PCIE_A &clkc CLKID_PCIE_CML_EN0>; clock-names = "general", - "mipi", "pclk", "port"; - resets = <&reset RESET_PCIE_PHY>, - <&reset RESET_PCIE_A>, + resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>; - reset-names = "phy", - "port", + reset-names = "port", "apb"; + phys = <&pcie_phy>; + phy-names = "pcie"; }; diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt deleted file mode 100644 index 4a0475e2ba7e..000000000000 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt +++ /dev/null @@ -1,27 +0,0 @@ -* Cadence PCIe endpoint controller - -Required properties: -- compatible: Should contain "cdns,cdns-pcie-ep" to identify the IP used. -- reg: Should contain the controller register base address and AXI interface - region base address respectively. -- reg-names: Must be "reg" and "mem" respectively. -- cdns,max-outbound-regions: Set to maximum number of outbound regions - -Optional properties: -- max-functions: Maximum number of functions that can be configured (default 1). -- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more - than one in the list. If only one PHY listed it must manage all lanes. -- phy-names: List of names to identify the PHY. - -Example: - -pcie@fc000000 { - compatible = "cdns,cdns-pcie-ep"; - reg = <0x0 0xfc000000 0x0 0x01000000>, - <0x0 0x80000000 0x0 0x40000000>; - reg-names = "reg", "mem"; - cdns,max-outbound-regions = <16>; - max-functions = /bits/ 8 <8>; - phys = <&ep_phy0 &ep_phy1>; - phy-names = "pcie-lane0","pcie-lane1"; -}; diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml new file mode 100644 index 000000000000..2996f8d4777c --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence PCIe EP Controller + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +allOf: + - $ref: "cdns-pcie.yaml#" + - $ref: "pci-ep.yaml#" + +properties: + compatible: + const: cdns,cdns-pcie-ep + + reg: + maxItems: 2 + + reg-names: + items: + - const: reg + - const: mem + +required: + - reg + - reg-names + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie-ep@fc000000 { + compatible = "cdns,cdns-pcie-ep"; + reg = <0x0 0xfc000000 0x0 0x01000000>, + <0x0 0x80000000 0x0 0x40000000>; + reg-names = "reg", "mem"; + cdns,max-outbound-regions = <16>; + max-functions = /bits/ 8 <8>; + phys = <&pcie_phy0>; + phy-names = "pcie-phy"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt deleted file mode 100644 index 91de69c713a9..000000000000 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt +++ /dev/null @@ -1,66 +0,0 @@ -* Cadence PCIe host controller - -This PCIe controller inherits the base properties defined in -host-generic-pci.txt. - -Required properties: -- compatible: Should contain "cdns,cdns-pcie-host" to identify the IP used. -- reg: Should contain the controller register base address, PCIe configuration - window base address, and AXI interface region base address respectively. -- reg-names: Must be "reg", "cfg" and "mem" respectively. -- #address-cells: Set to <3> -- #size-cells: Set to <2> -- device_type: Set to "pci" -- ranges: Ranges for the PCI memory and I/O regions -- #interrupt-cells: Set to <1> -- interrupt-map-mask and interrupt-map: Standard PCI properties to define the - mapping of the PCIe interface to interrupt numbers. - -Optional properties: -- cdns,max-outbound-regions: Set to maximum number of outbound regions - (default 32) -- cdns,no-bar-match-nbits: Set into the no BAR match register to configure the - number of least significant bits kept during inbound (PCIe -> AXI) address - translations (default 32) -- vendor-id: The PCI vendor ID (16 bits, default is design dependent) -- device-id: The PCI device ID (16 bits, default is design dependent) -- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more - than one in the list. If only one PHY listed it must manage all lanes. -- phy-names: List of names to identify the PHY. - -Example: - -pcie@fb000000 { - compatible = "cdns,cdns-pcie-host"; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x0 0xff>; - linux,pci-domain = <0>; - cdns,max-outbound-regions = <16>; - cdns,no-bar-match-nbits = <32>; - vendor-id = /bits/ 16 <0x17cd>; - device-id = /bits/ 16 <0x0200>; - - reg = <0x0 0xfb000000 0x0 0x01000000>, - <0x0 0x41000000 0x0 0x00001000>, - <0x0 0x40000000 0x0 0x04000000>; - reg-names = "reg", "cfg", "mem"; - - ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>, - <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>; - - #interrupt-cells = <0x1>; - - interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 14 0x1 - 0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 15 0x1 - 0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 16 0x1 - 0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 17 0x1>; - - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - - msi-parent = <&its_pci>; - - phys = <&pcie_phy0>; - phy-names = "pcie-phy"; -}; diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml new file mode 100644 index 000000000000..cabbe46ff578 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence PCIe host controller + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - $ref: "cdns-pcie-host.yaml#" + +properties: + compatible: + const: cdns,cdns-pcie-host + + reg: + maxItems: 3 + + reg-names: + items: + - const: reg + - const: cfg + - const: mem + + msi-parent: true + +required: + - reg + - reg-names + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@fb000000 { + compatible = "cdns,cdns-pcie-host"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xff>; + linux,pci-domain = <0>; + cdns,max-outbound-regions = <16>; + cdns,no-bar-match-nbits = <32>; + vendor-id = <0x17cd>; + device-id = <0x0200>; + + reg = <0x0 0xfb000000 0x0 0x01000000>, + <0x0 0x41000000 0x0 0x00001000>, + <0x0 0x40000000 0x0 0x04000000>; + reg-names = "reg", "cfg", "mem"; + + ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>, + <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>; + + #interrupt-cells = <0x1>; + + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 14 0x1>, + <0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 15 0x1>, + <0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 16 0x1>, + <0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 17 0x1>; + + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + + msi-parent = <&its_pci>; + + phys = <&pcie_phy0>; + phy-names = "pcie-phy"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml new file mode 100644 index 000000000000..ab6e43b636ec --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence PCIe Host + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +allOf: + - $ref: "/schemas/pci/pci-bus.yaml#" + - $ref: "cdns-pcie.yaml#" + +properties: + cdns,no-bar-match-nbits: + description: + Set into the no BAR match register to configure the number of least + significant bits kept during inbound (PCIe -> AXI) address translations + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 64 + default: 32 + + msi-parent: true diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml new file mode 100644 index 000000000000..6887ccc339cc --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence PCIe Core + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +properties: + cdns,max-outbound-regions: + description: maximum number of outbound regions + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 32 + default: 32 + + phys: + description: + One per lane if more than one in the list. If only one PHY listed it must + manage all lanes. + minItems: 1 + maxItems: 16 + + phy-names: + items: + - const: pcie-phy + # FIXME: names when more than 1 diff --git a/Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt b/Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt new file mode 100644 index 000000000000..b40fb5d15d3d --- /dev/null +++ b/Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt @@ -0,0 +1,52 @@ +NXP Layerscape PCIe Gen4 controller + +This PCIe controller is based on the Mobiveil PCIe IP and thus inherits all +the common properties defined in mobiveil-pcie.txt. + +Required properties: +- compatible: should contain the platform identifier such as: + "fsl,lx2160a-pcie" +- reg: base addresses and lengths of the PCIe controller register blocks. + "csr_axi_slave": Bridge config registers + "config_axi_slave": PCIe controller registers +- interrupts: A list of interrupt outputs of the controller. Must contain an + entry for each entry in the interrupt-names property. +- interrupt-names: It could include the following entries: + "intr": The interrupt that is asserted for controller interrupts + "aer": Asserted for aer interrupt when chip support the aer interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for aer. + "pme": Asserted for pme interrupt when chip support the pme interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for pme. +- dma-coherent: Indicates that the hardware IP block can ensure the coherency + of the data transferred from/to the IP block. This can avoid the software + cache flush/invalid actions, and improve the performance significantly. +- msi-parent : See the generic MSI binding described in + Documentation/devicetree/bindings/interrupt-controller/msi.txt. + +Example: + + pcie@3400000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + apio-wins = <8>; + ppio-wins = <8>; + dma-coherent; + bus-range = <0x0 0xff>; + msi-parent = <&its>; + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt index b739f92da58e..bd43f3c3ece4 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt @@ -1,11 +1,11 @@ NVIDIA Tegra PCIe controller (Synopsys DesignWare Core based) -This PCIe host controller is based on the Synopsis Designware PCIe IP +This PCIe controller is based on the Synopsis Designware PCIe IP and thus inherits all the common properties defined in designware-pcie.txt. +Some of the controller instances are dual mode where in they can work either +in root port mode or endpoint mode but one at a time. Required properties: -- compatible: For Tegra19x, must contain "nvidia,tegra194-pcie". -- device_type: Must be "pci" - power-domains: A phandle to the node that controls power to the respective PCIe controller and a specifier name for the PCIe controller. Following are the specifiers for the different PCIe controllers @@ -32,6 +32,32 @@ Required properties: entry for each entry in the interrupt-names property. - interrupt-names: Must include the following entries: "intr": The Tegra interrupt that is asserted for controller interrupts +- clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - core +- resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must include the following entries: + - apb + - core +- phys: Must contain a phandle to P2U PHY for each entry in phy-names. +- phy-names: Must include an entry for each active lane. + "p2u-N": where N ranges from 0 to one less than the total number of lanes +- nvidia,bpmp: Must contain a pair of phandle to BPMP controller node followed + by controller-id. Following are the controller ids for each controller. + 0: C0 + 1: C1 + 2: C2 + 3: C3 + 4: C4 + 5: C5 +- vddio-pex-ctl-supply: Regulator supply for PCIe side band signals + +RC mode: +- compatible: Tegra19x must contain "nvidia,tegra194-pcie" +- device_type: Must be "pci" for RC mode +- interrupt-names: Must include the following entries: "msi": The Tegra interrupt that is asserted when an MSI is received - bus-range: Range of bus numbers associated with this controller - #address-cells: Address representation for root ports (must be 3) @@ -60,27 +86,15 @@ Required properties: - interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties Please refer to the standard PCI bus binding document for a more detailed explanation. -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - core -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following entries: - - apb - - core -- phys: Must contain a phandle to P2U PHY for each entry in phy-names. -- phy-names: Must include an entry for each active lane. - "p2u-N": where N ranges from 0 to one less than the total number of lanes -- nvidia,bpmp: Must contain a pair of phandle to BPMP controller node followed - by controller-id. Following are the controller ids for each controller. - 0: C0 - 1: C1 - 2: C2 - 3: C3 - 4: C4 - 5: C5 -- vddio-pex-ctl-supply: Regulator supply for PCIe side band signals + +EP mode: +In Tegra194, Only controllers C0, C4 & C5 support EP mode. +- compatible: Tegra19x must contain "nvidia,tegra194-pcie-ep" +- reg-names: Must include the following entries: + "addr_space": Used to map remote RC address space +- reset-gpios: Must contain a phandle to a GPIO controller followed by + GPIO that is being used as PERST input signal. Please refer to pci.txt + document. Optional properties: - pinctrl-names: A list of pinctrl state names. @@ -104,6 +118,8 @@ Optional properties: specified in microseconds - nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be specified in microseconds + +RC mode: - vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot if the platform has one such slot. (Ex:- x16 slot owned by C5 controller in p2972-0000 platform). @@ -111,14 +127,21 @@ Optional properties: if the platform has one such slot. (Ex:- x16 slot owned by C5 controller in p2972-0000 platform). +EP mode: +- nvidia,refclk-select-gpios: Must contain a phandle to a GPIO controller + followed by GPIO that is being used to enable REFCLK to controller from host + +NOTE:- On Tegra194's P2972-0000 platform, only C5 controller can be enabled to +operate in the endpoint mode because of the way the platform is designed. + Examples: ========= -Tegra194: --------- +Tegra194 RC mode: +----------------- pcie@14180000 { - compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; + compatible = "nvidia,tegra194-pcie"; power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>; reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */ 0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */ @@ -169,3 +192,53 @@ Tegra194: <&p2u_hsio_5>; phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; }; + +Tegra194 EP mode: +----------------- + + pcie_ep@141a0000 { + compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>; + reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x3a040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */ + 0x00 0x3a080000 0x0 0x00040000 /* DBI reg space (256K) */ + 0x1c 0x00000000 0x4 0x00000000>; /* Address Space (16G) */ + reg-names = "appl", "atu_dma", "dbi", "addr_space"; + + num-lanes = <8>; + num-ib-windows = <2>; + num-ob-windows = <8>; + + pinctrl-names = "default"; + pinctrl-0 = <&clkreq_c5_bi_dir_state>; + + clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>; + clock-names = "core"; + + resets = <&bpmp TEGRA194_RESET_PEX1_CORE_5_APB>, + <&bpmp TEGRA194_RESET_PEX1_CORE_5>; + reset-names = "apb", "core"; + + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "intr"; + + nvidia,bpmp = <&bpmp 5>; + + nvidia,aspm-cmrt-us = <60>; + nvidia,aspm-pwr-on-t-us = <20>; + nvidia,aspm-l0s-entrance-latency-us = <3>; + + vddio-pex-ctl-supply = <&vdd_1v8ao>; + + reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; + + nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) + GPIO_ACTIVE_HIGH>; + + phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, + <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, + <&p2u_nvhs_6>, <&p2u_nvhs_7>; + + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", + "p2u-5", "p2u-6", "p2u-7"; + }; diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml new file mode 100644 index 000000000000..b3df100705b0 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/pci-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PCI Endpoint Controller Schema + +description: | + Common properties for PCI Endpoint Controller Nodes. + +maintainers: + - Kishon Vijay Abraham I <kishon@ti.com> + +properties: + $nodename: + pattern: "^pcie-ep@" + + max-functions: + description: Maximum number of functions that can be configured + allOf: + - $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + default: 1 + maximum: 255 + + max-link-speed: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 3, 4 ] + + num-lanes: + description: maximum number of lanes + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + default: 1 + maximum: 16 + +required: + - compatible diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml index e5922b427342..c03b83103e87 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml @@ -34,6 +34,8 @@ required: - resets - "#phy-cells" +additionalProperties: false + examples: - | #include <dt-bindings/clock/sun50i-h6-ccu.h> diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml new file mode 100644 index 000000000000..88683db6cf81 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic AXG shared MIPI/PCIE analog PHY + +maintainers: + - Remi Pommarel <repk@triplefau.lt> + +properties: + compatible: + const: amlogic,axg-mipi-pcie-analog-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + +required: + - compatible + - reg + - "#phy-cells" + +additionalProperties: false + +examples: + - | + mpphy: phy@0 { + compatible = "amlogic,axg-mipi-pcie-analog-phy"; + reg = <0x0 0x0 0x0 0xc>; + #phy-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml new file mode 100644 index 000000000000..086478aec946 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-pcie.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic AXG PCIE PHY + +maintainers: + - Remi Pommarel <repk@triplefau.lt> + +properties: + compatible: + const: amlogic,axg-pcie-phy + + reg: + maxItems: 1 + + resets: + maxItems: 1 + + phys: + maxItems: 1 + + phy-names: + const: analog + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - phys + - phy-names + - resets + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/amlogic,meson-axg-reset.h> + #include <dt-bindings/phy/phy.h> + pcie_phy: pcie-phy@ff644000 { + compatible = "amlogic,axg-pcie-phy"; + reg = <0x0 0xff644000 0x0 0x1c>; + resets = <&reset RESET_PCIE_PHY>; + phys = <&mipi_analog_phy PHY_TYPE_PCIE>; + phy-names = "analog"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml index 57d8603076bd..9e32cb43fb21 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - amlogic,meson-g12a-usb2-phy + - amlogic,meson-a1-usb2-phy reg: maxItems: 1 @@ -49,6 +50,19 @@ required: - reset-names - "#phy-cells" +if: + properties: + compatible: + enum: + - amlogic,meson-a1-usb-ctrl + +then: + properties: + power-domains: + maxItems: 1 + required: + - power-domains + examples: - | phy@36000 { diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml index 346f9c35427c..453c083cf44c 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml @@ -44,6 +44,8 @@ required: - reset-names - "#phy-cells" +additionalProperties: false + examples: - | phy@46000 { diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml index 0ccee64c6962..9a346d6290d9 100644 --- a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml @@ -40,6 +40,8 @@ required: - reg - clocks +additionalProperties: false + examples: - | sysconf: chiptop@e0200000 { diff --git a/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml index 5ab436189f3b..00609ace677c 100644 --- a/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml +++ b/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml @@ -31,6 +31,8 @@ required: - reset-gpios - "#phy-cells" +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml new file mode 100644 index 000000000000..c97043eaa8fb --- /dev/null +++ b/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk> +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/marvell,mmp3-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MMP3 USB PHY bindings + +maintainers: + - Lubomir Rintel <lkundrak@v3.sk> + +properties: + $nodename: + pattern: '^usb-phy@[a-f0-9]+$' + + compatible: + const: marvell,mmp3-usb-phy + + reg: + maxItems: 1 + description: base address of the device + + '#phy-cells': + const: 0 + +required: + - compatible + - reg + - '#phy-cells' + +additionalProperties: false + +examples: + - | + usb-phy@d4207000 { + compatible = "marvell,mmp3-usb-phy"; + reg = <0xd4207000 0x40>; + #phy-cells = <0>; + }; + +... diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt index 9fb682e47c29..38c5fa21f435 100644 --- a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt @@ -37,6 +37,7 @@ Required properties: - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl" - Tegra210: "nvidia,tegra210-xusb-padctl" - Tegra186: "nvidia,tegra186-xusb-padctl" + - Tegra194: "nvidia,tegra194-xusb-padctl" - reg: Physical base address and length of the controller's registers. - resets: Must contain an entry for each entry in reset-names. - reset-names: Must include the following entries: @@ -62,6 +63,10 @@ For Tegra186: - vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V. - vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V. +For Tegra194: +- avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply + 3.3 V. +- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V. Pad nodes: ========== @@ -154,6 +159,11 @@ For Tegra210, the list of valid PHY nodes is given below: - sata: sata-0 - functions: "usb3-ss", "sata" +For Tegra194, the list of valid PHY nodes is given below: +- usb2: usb2-0, usb2-1, usb2-2, usb2-3 + - functions: "xusb" +- usb3: usb3-0, usb3-1, usb3-2, usb3-3 + - functions: "xusb" Port nodes: =========== @@ -174,6 +184,12 @@ Required properties: - "device": for USB device mode - "otg": for USB OTG mode +Required properties for OTG/Peripheral capable USB2 ports: +- usb-role-switch: Boolean property to indicate that the port support OTG or + peripheral mode. If present, the port supports switching between USB host + and peripheral roles. Connector should be added as subnode. + See usb/usb-conn-gpio.txt. + Optional properties: - nvidia,internal: A boolean property whose presence determines that a port is internal. In the absence of this property the port is considered to be @@ -221,6 +237,11 @@ Optional properties: is internal. In the absence of this property the port is considered to be external. +- maximum-speed: Only for Tegra194. A string property that specifies maximum + supported speed of a usb3 port. Valid values are: + - "super-speed-plus": default, the usb3 port supports USB 3.1 Gen 2 speed. + - "super-speed": the usb3 port supports USB 3.1 Gen 1 speed only. + For Tegra124 and Tegra132, the XUSB pad controller exposes the following ports: - 3x USB2: usb2-0, usb2-1, usb2-2 @@ -233,6 +254,9 @@ For Tegra210, the XUSB pad controller exposes the following ports: - 2x HSIC: hsic-0, hsic-1 - 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3 +For Tegra194, the XUSB pad controller exposes the following ports: +- 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3 +- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3 Examples: ========= diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt b/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt deleted file mode 100644 index 7f49fd54ebc1..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt +++ /dev/null @@ -1,30 +0,0 @@ -Cadence MHDP DisplayPort SD0801 PHY binding -=========================================== - -This binding describes the Cadence SD0801 PHY hardware included with -the Cadence MHDP DisplayPort controller. - -------------------------------------------------------------------------------- -Required properties (controller (parent) node): -- compatible : Should be "cdns,dp-phy" -- reg : Defines the following sets of registers in the parent - mhdp device: - - Offset of the DPTX PHY configuration registers - - Offset of the SD0801 PHY configuration registers -- #phy-cells : from the generic PHY bindings, must be 0. - -Optional properties: -- num_lanes : Number of DisplayPort lanes to use (1, 2 or 4) -- max_bit_rate : Maximum DisplayPort link bit rate to use, in Mbps (2160, - 2430, 2700, 3240, 4320, 5400 or 8100) -------------------------------------------------------------------------------- - -Example: - dp_phy: phy@f0fb030a00 { - compatible = "cdns,dp-phy"; - reg = <0xf0 0xfb030a00 0x0 0x00000040>, - <0xf0 0xfb500000 0x0 0x00100000>; - num_lanes = <4>; - max_bit_rate = <8100>; - #phy-cells = <0>; - }; diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml new file mode 100644 index 000000000000..c779a3c7d87a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence Torrent SD0801 PHY binding for DisplayPort + +description: + This binding describes the Cadence SD0801 PHY (also known as Torrent PHY) + hardware included with the Cadence MHDP DisplayPort controller. + +maintainers: + - Swapnil Jakhade <sjakhade@cadence.com> + - Yuti Amonkar <yamonkar@cadence.com> + +properties: + compatible: + enum: + - cdns,torrent-phy + - ti,j721e-serdes-10g + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + clocks: + maxItems: 1 + description: + PHY reference clock. Must contain an entry in clock-names. + + clock-names: + const: refclk + + reg: + minItems: 1 + maxItems: 2 + items: + - description: Offset of the Torrent PHY configuration registers. + - description: Offset of the DPTX PHY configuration registers. + + reg-names: + minItems: 1 + maxItems: 2 + items: + - const: torrent_phy + - const: dptx_phy + + resets: + maxItems: 1 + description: + Torrent PHY reset. + See Documentation/devicetree/bindings/reset/reset.txt + +patternProperties: + '^phy@[0-7]+$': + type: object + description: + Each group of PHY lanes with a single master lane should be represented as a sub-node. + properties: + reg: + description: + The master lane number. This is the lowest numbered lane in the lane group. + + resets: + minItems: 1 + maxItems: 4 + description: + Contains list of resets, one per lane, to get all the link lanes out of reset. + + "#phy-cells": + const: 0 + + cdns,phy-type: + description: + Specifies the type of PHY for which the group of PHY lanes is used. + Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 3, 4, 5, 6] + + cdns,num-lanes: + description: + Number of DisplayPort lanes. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4] + default: 4 + + cdns,max-bit-rate: + description: + Maximum DisplayPort link bit rate to use, in Mbps + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100] + default: 8100 + + required: + - reg + - resets + - "#phy-cells" + - cdns,phy-type + + additionalProperties: false + +required: + - compatible + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + - reg + - reg-names + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/phy/phy.h> + torrent_phy: torrent-phy@f0fb500000 { + compatible = "cdns,torrent-phy"; + reg = <0xf0 0xfb500000 0x0 0x00100000>, + <0xf0 0xfb030a00 0x0 0x00000040>; + reg-names = "torrent_phy", "dptx_phy"; + resets = <&phyrst 0>; + clocks = <&ref_clk>; + clock-names = "refclk"; + #address-cells = <1>; + #size-cells = <0>; + torrent_phy_dp: phy@0 { + reg = <0>; + resets = <&phyrst 1>, <&phyrst 2>, + <&phyrst 3>, <&phyrst 4>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_DP>; + cdns,num-lanes = <4>; + cdns,max-bit-rate = <8100>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt b/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt deleted file mode 100644 index 7183b9102f91..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt +++ /dev/null @@ -1,13 +0,0 @@ -Marvell MMP3 USB PHY --------------------- - -Required properties: -- compatible: must be "marvell,mmp3-usb-phy" -- #phy-cells: must be 0 - -Example: - usb-phy: usb-phy@d4207000 { - compatible = "marvell,mmp3-usb-phy"; - reg = <0xd4207000 0x40>; - #phy-cells = <0>; - }; diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt index a5f7a4f0dbc1..dd75b676b71d 100644 --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt @@ -13,10 +13,16 @@ Required properties (controller (parent) node): "mediatek,mt8173-u3phy"; make use of "mediatek,generic-tphy-v1" on mt2701 instead and "mediatek,generic-tphy-v2" on mt2712 instead. - - clocks : (deprecated, use port's clocks instead) a list of phandle + - clock-specifier pairs, one for each entry in clock-names - - clock-names : (deprecated, use port's one instead) must contain - "u3phya_ref": for reference clock of usb3.0 analog phy. + +- #address-cells: the number of cells used to represent physical + base addresses. +- #size-cells: the number of cells used to represent the size of an address. +- ranges: the address mapping relationship to the parent, defined with + - empty value: if optional 'reg' is used. + - non-empty value: if optional 'reg' is not used. should set + the child's base address to 0, the physical address + within parent's address space, and the length of + the address map. Required nodes : a sub-node is required for each port the controller provides. Address range information including the usual @@ -34,12 +40,6 @@ Optional properties (controller (parent) node): Required properties (port (child) node): - reg : address and length of the register set for the port. -- clocks : a list of phandle + clock-specifier pairs, one for each - entry in clock-names -- clock-names : must contain - "ref": 48M reference clock for HighSpeed analog phy; and 26M - reference clock for SuperSpeed analog phy, sometimes is - 24M, 25M or 27M, depended on platform. - #phy-cells : should be 1 (See second example) cell after port phandle is phy type from: - PHY_TYPE_USB2 @@ -48,10 +48,22 @@ Required properties (port (child) node): - PHY_TYPE_SATA Optional properties (PHY_TYPE_USB2 port (child) node): +- clocks : a list of phandle + clock-specifier pairs, one for each + entry in clock-names +- clock-names : may contain + "ref": 48M reference clock for HighSpeed (digital) phy; and 26M + reference clock for SuperSpeed (digital) phy, sometimes is + 24M, 25M or 27M, depended on platform. + "da_ref": the reference clock of analog phy, used if the clocks + of analog and digital phys are separated, otherwise uses + "ref" clock only if needed. + - mediatek,eye-src : u32, the value of slew rate calibrate - mediatek,eye-vrt : u32, the selection of VRT reference voltage - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage - mediatek,bc12 : bool, enable BC12 of u2phy if support it +- mediatek,discth : u32, the selection of disconnect threshold +- mediatek,intr : u32, the selection of internal R (resistance) Example: diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt deleted file mode 100644 index 541f5298827c..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt +++ /dev/null @@ -1,81 +0,0 @@ -ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK - -Required properties (phy (parent) node): - - compatible : should be one of the listed compatibles: - * "rockchip,px30-usb2phy" - * "rockchip,rk3228-usb2phy" - * "rockchip,rk3328-usb2phy" - * "rockchip,rk3366-usb2phy" - * "rockchip,rk3399-usb2phy" - * "rockchip,rv1108-usb2phy" - - reg : the address offset of grf for usb-phy configuration. - - #clock-cells : should be 0. - - clock-output-names : specify the 480m output clock name. - -Optional properties: - - clocks : phandle + phy specifier pair, for the input clock of phy. - - clock-names : input clock name of phy, must be "phyclk". - - assigned-clocks : phandle of usb 480m clock. - - assigned-clock-parents : parent of usb 480m clock, select between - usb-phy output 480m and xin24m. - Refer to clk/clock-bindings.txt for generic clock - consumer properties. - - rockchip,usbgrf : phandle to the syscon managing the "usb general - register files". When set driver will request its - phandle as one companion-grf for some special SoCs - (e.g RV1108). - - extcon : phandle to the extcon device providing the cable state for - the otg phy. - -Required nodes : a sub-node is required for each port the phy provides. - The sub-node name is used to identify host or otg port, - and shall be the following entries: - * "otg-port" : the name of otg port. - * "host-port" : the name of host port. - -Required properties (port (child) node): - - #phy-cells : must be 0. See ./phy-bindings.txt for details. - - interrupts : specify an interrupt for each entry in interrupt-names. - - interrupt-names : a list which should be one of the following cases: - Regular case: - * "otg-id" : for the otg id interrupt. - * "otg-bvalid" : for the otg vbus interrupt. - * "linestate" : for the host/otg linestate interrupt. - Some SoCs use one interrupt with the above muxed together, so for these - * "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate - to one. - -Optional properties: - - phy-supply : phandle to a regulator that provides power to VBUS. - See ./phy-bindings.txt for details. - -Example: - -grf: syscon@ff770000 { - compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - -... - - u2phy: usb2-phy@700 { - compatible = "rockchip,rk3366-usb2phy"; - reg = <0x700 0x2c>; - #clock-cells = <0>; - clock-output-names = "sclk_otgphy0_480m"; - - u2phy_otg: otg-port { - #phy-cells = <0>; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "otg-id", "otg-bvalid", "linestate"; - }; - - u2phy_host: host-port { - #phy-cells = <0>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "linestate"; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml new file mode 100644 index 000000000000..cb71561a21b4 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip USB2.0 phy with inno IP block + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,px30-usb2phy + - rockchip,rk3228-usb2phy + - rockchip,rk3328-usb2phy + - rockchip,rk3366-usb2phy + - rockchip,rk3399-usb2phy + - rockchip,rv1108-usb2phy + + reg: + maxItems: 1 + + clock-output-names: + description: + The usb 480m output clock name. + + "#clock-cells": + const: 0 + + "#phy-cells": + const: 0 + + clocks: + maxItems: 1 + + clock-names: + const: phyclk + + assigned-clocks: + description: + Phandle of the usb 480m clock. + + assigned-clock-parents: + description: + Parent of the usb 480m clock. + Select between usb-phy output 480m and xin24m. + Refer to clk/clock-bindings.txt for generic clock consumer properties. + + extcon: + description: + Phandle to the extcon device providing the cable state for the otg phy. + + rockchip,usbgrf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the 'usb general register files'. + When set the driver will request its phandle as one companion-grf + for some special SoCs (e.g rv1108). + + host-port: + type: object + additionalProperties: false + + properties: + "#phy-cells": + const: 0 + + interrupts: + description: host linestate interrupt + + interrupt-names: + const: linestate + + phy-supply: + description: + Phandle to a regulator that provides power to VBUS. + See ./phy-bindings.txt for details. + + required: + - "#phy-cells" + - interrupts + - interrupt-names + + otg-port: + type: object + additionalProperties: false + + properties: + "#phy-cells": + const: 0 + + interrupts: + minItems: 1 + maxItems: 3 + + interrupt-names: + oneOf: + - const: linestate + - const: otg-mux + - items: + - const: otg-bvalid + - const: otg-id + - const: linestate + + phy-supply: + description: + Phandle to a regulator that provides power to VBUS. + See ./phy-bindings.txt for details. + + required: + - "#phy-cells" + - interrupts + - interrupt-names + +required: + - compatible + - reg + - clock-output-names + - "#clock-cells" + - "#phy-cells" + - host-port + - otg-port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3399-cru.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + u2phy0: usb2-phy@e450 { + compatible = "rockchip,rk3399-usb2phy"; + reg = <0xe450 0x10>; + clocks = <&cru SCLK_USB2PHY0_REF>; + clock-names = "phyclk"; + clock-output-names = "clk_usbphy0_480m"; + #clock-cells = <0>; + #phy-cells = <0>; + + u2phy0_host: host-port { + #phy-cells = <0>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "linestate"; + }; + + u2phy0_otg: otg-port { + #phy-cells = <0>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "otg-bvalid", "otg-id", "linestate"; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml new file mode 100644 index 000000000000..144ae29e7141 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm QUSB2 phy controller + +maintainers: + - Manu Gautam <mgautam@codeaurora.org> + +description: + QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,msm8996-qusb2-phy + - qcom,msm8998-qusb2-phy + - items: + - enum: + - qcom,sc7180-qusb2-phy + - qcom,sdm845-qusb2-phy + - const: qcom,qusb2-v2-phy + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + minItems: 2 + maxItems: 3 + items: + - description: phy config clock + - description: 19.2 MHz ref clk + - description: phy interface clock (Optional) + + clock-names: + minItems: 2 + maxItems: 3 + items: + - const: cfg_ahb + - const: ref + - const: iface + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + + vdda-phy-dpdm-supply: + description: + Phandle to 3.1V regulator supply to Dp/Dm port signals. + + resets: + maxItems: 1 + description: + Phandle to reset to phy block. + + nvmem-cells: + maxItems: 1 + description: + Phandle to nvmem cell that contains 'HS Tx trim' + tuning parameter value for qusb2 phy. + + qcom,tcsr-syscon: + description: + Phandle to TCSR syscon register region. + $ref: /schemas/types.yaml#/definitions/phandle + +if: + properties: + compatible: + contains: + const: qcom,qusb2-v2-phy +then: + properties: + qcom,imp-res-offset-value: + description: + It is a 6 bit value that specifies offset to be + added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY + tuning parameter that may vary for different boards of same SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 63 + default: 0 + + qcom,bias-ctrl-value: + description: + It is a 6 bit value that specifies bias-ctrl-value. It is a PHY + tuning parameter that may vary for different boards of same SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 63 + default: 0 + + qcom,charge-ctrl-value: + description: + It is a 2 bit value that specifies charge-ctrl-value. It is a PHY + tuning parameter that may vary for different boards of same SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 3 + default: 0 + + qcom,hstx-trim-value: + description: + It is a 4 bit value that specifies tuning for HSTX + output current. + Possible range is - 15mA to 24mA (stepsize of 600 uA). + See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 15 + default: 3 + + qcom,preemphasis-level: + description: + It is a 2 bit value that specifies pre-emphasis level. + Possible range is 0 to 15% (stepsize of 5%). + See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 3 + default: 2 + + qcom,preemphasis-width: + description: + It is a 1 bit value that specifies how long the HSTX + pre-emphasis (specified using qcom,preemphasis-level) must be in + effect. Duration could be half-bit of full-bit. + See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 1 + default: 0 + + qcom,hsdisc-trim-value: + description: + It is a 2 bit value tuning parameter that control disconnect + threshold and may vary for different boards of same SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 3 + default: 0 + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - vdda-pll-supply + - vdda-phy-dpdm-supply + - resets + + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8996.h> + hsusb_phy: phy@7411000 { + compatible = "qcom,msm8996-qusb2-phy"; + reg = <0x7411000 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_RX1_USB2_CLKREF_CLK>; + clock-names = "cfg_ahb", "ref"; + + vdda-pll-supply = <&pm8994_l12>; + vdda-phy-dpdm-supply = <&pm8994_l24>; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + nvmem-cells = <&qusb2p_hstx_trim>; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml new file mode 100644 index 000000000000..ca6a0836b53c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY + +maintainers: + - Bryan O'Donoghue <bryan.odonoghue@linaro.org> + +description: | + Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY + +properties: + compatible: + enum: + - qcom,usb-hs-28nm-femtophy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: rpmcc ref clock + - description: PHY AHB clock + - description: Rentention clock + + clock-names: + items: + - const: ref + - const: ahb + - const: sleep + + resets: + items: + - description: PHY core reset + - description: POR reset + + reset-names: + items: + - const: phy + - const: por + + vdd-supply: + description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + description: phandle to the regulator 1.8V supply node. + + vdda3p3-supply: + description: phandle to the regulator 3.3V supply node. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + - vdd-supply + - vdda1p8-supply + - vdda3p3-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-qcs404.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + usb2_phy_prim: phy@7a000 { + compatible = "qcom,usb-hs-28nm-femtophy"; + reg = <0x0007a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "ahb", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + vdd-supply = <&vreg_l4_1p2>; + vdda1p8-supply = <&vreg_l5_1p8>; + vdda3p3-supply = <&vreg_l12_3p3>; + }; +... diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml new file mode 100644 index 000000000000..bd1388d62ce0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +maintainers: + - Bryan O'Donoghue <bryan.odonoghue@linaro.org> + +description: | + Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +properties: + compatible: + enum: + - qcom,usb-ss-28nm-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: rpmcc clock + - description: PHY AHB clock + - description: SuperSpeed pipe clock + + clock-names: + items: + - const: ref + - const: ahb + - const: pipe + + vdd-supply: + description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + description: phandle to the regulator 1.8V supply node. + + resets: + items: + - description: COM reset + - description: PHY reset line + + reset-names: + items: + - const: com + - const: phy + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - vdd-supply + - vdda1p8-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-qcs404.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + usb3_phy: usb3-phy@78000 { + compatible = "qcom,usb-ss-28nm-phy"; + reg = <0x78000 0x400>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "ref", "ahb", "pipe"; + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; + reset-names = "com", "phy"; + vdd-supply = <&vreg_l3_1p05>; + vdda1p8-supply = <&vreg_l5_1p8>; + }; +... diff --git a/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt b/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt deleted file mode 100644 index a1697c27aecd..000000000000 --- a/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt +++ /dev/null @@ -1,37 +0,0 @@ -Qualcomm DWC3 HS AND SS PHY CONTROLLER --------------------------------------- - -DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer -controllers. Each DWC3 PHY controller should have its own node. - -Required properties: -- compatible: should contain one of the following: - - "qcom,dwc3-hs-usb-phy" for High Speed Synopsis PHY controller - - "qcom,dwc3-ss-usb-phy" for Super Speed Synopsis PHY controller -- reg: offset and length of the DWC3 PHY controller register set -- #phy-cells: must be zero -- clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. -- clock-names: Should contain "ref" for the PHY reference clock - -Optional clocks: - "xo" External reference clock - -Example: - phy@100f8800 { - compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x100f8800 0x30>; - clocks = <&gcc USB30_0_UTMI_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - }; - - phy@100f8830 { - compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x100f8830 0x30>; - clocks = <&gcc USB30_0_MASTER_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - }; diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index eac9ad3cbbc8..54d6f8d43508 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -8,10 +8,13 @@ Required properties: - compatible: compatible list, contains: "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, + "qcom,msm8996-qmp-ufs-phy" for 14nm UFS phy on msm8996, "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, "qcom,msm8998-qmp-pcie-phy" for PCIe QMP phy on msm8998, + "qcom,sdm845-qhp-pcie-phy" for QHP PCIe phy on sdm845, + "qcom,sdm845-qmp-pcie-phy" for QMP PCIe phy on sdm845, "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845, "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845, @@ -44,6 +47,8 @@ Required properties: For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed. For "qcom,msm8996-qmp-pcie-phy" must contain: "aux", "cfg_ahb", "ref". + For "qcom,msm8996-qmp-ufs-phy" must contain: + "ref". For "qcom,msm8996-qmp-usb3-phy" must contain: "aux", "cfg_ahb", "ref". For "qcom,msm8998-qmp-usb3-phy" must contain: @@ -52,6 +57,10 @@ Required properties: "ref", "ref_aux". For "qcom,msm8998-qmp-pcie-phy" must contain: "aux", "cfg_ahb", "ref". + For "qcom,sdm845-qhp-pcie-phy" must contain: + "aux", "cfg_ahb", "ref", "refgen". + For "qcom,sdm845-qmp-pcie-phy" must contain: + "aux", "cfg_ahb", "ref", "refgen". For "qcom,sdm845-qmp-usb3-phy" must contain: "aux", "cfg_ahb", "ref", "com_aux". For "qcom,sdm845-qmp-usb3-uni-phy" must contain: @@ -72,6 +81,8 @@ Required properties: "phy", "common". For "qcom,msm8996-qmp-pcie-phy" must contain: "phy", "common", "cfg". + For "qcom,msm8996-qmp-ufs-phy": must contain: + "ufsphy". For "qcom,msm8996-qmp-usb3-phy" must contain "phy", "common". For "qcom,msm8998-qmp-usb3-phy" must contain @@ -80,6 +91,10 @@ Required properties: "ufsphy". For "qcom,msm8998-qmp-pcie-phy" must contain: "phy", "common". + For "qcom,sdm845-qhp-pcie-phy" must contain: + "phy". + For "qcom,sdm845-qmp-pcie-phy" must contain: + "phy". For "qcom,sdm845-qmp-usb3-phy" must contain: "phy", "common". For "qcom,sdm845-qmp-usb3-uni-phy" must contain: diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt deleted file mode 100644 index fe29f9e0af6d..000000000000 --- a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +++ /dev/null @@ -1,68 +0,0 @@ -Qualcomm QUSB2 phy controller -============================= - -QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets. - -Required properties: - - compatible: compatible list, contains - "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996, - "qcom,msm8998-qusb2-phy" for 10nm PHY on msm8998, - "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845. - - - reg: offset and length of the PHY register set. - - #phy-cells: must be 0. - - - clocks: a list of phandles and clock-specifier pairs, - one for each entry in clock-names. - - clock-names: must be "cfg_ahb" for phy config clock, - "ref" for 19.2 MHz ref clk, - "iface" for phy interface clock (Optional). - - - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block. - - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals. - - - resets: Phandle to reset to phy block. - -Optional properties: - - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim' - tuning parameter value for qusb2 phy. - - - qcom,tcsr-syscon: Phandle to TCSR syscon register region. - - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be - added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY - tuning parameter that may vary for different boards of same SOC. - This property is applicable to only QUSB2 v2 PHY (sdm845). - - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX - output current. - Possible range is - 15mA to 24mA (stepsize of 600 uA). - See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - This property is applicable to only QUSB2 v2 PHY (sdm845). - Default value is 22.2mA for sdm845. - - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level. - Possible range is 0 to 15% (stepsize of 5%). - See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - This property is applicable to only QUSB2 v2 PHY (sdm845). - Default value is 10% for sdm845. -- qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX - pre-emphasis (specified using qcom,preemphasis-level) must be in - effect. Duration could be half-bit of full-bit. - See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - This property is applicable to only QUSB2 v2 PHY (sdm845). - Default value is full-bit width for sdm845. - -Example: - hsusb_phy: phy@7411000 { - compatible = "qcom,msm8996-qusb2-phy"; - reg = <0x7411000 0x180>; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX1_USB2_CLKREF_CLK>, - clock-names = "cfg_ahb", "ref"; - - vdda-pll-supply = <&pm8994_l12>; - vdda-phy-dpdm-supply = <&pm8994_l24>; - - resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; - nvmem-cells = <&qusb2p_hstx_trim>; - }; diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml index 452cee1aed32..fd1982c56104 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml @@ -159,6 +159,8 @@ required: - "#reset-cells" - ranges +additionalProperties: false + examples: - | #include <dt-bindings/soc/ti,sci_pm_domain.h> diff --git a/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt index 50ce9ae0f7a5..83b78c1c0644 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt @@ -40,6 +40,7 @@ Required properties: "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform "ti,am43xx-phy-gmii-sel" for am43xx platform "ti,dm814-phy-gmii-sel" for dm814x platform + "ti,am654-phy-gmii-sel" for AM654x/J721E platform - reg : Address and length of the register set for the device - #phy-cells : must be 2. cell 1 - CPSW port number (starting from 1) diff --git a/Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt b/Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt index 1889d3b89d68..3cee372c5742 100644 --- a/Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt +++ b/Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt @@ -5,14 +5,19 @@ PCIe controller implemented on Socionext UniPhier SoCs. Required properties: - compatible: Should contain one of the following: + "socionext,uniphier-pro5-pcie-phy" - for Pro5 PHY "socionext,uniphier-ld20-pcie-phy" - for LD20 PHY "socionext,uniphier-pxs3-pcie-phy" - for PXs3 PHY - reg: Specifies offset and length of the register set for the device. - #phy-cells: Must be zero. -- clocks: A phandle to the clock gate for PCIe glue layer including - this phy. -- resets: A phandle to the reset line for PCIe glue layer including - this phy. +- clocks: A list of phandles to the clock gate for PCIe glue layer + including this phy. +- clock-names: For Pro5 only, should contain the following: + "gio", "link" - for Pro5 SoC +- resets: A list of phandles to the reset line for PCIe glue layer + including this phy. +- reset-names: For Pro5 only, should contain the following: + "gio", "link" - for Pro5 SoC Optional properties: - socionext,syscon: A phandle to system control to set configurations diff --git a/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt b/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt index e8d8086a7ae9..093d4f08705f 100644 --- a/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt +++ b/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt @@ -7,7 +7,7 @@ this describes about High-Speed PHY. Required properties: - compatible: Should contain one of the following: - "socionext,uniphier-pro4-usb3-hsphy" - for Pro4 SoC + "socionext,uniphier-pro5-usb3-hsphy" - for Pro5 SoC "socionext,uniphier-pxs2-usb3-hsphy" - for PXs2 SoC "socionext,uniphier-ld20-usb3-hsphy" - for LD20 SoC "socionext,uniphier-pxs3-usb3-hsphy" - for PXs3 SoC @@ -16,13 +16,13 @@ Required properties: - clocks: A list of phandles to the clock gate for USB3 glue layer. According to the clock-names, appropriate clocks are required. - clock-names: Should contain the following: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro5 SoC "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional. "phy", "link" - for others - resets: A list of phandles to the reset control for USB3 glue layer. According to the reset-names, appropriate resets are required. - reset-names: Should contain the following: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro5 SoC "phy", "link" - for others Optional properties: diff --git a/Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt b/Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt index 490b815445e8..9df2bc2f5999 100644 --- a/Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt +++ b/Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt @@ -8,6 +8,7 @@ this describes about Super-Speed PHY. Required properties: - compatible: Should contain one of the following: "socionext,uniphier-pro4-usb3-ssphy" - for Pro4 SoC + "socionext,uniphier-pro5-usb3-ssphy" - for Pro5 SoC "socionext,uniphier-pxs2-usb3-ssphy" - for PXs2 SoC "socionext,uniphier-ld20-usb3-ssphy" - for LD20 SoC "socionext,uniphier-pxs3-usb3-ssphy" - for PXs3 SoC @@ -16,13 +17,13 @@ Required properties: - clocks: A list of phandles to the clock gate for USB3 glue layer. According to the clock-names, appropriate clocks are required. - clock-names: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro4 and Pro5 SoC "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional. "phy", "link" - for others - resets: A list of phandles to the reset control for USB3 glue layer. According to the reset-names, appropriate resets are required. - reset-names: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro4 and Pro5 SoC "phy", "link" - for others Optional properties: diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml index 135c7dfbc180..7651a675ab2d 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml @@ -57,6 +57,8 @@ patternProperties: required: - compatible +additionalProperties: false + examples: - | syscon: scu@1e6e2000 { diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml index 824f7fd1d51b..36feaf5e2dff 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml @@ -70,6 +70,8 @@ required: - compatible - aspeed,external-nodes +additionalProperties: false + examples: - | apb { diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml index ac8d1c30a8ed..45af29bc3202 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml @@ -92,6 +92,8 @@ patternProperties: required: - compatible +additionalProperties: false + examples: - | syscon: scu@1e6e2000 { diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt index eb39f5051159..e8abbdad7b5d 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt @@ -38,7 +38,7 @@ Bank: 3 (A, B and C) 0xffffffff 0x7fff3ccf /* pioB */ 0xffffffff 0x007fffff /* pioC */ -For each peripheral/bank we will descibe in a u32 if a pin can be +For each peripheral/bank we will describe in a u32 if a pin can be configured in it by putting 1 to the pin bit (1 << pin) Let's take the pioA on peripheral B diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt deleted file mode 100644 index e4e01c05cf83..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt +++ /dev/null @@ -1,36 +0,0 @@ -* Freescale IMX8MM IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory -for common binding part and usage. - -Required properties: -- compatible: "fsl,imx8mm-iomuxc" -- reg: should contain the base physical address and size of the iomuxc - registers. - -Required properties in sub-nodes: -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val - input_val> are specified using a PIN_FUNC_ID macro, which can be found in - <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini - Reference Manual for detailed CONFIG settings. - -Examples: - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; -}; - -iomuxc: pinctrl@30330000 { - compatible = "fsl,imx8mm-iomuxc"; - reg = <0x0 0x30330000 0x0 0x10000>; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 - >; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml new file mode 100644 index 000000000000..d98a3866add8 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX8MM IOMUX Controller + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +properties: + compatible: + const: fsl,imx8mm-iomuxc + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can + be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last + integer CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX8M Mini Reference Manual for detailed CONFIG settings. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-matrix + - items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + # Pinmux controller node + - | + iomuxc: pinctrl@30330000 { + compatible = "fsl,imx8mm-iomuxc"; + reg = <0x30330000 0x10000>; + + pinctrl_uart2: uart2grp { + fsl,pins = + <0x23C 0x4A4 0x4FC 0x0 0x0 0x140>, + <0x240 0x4A8 0x000 0x0 0x0 0x140>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.txt deleted file mode 100644 index 330716c971b9..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.txt +++ /dev/null @@ -1,39 +0,0 @@ -* Freescale IMX8MN IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory -for common binding part and usage. - -Required properties: -- compatible: "fsl,imx8mn-iomuxc" -- reg: should contain the base physical address and size of the iomuxc - registers. - -Required properties in sub-nodes: -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val - input_val> are specified using a PIN_FUNC_ID macro, which can be found in - <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX8M Nano - Reference Manual for detailed CONFIG settings. - -Examples: - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; -}; - -iomuxc: pinctrl@30330000 { - compatible = "fsl,imx8mn-iomuxc"; - reg = <0x0 0x30330000 0x0 0x10000>; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 - MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 - MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 - MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140 - MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19 - >; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml new file mode 100644 index 000000000000..b9aa180e07e4 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mn-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX8MN IOMUX Controller + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +properties: + compatible: + const: fsl,imx8mn-iomuxc + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can + be found in <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last + integer CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX8M Nano Reference Manual for detailed CONFIG settings. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-matrix + - items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + # Pinmux controller node + - | + iomuxc: pinctrl@30330000 { + compatible = "fsl,imx8mn-iomuxc"; + reg = <0x30330000 0x10000>; + + pinctrl_uart2: uart2grp { + fsl,pins = + <0x23C 0x4A4 0x4FC 0x0 0x0 0x140>, + <0x240 0x4A8 0x000 0x0 0x0 0x140>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml index 2e31e120395e..6297e78418cf 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml @@ -30,8 +30,6 @@ patternProperties: properties: fsl,pins: - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32-array description: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers <mux_reg conf_reg input_reg @@ -39,6 +37,22 @@ patternProperties: be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last integer CONFIG is the pad setting value like pull-up on this pin. Please refer to i.MX8M Plus Reference Manual for detailed CONFIG settings. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-matrix + - items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. required: - fsl,pins @@ -59,10 +73,9 @@ examples: reg = <0x30330000 0x10000>; pinctrl_uart2: uart2grp { - fsl,pins = < - 0x228 0x488 0x5F0 0x0 0x6 0x49 - 0x228 0x488 0x000 0x0 0x0 0x49 - >; + fsl,pins = + <0x228 0x488 0x5F0 0x0 0x6 0x49>, + <0x228 0x488 0x000 0x0 0x0 0x49>; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt deleted file mode 100644 index 66de75090458..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt +++ /dev/null @@ -1,36 +0,0 @@ -* Freescale IMX8MQ IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory -for common binding part and usage. - -Required properties: -- compatible: "fsl,imx8mq-iomuxc" -- reg: should contain the base physical address and size of the iomuxc - registers. - -Required properties in sub-nodes: -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val - input_val> are specified using a PIN_FUNC_ID macro, which can be found in - imx8mq-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX8M Quad - Reference Manual for detailed CONFIG settings. - -Examples: - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; -}; - -iomuxc: pinctrl@30330000 { - compatible = "fsl,imx8mq-iomuxc"; - reg = <0x0 0x30330000 0x0 0x10000>; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 - MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 - >; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml new file mode 100644 index 000000000000..b30c704fcfa1 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX8MQ IOMUX Controller + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +properties: + compatible: + const: fsl,imx8mq-iomuxc + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can + be found in <arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h>. The last + integer CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX8M Quad Reference Manual for detailed CONFIG settings. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-matrix + - items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + # Pinmux controller node + - | + iomuxc: pinctrl@30330000 { + compatible = "fsl,imx8mq-iomuxc"; + reg = <0x30330000 0x10000>; + + pinctrl_uart1: uart1grp { + fsl,pins = + <0x234 0x49C 0x4F4 0x0 0x0 0x49>, + <0x238 0x4A0 0x4F4 0x0 0x0 0x49>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml new file mode 100644 index 000000000000..63d1cfe86c6e --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. IPQ6018 TLMM block + +maintainers: + - Sricharan R <sricharan@codeaurora.org> + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + IPQ6018 platform. + +properties: + compatible: + const: qcom,ipq6018-pinctrl + + reg: + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the PIN numbers and Flags, as defined in defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pinmux$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + allOf: + - $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([1-9]|[1-7][0-9]|80)$" + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, + sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2, + qdsd_data3 ] + minItems: 1 + maxItems: 4 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, + atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac, + atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0, + atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c, + blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi, + blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi, + blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi, + blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi, + blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst, + cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0, + cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v, + dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass, + flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, + gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, + gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, + ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, + nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, + pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b, + pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a, + pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, + qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, + qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, + qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, + qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write, + sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, + uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq6018-pinctrl"; + reg = <0x01000000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 80>; + + serial3-pinmux { + pins = "gpio44", "gpio45"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-pull-down; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt deleted file mode 100644 index 8173b12138ad..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt +++ /dev/null @@ -1,27 +0,0 @@ -UniPhier SoCs pin controller - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-pinctrl" - for LD4 SoC - "socionext,uniphier-pro4-pinctrl" - for Pro4 SoC - "socionext,uniphier-sld8-pinctrl" - for sLD8 SoC - "socionext,uniphier-pro5-pinctrl" - for Pro5 SoC - "socionext,uniphier-pxs2-pinctrl" - for PXs2 SoC - "socionext,uniphier-ld6b-pinctrl" - for LD6b SoC - "socionext,uniphier-ld11-pinctrl" - for LD11 SoC - "socionext,uniphier-ld20-pinctrl" - for LD20 SoC - "socionext,uniphier-pxs3-pinctrl" - for PXs3 SoC - -Note: -The UniPhier pinctrl should be a subnode of a "syscon" compatible node. - -Example: - soc-glue@5f800000 { - compatible = "socionext,uniphier-pro4-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; - - pinctrl: pinctrl { - compatible = "socionext,uniphier-pro4-pinctrl"; - }; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml new file mode 100644 index 000000000000..f8a93d8680f9 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/socionext,uniphier-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier SoCs pin controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + $nodename: + pattern: "pinctrl" + + compatible: + enum: + - socionext,uniphier-ld4-pinctrl + - socionext,uniphier-pro4-pinctrl + - socionext,uniphier-sld8-pinctrl + - socionext,uniphier-pro5-pinctrl + - socionext,uniphier-pxs2-pinctrl + - socionext,uniphier-ld6b-pinctrl + - socionext,uniphier-ld11-pinctrl + - socionext,uniphier-ld20-pinctrl + - socionext,uniphier-pxs3-pinctrl + +required: + - compatible + +examples: + - | + // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. + + soc-glue@5f800000 { + compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + + pinctrl: pinctrl { + compatible = "socionext,uniphier-pro4-pinctrl"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index ef4de32cb17c..46a0478cb924 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -194,6 +194,8 @@ required: - ranges - pins-are-numbered +additionalProperties: false + examples: - | #include <dt-bindings/pinctrl/stm32-pinfunc.h> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index d3098c924b25..6c6079fe1351 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -68,6 +68,8 @@ required: - "#power-domain-cells" - amlogic,ao-sysctrl +additionalProperties: false + examples: - | pwrc: power-controller { diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml new file mode 100644 index 000000000000..bc4e037f3f73 --- /dev/null +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) +# Copyright (c) 2019 Amlogic, Inc +# Author: Jianxin Pan <jianxin.pan@amlogic.com> +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Secure Power Domains + +maintainers: + - Jianxin Pan <jianxin.pan@amlogic.com> + +description: |+ + Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node + of secure-monitor. + +properties: + compatible: + enum: + - amlogic,meson-a1-pwrc + + "#power-domain-cells": + const: 1 + +required: + - compatible + - "#power-domain-cells" + +examples: + - | + secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,meson-a1-pwrc"; + #power-domain-cells = <1>; + }; + }; + diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index 6047aacd7766..ff5936e4a215 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -114,18 +114,18 @@ examples: domain-idle-states = <&DOMAIN_PWR_DN>; }; - DOMAIN_RET: state@0 { - compatible = "domain-idle-state"; - reg = <0x0 0x0>; - entry-latency-us = <1000>; - exit-latency-us = <2000>; - min-residency-us = <10000>; - }; - - DOMAIN_PWR_DN: state@1 { - compatible = "domain-idle-state"; - reg = <0x1 0x0>; - entry-latency-us = <5000>; - exit-latency-us = <8000>; - min-residency-us = <7000>; + domain-idle-states { + DOMAIN_RET: domain-retention { + compatible = "domain-idle-state"; + entry-latency-us = <1000>; + exit-latency-us = <2000>; + min-residency-us = <10000>; + }; + + DOMAIN_PWR_DN: domain-pwr-dn { + compatible = "domain-idle-state"; + entry-latency-us = <5000>; + exit-latency-us = <8000>; + min-residency-us = <7000>; + }; }; diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt b/Documentation/devicetree/bindings/power/renesas,apmu.txt deleted file mode 100644 index 5f24586c8cf3..000000000000 --- a/Documentation/devicetree/bindings/power/renesas,apmu.txt +++ /dev/null @@ -1,35 +0,0 @@ -DT bindings for the Renesas Advanced Power Management Unit - -Renesas R-Car and RZ/G1 SoCs utilize one or more APMU hardware units -for CPU core power domain control including SMP boot and CPU Hotplug. - -Required properties: - -- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback. - Examples with soctypes are: - - "renesas,r8a7743-apmu" (RZ/G1M) - - "renesas,r8a7744-apmu" (RZ/G1N) - - "renesas,r8a7745-apmu" (RZ/G1E) - - "renesas,r8a77470-apmu" (RZ/G1C) - - "renesas,r8a7790-apmu" (R-Car H2) - - "renesas,r8a7791-apmu" (R-Car M2-W) - - "renesas,r8a7792-apmu" (R-Car V2H) - - "renesas,r8a7793-apmu" (R-Car M2-N) - - "renesas,r8a7794-apmu" (R-Car E2) - -- reg: Base address and length of the I/O registers used by the APMU. - -- cpus: This node contains a list of CPU cores, which should match the order - of CPU cores used by the WUPCR and PSTR registers in the Advanced Power - Management Unit section of the device's datasheet. - - -Example: - -This shows the r8a7791 APMU that can control CPU0 and CPU1. - - apmu@e6152000 { - compatible = "renesas,r8a7791-apmu", "renesas,apmu"; - reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0 &cpu1>; - }; diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.yaml b/Documentation/devicetree/bindings/power/renesas,apmu.yaml new file mode 100644 index 000000000000..078b2cb40fe3 --- /dev/null +++ b/Documentation/devicetree/bindings/power/renesas,apmu.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Advanced Power Management Unit + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + - Magnus Damm <magnus.damm@gmail.com> + +description: + Renesas R-Car Gen2 and RZ/G1 SoCs utilize one or more APMU hardware units for + CPU core power domain control including SMP boot and CPU Hotplug. + +properties: + compatible: + items: + - enum: + - renesas,r8a7743-apmu # RZ/G1M + - renesas,r8a7744-apmu # RZ/G1N + - renesas,r8a7745-apmu # RZ/G1E + - renesas,r8a77470-apmu # RZ/G1C + - renesas,r8a7790-apmu # R-Car H2 + - renesas,r8a7791-apmu # R-Car M2-W + - renesas,r8a7792-apmu # R-Car V2H + - renesas,r8a7793-apmu # R-Car M2-N + - renesas,r8a7794-apmu # R-Car E2 + - const: renesas,apmu + + reg: + maxItems: 1 + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + Array of phandles pointing to CPU cores, which should match the order of + CPU cores used by the WUPCR and PSTR registers in the Advanced Power + Management Unit section of the device's datasheet. + +required: + - compatible + - reg + - cpus + +additionalProperties: false + +examples: + - | + apmu@e6152000 { + compatible = "renesas,r8a7791-apmu", "renesas,apmu"; + reg = <0xe6152000 0x188>; + cpus = <&cpu0 &cpu1>; + }; diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt deleted file mode 100644 index acb41fade926..000000000000 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt +++ /dev/null @@ -1,62 +0,0 @@ -DT bindings for the Renesas R-Car (RZ/G) System Controller - -== System Controller Node == - -The R-Car (RZ/G) System Controller provides power management for the CPU cores -and various coprocessors. - -Required properties: - - compatible: Must contain exactly one of the following: - - "renesas,r8a7743-sysc" (RZ/G1M) - - "renesas,r8a7744-sysc" (RZ/G1N) - - "renesas,r8a7745-sysc" (RZ/G1E) - - "renesas,r8a77470-sysc" (RZ/G1C) - - "renesas,r8a774a1-sysc" (RZ/G2M) - - "renesas,r8a774b1-sysc" (RZ/G2N) - - "renesas,r8a774c0-sysc" (RZ/G2E) - - "renesas,r8a7779-sysc" (R-Car H1) - - "renesas,r8a7790-sysc" (R-Car H2) - - "renesas,r8a7791-sysc" (R-Car M2-W) - - "renesas,r8a7792-sysc" (R-Car V2H) - - "renesas,r8a7793-sysc" (R-Car M2-N) - - "renesas,r8a7794-sysc" (R-Car E2) - - "renesas,r8a7795-sysc" (R-Car H3) - - "renesas,r8a7796-sysc" (R-Car M3-W) - - "renesas,r8a77961-sysc" (R-Car M3-W+) - - "renesas,r8a77965-sysc" (R-Car M3-N) - - "renesas,r8a77970-sysc" (R-Car V3M) - - "renesas,r8a77980-sysc" (R-Car V3H) - - "renesas,r8a77990-sysc" (R-Car E3) - - "renesas,r8a77995-sysc" (R-Car D3) - - reg: Address start and address range for the device. - - #power-domain-cells: Must be 1. - - -Example: - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7791-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - -== PM Domain Consumers == - -Devices residing in a power area must refer to that power area, as documented -by the generic PM domain bindings in -Documentation/devicetree/bindings/power/power_domain.txt. - -Required properties: - - power-domains: A phandle and symbolic PM domain specifier, as defined in - <dt-bindings/power/r8a77*-sysc.h>. - - -Example: - - L2_CA15: cache-controller@0 { - compatible = "cache"; - power-domains = <&sysc R8A7791_PD_CA15_SCU>; - cache-unified; - cache-level = <2>; - }; diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml new file mode 100644 index 000000000000..e59331e1d944 --- /dev/null +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas R-Car and RZ/G System Controller + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + - Magnus Damm <magnus.damm@gmail.com> + +description: + The R-Car (RZ/G) System Controller provides power management for the CPU + cores and various coprocessors. + +properties: + compatible: + enum: + - renesas,r8a7743-sysc # RZ/G1M + - renesas,r8a7744-sysc # RZ/G1N + - renesas,r8a7745-sysc # RZ/G1E + - renesas,r8a77470-sysc # RZ/G1C + - renesas,r8a774a1-sysc # RZ/G2M + - renesas,r8a774b1-sysc # RZ/G2N + - renesas,r8a774c0-sysc # RZ/G2E + - renesas,r8a7779-sysc # R-Car H1 + - renesas,r8a7790-sysc # R-Car H2 + - renesas,r8a7791-sysc # R-Car M2-W + - renesas,r8a7792-sysc # R-Car V2H + - renesas,r8a7793-sysc # R-Car M2-N + - renesas,r8a7794-sysc # R-Car E2 + - renesas,r8a7795-sysc # R-Car H3 + - renesas,r8a77961-sysc # R-Car M3-W+ + - renesas,r8a77965-sysc # R-Car M3-N + - renesas,r8a7796-sysc # R-Car M3-W + - renesas,r8a77970-sysc # R-Car V3M + - renesas,r8a77980-sysc # R-Car V3H + - renesas,r8a77990-sysc # R-Car E3 + - renesas,r8a77995-sysc # R-Car D3 + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + +required: + - compatible + - reg + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + // System Controller node + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7791-sysc"; + reg = <0xe6180000 0x0200>; + #power-domain-cells = <1>; + }; + + - | + // Power Domain consumers + #include <dt-bindings/power/r8a7791-sysc.h> + + cache-controller-0 { + compatible = "cache"; + power-domains = <&sysc R8A7791_PD_CA15_SCU>; + cache-unified; + cache-level = <2>; + }; diff --git a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml index 520e07e6f21b..3412fe7e1e80 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml @@ -41,6 +41,8 @@ required: - regmap - offset +additionalProperties: false + allOf: - if: not: diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index d38006b1f1f4..b80772cb9f06 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -41,6 +41,8 @@ required: - regmap - offset +additionalProperties: false + allOf: - if: not: diff --git a/Documentation/devicetree/bindings/power/supply/max77650-charger.yaml b/Documentation/devicetree/bindings/power/supply/max77650-charger.yaml index deef010ec535..62eeddb65aed 100644 --- a/Documentation/devicetree/bindings/power/supply/max77650-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/max77650-charger.yaml @@ -32,3 +32,6 @@ properties: required: - compatible +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml b/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml new file mode 100644 index 000000000000..9bc664f414a1 --- /dev/null +++ b/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ptp/ptp-idt82p33.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IDT 82P33 PTP Clock Device Tree Bindings + +description: | + IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock + +maintainers: + - Min Li <min.li.xe@renesas.com> + +properties: + compatible: + enum: + - idt,82p33810 + - idt,82p33813 + - idt,82p33814 + - idt,82p33831 + - idt,82p33910 + - idt,82p33913 + - idt,82p33914 + - idt,82p33931 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + phc@51 { + compatible = "idt,82p33810"; + reg = <0x51>; + }; + }; diff --git a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml index 9e21b83d717e..239b49fad805 100644 --- a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml +++ b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml @@ -55,6 +55,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c@1 { diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt deleted file mode 100644 index 472bd46ab5a4..000000000000 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt +++ /dev/null @@ -1,23 +0,0 @@ -* PWM controlled by ChromeOS EC - -Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller -(EC) and controlled via a host-command interface. - -An EC PWM node should be only found as a sub-node of the EC node (see -Documentation/devicetree/bindings/mfd/cros-ec.txt). - -Required properties: -- compatible: Must contain "google,cros-ec-pwm" -- #pwm-cells: Should be 1. The cell specifies the PWM index. - -Example: - cros-ec@0 { - compatible = "google,cros-ec-spi"; - - ... - - cros_ec_pwm: ec-pwm { - compatible = "google,cros-ec-pwm"; - #pwm-cells = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml new file mode 100644 index 000000000000..24c217b76580 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/google,cros-ec-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM controlled by ChromeOS EC + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - '"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>' + +description: | + Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller + (EC) and controlled via a host-command interface. + An EC PWM node should be only found as a sub-node of the EC node (see + Documentation/devicetree/bindings/mfd/cros-ec.txt). + +properties: + compatible: + const: google,cros-ec-pwm + "#pwm-cells": + description: The cell specifies the PWM index. + const: 1 + +required: + - compatible + - '#pwm-cells' + +additionalProperties: false + +examples: + - | + cros-ec@0 { + compatible = "google,cros-ec-spi"; + cros_ec_pwm: ec-pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/pwm/iqs620a-pwm.yaml b/Documentation/devicetree/bindings/pwm/iqs620a-pwm.yaml new file mode 100644 index 000000000000..1d7c27be50da --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/iqs620a-pwm.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/iqs620a-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Azoteq IQS620A PWM Generator + +maintainers: + - Jeff LaBundy <jeff@labundy.com> + +description: | + The Azoteq IQS620A multi-function sensor generates a fixed-frequency PWM + output represented by a "pwm" child node from the parent MFD driver. See + Documentation/devicetree/bindings/mfd/iqs62x.yaml for further details as + well as an example. + +properties: + compatible: + enum: + - azoteq,iqs620a-pwm + + "#pwm-cells": + const: 2 + +required: + - compatible + - "#pwm-cells" + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt index 0a69eadf44ce..74c41e34c3b6 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -9,6 +9,7 @@ Required properties: - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 - "nvidia,tegra186-pwm": for Tegra186 + - "nvidia,tegra194-pwm": for Tegra194 - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. See pwm.yaml in this directory for a description of the cells format. diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index 95536d83c5f2..29adff59c479 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -19,10 +19,15 @@ Required properties: - "pwm1-8": the eight per PWM clocks for mt2712 - "pwm1-6": the six per PWM clocks for mt7622 - "pwm1-5": the five per PWM clocks for mt7623 + - "pwm1" : the PWM1 clock for mt7629 - pinctrl-names: Must contain a "default" entry. - pinctrl-0: One property must exist for each entry in pinctrl-names. See pinctrl/pinctrl-bindings.txt for details of the property values. +Optional properties: +- assigned-clocks: Reference to the PWM clock entries. +- assigned-clock-parents: The phandle of the parent clock of PWM clock. + Example: pwm0: pwm@11006000 { compatible = "mediatek,mt7623-pwm"; diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml index 4969a954993c..4bf62a3d5bba 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml @@ -19,6 +19,10 @@ properties: - renesas,tpu-r8a7744 # RZ/G1N - renesas,tpu-r8a7745 # RZ/G1E - renesas,tpu-r8a7790 # R-Car H2 + - renesas,tpu-r8a7791 # R-Car M2-W + - renesas,tpu-r8a7792 # R-Car V2H + - renesas,tpu-r8a7793 # R-Car M2-N + - renesas,tpu-r8a7794 # R-Car E2 - renesas,tpu-r8a7795 # R-Car H3 - renesas,tpu-r8a7796 # R-Car M3-W - renesas,tpu-r8a77965 # R-Car M3-N diff --git a/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml b/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml index 7d724159f890..ce0a4021ae7f 100644 --- a/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml @@ -24,8 +24,11 @@ properties: const: maxim,max77650-regulator patternProperties: - "^regulator@[0-3]$": + "^regulator-(ldo|sbb[0-2])$": $ref: "regulator.yaml#" required: - compatible +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/regulator/mp886x.txt b/Documentation/devicetree/bindings/regulator/mp886x.txt new file mode 100644 index 000000000000..551867829459 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mp886x.txt @@ -0,0 +1,27 @@ +Monolithic Power Systems MP8867/MP8869 voltage regulator + +Required properties: +- compatible: Must be one of the following. + "mps,mp8867" + "mps,mp8869" +- reg: I2C slave address. +- enable-gpios: enable gpios. +- mps,fb-voltage-divider: An array of two integers containing the resistor + values R1 and R2 of the feedback voltage divider in kilo ohms. + +Any property defined as part of the core regulator binding, defined in +./regulator.txt, can also be used. + +Example: + + vcpu: regulator@62 { + compatible = "mps,mp8869"; + regulator-name = "vcpu"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <850000>; + regulator-always-on; + regulator-boot-on; + enable-gpios = <&porta 1 GPIO_ACTIVE_LOW>; + mps,fb-voltage-divider = <80 240>; + reg = <0x62>; + }; diff --git a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml new file mode 100644 index 000000000000..f0acce2029fd --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mps,mp5416.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Monolithic Power System MP5416 PMIC + +maintainers: + - Saravanan Sekar <sravanhome@gmail.com> + +properties: + $nodename: + pattern: "^pmic@[0-9a-f]{1,2}$" + compatible: + enum: + - mps,mp5416 + + reg: + maxItems: 1 + + regulators: + type: object + description: | + list of regulators provided by this controller, must be named + after their hardware counterparts BUCK[1-4] and LDO[1-4] + + patternProperties: + "^buck[1-4]$": + allOf: + - $ref: "regulator.yaml#" + type: object + + "^ldo[1-4]$": + allOf: + - $ref: "regulator.yaml#" + type: object + + additionalProperties: false + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@69 { + compatible = "mps,mp5416"; + reg = <0x69>; + + regulators { + + buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-min-microamp = <3800000>; + regulator-max-microamp = <6800000>; + regulator-boot-on; + }; + + ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3975000>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt index d126df043403..dea4384f4c03 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt @@ -26,6 +26,7 @@ Regulator nodes are identified by their compatible: "qcom,rpm-pm8994-regulators" "qcom,rpm-pm8998-regulators" "qcom,rpm-pma8084-regulators" + "qcom,rpm-pmi8994-regulators" "qcom,rpm-pmi8998-regulators" "qcom,rpm-pms405-regulators" @@ -146,6 +147,15 @@ Regulator nodes are identified by their compatible: - vdd_s1-supply: - vdd_s2-supply: - vdd_s3-supply: +- vdd_bst_byp-supply: + Usage: optional (pmi8994 only) + Value type: <phandle> + Definition: reference to regulator supplying the input pin, as + described in the data sheet + +- vdd_s1-supply: +- vdd_s2-supply: +- vdd_s3-supply: - vdd_s4-supply: - vdd_s5-supply: - vdd_s6-supply: @@ -259,6 +269,9 @@ pma8084: l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1 +pmi8994: + s1, s2, s3, boost-bypass + pmi8998: bob diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.txt b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.txt deleted file mode 100644 index cbce62c22b60..000000000000 --- a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.txt +++ /dev/null @@ -1,162 +0,0 @@ -ROHM BD71837 and BD71847 Power Management Integrated Circuit regulator bindings - -Required properties: - - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ..., "ldo7" for - BD71837. For BD71847 names should be "buck1", ..., "buck6" - and "ldo1", ..., "ldo6" - -List of regulators provided by this controller. BD71837 regulators node -should be sub node of the BD71837 MFD node. See BD71837 MFD bindings at -Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt -Regulator nodes should be named to BUCK_<number> and LDO_<number>. The -definition for each of these nodes is defined using the standard -binding for regulators at -Documentation/devicetree/bindings/regulator/regulator.txt. -Note that if BD71837 starts at RUN state you probably want to use -regulator-boot-on at least for BUCK6 and BUCK7 so that those are not -disabled by driver at startup. LDO5 and LDO6 are supplied by those and -if they are disabled at startup the voltage monitoring for LDO5/LDO6 will -cause PMIC to reset. - -The valid names for BD71837 regulator nodes are: -BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8 -LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7 - -The valid names for BD71847 regulator nodes are: -BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6 -LDO1, LDO2, LDO3, LDO4, LDO5, LDO6 - -Optional properties: -- rohm,dvs-run-voltage : PMIC default "RUN" state voltage in uV. - See below table for bucks which support this. -- rohm,dvs-idle-voltage : PMIC default "IDLE" state voltage in uV. - See below table for bucks which support this. -- rohm,dvs-suspend-voltage : PMIC default "SUSPEND" state voltage in uV. - See below table for bucks which support this. -- Any optional property defined in bindings/regulator/regulator.txt - -Supported default DVS states: - -BD71837: -buck | dvs-run-voltage | dvs-idle-voltage | dvs-suspend-voltage ------------------------------------------------------------------------------ -1 | supported | supported | supported ----------------------------------------------------------------------------- -2 | supported | supported | not supported ----------------------------------------------------------------------------- -3 | supported | not supported | not supported ----------------------------------------------------------------------------- -4 | supported | not supported | not supported ----------------------------------------------------------------------------- -rest | not supported | not supported | not supported - -BD71847: -buck | dvs-run-voltage | dvs-idle-voltage | dvs-suspend-voltage ------------------------------------------------------------------------------ -1 | supported | supported | supported ----------------------------------------------------------------------------- -2 | supported | supported | not supported ----------------------------------------------------------------------------- -rest | not supported | not supported | not supported - -Example: -regulators { - buck1: BUCK1 { - regulator-name = "buck1"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <1250>; - rohm,dvs-run-voltage = <900000>; - rohm,dvs-idle-voltage = <850000>; - rohm,dvs-suspend-voltage = <800000>; - }; - buck2: BUCK2 { - regulator-name = "buck2"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <1250>; - rohm,dvs-run-voltage = <1000000>; - rohm,dvs-idle-voltage = <900000>; - }; - buck3: BUCK3 { - regulator-name = "buck3"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - rohm,dvs-run-voltage = <1000000>; - }; - buck4: BUCK4 { - regulator-name = "buck4"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - rohm,dvs-run-voltage = <1000000>; - }; - buck5: BUCK5 { - regulator-name = "buck5"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1350000>; - regulator-boot-on; - }; - buck6: BUCK6 { - regulator-name = "buck6"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - }; - buck7: BUCK7 { - regulator-name = "buck7"; - regulator-min-microvolt = <1605000>; - regulator-max-microvolt = <1995000>; - regulator-boot-on; - }; - buck8: BUCK8 { - regulator-name = "buck8"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - }; - - ldo1: LDO1 { - regulator-name = "ldo1"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - }; - ldo2: LDO2 { - regulator-name = "ldo2"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - }; - ldo3: LDO3 { - regulator-name = "ldo3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - ldo4: LDO4 { - regulator-name = "ldo4"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; - }; - ldo5: LDO5 { - regulator-name = "ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - ldo6: LDO6 { - regulator-name = "ldo6"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; - }; - ldo7_reg: LDO7 { - regulator-name = "ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; -}; - - diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml new file mode 100644 index 000000000000..a323b1696eee --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD71837 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> + +description: | + List of regulators provided by this controller. BD71837 regulators node + should be sub node of the BD71837 MFD node. See BD71837 MFD bindings at + Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml + Regulator nodes should be named to BUCK_<number> and LDO_<number>. The + definition for each of these nodes is defined using the standard + binding for regulators at + Documentation/devicetree/bindings/regulator/regulator.txt. + Note that if BD71837 starts at RUN state you probably want to use + regulator-boot-on at least for BUCK6 and BUCK7 so that those are not + disabled by driver at startup. LDO5 and LDO6 are supplied by those and + if they are disabled at startup the voltage monitoring for LDO5/LDO6 will + cause PMIC to reset. + +#The valid names for BD71837 regulator nodes are: +#BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8 +#LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7 + +patternProperties: + "^LDO[1-7]$": + type: object + allOf: + - $ref: regulator.yaml# + description: + Properties for single LDO regulator. + + properties: + regulator-name: + pattern: "^ldo[1-7]$" + description: + should be "ldo1", ..., "ldo7" + + "^BUCK[1-8]$": + type: object + allOf: + - $ref: regulator.yaml# + description: + Properties for single BUCK regulator. + + properties: + regulator-name: + pattern: "^buck[1-8]$" + description: + should be "buck1", ..., "buck8" + + rohm,dvs-run-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "RUN" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + rohm,dvs-idle-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "IDLE" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + rohm,dvs-suspend-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "SUSPEND" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + # Supported default DVS states: + # + # BD71837: + # buck | dvs-run-voltage | dvs-idle-voltage | dvs-suspend-voltage + # ---------------------------------------------------------------- + # 1 | supported | supported | supported + # ---------------------------------------------------------------- + # 2 | supported | supported | not supported + # ---------------------------------------------------------------- + # 3 | supported | not supported | not supported + # ---------------------------------------------------------------- + # 4 | supported | not supported | not supported + # ---------------------------------------------------------------- + # rest | not supported | not supported | not supported + + + required: + - regulator-name + additionalProperties: false +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml new file mode 100644 index 000000000000..526fd00bcb16 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD71847 and BD71850 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> + +description: | + List of regulators provided by this controller. BD71847 regulators node + should be sub node of the BD71847 MFD node. See BD71847 MFD bindings at + Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml + Regulator nodes should be named to BUCK_<number> and LDO_<number>. The + definition for each of these nodes is defined using the standard + binding for regulators at + Documentation/devicetree/bindings/regulator/regulator.txt. + Note that if BD71847 starts at RUN state you probably want to use + regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must + not be disabled by driver at startup. If BUCK5 is disabled at startup the + voltage monitoring for LDO5/LDO6 can cause PMIC to reset. + +#The valid names for BD71847 regulator nodes are: +#BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6 +#LDO1, LDO2, LDO3, LDO4, LDO5, LDO6 + +patternProperties: + "^LDO[1-6]$": + type: object + allOf: + - $ref: regulator.yaml# + description: + Properties for single LDO regulator. + + properties: + regulator-name: + pattern: "^ldo[1-6]$" + description: + should be "ldo1", ..., "ldo6" + + "^BUCK[1-6]$": + type: object + allOf: + - $ref: regulator.yaml# + description: + Properties for single BUCK regulator. + + properties: + regulator-name: + pattern: "^buck[1-6]$" + description: + should be "buck1", ..., "buck6" + + rohm,dvs-run-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "RUN" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + rohm,dvs-idle-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "IDLE" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + rohm,dvs-suspend-voltage: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 1300000 + description: + PMIC default "SUSPEND" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + + # Supported default DVS states: + # + # BD71847: + # buck | dvs-run-voltage | dvs-idle-voltage | dvs-suspend-voltage + # ---------------------------------------------------------------- + # 1 | supported | supported | supported + # ---------------------------------------------------------------- + # 2 | supported | supported | not supported + # ---------------------------------------------------------------- + # rest | not supported | not supported | not supported + + required: + - regulator-name + additionalProperties: false +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/st,stpmic1-regulator.txt b/Documentation/devicetree/bindings/regulator/st,stpmic1-regulator.txt deleted file mode 100644 index 6189df71ea98..000000000000 --- a/Documentation/devicetree/bindings/regulator/st,stpmic1-regulator.txt +++ /dev/null @@ -1,64 +0,0 @@ -STMicroelectronics STPMIC1 Voltage regulators - -Regulator Nodes are optional depending on needs. - -Available Regulators in STPMIC1 device are: - - buck1 for Buck BUCK1 - - buck2 for Buck BUCK2 - - buck3 for Buck BUCK3 - - buck4 for Buck BUCK4 - - ldo1 for LDO LDO1 - - ldo2 for LDO LDO2 - - ldo3 for LDO LDO3 - - ldo4 for LDO LDO4 - - ldo5 for LDO LDO5 - - ldo6 for LDO LDO6 - - vref_ddr for LDO Vref DDR - - boost for Buck BOOST - - pwr_sw1 for VBUS_OTG switch - - pwr_sw2 for SW_OUT switch - -Switches are fixed voltage regulators with only enable/disable capability. - -Optional properties: -- st,mask-reset: mask reset for this regulator: the regulator configuration - is maintained during pmic reset. -- regulator-over-current-protection: - if set, all regulators are switched off in case of over-current detection - on this regulator, - if not set, the driver only sends an over-current event. -- interrupts: index of current limit detection interrupt -- <regulator>-supply: phandle to the parent supply/regulator node - each regulator supply can be described except vref_ddr. -- regulator-active-discharge: can be used on pwr_sw1 and pwr_sw2. - -Example: -regulators { - compatible = "st,stpmic1-regulators"; - - ldo6-supply = <&v3v3>; - - vdd_core: buck1 { - regulator-name = "vdd_core"; - interrupts = <IT_CURLIM_BUCK1 0>; - st,mask-reset; - regulator-pull-down; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - }; - - v3v3: buck4 { - regulator-name = "v3v3"; - interrupts = <IT_CURLIM_BUCK4 0>; - - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - v1v8: ldo6 { - regulator-name = "v1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-over-current-protection; - }; -}; diff --git a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml new file mode 100644 index 000000000000..d1a79d2ffa1e --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/vqmmc-ipq4019-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ4019 VQMMC SD LDO regulator + +maintainers: + - Robert Marko <robert.marko@sartura.hr> + +description: | + Qualcomm IPQ4019 SoC-s feature a built a build SD/EMMC controller, + in order to support both 1.8 and 3V I/O voltage levels an LDO + controller is also embedded. + +allOf: + - $ref: "regulator.yaml#" + +properties: + compatible: + const: qcom,vqmmc-ipq4019-regulator + + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + regulator@1948000 { + compatible = "qcom,vqmmc-ipq4019-regulator"; + reg = <0x01948000 0x4>; + regulator-name = "vqmmc"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + status = "disabled"; + }; +... diff --git a/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml new file mode 100644 index 000000000000..084960a8f17a --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml @@ -0,0 +1,324 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP4+ Remoteproc Devices + +maintainers: + - Suman Anna <s-anna@ti.com> + +description: + The OMAP family of SoCs usually have one or more slave processor sub-systems + that are used to offload some of the processor-intensive tasks, or to manage + other hardware accelerators, for achieving various system level goals. + + The processor cores in the sub-system are usually behind an IOMMU, and may + contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 + caches, an Interrupt Controller, a Cache Controller etc. + + The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor + sub-system. The DSP processor sub-system can contain any of the TI's C64x, + C66x or C67x family of DSP cores as the main execution unit. The IPU processor + sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core + Cortex-M4 processors. + + Each remote processor sub-system is represented as a single DT node. Each node + has a number of required or optional properties that enable the OS running on + the host processor (MPU) to perform the device management of the remote + processor and to communicate with the remote processor. The various properties + can be classified as constant or variable. The constant properties are + dictated by the SoC and does not change from one board to another having the + same SoC. Examples of constant properties include 'iommus', 'reg'. The + variable properties are dictated by the system integration aspects such as + memory on the board, or configuration used within the corresponding firmware + image. Examples of variable properties include 'mboxes', 'memory-region', + 'timers', 'watchdog-timers' etc. + +properties: + compatible: + enum: + - ti,omap4-dsp + - ti,omap5-dsp + - ti,dra7-dsp + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + + iommus: + minItems: 1 + maxItems: 2 + description: | + phandles to OMAP IOMMU nodes, that need to be programmed + for this remote processor to access any external RAM memory or + other peripheral device address spaces. This property usually + has only a single phandle. Multiple phandles are used only in + cases where the sub-system has different ports for different + sub-modules within the processor sub-system (eg: DRA7 DSPs), + and need the same programming in both the MMUs. + + mboxes: + minItems: 1 + maxItems: 2 + description: | + OMAP Mailbox specifier denoting the sub-mailbox, to be used for + communication with the remote processor. The specifier format is + as per the bindings, + Documentation/devicetree/bindings/mailbox/omap-mailbox.txt + This property should match with the sub-mailbox node used in + the firmware image. + + clocks: + description: | + Main functional clock for the remote processor + + resets: + description: | + Reset handles for the remote processor + + firmware-name: + description: | + Default name of the firmware to load to the remote processor. + +# Optional properties: +# -------------------- +# Some of these properties are mandatory on some SoCs, and some are optional +# depending on the configuration of the firmware image to be executed on the +# remote processor. The conditions are mentioned for each property. +# +# The following are the optional properties: + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + phandle to the reserved memory node to be associated + with the remoteproc device. The reserved memory node + can be a CMA memory node, and should be defined as + per the bindings, + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + + reg: + description: | + Address space for any remoteproc memories present on + the SoC. Should contain an entry for each value in + 'reg-names'. These are mandatory for all DSP and IPU + processors that have them (OMAP4/OMAP5 DSPs do not have + any RAMs) + + reg-names: + description: | + Required names for each of the address spaces defined in + the 'reg' property. Expects the names from the following + list, in the specified order, each representing the corresponding + internal RAM memory region. + minItems: 1 + maxItems: 3 + items: + - const: l2ram + - const: l1pram + - const: l1dram + + ti,bootreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + Should be a triple of the phandle to the System Control + Configuration region that contains the boot address + register, the register offset of the boot address + register within the System Control module, and the bit + shift within the register. This property is required for + all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs. + + ti,autosuspend-delay-ms: + description: | + Custom autosuspend delay for the remoteproc in milliseconds. + Recommended values is preferable to be in the order of couple + of seconds. A negative value can also be used to disable the + autosuspend behavior. + + ti,timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, that serve + as System/Tick timers for the OS running on the remote + processors. This will usually be a single timer if the + processor sub-system is running in SMP mode, or one per + core in the processor sub-system. This can also be used + to reserve specific timers to be dedicated to the + remote processors. + + This property is mandatory on remote processors requiring + external tick wakeup, and to support Power Management + features. The timers to be used should match with the + timers used in the firmware image. + + ti,watchdog-timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, used to + serve as Watchdog timers for the processor cores. This + will usually be one per executing processor core, even + if the processor sub-system is running a SMP OS. + + The timers to be used should match with the watchdog + timers used in the firmware image. + +if: + properties: + compatible: + enum: + - ti,dra7-dsp +then: + properties: + reg: + minItems: 3 + maxItems: 3 + required: + - reg + - reg-names + - ti,bootreg + +else: + if: + properties: + compatible: + enum: + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + then: + properties: + reg: + minItems: 1 + maxItems: 1 + ti,bootreg: false + required: + - reg + - reg-names + + else: + properties: + reg: false + required: + - ti,bootreg + +required: + - compatible + - iommus + - mboxes + - clocks + - resets + - firmware-name + +additionalProperties: false + +examples: + - | + + //Example 1: OMAP4 DSP + + /* DSP Reserved Memory node */ + #include <dt-bindings/clock/omap4.h> + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + dsp_memory_region: dsp-memory@98000000 { + compatible = "shared-dma-pool"; + reg = <0x98000000 0x800000>; + reusable; + }; + }; + + /* DSP node */ + ocp { + dsp: dsp { + compatible = "ti,omap4-dsp"; + ti,bootreg = <&scm_conf 0x304 0>; + iommus = <&mmu_dsp>; + mboxes = <&mailbox &mbox_dsp>; + memory-region = <&dsp_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer6>; + clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; + resets = <&prm_tesla 0>, <&prm_tesla 1>; + firmware-name = "omap4-dsp-fw.xe64T"; + }; + }; + + - |+ + + //Example 2: OMAP5 IPU + + /* IPU Reserved Memory node */ + #include <dt-bindings/clock/omap5.h> + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + ipu_memory_region: ipu-memory@95800000 { + compatible = "shared-dma-pool"; + reg = <0 0x95800000 0 0x3800000>; + reusable; + }; + }; + + /* IPU node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + ipu: ipu@55020000 { + compatible = "ti,omap5-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + mboxes = <&mailbox &mbox_ipu>; + memory-region = <&ipu_memory_region>; + ti,timers = <&timer3>, <&timer4>; + ti,watchdog-timers = <&timer9>, <&timer11>; + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; + resets = <&prm_core 2>; + firmware-name = "omap5-ipu-fw.xem4"; + }; + }; + + - |+ + + //Example 3: DRA7xx/AM57xx DSP + + /* DSP1 Reserved Memory node */ + #include <dt-bindings/clock/dra7.h> + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + dsp1_memory_region: dsp1-memory@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + }; + }; + + /* DSP1 node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + dsp1: dsp@40800000 { + compatible = "ti,dra7-dsp"; + reg = <0x40800000 0x48000>, + <0x40e00000 0x8000>, + <0x40f00000 0x8000>; + reg-names = "l2ram", "l1pram", "l1dram"; + ti,bootreg = <&scm_conf 0x55c 0>; + iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; + mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; + memory-region = <&dsp1_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer10>; + resets = <&prm_dsp1 0>; + clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>; + firmware-name = "dra7-dsp1-fw.xe66"; + }; + }; diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index b3f57d81f007..92922d3afd14 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -29,6 +29,8 @@ required: - reg - "#reset-cells" +additionalProperties: false + examples: - | reset-controller@c884404 { diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml index 411bd76f1b64..512a33bdb208 100644 --- a/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml +++ b/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml @@ -28,6 +28,8 @@ required: - reg - "#reset-cells" +additionalProperties: false + examples: - | reset-controller@8b2c800 { diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt deleted file mode 100644 index de7f06ccd003..000000000000 --- a/Documentation/devicetree/bindings/reset/renesas,rst.txt +++ /dev/null @@ -1,48 +0,0 @@ -DT bindings for the Renesas R-Car and RZ/G Reset Controllers - -The R-Car and RZ/G Reset Controllers provide reset control, and implement the -following functions: - - Latching of the levels on mode pins when PRESET# is negated, - - Mode monitoring register, - - Reset control of peripheral devices (on R-Car Gen1), - - Watchdog timer (on R-Car Gen1), - - Register-based reset control and boot address registers for the various CPU - cores (on R-Car Gen2 and Gen3, and on RZ/G). - - -Required properties: - - compatible: Should be - - "renesas,<soctype>-reset-wdt" for R-Car Gen1, - - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G - Examples with soctypes are: - - "renesas,r8a7743-rst" (RZ/G1M) - - "renesas,r8a7744-rst" (RZ/G1N) - - "renesas,r8a7745-rst" (RZ/G1E) - - "renesas,r8a77470-rst" (RZ/G1C) - - "renesas,r8a774a1-rst" (RZ/G2M) - - "renesas,r8a774b1-rst" (RZ/G2N) - - "renesas,r8a774c0-rst" (RZ/G2E) - - "renesas,r8a7778-reset-wdt" (R-Car M1A) - - "renesas,r8a7779-reset-wdt" (R-Car H1) - - "renesas,r8a7790-rst" (R-Car H2) - - "renesas,r8a7791-rst" (R-Car M2-W) - - "renesas,r8a7792-rst" (R-Car V2H - - "renesas,r8a7793-rst" (R-Car M2-N) - - "renesas,r8a7794-rst" (R-Car E2) - - "renesas,r8a7795-rst" (R-Car H3) - - "renesas,r8a7796-rst" (R-Car M3-W) - - "renesas,r8a77961-rst" (R-Car M3-W+) - - "renesas,r8a77965-rst" (R-Car M3-N) - - "renesas,r8a77970-rst" (R-Car V3M) - - "renesas,r8a77980-rst" (R-Car V3H) - - "renesas,r8a77990-rst" (R-Car E3) - - "renesas,r8a77995-rst" (R-Car D3) - - reg: Address start and address range for the device. - - -Example: - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7795-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.yaml b/Documentation/devicetree/bindings/reset/renesas,rst.yaml new file mode 100644 index 000000000000..b5de1d196a13 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/renesas,rst.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas R-Car and RZ/G Reset Controller + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + - Magnus Damm <magnus.damm@gmail.com> + +description: | + The R-Car and RZ/G Reset Controllers provide reset control, and implement the + following functions: + - Latching of the levels on mode pins when PRESET# is negated, + - Mode monitoring register, + - Reset control of peripheral devices (on R-Car Gen1), + - Watchdog timer (on R-Car Gen1), + - Register-based reset control and boot address registers for the various + CPU cores (on R-Car Gen2 and Gen3, and on RZ/G). + +properties: + compatible: + enum: + - renesas,r8a7743-rst # RZ/G1M + - renesas,r8a7744-rst # RZ/G1N + - renesas,r8a7745-rst # RZ/G1E + - renesas,r8a77470-rst # RZ/G1C + - renesas,r8a774a1-rst # RZ/G2M + - renesas,r8a774b1-rst # RZ/G2N + - renesas,r8a774c0-rst # RZ/G2E + - renesas,r8a7778-reset-wdt # R-Car M1A + - renesas,r8a7779-reset-wdt # R-Car H1 + - renesas,r8a7790-rst # R-Car H2 + - renesas,r8a7791-rst # R-Car M2-W + - renesas,r8a7792-rst # R-Car V2H + - renesas,r8a7793-rst # R-Car M2-N + - renesas,r8a7794-rst # R-Car E2 + - renesas,r8a7795-rst # R-Car H3 + - renesas,r8a7796-rst # R-Car M3-W + - renesas,r8a77961-rst # R-Car M3-W+ + - renesas,r8a77965-rst # R-Car M3-N + - renesas,r8a77970-rst # R-Car V3M + - renesas,r8a77980-rst # R-Car V3H + - renesas,r8a77990-rst # R-Car E3 + - renesas,r8a77995-rst # R-Car D3 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7795-rst"; + reg = <0xe6160000 0x0200>; + }; diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml index a9ff3cb35c5e..444be32a8a29 100644 --- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml +++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml @@ -29,6 +29,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | rng@c8834000 { diff --git a/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt b/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt deleted file mode 100644 index aaac7975f61c..000000000000 --- a/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt +++ /dev/null @@ -1,40 +0,0 @@ -BCM2835/6368 Random number generator - -Required properties: - -- compatible : should be one of - "brcm,bcm2835-rng" - "brcm,bcm-nsp-rng" - "brcm,bcm5301x-rng" or - "brcm,bcm6368-rng" -- reg : Specifies base physical address and size of the registers. - -Optional properties: - -- clocks : phandle to clock-controller plus clock-specifier pair -- clock-names : "ipsec" as a clock name - -Optional properties: - -- interrupts: specify the interrupt for the RNG block - -Example: - -rng { - compatible = "brcm,bcm2835-rng"; - reg = <0x7e104000 0x10>; - interrupts = <2 29>; -}; - -rng@18033000 { - compatible = "brcm,bcm-nsp-rng"; - reg = <0x18033000 0x14>; -}; - -random: rng@10004180 { - compatible = "brcm,bcm6368-rng"; - reg = <0x10004180 0x14>; - - clocks = <&periph_clk 18>; - clock-names = "ipsec"; -}; diff --git a/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml new file mode 100644 index 000000000000..89ab67f20a7f --- /dev/null +++ b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/brcm,bcm2835.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BCM2835/6368 Random number generator + +maintainers: + - Stefan Wahren <stefan.wahren@i2se.com> + - Florian Fainelli <f.fainelli@gmail.com> + - Herbert Xu <herbert@gondor.apana.org.au> + +properties: + compatible: + enum: + - brcm,bcm2835-rng + - brcm,bcm-nsp-rng + - brcm,bcm5301x-rng + - brcm,bcm6368-rng + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: ipsec + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rng { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; + interrupts = <2 29>; + }; + + - | + rng@18033000 { + compatible = "brcm,bcm-nsp-rng"; + reg = <0x18033000 0x14>; + }; + + - | + rng@10004180 { + compatible = "brcm,bcm6368-rng"; + reg = <0x10004180 0x14>; + + clocks = <&periph_clk 18>; + clock-names = "ipsec"; + }; diff --git a/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt deleted file mode 100644 index 41c7ae18fd7b..000000000000 --- a/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt +++ /dev/null @@ -1,37 +0,0 @@ -JZ4740 and similar SoCs real-time clock driver - -Required properties: - -- compatible: One of: - - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC - - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC -- reg: Address range of rtc register set -- interrupts: IRQ number for the alarm interrupt -- clocks: phandle to the "rtc" clock -- clock-names: must be "rtc" - -Optional properties: -- system-power-controller: To use this component as the - system power controller -- reset-pin-assert-time-ms: Reset pin low-level assertion - time after wakeup (default 60ms; range 0-125ms if RTC clock - at 32 kHz) -- min-wakeup-pin-assert-time-ms: Minimum wakeup pin assertion - time (default 100ms; range 0-2s if RTC clock at 32 kHz) - -Example: - -rtc@10003000 { - compatible = "ingenic,jz4740-rtc"; - reg = <0x10003000 0x40>; - - interrupt-parent = <&intc>; - interrupts = <32>; - - clocks = <&rtc_clock>; - clock-names = "rtc"; - - system-power-controller; - reset-pin-assert-time-ms = <60>; - min-wakeup-pin-assert-time-ms = <100>; -}; diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml new file mode 100644 index 000000000000..4206bf8a2469 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs Real-Time Clock DT bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + oneOf: + - enum: + - ingenic,jz4740-rtc + - ingenic,jz4760-rtc + - items: + - const: ingenic,jz4725b-rtc + - const: ingenic,jz4740-rtc + - items: + - enum: + - ingenic,jz4770-rtc + - ingenic,jz4780-rtc + - const: ingenic,jz4760-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: rtc + + system-power-controller: + description: | + Indicates that the RTC is responsible for powering OFF + the system. + type: boolean + + ingenic,reset-pin-assert-time-ms: + minimum: 0 + maximum: 125 + default: 60 + description: | + Reset pin low-level assertion time after wakeup + (assuming RTC clock at 32 kHz) + + ingenic,min-wakeup-pin-assert-time-ms: + minimum: 0 + maximum: 2000 + default: 100 + description: | + Minimum wakeup pin assertion time + (assuming RTC clock at 32 kHz) + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/jz4740-cgu.h> + rtc_dev: rtc@10003000 { + compatible = "ingenic,jz4740-rtc"; + reg = <0x10003000 0x40>; + + interrupt-parent = <&intc>; + interrupts = <15>; + + clocks = <&cgu JZ4740_CLK_RTC>; + clock-names = "rtc"; + }; diff --git a/Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml index dcff573cbdb1..b95cb017f469 100644 --- a/Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml @@ -51,6 +51,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include <dt-bindings/clock/r7s72100-clock.h> diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt new file mode 100644 index 000000000000..c33d87e5e753 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt @@ -0,0 +1,14 @@ +Device-Tree bindings for MediaTek SoC based RTC + +Required properties: +- compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC +- reg : Specifies base physical address and size of the registers; +- interrupts : Should contain the interrupt for RTC alarm; + +Example: + +rtc: rtc@10011000 { + compatible = "mediatek,mt2712-rtc"; + reg = <0 0x10011000 0 0x1000>; + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_LOW>; +}; diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml index 0a54296d7218..48c6cafca90c 100644 --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml @@ -111,6 +111,8 @@ required: - clocks - interrupts +additionalProperties: false + examples: - | #include <dt-bindings/mfd/stm32f4-rcc.h> diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index 214fe8beddc3..d4178ab0d675 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -62,6 +62,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | serial@84c0 { diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt index 35957cbf1571..9582fc2279ed 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt @@ -8,6 +8,10 @@ Required properties: Optional properties: - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works in DCE mode by default. +- fsl,inverted-tx , fsl,inverted-rx : Indicate that the hardware attached + to the peripheral inverts the signal transmitted or received, + respectively, and that the peripheral should invert its output/input + using the INVT/INVR registers. - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt. Note that for RS485 you must enable either the "uart-has-rtscts" or the "rts-gpios" @@ -15,7 +19,7 @@ Optional properties: the transceiver is actually CTS_B, not RTS_B. CTS_B is always output, and RTS_B is input, regardless of dte-mode. -Please check Documentation/devicetree/bindings/serial/serial.txt +Please check Documentation/devicetree/bindings/serial/serial.yaml for the complete list of generic properties. Note: Each uart controller should have an alias correctly numbered diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt index c904e2e68332..e7448b92dd9d 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt @@ -6,6 +6,8 @@ Required properties: on Vybrid vf610 SoC with 8-bit register organization - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated on LS1021A SoC with 32-bit big-endian register organization + - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated + on LS1028A SoC with 32-bit little-endian register organization - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated on i.MX7ULP SoC with 32-bit little-endian register organization - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated @@ -15,10 +17,10 @@ Required properties: - reg : Address and length of the register set for the device - interrupts : Should contain uart interrupt - clocks : phandle + clock specifier pairs, one for each entry in clock-names -- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud - clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access - lpuart controller registers, it also requires "baud" clock for module to - receive/transmit data. +- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart + bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used + to access lpuart controller registers, it also requires "baud" clock for + module to receive/transmit data. Optional properties: - dmas: A list of two dma specifiers, one for each entry in dma-names. diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml new file mode 100644 index 000000000000..91101521ef07 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF) + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,hscif-r8a7778 # R-Car M1 + - renesas,hscif-r8a7779 # R-Car H1 + - const: renesas,rcar-gen1-hscif # R-Car Gen1 + - const: renesas,hscif # generic HSCIF compatible UART + + - items: + - enum: + - renesas,hscif-r8a7743 # RZ/G1M + - renesas,hscif-r8a7744 # RZ/G1N + - renesas,hscif-r8a7745 # RZ/G1E + - renesas,hscif-r8a77470 # RZ/G1C + - renesas,hscif-r8a7790 # R-Car H2 + - renesas,hscif-r8a7791 # R-Car M2-W + - renesas,hscif-r8a7792 # R-Car V2H + - renesas,hscif-r8a7793 # R-Car M2-N + - renesas,hscif-r8a7794 # R-Car E2 + - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1 + - const: renesas,hscif # generic HSCIF compatible UART + + - items: + - enum: + - renesas,hscif-r8a774a1 # RZ/G2M + - renesas,hscif-r8a774b1 # RZ/G2N + - renesas,hscif-r8a774c0 # RZ/G2E + - renesas,hscif-r8a7795 # R-Car H3 + - renesas,hscif-r8a7796 # R-Car M3-W + - renesas,hscif-r8a77961 # R-Car M3-W+ + - renesas,hscif-r8a77965 # R-Car M3-N + - renesas,hscif-r8a77970 # R-Car V3M + - renesas,hscif-r8a77980 # R-Car V3H + - renesas,hscif-r8a77990 # R-Car E3 + - renesas,hscif-r8a77995 # R-Car D3 + - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2 + - const: renesas,hscif # generic HSCIF compatible UART + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + items: + enum: + - fck # UART functional clock + - hsck # optional external clock input + - brg_int # optional internal clock source for BRG frequency divider + - scif_clk # optional external clock source for BRG frequency divider + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + description: + Must contain a list of pairs of references to DMA specifiers, one for + transmission, and one for reception. + + dma-names: + minItems: 2 + maxItems: 4 + items: + enum: + - tx + - rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-hscif + - renesas,rcar-gen3-hscif +then: + required: + - resets + +examples: + - | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7795-sysc.h> + aliases { + serial1 = &hscif1; + }; + + hscif1: serial@e6550000 { + compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0xe6550000 96>; + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 519>; + uart-has-rtscts; + }; diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt deleted file mode 100644 index a5edf4b70c7a..000000000000 --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +++ /dev/null @@ -1,150 +0,0 @@ -* Renesas SH-Mobile Serial Communication Interface - -Required properties: - - - compatible: Must contain one or more of the following: - - - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART. - - "renesas,scif-r7s9210" for R7S9210 (RZ/A2) SCIF compatible UART. - - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. - - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. - - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. - - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART. - - "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART. - - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART. - - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART. - - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART. - - "renesas,scif-r8a7744" for R8A7744 (RZ/G1N) SCIF compatible UART. - - "renesas,scifa-r8a7744" for R8A7744 (RZ/G1N) SCIFA compatible UART. - - "renesas,scifb-r8a7744" for R8A7744 (RZ/G1N) SCIFB compatible UART. - - "renesas,hscif-r8a7744" for R8A7744 (RZ/G1N) HSCIF compatible UART. - - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART. - - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART. - - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART. - - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART. - - "renesas,scif-r8a77470" for R8A77470 (RZ/G1C) SCIF compatible UART. - - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. - - "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART. - - "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART. - - "renesas,scif-r8a774b1" for R8A774B1 (RZ/G2N) SCIF compatible UART. - - "renesas,hscif-r8a774b1" for R8A774B1 (RZ/G2N) HSCIF compatible UART. - - "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART. - - "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART. - - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. - - "renesas,hscif-r8a7778" for R8A7778 (R-Car M1) HSCIF compatible UART. - - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. - - "renesas,hscif-r8a7779" for R8A7779 (R-Car H1) HSCIF compatible UART. - - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. - - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART. - - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART. - - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART. - - "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART. - - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART. - - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART. - - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART. - - "renesas,scif-r8a7792" for R8A7792 (R-Car V2H) SCIF compatible UART. - - "renesas,hscif-r8a7792" for R8A7792 (R-Car V2H) HSCIF compatible UART. - - "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART. - - "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART. - - "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART. - - "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART. - - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART. - - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. - - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. - - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. - - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. - - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. - - "renesas,scif-r8a7796" for R8A77960 (R-Car M3-W) SCIF compatible UART. - - "renesas,hscif-r8a7796" for R8A77960 (R-Car M3-W) HSCIF compatible UART. - - "renesas,scif-r8a77961" for R8A77961 (R-Car M3-W+) SCIF compatible UART. - - "renesas,hscif-r8a77961" for R8A77961 (R-Car M3-W+) HSCIF compatible UART. - - "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART. - - "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART. - - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART. - - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART. - - "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART. - - "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART. - - "renesas,scif-r8a77990" for R8A77990 (R-Car E3) SCIF compatible UART. - - "renesas,hscif-r8a77990" for R8A77990 (R-Car E3) HSCIF compatible UART. - - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART. - - "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART. - - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. - - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. - - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART, - - "renesas,rcar-gen2-scif" for R-Car Gen2 and RZ/G1 SCIF compatible UART, - - "renesas,rcar-gen3-scif" for R-Car Gen3 and RZ/G2 SCIF compatible UART, - - "renesas,rcar-gen2-scifa" for R-Car Gen2 and RZ/G1 SCIFA compatible UART, - - "renesas,rcar-gen2-scifb" for R-Car Gen2 and RZ/G1 SCIFB compatible UART, - - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART, - - "renesas,rcar-gen2-hscif" for R-Car Gen2 and RZ/G1 HSCIF compatible UART, - - "renesas,rcar-gen3-hscif" for R-Car Gen3 and RZ/G2 HSCIF compatible UART, - - "renesas,scif" for generic SCIF compatible UART. - - "renesas,scifa" for generic SCIFA compatible UART. - - "renesas,scifb" for generic SCIFB compatible UART. - - "renesas,hscif" for generic HSCIF compatible UART. - - "renesas,sci" for generic SCI compatible UART. - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first, followed by the - family-specific and/or generic versions. - - - reg: Base address and length of the I/O registers used by the UART. - - interrupts: Must contain one or more interrupt-specifiers for the SCIx. - If a single interrupt is expressed, then all events are - multiplexed into this single interrupt. - - If multiple interrupts are provided by the hardware, the order - in which the interrupts are listed must match order below. Note - that some HW interrupt events may be muxed together resulting - in duplicate entries. - The interrupt order is as follows: - 1. Error (ERI) - 2. Receive buffer full (RXI) - 3. Transmit buffer empty (TXI) - 4. Break (BRI) - 5. Data Ready (DRI) - 6. Transmit End (TEI) - - - clocks: Must contain a phandle and clock-specifier pair for each entry - in clock-names. - - clock-names: Must contain "fck" for the SCIx UART functional clock. - Apart from the divided functional clock, there may be other possible - sources for the sampling clock, depending on SCIx variant. - On (H)SCI(F) and some SCIFA, an additional clock may be specified: - - "hsck" for the optional external clock input (on HSCIF), - - "sck" for the optional external clock input (on other variants). - On UARTs equipped with a Baud Rate Generator for External Clock (BRG) - (some SCIF and HSCIF), additional clocks may be specified: - - "brg_int" for the optional internal clock source for the frequency - divider (typically the (AXI or SHwy) bus clock), - - "scif_clk" for the optional external clock source for the frequency - divider (SCIF_CLK). - -Note: Each enabled SCIx UART may have an optional "serialN" alias in the -"aliases" node. - -Optional properties: - - dmas: Must contain a list of two references to DMA specifiers, one for - transmission, and one for reception. - - dma-names: Must contain a list of two DMA names, "tx" and "rx". - - {cts,dsr,dcd,rng,rts,dtr}-gpios: Specify GPIOs for modem lines, cfr. the - generic serial DT bindings in serial.txt. - - uart-has-rtscts: Indicates dedicated lines for RTS/CTS hardware flow - control, cfr. the generic serial DT bindings in serial.txt. - -Example: - aliases { - serial0 = &scifa0; - }; - - scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7790", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c40000 0 64>; - interrupt-parent = <&gic>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; - clock-names = "fck"; - dmas = <&dmac0 0x21>, <&dmac0 0x22>; - dma-names = "tx", "rx"; - }; diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml new file mode 100644 index 000000000000..4183b7311f37 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/renesas,sci.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Serial Communication Interface + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: renesas,sci + + reg: + maxItems: 1 + + interrupts: + items: + - description: Error interrupt + - description: Receive buffer full interrupt + - description: Transmit buffer empty interrupt + - description: Transmit end interrupt + + interrupt-names: + items: + - const: eri + - const: rxi + - const: txi + - const: tei + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + items: + enum: + - fck # UART functional clock + - sck # optional external clock input + + uart-has-rtscts: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + aliases { + serial0 = &sci0; + }; + + sci0: serial@ffff78 { + compatible = "renesas,sci"; + reg = <0xffff78 8>; + interrupts = <88 0>, <89 0>, <90 0>, <91 0>; + clocks = <&fclk>; + clock-names = "fck"; + }; diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml new file mode 100644 index 000000000000..70392b9bd977 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Serial Communication Interface with FIFO (SCIF) + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,scif-r7s72100 # RZ/A1H + - const: renesas,scif # generic SCIF compatible UART + + - items: + - enum: + - renesas,scif-r7s9210 # RZ/A2 + + - items: + - enum: + - renesas,scif-r8a7778 # R-Car M1 + - renesas,scif-r8a7779 # R-Car H1 + - const: renesas,rcar-gen1-scif # R-Car Gen1 + - const: renesas,scif # generic SCIF compatible UART + + - items: + - enum: + - renesas,scif-r8a7743 # RZ/G1M + - renesas,scif-r8a7744 # RZ/G1N + - renesas,scif-r8a7745 # RZ/G1E + - renesas,scif-r8a77470 # RZ/G1C + - renesas,scif-r8a7790 # R-Car H2 + - renesas,scif-r8a7791 # R-Car M2-W + - renesas,scif-r8a7792 # R-Car V2H + - renesas,scif-r8a7793 # R-Car M2-N + - renesas,scif-r8a7794 # R-Car E2 + - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1 + - const: renesas,scif # generic SCIF compatible UART + + - items: + - enum: + - renesas,scif-r8a774a1 # RZ/G2M + - renesas,scif-r8a774b1 # RZ/G2N + - renesas,scif-r8a774c0 # RZ/G2E + - renesas,scif-r8a7795 # R-Car H3 + - renesas,scif-r8a7796 # R-Car M3-W + - renesas,scif-r8a77961 # R-Car M3-W+ + - renesas,scif-r8a77965 # R-Car M3-N + - renesas,scif-r8a77970 # R-Car V3M + - renesas,scif-r8a77980 # R-Car V3H + - renesas,scif-r8a77990 # R-Car E3 + - renesas,scif-r8a77995 # R-Car D3 + - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2 + - const: renesas,scif # generic SCIF compatible UART + + reg: + maxItems: 1 + + interrupts: + oneOf: + - items: + - description: A combined interrupt + - items: + - description: Error interrupt + - description: Receive buffer full interrupt + - description: Transmit buffer empty interrupt + - description: Transmit End interrupt + - items: + - description: Error interrupt + - description: Receive buffer full interrupt + - description: Transmit buffer empty interrupt + - description: Break interrupt + - description: Data Ready interrupt + - description: Transmit End interrupt + + interrupt-names: + oneOf: + - items: + - const: eri + - const: rxi + - const: txi + - const: tei + - items: + - const: eri + - const: rxi + - const: txi + - const: bri + - const: dri + - const: tei + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + items: + enum: + - fck # UART functional clock + - sck # optional external clock input + - brg_int # optional internal clock source for BRG frequency divider + - scif_clk # optional external clock source for BRG frequency divider + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + description: + Must contain a list of pairs of references to DMA specifiers, one for + transmission, and one for reception. + + dma-names: + minItems: 2 + maxItems: 4 + items: + enum: + - tx + - rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-scif + - renesas,rcar-gen3-scif +then: + required: + - resets + +examples: + - | + #include <dt-bindings/clock/r8a7791-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7791-sysc.h> + aliases { + serial0 = &scif0; + }; + + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; + reg = <0xe6e60000 64>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 721>; + }; diff --git a/Documentation/devicetree/bindings/serial/renesas,scifa.yaml b/Documentation/devicetree/bindings/serial/renesas,scifa.yaml new file mode 100644 index 000000000000..b28bcb268854 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,scifa.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/renesas,scifa.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Serial Communications Interface with FIFO A (SCIFA) + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,scifa-r8a73a4 # R-Mobile APE6 + - renesas,scifa-r8a7740 # R-Mobile A1 + - renesas,scifa-sh73a0 # SH-Mobile AG5 + - const: renesas,scifa # generic SCIFA compatible UART + + - items: + - enum: + - renesas,scifa-r8a7743 # R8A7743 RZ/G1M + - renesas,scifa-r8a7744 # R8A7744 RZ/G1N + - renesas,scifa-r8a7745 # R8A7745 RZ/G1E + - renesas,scifa-r8a7790 # R8A7790 R-Car H2 + - renesas,scifa-r8a7791 # R8A7791 R-Car M2-W + - renesas,scifa-r8a7793 # R8A7793 R-Car M2-N + - renesas,scifa-r8a7794 # R8A7794 R-Car E2 + - const: renesas,rcar-gen2-scifa # R-Car Gen2 and RZ/G1 + - const: renesas,scifa # generic SCIFA compatible UART + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + enum: + - fck # UART functional clock + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + description: + Must contain a list of pairs of references to DMA specifiers, one for + transmission, and one for reception. + + dma-names: + minItems: 2 + maxItems: 4 + items: + enum: + - tx + - rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-scifa +then: + required: + - resets + +examples: + - | + #include <dt-bindings/clock/r8a7790-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> + aliases { + serial0 = &scifa0; + }; + + scifa0: serial@e6c40000 { + compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa", + "renesas,scifa"; + reg = <0xe6c40000 64>; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 204>; + clock-names = "fck"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 204>; + dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>; + dma-names = "tx", "rx", "tx", "rx"; + }; diff --git a/Documentation/devicetree/bindings/serial/renesas,scifb.yaml b/Documentation/devicetree/bindings/serial/renesas,scifb.yaml new file mode 100644 index 000000000000..57205cb1dcd4 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,scifb.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/renesas,scifb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas Serial Communications Interface with FIFO B (SCIFB) + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,scifb-r8a73a4 # R-Mobile APE6 + - renesas,scifb-r8a7740 # R-Mobile A1 + - renesas,scifb-sh73a0 # SH-Mobile AG5 + - const: renesas,scifb # generic SCIFB compatible UART + + - items: + - enum: + - renesas,scifb-r8a7743 # RZ/G1M + - renesas,scifb-r8a7744 # RZ/G1N + - renesas,scifb-r8a7745 # RZ/G1E + - renesas,scifb-r8a7790 # R-Car H2 + - renesas,scifb-r8a7791 # R-Car M2-W + - renesas,scifb-r8a7793 # R-Car M2-N + - renesas,scifb-r8a7794 # R-Car E2 + - const: renesas,rcar-gen2-scifb # R-Car Gen2 and RZ/G1 + - const: renesas,scifb # generic SCIFB compatible UART + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + enum: + - fck # UART functional clock + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + description: + Must contain a list of pairs of references to DMA specifiers, one for + transmission, and one for reception. + + dma-names: + minItems: 2 + maxItems: 4 + items: + enum: + - tx + - rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-scifb +then: + required: + - resets + +examples: + - | + #include <dt-bindings/clock/r8a7740-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + scifb: serial@e6c30000 { + compatible = "renesas,scifb-r8a7740", "renesas,scifb"; + reg = <0xe6c30000 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; + clock-names = "fck"; + power-domains = <&pd_a3sp>; + }; diff --git a/Documentation/devicetree/bindings/serial/serial.txt b/Documentation/devicetree/bindings/serial/serial.txt deleted file mode 100644 index 863c2893759e..000000000000 --- a/Documentation/devicetree/bindings/serial/serial.txt +++ /dev/null @@ -1,56 +0,0 @@ -Generic Serial DT Bindings - -This document lists a set of generic properties for describing UARTs in a -device tree. Whether these properties apply to a particular device depends on -the DT bindings for the actual device. - -Optional properties: - - cts-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's CTS line. - - dcd-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's DCD line. - - dsr-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's DSR line. - - dtr-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's DTR line. - - rng-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's RNG line. - - rts-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be - used as the UART's RTS line. - - - uart-has-rtscts: The presence of this property indicates that the - UART has dedicated lines for RTS/CTS hardware flow control, and that - they are available for use (wired and enabled by pinmux configuration). - This depends on both the UART hardware and the board wiring. - Note that this property is mutually-exclusive with "cts-gpios" and - "rts-gpios" above, unless support is provided to switch between modes - dynamically. - - -Examples: - - uart1: serial@48022000 { - compatible = "ti,am3352-uart", "ti,omap3-uart"; - ti,hwmods = "uart2"; - clock-frequency = <48000000>; - reg = <0x48022000 0x2000>; - interrupts = <73>; - dmas = <&edma 28 0>, <&edma 29 0>; - dma-names = "tx", "rx"; - dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; - dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; - dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; - rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; - cts-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; - rts-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; - }; - - scifa4: serial@e6c80000 { - compatible = "renesas,scifa-sh73a0", "renesas,scifa"; - reg = <0xe6c80000 0x100>; - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>; - clock-names = "fck"; - power-domains = <&pd_a3sp>; - uart-has-rtscts; - }; diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml new file mode 100644 index 000000000000..53204d90d0c7 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/serial.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/serial.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Serial Interface Generic DT Bindings + +maintainers: + - Rob Herring <robh@kernel.org> + - Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +description: + This document lists a set of generic properties for describing UARTs in a + device tree. Whether these properties apply to a particular device depends + on the DT bindings for the actual device. + + Each enabled UART may have an optional "serialN" alias in the "aliases" node, + where N is the port number (non-negative decimal integer) as printed on the + label next to the physical port. + +properties: + $nodename: + pattern: "^serial(@.*)?$" + + cts-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's CTS line. + + dcd-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's DCD line. + + dsr-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's DSR line. + + dtr-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's DTR line. + + rng-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's RNG line. + + rts-gpios: + maxItems: 1 + description: + Must contain a GPIO specifier, referring to the GPIO pin to be used as + the UART's RTS line. + + uart-has-rtscts: + $ref: /schemas/types.yaml#/definitions/flag + description: + The presence of this property indicates that the UART has dedicated lines + for RTS/CTS hardware flow control, and that they are available for use + (wired and enabled by pinmux configuration). This depends on both the + UART hardware and the board wiring. + +if: + required: + - uart-has-rtscts +then: + properties: + cts-gpios: false + rts-gpios: false + +patternProperties: + ".*": + if: + type: object + then: + description: + Serial attached devices shall be a child node of the host UART device + the slave device is attached to. It is expected that the attached + device is the only child node of the UART device. The slave device node + name shall reflect the generic type of device for the node. + + properties: + compatible: + description: + Compatible of the device connected to the serial port. + + max-speed: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum baud rate the device operates at. + This should only be present if the maximum is less than the slave + device can support. For example, a particular board has some + signal quality issue or the host processor can't support higher + baud rates. + + current-speed: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + The current baud rate the device operates at. + This should only be present in case a driver has no chance to know + the baud rate of the slave device. + Examples: + * device supports auto-baud + * the rate is setup by a bootloader and there is no way to reset + the device + * device baud rate is configured by its firmware but there is no + way to request the actual settings + + required: + - compatible + +examples: + - | + serial@1234 { + compatible = "ns16550a"; + reg = <0x1234 0x20>; + interrupts = <1>; + + bluetooth { + compatible = "brcm,bcm43341-bt"; + interrupt-parent = <&gpio>; + interrupts = <10>; + }; + }; diff --git a/Documentation/devicetree/bindings/serial/slave-device.txt b/Documentation/devicetree/bindings/serial/slave-device.txt deleted file mode 100644 index 40110e019620..000000000000 --- a/Documentation/devicetree/bindings/serial/slave-device.txt +++ /dev/null @@ -1,45 +0,0 @@ -Serial Slave Device DT binding - -This documents the binding structure and common properties for serial -attached devices. Common examples include Bluetooth, WiFi, NFC and GPS -devices. - -Serial attached devices shall be a child node of the host UART device the -slave device is attached to. It is expected that the attached device is -the only child node of the UART device. The slave device node name shall -reflect the generic type of device for the node. - -Required Properties: - -- compatible : A string reflecting the vendor and specific device the node - represents. - -Optional Properties: - -- max-speed : The maximum baud rate the device operates at. This should - only be present if the maximum is less than the slave device - can support. For example, a particular board has some signal - quality issue or the host processor can't support higher - baud rates. -- current-speed : The current baud rate the device operates at. This should - only be present in case a driver has no chance to know - the baud rate of the slave device. - Examples: - * device supports auto-baud - * the rate is setup by a bootloader and there is no - way to reset the device - * device baud rate is configured by its firmware but - there is no way to request the actual settings - -Example: - -serial@1234 { - compatible = "ns16550a"; - interrupts = <1>; - - bluetooth { - compatible = "brcm,bcm43341-bt"; - interrupt-parent = <&gpio>; - interrupts = <10>; - }; -}; diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index b42002542690..b962f8db4ce9 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -27,6 +27,7 @@ properties: - rockchip,rk3066-uart - rockchip,rk3188-uart - rockchip,rk3288-uart + - rockchip,rk3308-uart - rockchip,rk3328-uart - rockchip,rk3368-uart - rockchip,rk3399-uart diff --git a/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml b/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml new file mode 100644 index 000000000000..09a30300850c --- /dev/null +++ b/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier UART controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + const: socionext,uniphier-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + + auto-flow-control: + description: enable automatic flow control support. + $ref: /schemas/types.yaml#/definitions/flag + +required: + - compatible + - reg + - interrupts + - clocks + +examples: + - | + aliases { + serial0 = &serial0; + }; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + clocks = <&uart_clk>; + }; diff --git a/Documentation/devicetree/bindings/serial/uniphier-uart.txt b/Documentation/devicetree/bindings/serial/uniphier-uart.txt deleted file mode 100644 index 7a1bf02bb869..000000000000 --- a/Documentation/devicetree/bindings/serial/uniphier-uart.txt +++ /dev/null @@ -1,22 +0,0 @@ -UniPhier UART controller - -Required properties: -- compatible: should be "socionext,uniphier-uart". -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: phandle to the input clock. - -Optional properties: --auto-flow-control: enable automatic flow control support. - -Example: - aliases { - serial0 = &serial0; - }; - - serial0: serial@54006800 { - compatible = "socionext,uniphier-uart"; - reg = <0x54006800 0x40>; - interrupts = <0 33 4>; - clocks = <&uart_clk>; - }; diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml index f548594d020b..cb008fd188d8 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml @@ -40,6 +40,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | canvas: video-lut@48 { diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml new file mode 100644 index 000000000000..3cbf2d28a188 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,aips-bus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX AHB to IP Bridge + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +description: | + This particular peripheral is designed as the bridge between + AHB bus and peripherals with the lower bandwidth IP Slave (IPS) + buses. + +select: + properties: + compatible: + contains: + const: fsl,aips-bus + required: + - compatible + +properties: + compatible: + items: + - const: fsl,aips-bus + - const: simple-bus + + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + bus@30000000 { + compatible = "fsl,aips-bus", "simple-bus"; + reg = <0x30000000 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; +... diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index 7a32404c6114..ecac2bbeae45 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -20,6 +20,7 @@ Required properties in pwrap device node. - compatible: "mediatek,mt2701-pwrap" for MT2701/7623 SoCs "mediatek,mt6765-pwrap" for MT6765 SoCs + "mediatek,mt6779-pwrap" for MT6779 SoCs "mediatek,mt6797-pwrap" for MT6797 SoCs "mediatek,mt7622-pwrap" for MT7622 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt index db501269f47b..f8fa71f5d84b 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt @@ -45,6 +45,18 @@ by the individual bindings for the specific service 12 - Ultrasound stream manager. 13 - Listen stream manager. +- qcom,protection-domain + Usage: optional + Value type: <stringlist> + Definition: Must list the protection domain service name and path + that the particular apr service has a dependency on. + Possible values are : + "avs/audio", "msm/adsp/audio_pd". + "kernel/elf_loader", "msm/modem/wlan_pd". + "tms/servreg", "msm/adsp/audio_pd". + "tms/servreg", "msm/modem/wlan_pd". + "tms/servreg", "msm/slpi/sensor_pd". + = EXAMPLE The following example represents a QDSP based sound card on a MSM8996 device which uses apr as communication between Apps and QDSP. @@ -82,3 +94,41 @@ which uses apr as communication between Apps and QDSP. ... }; }; + += EXAMPLE 2 +The following example represents a QDSP based sound card with protection domain +dependencies specified. Here some of the apr services are dependent on services +running on protection domain hosted on ADSP/SLPI remote processors while others +have no such dependency. + + apr { + compatible = "qcom,apr-v2"; + qcom,glink-channels = "apr_audio_svc"; + qcom,apr-domain = <APR_DOMAIN_ADSP>; + + q6core { + compatible = "qcom,q6core"; + reg = <APR_SVC_ADSP_CORE>; + }; + + q6afe: q6afe { + compatible = "qcom,q6afe"; + reg = <APR_SVC_AFE>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + ... + }; + + q6asm: q6asm { + compatible = "qcom,q6asm"; + reg = <APR_SVC_ASM>; + qcom,protection-domain = "tms/servreg", "msm/slpi/sensor_pd"; + ... + }; + + q6adm: q6adm { + compatible = "qcom,q6adm"; + reg = <APR_SVC_ADM>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + ... + }; + }; diff --git a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml index 75e0cbe6be70..76ee695097bf 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml +++ b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml @@ -59,6 +59,8 @@ required: - iovdd-supply - dvdd-supply +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml b/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml new file mode 100644 index 000000000000..a61bccf915d8 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,aiu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic AIU audio output controller + +maintainers: + - Jerome Brunet <jbrunet@baylibre.com> + +properties: + $nodename: + pattern: "^audio-controller@.*" + + "#sound-dai-cells": + const: 2 + + compatible: + items: + - enum: + - amlogic,aiu-gxbb + - amlogic,aiu-gxl + - amlogic,aiu-meson8 + - amlogic,aiu-meson8b + - const: + amlogic,aiu + + clocks: + items: + - description: AIU peripheral clock + - description: I2S peripheral clock + - description: I2S output clock + - description: I2S master clock + - description: I2S mixer clock + - description: SPDIF peripheral clock + - description: SPDIF output clock + - description: SPDIF master clock + - description: SPDIF master clock multiplexer + + clock-names: + items: + - const: pclk + - const: i2s_pclk + - const: i2s_aoclk + - const: i2s_mclk + - const: i2s_mixer + - const: spdif_pclk + - const: spdif_aoclk + - const: spdif_mclk + - const: spdif_mclk_sel + + interrupts: + items: + - description: I2S interrupt line + - description: SPDIF interrupt line + + interrupt-names: + items: + - const: i2s + - const: spdif + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - "#sound-dai-cells" + - compatible + - clocks + - clock-names + - interrupts + - interrupt-names + - reg + - resets + +examples: + - | + #include <dt-bindings/clock/gxbb-clkc.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> + + aiu: audio-controller@5400 { + compatible = "amlogic,aiu-gxl", "amlogic,aiu"; + #sound-dai-cells = <2>; + reg = <0x0 0x5400 0x0 0x2ac>; + interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "i2s", "spdif"; + clocks = <&clkc CLKID_AIU_GLUE>, + <&clkc CLKID_I2S_OUT>, + <&clkc CLKID_AOCLK_GATE>, + <&clkc CLKID_CTS_AMCLK>, + <&clkc CLKID_MIXER_IFACE>, + <&clkc CLKID_IEC958>, + <&clkc CLKID_IEC958_GATE>, + <&clkc CLKID_CTS_MCLK_I958>, + <&clkc CLKID_CTS_I958>; + clock-names = "pclk", + "i2s_pclk", + "i2s_aoclk", + "i2s_mclk", + "i2s_mixer", + "spdif_pclk", + "spdif_aoclk", + "spdif_mclk", + "spdif_mclk_sel"; + resets = <&reset RESET_AIU>; + }; + diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml new file mode 100644 index 000000000000..f778d3371fde --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,g12a-toacodec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic G12a Internal DAC Control Glue + +maintainers: + - Jerome Brunet <jbrunet@baylibre.com> + +properties: + $nodename: + pattern: "^audio-controller@.*" + + "#sound-dai-cells": + const: 1 + + compatible: + oneOf: + - items: + - const: + amlogic,g12a-toacodec + - items: + - enum: + - amlogic,sm1-toacodec + - const: + amlogic,g12a-toacodec + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - "#sound-dai-cells" + - compatible + - reg + - resets + +examples: + - | + #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h> + + toacodec: audio-controller@740 { + compatible = "amlogic,g12a-toacodec"; + reg = <0x0 0x740 0x0 0x4>; + #sound-dai-cells = <1>; + resets = <&clkc_audio AUD_RESET_TOACODEC>; + }; diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml new file mode 100644 index 000000000000..fb374c659be1 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic GX sound card + +maintainers: + - Jerome Brunet <jbrunet@baylibre.com> + +properties: + compatible: + items: + - const: amlogic,gx-sound-card + + audio-aux-devs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: list of auxiliary devices + + audio-routing: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + minItems: 2 + description: |- + A list of the connections between audio components. Each entry is a + pair of strings, the first being the connection's sink, the second + being the connection's source. + + audio-widgets: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + minItems: 2 + description: |- + A list off component DAPM widget. Each entry is a pair of strings, + the first being the widget type, the second being the widget name + + model: + $ref: /schemas/types.yaml#/definitions/string + description: User specified audio sound card name + +patternProperties: + "^dai-link-[0-9]+$": + type: object + description: |- + dai-link child nodes: + Container for dai-link level properties and the CODEC sub-nodes. + There should be at least one (and probably more) subnode of this type + + properties: + dai-format: + $ref: /schemas/types.yaml#/definitions/string + enum: [ i2s, left-j, dsp_a ] + + mclk-fs: + $ref: /schemas/types.yaml#/definitions/uint32 + description: |- + Multiplication factor between the frame rate and master clock + rate + + sound-dai: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of the CPU DAI + + patternProperties: + "^codec-[0-9]+$": + type: object + description: |- + Codecs: + dai-link representing backend links should have at least one subnode. + One subnode for each codec of the dai-link. dai-link representing + frontend links have no codec, therefore have no subnodes + + properties: + sound-dai: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of the codec DAI + + required: + - sound-dai + + required: + - sound-dai + +required: + - model + - dai-link-0 + +examples: + - | + sound { + compatible = "amlogic,gx-sound-card"; + model = "GXL-ACME-S905X-FOO"; + audio-aux-devs = <&>; + audio-routing = "I2S ENCODER I2S IN", "I2S FIFO Playback"; + + dai-link-0 { + sound-dai = <&i2s_fifo>; + }; + + dai-link-1 { + sound-dai = <&i2s_encoder>; + dai-format = "i2s"; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&codec0>; + }; + + codec-1 { + sound-dai = <&codec1>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml b/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml new file mode 100644 index 000000000000..b7c38c2b5b54 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,t9015.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic T9015 Internal Audio DAC + +maintainers: + - Jerome Brunet <jbrunet@baylibre.com> + +properties: + $nodename: + pattern: "^audio-controller@.*" + + "#sound-dai-cells": + const: 0 + + compatible: + items: + - const: amlogic,t9015 + + clocks: + items: + - description: Peripheral clock + + clock-names: + items: + - const: pclk + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - "#sound-dai-cells" + - compatible + - reg + - clocks + - clock-names + - resets + +examples: + - | + #include <dt-bindings/clock/g12a-clkc.h> + #include <dt-bindings/reset/amlogic,meson-g12a-reset.h> + + acodec: audio-controller@32000 { + compatible = "amlogic,t9015"; + reg = <0x0 0x32000 0x0 0x14>; + #sound-dai-cells = <0>; + clocks = <&clkc CLKID_AUDIO_CODEC>; + clock-names = "pclk"; + resets = <&reset RESET_AUDIO_CODEC>; + }; + diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt b/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt new file mode 100644 index 000000000000..007f524b4d15 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/brcm,bcm63xx-audio.txt @@ -0,0 +1,29 @@ +Broadcom DSL/PON BCM63xx Audio I2S controller + +Required properties: +- compatible: Should be "brcm,bcm63xx-i2s". +- #address-cells: 32bit valued, 1 cell. +- #size-cells: 32bit valued, 0 cell. +- reg: Should contain audio registers location and length +- interrupts: Should contain the interrupt for the controller. +- clocks: Must contain an entry for each entry in clock-names. + Please refer to clock-bindings.txt. +- clock-names: One of each entry matching the clocks phandles list: + - "i2sclk" (generated clock) Required. + - "i2sosc" (fixed 200MHz clock) Required. + +(1) : The generated clock is required only when any of TX and RX + works on Master Mode. +(2) : The fixed 200MHz clock is from internal chip and always on + +Example: + + i2s: bcm63xx-i2s { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63xx-i2s"; + reg = <0xFF802080 0xFF>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&i2sclk>, <&osc>; + clock-names = "i2sclk","i2sosc"; + }; diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml new file mode 100644 index 000000000000..83f44f07ac3f --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cirrus,cs42l51.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CS42L51 audio codec DT bindings + +maintainers: + - Olivier Moysan <olivier.moysan@st.com> + +properties: + compatible: + const: cirrus,cs42l51 + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: MCLK + + reset-gpios: + maxItems: 1 + + VL-supply: + description: phandle to voltage regulator of digital interface section + + VD-supply: + description: phandle to voltage regulator of digital internal section + + VA-supply: + description: phandle to voltage regulator of analog internal section + + VAHP-supply: + description: phandle to voltage regulator of headphone + +required: + - compatible + - reg + - "#sound-dai-cells" + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cs42l51@4a { + compatible = "cirrus,cs42l51"; + reg = <0x4a>; + #sound-dai-cells = <0>; + clocks = <&mclk_prov>; + clock-names = "MCLK"; + VL-supply = <®_audio>; + VD-supply = <®_audio>; + VA-supply = <®_audio>; + VAHP-supply = <®_audio>; + reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/sound/cs42l51.txt b/Documentation/devicetree/bindings/sound/cs42l51.txt deleted file mode 100644 index acbd68ddd2cb..000000000000 --- a/Documentation/devicetree/bindings/sound/cs42l51.txt +++ /dev/null @@ -1,33 +0,0 @@ -CS42L51 audio CODEC - -Required properties: - - - compatible : "cirrus,cs42l51" - - - reg : the I2C address of the device for I2C. - -Optional properties: - - VL-supply, VD-supply, VA-supply, VAHP-supply: power supplies for the device, - as covered in Documentation/devicetree/bindings/regulator/regulator.txt. - - - reset-gpios : GPIO specification for the reset pin. If specified, it will be - deasserted before starting the communication with the codec. - - - clocks : a list of phandles + clock-specifiers, one for each entry in - clock-names - - - clock-names : must contain "MCLK" - -Example: - -cs42l51: cs42l51@4a { - compatible = "cirrus,cs42l51"; - reg = <0x4a>; - clocks = <&mclk_prov>; - clock-names = "MCLK"; - VL-supply = <®_audio>; - VD-supply = <®_audio>; - VA-supply = <®_audio>; - VAHP-supply = <®_audio>; - reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; -}; diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt deleted file mode 100644 index 8ca52dcc5572..000000000000 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt +++ /dev/null @@ -1,44 +0,0 @@ -Audio codec controlled by ChromeOS EC - -Google's ChromeOS EC codec is a digital mic codec provided by the -Embedded Controller (EC) and is controlled via a host-command interface. - -An EC codec node should only be found as a sub-node of the EC node (see -Documentation/devicetree/bindings/mfd/cros-ec.txt). - -Required properties: -- compatible: Must contain "google,cros-ec-codec" -- #sound-dai-cells: Should be 1. The cell specifies number of DAIs. - -Optional properties: -- reg: Pysical base address and length of shared memory region from EC. - It contains 3 unsigned 32-bit integer. The first 2 integers - combine to become an unsigned 64-bit physical address. The last - one integer is length of the shared memory. -- memory-region: Shared memory region to EC. A "shared-dma-pool". See - ../reserved-memory/reserved-memory.txt for details. - -Example: - -{ - ... - - reserved_mem: reserved_mem { - compatible = "shared-dma-pool"; - reg = <0 0x52800000 0 0x100000>; - no-map; - }; -} - -cros-ec@0 { - compatible = "google,cros-ec-spi"; - - ... - - cros_ec_codec: ec-codec { - compatible = "google,cros-ec-codec"; - #sound-dai-cells = <1>; - reg = <0x0 0x10500000 0x80000>; - memory-region = <&reserved_mem>; - }; -}; diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml new file mode 100644 index 000000000000..c84e656afb0a --- /dev/null +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Audio codec controlled by ChromeOS EC + +maintainers: + - Cheng-Yi Chiang <cychiang@chromium.org> + +description: | + Google's ChromeOS EC codec is a digital mic codec provided by the + Embedded Controller (EC) and is controlled via a host-command interface. + An EC codec node should only be found as a sub-node of the EC node (see + Documentation/devicetree/bindings/mfd/cros-ec.txt). + +properties: + compatible: + const: google,cros-ec-codec + + "#sound-dai-cells": + const: 1 + + reg: + items: + - description: | + Physical base address and length of shared memory region from EC. + It contains 3 unsigned 32-bit integer. The first 2 integers + combine to become an unsigned 64-bit physical address. + The last one integer is the length of the shared memory. + + memory-region: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Shared memory region to EC. A "shared-dma-pool". + See ../reserved-memory/reserved-memory.txt for details. + +required: + - compatible + - '#sound-dai-cells' + +additionalProperties: false + +examples: + - | + reserved_mem: reserved-mem@52800000 { + compatible = "shared-dma-pool"; + reg = <0x52800000 0x100000>; + no-map; + }; + spi { + #address-cells = <1>; + #size-cells = <0>; + cros-ec@0 { + compatible = "google,cros-ec-spi"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0>; + cros_ec_codec: ec-codec@10500000 { + compatible = "google,cros-ec-codec"; + #sound-dai-cells = <1>; + reg = <0x0 0x10500000 0x80000>; + memory-region = <&reserved_mem>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/ingenic,aic.yaml b/Documentation/devicetree/bindings/sound/ingenic,aic.yaml new file mode 100644 index 000000000000..44f49bebb267 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ingenic,aic.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ingenic,aic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs AC97 / I2S Controller (AIC) DT bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: '^audio-controller@' + + compatible: + oneOf: + - enum: + - ingenic,jz4740-i2s + - ingenic,jz4760-i2s + - ingenic,jz4770-i2s + - ingenic,jz4780-i2s + - items: + - const: ingenic,jz4725b-i2s + - const: ingenic,jz4740-i2s + + '#sound-dai-cells': + const: 0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AIC clock + - description: I2S clock + - description: EXT clock + - description: PLL/2 clock + + clock-names: + items: + - const: aic + - const: i2s + - const: ext + - const: pll half + + dmas: + items: + - description: DMA controller phandle and request line for I2S RX + - description: DMA controller phandle and request line for I2S TX + + dma-names: + items: + - const: rx + - const: tx + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - dmas + - dma-names + - '#sound-dai-cells' + +examples: + - | + #include <dt-bindings/clock/jz4740-cgu.h> + aic: audio-controller@10020000 { + compatible = "ingenic,jz4740-i2s"; + reg = <0x10020000 0x38>; + + #sound-dai-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <18>; + + clocks = <&cgu JZ4740_CLK_AIC>, + <&cgu JZ4740_CLK_I2S>, + <&cgu JZ4740_CLK_EXT>, + <&cgu JZ4740_CLK_PLL_HALF>; + clock-names = "aic", "i2s", "ext", "pll half"; + + dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>; + dma-names = "rx", "tx"; + }; diff --git a/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt b/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt deleted file mode 100644 index b623d50004fb..000000000000 --- a/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt +++ /dev/null @@ -1,23 +0,0 @@ -Ingenic JZ4740 I2S controller - -Required properties: -- compatible : "ingenic,jz4740-i2s" or "ingenic,jz4780-i2s" -- reg : I2S registers location and length -- clocks : AIC and I2S PLL clock specifiers. -- clock-names: "aic" and "i2s" -- dmas: DMA controller phandle and DMA request line for I2S Tx and Rx channels -- dma-names: Must be "tx" and "rx" - -Example: - -i2s: i2s@10020000 { - compatible = "ingenic,jz4740-i2s"; - reg = <0x10020000 0x94>; - - clocks = <&cgu JZ4740_CLK_AIC>, <&cgu JZ4740_CLK_I2SPLL>; - clock-names = "aic", "i2s"; - - dmas = <&dma 2>, <&dma 3>; - dma-names = "tx", "rx"; - -}; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt index b795d282818d..a8f2b0c56c79 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt @@ -18,6 +18,7 @@ Required properties: * Headphone Jack * Int Spk * Mic Jack + * Int Mic - nvidia,i2s-controller : The phandle of the Tegra I2S1 controller - nvidia,audio-codec : The phandle of the WM8903 audio codec diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml index 38eaf0c028f9..a495d5fc0d23 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml @@ -139,6 +139,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + examples: - | codec@1,0{ diff --git a/Documentation/devicetree/bindings/sound/renesas,fsi.yaml b/Documentation/devicetree/bindings/sound/renesas,fsi.yaml index 140a37fc3c0b..d1b65554e681 100644 --- a/Documentation/devicetree/bindings/sound/renesas,fsi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,fsi.yaml @@ -63,6 +63,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | sh_fsi2: sound@ec230000 { diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt index 2469588c7ccb..1ecd75d2032a 100644 --- a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt @@ -10,6 +10,11 @@ Required properties: - clock-names: should be "pclk". - spk-depop-time-ms: speak depop time msec. +Optional properties: + +- mute-gpios: GPIO specifier for external line driver control (typically the + dedicated GPIO_MUTE pin) + Example for rk3328 internal codec: codec: codec@ff410000 { @@ -18,6 +23,6 @@ codec: codec@ff410000 { rockchip,grf = <&grf>; clocks = <&cru PCLK_ACODEC>; clock-names = "pclk"; + mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; spk-depop-time-ms = 100; - status = "disabled"; }; diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt deleted file mode 100644 index 54aefab71f2c..000000000000 --- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt +++ /dev/null @@ -1,49 +0,0 @@ -* Rockchip I2S controller - -The I2S bus (Inter-IC sound bus) is a serial link for digital -audio data transfer between devices in the system. - -Required properties: - -- compatible: should be one of the following: - - "rockchip,rk3066-i2s": for rk3066 - - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30 - - "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036 - - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188 - - "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228 - - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288 - - "rockchip,rk3328-i2s", "rockchip,rk3066-i2s": for rk3328 - - "rockchip,rk3366-i2s", "rockchip,rk3066-i2s": for rk3366 - - "rockchip,rk3368-i2s", "rockchip,rk3066-i2s": for rk3368 - - "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399 -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: should contain the I2S interrupt. -- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, - Documentation/devicetree/bindings/dma/dma.txt -- dma-names: should include "tx" and "rx". -- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. -- clock-names: should contain the following: - - "i2s_hclk": clock for I2S BUS - - "i2s_clk" : clock for I2S controller -- rockchip,playback-channels: max playback channels, if not set, 8 channels default. -- rockchip,capture-channels: max capture channels, if not set, 2 channels default. - -Required properties for controller which support multi channels -playback/capture: - -- rockchip,grf: the phandle of the syscon node for GRF register. - -Example for rk3288 I2S controller: - -i2s@ff890000 { - compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; - reg = <0xff890000 0x10000>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&pdma1 0>, <&pdma1 1>; - dma-names = "tx", "rx"; - clock-names = "i2s_hclk", "i2s_clk"; - clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; - rockchip,playback-channels = <8>; - rockchip,capture-channels = <2>; -}; diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml b/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml new file mode 100644 index 000000000000..7cd0e278ed85 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip I2S controller + +description: + The I2S bus (Inter-IC sound bus) is a serial link for digital + audio data transfer between devices in the system. + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + oneOf: + - const: rockchip,rk3066-i2s + - items: + - enum: + - rockchip,px30-i2s + - rockchip,rk3036-i2s + - rockchip,rk3188-i2s + - rockchip,rk3228-i2s + - rockchip,rk3288-i2s + - rockchip,rk3328-i2s + - rockchip,rk3366-i2s + - rockchip,rk3368-i2s + - rockchip,rk3399-i2s + - const: rockchip,rk3066-i2s + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: clock for I2S controller + - description: clock for I2S BUS + + clock-names: + items: + - const: i2s_clk + - const: i2s_hclk + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + + rockchip,capture-channels: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + default: 2 + description: + Max capture channels, if not set, 2 channels default. + + rockchip,playback-channels: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + default: 8 + description: + Max playback channels, if not set, 8 channels default. + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle of the syscon node for the GRF register. + Required property for controllers which support multi channel + playback/capture. + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - dmas + - dma-names + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3288-cru.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + i2s@ff890000 { + compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; + reg = <0xff890000 0x10000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; + clock-names = "i2s_clk", "i2s_hclk"; + dmas = <&pdma1 0>, <&pdma1 1>; + dma-names = "tx", "rx"; + rockchip,capture-channels = <2>; + rockchip,playback-channels = <8>; + #sound-dai-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/sound/rt5682.txt b/Documentation/devicetree/bindings/sound/rt5682.txt index 30e927a28369..ade1ece8b45f 100644 --- a/Documentation/devicetree/bindings/sound/rt5682.txt +++ b/Documentation/devicetree/bindings/sound/rt5682.txt @@ -32,6 +32,18 @@ Optional properties: The delay time is realtek,btndet-delay value multiple of 8.192 ms. If absent, the default is 16. +- #clock-cells : Should be set to '<1>', wclk and bclk sources provided. +- clock-output-names : Name given for DAI clocks output. + +- clocks : phandle and clock specifier for codec MCLK. +- clock-names : Clock name string for 'clocks' attribute, should be "mclk". + +- realtek,dmic-clk-rate-hz : Set the clock rate (hz) for the requirement of + the particular DMIC. + +- realtek,dmic-delay-ms : Set the delay time (ms) for the requirement of + the particular DMIC. + Pins on the device (for linking into audio routes) for RT5682: * DMIC L1 @@ -53,4 +65,10 @@ rt5682 { realtek,dmic1-clk-pin = <1>; realtek,jd-src = <1>; realtek,btndet-delay = <16>; + + #clock-cells = <1>; + clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk"; + + clocks = <&osc>; + clock-names = "mclk"; }; diff --git a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml index c6b244352d05..8ff2d39e7d17 100644 --- a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml +++ b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml @@ -69,6 +69,8 @@ required: - cpu - codec +additionalProperties: false + examples: - | sound { diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml index 53e3bad4178c..b2ad093d94df 100644 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -115,6 +115,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include <dt-bindings/clock/exynos-audss-clk.h> diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt b/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt deleted file mode 100644 index cbf24bcd1b8d..000000000000 --- a/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt +++ /dev/null @@ -1,62 +0,0 @@ -STMicroelectronics STM32 SPI/I2S Controller - -The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode. -Only some SPI instances support I2S. - -Required properties: - - compatible: Must be "st,stm32h7-i2s" - - reg: Offset and length of the device's register set. - - interrupts: Must contain the interrupt line id. - - clocks: Must contain phandle and clock specifier pairs for each entry - in clock-names. - - clock-names: Must contain "i2sclk", "pclk", "x8k" and "x11k". - "i2sclk": clock which feeds the internal clock generator - "pclk": clock which feeds the peripheral bus interface - "x8k": I2S parent clock for sampling rates multiple of 8kHz. - "x11k": I2S parent clock for sampling rates multiple of 11.025kHz. - - dmas: DMA specifiers for tx and rx dma. - See Documentation/devicetree/bindings/dma/stm32-dma.txt. - - dma-names: Identifier for each DMA request line. Must be "tx" and "rx". - - pinctrl-names: should contain only value "default" - - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml - -Optional properties: - - resets: Reference to a reset controller asserting the reset controller - -The device node should contain one 'port' child node with one child 'endpoint' -node, according to the bindings defined in Documentation/devicetree/bindings/ -graph.txt. - -Example: -sound_card { - compatible = "audio-graph-card"; - dais = <&i2s2_port>; -}; - -i2s2: audio-controller@40003800 { - compatible = "st,stm32h7-i2s"; - reg = <0x40003800 0x400>; - interrupts = <36>; - clocks = <&rcc PCLK1>, <&rcc SPI2_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>; - clock-names = "pclk", "i2sclk", "x8k", "x11k"; - dmas = <&dmamux2 2 39 0x400 0x1>, - <&dmamux2 3 40 0x400 0x1>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2s2>; - - i2s2_port: port@0 { - cpu_endpoint: endpoint { - remote-endpoint = <&codec_endpoint>; - format = "i2s"; - }; - }; -}; - -audio-codec { - codec_port: port@0 { - codec_endpoint: endpoint { - remote-endpoint = <&cpu_endpoint>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml new file mode 100644 index 000000000000..f32410890589 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 SPI/I2S Controller + +maintainers: + - Olivier Moysan <olivier.moysan@st.com> + +description: + The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode. + Only some SPI instances support I2S. + +properties: + compatible: + enum: + - st,stm32h7-i2s + + "#sound-dai-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + items: + - description: clock feeding the peripheral bus interface. + - description: clock feeding the internal clock generator. + - description: I2S parent clock for sampling rates multiple of 8kHz. + - description: I2S parent clock for sampling rates multiple of 11.025kHz. + + clock-names: + items: + - const: pclk + - const: i2sclk + - const: x8k + - const: x11k + + interrupts: + maxItems: 1 + + dmas: + items: + - description: audio capture DMA. + - description: audio playback DMA. + + dma-names: + items: + - const: rx + - const: tx + + resets: + maxItems: 1 + +required: + - compatible + - "#sound-dai-cells" + - reg + - clocks + - clock-names + - interrupts + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + i2s2: audio-controller@4000b000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x4000b000 0x400>; + clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; + clock-names = "pclk", "i2sclk", "x8k", "x11k"; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 39 0x400 0x01>, + <&dmamux1 40 0x400 0x01>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2_pins_a>; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.txt b/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.txt deleted file mode 100644 index ca9101777c44..000000000000 --- a/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.txt +++ /dev/null @@ -1,56 +0,0 @@ -STMicroelectronics STM32 S/PDIF receiver (SPDIFRX). - -The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with -IEC-60958 and IEC-61937. - -Required properties: - - compatible: should be "st,stm32h7-spdifrx" - - reg: cpu DAI IP base address and size - - clocks: must contain an entry for kclk (used as S/PDIF signal reference) - - clock-names: must contain "kclk" - - interrupts: cpu DAI interrupt line - - dmas: DMA specifiers for audio data DMA and iec control flow DMA - See STM32 DMA bindings, Documentation/devicetree/bindings/dma/st,stm32-dma.yaml - - dma-names: two dmas have to be defined, "rx" and "rx-ctrl" - -Optional properties: - - resets: Reference to a reset controller asserting the SPDIFRX - -The device node should contain one 'port' child node with one child 'endpoint' -node, according to the bindings defined in Documentation/devicetree/bindings/ -graph.txt. - -Example: -spdifrx: spdifrx@40004000 { - compatible = "st,stm32h7-spdifrx"; - reg = <0x40004000 0x400>; - clocks = <&rcc SPDIFRX_CK>; - clock-names = "kclk"; - interrupts = <97>; - dmas = <&dmamux1 2 93 0x400 0x0>, - <&dmamux1 3 94 0x400 0x0>; - dma-names = "rx", "rx-ctrl"; - pinctrl-0 = <&spdifrx_pins>; - pinctrl-names = "default"; - - spdifrx_port: port { - cpu_endpoint: endpoint { - remote-endpoint = <&codec_endpoint>; - }; - }; -}; - -spdif_in: spdif-in { - compatible = "linux,spdif-dir"; - - codec_port: port { - codec_endpoint: endpoint { - remote-endpoint = <&cpu_endpoint>; - }; - }; -}; - -soundcard { - compatible = "audio-graph-card"; - dais = <&spdifrx_port>; -}; diff --git a/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml b/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml new file mode 100644 index 000000000000..b7f7dc452231 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 S/PDIF receiver (SPDIFRX) + +maintainers: + - Olivier Moysan <olivier.moysan@st.com> + +description: | + The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with + IEC-60958 and IEC-61937. + +properties: + compatible: + enum: + - st,stm32h7-spdifrx + + "#sound-dai-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: kclk + + interrupts: + maxItems: 1 + + dmas: + items: + - description: audio data capture DMA + - description: IEC status bits capture DMA + + dma-names: + items: + - const: rx + - const: rx-ctrl + + resets: + maxItems: 1 + +required: + - compatible + - "#sound-dai-cells" + - reg + - clocks + - clock-names + - interrupts + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + spdifrx: spdifrx@40004000 { + compatible = "st,stm32h7-spdifrx"; + #sound-dai-cells = <0>; + reg = <0x40004000 0x400>; + clocks = <&rcc SPDIF_K>; + clock-names = "kclk"; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 2 93 0x400 0x0>, + <&dmamux1 3 94 0x400 0x0>; + dma-names = "rx", "rx-ctrl"; + pinctrl-0 = <&spdifrx_pins>; + pinctrl-names = "default"; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/tas2562.txt b/Documentation/devicetree/bindings/sound/tas2562.txt index 658e1fb18a99..94796b547184 100644 --- a/Documentation/devicetree/bindings/sound/tas2562.txt +++ b/Documentation/devicetree/bindings/sound/tas2562.txt @@ -8,7 +8,7 @@ real time monitoring of loudspeaker behavior. Required properties: - #address-cells - Should be <1>. - #size-cells - Should be <0>. - - compatible: - Should contain "ti,tas2562". + - compatible: - Should contain "ti,tas2562", "ti,tas2563". - reg: - The i2c address. Should be 0x4c, 0x4d, 0x4e or 0x4f. - ti,imon-slot-no:- TDM TX current sense time slot. diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml new file mode 100644 index 000000000000..ab2268c0ee67 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +# Copyright (C) 2019 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/tlv320adcx140.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter + +maintainers: + - Dan Murphy <dmurphy@ti.com> + +description: | + The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital + PDM microphones recording), high-performance audio, analog-to-digital + converter (ADC) with analog inputs supporting up to 2V RMS. The TLV320ADCX140 + family supports line and microphone Inputs, and offers a programmable + microphone bias or supply voltage generation. + + Specifications can be found at: + http://www.ti.com/lit/ds/symlink/tlv320adc3140.pdf + http://www.ti.com/lit/ds/symlink/tlv320adc5140.pdf + http://www.ti.com/lit/ds/symlink/tlv320adc6140.pdf + +properties: + compatible: + oneOf: + - const: ti,tlv320adc3140 + - const: ti,tlv320adc5140 + - const: ti,tlv320adc6140 + + reg: + maxItems: 1 + description: | + I2C addresss of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f + + reset-gpios: + description: | + GPIO used for hardware reset. + + areg-supply: + description: | + Regulator with AVDD at 3.3V. If not defined then the internal regulator + is enabled. + + ti,mic-bias-source: + description: | + Indicates the source for MIC Bias. + 0 - Mic bias is set to VREF + 1 - Mic bias is set to VREF × 1.096 + 6 - Mic bias is set to AVDD + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 6] + + ti,vref-source: + description: | + Indicates the source for MIC Bias. + 0 - Set VREF to 2.75V + 1 - Set VREF to 2.5V + 2 - Set VREF to 1.375V + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 2] + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + codec: codec@4c { + compatible = "ti,tlv320adc5140"; + reg = <0x4c>; + ti,mic-bias-source = <6>; + reset-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index 0565dc49e449..243a6b1e66ea 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -18,9 +18,14 @@ properties: "#size-cells": true compatible: - enum: - - allwinner,sun6i-a31-spi - - allwinner,sun8i-h3-spi + oneOf: + - const: allwinner,sun6i-a31-spi + - const: allwinner,sun8i-h3-spi + - items: + - enum: + - allwinner,sun8i-r40-spi + - allwinner,sun50i-h6-spi + - const: allwinner,sun8i-h3-spi reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml index 49b617c98ae7..9147df29022a 100644 --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml @@ -22,6 +22,7 @@ properties: enum: - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs + - amlogic,meson-g12a-spicc # SPICC controller on Amlogic G12A and compatible SoCs interrupts: maxItems: 1 @@ -40,6 +41,27 @@ properties: items: - const: core +if: + properties: + compatible: + contains: + enum: + - amlogic,meson-g12a-spicc + +then: + properties: + clocks: + contains: + items: + - description: controller register bus clock + - description: baud rate generator and delay control clock + + clock-names: + minItems: 2 + items: + - const: core + - const: pclk + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt index 2d3264140cc5..33bc58f4cf4b 100644 --- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt +++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt @@ -10,7 +10,10 @@ Required properties: - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc - - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M + - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ + - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM + - "fsl,imx8mn-ecspi" for SPI compatible with the one integrated on i.MX8MN + - "fsl,imx8mp-ecspi" for SPI compatible with the one integrated on i.MX8MP - reg : Offset and length of the register set for the device - interrupts : Should contain CSPI/eCSPI interrupt - clocks : Clock specifiers for both ipg and per clocks. diff --git a/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml b/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml new file mode 100644 index 000000000000..2aa766759d59 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/qca,ar934x-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Atheros AR934x/QCA95xx SoC SPI controller + +maintainers: + - Chuanhong Guo <gch981213@gmail.com> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: qca,ar934x-spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + +examples: + - | + #include <dt-bindings/clock/ath79-clk.h> + spi: spi@1f000000 { + compatible = "qca,ar934x-spi"; + reg = <0x1f000000 0x1c>; + clocks = <&pll ATH79_CLK_AHB>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt deleted file mode 100644 index 1d64b61f5171..000000000000 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt +++ /dev/null @@ -1,36 +0,0 @@ -Qualcomm Quad Serial Peripheral Interface (QSPI) - -The QSPI controller allows SPI protocol communication in single, dual, or quad -wire transmission modes for read/write access to slaves such as NOR flash. - -Required properties: -- compatible: An SoC specific identifier followed by "qcom,qspi-v1", such as - "qcom,sdm845-qspi", "qcom,qspi-v1" -- reg: Should contain the base register location and length. -- interrupts: Interrupt number used by the controller. -- clocks: Should contain the core and AHB clock. -- clock-names: Should be "core" for core clock and "iface" for AHB clock. - -SPI slave nodes must be children of the SPI master node and can contain -properties described in Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: - - qspi: spi@88df000 { - compatible = "qcom,sdm845-qspi", "qcom,qspi-v1"; - reg = <0x88df000 0x600>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "iface", "core"; - clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, - <&gcc GCC_QSPI_CORE_CLK>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <25000000>; - spi-tx-bus-width = <2>; - spi-rx-bus-width = <2>; - }; - }; diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file mode 100644 index 000000000000..0cf470eaf2a0 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Quad Serial Peripheral Interface (QSPI) + +maintainers: + - Mukesh Savaliya <msavaliy@codeaurora.org> + - Akash Asthana <akashast@codeaurora.org> + +description: + The QSPI controller allows SPI protocol communication in single, dual, or quad + wire transmission modes for read/write access to slaves such as NOR flash. + +allOf: + - $ref: /spi/spi-controller.yaml# + +properties: + compatible: + items: + - const: qcom,sdm845-qspi + - const: qcom,qspi-v1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-names: + items: + - const: iface + - const: core + + clocks: + items: + - description: AHB clock + - description: QSPI core clock + + interconnects: + minItems: 1 + maxItems: 2 + + interconnect-names: + items: + - const: qspi-config + - const: qspi-memory + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + + qspi: spi@88df000 { + compatible = "qcom,sdm845-qspi", "qcom,qspi-v1"; + reg = <0 0x88df000 0 0x600>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "iface", "core"; + clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <&gcc GCC_QSPI_CORE_CLK>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; + + }; + }; +... diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 1e0ca6ccf64b..d8e5509a7081 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -52,6 +52,12 @@ properties: description: The SPI controller acts as a slave, instead of a master. +oneOf: + - required: + - "#address-cells" + - required: + - spi-slave + patternProperties: "^slave$": type: object @@ -114,7 +120,7 @@ patternProperties: - enum: [ 1, 2, 4, 8 ] - default: 1 description: - Bus width to the SPI bus used for MISO. + Bus width to the SPI bus used for read transfers. spi-rx-delay-us: description: @@ -126,7 +132,7 @@ patternProperties: - enum: [ 1, 2, 4, 8 ] - default: 1 description: - Bus width to the SPI bus used for MOSI. + Bus width to the SPI bus used for write transfers. spi-tx-delay-us: description: diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt index 162e024b95a0..30a79da9c039 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt @@ -1,12 +1,17 @@ ARM Freescale DSPI controller Required properties: -- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi", - "fsl,ls2085a-dspi" - or - "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi" - "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi" - "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi" +- compatible : must be one of: + "fsl,vf610-dspi", + "fsl,ls1021a-v1.0-dspi", + "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1028a-dspi", + "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), + "fsl,ls2085a-dspi", + "fsl,lx2160a-dspi", - reg : Offset and length of the register set for the device - interrupts : Should contain SPI controller interrupt - clocks: from common clock binding: handle to dspi clock. @@ -14,11 +19,11 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must contain a "default" entry. - spi-num-chipselects : the number of the chipselect signals. -- bus-num : the slave chip chipselect signal number. Optional property: - big-endian: If present the dspi device's registers are implemented in big endian mode. +- bus-num : the slave chip chipselect signal number. Optional SPI slave node properties: - fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/spi/spi-mtk-nor.txt index a12e3b5c495d..984ae7fd4f94 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-mtk-nor.txt @@ -1,4 +1,4 @@ -* Serial NOR flash controller for MediaTek SoCs +* Serial NOR flash controller for MediaTek ARM SoCs Required properties: - compatible: For mt8173, compatible should be "mediatek,mt8173-nor", @@ -13,6 +13,7 @@ Required properties: "mediatek,mt7629-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - reg: physical base address and length of the controller's register +- interrupts: Interrupt number used by the controller. - clocks: the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks the clocks should be named "spi" and "sf". "spi" is used for spi bus, @@ -22,20 +23,16 @@ Required properties: - #address-cells: should be <1> - #size-cells: should be <0> -The SPI flash must be a child of the nor_flash node and must have a -compatible property. Also see jedec,spi-nor.txt. - -Required properties: -- compatible: May include a device-specific string consisting of the manufacturer - and name of the chip. Must also include "jedec,spi-nor" for any - SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F). -- reg : Chip-Select number +There should be only one spi slave device following generic spi bindings. +It's not recommended to use this controller for devices other than SPI NOR +flash due to limited transfer capability of this controller. Example: nor_flash: spi@1100d000 { compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; + interrupts = <&spi_flash_irq>; clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; clock-names = "spi", "sf"; diff --git a/Documentation/devicetree/bindings/spi/spi-mux.yaml b/Documentation/devicetree/bindings/spi/spi-mux.yaml new file mode 100644 index 000000000000..0ae692dc28b5 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-mux.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic SPI Multiplexer + +description: | + This binding describes a SPI bus multiplexer to route the SPI chip select + signals. This can be used when you need more devices than the SPI controller + has chip selects available. An example setup is shown in ASCII art; the actual + setting of the multiplexer to a channel needs to be done by a specific SPI mux + driver. + + MOSI /--------------------------------+--------+--------+--------\ + MISO |/------------------------------+|-------+|-------+|-------\| + SCL ||/----------------------------+||------+||------+||------\|| + ||| ||| ||| ||| ||| + +------------+ ||| ||| ||| ||| + | SoC ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+ + | ||| | | dev | | dev | | dev | | dev | + | +--+++-+ | CS-X +------+\ +--+--+ +--+--+ +--+--+ +--+--+ + | | SPI +-|-------+ Mux |\\ CS-0 | | | | + | +------+ | +--+---+\\\-------/ CS-1 | | | + | | | \\\----------------/ CS-2 | | + | +------+ | | \\-------------------------/ CS-3 | + | | ? +-|----------/ \----------------------------------/ + | +------+ | + +------------+ + +allOf: + - $ref: "/schemas/spi/spi-controller.yaml#" + +maintainers: + - Chris Packham <chris.packham@alliedtelesis.co.nz> + +properties: + compatible: + const: spi-mux + + mux-controls: + maxItems: 1 + +required: + - compatible + - reg + - spi-max-frequency + - mux-controls + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + spi@0 { + compatible = "spi-mux"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <100000000>; + + mux-controls = <&mux>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <40000000>; + }; + + spi-device@1 { + compatible = "lineartechnology,ltc2488"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <10000000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt index 2cd67eb727d4..7ac60d9fe357 100644 --- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt @@ -2,6 +2,9 @@ Required properties: - compatible : Should be "nxp,lx2160a-fspi" + "nxp,imx8qxp-fspi" + "nxp,imx8mm-fspi" + - reg : First contains the register location and length, Second contains the memory mapping address and length - reg-names : Should contain the resource reg names: diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt b/Documentation/devicetree/bindings/spi/spi-rockchip.txt deleted file mode 100644 index a0edac12d8df..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Rockchip SPI Controller - -The Rockchip SPI controller is used to interface with various devices such as flash -and display controllers using the SPI communication interface. - -Required Properties: - -- compatible: should be one of the following. - "rockchip,rv1108-spi" for rv1108 SoCs. - "rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs. - "rockchip,rk3036-spi" for rk3036 SoCS. - "rockchip,rk3066-spi" for rk3066 SoCs. - "rockchip,rk3188-spi" for rk3188 SoCs. - "rockchip,rk3228-spi" for rk3228 SoCS. - "rockchip,rk3288-spi" for rk3288 SoCs. - "rockchip,rk3368-spi" for rk3368 SoCs. - "rockchip,rk3399-spi" for rk3399 SoCs. -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks: Must contain an entry for each entry in clock-names. -- clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for - the peripheral clock. -- #address-cells: should be 1. -- #size-cells: should be 0. - -Optional Properties: - -- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, - Documentation/devicetree/bindings/dma/dma.txt -- dma-names: DMA request names should include "tx" and "rx" if present. -- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling - Rx data (may need to be fine tuned for high capacitance lines). - No delay (0) by default. -- pinctrl-names: Names for the pin configuration(s); may be "default" or - "sleep", where the "sleep" configuration may describe the state - the pins should be in during system suspend. See also - pinctrl/pinctrl-bindings.txt. - - -Example: - - spi0: spi@ff110000 { - compatible = "rockchip,rk3066-spi"; - reg = <0xff110000 0x1000>; - dmas = <&pdma1 11>, <&pdma1 12>; - dma-names = "tx", "rx"; - rx-sample-delay-ns = <10>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - pinctrl-0 = <&spi1_pins>; - pinctrl-1 = <&spi1_sleep>; - pinctrl-names = "default", "sleep"; - }; diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml new file mode 100644 index 000000000000..81ad4b761502 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip SPI Controller + +description: + The Rockchip SPI controller is used to interface with various devices such + as flash and display controllers using the SPI communication interface. + +allOf: + - $ref: "spi-controller.yaml#" + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +# Everything else is described in the common file +properties: + compatible: + oneOf: + - const: rockchip,rk3036-spi + - const: rockchip,rk3066-spi + - const: rockchip,rk3228-spi + - const: rockchip,rv1108-spi + - items: + - enum: + - rockchip,px30-spi + - rockchip,rk3188-spi + - rockchip,rk3288-spi + - rockchip,rk3308-spi + - rockchip,rk3328-spi + - rockchip,rk3368-spi + - rockchip,rk3399-spi + - const: rockchip,rk3066-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: transfer-clock + - description: peripheral clock + + clock-names: + items: + - const: spiclk + - const: apb_pclk + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + + rx-sample-delay-ns: + default: 0 + description: + Nano seconds to delay after the SCLK edge before sampling Rx data + (may need to be fine tuned for high capacitance lines). + If not specified 0 will be used. + + pinctrl-names: + minItems: 1 + items: + - const: default + - const: sleep + description: + Names for the pin configuration(s); may be "default" or "sleep", + where the "sleep" configuration may describe the state + the pins should be in during system suspend. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/rk3188-cru-common.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi0: spi@ff110000 { + compatible = "rockchip,rk3066-spi"; + reg = <0xff110000 0x1000>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + dmas = <&pdma1 11>, <&pdma1 12>; + dma-names = "tx", "rx"; + pinctrl-0 = <&spi1_pins>; + pinctrl-1 = <&spi1_sleep>; + pinctrl-names = "default", "sleep"; + rx-sample-delay-ns = <10>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml index 222990f9923c..930188bc5e6a 100644 --- a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml @@ -43,6 +43,9 @@ properties: '#size-cells': const: 1 + ranges: + maxItems: 1 + required: - compatible - reg @@ -51,9 +54,12 @@ required: - clock-names - '#address-cells' - '#size-cells' + - ranges + +additionalProperties: false patternProperties: - "^.+-sram$": + "-sram@[0-9a-f]+$": type: object description: A region of reserved memory. @@ -61,12 +67,8 @@ patternProperties: reg: maxItems: 1 - ranges: - maxItems: 1 - required: - reg - - ranges examples: - | @@ -88,9 +90,9 @@ examples: #address-cells = <1>; #size-cells = <1>; + ranges = <0 0xfec00000 0x100000>; gmu-sram@0 { reg = <0x0 0x100000>; - ranges = <0 0 0xfec00000 0x100000>; }; }; diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml index f761681e4c0d..e43ec50bda37 100644 --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml @@ -32,6 +32,8 @@ properties: description: phandle to the ao-secure syscon $ref: '/schemas/types.yaml#/definitions/phandle' + '#thermal-sensor-cells': + const: 0 required: - compatible @@ -40,6 +42,8 @@ required: - clocks - amlogic,ao-secure +additionalProperties: false + examples: - | cpu_temp: temperature-sensor@ff634800 { diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt index f3b441100890..b0bee7e42038 100644 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/armada-thermal.txt @@ -12,7 +12,7 @@ Required properties: Note: these bindings are deprecated for AP806/CP110 and should instead follow the rules described in: -Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt - reg: Device's register space. diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt new file mode 100644 index 000000000000..3629d3c7e76a --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt @@ -0,0 +1,15 @@ +* Thermal Monitoring Unit (TMU) on Freescale i.MX8MM SoC + +Required properties: +- compatible : Must be "fsl,imx8mm-tmu" or "fsl,imx8mp-tmu". +- reg : Address range of TMU registers. +- clocks : TMU's clock source. +- #thermal-sensor-cells : Should be 0 or 1. See ./thermal.txt for a description. + +Example: +tmu: tmu@30260000 { + compatible = "fsl,imx8mm-tmu"; + reg = <0x30260000 0x10000>; + clocks = <&clk IMX8MM_CLK_TMU_ROOT>; + #thermal-sensor-cells = <0>; +}; diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index eef13b9446a8..2ddd39d96766 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -38,28 +38,39 @@ properties: - enum: - qcom,msm8996-tsens - qcom,msm8998-tsens + - qcom,sc7180-tsens - qcom,sdm845-tsens - const: qcom,tsens-v2 reg: - maxItems: 2 items: - description: TM registers - description: SROT registers + interrupts: + minItems: 1 + items: + - description: Combined interrupt if upper or lower threshold crossed + - description: Interrupt if critical threshold crossed + + interrupt-names: + minItems: 1 + items: + - const: uplow + - const: critical + nvmem-cells: minItems: 1 maxItems: 2 description: Reference to an nvmem node for the calibration data - nvmem-cells-names: + nvmem-cell-names: minItems: 1 maxItems: 2 items: - - enum: - - caldata - - calsel + - const: calib + - const: calib_sel "#qcom,sensors": allOf: @@ -90,22 +101,16 @@ allOf: then: properties: interrupts: - items: - - description: Combined interrupt if upper or lower threshold crossed + maxItems: 1 interrupt-names: - items: - - const: uplow + maxItems: 1 else: properties: interrupts: - items: - - description: Combined interrupt if upper or lower threshold crossed - - description: Interrupt if critical threshold crossed + minItems: 2 interrupt-names: - items: - - const: uplow - - const: critical + minItems: 2 required: - compatible @@ -115,6 +120,8 @@ required: - interrupt-names - "#thermal-sensor-cells" +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -125,7 +132,7 @@ examples: <0x4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; - nvmem-cell-names = "caldata", "calsel"; + nvmem-cell-names = "calib", "calib_sel"; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "uplow"; diff --git a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt index 12c740b975f7..2993fa720195 100644 --- a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt @@ -11,6 +11,7 @@ Required properties: - "renesas,r8a774b1-thermal" (RZ/G2N) - "renesas,r8a7795-thermal" (R-Car H3) - "renesas,r8a7796-thermal" (R-Car M3-W) + - "renesas,r8a77961-thermal" (R-Car M3-W+) - "renesas,r8a77965-thermal" (R-Car M3-N) - "renesas,r8a77980-thermal" (R-Car V3H) - reg : Address ranges of the thermal registers. Each sensor diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt deleted file mode 100644 index 196112d23b1e..000000000000 --- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt +++ /dev/null @@ -1,78 +0,0 @@ -* Renesas R-Car Thermal - -Required properties: -- compatible : "renesas,thermal-<soctype>", - "renesas,rcar-gen2-thermal" (with thermal-zone) or - "renesas,rcar-thermal" (without thermal-zone) as - fallback except R-Car V3M/E3/D3 and RZ/G2E. - Examples with soctypes are: - - "renesas,thermal-r8a73a4" (R-Mobile APE6) - - "renesas,thermal-r8a7743" (RZ/G1M) - - "renesas,thermal-r8a7744" (RZ/G1N) - - "renesas,thermal-r8a774c0" (RZ/G2E) - - "renesas,thermal-r8a7779" (R-Car H1) - - "renesas,thermal-r8a7790" (R-Car H2) - - "renesas,thermal-r8a7791" (R-Car M2-W) - - "renesas,thermal-r8a7792" (R-Car V2H) - - "renesas,thermal-r8a7793" (R-Car M2-N) - - "renesas,thermal-r8a77970" (R-Car V3M) - - "renesas,thermal-r8a77990" (R-Car E3) - - "renesas,thermal-r8a77995" (R-Car D3) -- reg : Address range of the thermal registers. - The 1st reg will be recognized as common register - if it has "interrupts". - -Option properties: - -- interrupts : If present should contain 3 interrupts for - R-Car V3M/E3/D3 and RZ/G2E or 1 interrupt otherwise. - -Example (non interrupt support): - -thermal@ffc48000 { - compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal"; - reg = <0xffc48000 0x38>; -}; - -Example (interrupt support): - -thermal@e61f0000 { - compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; - reg = <0xe61f0000 0x14 - 0xe61f0100 0x38 - 0xe61f0200 0x38 - 0xe61f0300 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; -}; - -Example (with thermal-zone): - -thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&thermal>; - - trips { - cpu-crit { - temperature = <115000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - }; - }; -}; - -thermal: thermal@e61f0000 { - compatible = "renesas,thermal-r8a7790", - "renesas,rcar-gen2-thermal", - "renesas,rcar-thermal"; - reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; - power-domains = <&cpg_clocks>; - #thermal-sensor-cells = <0>; -}; diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml b/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml new file mode 100644 index 000000000000..d2f4f1b063ac --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 2020 Renesas Electronics Corp. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/rcar-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car Thermal + +maintainers: + - Niklas Söderlund <niklas.soderlund@ragnatech.se> + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,thermal-r8a73a4 # R-Mobile APE6 + - renesas,thermal-r8a7779 # R-Car H1 + - const: renesas,rcar-thermal # Generic without thermal-zone + - items: + - enum: + - renesas,thermal-r8a7743 # RZ/G1M + - renesas,thermal-r8a7744 # RZ/G1N + - const: renesas,rcar-gen2-thermal # Generic thermal-zone + - items: + - enum: + - renesas,thermal-r8a7790 # R-Car H2 + - renesas,thermal-r8a7791 # R-Car M2-W + - renesas,thermal-r8a7792 # R-Car V2H + - renesas,thermal-r8a7793 # R-Car M2-N + - const: renesas,rcar-gen2-thermal # Generic thermal-zone + - const: renesas,rcar-thermal # Generic without thermal-zone + - items: + - enum: + - renesas,thermal-r8a774c0 # RZ/G2E + - renesas,thermal-r8a77970 # R-Car V3M + - renesas,thermal-r8a77990 # R-Car E3 + - renesas,thermal-r8a77995 # R-Car D3 + reg: + description: + Address ranges of the thermal registers. If more then one range is given + the first one must be the common registers followed by each sensor + according the the datasheet. + minItems: 1 + maxItems: 4 + + interrupts: + minItems: 1 + maxItems: 3 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +if: + properties: + compatible: + contains: + enum: + - renesas,thermal-r8a73a4 # R-Mobile APE6 + - renesas,thermal-r8a7779 # R-Car H1 +then: + required: + - compatible + - reg +else: + required: + - compatible + - reg + - interrupts + - clocks + - power-domains + - resets + +examples: + # Example (non interrupt support) + - | + thermal@ffc48000 { + compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal"; + reg = <0xffc48000 0x38>; + }; + + # Example (interrupt support) + - | + #include <dt-bindings/clock/r8a73a4-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + thermal@e61f0000 { + compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; + reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, + <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks R8A73A4_CLK_THERMAL>; + power-domains = <&pd_c5>; + }; + + # Example (with thermal-zone) + - | + #include <dt-bindings/clock/r8a7790-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> + + thermal: thermal@e61f0000 { + compatible = "renesas,thermal-r8a7790", + "renesas,rcar-gen2-thermal", + "renesas,rcar-thermal"; + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 522>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 522>; + #thermal-sensor-cells = <0>; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + }; + }; + }; diff --git a/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml b/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml new file mode 100644 index 000000000000..058c4cc06ba6 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/sprd-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Spreadtrum thermal sensor controller bindings + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +properties: + compatible: + const: sprd,ums512-thermal + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: enable + + nvmem-cells: + maxItems: 2 + description: + Reference to nvmem nodes for the calibration data. + + nvmem-cell-names: + items: + - const: thm_sign_cal + - const: thm_ratio_cal + + "#thermal-sensor-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^([a-z]*-)?sensor(-section)?@[0-9]+$": + type: object + description: + Represent one thermal sensor. + + properties: + reg: + description: Specify the sensor id. + maxItems: 1 + + nvmem-cells: + maxItems: 1 + description: + Reference to an nvmem node for the calibration data. + + nvmem-cell-names: + const: sen_delta_cal + + required: + - reg + - nvmem-cells + - nvmem-cell-names + +required: + - compatible + - reg + - clocks + - clock-names + - nvmem-cells + - nvmem-cell-names + - "#thermal-sensor-cells" + - "#address-cells" + - "#size-cells" + +examples: + - | + ap_thm0: thermal@32200000 { + compatible = "sprd,ums512-thermal"; + reg = <0 0x32200000 0 0x10000>; + clock-names = "enable"; + clocks = <&aonapb_gate 32>; + #thermal-sensor-cells = <1>; + nvmem-cells = <&thm0_sign>, <&thm0_ratio>; + nvmem-cell-names = "thm_sign_cal", "thm_ratio_cal"; + #address-cells = <1>; + #size-cells = <0>; + + prometheus-sensor@0 { + reg = <0>; + nvmem-cells = <&thm0_sen0>; + nvmem-cell-names = "sen_delta_cal"; + }; + + ank-sensor@1 { + reg = <1>; + nvmem-cells = <&thm0_sen1>; + nvmem-cell-names = "sen_delta_cal"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/thermal/thermal.txt b/Documentation/devicetree/bindings/thermal/thermal.txt index ca14ba959e0d..f78bec19ca35 100644 --- a/Documentation/devicetree/bindings/thermal/thermal.txt +++ b/Documentation/devicetree/bindings/thermal/thermal.txt @@ -142,11 +142,11 @@ Required properties: - trips: A sub-node which is a container of only trip point nodes Type: sub-node required to describe the thermal zone. +Optional property: - cooling-maps: A sub-node which is a container of only cooling device Type: sub-node map nodes, used to describe the relation between trips and cooling devices. -Optional property: - coefficients: An array of integers (one signed cell) containing Type: array coefficients to compose a linear relation between Elem size: one cell the sensors listed in the thermal-sensors property. diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml index 6deead07728e..fa255672e8e5 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml @@ -82,6 +82,8 @@ properties: required: - compatible +additionalProperties: false + oneOf: - required: - interrupts diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml index 102f319833d9..582bbef62b95 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml @@ -32,6 +32,8 @@ properties: '#size-cells': const: 1 + ranges: true + clock-frequency: description: The frequency of the main counter, in Hz. Should be present only where necessary to work around broken firmware which does not configure @@ -93,6 +95,8 @@ required: - '#address-cells' - '#size-cells' +additionalProperties: false + examples: - | timer@f0000000 { diff --git a/Documentation/devicetree/bindings/timer/arm,global_timer.yaml b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml index 21c24a8e28fd..4956c8f409d2 100644 --- a/Documentation/devicetree/bindings/timer/arm,global_timer.yaml +++ b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml @@ -35,6 +35,8 @@ required: - reg - clocks +additionalProperties: false + examples: - | timer@2c000600 { diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt index 195792270414..3cb2f4c98d64 100644 --- a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt +++ b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt @@ -11,6 +11,7 @@ Required properties: "moxa,moxart-timer", "faraday,fttmr010" "aspeed,ast2400-timer" "aspeed,ast2500-timer" + "aspeed,ast2600-timer" - reg : Should contain registers location and length - interrupts : Should contain the three timer interrupts usually with diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt index 0b63cebc5f45..91f704951845 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt @@ -10,6 +10,7 @@ Required properties: * ingenic,jz4740-tcu * ingenic,jz4725b-tcu * ingenic,jz4770-tcu + * ingenic,x1000-tcu followed by "simple-mfd". - reg: Should be the offset/length value corresponding to the TCU registers - clocks: List of phandle & clock specifiers for clocks external to the TCU. diff --git a/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml index 2807225db902..1a721d8af67a 100644 --- a/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml +++ b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml @@ -32,6 +32,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 273e359854dd..37bd01a62c52 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -52,6 +52,8 @@ required: - interrupts - reg +additionalProperties: false + examples: - | // In this example, the IP contains two local timers, using separate diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 978de7d37c66..4165352a590a 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -34,18 +34,6 @@ properties: - adi,adt7461 # +/-1C TDM Extended Temp Range I.C - adt7461 - # +/-1C TDM Extended Temp Range I.C - - adi,adt7473 - # +/-1C TDM Extended Temp Range I.C - - adi,adt7475 - # +/-1C TDM Extended Temp Range I.C - - adi,adt7476 - # +/-1C TDM Extended Temp Range I.C - - adi,adt7490 - # Three-Axis Digital Accelerometer - - adi,adxl345 - # Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) - - adi,adxl346 # AMS iAQ-Core VOC Sensor - ams,iaq-core # i2c serial eeprom (24cxx) @@ -350,6 +338,8 @@ properties: - ti,ads7830 # Temperature Monitoring and Fan Control - ti,amc6821 + # Temperature sensor with 2-wire interface + - ti,lm73 # Temperature sensor with integrated fan control - ti,lm96000 # I2C Touch-Screen Controller @@ -373,4 +363,6 @@ required: - compatible - reg +additionalProperties: false + ... diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml index 267fce165994..b0e5e0fe9386 100644 --- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml +++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml @@ -22,10 +22,14 @@ description: | The DWC3 Glue controls the PHY routing and power, an interrupt line is connected to the Glue to serve as OTG ID change detection. + The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in + host-only mode. + properties: compatible: enum: - amlogic,meson-g12a-usb-ctrl + - amlogic,meson-a1-usb-ctrl ranges: true @@ -84,6 +88,25 @@ required: - phys - dr_mode +allOf: + - if: + properties: + compatible: + enum: + - amlogic,meson-a1-usb-ctrl + + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: usb_ctrl + - const: usb_bus + - const: xtal_usb_ctrl + required: + - clock-names + examples: - | usb: usb@ffe09000 { diff --git a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml new file mode 100644 index 000000000000..06399ba0d9e4 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 Facebook Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/aspeed,usb-vhub.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED USB 2.0 Virtual Hub Controller + +maintainers: + - Benjamin Herrenschmidt <benh@kernel.crashing.org> + +description: |+ + The ASPEED USB 2.0 Virtual Hub Controller implements 1 set of USB Hub + register and several sets of Device and Endpoint registers to support + the Virtual Hub's downstream USB devices. + + Supported number of devices and endpoints vary depending on hardware + revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices + and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream + devices and 21 generic endpoints. + +properties: + compatible: + enum: + - aspeed,ast2400-usb-vhub + - aspeed,ast2500-usb-vhub + - aspeed,ast2600-usb-vhub + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + aspeed,vhub-downstream-ports: + description: Number of downstream ports supported by the Virtual Hub + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 5 + minimum: 1 + maximum: 7 + + aspeed,vhub-generic-endpoints: + description: Number of generic endpoints supported by the Virtual Hub + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 15 + minimum: 1 + maximum: 21 + +required: + - compatible + - reg + - clocks + - interrupts + - aspeed,vhub-downstream-ports + - aspeed,vhub-generic-endpoints + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + vhub: usb-vhub@1e6a0000 { + compatible = "aspeed,ast2500-usb-vhub"; + reg = <0x1e6a0000 0x300>; + interrupts = <5>; + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + aspeed,vhub-downstream-ports = <5>; + aspeed,vhub-generic-endpoints = <15>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ad_default>; + }; diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 71cf7ba32237..0d6d850a7f17 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -18,46 +18,33 @@ properties: - const: rockchip,rk3066-usb - const: snps,dwc2 - items: - - const: rockchip,px30-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3036-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rv1108-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3188-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3228-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3288-usb + - enum: + - rockchip,px30-usb + - rockchip,rk3036-usb + - rockchip,rk3188-usb + - rockchip,rk3228-usb + - rockchip,rk3288-usb + - rockchip,rk3328-usb + - rockchip,rk3368-usb + - rockchip,rv1108-usb - const: rockchip,rk3066-usb - const: snps,dwc2 - const: lantiq,arx100-usb - const: lantiq,xrx200-usb - items: - - const: amlogic,meson8-usb - - const: snps,dwc2 - - items: - - const: amlogic,meson8b-usb - - const: snps,dwc2 - - const: amlogic,meson-gxbb-usb - - items: - - const: amlogic,meson-g12a-usb + - enum: + - amlogic,meson8-usb + - amlogic,meson8b-usb + - amlogic,meson-gxbb-usb + - amlogic,meson-g12a-usb - const: snps,dwc2 - const: amcc,dwc-otg - const: snps,dwc2 - const: st,stm32f4x9-fsotg - const: st,stm32f4x9-hsotg - const: st,stm32f7-hsotg + - const: st,stm32mp15-fsotg + - const: st,stm32mp15-hsotg - const: samsung,s3c6400-hsotg reg: @@ -103,6 +90,10 @@ properties: vusb_a-supply: description: phandle to voltage regulator of analog section. + vusb33d-supply: + description: reference to the VBUS and ID sensing comparators supply, in + order to perform OTG operation, used on STM32MP15 SoCs. + dr_mode: enum: [host, peripheral, otg] diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 66780a47ad85..9946ff9ba735 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -7,7 +7,8 @@ Required properties: - compatible: must be "snps,dwc3" - reg : Address and length of the register set for the device - interrupts: Interrupts used by the dwc3 controller. - - clock-names: should contain "ref", "bus_early", "suspend" + - clock-names: list of clock names. Ideally should be "ref", + "bus_early", "suspend" but may be less or more. - clocks: list of phandle and clock specifier pairs corresponding to entries in the clock-names property. @@ -36,7 +37,7 @@ Optional properties: - phys: from the *Generic PHY* bindings - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy" or "usb3-phy". - - resets: a single pair of phandle and reset specifier + - resets: set of phandle and reset specifier pairs - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command @@ -75,6 +76,8 @@ Optional properties: from P0 to P1/P2/P3 without delay. - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check during HS transmit. + - snps,parkmode-disable-ss-quirk: when set, all SuperSpeed bus instances in + park mode are disabled. - snps,dis_metastability_quirk: when set, disable metastability workaround. CAUTION: use only if you are absolutely sure of it. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt index 66c394f9e11f..6aae1544f240 100644 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt @@ -78,7 +78,14 @@ Required properties: - ranges: allows valid 1:1 translation between child's address space and parent's address space - clocks: Clock IDs array as required by the controller. - - clock-names: names of clocks correseponding to IDs in the clock property + - clock-names: Names of clocks corresponding to IDs in the clock property. + Following clock names shall be provided for different + compatibles: + - samsung,exynos5250-dwusb3: "usbdrd30", + - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk", + "phyclk", + - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk", + "usbdrd30_axius_clk" - vdd10-supply: 1.0V powr supply - vdd33-supply: 3.0V/3.3V power supply diff --git a/Documentation/devicetree/bindings/usb/fcs,fusb302.txt b/Documentation/devicetree/bindings/usb/fcs,fusb302.txt index ba2e32d500c0..60e4654297af 100644 --- a/Documentation/devicetree/bindings/usb/fcs,fusb302.txt +++ b/Documentation/devicetree/bindings/usb/fcs,fusb302.txt @@ -9,7 +9,7 @@ Required sub-node: - connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings of the connector node are specified in: - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt index e6790d2a4da9..ba472e7aefc9 100644 --- a/Documentation/devicetree/bindings/usb/generic.txt +++ b/Documentation/devicetree/bindings/usb/generic.txt @@ -34,7 +34,13 @@ Optional properties: - usb-role-switch: boolean, indicates that the device is capable of assigning the USB data role (USB host or USB device) for a given USB connector, such as Type-C, Type-B(micro). - see connector/usb-connector.txt. + see connector/usb-connector.yaml. + - role-switch-default-mode: indicating if usb-role-switch is enabled, the + device default operation mode of controller while usb + role is USB_ROLE_NONE. Valid arguments are "host" and + "peripheral". Defaults to "peripheral" if not + specified. + This is an attribute to a USB controller such as: diff --git a/Documentation/devicetree/bindings/usb/ingenic,jz4740-musb.txt b/Documentation/devicetree/bindings/usb/ingenic,jz4740-musb.txt deleted file mode 100644 index 16808721f3ff..000000000000 --- a/Documentation/devicetree/bindings/usb/ingenic,jz4740-musb.txt +++ /dev/null @@ -1,32 +0,0 @@ -Ingenic JZ4740 MUSB driver - -Required properties: - -- compatible: Must be "ingenic,jz4740-musb" -- reg: Address range of the UDC register set -- interrupts: IRQ number related to the UDC hardware -- interrupt-names: must be "mc" -- clocks: phandle to the "udc" clock -- clock-names: must be "udc" -- phys: phandle to the USB PHY - -Example: - -usb_phy: usb-phy@0 { - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; -}; - -udc: usb@13040000 { - compatible = "ingenic,jz4740-musb"; - reg = <0x13040000 0x10000>; - - interrupt-parent = <&intc>; - interrupts = <24>; - interrupt-names = "mc"; - - clocks = <&cgu JZ4740_CLK_UDC>; - clock-names = "udc"; - - phys = <&usb_phy>; -}; diff --git a/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml b/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml new file mode 100644 index 000000000000..a81b0b1a2226 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ingenic,jz4770-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ4770 USB PHY devicetree bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: '^usb-phy@.*' + + compatible: + enum: + - ingenic,jz4770-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + vcc-supply: + description: VCC power supply + + '#phy-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - vcc-supply + - '#phy-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/jz4770-cgu.h> + otg_phy: usb-phy@3c { + compatible = "ingenic,jz4770-phy"; + reg = <0x3c 0x10>; + + vcc-supply = <&vcc>; + clocks = <&cgu JZ4770_CLK_OTG_PHY>; + + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/usb/ingenic,musb.yaml b/Documentation/devicetree/bindings/usb/ingenic,musb.yaml new file mode 100644 index 000000000000..1d6877875077 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ingenic,musb.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ingenic,musb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ47xx USB IP DT bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: '^usb@.*' + + compatible: + oneOf: + - enum: + - ingenic,jz4770-musb + - ingenic,jz4740-musb + - items: + - const: ingenic,jz4725b-musb + - const: ingenic,jz4740-musb + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: udc + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: mc + + phys: + description: PHY specifier for the USB PHY + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phys + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/jz4740-cgu.h> + usb_phy: usb-phy@0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + udc: usb@13040000 { + compatible = "ingenic,jz4740-musb"; + reg = <0x13040000 0x10000>; + + interrupt-parent = <&intc>; + interrupts = <24>; + interrupt-names = "mc"; + + clocks = <&cgu JZ4740_CLK_UDC>; + clock-names = "udc"; + + phys = <&usb_phy>; + }; diff --git a/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml b/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml new file mode 100644 index 000000000000..4241d38d5864 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/maxim,max3420-udc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAXIM MAX3420/1 USB Peripheral Controller + +maintainers: + - Jassi Brar <jaswinder.singh@linaro.org> + +description: | + The controller provices USB2.0 compliant FullSpeed peripheral + implementation over the SPI interface. + + Specifications about the part can be found at: + http://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf + +properties: + compatible: + enum: + - maxim,max3420-udc + - maxim,max3421-udc + + reg: + maxItems: 1 + + interrupts: + items: + - description: usb irq from max3420 + - description: vbus detection irq + minItems: 1 + maxItems: 2 + + interrupt-names: + items: + - const: udc + - const: vbus + minItems: 1 + maxItems: 2 + + spi-max-frequency: + maximum: 26000000 + +required: + - compatible + - reg + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + udc@0 { + compatible = "maxim,max3420-udc"; + reg = <0>; + interrupt-parent = <&gpio>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "udc", "vbus"; + spi-max-frequency = <12500000>; + }; + }; diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt index e0ae6096f7ac..a82ca438aec1 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt @@ -34,7 +34,7 @@ Optional properties: dual-role mode. it's considered valid for compatibility reasons, not allowed for new bindings, and put into a usb-connector node. - see connector/usb-connector.txt. + see connector/usb-connector.yaml. - pinctrl-names : a pinctrl state named "default" is optional, and need be defined if auto drd switch is enabled, that means the property dr_mode is set as "otg", and meanwhile the property "mediatek,enable-manual-drd" diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.txt b/Documentation/devicetree/bindings/usb/mediatek,musb.txt index 2b8a87c90d9e..5eedb0296562 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,musb.txt +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.txt @@ -23,7 +23,7 @@ Optional properties: MTCMOS Required child nodes: - usb connector node as defined in bindings/connector/usb-connector.txt + usb connector node as defined in bindings/connector/usb-connector.yaml Optional properties: - id-gpios : input GPIO for USB ID pin. - vbus-gpios : input GPIO for USB VBUS pin. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml new file mode 100644 index 000000000000..b84ed8ee8cfc --- /dev/null +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC) + +description: + The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and + USB 3.0 SuperSpeed protocols. + +maintainers: + - Nagarjuna Kristam <nkristam@nvidia.com> + - JC Kuo <jckuo@nvidia.com> + - Thierry Reding <treding@nvidia.com> + +properties: + compatible: + items: + - enum: + - nvidia,tegra210-xudc # For Tegra210 + - nvidia,tegra186-xudc # For Tegra186 + + reg: + minItems: 2 + maxItems: 3 + items: + - description: XUSB device controller registers + - description: XUSB device PCI Config registers + - description: XUSB device registers. + + reg-names: + minItems: 2 + maxItems: 3 + items: + - const: base + - const: fpci + - const: ipfs + + interrupts: + maxItems: 1 + description: Must contain the XUSB device interrupt. + + clocks: + minItems: 4 + maxItems: 5 + items: + - description: Clock to enable core XUSB dev clock. + - description: Clock to enable XUSB super speed clock. + - description: Clock to enable XUSB super speed dev clock. + - description: Clock to enable XUSB high speed dev clock. + - description: Clock to enable XUSB full speed dev clock. + + clock-names: + minItems: 4 + maxItems: 5 + items: + - const: dev + - const: ss + - const: ss_src + - const: fs_src + - const: hs_src + + power-domains: + maxItems: 2 + items: + - description: XUSBB(device) power-domain + - description: XUSBA(superspeed) power-domain + + power-domain-names: + maxItems: 2 + items: + - const: dev + - const: ss + + nvidia,xusb-padctl: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + phandle to the XUSB pad controller that is used to configure the USB pads + used by the XUDC controller. + + phys: + minItems: 1 + description: + Must contain an entry for each entry in phy-names. + See ../phy/phy-bindings.txt for details. + + phy-names: + minItems: 1 + items: + - const: usb2-0 + - const: usb2-1 + - const: usb2-2 + - const: usb2-3 + - const: usb3-0 + - const: usb3-1 + - const: usb3-2 + - const: usb3-3 + + avddio-usb-supply: + description: PCIe/USB3 analog logic power supply. Must supply 1.05 V. + + hvdd-usb-supply: + description: USB controller power supply. Must supply 3.3 V. + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - power-domains + - power-domain-names + - nvidia,xusb-padctl + - phys + - phy-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra210-xudc + then: + properties: + reg: + minItems: 3 + reg-names: + minItems: 3 + clocks: + minItems: 5 + clock-names: + minItems: 5 + required: + - avddio-usb-supply + - hvdd-usb-supply + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra186-xudc + then: + properties: + reg: + maxItems: 2 + reg-names: + maxItems: 2 + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + +examples: + - | + #include <dt-bindings/clock/tegra210-car.h> + #include <dt-bindings/gpio/tegra-gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + usb@700d0000 { + compatible = "nvidia,tegra210-xudc"; + reg = <0x0 0x700d0000 0x0 0x8000>, + <0x0 0x700d8000 0x0 0x1000>, + <0x0 0x700d9000 0x0 0x1000>; + reg-names = "base", "fpci", "ipfs"; + + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>; + clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src"; + + power-domains = <&pd_xusbdev>, <&pd_xusbss>; + power-domain-names = "dev", "ss"; + + nvidia,xusb-padctl = <&padctl>; + + phys = <µ_b>; + phy-names = "usb2-0"; + + avddio-usb-supply = <&vdd_pex_1v05>; + hvdd-usb-supply = <&vdd_3v3_sys>; + }; diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1711h.txt b/Documentation/devicetree/bindings/usb/richtek,rt1711h.txt index e3fc57e605ed..6f8115db2ea9 100644 --- a/Documentation/devicetree/bindings/usb/richtek,rt1711h.txt +++ b/Documentation/devicetree/bindings/usb/richtek,rt1711h.txt @@ -9,7 +9,7 @@ Required properties: Required sub-node: - connector: The "usb-c-connector" attached to the tcpci chip, the bindings of connector node are specified in - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example : rt1711h@4e { diff --git a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt index 25780e945b15..2bd21b22ce95 100644 --- a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt +++ b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt @@ -9,7 +9,7 @@ Required sub-node: - connector: The "usb-c-connector" attached to the hd3ss3220 chip. The bindings of the connector node are specified in: - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: hd3ss3220@47 { diff --git a/Documentation/devicetree/bindings/usb/typec-tcpci.txt b/Documentation/devicetree/bindings/usb/typec-tcpci.txt index 0dd1469e7318..2082522b1c32 100644 --- a/Documentation/devicetree/bindings/usb/typec-tcpci.txt +++ b/Documentation/devicetree/bindings/usb/typec-tcpci.txt @@ -13,7 +13,7 @@ Required properties: Required sub-node: - connector: The "usb-c-connector" attached to the tcpci chip, the bindings of connector node are specified in - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: diff --git a/Documentation/devicetree/bindings/usb/usb-conn-gpio.txt b/Documentation/devicetree/bindings/usb/usb-conn-gpio.txt index 3d05ae56cb0d..ec80641208a5 100644 --- a/Documentation/devicetree/bindings/usb/usb-conn-gpio.txt +++ b/Documentation/devicetree/bindings/usb/usb-conn-gpio.txt @@ -8,11 +8,11 @@ Required properties: - compatible : should include "gpio-usb-b-connector" and "usb-b-connector". - id-gpios, vbus-gpios : input gpios, either one of them must be present, and both can be present as well. - see connector/usb-connector.txt + see connector/usb-connector.yaml Optional properties: - vbus-supply : can be present if needed when supports dual role mode. - see connector/usb-connector.txt + see connector/usb-connector.yaml - Sub-nodes: - port : can be present. diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index a2da166df1bc..d3891386d671 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -141,6 +141,8 @@ patternProperties: description: Shenzhen AZW Technology Co., Ltd. "^bananapi,.*": description: BIPAI KEJI LIMITED + "^beacon,.*": + description: Compass Electronics Group, LLC "^bhf,.*": description: Beckhoff Automation GmbH & Co. KG "^bitmain,.*": @@ -205,6 +207,8 @@ patternProperties: description: Colorful GRP, Shenzhen Xueyushi Technology Ltd. "^compulab,.*": description: CompuLab Ltd. + "^coreriver,.*": + description: CORERIVER Semiconductor Co.,Ltd. "^corpro,.*": description: Chengdu Corpro Technology Co., Ltd. "^cortina,.*": @@ -233,6 +237,8 @@ patternProperties: description: DataImage, Inc. "^davicom,.*": description: DAVICOM Semiconductor, Inc. + "^dell,.*": + description: Dell Inc. "^delta,.*": description: Delta Electronics, Inc. "^denx,.*": @@ -267,6 +273,8 @@ patternProperties: description: Dragino Technology Co., Limited "^dserve,.*": description: dServe Technology B.V. + "^dynaimage,.*": + description: Dyna-Image "^ea,.*": description: Embedded Artists AB "^ebs-systart,.*": @@ -285,6 +293,8 @@ patternProperties: description: Elan Microelectronic Corp. "^elgin,.*": description: Elgin S/A. + "^elida,.*": + description: Shenzhen Elida Technology Co., Ltd. "^embest,.*": description: Shenzhen Embest Technology Co., Ltd. "^emlid,.*": @@ -297,6 +307,8 @@ patternProperties: description: emtrion GmbH "^endless,.*": description: Endless Mobile, Inc. + "^ene,.*": + description: ENE Technology, Inc. "^energymicro,.*": description: Silicon Laboratories (formerly Energy Micro AS) "^engicam,.*": @@ -475,6 +487,8 @@ patternProperties: description: Intersil "^issi,.*": description: Integrated Silicon Solutions Inc. + "^ite,.*": + description: ITE Tech, Inc. "^itead,.*": description: ITEAD Intelligent Systems Co.Ltd "^iwave,.*": @@ -551,6 +565,8 @@ patternProperties: description: LinkSprite Technologies, Inc. "^linksys,.*": description: Belkin International, Inc. (Linksys) + "^linutronix,.*": + description: Linutronix GmbH "^linux,.*": description: Linux-specific binding "^linx,.*": @@ -637,6 +653,9 @@ patternProperties: description: Monolithic Power Systems Inc. "^mqmaker,.*": description: mqmaker Inc. + "^mrvl,.*": + description: Marvell Technology Group Ltd. + deprecated: true "^mscc,.*": description: Microsemi Corporation "^msi,.*": @@ -737,6 +756,8 @@ patternProperties: description: OmniVision Technologies "^oxsemi,.*": description: Oxford Semiconductor, Ltd. + "^ozzmaker,.*": + description: OzzMaker "^panasonic,.*": description: Panasonic Corporation "^parade,.*": @@ -771,6 +792,8 @@ patternProperties: description: Broadcom Corporation (formerly PLX Technology) "^pni,.*": description: PNI Sensor Corporation + "^pocketbook,.*": + description: PocketBook International SA "^polaroid,.*": description: Polaroid Corporation "^portwell,.*": @@ -869,6 +892,8 @@ patternProperties: description: Small Form Factor Committee "^sgd,.*": description: Solomon Goldentek Display Corporation + "^sgmicro,.*": + description: SG Micro Corp "^sgx,.*": description: SGX Sensortech "^sharp,.*": @@ -992,6 +1017,8 @@ patternProperties: "^toppoly,.*": description: TPO (deprecated, use tpo) deprecated: true + "^topwise,.*": + description: Topwise Communication Co., Ltd. "^toradex,.*": description: Toradex AG "^toshiba,.*": @@ -1062,6 +1089,8 @@ patternProperties: description: Vision Optical Technology Co., Ltd. "^vxt,.*": description: VXT Ltd + "^waveshare,.*": + description: Waveshare Electronics "^wd,.*": description: Western Digital Corp. "^wetek,.*": @@ -1088,6 +1117,8 @@ patternProperties: description: X-Powers "^xes,.*": description: Extreme Engineering Solutions (X-ES) + "^xiaomi,.*": + description: Xiaomi Technology Co., Ltd. "^xillybus,.*": description: Xillybus Ltd. "^xinpeng,.*": diff --git a/Documentation/devicetree/bindings/watchdog/st,stpmic1-wdt.txt b/Documentation/devicetree/bindings/watchdog/st,stpmic1-wdt.txt deleted file mode 100644 index 7cc1407f15cb..000000000000 --- a/Documentation/devicetree/bindings/watchdog/st,stpmic1-wdt.txt +++ /dev/null @@ -1,11 +0,0 @@ -STMicroelectronics STPMIC1 Watchdog - -Required properties: - -- compatible : should be "st,stpmic1-wdt" - -Example: - -watchdog { - compatible = "st,stpmic1-wdt"; -}; diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml new file mode 100644 index 000000000000..e83026fef2e9 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 SoC Watchdog Timer + +maintainers: + - Tero Kristo <t-kristo@ti.com> + +description: + The TI K3 SoC watchdog timer is implemented via the RTI (Real Time + Interrupt) IP module. This timer adds a support for windowed watchdog + mode, which will signal an error if it is pinged outside the watchdog + time window, meaning either too early or too late. The error signal + generated can be routed to either interrupt a safety controller or + to directly reset the SoC. + +allOf: + - $ref: "watchdog.yaml#" + +properties: + compatible: + enum: + - ti,j7-rti-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + assigned-clocks: + maxItems: 1 + + assigned-clocks-parents: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - power-domains + +examples: + - | + /* + * RTI WDT in main domain on J721e SoC. Assigned clocks are used to + * select the source clock for the watchdog, forcing it to tick with + * a 32kHz clock in this case. + */ + #include <dt-bindings/soc/ti,sci_pm_domain.h> + + watchdog0: rti@2200000 { + compatible = "ti,rti-wdt"; + reg = <0x0 0x2200000 0x0 0x100>; + clocks = <&k3_clks 252 1>; + power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 252 1>; + assigned-clock-parents = <&k3_clks 252 5>; + }; diff --git a/Documentation/devicetree/writing-schema.rst b/Documentation/devicetree/writing-schema.rst index 7635ab230456..220cf464ed77 100644 --- a/Documentation/devicetree/writing-schema.rst +++ b/Documentation/devicetree/writing-schema.rst @@ -147,6 +147,10 @@ Note that ``dtbs_check`` will skip any binding schema files with errors. It is necessary to use ``dt_binding_check`` to get all the validation errors in the binding schema files. +It is possible to run both in a single command:: + + make dt_binding_check dtbs_check + It is also possible to run checks with a single schema file by setting the ``DT_SCHEMA_FILES`` variable to a specific schema file. diff --git a/Documentation/driver-api/80211/mac80211-advanced.rst b/Documentation/driver-api/80211/mac80211-advanced.rst index 9f1c5bb7ac35..24cb64b3b715 100644 --- a/Documentation/driver-api/80211/mac80211-advanced.rst +++ b/Documentation/driver-api/80211/mac80211-advanced.rst @@ -272,8 +272,8 @@ STA information lifetime rules .. kernel-doc:: net/mac80211/sta_info.c :doc: STA information lifetime rules -Aggregation -=========== +Aggregation Functions +===================== .. kernel-doc:: net/mac80211/sta_info.h :functions: sta_ampdu_mlme @@ -284,8 +284,8 @@ Aggregation .. kernel-doc:: net/mac80211/sta_info.h :functions: tid_ampdu_rx -Synchronisation -=============== +Synchronisation Functions +========================= TBD diff --git a/Documentation/driver-api/dmaengine/index.rst b/Documentation/driver-api/dmaengine/index.rst index b9df904d0a79..bdc45d8b4cfb 100644 --- a/Documentation/driver-api/dmaengine/index.rst +++ b/Documentation/driver-api/dmaengine/index.rst @@ -5,8 +5,8 @@ DMAEngine documentation DMAEngine documentation provides documents for various aspects of DMAEngine framework. -DMAEngine documentation ------------------------ +DMAEngine development documentation +----------------------------------- This book helps with DMAengine internal APIs and guide for DMAEngine device driver writers. diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 790a15089f1f..56e5833e8a07 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -266,11 +266,15 @@ to use. attached (via the dmaengine_desc_attach_metadata() helper to the descriptor. From the DMA driver the following is expected for this mode: + - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM + The data from the provided metadata buffer should be prepared for the DMA controller to be sent alongside of the payload data. Either by copying to a hardware descriptor, or highly coupled packet. + - DMA_DEV_TO_MEM + On transfer completion the DMA driver must copy the metadata to the client provided metadata buffer before notifying the client about the completion. After the transfer completion, DMA drivers must not touch the metadata @@ -284,10 +288,14 @@ to use. and dmaengine_desc_set_metadata_len() is provided as helper functions. From the DMA driver the following is expected for this mode: - - get_metadata_ptr + + - get_metadata_ptr() + Should return a pointer for the metadata buffer, the maximum size of the metadata buffer and the currently used / valid (if any) bytes in the buffer. - - set_metadata_len + + - set_metadata_len() + It is called by the clients after it have placed the metadata to the buffer to let the DMA driver know the number of valid bytes provided. diff --git a/Documentation/driver-api/driver-model/driver.rst b/Documentation/driver-api/driver-model/driver.rst index baa6a85c8287..63887b813005 100644 --- a/Documentation/driver-api/driver-model/driver.rst +++ b/Documentation/driver-api/driver-model/driver.rst @@ -210,7 +210,7 @@ probed. While the typical use case for sync_state() is to have the kernel cleanly take over management of devices from the bootloader, the usage of sync_state() is not restricted to that. Use it whenever it makes sense to take an action after -all the consumers of a device have probed. +all the consumers of a device have probed:: int (*remove) (struct device *dev); diff --git a/Documentation/driver-api/firmware/efi/index.rst b/Documentation/driver-api/firmware/efi/index.rst new file mode 100644 index 000000000000..4fe8abba9fc6 --- /dev/null +++ b/Documentation/driver-api/firmware/efi/index.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============ +UEFI Support +============ + +UEFI stub library functions +=========================== + +.. kernel-doc:: drivers/firmware/efi/libstub/mem.c + :internal: diff --git a/Documentation/driver-api/firmware/fallback-mechanisms.rst b/Documentation/driver-api/firmware/fallback-mechanisms.rst index 8b041d0ab426..036383dad6d6 100644 --- a/Documentation/driver-api/firmware/fallback-mechanisms.rst +++ b/Documentation/driver-api/firmware/fallback-mechanisms.rst @@ -202,3 +202,106 @@ the following file: If you echo 0 into it means MAX_JIFFY_OFFSET will be used. The data type for the timeout is an int. + +EFI embedded firmware fallback mechanism +======================================== + +On some devices the system's EFI code / ROM may contain an embedded copy +of firmware for some of the system's integrated peripheral devices and +the peripheral's Linux device-driver needs to access this firmware. + +Device drivers which need such firmware can use the +firmware_request_platform() function for this, note that this is a +separate fallback mechanism from the other fallback mechanisms and +this does not use the sysfs interface. + +A device driver which needs this can describe the firmware it needs +using an efi_embedded_fw_desc struct: + +.. kernel-doc:: include/linux/efi_embedded_fw.h + :functions: efi_embedded_fw_desc + +The EFI embedded-fw code works by scanning all EFI_BOOT_SERVICES_CODE memory +segments for an eight byte sequence matching prefix; if the prefix is found it +then does a sha256 over length bytes and if that matches makes a copy of length +bytes and adds that to its list with found firmwares. + +To avoid doing this somewhat expensive scan on all systems, dmi matching is +used. Drivers are expected to export a dmi_system_id array, with each entries' +driver_data pointing to an efi_embedded_fw_desc. + +To register this array with the efi-embedded-fw code, a driver needs to: + +1. Always be builtin to the kernel or store the dmi_system_id array in a + separate object file which always gets builtin. + +2. Add an extern declaration for the dmi_system_id array to + include/linux/efi_embedded_fw.h. + +3. Add the dmi_system_id array to the embedded_fw_table in + drivers/firmware/efi/embedded-firmware.c wrapped in a #ifdef testing that + the driver is being builtin. + +4. Add "select EFI_EMBEDDED_FIRMWARE if EFI_STUB" to its Kconfig entry. + +The firmware_request_platform() function will always first try to load firmware +with the specified name directly from the disk, so the EFI embedded-fw can +always be overridden by placing a file under /lib/firmware. + +Note that: + +1. The code scanning for EFI embedded-firmware runs near the end + of start_kernel(), just before calling rest_init(). For normal drivers and + subsystems using subsys_initcall() to register themselves this does not + matter. This means that code running earlier cannot use EFI + embedded-firmware. + +2. At the moment the EFI embedded-fw code assumes that firmwares always start at + an offset which is a multiple of 8 bytes, if this is not true for your case + send in a patch to fix this. + +3. At the moment the EFI embedded-fw code only works on x86 because other archs + free EFI_BOOT_SERVICES_CODE before the EFI embedded-fw code gets a chance to + scan it. + +4. The current brute-force scanning of EFI_BOOT_SERVICES_CODE is an ad-hoc + brute-force solution. There has been discussion to use the UEFI Platform + Initialization (PI) spec's Firmware Volume protocol. This has been rejected + because the FV Protocol relies on *internal* interfaces of the PI spec, and: + 1. The PI spec does not define peripheral firmware at all + 2. The internal interfaces of the PI spec do not guarantee any backward + compatibility. Any implementation details in FV may be subject to change, + and may vary system to system. Supporting the FV Protocol would be + difficult as it is purposely ambiguous. + +Example how to check for and extract embedded firmware +------------------------------------------------------ + +To check for, for example Silead touchscreen controller embedded firmware, +do the following: + +1. Boot the system with efi=debug on the kernel commandline + +2. cp /sys/kernel/debug/efi/boot_services_code? to your home dir + +3. Open the boot_services_code? files in a hex-editor, search for the + magic prefix for Silead firmware: F0 00 00 00 02 00 00 00, this gives you + the beginning address of the firmware inside the boot_services_code? file. + +4. The firmware has a specific pattern, it starts with a 8 byte page-address, + typically F0 00 00 00 02 00 00 00 for the first page followed by 32-bit + word-address + 32-bit value pairs. With the word-address incrementing 4 + bytes (1 word) for each pair until a page is complete. A complete page is + followed by a new page-address, followed by more word + value pairs. This + leads to a very distinct pattern. Scroll down until this pattern stops, + this gives you the end of the firmware inside the boot_services_code? file. + +5. "dd if=boot_services_code? of=firmware bs=1 skip=<begin-addr> count=<len>" + will extract the firmware for you. Inspect the firmware file in a + hexeditor to make sure you got the dd parameters correct. + +6. Copy it to /lib/firmware under the expected name to test it. + +7. If the extracted firmware works, you can use the found info to fill an + efi_embedded_fw_desc struct to describe it, run "sha256sum firmware" + to get the sha256sum to put in the sha256 field. diff --git a/Documentation/driver-api/firmware/index.rst b/Documentation/driver-api/firmware/index.rst index 29da39ec4b8a..57415d657173 100644 --- a/Documentation/driver-api/firmware/index.rst +++ b/Documentation/driver-api/firmware/index.rst @@ -6,6 +6,7 @@ Linux Firmware API introduction core + efi/index request_firmware other_interfaces diff --git a/Documentation/driver-api/firmware/lookup-order.rst b/Documentation/driver-api/firmware/lookup-order.rst index 88c81739683c..6064672a782e 100644 --- a/Documentation/driver-api/firmware/lookup-order.rst +++ b/Documentation/driver-api/firmware/lookup-order.rst @@ -12,6 +12,8 @@ a driver issues a firmware API call. return it immediately * The ''Direct filesystem lookup'' is performed next, if found we return it immediately +* The ''Platform firmware fallback'' is performed next, but only when + firmware_request_platform() is used, if found we return it immediately * If no firmware has been found and the fallback mechanism was enabled the sysfs interface is created. After this either a kobject uevent is issued or the custom firmware loading is relied upon for firmware diff --git a/Documentation/driver-api/firmware/request_firmware.rst b/Documentation/driver-api/firmware/request_firmware.rst index f62bdcbfed5b..cd076462d235 100644 --- a/Documentation/driver-api/firmware/request_firmware.rst +++ b/Documentation/driver-api/firmware/request_firmware.rst @@ -25,6 +25,11 @@ firmware_request_nowarn .. kernel-doc:: drivers/base/firmware_loader/main.c :functions: firmware_request_nowarn +firmware_request_platform +------------------------- +.. kernel-doc:: drivers/base/firmware_loader/main.c + :functions: firmware_request_platform + request_firmware_direct ----------------------- .. kernel-doc:: drivers/base/firmware_loader/main.c diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index 871922529332..9809f593c0ab 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -416,7 +416,7 @@ The preferred way to set up the helpers is to fill in the struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip. If you do this, the additional irq_chip will be set up by gpiolib at the same time as setting up the rest of the GPIO functionality. The following -is a typical example of a cascaded interrupt handler using gpio_irq_chip:: +is a typical example of a cascaded interrupt handler using gpio_irq_chip: .. code-block:: c @@ -453,7 +453,7 @@ is a typical example of a cascaded interrupt handler using gpio_irq_chip:: return devm_gpiochip_add_data(dev, &g->gc, g); The helper support using hierarchical interrupt controllers as well. -In this case the typical set-up will look like this:: +In this case the typical set-up will look like this: .. code-block:: c diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index 0ebe205efd0c..d4e78cb3ef4d 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -17,6 +17,7 @@ available subsections can be seen below. driver-model/index basics infrastructure + ioctl early-userspace/index pm/index clk @@ -74,11 +75,12 @@ available subsections can be seen below. connector console dcdbas - edid eisa ipmb isa isapnp + io-mapping + io_ordering generic-counter lightnvm-pblk memory-devices/index diff --git a/Documentation/io-mapping.txt b/Documentation/driver-api/io-mapping.rst index a966239f04e4..a966239f04e4 100644 --- a/Documentation/io-mapping.txt +++ b/Documentation/driver-api/io-mapping.rst diff --git a/Documentation/io_ordering.txt b/Documentation/driver-api/io_ordering.rst index 2ab303ce9a0d..2ab303ce9a0d 100644 --- a/Documentation/io_ordering.txt +++ b/Documentation/driver-api/io_ordering.rst diff --git a/Documentation/core-api/ioctl.rst b/Documentation/driver-api/ioctl.rst index c455db0e1627..c455db0e1627 100644 --- a/Documentation/core-api/ioctl.rst +++ b/Documentation/driver-api/ioctl.rst diff --git a/Documentation/driver-api/libata.rst b/Documentation/driver-api/libata.rst index 207f0d24de69..e2f87b82b074 100644 --- a/Documentation/driver-api/libata.rst +++ b/Documentation/driver-api/libata.rst @@ -401,7 +401,7 @@ Error handling ============== This chapter describes how errors are handled under libata. Readers are -advised to read SCSI EH (Documentation/scsi/scsi_eh.txt) and ATA +advised to read SCSI EH (Documentation/scsi/scsi_eh.rst) and ATA exceptions doc first. Origins of commands diff --git a/Documentation/driver-api/soundwire/stream.rst b/Documentation/driver-api/soundwire/stream.rst index 5351bd2f34a8..8bceece51554 100644 --- a/Documentation/driver-api/soundwire/stream.rst +++ b/Documentation/driver-api/soundwire/stream.rst @@ -156,22 +156,27 @@ Below shows the SoundWire stream states and state transition diagram. :: +-----------+ +------------+ +----------+ +----------+ | ALLOCATED +---->| CONFIGURED +---->| PREPARED +---->| ENABLED | | STATE | | STATE | | STATE | | STATE | - +-----------+ +------------+ +----------+ +----+-----+ - ^ - | - | - v - +----------+ +------------+ +----+-----+ + +-----------+ +------------+ +---+--+---+ +----+-----+ + ^ ^ ^ + | | | + __| |___________ | + | | | + v | v + +----------+ +-----+------+ +-+--+-----+ | RELEASED |<----------+ DEPREPARED |<-------+ DISABLED | | STATE | | STATE | | STATE | +----------+ +------------+ +----------+ -NOTE: State transition between prepare and deprepare is supported in Spec -but not in the software (subsystem) +NOTE: State transitions between ``SDW_STREAM_ENABLED`` and +``SDW_STREAM_DISABLED`` are only relevant when then INFO_PAUSE flag is +supported at the ALSA/ASoC level. Likewise the transition between +``SDW_DISABLED_STATE`` and ``SDW_PREPARED_STATE`` depends on the +INFO_RESUME flag. -NOTE2: Stream state transition checks need to be handled by caller -framework, for example ALSA/ASoC. No checks for stream transition exist in -SoundWire subsystem. +NOTE2: The framework implements basic state transition checks, but +does not e.g. check if a transition from DISABLED to ENABLED is valid +on a specific platform. Such tests need to be added at the ALSA/ASoC +level. Stream State Operations ----------------------- @@ -246,6 +251,9 @@ SDW_STREAM_PREPARED Prepare state of stream. Operations performed before entering in this state: + (0) Steps 1 and 2 are omitted in the case of a resume operation, + where the bus bandwidth is known. + (1) Bus parameters such as bandwidth, frame shape, clock frequency, are computed based on current stream as well as already active stream(s) on Bus. Re-computation is required to accommodate current @@ -270,9 +278,11 @@ Prepare state of stream. Operations performed before entering in this state: After all above operations are successful, stream state is set to ``SDW_STREAM_PREPARED``. -Bus implements below API for PREPARE state which needs to be called once per -stream. From ASoC DPCM framework, this stream state is linked to -.prepare() operation. +Bus implements below API for PREPARE state which needs to be called +once per stream. From ASoC DPCM framework, this stream state is linked +to .prepare() operation. Since the .trigger() operations may not +follow the .prepare(), a direct transition from +``SDW_STREAM_PREPARED`` to ``SDW_STREAM_DEPREPARED`` is allowed. .. code-block:: c @@ -332,6 +342,14 @@ Bus implements below API for DISABLED state which needs to be called once per stream. From ASoC DPCM framework, this stream state is linked to .trigger() stop operation. +When the INFO_PAUSE flag is supported, a direct transition to +``SDW_STREAM_ENABLED`` is allowed. + +For resume operations where ASoC will use the .prepare() callback, the +stream can transition from ``SDW_STREAM_DISABLED`` to +``SDW_STREAM_PREPARED``, with all required settings restored but +without updating the bandwidth and bit allocation. + .. code-block:: c int sdw_disable_stream(struct sdw_stream_runtime * stream); @@ -353,9 +371,18 @@ state: After all above operations are successful, stream state is set to ``SDW_STREAM_DEPREPARED``. -Bus implements below API for DEPREPARED state which needs to be called once -per stream. From ASoC DPCM framework, this stream state is linked to -.trigger() stop operation. +Bus implements below API for DEPREPARED state which needs to be called +once per stream. ALSA/ASoC do not have a concept of 'deprepare', and +the mapping from this stream state to ALSA/ASoC operation may be +implementation specific. + +When the INFO_PAUSE flag is supported, the stream state is linked to +the .hw_free() operation - the stream is not deprepared on a +TRIGGER_STOP. + +Other implementations may transition to the ``SDW_STREAM_DEPREPARED`` +state on TRIGGER_STOP, should they require a transition through the +``SDW_STREAM_PREPARED`` state. .. code-block:: c diff --git a/Documentation/driver-api/thermal/cpu-idle-cooling.rst b/Documentation/driver-api/thermal/cpu-idle-cooling.rst index 9f0016ee4cfb..a1c3edecae00 100644 --- a/Documentation/driver-api/thermal/cpu-idle-cooling.rst +++ b/Documentation/driver-api/thermal/cpu-idle-cooling.rst @@ -105,8 +105,8 @@ and this variation will modulate the cooling effect. idle <--------------> running - <-----------------------------> - duty cycle 33% + <---------------------> + duty cycle 33% ^ diff --git a/Documentation/driver-api/usb/typec_bus.rst b/Documentation/driver-api/usb/typec_bus.rst index f47a69bff498..03dfa9c018b7 100644 --- a/Documentation/driver-api/usb/typec_bus.rst +++ b/Documentation/driver-api/usb/typec_bus.rst @@ -53,9 +53,7 @@ in need to reconfigure the pins on the connector, the alternate mode driver needs to notify the bus using :c:func:`typec_altmode_notify()`. The driver passes the negotiated SVID specific pin configuration value to the function as parameter. The bus driver will then configure the mux behind the connector using -that value as the state value for the mux, and also call blocking notification -chain to notify the external drivers about the state of the connector that need -to know it. +that value as the state value for the mux. NOTE: The SVID specific pin configuration values must always start from ``TYPEC_STATE_MODAL``. USB Type-C specification defines two default states for @@ -80,19 +78,6 @@ Helper macro ``TYPEC_MODAL_STATE()`` can also be used:: #define ALTMODEX_CONF_A = TYPEC_MODAL_STATE(0); #define ALTMODEX_CONF_B = TYPEC_MODAL_STATE(1); -Notification chain -~~~~~~~~~~~~~~~~~~ - -The drivers for the components that the alternate modes are designed for need to -get details regarding the results of the negotiation with the partner, and the -pin configuration of the connector. In case of DisplayPort alternate mode for -example, the GPU drivers will need to know those details. In case of -Thunderbolt alternate mode, the thunderbolt drivers will need to know them, and -so on. - -The notification chain is designed for this purpose. The drivers can register -notifiers with :c:func:`typec_altmode_register_notifier()`. - Cable plug alternate modes ~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -129,8 +114,3 @@ Cable Plug operations .. kernel-doc:: drivers/usb/typec/bus.c :functions: typec_altmode_get_plug typec_altmode_put_plug - -Notifications -~~~~~~~~~~~~~ -.. kernel-doc:: drivers/usb/typec/class.c - :functions: typec_altmode_register_notifier typec_altmode_unregister_notifier diff --git a/Documentation/driver-api/usb/writing_usb_driver.rst b/Documentation/driver-api/usb/writing_usb_driver.rst index 4fe1c06b6a13..0b3d9ff221bb 100644 --- a/Documentation/driver-api/usb/writing_usb_driver.rst +++ b/Documentation/driver-api/usb/writing_usb_driver.rst @@ -314,11 +314,8 @@ http://www.linux-usb.org/ Linux Hotplug Project: http://linux-hotplug.sourceforge.net/ -Linux USB Working Devices List: -http://www.qbik.ch/usb/devices/ - -linux-usb-devel Mailing List Archives: -http://marc.theaimsgroup.com/?l=linux-usb-devel +linux-usb Mailing List Archives: +https://lore.kernel.org/linux-usb/ Programming Guide for Linux USB Device Drivers: http://lmu.web.psi.ch/docu/manuals/software_manuals/linux_sl/usb_linux_programming_guide.pdf diff --git a/Documentation/driver-api/w1.rst b/Documentation/driver-api/w1.rst index 9963cca788a1..bda3ad60f655 100644 --- a/Documentation/driver-api/w1.rst +++ b/Documentation/driver-api/w1.rst @@ -7,9 +7,6 @@ W1: Dallas' 1-wire bus W1 API internal to the kernel ============================= -W1 API internal to the kernel ------------------------------ - include/linux/w1.h ~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/features/vm/pte_special/arch-support.txt b/Documentation/features/vm/pte_special/arch-support.txt index 2dc5df6a1cf5..3d492a34c8ee 100644 --- a/Documentation/features/vm/pte_special/arch-support.txt +++ b/Documentation/features/vm/pte_special/arch-support.txt @@ -23,7 +23,7 @@ | openrisc: | TODO | | parisc: | TODO | | powerpc: | ok | - | riscv: | TODO | + | riscv: | ok | | s390: | ok | | sh: | ok | | sparc: | ok | diff --git a/Documentation/filesystems/9p.txt b/Documentation/filesystems/9p.rst index fec7144e817c..671fef39a802 100644 --- a/Documentation/filesystems/9p.txt +++ b/Documentation/filesystems/9p.rst @@ -1,7 +1,10 @@ - v9fs: Plan 9 Resource Sharing for Linux - ======================================= +.. SPDX-License-Identifier: GPL-2.0 -ABOUT +======================================= +v9fs: Plan 9 Resource Sharing for Linux +======================================= + +About ===== v9fs is a Unix implementation of the Plan 9 9p remote filesystem protocol. @@ -14,32 +17,34 @@ and Maya Gokhale. Additional development by Greg Watson The best detailed explanation of the Linux implementation and applications of the 9p client is available in the form of a USENIX paper: + http://www.usenix.org/events/usenix05/tech/freenix/hensbergen.html Other applications are described in the following papers: + * XCPU & Clustering - http://xcpu.org/papers/xcpu-talk.pdf + http://xcpu.org/papers/xcpu-talk.pdf * KVMFS: control file system for KVM - http://xcpu.org/papers/kvmfs.pdf + http://xcpu.org/papers/kvmfs.pdf * CellFS: A New Programming Model for the Cell BE - http://xcpu.org/papers/cellfs-talk.pdf + http://xcpu.org/papers/cellfs-talk.pdf * PROSE I/O: Using 9p to enable Application Partitions - http://plan9.escet.urjc.es/iwp9/cready/PROSE_iwp9_2006.pdf + http://plan9.escet.urjc.es/iwp9/cready/PROSE_iwp9_2006.pdf * VirtFS: A Virtualization Aware File System pass-through - http://goo.gl/3WPDg + http://goo.gl/3WPDg -USAGE +Usage ===== -For remote file server: +For remote file server:: mount -t 9p 10.10.1.2 /mnt/9 -For Plan 9 From User Space applications (http://swtch.com/plan9) +For Plan 9 From User Space applications (http://swtch.com/plan9):: mount -t 9p `namespace`/acme /mnt/9 -o trans=unix,uname=$USER -For server running on QEMU host with virtio transport: +For server running on QEMU host with virtio transport:: mount -t 9p -o trans=virtio <mount_tag> /mnt/9 @@ -48,18 +53,22 @@ mount points. Each 9P export is seen by the client as a virtio device with an associated "mount_tag" property. Available mount tags can be seen by reading /sys/bus/virtio/drivers/9pnet_virtio/virtio<n>/mount_tag files. -OPTIONS +Options ======= + ============= =============================================================== trans=name select an alternative transport. Valid options are currently: - unix - specifying a named pipe mount point - tcp - specifying a normal TCP/IP connection - fd - used passed file descriptors for connection - (see rfdno and wfdno) - virtio - connect to the next virtio channel available - (from QEMU with trans_virtio module) - rdma - connect to a specified RDMA channel + + ======== ============================================ + unix specifying a named pipe mount point + tcp specifying a normal TCP/IP connection + fd used passed file descriptors for connection + (see rfdno and wfdno) + virtio connect to the next virtio channel available + (from QEMU with trans_virtio module) + rdma connect to a specified RDMA channel + ======== ============================================ uname=name user name to attempt mount as on the remote server. The server may override or ignore this value. Certain user @@ -69,28 +78,36 @@ OPTIONS offering several exported file systems. cache=mode specifies a caching policy. By default, no caches are used. - none = default no cache policy, metadata and data + + none + default no cache policy, metadata and data alike are synchronous. - loose = no attempts are made at consistency, + loose + no attempts are made at consistency, intended for exclusive, read-only mounts - fscache = use FS-Cache for a persistent, read-only + fscache + use FS-Cache for a persistent, read-only cache backend. - mmap = minimal cache that is only used for read-write + mmap + minimal cache that is only used for read-write mmap. Northing else is cached, like cache=none debug=n specifies debug level. The debug level is a bitmask. - 0x01 = display verbose error messages - 0x02 = developer debug (DEBUG_CURRENT) - 0x04 = display 9p trace - 0x08 = display VFS trace - 0x10 = display Marshalling debug - 0x20 = display RPC debug - 0x40 = display transport debug - 0x80 = display allocation debug - 0x100 = display protocol message debug - 0x200 = display Fid debug - 0x400 = display packet debug - 0x800 = display fscache tracing debug + + ===== ================================ + 0x01 display verbose error messages + 0x02 developer debug (DEBUG_CURRENT) + 0x04 display 9p trace + 0x08 display VFS trace + 0x10 display Marshalling debug + 0x20 display RPC debug + 0x40 display transport debug + 0x80 display allocation debug + 0x100 display protocol message debug + 0x200 display Fid debug + 0x400 display packet debug + 0x800 display fscache tracing debug + ===== ================================ rfdno=n the file descriptor for reading with trans=fd @@ -103,9 +120,12 @@ OPTIONS noextend force legacy mode (no 9p2000.u or 9p2000.L semantics) version=name Select 9P protocol version. Valid options are: - 9p2000 - Legacy mode (same as noextend) - 9p2000.u - Use 9P2000.u protocol - 9p2000.L - Use 9P2000.L protocol + + ======== ============================== + 9p2000 Legacy mode (same as noextend) + 9p2000.u Use 9P2000.u protocol + 9p2000.L Use 9P2000.L protocol + ======== ============================== dfltuid attempt to mount as a particular uid @@ -118,22 +138,37 @@ OPTIONS hosts. This functionality will be expanded in later versions. access there are four access modes. - user = if a user tries to access a file on v9fs + user + if a user tries to access a file on v9fs filesystem for the first time, v9fs sends an attach command (Tattach) for that user. This is the default mode. - <uid> = allows only user with uid=<uid> to access + <uid> + allows only user with uid=<uid> to access the files on the mounted filesystem - any = v9fs does single attach and performs all + any + v9fs does single attach and performs all operations as one user - client = ACL based access check on the 9p client + clien + ACL based access check on the 9p client side for access validation cachetag cache tag to use the specified persistent cache. cache tags for existing cache sessions can be listed at /sys/fs/9p/caches. (applies only to cache=fscache) + ============= =============================================================== + +Behavior +======== + +This section aims at describing 9p 'quirks' that can be different +from a local filesystem behaviors. -RESOURCES + - Setting O_NONBLOCK on a file will make client reads return as early + as the server returns some data instead of trying to fill the read + buffer with the requested amount of bytes or end of file is reached. + +Resources ========= Protocol specifications are maintained on github: @@ -158,4 +193,3 @@ http://plan9.bell-labs.com/plan9 For information on Plan 9 from User Space (Plan 9 applications and libraries ported to Linux/BSD/OSX/etc) check out http://swtch.com/plan9 - diff --git a/Documentation/filesystems/adfs.txt b/Documentation/filesystems/adfs.rst index 0baa8e8c1fc1..5b22cae38e5e 100644 --- a/Documentation/filesystems/adfs.txt +++ b/Documentation/filesystems/adfs.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============================== +Acorn Disc Filing System - ADFS +=============================== + Filesystems supported by ADFS ----------------------------- @@ -25,6 +31,7 @@ directory updates, specifically updating the access mode and timestamp. Mount options for ADFS ---------------------- + ============ ====================================================== uid=nnn All files in the partition will be owned by user id nnn. Default 0 (root). gid=nnn All files in the partition will be in group @@ -36,22 +43,23 @@ Mount options for ADFS ftsuffix=n When ftsuffix=0, no file type suffix will be applied. When ftsuffix=1, a hexadecimal suffix corresponding to the RISC OS file type will be added. Default 0. + ============ ====================================================== Mapping of ADFS permissions to Linux permissions ------------------------------------------------ ADFS permissions consist of the following: - Owner read - Owner write - Other read - Other write + - Owner read + - Owner write + - Other read + - Other write (In older versions, an 'execute' permission did exist, but this - does not hold the same meaning as the Linux 'execute' permission - and is now obsolete). + does not hold the same meaning as the Linux 'execute' permission + and is now obsolete). - The mapping is performed as follows: + The mapping is performed as follows:: Owner read -> -r--r--r-- Owner write -> --w--w---w @@ -66,17 +74,18 @@ Mapping of ADFS permissions to Linux permissions Possible other mode permissions -> ----rwxrwx Hence, with the default masks, if a file is owner read/write, and - not a UnixExec filetype, then the permissions will be: + not a UnixExec filetype, then the permissions will be:: -rw------- However, if the masks were ownmask=0770,othmask=0007, then this would - be modified to: + be modified to:: + -rw-rw---- There is no restriction on what you can do with these masks. You may wish that either read bits give read access to the file for all, but - keep the default write protection (ownmask=0755,othmask=0577): + keep the default write protection (ownmask=0755,othmask=0577):: -rw-r--r-- diff --git a/Documentation/filesystems/affs.txt b/Documentation/filesystems/affs.rst index 71b63c2b9841..7f1a40dce6d3 100644 --- a/Documentation/filesystems/affs.txt +++ b/Documentation/filesystems/affs.rst @@ -1,9 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================= Overview of Amiga Filesystems ============================= Not all varieties of the Amiga filesystems are supported for reading and writing. The Amiga currently knows six different filesystems: +============== =============================================================== DOS\0 The old or original filesystem, not really suited for hard disks and normally not used on them, either. Supported read/write. @@ -23,6 +27,7 @@ DOS\4 The original filesystem with directory cache. The directory sense on hard disks. Supported read only. DOS\5 The Fast File System with directory cache. Supported read only. +============== =============================================================== All of the above filesystems allow block sizes from 512 to 32K bytes. Supported block sizes are: 512, 1024, 2048 and 4096 bytes. Larger blocks @@ -36,14 +41,18 @@ are supported, too. Mount options for the AFFS ========================== -protect If this option is set, the protection bits cannot be altered. +protect + If this option is set, the protection bits cannot be altered. -setuid[=uid] This sets the owner of all files and directories in the file +setuid[=uid] + This sets the owner of all files and directories in the file system to uid or the uid of the current user, respectively. -setgid[=gid] Same as above, but for gid. +setgid[=gid] + Same as above, but for gid. -mode=mode Sets the mode flags to the given (octal) value, regardless +mode=mode + Sets the mode flags to the given (octal) value, regardless of the original permissions. Directories will get an x permission if the corresponding r bit is set. This is useful since most of the plain AmigaOS files @@ -53,33 +62,41 @@ nofilenametruncate The file system will return an error when filename exceeds standard maximum filename length (30 characters). -reserved=num Sets the number of reserved blocks at the start of the +reserved=num + Sets the number of reserved blocks at the start of the partition to num. You should never need this option. Default is 2. -root=block Sets the block number of the root block. This should never +root=block + Sets the block number of the root block. This should never be necessary. -bs=blksize Sets the blocksize to blksize. Valid block sizes are 512, +bs=blksize + Sets the blocksize to blksize. Valid block sizes are 512, 1024, 2048 and 4096. Like the root option, this should never be necessary, as the affs can figure it out itself. -quiet The file system will not return an error for disallowed +quiet + The file system will not return an error for disallowed mode changes. -verbose The volume name, file system type and block size will +verbose + The volume name, file system type and block size will be written to the syslog when the filesystem is mounted. -mufs The filesystem is really a muFS, also it doesn't +mufs + The filesystem is really a muFS, also it doesn't identify itself as one. This option is necessary if the filesystem wasn't formatted as muFS, but is used as one. -prefix=path Path will be prefixed to every absolute path name of +prefix=path + Path will be prefixed to every absolute path name of symbolic links on an AFFS partition. Default = "/". (See below.) -volume=name When symbolic links with an absolute path are created +volume=name + When symbolic links with an absolute path are created on an AFFS partition, name will be prepended as the volume name. Default = "" (empty string). (See below.) @@ -119,7 +136,7 @@ The Linux rwxrwxrwx file mode is handled as follows: - All other flags (suid, sgid, ...) are ignored and will not be retained. - + Newly created files and directories will get the user and group ID of the current user and a mode according to the umask. @@ -148,11 +165,13 @@ might be "User", "WB" and "Graphics", the mount points /amiga/User, Examples ======== -Command line: +Command line:: + mount Archive/Amiga/Workbench3.1.adf /mnt -t affs -o loop,verbose mount /dev/sda3 /Amiga -t affs -/etc/fstab entry: +/etc/fstab entry:: + /dev/sdb5 /amiga/Workbench affs noauto,user,exec,verbose 0 0 IMPORTANT NOTE @@ -170,7 +189,8 @@ before booting Windows! If the damage is already done, the following should fix the RDB (where <disk> is the device name). -DO AT YOUR OWN RISK: + +DO AT YOUR OWN RISK:: dd if=/dev/<disk> of=rdb.tmp count=1 cp rdb.tmp rdb.fixed @@ -189,10 +209,14 @@ By default, filenames are truncated to 30 characters without warning. 'nofilenametruncate' mount option can change that behavior. Case is ignored by the affs in filename matching, but Linux shells -do care about the case. Example (with /wb being an affs mounted fs): +do care about the case. Example (with /wb being an affs mounted fs):: + rm /wb/WRONGCASE -will remove /mnt/wrongcase, but + +will remove /mnt/wrongcase, but:: + rm /wb/WR* + will not since the names are matched by the shell. The block allocation is designed for hard disk partitions. If more @@ -219,4 +243,4 @@ due to an incompatibility with the Amiga floppy controller. If you are interested in an Amiga Emulator for Linux, look at -http://web.archive.org/web/*/http://www.freiburg.linux.de/~uae/ +http://web.archive.org/web/%2E/http://www.freiburg.linux.de/~uae/ diff --git a/Documentation/filesystems/afs.txt b/Documentation/filesystems/afs.rst index 8c6ea7b41048..c4ec39a5966e 100644 --- a/Documentation/filesystems/afs.txt +++ b/Documentation/filesystems/afs.rst @@ -1,8 +1,10 @@ - ==================== - kAFS: AFS FILESYSTEM - ==================== +.. SPDX-License-Identifier: GPL-2.0 -Contents: +==================== +kAFS: AFS FILESYSTEM +==================== + +.. Contents: - Overview. - Usage. @@ -14,8 +16,7 @@ Contents: - The @sys substitution. -======== -OVERVIEW +Overview ======== This filesystem provides a fairly simple secure AFS filesystem driver. It is @@ -35,35 +36,33 @@ It does not yet support the following AFS features: (*) pioctl() system call. -=========== -COMPILATION +Compilation =========== The filesystem should be enabled by turning on the kernel configuration -options: +options:: CONFIG_AF_RXRPC - The RxRPC protocol transport CONFIG_RXKAD - The RxRPC Kerberos security handler CONFIG_AFS - The AFS filesystem -Additionally, the following can be turned on to aid debugging: +Additionally, the following can be turned on to aid debugging:: CONFIG_AF_RXRPC_DEBUG - Permit AF_RXRPC debugging to be enabled CONFIG_AFS_DEBUG - Permit AFS debugging to be enabled They permit the debugging messages to be turned on dynamically by manipulating -the masks in the following files: +the masks in the following files:: /sys/module/af_rxrpc/parameters/debug /sys/module/kafs/parameters/debug -===== -USAGE +Usage ===== When inserting the driver modules the root cell must be specified along with a -list of volume location server IP addresses: +list of volume location server IP addresses:: modprobe rxrpc modprobe kafs rootcell=cambridge.redhat.com:172.16.18.73:172.16.18.91 @@ -77,14 +76,14 @@ The second module is the kerberos RxRPC security driver, and the third module is the actual filesystem driver for the AFS filesystem. Once the module has been loaded, more modules can be added by the following -procedure: +procedure:: echo add grand.central.org 18.9.48.14:128.2.203.61:130.237.48.87 >/proc/fs/afs/cells Where the parameters to the "add" command are the name of a cell and a list of volume location servers within that cell, with the latter separated by colons. -Filesystems can be mounted anywhere by commands similar to the following: +Filesystems can be mounted anywhere by commands similar to the following:: mount -t afs "%cambridge.redhat.com:root.afs." /afs mount -t afs "#cambridge.redhat.com:root.cell." /afs/cambridge @@ -104,8 +103,7 @@ named volume will be looked up in the cell specified during modprobe. Additional cells can be added through /proc (see later section). -=========== -MOUNTPOINTS +Mountpoints =========== AFS has a concept of mountpoints. In AFS terms, these are specially formatted @@ -123,42 +121,40 @@ culled first. If all are culled, then the requested volume will also be unmounted, otherwise error EBUSY will be returned. This can be used by the administrator to attempt to unmount the whole AFS tree -mounted on /afs in one go by doing: +mounted on /afs in one go by doing:: umount /afs -============ -DYNAMIC ROOT +Dynamic Root ============ A mount option is available to create a serverless mount that is only usable -for dynamic lookup. Creating such a mount can be done by, for example: +for dynamic lookup. Creating such a mount can be done by, for example:: mount -t afs none /afs -o dyn This creates a mount that just has an empty directory at the root. Attempting to look up a name in this directory will cause a mountpoint to be created that -looks up a cell of the same name, for example: +looks up a cell of the same name, for example:: ls /afs/grand.central.org/ -=============== -PROC FILESYSTEM +Proc Filesystem =============== The AFS modules creates a "/proc/fs/afs/" directory and populates it: (*) A "cells" file that lists cells currently known to the afs module and - their usage counts: + their usage counts:: [root@andromeda ~]# cat /proc/fs/afs/cells USE NAME 3 cambridge.redhat.com (*) A directory per cell that contains files that list volume location - servers, volumes, and active servers known within that cell. + servers, volumes, and active servers known within that cell:: [root@andromeda ~]# cat /proc/fs/afs/cambridge.redhat.com/servers USE ADDR STATE @@ -171,8 +167,7 @@ The AFS modules creates a "/proc/fs/afs/" directory and populates it: 1 Val 20000000 20000001 20000002 root.afs -================= -THE CELL DATABASE +The Cell Database ================= The filesystem maintains an internal database of all the cells it knows and the @@ -181,7 +176,7 @@ the system belongs is added to the database when modprobe is performed by the "rootcell=" argument or, if compiled in, using a "kafs.rootcell=" argument on the kernel command line. -Further cells can be added by commands similar to the following: +Further cells can be added by commands similar to the following:: echo add CELLNAME VLADDR[:VLADDR][:VLADDR]... >/proc/fs/afs/cells echo add grand.central.org 18.9.48.14:128.2.203.61:130.237.48.87 >/proc/fs/afs/cells @@ -189,8 +184,7 @@ Further cells can be added by commands similar to the following: No other cell database operations are available at this time. -======== -SECURITY +Security ======== Secure operations are initiated by acquiring a key using the klog program. A @@ -198,17 +192,17 @@ very primitive klog program is available at: http://people.redhat.com/~dhowells/rxrpc/klog.c -This should be compiled by: +This should be compiled by:: make klog LDLIBS="-lcrypto -lcrypt -lkrb4 -lkeyutils" -And then run as: +And then run as:: ./klog Assuming it's successful, this adds a key of type RxRPC, named for the service and cell, eg: "afs@<cellname>". This can be viewed with the keyctl program or -by cat'ing /proc/keys: +by cat'ing /proc/keys:: [root@andromeda ~]# keyctl show Session Keyring @@ -232,20 +226,19 @@ socket), then the operations on the file will be made with key that was used to open the file. -===================== -THE @SYS SUBSTITUTION +The @sys Substitution ===================== The list of up to 16 @sys substitutions for the current network namespace can -be configured by writing a list to /proc/fs/afs/sysname: +be configured by writing a list to /proc/fs/afs/sysname:: [root@andromeda ~]# echo foo amd64_linux_26 >/proc/fs/afs/sysname -or cleared entirely by writing an empty list: +or cleared entirely by writing an empty list:: [root@andromeda ~]# echo >/proc/fs/afs/sysname -The current list for current network namespace can be retrieved by: +The current list for current network namespace can be retrieved by:: [root@andromeda ~]# cat /proc/fs/afs/sysname foo diff --git a/Documentation/filesystems/autofs-mount-control.txt b/Documentation/filesystems/autofs-mount-control.rst index acc02fc57993..2903aed92316 100644 --- a/Documentation/filesystems/autofs-mount-control.txt +++ b/Documentation/filesystems/autofs-mount-control.rst @@ -1,4 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 +==================================================================== Miscellaneous Device control operations for the autofs kernel module ==================================================================== @@ -36,24 +38,24 @@ For example, there are two types of automount maps, direct (in the kernel module source you will see a third type called an offset, which is just a direct mount in disguise) and indirect. -Here is a master map with direct and indirect map entries: +Here is a master map with direct and indirect map entries:: -/- /etc/auto.direct -/test /etc/auto.indirect + /- /etc/auto.direct + /test /etc/auto.indirect -and the corresponding map files: +and the corresponding map files:: -/etc/auto.direct: + /etc/auto.direct: -/automount/dparse/g6 budgie:/autofs/export1 -/automount/dparse/g1 shark:/autofs/export1 -and so on. + /automount/dparse/g6 budgie:/autofs/export1 + /automount/dparse/g1 shark:/autofs/export1 + and so on. -/etc/auto.indirect: +/etc/auto.indirect:: -g1 shark:/autofs/export1 -g6 budgie:/autofs/export1 -and so on. + g1 shark:/autofs/export1 + g6 budgie:/autofs/export1 + and so on. For the above indirect map an autofs file system is mounted on /test and mounts are triggered for each sub-directory key by the inode lookup @@ -69,23 +71,23 @@ use the follow_link inode operation to trigger the mount. But, each entry in direct and indirect maps can have offsets (making them multi-mount map entries). -For example, an indirect mount map entry could also be: +For example, an indirect mount map entry could also be:: -g1 \ - / shark:/autofs/export5/testing/test \ - /s1 shark:/autofs/export/testing/test/s1 \ - /s2 shark:/autofs/export5/testing/test/s2 \ - /s1/ss1 shark:/autofs/export1 \ - /s2/ss2 shark:/autofs/export2 + g1 \ + / shark:/autofs/export5/testing/test \ + /s1 shark:/autofs/export/testing/test/s1 \ + /s2 shark:/autofs/export5/testing/test/s2 \ + /s1/ss1 shark:/autofs/export1 \ + /s2/ss2 shark:/autofs/export2 -and a similarly a direct mount map entry could also be: +and a similarly a direct mount map entry could also be:: -/automount/dparse/g1 \ - / shark:/autofs/export5/testing/test \ - /s1 shark:/autofs/export/testing/test/s1 \ - /s2 shark:/autofs/export5/testing/test/s2 \ - /s1/ss1 shark:/autofs/export2 \ - /s2/ss2 shark:/autofs/export2 + /automount/dparse/g1 \ + / shark:/autofs/export5/testing/test \ + /s1 shark:/autofs/export/testing/test/s1 \ + /s2 shark:/autofs/export5/testing/test/s2 \ + /s1/ss1 shark:/autofs/export2 \ + /s2/ss2 shark:/autofs/export2 One of the issues with version 4 of autofs was that, when mounting an entry with a large number of offsets, possibly with nesting, we needed @@ -170,32 +172,32 @@ autofs Miscellaneous Device mount control interface The control interface is opening a device node, typically /dev/autofs. All the ioctls use a common structure to pass the needed parameter -information and return operation results: - -struct autofs_dev_ioctl { - __u32 ver_major; - __u32 ver_minor; - __u32 size; /* total size of data passed in - * including this struct */ - __s32 ioctlfd; /* automount command fd */ - - /* Command parameters */ - union { - struct args_protover protover; - struct args_protosubver protosubver; - struct args_openmount openmount; - struct args_ready ready; - struct args_fail fail; - struct args_setpipefd setpipefd; - struct args_timeout timeout; - struct args_requester requester; - struct args_expire expire; - struct args_askumount askumount; - struct args_ismountpoint ismountpoint; - }; - - char path[0]; -}; +information and return operation results:: + + struct autofs_dev_ioctl { + __u32 ver_major; + __u32 ver_minor; + __u32 size; /* total size of data passed in + * including this struct */ + __s32 ioctlfd; /* automount command fd */ + + /* Command parameters */ + union { + struct args_protover protover; + struct args_protosubver protosubver; + struct args_openmount openmount; + struct args_ready ready; + struct args_fail fail; + struct args_setpipefd setpipefd; + struct args_timeout timeout; + struct args_requester requester; + struct args_expire expire; + struct args_askumount askumount; + struct args_ismountpoint ismountpoint; + }; + + char path[0]; + }; The ioctlfd field is a mount point file descriptor of an autofs mount point. It is returned by the open call and is used by all calls except @@ -212,7 +214,7 @@ is used account for the increased structure length when translating the structure sent from user space. This structure can be initialized before setting specific fields by using -the void function call init_autofs_dev_ioctl(struct autofs_dev_ioctl *). +the void function call init_autofs_dev_ioctl(``struct autofs_dev_ioctl *``). All of the ioctls perform a copy of this structure from user space to kernel space and return -EINVAL if the size parameter is smaller than diff --git a/Documentation/filesystems/befs.txt b/Documentation/filesystems/befs.rst index da45e6c842b8..79f9740d76ff 100644 --- a/Documentation/filesystems/befs.txt +++ b/Documentation/filesystems/befs.rst @@ -1,48 +1,54 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================= BeOS filesystem for Linux +========================= Document last updated: Dec 6, 2001 -WARNING +Warning ======= Make sure you understand that this is alpha software. This means that the -implementation is neither complete nor well-tested. +implementation is neither complete nor well-tested. I DISCLAIM ALL RESPONSIBILITY FOR ANY POSSIBLE BAD EFFECTS OF THIS CODE! -LICENSE -===== -This software is covered by the GNU General Public License. +License +======= +This software is covered by the GNU General Public License. See the file COPYING for the complete text of the license. Or the GNU website: <http://www.gnu.org/licenses/licenses.html> -AUTHOR -===== +Author +====== The largest part of the code written by Will Dyson <will_dyson@pobox.com> He has been working on the code since Aug 13, 2001. See the changelog for details. Original Author: Makoto Kato <m_kato@ga2.so-net.ne.jp> + His original code can still be found at: <http://hp.vector.co.jp/authors/VA008030/bfs/> + Does anyone know of a more current email address for Makoto? He doesn't respond to the address given above... This filesystem doesn't have a maintainer. -WHAT IS THIS DRIVER? -================== -This module implements the native filesystem of BeOS http://www.beincorporated.com/ +What is this Driver? +==================== +This module implements the native filesystem of BeOS http://www.beincorporated.com/ for the linux 2.4.1 and later kernels. Currently it is a read-only implementation. Which is it, BFS or BEFS? -================ -Be, Inc said, "BeOS Filesystem is officially called BFS, not BeFS". +========================= +Be, Inc said, "BeOS Filesystem is officially called BFS, not BeFS". But Unixware Boot Filesystem is called bfs, too. And they are already in the kernel. Because of this naming conflict, on Linux the BeOS filesystem is called befs. -HOW TO INSTALL +How to Install ============== step 1. Install the BeFS patch into the source code tree of linux. @@ -54,16 +60,16 @@ is called patch-befs-xxx, you would do the following: patch -p1 < /path/to/patch-befs-xxx if the patching step fails (i.e. there are rejected hunks), you can try to -figure it out yourself (it shouldn't be hard), or mail the maintainer +figure it out yourself (it shouldn't be hard), or mail the maintainer (Will Dyson <will_dyson@pobox.com>) for help. step 2. Configuration & make kernel The linux kernel has many compile-time options. Most of them are beyond the scope of this document. I suggest the Kernel-HOWTO document as a good general -reference on this topic. http://www.linuxdocs.org/HOWTOs/Kernel-HOWTO-4.html +reference on this topic. http://www.linuxdocs.org/HOWTOs/Kernel-HOWTO-4.html -However, to use the BeFS module, you must enable it at configure time. +However, to use the BeFS module, you must enable it at configure time:: cd /foo/bar/linux make menuconfig (or xconfig) @@ -82,35 +88,40 @@ step 3. Install See the kernel howto <http://www.linux.com/howto/Kernel-HOWTO.html> for instructions on this critical step. -USING BFS +Using BFS ========= To use the BeOS filesystem, use filesystem type 'befs'. -ex) +ex:: + mount -t befs /dev/fd0 /beos -MOUNT OPTIONS +Mount Options ============= + +============= =========================================================== uid=nnn All files in the partition will be owned by user id nnn. gid=nnn All files in the partition will be in group nnn. iocharset=xxx Use xxx as the name of the NLS translation table. debug The driver will output debugging information to the syslog. +============= =========================================================== -HOW TO GET LASTEST VERSION +How to Get Lastest Version ========================== The latest version is currently available at: <http://befs-driver.sourceforge.net/> -ANY KNOWN BUGS? -=========== +Any Known Bugs? +=============== As of Jan 20, 2002: - + None -SPECIAL THANKS +Special Thanks ============== Dominic Giampalo ... Writing "Practical file system design with Be filesystem" + Hiroyuki Yamada ... Testing LinuxPPC. diff --git a/Documentation/filesystems/bfs.txt b/Documentation/filesystems/bfs.rst index 843ce91a2e40..ce14b9018807 100644 --- a/Documentation/filesystems/bfs.txt +++ b/Documentation/filesystems/bfs.rst @@ -1,4 +1,7 @@ -BFS FILESYSTEM FOR LINUX +.. SPDX-License-Identifier: GPL-2.0 + +======================== +BFS Filesystem for Linux ======================== The BFS filesystem is used by SCO UnixWare OS for the /stand slice, which @@ -9,22 +12,22 @@ In order to access /stand partition under Linux you obviously need to know the partition number and the kernel must support UnixWare disk slices (CONFIG_UNIXWARE_DISKLABEL config option). However BFS support does not depend on having UnixWare disklabel support because one can also mount -BFS filesystem via loopback: +BFS filesystem via loopback:: -# losetup /dev/loop0 stand.img -# mount -t bfs /dev/loop0 /mnt/stand + # losetup /dev/loop0 stand.img + # mount -t bfs /dev/loop0 /mnt/stand -where stand.img is a file containing the image of BFS filesystem. +where stand.img is a file containing the image of BFS filesystem. When you have finished using it and umounted you need to also deallocate -/dev/loop0 device by: +/dev/loop0 device by:: -# losetup -d /dev/loop0 + # losetup -d /dev/loop0 -You can simplify mounting by just typing: +You can simplify mounting by just typing:: -# mount -t bfs -o loop stand.img /mnt/stand + # mount -t bfs -o loop stand.img /mnt/stand -this will allocate the first available loopback device (and load loop.o +this will allocate the first available loopback device (and load loop.o kernel module if necessary) automatically. If the loopback driver is not loaded automatically, make sure that you have compiled the module and that modprobe is functioning. Beware that umount will not deallocate @@ -33,21 +36,21 @@ that modprobe is functioning. Beware that umount will not deallocate losetup(8). Read losetup(8) manpage for more info. To create the BFS image under UnixWare you need to find out first which -slice contains it. The command prtvtoc(1M) is your friend: +slice contains it. The command prtvtoc(1M) is your friend:: -# prtvtoc /dev/rdsk/c0b0t0d0s0 + # prtvtoc /dev/rdsk/c0b0t0d0s0 (assuming your root disk is on target=0, lun=0, bus=0, controller=0). Then you look for the slice with tag "STAND", which is usually slice 10. With this -information you can use dd(1) to create the BFS image: +information you can use dd(1) to create the BFS image:: -# umount /stand -# dd if=/dev/rdsk/c0b0t0d0sa of=stand.img bs=512 + # umount /stand + # dd if=/dev/rdsk/c0b0t0d0sa of=stand.img bs=512 Just in case, you can verify that you have done the right thing by checking -the magic number: +the magic number:: -# od -Ad -tx4 stand.img | more + # od -Ad -tx4 stand.img | more The first 4 bytes should be 0x1badface. diff --git a/Documentation/filesystems/btrfs.txt b/Documentation/filesystems/btrfs.rst index f9dad22d95ce..d0904f602819 100644 --- a/Documentation/filesystems/btrfs.txt +++ b/Documentation/filesystems/btrfs.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===== BTRFS ===== diff --git a/Documentation/filesystems/ceph.txt b/Documentation/filesystems/ceph.rst index b19b6a03f91c..0aa70750df0f 100644 --- a/Documentation/filesystems/ceph.txt +++ b/Documentation/filesystems/ceph.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================ Ceph Distributed File System ============================ @@ -15,6 +18,7 @@ Basic features include: * Easy deployment: most FS components are userspace daemons Also, + * Flexible snapshots (on any directory) * Recursive accounting (nested files, directories, bytes) @@ -63,7 +67,7 @@ no 'du' or similar recursive scan of the file system is required. Finally, Ceph also allows quotas to be set on any directory in the system. The quota can restrict the number of bytes or the number of files stored beneath that point in the directory hierarchy. Quotas can be set using -extended attributes 'ceph.quota.max_files' and 'ceph.quota.max_bytes', eg: +extended attributes 'ceph.quota.max_files' and 'ceph.quota.max_bytes', eg:: setfattr -n ceph.quota.max_bytes -v 100000000 /some/dir getfattr -n ceph.quota.max_bytes /some/dir @@ -76,7 +80,7 @@ from writing as much data as it needs. Mount Syntax ============ -The basic mount syntax is: +The basic mount syntax is:: # mount -t ceph monip[:port][,monip2[:port]...]:/[subdir] mnt @@ -84,7 +88,7 @@ You only need to specify a single monitor, as the client will get the full list when it connects. (However, if the monitor you specify happens to be down, the mount won't succeed.) The port can be left off if the monitor is using the default. So if the monitor is at -1.2.3.4, +1.2.3.4:: # mount -t ceph 1.2.3.4:/ /mnt/ceph @@ -103,17 +107,17 @@ Mount Options address its connection to the monitor originates from. wsize=X - Specify the maximum write size in bytes. Default: 16 MB. + Specify the maximum write size in bytes. Default: 64 MB. rsize=X - Specify the maximum read size in bytes. Default: 16 MB. + Specify the maximum read size in bytes. Default: 64 MB. rasize=X Specify the maximum readahead size in bytes. Default: 8 MB. mount_timeout=X Specify the timeout value for mount (in seconds), in the case - of a non-responsive Ceph file system. The default is 30 + of a non-responsive Ceph file system. The default is 60 seconds. caps_max=X @@ -163,14 +167,14 @@ Mount Options available modes are "no" and "clean". The default is "no". * no: never attempt to reconnect when client detects that it has been - blacklisted. Operations will generally fail after being blacklisted. + blacklisted. Operations will generally fail after being blacklisted. * clean: client reconnects to the ceph cluster automatically when it - detects that it has been blacklisted. During reconnect, client drops - dirty data/metadata, invalidates page caches and writable file handles. - After reconnect, file locks become stale because the MDS loses track - of them. If an inode contains any stale file locks, read/write on the - inode is not allowed until applications release all stale file locks. + detects that it has been blacklisted. During reconnect, client drops + dirty data/metadata, invalidates page caches and writable file handles. + After reconnect, file locks become stale because the MDS loses track + of them. If an inode contains any stale file locks, read/write on the + inode is not allowed until applications release all stale file locks. More Information ================ @@ -179,8 +183,8 @@ For more information on Ceph, see the home page at https://ceph.com/ The Linux kernel client source tree is available at - https://github.com/ceph/ceph-client.git - git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git + - https://github.com/ceph/ceph-client.git + - git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git and the source for the full system is at https://github.com/ceph/ceph.git diff --git a/Documentation/filesystems/cifs/cifsroot.txt b/Documentation/filesystems/cifs/cifsroot.txt index 0fa1a2c36a40..947b7ec6ce9e 100644 --- a/Documentation/filesystems/cifs/cifsroot.txt +++ b/Documentation/filesystems/cifs/cifsroot.txt @@ -13,7 +13,7 @@ network by utilizing SMB or CIFS protocol. In order to mount, the network stack will also need to be set up by using 'ip=' config option. For more details, see -Documentation/filesystems/nfs/nfsroot.txt. +Documentation/admin-guide/nfs/nfsroot.rst. A CIFS root mount currently requires the use of SMB1+UNIX Extensions which is only supported by the Samba server. SMB1 is the older diff --git a/Documentation/filesystems/cramfs.txt b/Documentation/filesystems/cramfs.rst index 8e19a53d648b..afbdbde98bd2 100644 --- a/Documentation/filesystems/cramfs.txt +++ b/Documentation/filesystems/cramfs.rst @@ -1,12 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 - Cramfs - cram a filesystem onto a small ROM +=========================================== +Cramfs - cram a filesystem onto a small ROM +=========================================== -cramfs is designed to be simple and small, and to compress things well. +cramfs is designed to be simple and small, and to compress things well. It uses the zlib routines to compress a file one page at a time, and allows random page access. The meta-data is not compressed, but is expressed in a very terse representation to make it use much less -diskspace than traditional filesystems. +diskspace than traditional filesystems. You can't write to a cramfs filesystem (making it compressible and compact also makes it _very_ hard to update on-the-fly), so you have to @@ -28,9 +31,9 @@ issue. Hard links are supported, but hard linked files will still have a link count of 1 in the cramfs image. -Cramfs directories have no `.' or `..' entries. Directories (like +Cramfs directories have no ``.`` or ``..`` entries. Directories (like every other file on cramfs) always have a link count of 1. (There's -no need to use -noleaf in `find', btw.) +no need to use -noleaf in ``find``, btw.) No timestamps are stored in a cramfs, so these default to the epoch (1970 GMT). Recently-accessed files may have updated timestamps, but @@ -70,9 +73,9 @@ MTD drivers are cfi_cmdset_0001 (Intel/Sharp CFI flash) or physmap (Flash device in physical memory map). MTD partitions based on such devices are fine too. Then that device should be specified with the "mtd:" prefix as the mount device argument. For example, to mount the MTD device named -"fs_partition" on the /mnt directory: +"fs_partition" on the /mnt directory:: -$ mount -t cramfs mtd:fs_partition /mnt + $ mount -t cramfs mtd:fs_partition /mnt To boot a kernel with this as root filesystem, suffice to specify something like "root=mtd:fs_partition" on the kernel command line. @@ -90,6 +93,7 @@ https://github.com/npitre/cramfs-tools For /usr/share/magic -------------------- +===== ======================= ======================= 0 ulelong 0x28cd3d45 Linux cramfs offset 0 >4 ulelong x size %d >8 ulelong x flags 0x%x @@ -110,6 +114,7 @@ For /usr/share/magic >552 ulelong x fsid.blocks %d >556 ulelong x fsid.files %d >560 string >\0 name "%.16s" +===== ======================= ======================= Hacker Notes diff --git a/Documentation/filesystems/debugfs.txt b/Documentation/filesystems/debugfs.rst index 55336a47a110..db9ea0854040 100644 --- a/Documentation/filesystems/debugfs.txt +++ b/Documentation/filesystems/debugfs.rst @@ -1,4 +1,11 @@ -Copyright 2009 Jonathan Corbet <corbet@lwn.net> +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +======= +DebugFS +======= + +Copyright |copy| 2009 Jonathan Corbet <corbet@lwn.net> Debugfs exists as a simple way for kernel developers to make information available to user space. Unlike /proc, which is only meant for information @@ -6,11 +13,11 @@ about a process, or sysfs, which has strict one-value-per-file rules, debugfs has no rules at all. Developers can put any information they want there. The debugfs filesystem is also intended to not serve as a stable ABI to user space; in theory, there are no stability constraints placed on -files exported there. The real world is not always so simple, though [1]; +files exported there. The real world is not always so simple, though [1]_; even debugfs interfaces are best designed with the idea that they will need to be maintained forever. -Debugfs is typically mounted with a command like: +Debugfs is typically mounted with a command like:: mount -t debugfs none /sys/kernel/debug @@ -23,7 +30,7 @@ Note that the debugfs API is exported GPL-only to modules. Code using debugfs should include <linux/debugfs.h>. Then, the first order of business will be to create at least one directory to hold a set of -debugfs files: +debugfs files:: struct dentry *debugfs_create_dir(const char *name, struct dentry *parent); @@ -36,7 +43,7 @@ something went wrong. If ERR_PTR(-ENODEV) is returned, that is an indication that the kernel has been built without debugfs support and none of the functions described below will work. -The most general way to create a file within a debugfs directory is with: +The most general way to create a file within a debugfs directory is with:: struct dentry *debugfs_create_file(const char *name, umode_t mode, struct dentry *parent, void *data, @@ -53,12 +60,12 @@ ERR_PTR(-ERROR) on error, or ERR_PTR(-ENODEV) if debugfs support is missing. Create a file with an initial size, the following function can be used -instead: +instead:: - struct dentry *debugfs_create_file_size(const char *name, umode_t mode, - struct dentry *parent, void *data, - const struct file_operations *fops, - loff_t file_size); + void debugfs_create_file_size(const char *name, umode_t mode, + struct dentry *parent, void *data, + const struct file_operations *fops, + loff_t file_size); file_size is the initial file size. The other parameters are the same as the function debugfs_create_file. @@ -66,7 +73,7 @@ as the function debugfs_create_file. In a number of cases, the creation of a set of file operations is not actually necessary; the debugfs code provides a number of helper functions for simple situations. Files containing a single integer value can be -created with any of: +created with any of:: void debugfs_create_u8(const char *name, umode_t mode, struct dentry *parent, u8 *value); @@ -80,7 +87,7 @@ created with any of: These files support both reading and writing the given value; if a specific file should not be written to, simply set the mode bits accordingly. The values in these files are in decimal; if hexadecimal is more appropriate, -the following functions can be used instead: +the following functions can be used instead:: void debugfs_create_x8(const char *name, umode_t mode, struct dentry *parent, u8 *value); @@ -94,7 +101,7 @@ the following functions can be used instead: These functions are useful as long as the developer knows the size of the value to be exported. Some types can have different widths on different architectures, though, complicating the situation somewhat. There are -functions meant to help out in such special cases: +functions meant to help out in such special cases:: void debugfs_create_size_t(const char *name, umode_t mode, struct dentry *parent, size_t *value); @@ -103,7 +110,7 @@ As might be expected, this function will create a debugfs file to represent a variable of type size_t. Similarly, there are helpers for variables of type unsigned long, in decimal -and hexadecimal: +and hexadecimal:: struct dentry *debugfs_create_ulong(const char *name, umode_t mode, struct dentry *parent, @@ -111,7 +118,7 @@ and hexadecimal: void debugfs_create_xul(const char *name, umode_t mode, struct dentry *parent, unsigned long *value); -Boolean values can be placed in debugfs with: +Boolean values can be placed in debugfs with:: struct dentry *debugfs_create_bool(const char *name, umode_t mode, struct dentry *parent, bool *value); @@ -120,7 +127,7 @@ A read on the resulting file will yield either Y (for non-zero values) or N, followed by a newline. If written to, it will accept either upper- or lower-case values, or 1 or 0. Any other input will be silently ignored. -Also, atomic_t values can be placed in debugfs with: +Also, atomic_t values can be placed in debugfs with:: void debugfs_create_atomic_t(const char *name, umode_t mode, struct dentry *parent, atomic_t *value) @@ -129,7 +136,7 @@ A read of this file will get atomic_t values, and a write of this file will set atomic_t values. Another option is exporting a block of arbitrary binary data, with -this structure and function: +this structure and function:: struct debugfs_blob_wrapper { void *data; @@ -151,7 +158,7 @@ If you want to dump a block of registers (something that happens quite often during development, even if little such code reaches mainline. Debugfs offers two functions: one to make a registers-only file, and another to insert a register block in the middle of another sequential -file. +file:: struct debugfs_reg32 { char *name; @@ -175,7 +182,7 @@ The "base" argument may be 0, but you may want to build the reg32 array using __stringify, and a number of register names (macros) are actually byte offsets over a base for the register block. -If you want to dump an u32 array in debugfs, you can create file with: +If you want to dump an u32 array in debugfs, you can create file with:: void debugfs_create_u32_array(const char *name, umode_t mode, struct dentry *parent, @@ -185,7 +192,7 @@ The "array" argument provides data, and the "elements" argument is the number of elements in the array. Note: Once array is created its size can not be changed. -There is a helper function to create device related seq_file: +There is a helper function to create device related seq_file:: struct dentry *debugfs_create_devm_seqfile(struct device *dev, const char *name, @@ -197,14 +204,14 @@ The "dev" argument is the device related to this debugfs file, and the "read_fn" is a function pointer which to be called to print the seq_file content. -There are a couple of other directory-oriented helper functions: +There are a couple of other directory-oriented helper functions:: - struct dentry *debugfs_rename(struct dentry *old_dir, + struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry, - struct dentry *new_dir, + struct dentry *new_dir, const char *new_name); - struct dentry *debugfs_create_symlink(const char *name, + struct dentry *debugfs_create_symlink(const char *name, struct dentry *parent, const char *target); @@ -219,7 +226,7 @@ module is unloaded without explicitly removing debugfs entries, the result will be a lot of stale pointers and no end of highly antisocial behavior. So all debugfs users - at least those which can be built as modules - must be prepared to remove all files and directories they create there. A file -can be removed with: +can be removed with:: void debugfs_remove(struct dentry *dentry); @@ -229,7 +236,7 @@ be removed. Once upon a time, debugfs users were required to remember the dentry pointer for every debugfs file they created so that all files could be cleaned up. We live in more civilized times now, though, and debugfs users -can call: +can call:: void debugfs_remove_recursive(struct dentry *dentry); @@ -237,5 +244,4 @@ If this function is passed a pointer for the dentry corresponding to the top-level directory, the entire hierarchy below that directory will be removed. -Notes: - [1] http://lwn.net/Articles/309298/ +.. [1] http://lwn.net/Articles/309298/ diff --git a/Documentation/filesystems/dlmfs.txt b/Documentation/filesystems/dlmfs.rst index fcf4d509d118..68daaa7facf9 100644 --- a/Documentation/filesystems/dlmfs.txt +++ b/Documentation/filesystems/dlmfs.rst @@ -1,20 +1,25 @@ -dlmfs -================== +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +===== +DLMFS +===== + A minimal DLM userspace interface implemented via a virtual file system. dlmfs is built with OCFS2 as it requires most of its infrastructure. -Project web page: http://ocfs2.wiki.kernel.org -Tools web page: https://github.com/markfasheh/ocfs2-tools -OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/ +:Project web page: http://ocfs2.wiki.kernel.org +:Tools web page: https://github.com/markfasheh/ocfs2-tools +:OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/ All code copyright 2005 Oracle except when otherwise noted. -CREDITS +Credits ======= -Some code taken from ramfs which is Copyright (C) 2000 Linus Torvalds +Some code taken from ramfs which is Copyright |copy| 2000 Linus Torvalds and Transmeta Corp. Mark Fasheh <mark.fasheh@oracle.com> @@ -96,14 +101,19 @@ operation. If the lock succeeds, you'll get an fd. open(2) with O_CREAT to ensure the resource inode is created - dlmfs does not automatically create inodes for existing lock resources. +============ =========================== Open Flag Lock Request Type ---------- ----------------- +============ =========================== O_RDONLY Shared Read O_RDWR Exclusive +============ =========================== + +============ =========================== Open Flag Resulting Locking Behavior ---------- -------------------------- +============ =========================== O_NONBLOCK Trylock operation +============ =========================== You must provide exactly one of O_RDONLY or O_RDWR. diff --git a/Documentation/filesystems/ecryptfs.txt b/Documentation/filesystems/ecryptfs.rst index 01d8a08351ac..1f2edef4c57a 100644 --- a/Documentation/filesystems/ecryptfs.txt +++ b/Documentation/filesystems/ecryptfs.rst @@ -1,14 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================================== eCryptfs: A stacked cryptographic filesystem for Linux +====================================================== eCryptfs is free software. Please see the file COPYING for details. For documentation, please see the files in the doc/ subdirectory. For building and installation instructions please see the INSTALL file. -Maintainer: Phillip Hellewell -Lead developer: Michael A. Halcrow <mhalcrow@us.ibm.com> -Developers: Michael C. Thompson - Kent Yoder -Web Site: http://ecryptfs.sf.net +:Maintainer: Phillip Hellewell +:Lead developer: Michael A. Halcrow <mhalcrow@us.ibm.com> +:Developers: Michael C. Thompson + Kent Yoder +:Web Site: http://ecryptfs.sf.net This software is currently undergoing development. Make sure to maintain a backup copy of any data you write into eCryptfs. @@ -19,34 +23,36 @@ SourceForge site: http://sourceforge.net/projects/ecryptfs/ Userspace requirements include: - - David Howells' userspace keyring headers and libraries (version - 1.0 or higher), obtainable from - http://people.redhat.com/~dhowells/keyutils/ - - Libgcrypt + +- David Howells' userspace keyring headers and libraries (version + 1.0 or higher), obtainable from + http://people.redhat.com/~dhowells/keyutils/ +- Libgcrypt -NOTES +.. note:: -In the beta/experimental releases of eCryptfs, when you upgrade -eCryptfs, you should copy the files to an unencrypted location and -then copy the files back into the new eCryptfs mount to migrate the -files. + In the beta/experimental releases of eCryptfs, when you upgrade + eCryptfs, you should copy the files to an unencrypted location and + then copy the files back into the new eCryptfs mount to migrate the + files. -MOUNT-WIDE PASSPHRASE +Mount-wide Passphrase +===================== Create a new directory into which eCryptfs will write its encrypted files (i.e., /root/crypt). Then, create the mount point directory -(i.e., /mnt/crypt). Now it's time to mount eCryptfs: +(i.e., /mnt/crypt). Now it's time to mount eCryptfs:: -mount -t ecryptfs /root/crypt /mnt/crypt + mount -t ecryptfs /root/crypt /mnt/crypt You should be prompted for a passphrase and a salt (the salt may be blank). -Try writing a new file: +Try writing a new file:: -echo "Hello, World" > /mnt/crypt/hello.txt + echo "Hello, World" > /mnt/crypt/hello.txt The operation will complete. Notice that there is a new file in /root/crypt that is at least 12288 bytes in size (depending on your @@ -59,10 +65,13 @@ keyctl clear @u Then umount /mnt/crypt and mount again per the instructions given above. -cat /mnt/crypt/hello.txt +:: + + cat /mnt/crypt/hello.txt -NOTES +Notes +===== eCryptfs version 0.1 should only be mounted on (1) empty directories or (2) directories containing files only created by eCryptfs. If you diff --git a/Documentation/filesystems/efivarfs.txt b/Documentation/filesystems/efivarfs.rst index 686a64bba775..90ac65683e7e 100644 --- a/Documentation/filesystems/efivarfs.txt +++ b/Documentation/filesystems/efivarfs.rst @@ -1,5 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 +======================================= efivarfs - a (U)EFI variable filesystem +======================================= The efivarfs filesystem was created to address the shortcomings of using entries in sysfs to maintain EFI variables. The old sysfs EFI @@ -11,7 +14,7 @@ than a single page, sysfs isn't the best interface for this. Variables can be created, deleted and modified with the efivarfs filesystem. -efivarfs is typically mounted like this, +efivarfs is typically mounted like this:: mount -t efivarfs none /sys/firmware/efi/efivars diff --git a/Documentation/filesystems/erofs.txt b/Documentation/filesystems/erofs.rst index db6d39c3ae71..bf145171c2bf 100644 --- a/Documentation/filesystems/erofs.txt +++ b/Documentation/filesystems/erofs.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Enhanced Read-Only File System - EROFS +====================================== + Overview ======== @@ -6,6 +12,7 @@ from other read-only file systems, it aims to be designed for flexibility, scalability, but be kept simple and high performance. It is designed as a better filesystem solution for the following scenarios: + - read-only storage media or - part of a fully trusted read-only solution, which means it needs to be @@ -17,6 +24,7 @@ It is designed as a better filesystem solution for the following scenarios: for those embedded devices with limited memory (ex, smartphone); Here is the main features of EROFS: + - Little endian on-disk design; - Currently 4KB block size (nobh) and therefore maximum 16TB address space; @@ -24,13 +32,17 @@ Here is the main features of EROFS: - Metadata & data could be mixed by design; - 2 inode versions for different requirements: + + ===================== ============ ===================================== compact (v1) extended (v2) - Inode metadata size: 32 bytes 64 bytes - Max file size: 4 GB 16 EB (also limited by max. vol size) - Max uids/gids: 65536 4294967296 - File change time: no yes (64 + 32-bit timestamp) - Max hardlinks: 65536 4294967296 - Metadata reserved: 4 bytes 14 bytes + ===================== ============ ===================================== + Inode metadata size 32 bytes 64 bytes + Max file size 4 GB 16 EB (also limited by max. vol size) + Max uids/gids 65536 4294967296 + File change time no yes (64 + 32-bit timestamp) + Max hardlinks 65536 4294967296 + Metadata reserved 4 bytes 14 bytes + ===================== ============ ===================================== - Support extended attributes (xattrs) as an option; @@ -43,29 +55,36 @@ Here is the main features of EROFS: The following git tree provides the file system user-space tools under development (ex, formatting tool mkfs.erofs): ->> git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git + +- git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git Bugs and patches are welcome, please kindly help us and send to the following linux-erofs mailing list: ->> linux-erofs mailing list <linux-erofs@lists.ozlabs.org> + +- linux-erofs mailing list <linux-erofs@lists.ozlabs.org> Mount options ============= +=================== ========================================================= (no)user_xattr Setup Extended User Attributes. Note: xattr is enabled by default if CONFIG_EROFS_FS_XATTR is selected. (no)acl Setup POSIX Access Control List. Note: acl is enabled by default if CONFIG_EROFS_FS_POSIX_ACL is selected. cache_strategy=%s Select a strategy for cached decompression from now on: - disabled: In-place I/O decompression only; - readahead: Cache the last incomplete compressed physical + + ========== ============================================= + disabled In-place I/O decompression only; + readahead Cache the last incomplete compressed physical cluster for further reading. It still does in-place I/O decompression for the rest compressed physical clusters; - readaround: Cache the both ends of incomplete compressed + readaround Cache the both ends of incomplete compressed physical clusters for further reading. It still does in-place I/O decompression for the rest compressed physical clusters. + ========== ============================================= +=================== ========================================================= On-disk details =============== @@ -73,7 +92,7 @@ On-disk details Summary ------- Different from other read-only file systems, an EROFS volume is designed -to be as simple as possible: +to be as simple as possible:: |-> aligned with the block size ____________________________________________________________ @@ -83,41 +102,45 @@ to be as simple as possible: All data areas should be aligned with the block size, but metadata areas may not. All metadatas can be now observed in two different spaces (views): + 1. Inode metadata space + Each valid inode should be aligned with an inode slot, which is a fixed value (32 bytes) and designed to be kept in line with compact inode size. Each inode can be directly found with the following formula: inode offset = meta_blkaddr * block_size + 32 * nid - |-> aligned with 8B - |-> followed closely - + meta_blkaddr blocks |-> another slot - _____________________________________________________________________ - | ... | inode | xattrs | extents | data inline | ... | inode ... - |________|_______|(optional)|(optional)|__(optional)_|_____|__________ - |-> aligned with the inode slot size - . . - . . - . . - . . - . . - . . - .____________________________________________________|-> aligned with 4B - | xattr_ibody_header | shared xattrs | inline xattrs | - |____________________|_______________|_______________| - |-> 12 bytes <-|->x * 4 bytes<-| . - . . . - . . . - . . . - ._______________________________.______________________. - | id | id | id | id | ... | id | ent | ... | ent| ... | - |____|____|____|____|______|____|_____|_____|____|_____| - |-> aligned with 4B - |-> aligned with 4B + :: + + |-> aligned with 8B + |-> followed closely + + meta_blkaddr blocks |-> another slot + _____________________________________________________________________ + | ... | inode | xattrs | extents | data inline | ... | inode ... + |________|_______|(optional)|(optional)|__(optional)_|_____|__________ + |-> aligned with the inode slot size + . . + . . + . . + . . + . . + . . + .____________________________________________________|-> aligned with 4B + | xattr_ibody_header | shared xattrs | inline xattrs | + |____________________|_______________|_______________| + |-> 12 bytes <-|->x * 4 bytes<-| . + . . . + . . . + . . . + ._______________________________.______________________. + | id | id | id | id | ... | id | ent | ... | ent| ... | + |____|____|____|____|______|____|_____|_____|____|_____| + |-> aligned with 4B + |-> aligned with 4B Inode could be 32 or 64 bytes, which can be distinguished from a common - field which all inode versions have -- i_format: + field which all inode versions have -- i_format:: __________________ __________________ | i_format | | i_format | @@ -132,16 +155,19 @@ may not. All metadatas can be now observed in two different spaces (views): proper alignment, and they could be optional for different data mappings. _currently_ total 4 valid data mappings are supported: + == ==================================================================== 0 flat file data without data inline (no extent); 1 fixed-sized output data compression (with non-compacted indexes); 2 flat file data with tail packing data inline (no extent); 3 fixed-sized output data compression (with compacted indexes, v5.3+). + == ==================================================================== The size of the optional xattrs is indicated by i_xattr_count in inode header. Large xattrs or xattrs shared by many different files can be stored in shared xattrs metadata rather than inlined right after inode. 2. Shared xattrs metadata space + Shared xattrs space is similar to the above inode space, started with a specific block indicated by xattr_blkaddr, organized one by one with proper align. @@ -149,11 +175,13 @@ may not. All metadatas can be now observed in two different spaces (views): Each share xattr can also be directly found by the following formula: xattr offset = xattr_blkaddr * block_size + 4 * xattr_id - |-> aligned by 4 bytes - + xattr_blkaddr blocks |-> aligned with 4 bytes - _________________________________________________________________________ - | ... | xattr_entry | xattr data | ... | xattr_entry | xattr data ... - |________|_____________|_____________|_____|______________|_______________ + :: + + |-> aligned by 4 bytes + + xattr_blkaddr blocks |-> aligned with 4 bytes + _________________________________________________________________________ + | ... | xattr_entry | xattr data | ... | xattr_entry | xattr data ... + |________|_____________|_____________|_____|______________|_______________ Directories ----------- @@ -163,19 +191,21 @@ random file lookup, and all directory entries are _strictly_ recorded in alphabetical order in order to support improved prefix binary search algorithm (could refer to the related source code). - ___________________________ - / | - / ______________|________________ - / / | nameoff1 | nameoffN-1 - ____________.______________._______________v________________v__________ -| dirent | dirent | ... | dirent | filename | filename | ... | filename | -|___.0___|____1___|_____|___N-1__|____0_____|____1_____|_____|___N-1____| - \ ^ - \ | * could have - \ | trailing '\0' - \________________________| nameoff0 +:: + + ___________________________ + / | + / ______________|________________ + / / | nameoff1 | nameoffN-1 + ____________.______________._______________v________________v__________ + | dirent | dirent | ... | dirent | filename | filename | ... | filename | + |___.0___|____1___|_____|___N-1__|____0_____|____1_____|_____|___N-1____| + \ ^ + \ | * could have + \ | trailing '\0' + \________________________| nameoff0 - Directory block + Directory block Note that apart from the offset of the first filename, nameoff0 also indicates the total number of directory entries in this block since it is no need to @@ -184,28 +214,27 @@ introduce another on-disk field at all. Compression ----------- Currently, EROFS supports 4KB fixed-sized output transparent file compression, -as illustrated below: - - |---- Variant-Length Extent ----|-------- VLE --------|----- VLE ----- - clusterofs clusterofs clusterofs - | | | logical data -_________v_______________________________v_____________________v_______________ -... | . | | . | | . | ... -____|____.________|_____________|________.____|_____________|__.__________|____ - |-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-| - size size size size size - . . . . - . . . . - . . . . - _______._____________._____________._____________._____________________ - ... | | | | ... physical data - _______|_____________|_____________|_____________|_____________________ - |-> cluster <-|-> cluster <-|-> cluster <-| - size size size +as illustrated below:: + + |---- Variant-Length Extent ----|-------- VLE --------|----- VLE ----- + clusterofs clusterofs clusterofs + | | | logical data + _________v_______________________________v_____________________v_______________ + ... | . | | . | | . | ... + ____|____.________|_____________|________.____|_____________|__.__________|____ + |-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-| + size size size size size + . . . . + . . . . + . . . . + _______._____________._____________._____________._____________________ + ... | | | | ... physical data + _______|_____________|_____________|_____________|_____________________ + |-> cluster <-|-> cluster <-|-> cluster <-| + size size size Currently each on-disk physical cluster can contain 4KB (un)compressed data at most. For each logical cluster, there is a corresponding on-disk index to describe its cluster type, physical cluster address, etc. See "struct z_erofs_vle_decompressed_index" in erofs_fs.h for more details. - diff --git a/Documentation/filesystems/ext2.txt b/Documentation/filesystems/ext2.rst index 94c2cf0292f5..d83dbbb162e2 100644 --- a/Documentation/filesystems/ext2.txt +++ b/Documentation/filesystems/ext2.rst @@ -1,3 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + The Second Extended Filesystem ============================== @@ -14,8 +16,9 @@ Options Most defaults are determined by the filesystem superblock, and can be set using tune2fs(8). Kernel-determined defaults are indicated by (*). -bsddf (*) Makes `df' act like BSD. -minixdf Makes `df' act like Minix. +==================== === ================================================ +bsddf (*) Makes ``df`` act like BSD. +minixdf Makes ``df`` act like Minix. check=none, nocheck (*) Don't do extra checking of bitmaps on mount (check=normal and check=strict options removed) @@ -62,6 +65,7 @@ quota, usrquota Enable user disk quota support grpquota Enable group disk quota support (requires CONFIG_QUOTA). +==================== === ================================================ noquota option ls silently ignored by ext2. @@ -294,9 +298,9 @@ respective fsck programs. If you're exceptionally paranoid, there are 3 ways of making metadata writes synchronous on ext2: -per-file if you have the program source: use the O_SYNC flag to open() -per-file if you don't have the source: use "chattr +S" on the file -per-filesystem: add the "sync" option to mount (or in /etc/fstab) +- per-file if you have the program source: use the O_SYNC flag to open() +- per-file if you don't have the source: use "chattr +S" on the file +- per-filesystem: add the "sync" option to mount (or in /etc/fstab) the first and last are not ext2 specific but do force the metadata to be written synchronously. See also Journaling below. @@ -316,10 +320,12 @@ Most of these limits could be overcome with slight changes in the on-disk format and using a compatibility flag to signal the format change (at the expense of some compatibility). -Filesystem block size: 1kB 2kB 4kB 8kB - -File size limit: 16GB 256GB 2048GB 2048GB -Filesystem size limit: 2047GB 8192GB 16384GB 32768GB +===================== ======= ======= ======= ======== +Filesystem block size 1kB 2kB 4kB 8kB +===================== ======= ======= ======= ======== +File size limit 16GB 256GB 2048GB 2048GB +Filesystem size limit 2047GB 8192GB 16384GB 32768GB +===================== ======= ======= ======= ======== There is a 2.4 kernel limit of 2048GB for a single block device, so no filesystem larger than that can be created at this time. There is also @@ -370,19 +376,24 @@ ext4 and journaling. References ========== +======================= =============================================== The kernel source file:/usr/src/linux/fs/ext2/ e2fsprogs (e2fsck) http://e2fsprogs.sourceforge.net/ Design & Implementation http://e2fsprogs.sourceforge.net/ext2intro.html Journaling (ext3) ftp://ftp.uk.linux.org/pub/linux/sct/fs/jfs/ Filesystem Resizing http://ext2resize.sourceforge.net/ -Compression (*) http://e2compr.sourceforge.net/ +Compression [1]_ http://e2compr.sourceforge.net/ +======================= =============================================== Implementations for: + +======================= =========================================================== Windows 95/98/NT/2000 http://www.chrysocome.net/explore2fs -Windows 95 (*) http://www.yipton.net/content.html#FSDEXT2 -DOS client (*) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ -OS/2 (+) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ +Windows 95 [1]_ http://www.yipton.net/content.html#FSDEXT2 +DOS client [1]_ ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ +OS/2 [2]_ ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ RISC OS client http://www.esw-heim.tu-clausthal.de/~marco/smorbrod/IscaFS/ +======================= =========================================================== -(*) no longer actively developed/supported (as of Apr 2001) -(+) no longer actively developed/supported (as of Mar 2009) +.. [1] no longer actively developed/supported (as of Apr 2001) +.. [2] no longer actively developed/supported (as of Mar 2009) diff --git a/Documentation/filesystems/ext3.txt b/Documentation/filesystems/ext3.rst index 58758fbef9e0..c06cec3a8fdc 100644 --- a/Documentation/filesystems/ext3.txt +++ b/Documentation/filesystems/ext3.rst @@ -1,4 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 +=============== Ext3 Filesystem =============== diff --git a/Documentation/filesystems/f2fs.txt b/Documentation/filesystems/f2fs.rst index 4eb3e2ddd00e..87d794bc75a4 100644 --- a/Documentation/filesystems/f2fs.txt +++ b/Documentation/filesystems/f2fs.rst @@ -1,6 +1,8 @@ -================================================================================ +.. SPDX-License-Identifier: GPL-2.0 + +========================================== WHAT IS Flash-Friendly File System (F2FS)? -================================================================================ +========================================== NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have been equipped on a variety systems ranging from mobile to server systems. Since @@ -20,14 +22,15 @@ layout, but also for selecting allocation and cleaning algorithms. The following git tree provides the file system formatting tool (mkfs.f2fs), a consistency checking tool (fsck.f2fs), and a debugging tool (dump.f2fs). ->> git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git + +- git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git For reporting bugs and sending patches, please use the following mailing list: ->> linux-f2fs-devel@lists.sourceforge.net -================================================================================ -BACKGROUND AND DESIGN ISSUES -================================================================================ +- linux-f2fs-devel@lists.sourceforge.net + +Background and Design issues +============================ Log-structured File System (LFS) -------------------------------- @@ -61,6 +64,7 @@ needs to reclaim these obsolete blocks seamlessly to users. This job is called as a cleaning process. The process consists of three operations as follows. + 1. A victim segment is selected through referencing segment usage table. 2. It loads parent index structures of all the data in the victim identified by segment summary blocks. @@ -71,9 +75,8 @@ This cleaning job may cause unexpected long delays, so the most important goal is to hide the latencies to users. And also definitely, it should reduce the amount of valid data to be moved, and move them quickly as well. -================================================================================ -KEY FEATURES -================================================================================ +Key Features +============ Flash Awareness --------------- @@ -94,10 +97,11 @@ Cleaning Overhead - Support multi-head logs for static/dynamic hot and cold data separation - Introduce adaptive logging for efficient block allocation -================================================================================ -MOUNT OPTIONS -================================================================================ +Mount Options +============= + +====================== ============================================================ background_gc=%s Turn on/off cleaning operations, namely garbage collection, triggered in background when I/O subsystem is idle. If background_gc=on, it will turn on the garbage @@ -167,7 +171,10 @@ fault_injection=%d Enable fault injection in all supported types with fault_type=%d Support configuring fault injection type, should be enabled with fault_injection option, fault type value is shown below, it supports single or combined type. + + =================== =========== Type_Name Type_Value + =================== =========== FAULT_KMALLOC 0x000000001 FAULT_KVMALLOC 0x000000002 FAULT_PAGE_ALLOC 0x000000004 @@ -183,6 +190,7 @@ fault_type=%d Support configuring fault injection type, should be FAULT_CHECKPOINT 0x000001000 FAULT_DISCARD 0x000002000 FAULT_WRITE_IO 0x000004000 + =================== =========== mode=%s Control block allocation mode which supports "adaptive" and "lfs". In "lfs" mode, there should be no random writes towards main area. @@ -219,7 +227,7 @@ fsync_mode=%s Control the policy of fsync. Currently supports "posix", non-atomic files likewise "nobarrier" mount option. test_dummy_encryption Enable dummy encryption, which provides a fake fscrypt context. The fake fscrypt context is used by xfstests. -checkpoint=%s[:%u[%]] Set to "disable" to turn off checkpointing. Set to "enable" +checkpoint=%s[:%u[%]] Set to "disable" to turn off checkpointing. Set to "enable" to reenable checkpointing. Is enabled by default. While disabled, any unmounting or unexpected shutdowns will cause the filesystem contents to appear as they did when the @@ -235,8 +243,8 @@ checkpoint=%s[:%u[%]] Set to "disable" to turn off checkpointing. Set to "en hide up to all remaining free space. The actual space that would be unusable can be viewed at /sys/fs/f2fs/<disk>/unusable This space is reclaimed once checkpoint=enable. -compress_algorithm=%s Control compress algorithm, currently f2fs supports "lzo" - and "lz4" algorithm. +compress_algorithm=%s Control compress algorithm, currently f2fs supports "lzo", + "lz4" and "zstd" algorithm. compress_log_size=%u Support configuring compress cluster size, the size will be 4KB * (1 << %u), 16KB is minimum size, also it's default size. @@ -246,22 +254,22 @@ compress_extension=%s Support adding specified extension, so that f2fs can enab on compression extension list and enable compression on these file by default rather than to enable it via ioctl. For other files, we can still enable compression via ioctl. +====================== ============================================================ -================================================================================ -DEBUGFS ENTRIES -================================================================================ +Debugfs Entries +=============== /sys/kernel/debug/f2fs/ contains information about all the partitions mounted as f2fs. Each file shows the whole f2fs information. /sys/kernel/debug/f2fs/status includes: + - major file system information managed by f2fs currently - average SIT information about whole segments - current memory footprint consumed by f2fs. -================================================================================ -SYSFS ENTRIES -================================================================================ +Sysfs Entries +============= Information about mounted f2fs file systems can be found in /sys/fs/f2fs. Each mounted filesystem will have a directory in @@ -271,22 +279,24 @@ The files in each per-device directory are shown in table below. Files in /sys/fs/f2fs/<devname> (see also Documentation/ABI/testing/sysfs-fs-f2fs) -================================================================================ -USAGE -================================================================================ +Usage +===== 1. Download userland tools and compile them. 2. Skip, if f2fs was compiled statically inside kernel. - Otherwise, insert the f2fs.ko module. - # insmod f2fs.ko + Otherwise, insert the f2fs.ko module:: + + # insmod f2fs.ko -3. Create a directory trying to mount - # mkdir /mnt/f2fs +3. Create a directory trying to mount:: -4. Format the block device, and then mount as f2fs - # mkfs.f2fs -l label /dev/block_device - # mount -t f2fs /dev/block_device /mnt/f2fs + # mkdir /mnt/f2fs + +4. Format the block device, and then mount as f2fs:: + + # mkfs.f2fs -l label /dev/block_device + # mount -t f2fs /dev/block_device /mnt/f2fs mkfs.f2fs --------- @@ -294,18 +304,26 @@ The mkfs.f2fs is for the use of formatting a partition as the f2fs filesystem, which builds a basic on-disk layout. The options consist of: --l [label] : Give a volume label, up to 512 unicode name. --a [0 or 1] : Split start location of each area for heap-based allocation. - 1 is set by default, which performs this. --o [int] : Set overprovision ratio in percent over volume size. - 5 is set by default. --s [int] : Set the number of segments per section. - 1 is set by default. --z [int] : Set the number of sections per zone. - 1 is set by default. --e [str] : Set basic extension list. e.g. "mp3,gif,mov" --t [0 or 1] : Disable discard command or not. - 1 is set by default, which conducts discard. + +=============== =========================================================== +``-l [label]`` Give a volume label, up to 512 unicode name. +``-a [0 or 1]`` Split start location of each area for heap-based allocation. + + 1 is set by default, which performs this. +``-o [int]`` Set overprovision ratio in percent over volume size. + + 5 is set by default. +``-s [int]`` Set the number of segments per section. + + 1 is set by default. +``-z [int]`` Set the number of sections per zone. + + 1 is set by default. +``-e [str]`` Set basic extension list. e.g. "mp3,gif,mov" +``-t [0 or 1]`` Disable discard command or not. + + 1 is set by default, which conducts discard. +=============== =========================================================== fsck.f2fs --------- @@ -314,7 +332,8 @@ partition, which examines whether the filesystem metadata and user-made data are cross-referenced correctly or not. Note that, initial version of the tool does not fix any inconsistency. -The options consist of: +The options consist of:: + -d debug level [default:0] dump.f2fs @@ -327,20 +346,21 @@ It shows on-disk inode information recognized by a given inode number, and is able to dump all the SSA and SIT entries into predefined files, ./dump_ssa and ./dump_sit respectively. -The options consist of: +The options consist of:: + -d debug level [default:0] -i inode no (hex) -s [SIT dump segno from #1~#2 (decimal), for all 0~-1] -a [SSA dump segno from #1~#2 (decimal), for all 0~-1] -Examples: -# dump.f2fs -i [ino] /dev/sdx -# dump.f2fs -s 0~-1 /dev/sdx (SIT dump) -# dump.f2fs -a 0~-1 /dev/sdx (SSA dump) +Examples:: + + # dump.f2fs -i [ino] /dev/sdx + # dump.f2fs -s 0~-1 /dev/sdx (SIT dump) + # dump.f2fs -a 0~-1 /dev/sdx (SSA dump) -================================================================================ -DESIGN -================================================================================ +Design +====== On-disk Layout -------------- @@ -351,7 +371,7 @@ consists of a set of sections. By default, section and zone sizes are set to one segment size identically, but users can easily modify the sizes by mkfs. F2FS splits the entire volume into six areas, and all the areas except superblock -consists of multiple segments as described below. +consists of multiple segments as described below:: align with the zone size <-| |-> align with the segment size @@ -373,28 +393,28 @@ consists of multiple segments as described below. |__zone__| - Superblock (SB) - : It is located at the beginning of the partition, and there exist two copies + It is located at the beginning of the partition, and there exist two copies to avoid file system crash. It contains basic partition information and some default parameters of f2fs. - Checkpoint (CP) - : It contains file system information, bitmaps for valid NAT/SIT sets, orphan + It contains file system information, bitmaps for valid NAT/SIT sets, orphan inode lists, and summary entries of current active segments. - Segment Information Table (SIT) - : It contains segment information such as valid block count and bitmap for the + It contains segment information such as valid block count and bitmap for the validity of all the blocks. - Node Address Table (NAT) - : It is composed of a block address table for all the node blocks stored in + It is composed of a block address table for all the node blocks stored in Main area. - Segment Summary Area (SSA) - : It contains summary entries which contains the owner information of all the + It contains summary entries which contains the owner information of all the data and node blocks stored in Main area. - Main Area - : It contains file and directory data including their indices. + It contains file and directory data including their indices. In order to avoid misalignment between file system and flash-based storage, F2FS aligns the start block address of CP with the segment size. Also, it aligns the @@ -414,7 +434,7 @@ One of them always indicates the last valid data, which is called as shadow copy mechanism. In addition to CP, NAT and SIT also adopt the shadow copy mechanism. For file system consistency, each CP points to which NAT and SIT copies are -valid, as shown as below. +valid, as shown as below:: +--------+----------+---------+ | CP | SIT | NAT | @@ -438,7 +458,7 @@ indirect node. F2FS assigns 4KB to an inode block which contains 923 data block indices, two direct node pointers, two indirect node pointers, and one double indirect node pointer as described below. One direct node block contains 1018 data blocks, and one indirect node block contains also 1018 node blocks. Thus, -one inode block (i.e., a file) covers: +one inode block (i.e., a file) covers:: 4KB * (923 + 2 * 1018 + 2 * 1018 * 1018 + 1018 * 1018 * 1018) := 3.94TB. @@ -473,6 +493,8 @@ A dentry block consists of 214 dentry slots and file names. Therein a bitmap is used to represent whether each dentry is valid or not. A dentry block occupies 4KB with the following composition. +:: + Dentry Block(4 K) = bitmap (27 bytes) + reserved (3 bytes) + dentries(11 * 214 bytes) + file name (8 * 214 bytes) @@ -498,23 +520,25 @@ F2FS implements multi-level hash tables for directory structure. Each level has a hash table with dedicated number of hash buckets as shown below. Note that "A(2B)" means a bucket includes 2 data blocks. ----------------------- -A : bucket -B : block -N : MAX_DIR_HASH_DEPTH ----------------------- +:: + + ---------------------- + A : bucket + B : block + N : MAX_DIR_HASH_DEPTH + ---------------------- -level #0 | A(2B) - | -level #1 | A(2B) - A(2B) - | -level #2 | A(2B) - A(2B) - A(2B) - A(2B) - . | . . . . -level #N/2 | A(2B) - A(2B) - A(2B) - A(2B) - A(2B) - ... - A(2B) - . | . . . . -level #N | A(4B) - A(4B) - A(4B) - A(4B) - A(4B) - ... - A(4B) + level #0 | A(2B) + | + level #1 | A(2B) - A(2B) + | + level #2 | A(2B) - A(2B) - A(2B) - A(2B) + . | . . . . + level #N/2 | A(2B) - A(2B) - A(2B) - A(2B) - A(2B) - ... - A(2B) + . | . . . . + level #N | A(4B) - A(4B) - A(4B) - A(4B) - A(4B) - ... - A(4B) -The number of blocks and buckets are determined by, +The number of blocks and buckets are determined by:: ,- 2, if n < MAX_DIR_HASH_DEPTH / 2, # of blocks in level #n = | @@ -532,7 +556,7 @@ dentry consisting of the file name and its inode number. If not found, F2FS scans the next hash table in level #1. In this way, F2FS scans hash tables in each levels incrementally from 1 to N. In each levels F2FS needs to scan only one bucket determined by the following equation, which shows O(log(# of files)) -complexity. +complexity:: bucket number to scan in level #n = (hash value) % (# of buckets in level #n) @@ -540,7 +564,8 @@ In the case of file creation, F2FS finds empty consecutive slots that cover the file name. F2FS searches the empty slots in the hash tables of whole levels from 1 to N in the same way as the lookup operation. -The following figure shows an example of two cases holding children. +The following figure shows an example of two cases holding children:: + --------------> Dir <-------------- | | child child @@ -611,14 +636,15 @@ Write-hint Policy 2) whint_mode=user-based. F2FS tries to pass down hints given by users. +===================== ======================== =================== User F2FS Block ----- ---- ----- +===================== ======================== =================== META WRITE_LIFE_NOT_SET HOT_NODE " WARM_NODE " COLD_NODE " -*ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME -*extension list " " +ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME +extension list " " -- buffered io WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME @@ -635,11 +661,13 @@ WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET WRITE_LIFE_NONE " WRITE_LIFE_NONE WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM WRITE_LIFE_LONG " WRITE_LIFE_LONG +===================== ======================== =================== 3) whint_mode=fs-based. F2FS passes down hints with its policy. +===================== ======================== =================== User F2FS Block ----- ---- ----- +===================== ======================== =================== META WRITE_LIFE_MEDIUM; HOT_NODE WRITE_LIFE_NOT_SET WARM_NODE " @@ -662,6 +690,7 @@ WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET WRITE_LIFE_NONE " WRITE_LIFE_NONE WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM WRITE_LIFE_LONG " WRITE_LIFE_LONG +===================== ======================== =================== Fallocate(2) Policy ------------------- @@ -681,6 +710,7 @@ Allocating disk space However, once F2FS receives ioctl(fd, F2FS_IOC_SET_PIN_FILE) in prior to fallocate(fd, DEFAULT_MODE), it allocates on-disk blocks addressess having zero or random data, which is useful to the below scenario where: + 1. create(fd) 2. ioctl(fd, F2FS_IOC_SET_PIN_FILE) 3. fallocate(fd, 0, 0, size) @@ -692,39 +722,41 @@ Compression implementation -------------------------- - New term named cluster is defined as basic unit of compression, file can -be divided into multiple clusters logically. One cluster includes 4 << n -(n >= 0) logical pages, compression size is also cluster size, each of -cluster can be compressed or not. + be divided into multiple clusters logically. One cluster includes 4 << n + (n >= 0) logical pages, compression size is also cluster size, each of + cluster can be compressed or not. - In cluster metadata layout, one special block address is used to indicate -cluster is compressed one or normal one, for compressed cluster, following -metadata maps cluster to [1, 4 << n - 1] physical blocks, in where f2fs -stores data including compress header and compressed data. + cluster is compressed one or normal one, for compressed cluster, following + metadata maps cluster to [1, 4 << n - 1] physical blocks, in where f2fs + stores data including compress header and compressed data. - In order to eliminate write amplification during overwrite, F2FS only -support compression on write-once file, data can be compressed only when -all logical blocks in file are valid and cluster compress ratio is lower -than specified threshold. + support compression on write-once file, data can be compressed only when + all logical blocks in file are valid and cluster compress ratio is lower + than specified threshold. - To enable compression on regular inode, there are three ways: -* chattr +c file -* chattr +c dir; touch dir/file -* mount w/ -o compress_extension=ext; touch file.ext - -Compress metadata layout: - [Dnode Structure] - +-----------------------------------------------+ - | cluster 1 | cluster 2 | ......... | cluster N | - +-----------------------------------------------+ - . . . . - . . . . - . Compressed Cluster . . Normal Cluster . -+----------+---------+---------+---------+ +---------+---------+---------+---------+ -|compr flag| block 1 | block 2 | block 3 | | block 1 | block 2 | block 3 | block 4 | -+----------+---------+---------+---------+ +---------+---------+---------+---------+ - . . - . . - . . - +-------------+-------------+----------+----------------------------+ - | data length | data chksum | reserved | compressed data | - +-------------+-------------+----------+----------------------------+ + + * chattr +c file + * chattr +c dir; touch dir/file + * mount w/ -o compress_extension=ext; touch file.ext + +Compress metadata layout:: + + [Dnode Structure] + +-----------------------------------------------+ + | cluster 1 | cluster 2 | ......... | cluster N | + +-----------------------------------------------+ + . . . . + . . . . + . Compressed Cluster . . Normal Cluster . + +----------+---------+---------+---------+ +---------+---------+---------+---------+ + |compr flag| block 1 | block 2 | block 3 | | block 1 | block 2 | block 3 | block 4 | + +----------+---------+---------+---------+ +---------+---------+---------+---------+ + . . + . . + . . + +-------------+-------------+----------+----------------------------+ + | data length | data chksum | reserved | compressed data | + +-------------+-------------+----------+----------------------------+ diff --git a/Documentation/filesystems/fiemap.txt b/Documentation/filesystems/fiemap.txt index f6d9c99103a4..ac87e6fda842 100644 --- a/Documentation/filesystems/fiemap.txt +++ b/Documentation/filesystems/fiemap.txt @@ -115,8 +115,10 @@ data. Note that the opposite is not true - it would be valid for FIEMAP_EXTENT_NOT_ALIGNED to appear alone. * FIEMAP_EXTENT_LAST -This is the last extent in the file. A mapping attempt past this -extent will return nothing. +This is generally the last extent in the file. A mapping attempt past +this extent may return nothing. Some implementations set this flag to +indicate this extent is the last one in the range queried by the user +(via fiemap->fm_length). * FIEMAP_EXTENT_UNKNOWN The location of this extent is currently unknown. This may indicate diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst index bd9932344804..aa072112cfff 100644 --- a/Documentation/filesystems/fscrypt.rst +++ b/Documentation/filesystems/fscrypt.rst @@ -633,6 +633,17 @@ from a passphrase or other low-entropy user credential. FS_IOC_GET_ENCRYPTION_PWSALT is deprecated. Instead, prefer to generate and manage any needed salt(s) in userspace. +Getting a file's encryption nonce +--------------------------------- + +Since Linux v5.7, the ioctl FS_IOC_GET_ENCRYPTION_NONCE is supported. +On encrypted files and directories it gets the inode's 16-byte nonce. +On unencrypted files and directories, it fails with ENODATA. + +This ioctl can be useful for automated tests which verify that the +encryption is being done correctly. It is not needed for normal use +of fscrypt. + Adding keys ----------- diff --git a/Documentation/filesystems/fuse.rst b/Documentation/filesystems/fuse.rst index 8e455065ce9e..cd717f9bf940 100644 --- a/Documentation/filesystems/fuse.rst +++ b/Documentation/filesystems/fuse.rst @@ -1,7 +1,8 @@ .. SPDX-License-Identifier: GPL-2.0 -============== + +==== FUSE -============== +==== Definitions =========== diff --git a/Documentation/filesystems/gfs2-uevents.txt b/Documentation/filesystems/gfs2-uevents.rst index 19a19ebebc34..f162a2c76c69 100644 --- a/Documentation/filesystems/gfs2-uevents.txt +++ b/Documentation/filesystems/gfs2-uevents.rst @@ -1,14 +1,18 @@ - uevents and GFS2 - ================== +.. SPDX-License-Identifier: GPL-2.0 + +================ +uevents and GFS2 +================ During the lifetime of a GFS2 mount, a number of uevents are generated. This document explains what the events are and what they are used for (by gfs_controld in gfs2-utils). A list of GFS2 uevents ------------------------ +====================== 1. ADD +------ The ADD event occurs at mount time. It will always be the first uevent generated by the newly created filesystem. If the mount @@ -21,6 +25,7 @@ with no journal assigned), and read-only (with journal assigned) status of the filesystem respectively. 2. ONLINE +--------- The ONLINE uevent is generated after a successful mount or remount. It has the same environment variables as the ADD uevent. The ONLINE @@ -29,6 +34,7 @@ RDONLY are a relatively recent addition (2.6.32-rc+) and will not be generated by older kernels. 3. CHANGE +--------- The CHANGE uevent is used in two places. One is when reporting the successful mount of the filesystem by the first node (FIRSTMOUNT=Done). @@ -52,6 +58,7 @@ cluster. For this reason the ONLINE uevent was used when adding a new uevent for a successful mount or remount. 4. OFFLINE +---------- The OFFLINE uevent is only generated due to filesystem errors and is used as part of the "withdraw" mechanism. Currently this doesn't give any @@ -59,6 +66,7 @@ information about what the error is, which is something that needs to be fixed. 5. REMOVE +--------- The REMOVE uevent is generated at the end of an unsuccessful mount or at the end of a umount of the filesystem. All REMOVE uevents will @@ -68,9 +76,10 @@ kobject subsystem. Information common to all GFS2 uevents (uevent environment variables) ----------------------------------------------------------------------- +===================================================================== 1. LOCKTABLE= +-------------- The LOCKTABLE is a string, as supplied on the mount command line (locktable=) or via fstab. It is used as a filesystem label @@ -78,6 +87,7 @@ as well as providing the information for a lock_dlm mount to be able to join the cluster. 2. LOCKPROTO= +------------- The LOCKPROTO is a string, and its value depends on what is set on the mount command line, or via fstab. It will be either @@ -85,12 +95,14 @@ lock_nolock or lock_dlm. In the future other lock managers may be supported. 3. JOURNALID= +------------- If a journal is in use by the filesystem (journals are not assigned for spectator mounts) then this will give the numeric journal id in all GFS2 uevents. 4. UUID= +-------- With recent versions of gfs2-utils, mkfs.gfs2 writes a UUID into the filesystem superblock. If it exists, this will diff --git a/Documentation/filesystems/gfs2.txt b/Documentation/filesystems/gfs2.rst index cc4f2306609e..8d1ab589ce18 100644 --- a/Documentation/filesystems/gfs2.txt +++ b/Documentation/filesystems/gfs2.rst @@ -1,5 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== Global File System ------------------- +================== https://fedorahosted.org/cluster/wiki/HomePage @@ -14,16 +17,18 @@ on one machine show up immediately on all other machines in the cluster. GFS uses interchangeable inter-node locking mechanisms, the currently supported mechanisms are: - lock_nolock -- allows gfs to be used as a local file system + lock_nolock + - allows gfs to be used as a local file system - lock_dlm -- uses a distributed lock manager (dlm) for inter-node locking - The dlm is found at linux/fs/dlm/ + lock_dlm + - uses a distributed lock manager (dlm) for inter-node locking. + The dlm is found at linux/fs/dlm/ Lock_dlm depends on user space cluster management systems found at the URL above. To use gfs as a local file system, no external clustering systems are -needed, simply: +needed, simply:: $ mkfs -t gfs2 -p lock_nolock -j 1 /dev/block_device $ mount -t gfs2 /dev/block_device /dir @@ -37,9 +42,12 @@ GFS2 is not on-disk compatible with previous versions of GFS, but it is pretty close. The following man pages can be found at the URL above: + + ============ ============================================= fsck.gfs2 to repair a filesystem gfs2_grow to expand a filesystem online gfs2_jadd to add journals to a filesystem online tunegfs2 to manipulate, examine and tune a filesystem - gfs2_convert to convert a gfs filesystem to gfs2 in-place + gfs2_convert to convert a gfs filesystem to gfs2 in-place mkfs.gfs2 to make a filesystem + ============ ============================================= diff --git a/Documentation/filesystems/hfs.txt b/Documentation/filesystems/hfs.rst index d096df6db07a..ab17a005e9b1 100644 --- a/Documentation/filesystems/hfs.txt +++ b/Documentation/filesystems/hfs.rst @@ -1,11 +1,16 @@ -Note: This filesystem doesn't have a maintainer. +.. SPDX-License-Identifier: GPL-2.0 +================================== Macintosh HFS Filesystem for Linux ================================== -HFS stands for ``Hierarchical File System'' and is the filesystem used + +.. Note:: This filesystem doesn't have a maintainer. + + +HFS stands for ``Hierarchical File System`` and is the filesystem used by the Mac Plus and all later Macintosh models. Earlier Macintosh -models used MFS (``Macintosh File System''), which is not supported, +models used MFS (``Macintosh File System``), which is not supported, MacOS 8.1 and newer support a filesystem called HFS+ that's similar to HFS but is extended in various areas. Use the hfsplus filesystem driver to access such filesystems from Linux. @@ -49,25 +54,25 @@ Writing to HFS Filesystems HFS is not a UNIX filesystem, thus it does not have the usual features you'd expect: - o You can't modify the set-uid, set-gid, sticky or executable bits or the uid + * You can't modify the set-uid, set-gid, sticky or executable bits or the uid and gid of files. - o You can't create hard- or symlinks, device files, sockets or FIFOs. + * You can't create hard- or symlinks, device files, sockets or FIFOs. HFS does on the other have the concepts of multiple forks per file. These non-standard forks are represented as hidden additional files in the normal filesystems namespace which is kind of a cludge and makes the semantics for the a little strange: - o You can't create, delete or rename resource forks of files or the + * You can't create, delete or rename resource forks of files or the Finder's metadata. - o They are however created (with default values), deleted and renamed + * They are however created (with default values), deleted and renamed along with the corresponding data fork or directory. - o Copying files to a different filesystem will loose those attributes + * Copying files to a different filesystem will loose those attributes that are essential for MacOS to work. Creating HFS filesystems -=================================== +======================== The hfsutils package from Robert Leslie contains a program called hformat that can be used to create HFS filesystem. See diff --git a/Documentation/filesystems/hfsplus.txt b/Documentation/filesystems/hfsplus.rst index 59f7569fc9ed..f02f4f5fc020 100644 --- a/Documentation/filesystems/hfsplus.txt +++ b/Documentation/filesystems/hfsplus.rst @@ -1,4 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 +====================================== Macintosh HFSPlus Filesystem for Linux ====================================== diff --git a/Documentation/filesystems/hpfs.txt b/Documentation/filesystems/hpfs.rst index 74630bd504fb..0db152278572 100644 --- a/Documentation/filesystems/hpfs.txt +++ b/Documentation/filesystems/hpfs.rst @@ -1,13 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== Read/Write HPFS 2.09 +==================== + 1998-2004, Mikulas Patocka -email: mikulas@artax.karlin.mff.cuni.cz -homepage: http://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi +:email: mikulas@artax.karlin.mff.cuni.cz +:homepage: http://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi -CREDITS: +Credits +======= Chris Smith, 1993, original read-only HPFS, some code and hpfs structures file is taken from it + Jacques Gelinas, MSDos mmap, Inspired by fs/nfs/mmap.c (Jon Tombs 15 Aug 1993) + Werner Almesberger, 1992, 1993, MSDos option parser & CR/LF conversion Mount options @@ -50,6 +58,7 @@ timeshift=(-)nnn (default 0) File names +========== As in OS/2, filenames are case insensitive. However, shell thinks that names are case sensitive, so for example when you create a file FOO, you can use @@ -64,6 +73,7 @@ access it under names 'a.', 'a..', 'a . . . ' etc. Extended attributes +=================== On HPFS partitions, OS/2 can associate to each file a special information called extended attributes. Extended attributes are pairs of (key,value) where key is @@ -88,6 +98,7 @@ values doesn't work. Symlinks +======== You can do symlinks on HPFS partition, symlinks are achieved by setting extended attribute named "SYMLINK" with symlink value. Like on ext2, you can chown and @@ -101,6 +112,7 @@ to analyze or change OS2SYS.INI. Codepages +========= HPFS can contain several uppercasing tables for several codepages and each file has a pointer to codepage its name is in. However OS/2 was created in @@ -128,6 +140,7 @@ this codepage - if you don't try to do what I described above :-) Known bugs +========== HPFS386 on OS/2 server is not supported. HPFS386 installed on normal OS/2 client should work. If you have OS/2 server, use only read-only mode. I don't know how @@ -152,7 +165,8 @@ would result in directory tree splitting, that takes disk space. Workaround is to delete other files that are leaf (probability that the file is non-leaf is about 1/50) or to truncate file first to make some space. You encounter this problem only if you have many directories so that -preallocated directory band is full i.e. +preallocated directory band is full i.e.:: + number_of_directories / size_of_filesystem_in_mb > 4. You can't delete open directories. @@ -174,6 +188,7 @@ anybody know what does it mean? What does "unbalanced tree" message mean? +========================================= Old versions of this driver created sometimes unbalanced dnode trees. OS/2 chkdsk doesn't scream if the tree is unbalanced (and sometimes creates @@ -187,6 +202,7 @@ whole created by this driver, it is BUG - let me know about it. Bugs in OS/2 +============ When you have two (or more) lost directories pointing each to other, chkdsk locks up when repairing filesystem. @@ -199,98 +215,139 @@ File names like "a .b" are marked as 'long' by OS/2 but chkdsk "corrects" it and marks them as short (and writes "minor fs error corrected"). This bug is not in HPFS386. -Codepage bugs described above. +Codepage bugs described above +============================= If you don't install fixpacks, there are many, many more... History +======= + +====== ========================================================================= +0.90 First public release +0.91 Fixed bug that caused shooting to memory when write_inode was called on + open inode (rarely happened) +0.92 Fixed a little memory leak in freeing directory inodes +0.93 Fixed bug that locked up the machine when there were too many filenames + with first 15 characters same + Fixed write_file to zero file when writing behind file end +0.94 Fixed a little memory leak when trying to delete busy file or directory +0.95 Fixed a bug that i_hpfs_parent_dir was not updated when moving files +1.90 First version for 2.1.1xx kernels +1.91 Fixed a bug that chk_sectors failed when sectors were at the end of disk + Fixed a race-condition when write_inode is called while deleting file + Fixed a bug that could possibly happen (with very low probability) when + using 0xff in filenames. + + Rewritten locking to avoid race-conditions + + Mount option 'eas' now works + + Fsync no longer returns error + + Files beginning with '.' are marked hidden + + Remount support added + + Alloc is not so slow when filesystem becomes full + + Atimes are no more updated because it slows down operation + + Code cleanup (removed all commented debug prints) +1.92 Corrected a bug when sync was called just before closing file +1.93 Modified, so that it works with kernels >= 2.1.131, I don't know if it + works with previous versions + + Fixed a possible problem with disks > 64G (but I don't have one, so I can't + test it) + + Fixed a file overflow at 2G + + Added new option 'timeshift' + + Changed behaviour on HPFS386: It is now possible to operate on HPFS386 in + read-only mode + + Fixed a bug that slowed down alloc and prevented allocating 100% space + (this bug was not destructive) +1.94 Added workaround for one bug in Linux + + Fixed one buffer leak + + Fixed some incompatibilities with large extended attributes (but it's still + not 100% ok, I have no info on it and OS/2 doesn't want to create them) + + Rewritten allocation -0.90 First public release -0.91 Fixed bug that caused shooting to memory when write_inode was called on - open inode (rarely happened) -0.92 Fixed a little memory leak in freeing directory inodes -0.93 Fixed bug that locked up the machine when there were too many filenames - with first 15 characters same - Fixed write_file to zero file when writing behind file end -0.94 Fixed a little memory leak when trying to delete busy file or directory -0.95 Fixed a bug that i_hpfs_parent_dir was not updated when moving files -1.90 First version for 2.1.1xx kernels -1.91 Fixed a bug that chk_sectors failed when sectors were at the end of disk - Fixed a race-condition when write_inode is called while deleting file - Fixed a bug that could possibly happen (with very low probability) when - using 0xff in filenames - Rewritten locking to avoid race-conditions - Mount option 'eas' now works - Fsync no longer returns error - Files beginning with '.' are marked hidden - Remount support added - Alloc is not so slow when filesystem becomes full - Atimes are no more updated because it slows down operation - Code cleanup (removed all commented debug prints) -1.92 Corrected a bug when sync was called just before closing file -1.93 Modified, so that it works with kernels >= 2.1.131, I don't know if it - works with previous versions - Fixed a possible problem with disks > 64G (but I don't have one, so I can't - test it) - Fixed a file overflow at 2G - Added new option 'timeshift' - Changed behaviour on HPFS386: It is now possible to operate on HPFS386 in - read-only mode - Fixed a bug that slowed down alloc and prevented allocating 100% space - (this bug was not destructive) -1.94 Added workaround for one bug in Linux - Fixed one buffer leak - Fixed some incompatibilities with large extended attributes (but it's still - not 100% ok, I have no info on it and OS/2 doesn't want to create them) - Rewritten allocation - Fixed a bug with i_blocks (du sometimes didn't display correct values) - Directories have no longer archive attribute set (some programs don't like - it) - Fixed a bug that it set badly one flag in large anode tree (it was not - destructive) -1.95 Fixed one buffer leak, that could happen on corrupted filesystem - Fixed one bug in allocation in 1.94 -1.96 Added workaround for one bug in OS/2 (HPFS locked up, HPFS386 reported - error sometimes when opening directories in PMSHELL) - Fixed a possible bitmap race - Fixed possible problem on large disks - You can now delete open files - Fixed a nondestructive race in rename -1.97 Support for HPFS v3 (on large partitions) - Fixed a bug that it didn't allow creation of files > 128M (it should be 2G) + Fixed a bug with i_blocks (du sometimes didn't display correct values) + + Directories have no longer archive attribute set (some programs don't like + it) + + Fixed a bug that it set badly one flag in large anode tree (it was not + destructive) +1.95 Fixed one buffer leak, that could happen on corrupted filesystem + + Fixed one bug in allocation in 1.94 +1.96 Added workaround for one bug in OS/2 (HPFS locked up, HPFS386 reported + error sometimes when opening directories in PMSHELL) + + Fixed a possible bitmap race + + Fixed possible problem on large disks + + You can now delete open files + + Fixed a nondestructive race in rename +1.97 Support for HPFS v3 (on large partitions) + + ZFixed a bug that it didn't allow creation of files > 128M + (it should be 2G) 1.97.1 Changed names of global symbols + Fixed a bug when chmoding or chowning root directory -1.98 Fixed a deadlock when using old_readdir - Better directory handling; workaround for "unbalanced tree" bug in OS/2 -1.99 Corrected a possible problem when there's not enough space while deleting - file - Now it tries to truncate the file if there's not enough space when deleting - Removed a lot of redundant code -2.00 Fixed a bug in rename (it was there since 1.96) - Better anti-fragmentation strategy -2.01 Fixed problem with directory listing over NFS - Directory lseek now checks for proper parameters - Fixed race-condition in buffer code - it is in all filesystems in Linux; - when reading device (cat /dev/hda) while creating files on it, files - could be damaged -2.02 Workaround for bug in breada in Linux. breada could cause accesses beyond - end of partition -2.03 Char, block devices and pipes are correctly created - Fixed non-crashing race in unlink (Alexander Viro) - Now it works with Japanese version of OS/2 -2.04 Fixed error when ftruncate used to extend file -2.05 Fixed crash when got mount parameters without = - Fixed crash when allocation of anode failed due to full disk - Fixed some crashes when block io or inode allocation failed -2.06 Fixed some crash on corrupted disk structures - Better allocation strategy - Reschedule points added so that it doesn't lock CPU long time - It should work in read-only mode on Warp Server -2.07 More fixes for Warp Server. Now it really works -2.08 Creating new files is not so slow on large disks - An attempt to sync deleted file does not generate filesystem error -2.09 Fixed error on extremely fragmented files - - - vim: set textwidth=80: +1.98 Fixed a deadlock when using old_readdir + Better directory handling; workaround for "unbalanced tree" bug in OS/2 +1.99 Corrected a possible problem when there's not enough space while deleting + file + + Now it tries to truncate the file if there's not enough space when + deleting + + Removed a lot of redundant code +2.00 Fixed a bug in rename (it was there since 1.96) + Better anti-fragmentation strategy +2.01 Fixed problem with directory listing over NFS + + Directory lseek now checks for proper parameters + + Fixed race-condition in buffer code - it is in all filesystems in Linux; + when reading device (cat /dev/hda) while creating files on it, files + could be damaged +2.02 Workaround for bug in breada in Linux. breada could cause accesses beyond + end of partition +2.03 Char, block devices and pipes are correctly created + + Fixed non-crashing race in unlink (Alexander Viro) + + Now it works with Japanese version of OS/2 +2.04 Fixed error when ftruncate used to extend file +2.05 Fixed crash when got mount parameters without = + + Fixed crash when allocation of anode failed due to full disk + + Fixed some crashes when block io or inode allocation failed +2.06 Fixed some crash on corrupted disk structures + + Better allocation strategy + + Reschedule points added so that it doesn't lock CPU long time + + It should work in read-only mode on Warp Server +2.07 More fixes for Warp Server. Now it really works +2.08 Creating new files is not so slow on large disks + + An attempt to sync deleted file does not generate filesystem error +2.09 Fixed error on extremely fragmented files +====== ========================================================================= diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst index 386eaad008b2..e7b46dac7079 100644 --- a/Documentation/filesystems/index.rst +++ b/Documentation/filesystems/index.rst @@ -1,3 +1,5 @@ +.. _filesystems_index: + =============================== Filesystems in the Linux kernel =============================== @@ -46,8 +48,53 @@ Documentation for filesystem implementations. .. toctree:: :maxdepth: 2 + 9p + adfs + affs + afs autofs + autofs-mount-control + befs + bfs + btrfs + ceph + cramfs + debugfs + dlmfs + ecryptfs + efivarfs + erofs + ext2 + ext3 + f2fs + gfs2 + gfs2-uevents + hfs + hfsplus + hpfs fuse + inotify + isofs + nilfs2 + nfs/index + ntfs + ocfs2 + ocfs2-online-filecheck + omfs + orangefs overlayfs + proc + qnx6 + ramfs-rootfs-initramfs + relay + romfs + squashfs + sysfs + sysv-fs + tmpfs + ubifs + ubifs-authentication.rst + udf virtiofs vfat + zonefs diff --git a/Documentation/filesystems/inotify.txt b/Documentation/filesystems/inotify.rst index 51f61db787fb..7f7ef8af0e1e 100644 --- a/Documentation/filesystems/inotify.txt +++ b/Documentation/filesystems/inotify.rst @@ -1,27 +1,36 @@ - inotify - a powerful yet simple file change notification system +.. SPDX-License-Identifier: GPL-2.0 + +=============================================================== +Inotify - A Powerful yet Simple File Change Notification System +=============================================================== Document started 15 Mar 2005 by Robert Love <rml@novell.com> + Document updated 4 Jan 2015 by Zhang Zhen <zhenzhang.zhang@huawei.com> - --Deleted obsoleted interface, just refer to manpages for user interface. + + - Deleted obsoleted interface, just refer to manpages for user interface. (i) Rationale -Q: What is the design decision behind not tying the watch to the open fd of +Q: + What is the design decision behind not tying the watch to the open fd of the watched object? -A: Watches are associated with an open inotify device, not an open file. +A: + Watches are associated with an open inotify device, not an open file. This solves the primary problem with dnotify: keeping the file open pins the file and thus, worse, pins the mount. Dnotify is therefore infeasible for use on a desktop system with removable media as the media cannot be unmounted. Watching a file should not require that it be open. -Q: What is the design decision behind using an-fd-per-instance as opposed to +Q: + What is the design decision behind using an-fd-per-instance as opposed to an fd-per-watch? -A: An fd-per-watch quickly consumes more file descriptors than are allowed, +A: + An fd-per-watch quickly consumes more file descriptors than are allowed, more fd's than are feasible to manage, and more fd's than are optimally select()-able. Yes, root can bump the per-process fd limit and yes, users can use epoll, but requiring both is a silly and extraneous requirement. @@ -29,8 +38,8 @@ A: An fd-per-watch quickly consumes more file descriptors than are allowed, spaces is thus sensible. The current design is what user-space developers want: Users initialize inotify, once, and add n watches, requiring but one fd and no twiddling with fd limits. Initializing an inotify instance two - thousand times is silly. If we can implement user-space's preferences - cleanly--and we can, the idr layer makes stuff like this trivial--then we + thousand times is silly. If we can implement user-space's preferences + cleanly--and we can, the idr layer makes stuff like this trivial--then we should. There are other good arguments. With a single fd, there is a single @@ -65,9 +74,11 @@ A: An fd-per-watch quickly consumes more file descriptors than are allowed, need not be a one-fd-per-process mapping; it is one-fd-per-queue and a process can easily want more than one queue. -Q: Why the system call approach? +Q: + Why the system call approach? -A: The poor user-space interface is the second biggest problem with dnotify. +A: + The poor user-space interface is the second biggest problem with dnotify. Signals are a terrible, terrible interface for file notification. Or for anything, for that matter. The ideal solution, from all perspectives, is a file descriptor-based one that allows basic file I/O and poll/select. diff --git a/Documentation/filesystems/isofs.rst b/Documentation/filesystems/isofs.rst new file mode 100644 index 000000000000..08fd469091d4 --- /dev/null +++ b/Documentation/filesystems/isofs.rst @@ -0,0 +1,64 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== +ISO9660 Filesystem +================== + +Mount options that are the same as for msdos and vfat partitions. + + ========= ======================================================== + gid=nnn All files in the partition will be in group nnn. + uid=nnn All files in the partition will be owned by user id nnn. + umask=nnn The permission mask (see umask(1)) for the partition. + ========= ======================================================== + +Mount options that are the same as vfat partitions. These are only useful +when using discs encoded using Microsoft's Joliet extensions. + + ============== ============================================================= + iocharset=name Character set to use for converting from Unicode to + ASCII. Joliet filenames are stored in Unicode format, but + Unix for the most part doesn't know how to deal with Unicode. + There is also an option of doing UTF-8 translations with the + utf8 option. + utf8 Encode Unicode names in UTF-8 format. Default is no. + ============== ============================================================= + +Mount options unique to the isofs filesystem. + + ================= ============================================================ + block=512 Set the block size for the disk to 512 bytes + block=1024 Set the block size for the disk to 1024 bytes + block=2048 Set the block size for the disk to 2048 bytes + check=relaxed Matches filenames with different cases + check=strict Matches only filenames with the exact same case + cruft Try to handle badly formatted CDs. + map=off Do not map non-Rock Ridge filenames to lower case + map=normal Map non-Rock Ridge filenames to lower case + map=acorn As map=normal but also apply Acorn extensions if present + mode=xxx Sets the permissions on files to xxx unless Rock Ridge + extensions set the permissions otherwise + dmode=xxx Sets the permissions on directories to xxx unless Rock Ridge + extensions set the permissions otherwise + overriderockperm Set permissions on files and directories according to + 'mode' and 'dmode' even though Rock Ridge extensions are + present. + nojoliet Ignore Joliet extensions if they are present. + norock Ignore Rock Ridge extensions if they are present. + hide Completely strip hidden files from the file system. + showassoc Show files marked with the 'associated' bit + unhide Deprecated; showing hidden files is now default; + If given, it is a synonym for 'showassoc' which will + recreate previous unhide behavior + session=x Select number of session on multisession CD + sbsector=xxx Session begins from sector xxx + ================= ============================================================ + +Recommended documents about ISO 9660 standard are located at: + +- http://www.y-adagio.com/ +- ftp://ftp.ecma.ch/ecma-st/Ecma-119.pdf + +Quoting from the PDF "This 2nd Edition of Standard ECMA-119 is technically +identical with ISO 9660.", so it is a valid and gratis substitute of the +official ISO specification. diff --git a/Documentation/filesystems/isofs.txt b/Documentation/filesystems/isofs.txt deleted file mode 100644 index ba0a93384de0..000000000000 --- a/Documentation/filesystems/isofs.txt +++ /dev/null @@ -1,48 +0,0 @@ -Mount options that are the same as for msdos and vfat partitions. - - gid=nnn All files in the partition will be in group nnn. - uid=nnn All files in the partition will be owned by user id nnn. - umask=nnn The permission mask (see umask(1)) for the partition. - -Mount options that are the same as vfat partitions. These are only useful -when using discs encoded using Microsoft's Joliet extensions. - iocharset=name Character set to use for converting from Unicode to - ASCII. Joliet filenames are stored in Unicode format, but - Unix for the most part doesn't know how to deal with Unicode. - There is also an option of doing UTF-8 translations with the - utf8 option. - utf8 Encode Unicode names in UTF-8 format. Default is no. - -Mount options unique to the isofs filesystem. - block=512 Set the block size for the disk to 512 bytes - block=1024 Set the block size for the disk to 1024 bytes - block=2048 Set the block size for the disk to 2048 bytes - check=relaxed Matches filenames with different cases - check=strict Matches only filenames with the exact same case - cruft Try to handle badly formatted CDs. - map=off Do not map non-Rock Ridge filenames to lower case - map=normal Map non-Rock Ridge filenames to lower case - map=acorn As map=normal but also apply Acorn extensions if present - mode=xxx Sets the permissions on files to xxx unless Rock Ridge - extensions set the permissions otherwise - dmode=xxx Sets the permissions on directories to xxx unless Rock Ridge - extensions set the permissions otherwise - overriderockperm Set permissions on files and directories according to - 'mode' and 'dmode' even though Rock Ridge extensions are - present. - nojoliet Ignore Joliet extensions if they are present. - norock Ignore Rock Ridge extensions if they are present. - hide Completely strip hidden files from the file system. - showassoc Show files marked with the 'associated' bit - unhide Deprecated; showing hidden files is now default; - If given, it is a synonym for 'showassoc' which will - recreate previous unhide behavior - session=x Select number of session on multisession CD - sbsector=xxx Session begins from sector xxx - -Recommended documents about ISO 9660 standard are located at: -http://www.y-adagio.com/ -ftp://ftp.ecma.ch/ecma-st/Ecma-119.pdf -Quoting from the PDF "This 2nd Edition of Standard ECMA-119 is technically -identical with ISO 9660.", so it is a valid and gratis substitute of the -official ISO specification. diff --git a/Documentation/filesystems/nfs/index.rst b/Documentation/filesystems/nfs/index.rst new file mode 100644 index 000000000000..65805624e39b --- /dev/null +++ b/Documentation/filesystems/nfs/index.rst @@ -0,0 +1,13 @@ +=============================== +NFS +=============================== + + +.. toctree:: + :maxdepth: 1 + + pnfs + rpc-cache + rpc-server-gss + nfs41-server + knfsd-stats diff --git a/Documentation/filesystems/nfs/knfsd-stats.txt b/Documentation/filesystems/nfs/knfsd-stats.rst index 1a5d82180b84..80bcf13550de 100644 --- a/Documentation/filesystems/nfs/knfsd-stats.txt +++ b/Documentation/filesystems/nfs/knfsd-stats.rst @@ -1,7 +1,9 @@ - +============================ Kernel NFS Server Statistics ============================ +:Authors: Greg Banks <gnb@sgi.com> - 26 Mar 2009 + This document describes the format and semantics of the statistics which the kernel NFS server makes available to userspace. These statistics are available in several text form pseudo files, each of @@ -18,7 +20,7 @@ by parsing routines. All other lines contain a sequence of fields separated by whitespace. /proc/fs/nfsd/pool_stats ------------------------- +======================== This file is available in kernels from 2.6.30 onwards, if the /proc/fs/nfsd filesystem is mounted (it almost always should be). @@ -109,15 +111,12 @@ this case), or the transport can be enqueued for later attention (sockets-enqueued counts this case), or the packet can be temporarily deferred because the transport is currently being used by an nfsd thread. This last case is not very interesting and is not explicitly -counted, but can be inferred from the other counters thus: +counted, but can be inferred from the other counters thus:: -packets-deferred = packets-arrived - ( sockets-enqueued + threads-woken ) + packets-deferred = packets-arrived - ( sockets-enqueued + threads-woken ) More ----- -Descriptions of the other statistics file should go here. - +==== -Greg Banks <gnb@sgi.com> -26 Mar 2009 +Descriptions of the other statistics file should go here. diff --git a/Documentation/filesystems/nfs/nfs41-server.rst b/Documentation/filesystems/nfs/nfs41-server.rst new file mode 100644 index 000000000000..16b5f02f81c3 --- /dev/null +++ b/Documentation/filesystems/nfs/nfs41-server.rst @@ -0,0 +1,256 @@ +============================= +NFSv4.1 Server Implementation +============================= + +Server support for minorversion 1 can be controlled using the +/proc/fs/nfsd/versions control file. The string output returned +by reading this file will contain either "+4.1" or "-4.1" +correspondingly. + +Currently, server support for minorversion 1 is enabled by default. +It can be disabled at run time by writing the string "-4.1" to +the /proc/fs/nfsd/versions control file. Note that to write this +control file, the nfsd service must be taken down. You can use rpc.nfsd +for this; see rpc.nfsd(8). + +(Warning: older servers will interpret "+4.1" and "-4.1" as "+4" and +"-4", respectively. Therefore, code meant to work on both new and old +kernels must turn 4.1 on or off *before* turning support for version 4 +on or off; rpc.nfsd does this correctly.) + +The NFSv4 minorversion 1 (NFSv4.1) implementation in nfsd is based +on RFC 5661. + +From the many new features in NFSv4.1 the current implementation +focuses on the mandatory-to-implement NFSv4.1 Sessions, providing +"exactly once" semantics and better control and throttling of the +resources allocated for each client. + +The table below, taken from the NFSv4.1 document, lists +the operations that are mandatory to implement (REQ), optional +(OPT), and NFSv4.0 operations that are required not to implement (MNI) +in minor version 1. The first column indicates the operations that +are not supported yet by the linux server implementation. + +The OPTIONAL features identified and their abbreviations are as follows: + +- **pNFS** Parallel NFS +- **FDELG** File Delegations +- **DDELG** Directory Delegations + +The following abbreviations indicate the linux server implementation status. + +- **I** Implemented NFSv4.1 operations. +- **NS** Not Supported. +- **NS\*** Unimplemented optional feature. + +Operations +========== + ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| Implementation status | Operation | REQ,REC, OPT or NMI | Feature (REQ, REC or OPT) | Definition | ++=======================+======================+=====================+===========================+================+ +| | ACCESS | REQ | | Section 18.1 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | BACKCHANNEL_CTL | REQ | | Section 18.33 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | BIND_CONN_TO_SESSION | REQ | | Section 18.34 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | CLOSE | REQ | | Section 18.2 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | COMMIT | REQ | | Section 18.3 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | CREATE | REQ | | Section 18.4 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | CREATE_SESSION | REQ | | Section 18.36 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS* | DELEGPURGE | OPT | FDELG (REQ) | Section 18.5 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | DELEGRETURN | OPT | FDELG, | Section 18.6 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | | | DDELG, pNFS | | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | | | (REQ) | | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | DESTROY_CLIENTID | REQ | | Section 18.50 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | DESTROY_SESSION | REQ | | Section 18.37 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | EXCHANGE_ID | REQ | | Section 18.35 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | FREE_STATEID | REQ | | Section 18.38 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | GETATTR | REQ | | Section 18.7 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | GETDEVICEINFO | OPT | pNFS (REQ) | Section 18.40 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS* | GETDEVICELIST | OPT | pNFS (OPT) | Section 18.41 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | GETFH | REQ | | Section 18.8 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS* | GET_DIR_DELEGATION | OPT | DDELG (REQ) | Section 18.39 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | LAYOUTCOMMIT | OPT | pNFS (REQ) | Section 18.42 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | LAYOUTGET | OPT | pNFS (REQ) | Section 18.43 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | LAYOUTRETURN | OPT | pNFS (REQ) | Section 18.44 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LINK | OPT | | Section 18.9 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LOCK | REQ | | Section 18.10 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LOCKT | REQ | | Section 18.11 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LOCKU | REQ | | Section 18.12 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LOOKUP | REQ | | Section 18.13 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | LOOKUPP | REQ | | Section 18.14 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | NVERIFY | REQ | | Section 18.15 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | OPEN | REQ | | Section 18.16 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS* | OPENATTR | OPT | | Section 18.17 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | OPEN_CONFIRM | MNI | | N/A | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | OPEN_DOWNGRADE | REQ | | Section 18.18 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | PUTFH | REQ | | Section 18.19 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | PUTPUBFH | REQ | | Section 18.20 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | PUTROOTFH | REQ | | Section 18.21 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | READ | REQ | | Section 18.22 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | READDIR | REQ | | Section 18.23 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | READLINK | OPT | | Section 18.24 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | RECLAIM_COMPLETE | REQ | | Section 18.51 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | RELEASE_LOCKOWNER | MNI | | N/A | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | REMOVE | REQ | | Section 18.25 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | RENAME | REQ | | Section 18.26 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | RENEW | MNI | | N/A | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | RESTOREFH | REQ | | Section 18.27 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | SAVEFH | REQ | | Section 18.28 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | SECINFO | REQ | | Section 18.29 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | SECINFO_NO_NAME | REC | pNFS files | Section 18.45, | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | | | layout (REQ) | Section 13.12 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | SEQUENCE | REQ | | Section 18.46 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | SETATTR | REQ | | Section 18.30 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | SETCLIENTID | MNI | | N/A | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | SETCLIENTID_CONFIRM | MNI | | N/A | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS | SET_SSV | REQ | | Section 18.47 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| I | TEST_STATEID | REQ | | Section 18.48 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | VERIFY | REQ | | Section 18.31 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| NS* | WANT_DELEGATION | OPT | FDELG (OPT) | Section 18.49 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ +| | WRITE | REQ | | Section 18.32 | ++-----------------------+----------------------+---------------------+---------------------------+----------------+ + + +Callback Operations +=================== ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| Implementation status | Operation | REQ,REC, OPT or NMI | Feature (REQ, REC or OPT) | Definition | ++=======================+=========================+=====================+===========================+===============+ +| | CB_GETATTR | OPT | FDELG (REQ) | Section 20.1 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| I | CB_LAYOUTRECALL | OPT | pNFS (REQ) | Section 20.3 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_NOTIFY | OPT | DDELG (REQ) | Section 20.4 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_NOTIFY_DEVICEID | OPT | pNFS (OPT) | Section 20.12 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_NOTIFY_LOCK | OPT | | Section 20.11 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_PUSH_DELEG | OPT | FDELG (OPT) | Section 20.5 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | CB_RECALL | OPT | FDELG, | Section 20.2 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | DDELG, pNFS | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | (REQ) | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_RECALL_ANY | OPT | FDELG, | Section 20.6 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | DDELG, pNFS | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | (REQ) | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS | CB_RECALL_SLOT | REQ | | Section 20.8 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_RECALLABLE_OBJ_AVAIL | OPT | DDELG, pNFS | Section 20.7 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | (REQ) | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| I | CB_SEQUENCE | OPT | FDELG, | Section 20.9 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | DDELG, pNFS | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | (REQ) | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| NS* | CB_WANTS_CANCELLED | OPT | FDELG, | Section 20.10 | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | DDELG, pNFS | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ +| | | | (REQ) | | ++-----------------------+-------------------------+---------------------+---------------------------+---------------+ + + +Implementation notes: +===================== + +SSV: + The spec claims this is mandatory, but we don't actually know of any + implementations, so we're ignoring it for now. The server returns + NFS4ERR_ENCR_ALG_UNSUPP on EXCHANGE_ID, which should be future-proof. + +GSS on the backchannel: + Again, theoretically required but not widely implemented (in + particular, the current Linux client doesn't request it). We return + NFS4ERR_ENCR_ALG_UNSUPP on CREATE_SESSION. + +DELEGPURGE: + mandatory only for servers that support CLAIM_DELEGATE_PREV and/or + CLAIM_DELEG_PREV_FH (which allows clients to keep delegations that + persist across client reboots). Thus we need not implement this for + now. + +EXCHANGE_ID: + implementation ids are ignored + +CREATE_SESSION: + backchannel attributes are ignored + +SEQUENCE: + no support for dynamic slot table renegotiation (optional) + +Nonstandard compound limitations: + No support for a sessions fore channel RPC compound that requires both a + ca_maxrequestsize request and a ca_maxresponsesize reply, so we may + fail to live up to the promise we made in CREATE_SESSION fore channel + negotiation. + +See also http://wiki.linux-nfs.org/wiki/index.php/Server_4.0_and_4.1_issues. diff --git a/Documentation/filesystems/nfs/nfs41-server.txt b/Documentation/filesystems/nfs/nfs41-server.txt deleted file mode 100644 index 682a59fabe3f..000000000000 --- a/Documentation/filesystems/nfs/nfs41-server.txt +++ /dev/null @@ -1,173 +0,0 @@ -NFSv4.1 Server Implementation - -Server support for minorversion 1 can be controlled using the -/proc/fs/nfsd/versions control file. The string output returned -by reading this file will contain either "+4.1" or "-4.1" -correspondingly. - -Currently, server support for minorversion 1 is enabled by default. -It can be disabled at run time by writing the string "-4.1" to -the /proc/fs/nfsd/versions control file. Note that to write this -control file, the nfsd service must be taken down. You can use rpc.nfsd -for this; see rpc.nfsd(8). - -(Warning: older servers will interpret "+4.1" and "-4.1" as "+4" and -"-4", respectively. Therefore, code meant to work on both new and old -kernels must turn 4.1 on or off *before* turning support for version 4 -on or off; rpc.nfsd does this correctly.) - -The NFSv4 minorversion 1 (NFSv4.1) implementation in nfsd is based -on RFC 5661. - -From the many new features in NFSv4.1 the current implementation -focuses on the mandatory-to-implement NFSv4.1 Sessions, providing -"exactly once" semantics and better control and throttling of the -resources allocated for each client. - -The table below, taken from the NFSv4.1 document, lists -the operations that are mandatory to implement (REQ), optional -(OPT), and NFSv4.0 operations that are required not to implement (MNI) -in minor version 1. The first column indicates the operations that -are not supported yet by the linux server implementation. - -The OPTIONAL features identified and their abbreviations are as follows: - pNFS Parallel NFS - FDELG File Delegations - DDELG Directory Delegations - -The following abbreviations indicate the linux server implementation status. - I Implemented NFSv4.1 operations. - NS Not Supported. - NS* Unimplemented optional feature. - -Operations - - +----------------------+------------+--------------+----------------+ - | Operation | REQ, REC, | Feature | Definition | - | | OPT, or | (REQ, REC, | | - | | MNI | or OPT) | | - +----------------------+------------+--------------+----------------+ - | ACCESS | REQ | | Section 18.1 | -I | BACKCHANNEL_CTL | REQ | | Section 18.33 | -I | BIND_CONN_TO_SESSION | REQ | | Section 18.34 | - | CLOSE | REQ | | Section 18.2 | - | COMMIT | REQ | | Section 18.3 | - | CREATE | REQ | | Section 18.4 | -I | CREATE_SESSION | REQ | | Section 18.36 | -NS*| DELEGPURGE | OPT | FDELG (REQ) | Section 18.5 | - | DELEGRETURN | OPT | FDELG, | Section 18.6 | - | | | DDELG, pNFS | | - | | | (REQ) | | -I | DESTROY_CLIENTID | REQ | | Section 18.50 | -I | DESTROY_SESSION | REQ | | Section 18.37 | -I | EXCHANGE_ID | REQ | | Section 18.35 | -I | FREE_STATEID | REQ | | Section 18.38 | - | GETATTR | REQ | | Section 18.7 | -I | GETDEVICEINFO | OPT | pNFS (REQ) | Section 18.40 | -NS*| GETDEVICELIST | OPT | pNFS (OPT) | Section 18.41 | - | GETFH | REQ | | Section 18.8 | -NS*| GET_DIR_DELEGATION | OPT | DDELG (REQ) | Section 18.39 | -I | LAYOUTCOMMIT | OPT | pNFS (REQ) | Section 18.42 | -I | LAYOUTGET | OPT | pNFS (REQ) | Section 18.43 | -I | LAYOUTRETURN | OPT | pNFS (REQ) | Section 18.44 | - | LINK | OPT | | Section 18.9 | - | LOCK | REQ | | Section 18.10 | - | LOCKT | REQ | | Section 18.11 | - | LOCKU | REQ | | Section 18.12 | - | LOOKUP | REQ | | Section 18.13 | - | LOOKUPP | REQ | | Section 18.14 | - | NVERIFY | REQ | | Section 18.15 | - | OPEN | REQ | | Section 18.16 | -NS*| OPENATTR | OPT | | Section 18.17 | - | OPEN_CONFIRM | MNI | | N/A | - | OPEN_DOWNGRADE | REQ | | Section 18.18 | - | PUTFH | REQ | | Section 18.19 | - | PUTPUBFH | REQ | | Section 18.20 | - | PUTROOTFH | REQ | | Section 18.21 | - | READ | REQ | | Section 18.22 | - | READDIR | REQ | | Section 18.23 | - | READLINK | OPT | | Section 18.24 | - | RECLAIM_COMPLETE | REQ | | Section 18.51 | - | RELEASE_LOCKOWNER | MNI | | N/A | - | REMOVE | REQ | | Section 18.25 | - | RENAME | REQ | | Section 18.26 | - | RENEW | MNI | | N/A | - | RESTOREFH | REQ | | Section 18.27 | - | SAVEFH | REQ | | Section 18.28 | - | SECINFO | REQ | | Section 18.29 | -I | SECINFO_NO_NAME | REC | pNFS files | Section 18.45, | - | | | layout (REQ) | Section 13.12 | -I | SEQUENCE | REQ | | Section 18.46 | - | SETATTR | REQ | | Section 18.30 | - | SETCLIENTID | MNI | | N/A | - | SETCLIENTID_CONFIRM | MNI | | N/A | -NS | SET_SSV | REQ | | Section 18.47 | -I | TEST_STATEID | REQ | | Section 18.48 | - | VERIFY | REQ | | Section 18.31 | -NS*| WANT_DELEGATION | OPT | FDELG (OPT) | Section 18.49 | - | WRITE | REQ | | Section 18.32 | - -Callback Operations - - +-------------------------+-----------+-------------+---------------+ - | Operation | REQ, REC, | Feature | Definition | - | | OPT, or | (REQ, REC, | | - | | MNI | or OPT) | | - +-------------------------+-----------+-------------+---------------+ - | CB_GETATTR | OPT | FDELG (REQ) | Section 20.1 | -I | CB_LAYOUTRECALL | OPT | pNFS (REQ) | Section 20.3 | -NS*| CB_NOTIFY | OPT | DDELG (REQ) | Section 20.4 | -NS*| CB_NOTIFY_DEVICEID | OPT | pNFS (OPT) | Section 20.12 | -NS*| CB_NOTIFY_LOCK | OPT | | Section 20.11 | -NS*| CB_PUSH_DELEG | OPT | FDELG (OPT) | Section 20.5 | - | CB_RECALL | OPT | FDELG, | Section 20.2 | - | | | DDELG, pNFS | | - | | | (REQ) | | -NS*| CB_RECALL_ANY | OPT | FDELG, | Section 20.6 | - | | | DDELG, pNFS | | - | | | (REQ) | | -NS | CB_RECALL_SLOT | REQ | | Section 20.8 | -NS*| CB_RECALLABLE_OBJ_AVAIL | OPT | DDELG, pNFS | Section 20.7 | - | | | (REQ) | | -I | CB_SEQUENCE | OPT | FDELG, | Section 20.9 | - | | | DDELG, pNFS | | - | | | (REQ) | | -NS*| CB_WANTS_CANCELLED | OPT | FDELG, | Section 20.10 | - | | | DDELG, pNFS | | - | | | (REQ) | | - +-------------------------+-----------+-------------+---------------+ - -Implementation notes: - -SSV: -* The spec claims this is mandatory, but we don't actually know of any - implementations, so we're ignoring it for now. The server returns - NFS4ERR_ENCR_ALG_UNSUPP on EXCHANGE_ID, which should be future-proof. - -GSS on the backchannel: -* Again, theoretically required but not widely implemented (in - particular, the current Linux client doesn't request it). We return - NFS4ERR_ENCR_ALG_UNSUPP on CREATE_SESSION. - -DELEGPURGE: -* mandatory only for servers that support CLAIM_DELEGATE_PREV and/or - CLAIM_DELEG_PREV_FH (which allows clients to keep delegations that - persist across client reboots). Thus we need not implement this for - now. - -EXCHANGE_ID: -* implementation ids are ignored - -CREATE_SESSION: -* backchannel attributes are ignored - -SEQUENCE: -* no support for dynamic slot table renegotiation (optional) - -Nonstandard compound limitations: -* No support for a sessions fore channel RPC compound that requires both a - ca_maxrequestsize request and a ca_maxresponsesize reply, so we may - fail to live up to the promise we made in CREATE_SESSION fore channel - negotiation. - -See also http://wiki.linux-nfs.org/wiki/index.php/Server_4.0_and_4.1_issues. diff --git a/Documentation/filesystems/nfs/pnfs.txt b/Documentation/filesystems/nfs/pnfs.rst index 80dc0bdc302a..7c470ecdc3a9 100644 --- a/Documentation/filesystems/nfs/pnfs.txt +++ b/Documentation/filesystems/nfs/pnfs.rst @@ -1,15 +1,17 @@ -Reference counting in pnfs: +========================== +Reference counting in pnfs ========================== The are several inter-related caches. We have layouts which can reference multiple devices, each of which can reference multiple data servers. Each data server can be referenced by multiple devices. Each device -can be referenced by multiple layouts. To keep all of this straight, +can be referenced by multiple layouts. To keep all of this straight, we need to reference count. struct pnfs_layout_hdr ----------------------- +====================== + The on-the-wire command LAYOUTGET corresponds to struct pnfs_layout_segment, usually referred to by the variable name lseg. Each nfs_inode may hold a pointer to a cache of these layout @@ -25,7 +27,8 @@ the reference count, as the layout is kept around by the lseg that keeps it in the list. deviceid_cache --------------- +============== + lsegs reference device ids, which are resolved per nfs_client and layout driver type. The device ids are held in a RCU cache (struct nfs4_deviceid_cache). The cache itself is referenced across each @@ -38,24 +41,26 @@ justification, but seems reasonable given that we can have multiple deviceid's per filesystem, and multiple filesystems per nfs_client. The hash code is copied from the nfsd code base. A discussion of -hashing and variations of this algorithm can be found at: -http://groups.google.com/group/comp.lang.c/browse_thread/thread/9522965e2b8d3809 +hashing and variations of this algorithm can be found `here. +<http://groups.google.com/group/comp.lang.c/browse_thread/thread/9522965e2b8d3809>`_ data server cache ------------------ +================= + file driver devices refer to data servers, which are kept in a module level cache. Its reference is held over the lifetime of the deviceid pointing to it. lseg ----- +==== + lseg maintains an extra reference corresponding to the NFS_LSEG_VALID bit which holds it in the pnfs_layout_hdr's list. When the final lseg is removed from the pnfs_layout_hdr's list, the NFS_LAYOUT_DESTROYED bit is set, preventing any new lsegs from being added. layout drivers --------------- +============== PNFS utilizes what is called layout drivers. The STD defines 4 basic layout types: "files", "objects", "blocks", and "flexfiles". For each @@ -68,6 +73,6 @@ Blocks-layout-driver code is in: fs/nfs/blocklayout/.. directory Flexfiles-layout-driver code is in: fs/nfs/flexfilelayout/.. directory blocks-layout setup -------------------- +=================== TODO: Document the setup needs of the blocks layout driver diff --git a/Documentation/filesystems/nfs/rpc-cache.txt b/Documentation/filesystems/nfs/rpc-cache.rst index c4dac829db0f..bb164eea969b 100644 --- a/Documentation/filesystems/nfs/rpc-cache.txt +++ b/Documentation/filesystems/nfs/rpc-cache.rst @@ -1,9 +1,14 @@ - This document gives a brief introduction to the caching +========= +RPC Cache +========= + +This document gives a brief introduction to the caching mechanisms in the sunrpc layer that is used, in particular, for NFS authentication. -CACHES +Caches ====== + The caching replaces the old exports table and allows for a wide variety of values to be caches. @@ -12,6 +17,7 @@ quite possibly very different in content and use. There is a corpus of common code for managing these caches. Examples of caches that are likely to be needed are: + - mapping from IP address to client name - mapping from client name and filesystem to export options - mapping from UID to list of GIDs, to work around NFS's limitation @@ -21,6 +27,7 @@ Examples of caches that are likely to be needed are: - mapping from network identify to public key for crypto authentication. The common code handles such things as: + - general cache lookup with correct locking - supporting 'NEGATIVE' as well as positive entries - allowing an EXPIRED time on cache items, and removing @@ -35,60 +42,66 @@ The common code handles such things as: Creating a Cache ---------------- -1/ A cache needs a datum to store. This is in the form of a - structure definition that must contain a - struct cache_head +- A cache needs a datum to store. This is in the form of a + structure definition that must contain a struct cache_head as an element, usually the first. It will also contain a key and some content. Each cache element is reference counted and contains expiry and update times for use in cache management. -2/ A cache needs a "cache_detail" structure that +- A cache needs a "cache_detail" structure that describes the cache. This stores the hash table, some parameters for cache management, and some operations detailing how to work with particular cache items. - The operations requires are: - struct cache_head *alloc(void) - This simply allocates appropriate memory and returns - a pointer to the cache_detail embedded within the - structure - void cache_put(struct kref *) - This is called when the last reference to an item is - dropped. The pointer passed is to the 'ref' field - in the cache_head. cache_put should release any - references create by 'cache_init' and, if CACHE_VALID - is set, any references created by cache_update. - It should then release the memory allocated by - 'alloc'. - int match(struct cache_head *orig, struct cache_head *new) - test if the keys in the two structures match. Return - 1 if they do, 0 if they don't. - void init(struct cache_head *orig, struct cache_head *new) - Set the 'key' fields in 'new' from 'orig'. This may - include taking references to shared objects. - void update(struct cache_head *orig, struct cache_head *new) - Set the 'content' fileds in 'new' from 'orig'. - int cache_show(struct seq_file *m, struct cache_detail *cd, - struct cache_head *h) - Optional. Used to provide a /proc file that lists the - contents of a cache. This should show one item, - usually on just one line. - int cache_request(struct cache_detail *cd, struct cache_head *h, - char **bpp, int *blen) - Format a request to be send to user-space for an item - to be instantiated. *bpp is a buffer of size *blen. - bpp should be moved forward over the encoded message, - and *blen should be reduced to show how much free - space remains. Return 0 on success or <0 if not - enough room or other problem. - int cache_parse(struct cache_detail *cd, char *buf, int len) - A message from user space has arrived to fill out a - cache entry. It is in 'buf' of length 'len'. - cache_parse should parse this, find the item in the - cache with sunrpc_cache_lookup_rcu, and update the item - with sunrpc_cache_update. - - -3/ A cache needs to be registered using cache_register(). This + + The operations are: + + struct cache_head \*alloc(void) + This simply allocates appropriate memory and returns + a pointer to the cache_detail embedded within the + structure + + void cache_put(struct kref \*) + This is called when the last reference to an item is + dropped. The pointer passed is to the 'ref' field + in the cache_head. cache_put should release any + references create by 'cache_init' and, if CACHE_VALID + is set, any references created by cache_update. + It should then release the memory allocated by + 'alloc'. + + int match(struct cache_head \*orig, struct cache_head \*new) + test if the keys in the two structures match. Return + 1 if they do, 0 if they don't. + + void init(struct cache_head \*orig, struct cache_head \*new) + Set the 'key' fields in 'new' from 'orig'. This may + include taking references to shared objects. + + void update(struct cache_head \*orig, struct cache_head \*new) + Set the 'content' fileds in 'new' from 'orig'. + + int cache_show(struct seq_file \*m, struct cache_detail \*cd, struct cache_head \*h) + Optional. Used to provide a /proc file that lists the + contents of a cache. This should show one item, + usually on just one line. + + int cache_request(struct cache_detail \*cd, struct cache_head \*h, char \*\*bpp, int \*blen) + Format a request to be send to user-space for an item + to be instantiated. \*bpp is a buffer of size \*blen. + bpp should be moved forward over the encoded message, + and \*blen should be reduced to show how much free + space remains. Return 0 on success or <0 if not + enough room or other problem. + + int cache_parse(struct cache_detail \*cd, char \*buf, int len) + A message from user space has arrived to fill out a + cache entry. It is in 'buf' of length 'len'. + cache_parse should parse this, find the item in the + cache with sunrpc_cache_lookup_rcu, and update the item + with sunrpc_cache_update. + + +- A cache needs to be registered using cache_register(). This includes it on a list of caches that will be regularly cleaned to discard old data. @@ -107,7 +120,7 @@ cache_check will return -ENOENT in the entry is negative or if an up call is needed but not possible, -EAGAIN if an upcall is pending, or 0 if the data is valid; -cache_check can be passed a "struct cache_req *". This structure is +cache_check can be passed a "struct cache_req\*". This structure is typically embedded in the actual request and can be used to create a deferred copy of the request (struct cache_deferred_req). This is done when the found cache item is not uptodate, but the is reason to @@ -139,9 +152,11 @@ The 'channel' works a bit like a datagram socket. Each 'write' is passed as a whole to the cache for parsing and interpretation. Each cache can treat the write requests differently, but it is expected that a message written will contain: + - a key - an expiry time - a content. + with the intention that an item in the cache with the give key should be create or updated to have the given content, and the expiry time should be set on that item. @@ -156,7 +171,8 @@ If there are no more requests to return, read will return EOF, but a select or poll for read will block waiting for another request to be added. -Thus a user-space helper is likely to: +Thus a user-space helper is likely to:: + open the channel. select for readable read a request @@ -175,12 +191,13 @@ Each cache should also define a "cache_request" method which takes a cache item and encodes a request into the buffer provided. -Note: If a cache has no active readers on the channel, and has had not -active readers for more than 60 seconds, further requests will not be -added to the channel but instead all lookups that do not find a valid -entry will fail. This is partly for backward compatibility: The -previous nfs exports table was deemed to be authoritative and a -failed lookup meant a definite 'no'. +.. note:: + If a cache has no active readers on the channel, and has had not + active readers for more than 60 seconds, further requests will not be + added to the channel but instead all lookups that do not find a valid + entry will fail. This is partly for backward compatibility: The + previous nfs exports table was deemed to be authoritative and a + failed lookup meant a definite 'no'. request/response format ----------------------- @@ -193,10 +210,11 @@ with precisely one newline character which should be at the end. Fields within the record should be separated by spaces, normally one. If spaces, newlines, or nul characters are needed in a field they much be quoted. two mechanisms are available: -1/ If a field begins '\x' then it must contain an even number of + +- If a field begins '\x' then it must contain an even number of hex digits, and pairs of these digits provide the bytes in the field. -2/ otherwise a \ in the field must be followed by 3 octal digits +- otherwise a \ in the field must be followed by 3 octal digits which give the code for a byte. Other characters are treated as them selves. At the very least, space, newline, nul, and '\' must be quoted in this way. diff --git a/Documentation/filesystems/nfs/rpc-server-gss.txt b/Documentation/filesystems/nfs/rpc-server-gss.rst index 310bbbaf9080..812754576845 100644 --- a/Documentation/filesystems/nfs/rpc-server-gss.txt +++ b/Documentation/filesystems/nfs/rpc-server-gss.rst @@ -1,4 +1,4 @@ - +========================================= rpcsec_gss support for kernel RPC servers ========================================= @@ -9,14 +9,17 @@ NFSv4.1 and higher don't require the client to act as a server for the purposes of authentication.) RPCGSS is specified in a few IETF documents: + - RFC2203 v1: http://tools.ietf.org/rfc/rfc2203.txt - RFC5403 v2: http://tools.ietf.org/rfc/rfc5403.txt + and there is a 3rd version being proposed: + - http://tools.ietf.org/id/draft-williams-rpcsecgssv3.txt (At draft n. 02 at the time of writing) Background ----------- +========== The RPCGSS Authentication method describes a way to perform GSSAPI Authentication for NFS. Although GSSAPI is itself completely mechanism @@ -29,6 +32,7 @@ depends on GSSAPI extensions that are KRB5 specific. GSSAPI is a complex library, and implementing it completely in kernel is unwarranted. However GSSAPI operations are fundementally separable in 2 parts: + - initial context establishment - integrity/privacy protection (signing and encrypting of individual packets) @@ -41,7 +45,7 @@ kernel, but leave the initial context establishment to userspace. We need upcalls to request userspace to perform context establishment. NFS Server Legacy Upcall Mechanism ----------------------------------- +================================== The classic upcall mechanism uses a custom text based upcall mechanism to talk to a custom daemon called rpc.svcgssd that is provide by the @@ -62,21 +66,20 @@ groups) due to limitation on the size of the buffer that can be send back to the kernel (4KiB). NFS Server New RPC Upcall Mechanism ------------------------------------ +=================================== The newer upcall mechanism uses RPC over a unix socket to a daemon called gss-proxy, implemented by a userspace program called Gssproxy. -The gss_proxy RPC protocol is currently documented here: - - https://fedorahosted.org/gss-proxy/wiki/ProtocolDocumentation +The gss_proxy RPC protocol is currently documented `here +<https://fedorahosted.org/gss-proxy/wiki/ProtocolDocumentation>`_. This upcall mechanism uses the kernel rpc client and connects to the gssproxy userspace program over a regular unix socket. The gssproxy protocol does not suffer from the size limitations of the legacy protocol. Negotiating Upcall Mechanisms ------------------------------ +============================= To provide backward compatibility, the kernel defaults to using the legacy mechanism. To switch to the new mechanism, gss-proxy must bind diff --git a/Documentation/filesystems/nilfs2.txt b/Documentation/filesystems/nilfs2.rst index f2f3f8592a6f..6c49f04e9e0a 100644 --- a/Documentation/filesystems/nilfs2.txt +++ b/Documentation/filesystems/nilfs2.rst @@ -1,5 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====== NILFS2 ------- +====== NILFS2 is a log-structured file system (LFS) supporting continuous snapshotting. In addition to versioning capability of the entire file @@ -25,9 +28,9 @@ available from the following download page. At least "mkfs.nilfs2", cleaner or garbage collector) are required. Details on the tools are described in the man pages included in the package. -Project web page: https://nilfs.sourceforge.io/ -Download page: https://nilfs.sourceforge.io/en/download.html -List info: http://vger.kernel.org/vger-lists.html#linux-nilfs +:Project web page: https://nilfs.sourceforge.io/ +:Download page: https://nilfs.sourceforge.io/en/download.html +:List info: http://vger.kernel.org/vger-lists.html#linux-nilfs Caveats ======= @@ -47,6 +50,7 @@ Mount options NILFS2 supports the following mount options: (*) == default +======================= ======================================================= barrier(*) This enables/disables the use of write barriers. This nobarrier requires an IO stack which can support barriers, and if nilfs gets an error on a barrier write, it will @@ -79,6 +83,7 @@ discard This enables/disables the use of discard/TRIM commands. nodiscard(*) The discard/TRIM commands are sent to the underlying block device when blocks are freed. This is useful for SSD devices and sparse/thinly-provisioned LUNs. +======================= ======================================================= Ioctls ====== @@ -87,9 +92,11 @@ There is some NILFS2 specific functionality which can be accessed by application through the system call interfaces. The list of all NILFS2 specific ioctls are shown in the table below. -Table of NILFS2 specific ioctls -.............................................................................. +Table of NILFS2 specific ioctls: + + ============================== =============================================== Ioctl Description + ============================== =============================================== NILFS_IOCTL_CHANGE_CPMODE Change mode of given checkpoint between checkpoint and snapshot state. This ioctl is used in chcp and mkcp utilities. @@ -142,11 +149,12 @@ Table of NILFS2 specific ioctls NILFS_IOCTL_SET_ALLOC_RANGE Define lower limit of segments in bytes and upper limit of segments in bytes. This ioctl is used by nilfs_resize utility. + ============================== =============================================== NILFS2 usage ============ -To use nilfs2 as a local file system, simply: +To use nilfs2 as a local file system, simply:: # mkfs -t nilfs2 /dev/block_device # mount -t nilfs2 /dev/block_device /dir @@ -157,18 +165,20 @@ This will also invoke the cleaner through the mount helper program Checkpoints and snapshots are managed by the following commands. Their manpages are included in the nilfs-utils package above. + ==== =========================================================== lscp list checkpoints or snapshots. mkcp make a checkpoint or a snapshot. chcp change an existing checkpoint to a snapshot or vice versa. rmcp invalidate specified checkpoint(s). + ==== =========================================================== -To mount a snapshot, +To mount a snapshot:: # mount -t nilfs2 -r -o cp=<cno> /dev/block_device /snap_dir where <cno> is the checkpoint number of the snapshot. -To unmount the NILFS2 mount point or snapshot, simply: +To unmount the NILFS2 mount point or snapshot, simply:: # umount /dir @@ -181,7 +191,7 @@ Disk format A nilfs2 volume is equally divided into a number of segments except for the super block (SB) and segment #0. A segment is the container of logs. Each log is composed of summary information blocks, payload -blocks, and an optional super root block (SR): +blocks, and an optional super root block (SR):: ______________________________________________________ | |SB| | Segment | Segment | Segment | ... | Segment | | @@ -200,7 +210,7 @@ blocks, and an optional super root block (SR): |_blocks__|_________________|__| The payload blocks are organized per file, and each file consists of -data blocks and B-tree node blocks: +data blocks and B-tree node blocks:: |<--- File-A --->|<--- File-B --->| _______________________________________________________________ @@ -213,7 +223,7 @@ files without data blocks or B-tree node blocks. The organization of the blocks is recorded in the summary information blocks, which contains a header structure (nilfs_segment_summary), per -file structures (nilfs_finfo), and per block structures (nilfs_binfo): +file structures (nilfs_finfo), and per block structures (nilfs_binfo):: _________________________________________________________________________ | Summary | finfo | binfo | ... | binfo | finfo | binfo | ... | binfo |... @@ -223,7 +233,7 @@ file structures (nilfs_finfo), and per block structures (nilfs_binfo): The logs include regular files, directory files, symbolic link files and several meta data files. The mata data files are the files used to maintain file system meta data. The current version of NILFS2 uses -the following meta data files: +the following meta data files:: 1) Inode file (ifile) -- Stores on-disk inodes 2) Checkpoint file (cpfile) -- Stores checkpoints @@ -232,7 +242,7 @@ the following meta data files: (DAT) block numbers. This file serves to make on-disk blocks relocatable. -The following figure shows a typical organization of the logs: +The following figure shows a typical organization of the logs:: _________________________________________________________________________ | Summary | regular file | file | ... | ifile | cpfile | sufile | DAT |SR| @@ -250,7 +260,7 @@ three special inodes, inodes for the DAT, cpfile, and sufile. Inodes of regular files, directories, symlinks and other special files, are included in the ifile. The inode of ifile itself is included in the corresponding checkpoint entry in the cpfile. Thus, the hierarchy -among NILFS2 files can be depicted as follows: +among NILFS2 files can be depicted as follows:: Super block (SB) | diff --git a/Documentation/filesystems/ntfs.txt b/Documentation/filesystems/ntfs.rst index 553f10d03076..5bb093a26485 100644 --- a/Documentation/filesystems/ntfs.txt +++ b/Documentation/filesystems/ntfs.rst @@ -1,19 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================ The Linux NTFS filesystem driver ================================ -Table of contents -================= +.. Table of contents -- Overview -- Web site -- Features -- Supported mount options -- Known bugs and (mis-)features -- Using NTFS volume and stripe sets - - The Device-Mapper driver - - The Software RAID / MD driver - - Limitations when using the MD driver + - Overview + - Web site + - Features + - Supported mount options + - Known bugs and (mis-)features + - Using NTFS volume and stripe sets + - The Device-Mapper driver + - The Software RAID / MD driver + - Limitations when using the MD driver Overview @@ -66,8 +68,10 @@ Features partition by creating a large file while in Windows and then loopback mounting the file while in Linux and creating a Linux filesystem on it that is used to install Linux on it. -- A comparison of the two drivers using: +- A comparison of the two drivers using:: + time find . -type f -exec md5sum "{}" \; + run three times in sequence with each driver (after a reboot) on a 1.4GiB NTFS partition, showed the new driver to be 20% faster in total time elapsed (from 9:43 minutes on average down to 7:53). The time spent in user space @@ -104,6 +108,7 @@ In addition to the generic mount options described by the manual page for the mount command (man 8 mount, also see man 5 fstab), the NTFS driver supports the following mount options: +======================= ======================================================= iocharset=name Deprecated option. Still supported but please use nls=name in the future. See description for nls=name. @@ -175,16 +180,22 @@ disable_sparse=<BOOL> If disable_sparse is specified, creation of sparse errors=opt What to do when critical filesystem errors are found. Following values can be used for "opt": - continue: DEFAULT, try to clean-up as much as + + ======== ========================================= + continue DEFAULT, try to clean-up as much as possible, e.g. marking a corrupt inode as bad so it is no longer accessed, and then continue. - recover: At present only supported is recovery of + recover At present only supported is recovery of the boot sector from the backup copy. If read-only mount, the recovery is done in memory only and not written to disk. - Note that the options are additive, i.e. specifying: + ======== ========================================= + + Note that the options are additive, i.e. specifying:: + errors=continue,errors=recover + means the driver will attempt to recover and if that fails it will clean-up as much as possible and continue. @@ -202,12 +213,18 @@ mft_zone_multiplier= Set the MFT zone multiplier for the volume (this In general use the default. If you have a lot of small files then use a higher value. The values have the following meaning: + + ===== ================================= Value MFT zone size (% of volume size) + ===== ================================= 1 12.5% 2 25% 3 37.5% 4 50% + ===== ================================= + Note this option is irrelevant for read-only mounts. +======================= ======================================================= Known bugs and (mis-)features @@ -252,18 +269,18 @@ To create the table describing your volume you will need to know each of its components and their sizes in sectors, i.e. multiples of 512-byte blocks. For NT4 fault tolerant volumes you can obtain the sizes using fdisk. So for -example if one of your partitions is /dev/hda2 you would do: +example if one of your partitions is /dev/hda2 you would do:: -$ fdisk -ul /dev/hda + $ fdisk -ul /dev/hda -Disk /dev/hda: 81.9 GB, 81964302336 bytes -255 heads, 63 sectors/track, 9964 cylinders, total 160086528 sectors -Units = sectors of 1 * 512 = 512 bytes + Disk /dev/hda: 81.9 GB, 81964302336 bytes + 255 heads, 63 sectors/track, 9964 cylinders, total 160086528 sectors + Units = sectors of 1 * 512 = 512 bytes - Device Boot Start End Blocks Id System - /dev/hda1 * 63 4209029 2104483+ 83 Linux - /dev/hda2 4209030 37768814 16779892+ 86 NTFS - /dev/hda3 37768815 46170809 4200997+ 83 Linux + Device Boot Start End Blocks Id System + /dev/hda1 * 63 4209029 2104483+ 83 Linux + /dev/hda2 4209030 37768814 16779892+ 86 NTFS + /dev/hda3 37768815 46170809 4200997+ 83 Linux And you would know that /dev/hda2 has a size of 37768814 - 4209030 + 1 = 33559785 sectors. @@ -271,15 +288,17 @@ And you would know that /dev/hda2 has a size of 37768814 - 4209030 + 1 = For Win2k and later dynamic disks, you can for example use the ldminfo utility which is part of the Linux LDM tools (the latest version at the time of writing is linux-ldm-0.0.8.tar.bz2). You can download it from: + http://www.linux-ntfs.org/ + Simply extract the downloaded archive (tar xvjf linux-ldm-0.0.8.tar.bz2), go into it (cd linux-ldm-0.0.8) and change to the test directory (cd test). You will find the precompiled (i386) ldminfo utility there. NOTE: You will not be able to compile this yourself easily so use the binary version! -Then you would use ldminfo in dump mode to obtain the necessary information: +Then you would use ldminfo in dump mode to obtain the necessary information:: -$ ./ldminfo --dump /dev/hda + $ ./ldminfo --dump /dev/hda This would dump the LDM database found on /dev/hda which describes all of your dynamic disks and all the volumes on them. At the bottom you will see the @@ -305,42 +324,36 @@ give you the correct information to do this. Assuming you know all your devices and their sizes things are easy. For a linear raid the table would look like this (note all values are in -512-byte sectors): +512-byte sectors):: ---- cut here --- -# Offset into Size of this Raid type Device Start sector -# volume device of device -0 1028161 linear /dev/hda1 0 -1028161 3903762 linear /dev/hdb2 0 -4931923 2103211 linear /dev/hdc1 0 ---- cut here --- + # Offset into Size of this Raid type Device Start sector + # volume device of device + 0 1028161 linear /dev/hda1 0 + 1028161 3903762 linear /dev/hdb2 0 + 4931923 2103211 linear /dev/hdc1 0 For a striped volume, i.e. raid level 0, you will need to know the chunk size you used when creating the volume. Windows uses 64kiB as the default, so it will probably be this unless you changes the defaults when creating the array. For a raid level 0 the table would look like this (note all values are in -512-byte sectors): +512-byte sectors):: ---- cut here --- -# Offset Size Raid Number Chunk 1st Start 2nd Start -# into of the type of size Device in Device in -# volume volume stripes device device -0 2056320 striped 2 128 /dev/hda1 0 /dev/hdb1 0 ---- cut here --- + # Offset Size Raid Number Chunk 1st Start 2nd Start + # into of the type of size Device in Device in + # volume volume stripes device device + 0 2056320 striped 2 128 /dev/hda1 0 /dev/hdb1 0 If there are more than two devices, just add each of them to the end of the line. Finally, for a mirrored volume, i.e. raid level 1, the table would look like -this (note all values are in 512-byte sectors): +this (note all values are in 512-byte sectors):: ---- cut here --- -# Ofs Size Raid Log Number Region Should Number Source Start Target Start -# in of the type type of log size sync? of Device in Device in -# vol volume params mirrors Device Device -0 2056320 mirror core 2 16 nosync 2 /dev/hda1 0 /dev/hdb1 0 ---- cut here --- + # Ofs Size Raid Log Number Region Should Number Source Start Target Start + # in of the type type of log size sync? of Device in Device in + # vol volume params mirrors Device Device + 0 2056320 mirror core 2 16 nosync 2 /dev/hda1 0 /dev/hdb1 0 If you are mirroring to multiple devices you can specify further targets at the end of the line. @@ -353,17 +366,17 @@ to the "Target Device" or if you specified multiple target devices to all of them. Once you have your table, save it in a file somewhere (e.g. /etc/ntfsvolume1), -and hand it over to dmsetup to work with, like so: +and hand it over to dmsetup to work with, like so:: -$ dmsetup create myvolume1 /etc/ntfsvolume1 + $ dmsetup create myvolume1 /etc/ntfsvolume1 You can obviously replace "myvolume1" with whatever name you like. If it all worked, you will now have the device /dev/device-mapper/myvolume1 which you can then just use as an argument to the mount command as usual to -mount the ntfs volume. For example: +mount the ntfs volume. For example:: -$ mount -t ntfs -o ro /dev/device-mapper/myvolume1 /mnt/myvol1 + $ mount -t ntfs -o ro /dev/device-mapper/myvolume1 /mnt/myvol1 (You need to create the directory /mnt/myvol1 first and of course you can use anything you like instead of /mnt/myvol1 as long as it is an existing @@ -395,18 +408,18 @@ Windows by default uses a stripe chunk size of 64k, so you probably want the "chunk-size 64k" option for each raid-disk, too. For example, if you have a stripe set consisting of two partitions /dev/hda5 -and /dev/hdb1 your /etc/raidtab would look like this: - -raiddev /dev/md0 - raid-level 0 - nr-raid-disks 2 - nr-spare-disks 0 - persistent-superblock 0 - chunk-size 64k - device /dev/hda5 - raid-disk 0 - device /dev/hdb1 - raid-disk 1 +and /dev/hdb1 your /etc/raidtab would look like this:: + + raiddev /dev/md0 + raid-level 0 + nr-raid-disks 2 + nr-spare-disks 0 + persistent-superblock 0 + chunk-size 64k + device /dev/hda5 + raid-disk 0 + device /dev/hdb1 + raid-disk 1 For linear raid, just change the raid-level above to "raid-level linear", for mirrors, change it to "raid-level 1", and for stripe sets with parity, change @@ -427,7 +440,9 @@ Once the raidtab is setup, run for example raid0run -a to start all devices or raid0run /dev/md0 to start a particular md device, in this case /dev/md0. Then just use the mount command as usual to mount the ntfs volume using for -example: mount -t ntfs -o ro /dev/md0 /mnt/myntfsvolume +example:: + + mount -t ntfs -o ro /dev/md0 /mnt/myntfsvolume It is advisable to do the mount read-only to see if the md volume has been setup correctly to avoid the possibility of causing damage to the data on the diff --git a/Documentation/filesystems/ocfs2-online-filecheck.txt b/Documentation/filesystems/ocfs2-online-filecheck.rst index 139fab175c8a..2257bb53edc1 100644 --- a/Documentation/filesystems/ocfs2-online-filecheck.txt +++ b/Documentation/filesystems/ocfs2-online-filecheck.rst @@ -1,5 +1,8 @@ - OCFS2 online file check - ----------------------- +.. SPDX-License-Identifier: GPL-2.0 + +===================================== +OCFS2 file system - online file check +===================================== This document will describe OCFS2 online file check feature. @@ -40,7 +43,7 @@ When there are errors in the OCFS2 filesystem, they are usually accompanied by the inode number which caused the error. This inode number would be the input to check/fix the file. -There is a sysfs directory for each OCFS2 file system mounting: +There is a sysfs directory for each OCFS2 file system mounting:: /sys/fs/ocfs2/<devname>/filecheck @@ -50,34 +53,36 @@ communicate with kernel space, tell which file(inode number) will be checked or fixed. Currently, three operations are supported, which includes checking inode, fixing inode and setting the size of result record history. -1. If you want to know what error exactly happened to <inode> before fixing, do +1. If you want to know what error exactly happened to <inode> before fixing, do:: + + # echo "<inode>" > /sys/fs/ocfs2/<devname>/filecheck/check + # cat /sys/fs/ocfs2/<devname>/filecheck/check + +The output is like this:: - # echo "<inode>" > /sys/fs/ocfs2/<devname>/filecheck/check - # cat /sys/fs/ocfs2/<devname>/filecheck/check + INO DONE ERROR + 39502 1 GENERATION -The output is like this: - INO DONE ERROR -39502 1 GENERATION + <INO> lists the inode numbers. + <DONE> indicates whether the operation has been finished. + <ERROR> says what kind of errors was found. For the detailed error numbers, + please refer to the file linux/fs/ocfs2/filecheck.h. -<INO> lists the inode numbers. -<DONE> indicates whether the operation has been finished. -<ERROR> says what kind of errors was found. For the detailed error numbers, -please refer to the file linux/fs/ocfs2/filecheck.h. +2. If you determine to fix this inode, do:: -2. If you determine to fix this inode, do + # echo "<inode>" > /sys/fs/ocfs2/<devname>/filecheck/fix + # cat /sys/fs/ocfs2/<devname>/filecheck/fix - # echo "<inode>" > /sys/fs/ocfs2/<devname>/filecheck/fix - # cat /sys/fs/ocfs2/<devname>/filecheck/fix +The output is like this::: -The output is like this: - INO DONE ERROR -39502 1 SUCCESS + INO DONE ERROR + 39502 1 SUCCESS This time, the <ERROR> column indicates whether this fix is successful or not. 3. The record cache is used to store the history of check/fix results. It's default size is 10, and can be adjust between the range of 10 ~ 100. You can -adjust the size like this: +adjust the size like this:: # echo "<size>" > /sys/fs/ocfs2/<devname>/filecheck/set diff --git a/Documentation/filesystems/ocfs2.txt b/Documentation/filesystems/ocfs2.rst index 4c49e5410595..412386bc6506 100644 --- a/Documentation/filesystems/ocfs2.txt +++ b/Documentation/filesystems/ocfs2.rst @@ -1,5 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================ OCFS2 filesystem -================== +================ + OCFS2 is a general purpose extent based shared disk cluster file system with many similarities to ext3. It supports 64 bit inode numbers, and has automatically extending metadata groups which may @@ -14,22 +18,26 @@ OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/ All code copyright 2005 Oracle except when otherwise noted. -CREDITS: +Credits +======= + Lots of code taken from ext3 and other projects. Authors in alphabetical order: -Joel Becker <joel.becker@oracle.com> -Zach Brown <zach.brown@oracle.com> -Mark Fasheh <mfasheh@suse.com> -Kurt Hackel <kurt.hackel@oracle.com> -Tao Ma <tao.ma@oracle.com> -Sunil Mushran <sunil.mushran@oracle.com> -Manish Singh <manish.singh@oracle.com> -Tiger Yang <tiger.yang@oracle.com> + +- Joel Becker <joel.becker@oracle.com> +- Zach Brown <zach.brown@oracle.com> +- Mark Fasheh <mfasheh@suse.com> +- Kurt Hackel <kurt.hackel@oracle.com> +- Tao Ma <tao.ma@oracle.com> +- Sunil Mushran <sunil.mushran@oracle.com> +- Manish Singh <manish.singh@oracle.com> +- Tiger Yang <tiger.yang@oracle.com> Caveats ======= Features which OCFS2 does not support yet: + - Directory change notification (F_NOTIFY) - Distributed Caching (F_SETLEASE/F_GETLEASE/break_lease) @@ -37,8 +45,10 @@ Mount options ============= OCFS2 supports the following mount options: + (*) == default +======================= ======================================================== barrier=1 This enables/disables barriers. barrier=0 disables it, barrier=1 enables it. errors=remount-ro(*) Remount the filesystem read-only on an error. @@ -104,3 +114,4 @@ journal_async_commit Commit block can be written to disk without waiting for descriptor blocks. If enabled older kernels cannot mount the device. This will enable 'journal_checksum' internally. +======================= ======================================================== diff --git a/Documentation/filesystems/omfs.rst b/Documentation/filesystems/omfs.rst new file mode 100644 index 000000000000..4c8bb3074169 --- /dev/null +++ b/Documentation/filesystems/omfs.rst @@ -0,0 +1,112 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================ +Optimized MPEG Filesystem (OMFS) +================================ + +Overview +======== + +OMFS is a filesystem created by SonicBlue for use in the ReplayTV DVR +and Rio Karma MP3 player. The filesystem is extent-based, utilizing +block sizes from 2k to 8k, with hash-based directories. This +filesystem driver may be used to read and write disks from these +devices. + +Note, it is not recommended that this FS be used in place of a general +filesystem for your own streaming media device. Native Linux filesystems +will likely perform better. + +More information is available at: + + http://linux-karma.sf.net/ + +Various utilities, including mkomfs and omfsck, are included with +omfsprogs, available at: + + http://bobcopeland.com/karma/ + +Instructions are included in its README. + +Options +======= + +OMFS supports the following mount-time options: + + ============ ======================================== + uid=n make all files owned by specified user + gid=n make all files owned by specified group + umask=xxx set permission umask to xxx + fmask=xxx set umask to xxx for files + dmask=xxx set umask to xxx for directories + ============ ======================================== + +Disk format +=========== + +OMFS discriminates between "sysblocks" and normal data blocks. The sysblock +group consists of super block information, file metadata, directory structures, +and extents. Each sysblock has a header containing CRCs of the entire +sysblock, and may be mirrored in successive blocks on the disk. A sysblock may +have a smaller size than a data block, but since they are both addressed by the +same 64-bit block number, any remaining space in the smaller sysblock is +unused. + +Sysblock header information:: + + struct omfs_header { + __be64 h_self; /* FS block where this is located */ + __be32 h_body_size; /* size of useful data after header */ + __be16 h_crc; /* crc-ccitt of body_size bytes */ + char h_fill1[2]; + u8 h_version; /* version, always 1 */ + char h_type; /* OMFS_INODE_X */ + u8 h_magic; /* OMFS_IMAGIC */ + u8 h_check_xor; /* XOR of header bytes before this */ + __be32 h_fill2; + }; + +Files and directories are both represented by omfs_inode:: + + struct omfs_inode { + struct omfs_header i_head; /* header */ + __be64 i_parent; /* parent containing this inode */ + __be64 i_sibling; /* next inode in hash bucket */ + __be64 i_ctime; /* ctime, in milliseconds */ + char i_fill1[35]; + char i_type; /* OMFS_[DIR,FILE] */ + __be32 i_fill2; + char i_fill3[64]; + char i_name[OMFS_NAMELEN]; /* filename */ + __be64 i_size; /* size of file, in bytes */ + }; + +Directories in OMFS are implemented as a large hash table. Filenames are +hashed then prepended into the bucket list beginning at OMFS_DIR_START. +Lookup requires hashing the filename, then seeking across i_sibling pointers +until a match is found on i_name. Empty buckets are represented by block +pointers with all-1s (~0). + +A file is an omfs_inode structure followed by an extent table beginning at +OMFS_EXTENT_START:: + + struct omfs_extent_entry { + __be64 e_cluster; /* start location of a set of blocks */ + __be64 e_blocks; /* number of blocks after e_cluster */ + }; + + struct omfs_extent { + __be64 e_next; /* next extent table location */ + __be32 e_extent_count; /* total # extents in this table */ + __be32 e_fill; + struct omfs_extent_entry e_entry; /* start of extent entries */ + }; + +Each extent holds the block offset followed by number of blocks allocated to +the extent. The final extent in each table is a terminator with e_cluster +being ~0 and e_blocks being ones'-complement of the total number of blocks +in the table. + +If this table overflows, a continuation inode is written and pointed to by +e_next. These have a header but lack the rest of the inode structure. + diff --git a/Documentation/filesystems/omfs.txt b/Documentation/filesystems/omfs.txt deleted file mode 100644 index 1d0d41ff5c65..000000000000 --- a/Documentation/filesystems/omfs.txt +++ /dev/null @@ -1,106 +0,0 @@ -Optimized MPEG Filesystem (OMFS) - -Overview -======== - -OMFS is a filesystem created by SonicBlue for use in the ReplayTV DVR -and Rio Karma MP3 player. The filesystem is extent-based, utilizing -block sizes from 2k to 8k, with hash-based directories. This -filesystem driver may be used to read and write disks from these -devices. - -Note, it is not recommended that this FS be used in place of a general -filesystem for your own streaming media device. Native Linux filesystems -will likely perform better. - -More information is available at: - - http://linux-karma.sf.net/ - -Various utilities, including mkomfs and omfsck, are included with -omfsprogs, available at: - - http://bobcopeland.com/karma/ - -Instructions are included in its README. - -Options -======= - -OMFS supports the following mount-time options: - - uid=n - make all files owned by specified user - gid=n - make all files owned by specified group - umask=xxx - set permission umask to xxx - fmask=xxx - set umask to xxx for files - dmask=xxx - set umask to xxx for directories - -Disk format -=========== - -OMFS discriminates between "sysblocks" and normal data blocks. The sysblock -group consists of super block information, file metadata, directory structures, -and extents. Each sysblock has a header containing CRCs of the entire -sysblock, and may be mirrored in successive blocks on the disk. A sysblock may -have a smaller size than a data block, but since they are both addressed by the -same 64-bit block number, any remaining space in the smaller sysblock is -unused. - -Sysblock header information: - -struct omfs_header { - __be64 h_self; /* FS block where this is located */ - __be32 h_body_size; /* size of useful data after header */ - __be16 h_crc; /* crc-ccitt of body_size bytes */ - char h_fill1[2]; - u8 h_version; /* version, always 1 */ - char h_type; /* OMFS_INODE_X */ - u8 h_magic; /* OMFS_IMAGIC */ - u8 h_check_xor; /* XOR of header bytes before this */ - __be32 h_fill2; -}; - -Files and directories are both represented by omfs_inode: - -struct omfs_inode { - struct omfs_header i_head; /* header */ - __be64 i_parent; /* parent containing this inode */ - __be64 i_sibling; /* next inode in hash bucket */ - __be64 i_ctime; /* ctime, in milliseconds */ - char i_fill1[35]; - char i_type; /* OMFS_[DIR,FILE] */ - __be32 i_fill2; - char i_fill3[64]; - char i_name[OMFS_NAMELEN]; /* filename */ - __be64 i_size; /* size of file, in bytes */ -}; - -Directories in OMFS are implemented as a large hash table. Filenames are -hashed then prepended into the bucket list beginning at OMFS_DIR_START. -Lookup requires hashing the filename, then seeking across i_sibling pointers -until a match is found on i_name. Empty buckets are represented by block -pointers with all-1s (~0). - -A file is an omfs_inode structure followed by an extent table beginning at -OMFS_EXTENT_START: - -struct omfs_extent_entry { - __be64 e_cluster; /* start location of a set of blocks */ - __be64 e_blocks; /* number of blocks after e_cluster */ -}; - -struct omfs_extent { - __be64 e_next; /* next extent table location */ - __be32 e_extent_count; /* total # extents in this table */ - __be32 e_fill; - struct omfs_extent_entry e_entry; /* start of extent entries */ -}; - -Each extent holds the block offset followed by number of blocks allocated to -the extent. The final extent in each table is a terminator with e_cluster -being ~0 and e_blocks being ones'-complement of the total number of blocks -in the table. - -If this table overflows, a continuation inode is written and pointed to by -e_next. These have a header but lack the rest of the inode structure. - diff --git a/Documentation/filesystems/orangefs.txt b/Documentation/filesystems/orangefs.rst index f4ba94950e3f..e41369709c5b 100644 --- a/Documentation/filesystems/orangefs.txt +++ b/Documentation/filesystems/orangefs.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======== ORANGEFS ======== @@ -21,43 +24,33 @@ Orangefs features include: * Stateless -MAILING LIST ARCHIVES +Mailing List Archives ===================== http://lists.orangefs.org/pipermail/devel_lists.orangefs.org/ -MAILING LIST SUBMISSIONS +Mailing List Submissions ======================== devel@lists.orangefs.org -DOCUMENTATION +Documentation ============= http://www.orangefs.org/documentation/ - -USERSPACE FILESYSTEM SOURCE -=========================== - -http://www.orangefs.org/download - -Orangefs versions prior to 2.9.3 would not be compatible with the -upstream version of the kernel client. - - -RUNNING ORANGEFS ON A SINGLE SERVER +Running ORANGEFS On a Single Server =================================== OrangeFS is usually run in large installations with multiple servers and clients, but a complete filesystem can be run on a single machine for development and testing. -On Fedora, install orangefs and orangefs-server. +On Fedora, install orangefs and orangefs-server:: -dnf -y install orangefs orangefs-server + dnf -y install orangefs orangefs-server There is an example server configuration file in /etc/orangefs/orangefs.conf. Change localhost to your hostname if @@ -70,29 +63,37 @@ single line. Uncomment it and change the hostname if necessary. This controls clients which use libpvfs2. This does not control the pvfs2-client-core. -Create the filesystem. +Create the filesystem:: -pvfs2-server -f /etc/orangefs/orangefs.conf + pvfs2-server -f /etc/orangefs/orangefs.conf -Start the server. +Start the server:: -systemctl start orangefs-server + systemctl start orangefs-server -Test the server. +Test the server:: -pvfs2-ping -m /pvfsmnt + pvfs2-ping -m /pvfsmnt Start the client. The module must be compiled in or loaded before this -point. +point:: -systemctl start orangefs-client + systemctl start orangefs-client -Mount the filesystem. +Mount the filesystem:: -mount -t pvfs2 tcp://localhost:3334/orangefs /pvfsmnt + mount -t pvfs2 tcp://localhost:3334/orangefs /pvfsmnt +Userspace Filesystem Source +=========================== -BUILDING ORANGEFS ON A SINGLE SERVER +http://www.orangefs.org/download + +Orangefs versions prior to 2.9.3 would not be compatible with the +upstream version of the kernel client. + + +Building ORANGEFS on a Single Server ==================================== Where OrangeFS cannot be installed from distribution packages, it may be @@ -102,49 +103,57 @@ You can omit --prefix if you don't care that things are sprinkled around in /usr/local. As of version 2.9.6, OrangeFS uses Berkeley DB by default, we will probably be changing the default to LMDB soon. -./configure --prefix=/opt/ofs --with-db-backend=lmdb +:: + + ./configure --prefix=/opt/ofs --with-db-backend=lmdb --disable-usrint -make + make -make install + make install -Create an orangefs config file. +Create an orangefs config file by running pvfs2-genconfig and +specifying a target config file. Pvfs2-genconfig will prompt you +through. Generally it works fine to take the defaults, but you +should use your server's hostname, rather than "localhost" when +it comes to that question:: -/opt/ofs/bin/pvfs2-genconfig /etc/pvfs2.conf + /opt/ofs/bin/pvfs2-genconfig /etc/pvfs2.conf -Create an /etc/pvfs2tab file. +Create an /etc/pvfs2tab file:: -echo tcp://localhost:3334/orangefs /pvfsmnt pvfs2 defaults,noauto 0 0 > \ - /etc/pvfs2tab +Localhost is fine for your pvfs2tab file: -Create the mount point you specified in the tab file if needed. + echo tcp://localhost:3334/orangefs /pvfsmnt pvfs2 defaults,noauto 0 0 > \ + /etc/pvfs2tab -mkdir /pvfsmnt +Create the mount point you specified in the tab file if needed:: -Bootstrap the server. + mkdir /pvfsmnt -/opt/ofs/sbin/pvfs2-server -f /etc/pvfs2.conf +Bootstrap the server:: -Start the server. + /opt/ofs/sbin/pvfs2-server -f /etc/pvfs2.conf -/opt/osf/sbin/pvfs2-server /etc/pvfs2.conf +Start the server:: + + /opt/ofs/sbin/pvfs2-server /etc/pvfs2.conf Now the server should be running. Pvfs2-ls is a simple -test to verify that the server is running. +test to verify that the server is running:: -/opt/ofs/bin/pvfs2-ls /pvfsmnt + /opt/ofs/bin/pvfs2-ls /pvfsmnt If stuff seems to be working, load the kernel module and -turn on the client core. +turn on the client core:: -/opt/ofs/sbin/pvfs2-client -p /opt/osf/sbin/pvfs2-client-core + /opt/ofs/sbin/pvfs2-client -p /opt/ofs/sbin/pvfs2-client-core -Mount your filesystem. +Mount your filesystem:: -mount -t pvfs2 tcp://localhost:3334/orangefs /pvfsmnt + mount -t pvfs2 tcp://`hostname`:3334/orangefs /pvfsmnt -RUNNING XFSTESTS +Running xfstests ================ It is useful to use a scratch filesystem with xfstests. This can be @@ -159,21 +168,23 @@ Then there are two FileSystem sections: orangefs and scratch. This change should be made before creating the filesystem. -pvfs2-server -f /etc/orangefs/orangefs.conf +:: + + pvfs2-server -f /etc/orangefs/orangefs.conf -To run xfstests, create /etc/xfsqa.config. +To run xfstests, create /etc/xfsqa.config:: -TEST_DIR=/orangefs -TEST_DEV=tcp://localhost:3334/orangefs -SCRATCH_MNT=/scratch -SCRATCH_DEV=tcp://localhost:3334/scratch + TEST_DIR=/orangefs + TEST_DEV=tcp://localhost:3334/orangefs + SCRATCH_MNT=/scratch + SCRATCH_DEV=tcp://localhost:3334/scratch -Then xfstests can be run +Then xfstests can be run:: -./check -pvfs2 + ./check -pvfs2 -OPTIONS +Options ======= The following mount options are accepted: @@ -193,32 +204,32 @@ The following mount options are accepted: Distributed locking is being worked on for the future. -DEBUGGING +Debugging ========= If you want the debug (GOSSIP) statements in a particular -source file (inode.c for example) go to syslog: +source file (inode.c for example) go to syslog:: echo inode > /sys/kernel/debug/orangefs/kernel-debug -No debugging (the default): +No debugging (the default):: echo none > /sys/kernel/debug/orangefs/kernel-debug -Debugging from several source files: +Debugging from several source files:: echo inode,dir > /sys/kernel/debug/orangefs/kernel-debug -All debugging: +All debugging:: echo all > /sys/kernel/debug/orangefs/kernel-debug -Get a list of all debugging keywords: +Get a list of all debugging keywords:: cat /sys/kernel/debug/orangefs/debug-help -PROTOCOL BETWEEN KERNEL MODULE AND USERSPACE +Protocol between Kernel Module and Userspace ============================================ Orangefs is a user space filesystem and an associated kernel module. @@ -234,7 +245,8 @@ The kernel module implements a pseudo device that userspace can read from and write to. Userspace can also manipulate the kernel module through the pseudo device with ioctl. -THE BUFMAP: +The Bufmap +---------- At startup userspace allocates two page-size-aligned (posix_memalign) mlocked memory buffers, one is used for IO and one is used for readdir @@ -250,7 +262,8 @@ copied from user space to kernel space with copy_from_user and is used to initialize the kernel module's "bufmap" (struct orangefs_bufmap), which then contains: - * refcnt - a reference counter + * refcnt + - a reference counter * desc_size - PVFS2_BUFMAP_DEFAULT_DESC_SIZE (4194304) - the IO buffer's partition size, which represents the filesystem's block size and is used for s_blocksize in super blocks. @@ -259,17 +272,19 @@ then contains: * desc_shift - log2(desc_size), used for s_blocksize_bits in super blocks. * total_size - the total size of the IO buffer. * page_count - the number of 4096 byte pages in the IO buffer. - * page_array - a pointer to page_count * (sizeof(struct page*)) bytes + * page_array - a pointer to ``page_count * (sizeof(struct page*))`` bytes of kcalloced memory. This memory is used as an array of pointers to each of the pages in the IO buffer through a call to get_user_pages. - * desc_array - a pointer to desc_count * (sizeof(struct orangefs_bufmap_desc)) + * desc_array - a pointer to ``desc_count * (sizeof(struct orangefs_bufmap_desc))`` bytes of kcalloced memory. This memory is further intialized: user_desc is the kernel's copy of the IO buffer's ORANGEFS_dev_map_desc structure. user_desc->ptr points to the IO buffer. - pages_per_desc = bufmap->desc_size / PAGE_SIZE - offset = 0 + :: + + pages_per_desc = bufmap->desc_size / PAGE_SIZE + offset = 0 bufmap->desc_array[0].page_array = &bufmap->page_array[offset] bufmap->desc_array[0].array_count = pages_per_desc = 1024 @@ -293,7 +308,8 @@ then contains: * readdir_index_lock - a spinlock to protect readdir_index_array during update. -OPERATIONS: +Operations +---------- The kernel module builds an "op" (struct orangefs_kernel_op_s) when it needs to communicate with userspace. Part of the op contains the "upcall" @@ -308,13 +324,19 @@ in flight at any given time. Ops are stateful: - * unknown - op was just initialized - * waiting - op is on request_list (upward bound) - * inprogr - op is in progress (waiting for downcall) - * serviced - op has matching downcall; ok - * purged - op has to start a timer since client-core + * unknown + - op was just initialized + * waiting + - op is on request_list (upward bound) + * inprogr + - op is in progress (waiting for downcall) + * serviced + - op has matching downcall; ok + * purged + - op has to start a timer since client-core exited uncleanly before servicing op - * given up - submitter has given up waiting for it + * given up + - submitter has given up waiting for it When some arbitrary userspace program needs to perform a filesystem operation on Orangefs (readdir, I/O, create, whatever) @@ -389,10 +411,15 @@ union of structs, each of which is associated with a particular response type. The several members outside of the union are: - - int32_t type - type of operation. - - int32_t status - return code for the operation. - - int64_t trailer_size - 0 unless readdir operation. - - char *trailer_buf - initialized to NULL, used during readdir operations. + + ``int32_t type`` + - type of operation. + ``int32_t status`` + - return code for the operation. + ``int64_t trailer_size`` + - 0 unless readdir operation. + ``char *trailer_buf`` + - initialized to NULL, used during readdir operations. The appropriate member inside the union is filled out for any particular response. @@ -449,18 +476,20 @@ Userspace uses writev() on /dev/pvfs2-req to pass responses to the requests made by the kernel side. A buffer_list containing: + - a pointer to the prepared response to the request from the kernel (struct pvfs2_downcall_t). - and also, in the case of a readdir request, a pointer to a buffer containing descriptors for the objects in the target directory. + ... is sent to the function (PINT_dev_write_list) which performs the writev. PINT_dev_write_list has a local iovec array: struct iovec io_array[10]; The first four elements of io_array are initialized like this for all -responses: +responses:: io_array[0].iov_base = address of local variable "proto_ver" (int32_t) io_array[0].iov_len = sizeof(int32_t) @@ -475,7 +504,7 @@ responses: of global variable vfs_request (vfs_request_t) io_array[3].iov_len = sizeof(pvfs2_downcall_t) -Readdir responses initialize the fifth element io_array like this: +Readdir responses initialize the fifth element io_array like this:: io_array[4].iov_base = contents of member trailer_buf (char *) from out_downcall member of global variable @@ -517,13 +546,13 @@ from a dentry is cheap, obtaining it from userspace is relatively expensive, hence the motivation to use the dentry when possible. The timeout values d_time and getattr_time are jiffy based, and the -code is designed to avoid the jiffy-wrap problem: +code is designed to avoid the jiffy-wrap problem:: -"In general, if the clock may have wrapped around more than once, there -is no way to tell how much time has elapsed. However, if the times t1 -and t2 are known to be fairly close, we can reliably compute the -difference in a way that takes into account the possibility that the -clock may have wrapped between times." + "In general, if the clock may have wrapped around more than once, there + is no way to tell how much time has elapsed. However, if the times t1 + and t2 are known to be fairly close, we can reliably compute the + difference in a way that takes into account the possibility that the + clock may have wrapped between times." - from course notes by instructor Andy Wang +from course notes by instructor Andy Wang diff --git a/Documentation/filesystems/overlayfs.rst b/Documentation/filesystems/overlayfs.rst index e443be7928db..c9d2bf96b02d 100644 --- a/Documentation/filesystems/overlayfs.rst +++ b/Documentation/filesystems/overlayfs.rst @@ -40,13 +40,46 @@ On 64bit systems, even if all overlay layers are not on the same underlying filesystem, the same compliant behavior could be achieved with the "xino" feature. The "xino" feature composes a unique object identifier from the real object st_ino and an underlying fsid index. + If all underlying filesystems support NFS file handles and export file handles with 32bit inode number encoding (e.g. ext4), overlay filesystem will use the high inode number bits for fsid. Even when the underlying filesystem uses 64bit inode numbers, users can still enable the "xino" feature with the "-o xino=on" overlay mount option. That is useful for the case of underlying filesystems like xfs and tmpfs, which use 64bit inode -numbers, but are very unlikely to use the high inode number bit. +numbers, but are very unlikely to use the high inode number bits. In case +the underlying inode number does overflow into the high xino bits, overlay +filesystem will fall back to the non xino behavior for that inode. + +The following table summarizes what can be expected in different overlay +configurations. + +Inode properties +```````````````` + ++--------------+------------+------------+-----------------+----------------+ +|Configuration | Persistent | Uniform | st_ino == d_ino | d_ino == i_ino | +| | st_ino | st_dev | | [*] | ++==============+=====+======+=====+======+========+========+========+=======+ +| | dir | !dir | dir | !dir | dir + !dir | dir | !dir | ++--------------+-----+------+-----+------+--------+--------+--------+-------+ +| All layers | Y | Y | Y | Y | Y | Y | Y | Y | +| on same fs | | | | | | | | | ++--------------+-----+------+-----+------+--------+--------+--------+-------+ +| Layers not | N | Y | Y | N | N | Y | N | Y | +| on same fs, | | | | | | | | | +| xino=off | | | | | | | | | ++--------------+-----+------+-----+------+--------+--------+--------+-------+ +| xino=on/auto | Y | Y | Y | Y | Y | Y | Y | Y | +| | | | | | | | | | ++--------------+-----+------+-----+------+--------+--------+--------+-------+ +| xino=on/auto,| N | Y | Y | N | N | Y | N | Y | +| ino overflow | | | | | | | | | ++--------------+-----+------+-----+------+--------+--------+--------+-------+ + +[*] nfsd v3 readdirplus verifies d_ino == i_ino. i_ino is exposed via several +/proc files, such as /proc/locks and /proc/self/fdinfo/<fd> of an inotify +file descriptor. Upper and Lower @@ -248,6 +281,50 @@ overlay filesystem (though an operation on the name of the file such as rename or unlink will of course be noticed and handled). +Permission model +---------------- + +Permission checking in the overlay filesystem follows these principles: + + 1) permission check SHOULD return the same result before and after copy up + + 2) task creating the overlay mount MUST NOT gain additional privileges + + 3) non-mounting task MAY gain additional privileges through the overlay, + compared to direct access on underlying lower or upper filesystems + +This is achieved by performing two permission checks on each access + + a) check if current task is allowed access based on local DAC (owner, + group, mode and posix acl), as well as MAC checks + + b) check if mounting task would be allowed real operation on lower or + upper layer based on underlying filesystem permissions, again including + MAC checks + +Check (a) ensures consistency (1) since owner, group, mode and posix acls +are copied up. On the other hand it can result in server enforced +permissions (used by NFS, for example) being ignored (3). + +Check (b) ensures that no task gains permissions to underlying layers that +the mounting task does not have (2). This also means that it is possible +to create setups where the consistency rule (1) does not hold; normally, +however, the mounting task will have sufficient privileges to perform all +operations. + +Another way to demonstrate this model is drawing parallels between + + mount -t overlay overlay -olowerdir=/lower,upperdir=/upper,... /merged + +and + + cp -a /lower /upper + mount --bind /upper /merged + +The resulting access permissions should be the same. The difference is in +the time of copy (on-demand vs. up-front). + + Multiple lower layers --------------------- @@ -383,7 +460,8 @@ guarantee that the values of st_ino and st_dev returned by stat(2) and the value of d_ino returned by readdir(3) will act like on a normal filesystem. E.g. the value of st_dev may be different for two objects in the same overlay filesystem and the value of st_ino for directory objects may not be -persistent and could change even while the overlay filesystem is mounted. +persistent and could change even while the overlay filesystem is mounted, as +summarized in the `Inode properties`_ table above. Changes to underlying filesystems diff --git a/Documentation/filesystems/path-lookup.rst b/Documentation/filesystems/path-lookup.rst index a3216979298b..f46b05e9b96c 100644 --- a/Documentation/filesystems/path-lookup.rst +++ b/Documentation/filesystems/path-lookup.rst @@ -404,11 +404,8 @@ that is the "next" component in the pathname. ``int last_type`` ~~~~~~~~~~~~~~~~~ -This is one of ``LAST_NORM``, ``LAST_ROOT``, ``LAST_DOT``, ``LAST_DOTDOT``, or -``LAST_BIND``. The ``last`` field is only valid if the type is -``LAST_NORM``. ``LAST_BIND`` is used when following a symlink and no -components of the symlink have been processed yet. Others should be -fairly self-explanatory. +This is one of ``LAST_NORM``, ``LAST_ROOT``, ``LAST_DOT`` or ``LAST_DOTDOT``. +The ``last`` field is only valid if the type is ``LAST_NORM``. ``struct path root`` ~~~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index f18506083ced..26c093969573 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -850,3 +850,11 @@ business doing so. d_alloc_pseudo() is internal-only; uses outside of alloc_file_pseudo() are very suspect (and won't work in modules). Such uses are very likely to be misspelled d_alloc_anon(). + +--- + +**mandatory** + +[should've been added in 2016] stale comment in finish_open() nonwithstanding, +failure exits in ->atomic_open() instances should *NOT* fput() the file, +no matter what. Everything is handled by the caller. diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.rst index 99ca040e3f90..38b606991065 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.rst @@ -1,19 +1,20 @@ ------------------------------------------------------------------------------- - T H E /proc F I L E S Y S T E M ------------------------------------------------------------------------------- -/proc/sys Terrehon Bowden <terrehon@pacbell.net> October 7 1999 - Bodo Bauer <bb@ricochet.net> +.. SPDX-License-Identifier: GPL-2.0 + +==================== +The /proc Filesystem +==================== + +===================== ======================================= ================ +/proc/sys Terrehon Bowden <terrehon@pacbell.net>, October 7 1999 + Bodo Bauer <bb@ricochet.net> +2.4.x update Jorge Nerin <comandante@zaralinux.com> November 14 2000 +move /proc/sys Shen Feng <shen@cn.fujitsu.com> April 1 2009 +fixes/update part 1.1 Stefani Seibold <stefani@seibold.net> June 9 2009 +===================== ======================================= ================ + -2.4.x update Jorge Nerin <comandante@zaralinux.com> November 14 2000 -move /proc/sys Shen Feng <shen@cn.fujitsu.com> April 1 2009 ------------------------------------------------------------------------------- -Version 1.3 Kernel version 2.2.12 - Kernel version 2.4.0-test11-pre4 ------------------------------------------------------------------------------- -fixes/update part 1.1 Stefani Seibold <stefani@seibold.net> June 9 2009 -Table of Contents ------------------ +.. Table of Contents 0 Preface 0.1 Introduction/Credits @@ -50,9 +51,8 @@ Table of Contents 4 Configuring procfs 4.1 Mount options ------------------------------------------------------------------------------- Preface ------------------------------------------------------------------------------- +======= 0.1 Introduction/Credits ------------------------ @@ -95,20 +95,18 @@ We don't guarantee the correctness of this document, and if you come to us complaining about how you screwed up your system because of incorrect documentation, we won't feel responsible... ------------------------------------------------------------------------------- -CHAPTER 1: COLLECTING SYSTEM INFORMATION ------------------------------------------------------------------------------- +Chapter 1: Collecting System Information +======================================== ------------------------------------------------------------------------------- In This Chapter ------------------------------------------------------------------------------- +--------------- * Investigating the properties of the pseudo file system /proc and its ability to provide information on the running Linux system * Examining /proc's structure * Uncovering various information about the kernel and the processes running on the system ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ The proc file system acts as an interface to internal data structures in the kernel. It can be used to obtain information about the system and to change @@ -134,9 +132,11 @@ never act on any new process that the kernel may, through chance, have also assigned the process ID <pid>. Instead, operations on these FDs usually fail with ESRCH. -Table 1-1: Process specific entries in /proc -.............................................................................. +.. table:: Table 1-1: Process specific entries in /proc + + ============= =============================================================== File Content + ============= =============================================================== clear_refs Clears page referenced bits shown in smaps output cmdline Command line arguments cpu Current and last cpu in which it was executed (2.4)(smp) @@ -160,10 +160,10 @@ Table 1-1: Process specific entries in /proc can be derived from smaps, but is faster and more convenient numa_maps An extension based on maps, showing the memory locality and binding policy as well as mem usage (in pages) of each mapping. -.............................................................................. + ============= =============================================================== For example, to get the status information of a process, all you have to do is -read the file /proc/PID/status: +read the file /proc/PID/status:: >cat /proc/self/status Name: cat @@ -222,14 +222,17 @@ contains details information about the process itself. Its fields are explained in Table 1-4. (for SMP CONFIG users) + For making accounting scalable, RSS related information are handled in an asynchronous manner and the value may not be very precise. To see a precise snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table. It's slow but very precise. -Table 1-2: Contents of the status files (as of 4.19) -.............................................................................. +.. table:: Table 1-2: Contents of the status files (as of 4.19) + + ========================== =================================================== Field Content + ========================== =================================================== Name filename of the executable Umask file mode creation mask State state (R is running, S is sleeping, D is sleeping @@ -254,7 +257,8 @@ Table 1-2: Contents of the status files (as of 4.19) VmPin pinned memory size VmHWM peak resident set size ("high water mark") VmRSS size of memory portions. It contains the three - following parts (VmRSS = RssAnon + RssFile + RssShmem) + following parts + (VmRSS = RssAnon + RssFile + RssShmem) RssAnon size of resident anonymous memory RssFile size of resident file mappings RssShmem size of resident shmem memory (includes SysV shm, @@ -292,27 +296,32 @@ Table 1-2: Contents of the status files (as of 4.19) Mems_allowed_list Same as previous, but in "list format" voluntary_ctxt_switches number of voluntary context switches nonvoluntary_ctxt_switches number of non voluntary context switches -.............................................................................. + ========================== =================================================== -Table 1-3: Contents of the statm files (as of 2.6.8-rc3) -.............................................................................. + +.. table:: Table 1-3: Contents of the statm files (as of 2.6.8-rc3) + + ======== =============================== ============================== Field Content + ======== =============================== ============================== size total program size (pages) (same as VmSize in status) resident size of memory portions (pages) (same as VmRSS in status) shared number of pages that are shared (i.e. backed by a file, same as RssFile+RssShmem in status) trs number of pages that are 'code' (not including libs; broken, - includes data segment) + includes data segment) lrs number of pages of library (always 0 on 2.6) drs number of pages of data/stack (including libs; broken, - includes library text) + includes library text) dt number of dirty pages (always 0 on 2.6) -.............................................................................. + ======== =============================== ============================== + +.. table:: Table 1-4: Contents of the stat files (as of 2.6.30-rc7) -Table 1-4: Contents of the stat files (as of 2.6.30-rc7) -.............................................................................. - Field Content + ============= =============================================================== + Field Content + ============= =============================================================== pid process id tcomm filename of the executable state state (R is running, S is sleeping, D is sleeping in an @@ -348,7 +357,8 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7) blocked bitmap of blocked signals sigign bitmap of ignored signals sigcatch bitmap of caught signals - 0 (place holder, used to be the wchan address, use /proc/PID/wchan instead) + 0 (place holder, used to be the wchan address, + use /proc/PID/wchan instead) 0 (place holder) 0 (place holder) exit_signal signal to send to parent thread on exit @@ -365,39 +375,40 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7) arg_end address below which program command line is placed env_start address above which program environment is placed env_end address below which program environment is placed - exit_code the thread's exit_code in the form reported by the waitpid system call -.............................................................................. + exit_code the thread's exit_code in the form reported by the waitpid + system call + ============= =============================================================== The /proc/PID/maps file contains the currently mapped memory regions and their access permissions. -The format is: - -address perms offset dev inode pathname - -08048000-08049000 r-xp 00000000 03:00 8312 /opt/test -08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test -0804a000-0806b000 rw-p 00000000 00:00 0 [heap] -a7cb1000-a7cb2000 ---p 00000000 00:00 0 -a7cb2000-a7eb2000 rw-p 00000000 00:00 0 -a7eb2000-a7eb3000 ---p 00000000 00:00 0 -a7eb3000-a7ed5000 rw-p 00000000 00:00 0 -a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6 -a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6 -a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6 -a800b000-a800e000 rw-p 00000000 00:00 0 -a800e000-a8022000 r-xp 00000000 03:00 14462 /lib/libpthread.so.0 -a8022000-a8023000 r--p 00013000 03:00 14462 /lib/libpthread.so.0 -a8023000-a8024000 rw-p 00014000 03:00 14462 /lib/libpthread.so.0 -a8024000-a8027000 rw-p 00000000 00:00 0 -a8027000-a8043000 r-xp 00000000 03:00 8317 /lib/ld-linux.so.2 -a8043000-a8044000 r--p 0001b000 03:00 8317 /lib/ld-linux.so.2 -a8044000-a8045000 rw-p 0001c000 03:00 8317 /lib/ld-linux.so.2 -aff35000-aff4a000 rw-p 00000000 00:00 0 [stack] -ffffe000-fffff000 r-xp 00000000 00:00 0 [vdso] +The format is:: + + address perms offset dev inode pathname + + 08048000-08049000 r-xp 00000000 03:00 8312 /opt/test + 08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test + 0804a000-0806b000 rw-p 00000000 00:00 0 [heap] + a7cb1000-a7cb2000 ---p 00000000 00:00 0 + a7cb2000-a7eb2000 rw-p 00000000 00:00 0 + a7eb2000-a7eb3000 ---p 00000000 00:00 0 + a7eb3000-a7ed5000 rw-p 00000000 00:00 0 + a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6 + a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6 + a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6 + a800b000-a800e000 rw-p 00000000 00:00 0 + a800e000-a8022000 r-xp 00000000 03:00 14462 /lib/libpthread.so.0 + a8022000-a8023000 r--p 00013000 03:00 14462 /lib/libpthread.so.0 + a8023000-a8024000 rw-p 00014000 03:00 14462 /lib/libpthread.so.0 + a8024000-a8027000 rw-p 00000000 00:00 0 + a8027000-a8043000 r-xp 00000000 03:00 8317 /lib/ld-linux.so.2 + a8043000-a8044000 r--p 0001b000 03:00 8317 /lib/ld-linux.so.2 + a8044000-a8045000 rw-p 0001c000 03:00 8317 /lib/ld-linux.so.2 + aff35000-aff4a000 rw-p 00000000 00:00 0 [stack] + ffffe000-fffff000 r-xp 00000000 00:00 0 [vdso] where "address" is the address space in the process that it occupies, "perms" -is a set of permissions: +is a set of permissions:: r = read w = write @@ -411,42 +422,44 @@ with the memory region, as the case would be with BSS (uninitialized data). The "pathname" shows the name associated file for this mapping. If the mapping is not associated with a file: - [heap] = the heap of the program - [stack] = the stack of the main process - [vdso] = the "virtual dynamic shared object", + ======= ==================================== + [heap] the heap of the program + [stack] the stack of the main process + [vdso] the "virtual dynamic shared object", the kernel system call handler + ======= ==================================== or if empty, the mapping is anonymous. The /proc/PID/smaps is an extension based on maps, showing the memory consumption for each of the process's mappings. For each mapping (aka Virtual -Memory Area, or VMA) there is a series of lines such as the following: - -08048000-080bc000 r-xp 00000000 03:02 13130 /bin/bash - -Size: 1084 kB -KernelPageSize: 4 kB -MMUPageSize: 4 kB -Rss: 892 kB -Pss: 374 kB -Shared_Clean: 892 kB -Shared_Dirty: 0 kB -Private_Clean: 0 kB -Private_Dirty: 0 kB -Referenced: 892 kB -Anonymous: 0 kB -LazyFree: 0 kB -AnonHugePages: 0 kB -ShmemPmdMapped: 0 kB -Shared_Hugetlb: 0 kB -Private_Hugetlb: 0 kB -Swap: 0 kB -SwapPss: 0 kB -KernelPageSize: 4 kB -MMUPageSize: 4 kB -Locked: 0 kB -THPeligible: 0 -VmFlags: rd ex mr mw me dw +Memory Area, or VMA) there is a series of lines such as the following:: + + 08048000-080bc000 r-xp 00000000 03:02 13130 /bin/bash + + Size: 1084 kB + KernelPageSize: 4 kB + MMUPageSize: 4 kB + Rss: 892 kB + Pss: 374 kB + Shared_Clean: 892 kB + Shared_Dirty: 0 kB + Private_Clean: 0 kB + Private_Dirty: 0 kB + Referenced: 892 kB + Anonymous: 0 kB + LazyFree: 0 kB + AnonHugePages: 0 kB + ShmemPmdMapped: 0 kB + Shared_Hugetlb: 0 kB + Private_Hugetlb: 0 kB + Swap: 0 kB + SwapPss: 0 kB + KernelPageSize: 4 kB + MMUPageSize: 4 kB + Locked: 0 kB + THPeligible: 0 + VmFlags: rd ex mr mw me dw The first of these lines shows the same information as is displayed for the mapping in /proc/PID/maps. Following lines show the size of the mapping @@ -461,26 +474,35 @@ The "proportional set size" (PSS) of a process is the count of pages it has in memory, where each page is divided by the number of processes sharing it. So if a process has 1000 pages all to itself, and 1000 shared with one other process, its PSS will be 1500. + Note that even a page which is part of a MAP_SHARED mapping, but has only a single pte mapped, i.e. is currently used by only one process, is accounted as private and not as shared. + "Referenced" indicates the amount of memory currently marked as referenced or accessed. + "Anonymous" shows the amount of memory that does not belong to any file. Even a mapping associated with a file may contain anonymous pages: when MAP_PRIVATE and a page is modified, the file page is replaced by a private anonymous copy. + "LazyFree" shows the amount of memory which is marked by madvise(MADV_FREE). The memory isn't freed immediately with madvise(). It's freed in memory pressure if the memory is clean. Please note that the printed value might be lower than the real value due to optimizations used in the current implementation. If this is not desirable please file a bug report. + "AnonHugePages" shows the ammount of memory backed by transparent hugepage. + "ShmemPmdMapped" shows the ammount of shared (shmem/tmpfs) memory backed by huge pages. + "Shared_Hugetlb" and "Private_Hugetlb" show the ammounts of memory backed by hugetlbfs page which is *not* counted in "RSS" or "PSS" field for historical reasons. And these are not included in {Shared,Private}_{Clean,Dirty} field. + "Swap" shows how much would-be-anonymous memory is also used, but out on swap. + For shmem mappings, "Swap" includes also the size of the mapped (and not replaced by copy-on-write) part of the underlying shmem object out on swap. "SwapPss" shows proportional swap share of this mapping. Unlike "Swap", this @@ -489,36 +511,39 @@ does not take into account swapped out page of underlying shmem objects. "THPeligible" indicates whether the mapping is eligible for allocating THP pages - 1 if true, 0 otherwise. It just shows the current status. -"VmFlags" field deserves a separate description. This member represents the kernel -flags associated with the particular virtual memory area in two letter encoded -manner. The codes are the following: - rd - readable - wr - writeable - ex - executable - sh - shared - mr - may read - mw - may write - me - may execute - ms - may share - gd - stack segment growns down - pf - pure PFN range - dw - disabled write to the mapped file - lo - pages are locked in memory - io - memory mapped I/O area - sr - sequential read advise provided - rr - random read advise provided - dc - do not copy area on fork - de - do not expand area on remapping - ac - area is accountable - nr - swap space is not reserved for the area - ht - area uses huge tlb pages - ar - architecture specific flag - dd - do not include area into core dump - sd - soft-dirty flag - mm - mixed map area - hg - huge page advise flag - nh - no-huge page advise flag - mg - mergable advise flag +"VmFlags" field deserves a separate description. This member represents the +kernel flags associated with the particular virtual memory area in two letter +encoded manner. The codes are the following: + + == ======================================= + rd readable + wr writeable + ex executable + sh shared + mr may read + mw may write + me may execute + ms may share + gd stack segment growns down + pf pure PFN range + dw disabled write to the mapped file + lo pages are locked in memory + io memory mapped I/O area + sr sequential read advise provided + rr random read advise provided + dc do not copy area on fork + de do not expand area on remapping + ac area is accountable + nr swap space is not reserved for the area + ht area uses huge tlb pages + ar architecture specific flag + dd do not include area into core dump + sd soft dirty flag + mm mixed map area + hg huge page advise flag + nh no huge page advise flag + mg mergable advise flag + == ======================================= Note that there is no guarantee that every flag and associated mnemonic will be present in all further kernel releases. Things get changed, the flags may @@ -531,6 +556,7 @@ enabled. Note: reading /proc/PID/maps or /proc/PID/smaps is inherently racy (consistent output can be achieved only in the single read call). + This typically manifests when doing partial reads of these files while the memory map is being modified. Despite the races, we do provide the following guarantees: @@ -544,9 +570,9 @@ The /proc/PID/smaps_rollup file includes the same fields as /proc/PID/smaps, but their values are the sums of the corresponding values for all mappings of the process. Additionally, it contains these fields: -Pss_Anon -Pss_File -Pss_Shmem +- Pss_Anon +- Pss_File +- Pss_Shmem They represent the proportional shares of anonymous, file, and shmem pages, as described for smaps above. These fields are omitted in smaps since each @@ -558,20 +584,25 @@ The /proc/PID/clear_refs is used to reset the PG_Referenced and ACCESSED/YOUNG bits on both physical and virtual pages associated with a process, and the soft-dirty bit on pte (see Documentation/admin-guide/mm/soft-dirty.rst for details). -To clear the bits for all the pages associated with the process +To clear the bits for all the pages associated with the process:: + > echo 1 > /proc/PID/clear_refs -To clear the bits for the anonymous pages associated with the process +To clear the bits for the anonymous pages associated with the process:: + > echo 2 > /proc/PID/clear_refs -To clear the bits for the file mapped pages associated with the process +To clear the bits for the file mapped pages associated with the process:: + > echo 3 > /proc/PID/clear_refs -To clear the soft-dirty bit +To clear the soft-dirty bit:: + > echo 4 > /proc/PID/clear_refs To reset the peak resident set size ("high water mark") to the process's -current value: +current value:: + > echo 5 > /proc/PID/clear_refs Any other value written to /proc/PID/clear_refs will have no effect. @@ -584,30 +615,33 @@ Documentation/admin-guide/mm/pagemap.rst. The /proc/pid/numa_maps is an extension based on maps, showing the memory locality and binding policy, as well as the memory usage (in pages) of each mapping. The output follows a general format where mapping details get -summarized separated by blank spaces, one mapping per each file line: - -address policy mapping details - -00400000 default file=/usr/local/bin/app mapped=1 active=0 N3=1 kernelpagesize_kB=4 -00600000 default file=/usr/local/bin/app anon=1 dirty=1 N3=1 kernelpagesize_kB=4 -3206000000 default file=/lib64/ld-2.12.so mapped=26 mapmax=6 N0=24 N3=2 kernelpagesize_kB=4 -320621f000 default file=/lib64/ld-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 -3206220000 default file=/lib64/ld-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 -3206221000 default anon=1 dirty=1 N3=1 kernelpagesize_kB=4 -3206800000 default file=/lib64/libc-2.12.so mapped=59 mapmax=21 active=55 N0=41 N3=18 kernelpagesize_kB=4 -320698b000 default file=/lib64/libc-2.12.so -3206b8a000 default file=/lib64/libc-2.12.so anon=2 dirty=2 N3=2 kernelpagesize_kB=4 -3206b8e000 default file=/lib64/libc-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 -3206b8f000 default anon=3 dirty=3 active=1 N3=3 kernelpagesize_kB=4 -7f4dc10a2000 default anon=3 dirty=3 N3=3 kernelpagesize_kB=4 -7f4dc10b4000 default anon=2 dirty=2 active=1 N3=2 kernelpagesize_kB=4 -7f4dc1200000 default file=/anon_hugepage\040(deleted) huge anon=1 dirty=1 N3=1 kernelpagesize_kB=2048 -7fff335f0000 default stack anon=3 dirty=3 N3=3 kernelpagesize_kB=4 -7fff3369d000 default mapped=1 mapmax=35 active=0 N3=1 kernelpagesize_kB=4 +summarized separated by blank spaces, one mapping per each file line:: + + address policy mapping details + + 00400000 default file=/usr/local/bin/app mapped=1 active=0 N3=1 kernelpagesize_kB=4 + 00600000 default file=/usr/local/bin/app anon=1 dirty=1 N3=1 kernelpagesize_kB=4 + 3206000000 default file=/lib64/ld-2.12.so mapped=26 mapmax=6 N0=24 N3=2 kernelpagesize_kB=4 + 320621f000 default file=/lib64/ld-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 + 3206220000 default file=/lib64/ld-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 + 3206221000 default anon=1 dirty=1 N3=1 kernelpagesize_kB=4 + 3206800000 default file=/lib64/libc-2.12.so mapped=59 mapmax=21 active=55 N0=41 N3=18 kernelpagesize_kB=4 + 320698b000 default file=/lib64/libc-2.12.so + 3206b8a000 default file=/lib64/libc-2.12.so anon=2 dirty=2 N3=2 kernelpagesize_kB=4 + 3206b8e000 default file=/lib64/libc-2.12.so anon=1 dirty=1 N3=1 kernelpagesize_kB=4 + 3206b8f000 default anon=3 dirty=3 active=1 N3=3 kernelpagesize_kB=4 + 7f4dc10a2000 default anon=3 dirty=3 N3=3 kernelpagesize_kB=4 + 7f4dc10b4000 default anon=2 dirty=2 active=1 N3=2 kernelpagesize_kB=4 + 7f4dc1200000 default file=/anon_hugepage\040(deleted) huge anon=1 dirty=1 N3=1 kernelpagesize_kB=2048 + 7fff335f0000 default stack anon=3 dirty=3 N3=3 kernelpagesize_kB=4 + 7fff3369d000 default mapped=1 mapmax=35 active=0 N3=1 kernelpagesize_kB=4 Where: + "address" is the starting address for the mapping; + "policy" reports the NUMA memory policy set for the mapping (see Documentation/admin-guide/mm/numa_memory_policy.rst); + "mapping details" summarizes mapping data such as mapping type, page usage counters, node locality page counters (N0 == node0, N1 == node1, ...) and the kernel page size, in KB, that is backing the mapping up. @@ -621,81 +655,83 @@ the running kernel. The files used to obtain this information are contained in system. It depends on the kernel configuration and the loaded modules, which files are there, and which are missing. -Table 1-5: Kernel info in /proc -.............................................................................. - File Content - apm Advanced power management info - buddyinfo Kernel memory allocator information (see text) (2.5) - bus Directory containing bus specific information - cmdline Kernel command line - cpuinfo Info about the CPU - devices Available devices (block and character) - dma Used DMS channels - filesystems Supported filesystems - driver Various drivers grouped here, currently rtc (2.4) - execdomains Execdomains, related to security (2.4) - fb Frame Buffer devices (2.4) - fs File system parameters, currently nfs/exports (2.4) - ide Directory containing info about the IDE subsystem - interrupts Interrupt usage - iomem Memory map (2.4) - ioports I/O port usage - irq Masks for irq to cpu affinity (2.4)(smp?) - isapnp ISA PnP (Plug&Play) Info (2.4) - kcore Kernel core image (can be ELF or A.OUT(deprecated in 2.4)) - kmsg Kernel messages - ksyms Kernel symbol table - loadavg Load average of last 1, 5 & 15 minutes - locks Kernel locks - meminfo Memory info - misc Miscellaneous - modules List of loaded modules - mounts Mounted filesystems - net Networking info (see text) +.. table:: Table 1-5: Kernel info in /proc + + ============ =============================================================== + File Content + ============ =============================================================== + apm Advanced power management info + buddyinfo Kernel memory allocator information (see text) (2.5) + bus Directory containing bus specific information + cmdline Kernel command line + cpuinfo Info about the CPU + devices Available devices (block and character) + dma Used DMS channels + filesystems Supported filesystems + driver Various drivers grouped here, currently rtc (2.4) + execdomains Execdomains, related to security (2.4) + fb Frame Buffer devices (2.4) + fs File system parameters, currently nfs/exports (2.4) + ide Directory containing info about the IDE subsystem + interrupts Interrupt usage + iomem Memory map (2.4) + ioports I/O port usage + irq Masks for irq to cpu affinity (2.4)(smp?) + isapnp ISA PnP (Plug&Play) Info (2.4) + kcore Kernel core image (can be ELF or A.OUT(deprecated in 2.4)) + kmsg Kernel messages + ksyms Kernel symbol table + loadavg Load average of last 1, 5 & 15 minutes + locks Kernel locks + meminfo Memory info + misc Miscellaneous + modules List of loaded modules + mounts Mounted filesystems + net Networking info (see text) pagetypeinfo Additional page allocator information (see text) (2.5) - partitions Table of partitions known to the system - pci Deprecated info of PCI bus (new way -> /proc/bus/pci/, - decoupled by lspci (2.4) - rtc Real time clock - scsi SCSI info (see text) - slabinfo Slab pool info - softirqs softirq usage - stat Overall statistics - swaps Swap space utilization - sys See chapter 2 - sysvipc Info of SysVIPC Resources (msg, sem, shm) (2.4) - tty Info of tty drivers - uptime Wall clock since boot, combined idle time of all cpus - version Kernel version - video bttv info of video resources (2.4) - vmallocinfo Show vmalloced areas -.............................................................................. + partitions Table of partitions known to the system + pci Deprecated info of PCI bus (new way -> /proc/bus/pci/, + decoupled by lspci (2.4) + rtc Real time clock + scsi SCSI info (see text) + slabinfo Slab pool info + softirqs softirq usage + stat Overall statistics + swaps Swap space utilization + sys See chapter 2 + sysvipc Info of SysVIPC Resources (msg, sem, shm) (2.4) + tty Info of tty drivers + uptime Wall clock since boot, combined idle time of all cpus + version Kernel version + video bttv info of video resources (2.4) + vmallocinfo Show vmalloced areas + ============ =============================================================== You can, for example, check which interrupts are currently in use and what -they are used for by looking in the file /proc/interrupts: - - > cat /proc/interrupts - CPU0 - 0: 8728810 XT-PIC timer - 1: 895 XT-PIC keyboard - 2: 0 XT-PIC cascade - 3: 531695 XT-PIC aha152x - 4: 2014133 XT-PIC serial - 5: 44401 XT-PIC pcnet_cs - 8: 2 XT-PIC rtc - 11: 8 XT-PIC i82365 - 12: 182918 XT-PIC PS/2 Mouse - 13: 1 XT-PIC fpu - 14: 1232265 XT-PIC ide0 - 15: 7 XT-PIC ide1 - NMI: 0 +they are used for by looking in the file /proc/interrupts:: + + > cat /proc/interrupts + CPU0 + 0: 8728810 XT-PIC timer + 1: 895 XT-PIC keyboard + 2: 0 XT-PIC cascade + 3: 531695 XT-PIC aha152x + 4: 2014133 XT-PIC serial + 5: 44401 XT-PIC pcnet_cs + 8: 2 XT-PIC rtc + 11: 8 XT-PIC i82365 + 12: 182918 XT-PIC PS/2 Mouse + 13: 1 XT-PIC fpu + 14: 1232265 XT-PIC ide0 + 15: 7 XT-PIC ide1 + NMI: 0 In 2.4.* a couple of lines where added to this file LOC & ERR (this time is the -output of a SMP machine): +output of a SMP machine):: - > cat /proc/interrupts + > cat /proc/interrupts - CPU0 CPU1 + CPU0 CPU1 0: 1243498 1214548 IO-APIC-edge timer 1: 8949 8958 IO-APIC-edge keyboard 2: 0 0 XT-PIC cascade @@ -708,8 +744,8 @@ output of a SMP machine): 15: 2183 2415 IO-APIC-edge ide1 17: 30564 30414 IO-APIC-level eth0 18: 177 164 IO-APIC-level bttv - NMI: 2457961 2457959 - LOC: 2457882 2457881 + NMI: 2457961 2457959 + LOC: 2457882 2457881 ERR: 2155 NMI is incremented in this case because every timer interrupt generates a NMI @@ -726,21 +762,25 @@ In 2.6.2* /proc/interrupts was expanded again. This time the goal was for /proc/interrupts to display every IRQ vector in use by the system, not just those considered 'most important'. The new vectors are: - THR -- interrupt raised when a machine check threshold counter +THR + interrupt raised when a machine check threshold counter (typically counting ECC corrected errors of memory or cache) exceeds a configurable threshold. Only available on some systems. - TRM -- a thermal event interrupt occurs when a temperature threshold +TRM + a thermal event interrupt occurs when a temperature threshold has been exceeded for the CPU. This interrupt may also be generated when the temperature drops back to normal. - SPU -- a spurious interrupt is some interrupt that was raised then lowered +SPU + a spurious interrupt is some interrupt that was raised then lowered by some IO device before it could be fully processed by the APIC. Hence the APIC sees the interrupt but does not know what device it came from. For this case the APIC will generate the interrupt with a IRQ vector of 0xff. This might also be generated by chipset bugs. - RES, CAL, TLB -- rescheduling, call and TLB flush interrupts are +RES, CAL, TLB] + rescheduling, call and TLB flush interrupts are sent from one CPU to another per the needs of the OS. Typically, their statistics are used by kernel developers and interested users to determine the occurrence of interrupts of the given type. @@ -756,7 +796,8 @@ IRQ to only one CPU, or to exclude a CPU of handling IRQs. The contents of the irq subdir is one subdir for each IRQ, and two files; default_smp_affinity and prof_cpu_mask. -For example +For example:: + > ls /proc/irq/ 0 10 12 14 16 18 2 4 6 8 prof_cpu_mask 1 11 13 15 17 19 3 5 7 9 default_smp_affinity @@ -764,20 +805,20 @@ For example smp_affinity smp_affinity is a bitmask, in which you can specify which CPUs can handle the -IRQ, you can set it by doing: +IRQ, you can set it by doing:: > echo 1 > /proc/irq/10/smp_affinity This means that only the first CPU will handle the IRQ, but you can also echo 5 which means that only the first and third CPU can handle the IRQ. -The contents of each smp_affinity file is the same by default: +The contents of each smp_affinity file is the same by default:: > cat /proc/irq/0/smp_affinity ffffffff There is an alternate interface, smp_affinity_list which allows specifying -a cpu range instead of a bitmask: +a cpu range instead of a bitmask:: > cat /proc/irq/0/smp_affinity_list 1024-1031 @@ -810,46 +851,46 @@ Linux uses slab pools for memory management above page level in version 2.2. Commonly used objects have their own slab pool (such as network buffers, directory cache, and so on). -.............................................................................. +:: -> cat /proc/buddyinfo + > cat /proc/buddyinfo -Node 0, zone DMA 0 4 5 4 4 3 ... -Node 0, zone Normal 1 0 0 1 101 8 ... -Node 0, zone HighMem 2 0 0 1 1 0 ... + Node 0, zone DMA 0 4 5 4 4 3 ... + Node 0, zone Normal 1 0 0 1 101 8 ... + Node 0, zone HighMem 2 0 0 1 1 0 ... External fragmentation is a problem under some workloads, and buddyinfo is a -useful tool for helping diagnose these problems. Buddyinfo will give you a +useful tool for helping diagnose these problems. Buddyinfo will give you a clue as to how big an area you can safely allocate, or why a previous allocation failed. -Each column represents the number of pages of a certain order which are -available. In this case, there are 0 chunks of 2^0*PAGE_SIZE available in -ZONE_DMA, 4 chunks of 2^1*PAGE_SIZE in ZONE_DMA, 101 chunks of 2^4*PAGE_SIZE -available in ZONE_NORMAL, etc... +Each column represents the number of pages of a certain order which are +available. In this case, there are 0 chunks of 2^0*PAGE_SIZE available in +ZONE_DMA, 4 chunks of 2^1*PAGE_SIZE in ZONE_DMA, 101 chunks of 2^4*PAGE_SIZE +available in ZONE_NORMAL, etc... More information relevant to external fragmentation can be found in -pagetypeinfo. - -> cat /proc/pagetypeinfo -Page block order: 9 -Pages per block: 512 - -Free pages count per migrate type at order 0 1 2 3 4 5 6 7 8 9 10 -Node 0, zone DMA, type Unmovable 0 0 0 1 1 1 1 1 1 1 0 -Node 0, zone DMA, type Reclaimable 0 0 0 0 0 0 0 0 0 0 0 -Node 0, zone DMA, type Movable 1 1 2 1 2 1 1 0 1 0 2 -Node 0, zone DMA, type Reserve 0 0 0 0 0 0 0 0 0 1 0 -Node 0, zone DMA, type Isolate 0 0 0 0 0 0 0 0 0 0 0 -Node 0, zone DMA32, type Unmovable 103 54 77 1 1 1 11 8 7 1 9 -Node 0, zone DMA32, type Reclaimable 0 0 2 1 0 0 0 0 1 0 0 -Node 0, zone DMA32, type Movable 169 152 113 91 77 54 39 13 6 1 452 -Node 0, zone DMA32, type Reserve 1 2 2 2 2 0 1 1 1 1 0 -Node 0, zone DMA32, type Isolate 0 0 0 0 0 0 0 0 0 0 0 - -Number of blocks type Unmovable Reclaimable Movable Reserve Isolate -Node 0, zone DMA 2 0 5 1 0 -Node 0, zone DMA32 41 6 967 2 0 +pagetypeinfo:: + + > cat /proc/pagetypeinfo + Page block order: 9 + Pages per block: 512 + + Free pages count per migrate type at order 0 1 2 3 4 5 6 7 8 9 10 + Node 0, zone DMA, type Unmovable 0 0 0 1 1 1 1 1 1 1 0 + Node 0, zone DMA, type Reclaimable 0 0 0 0 0 0 0 0 0 0 0 + Node 0, zone DMA, type Movable 1 1 2 1 2 1 1 0 1 0 2 + Node 0, zone DMA, type Reserve 0 0 0 0 0 0 0 0 0 1 0 + Node 0, zone DMA, type Isolate 0 0 0 0 0 0 0 0 0 0 0 + Node 0, zone DMA32, type Unmovable 103 54 77 1 1 1 11 8 7 1 9 + Node 0, zone DMA32, type Reclaimable 0 0 2 1 0 0 0 0 1 0 0 + Node 0, zone DMA32, type Movable 169 152 113 91 77 54 39 13 6 1 452 + Node 0, zone DMA32, type Reserve 1 2 2 2 2 0 1 1 1 1 0 + Node 0, zone DMA32, type Isolate 0 0 0 0 0 0 0 0 0 0 0 + + Number of blocks type Unmovable Reclaimable Movable Reserve Isolate + Node 0, zone DMA 2 0 5 1 0 + Node 0, zone DMA32 41 6 967 2 0 Fragmentation avoidance in the kernel works by grouping pages of different migrate types into the same contiguous regions of memory called page blocks. @@ -870,59 +911,63 @@ unless memory has been mlock()'d. Some of the Reclaimable blocks should also be allocatable although a lot of filesystem metadata may have to be reclaimed to achieve this. -.............................................................................. -meminfo: +meminfo +~~~~~~~ Provides information about distribution and utilization of memory. This varies by architecture and compile options. The following is from a 16GB PIII, which has highmem enabled. You may not have all of these fields. -> cat /proc/meminfo - -MemTotal: 16344972 kB -MemFree: 13634064 kB -MemAvailable: 14836172 kB -Buffers: 3656 kB -Cached: 1195708 kB -SwapCached: 0 kB -Active: 891636 kB -Inactive: 1077224 kB -HighTotal: 15597528 kB -HighFree: 13629632 kB -LowTotal: 747444 kB -LowFree: 4432 kB -SwapTotal: 0 kB -SwapFree: 0 kB -Dirty: 968 kB -Writeback: 0 kB -AnonPages: 861800 kB -Mapped: 280372 kB -Shmem: 644 kB -KReclaimable: 168048 kB -Slab: 284364 kB -SReclaimable: 159856 kB -SUnreclaim: 124508 kB -PageTables: 24448 kB -NFS_Unstable: 0 kB -Bounce: 0 kB -WritebackTmp: 0 kB -CommitLimit: 7669796 kB -Committed_AS: 100056 kB -VmallocTotal: 112216 kB -VmallocUsed: 428 kB -VmallocChunk: 111088 kB -Percpu: 62080 kB -HardwareCorrupted: 0 kB -AnonHugePages: 49152 kB -ShmemHugePages: 0 kB -ShmemPmdMapped: 0 kB - - - MemTotal: Total usable ram (i.e. physical ram minus a few reserved +:: + + > cat /proc/meminfo + + MemTotal: 16344972 kB + MemFree: 13634064 kB + MemAvailable: 14836172 kB + Buffers: 3656 kB + Cached: 1195708 kB + SwapCached: 0 kB + Active: 891636 kB + Inactive: 1077224 kB + HighTotal: 15597528 kB + HighFree: 13629632 kB + LowTotal: 747444 kB + LowFree: 4432 kB + SwapTotal: 0 kB + SwapFree: 0 kB + Dirty: 968 kB + Writeback: 0 kB + AnonPages: 861800 kB + Mapped: 280372 kB + Shmem: 644 kB + KReclaimable: 168048 kB + Slab: 284364 kB + SReclaimable: 159856 kB + SUnreclaim: 124508 kB + PageTables: 24448 kB + NFS_Unstable: 0 kB + Bounce: 0 kB + WritebackTmp: 0 kB + CommitLimit: 7669796 kB + Committed_AS: 100056 kB + VmallocTotal: 112216 kB + VmallocUsed: 428 kB + VmallocChunk: 111088 kB + Percpu: 62080 kB + HardwareCorrupted: 0 kB + AnonHugePages: 49152 kB + ShmemHugePages: 0 kB + ShmemPmdMapped: 0 kB + +MemTotal + Total usable ram (i.e. physical ram minus a few reserved bits and the kernel binary code) - MemFree: The sum of LowFree+HighFree -MemAvailable: An estimate of how much memory is available for starting new +MemFree + The sum of LowFree+HighFree +MemAvailable + An estimate of how much memory is available for starting new applications, without swapping. Calculated from MemFree, SReclaimable, the size of the file LRU lists, and the low watermarks in each zone. @@ -930,69 +975,99 @@ MemAvailable: An estimate of how much memory is available for starting new page cache to function well, and that not all reclaimable slab will be reclaimable, due to items being in use. The impact of those factors will vary from system to system. - Buffers: Relatively temporary storage for raw disk blocks +Buffers + Relatively temporary storage for raw disk blocks shouldn't get tremendously large (20MB or so) - Cached: in-memory cache for files read from the disk (the +Cached + in-memory cache for files read from the disk (the pagecache). Doesn't include SwapCached - SwapCached: Memory that once was swapped out, is swapped back in but +SwapCached + Memory that once was swapped out, is swapped back in but still also is in the swapfile (if memory is needed it doesn't need to be swapped out AGAIN because it is already in the swapfile. This saves I/O) - Active: Memory that has been used more recently and usually not +Active + Memory that has been used more recently and usually not reclaimed unless absolutely necessary. - Inactive: Memory which has been less recently used. It is more +Inactive + Memory which has been less recently used. It is more eligible to be reclaimed for other purposes - HighTotal: - HighFree: Highmem is all memory above ~860MB of physical memory +HighTotal, HighFree + Highmem is all memory above ~860MB of physical memory Highmem areas are for use by userspace programs, or for the pagecache. The kernel must use tricks to access this memory, making it slower to access than lowmem. - LowTotal: - LowFree: Lowmem is memory which can be used for everything that +LowTotal, LowFree + Lowmem is memory which can be used for everything that highmem can be used for, but it is also available for the kernel's use for its own data structures. Among many other things, it is where everything from the Slab is allocated. Bad things happen when you're out of lowmem. - SwapTotal: total amount of swap space available - SwapFree: Memory which has been evicted from RAM, and is temporarily +SwapTotal + total amount of swap space available +SwapFree + Memory which has been evicted from RAM, and is temporarily on the disk - Dirty: Memory which is waiting to get written back to the disk - Writeback: Memory which is actively being written back to the disk - AnonPages: Non-file backed pages mapped into userspace page tables -HardwareCorrupted: The amount of RAM/memory in KB, the kernel identifies as +Dirty + Memory which is waiting to get written back to the disk +Writeback + Memory which is actively being written back to the disk +AnonPages + Non-file backed pages mapped into userspace page tables +HardwareCorrupted + The amount of RAM/memory in KB, the kernel identifies as corrupted. -AnonHugePages: Non-file backed huge pages mapped into userspace page tables - Mapped: files which have been mmaped, such as libraries - Shmem: Total memory used by shared memory (shmem) and tmpfs -ShmemHugePages: Memory used by shared memory (shmem) and tmpfs allocated +AnonHugePages + Non-file backed huge pages mapped into userspace page tables +Mapped + files which have been mmaped, such as libraries +Shmem + Total memory used by shared memory (shmem) and tmpfs +ShmemHugePages + Memory used by shared memory (shmem) and tmpfs allocated with huge pages -ShmemPmdMapped: Shared memory mapped into userspace with huge pages -KReclaimable: Kernel allocations that the kernel will attempt to reclaim +ShmemPmdMapped + Shared memory mapped into userspace with huge pages +KReclaimable + Kernel allocations that the kernel will attempt to reclaim under memory pressure. Includes SReclaimable (below), and other direct allocations with a shrinker. - Slab: in-kernel data structures cache -SReclaimable: Part of Slab, that might be reclaimed, such as caches - SUnreclaim: Part of Slab, that cannot be reclaimed on memory pressure - PageTables: amount of memory dedicated to the lowest level of page +Slab + in-kernel data structures cache +SReclaimable + Part of Slab, that might be reclaimed, such as caches +SUnreclaim + Part of Slab, that cannot be reclaimed on memory pressure +PageTables + amount of memory dedicated to the lowest level of page tables. -NFS_Unstable: NFS pages sent to the server, but not yet committed to stable +NFS_Unstable + NFS pages sent to the server, but not yet committed to stable storage - Bounce: Memory used for block device "bounce buffers" -WritebackTmp: Memory used by FUSE for temporary writeback buffers - CommitLimit: Based on the overcommit ratio ('vm.overcommit_ratio'), +Bounce + Memory used for block device "bounce buffers" +WritebackTmp + Memory used by FUSE for temporary writeback buffers +CommitLimit + Based on the overcommit ratio ('vm.overcommit_ratio'), this is the total amount of memory currently available to be allocated on the system. This limit is only adhered to if strict overcommit accounting is enabled (mode 2 in 'vm.overcommit_memory'). - The CommitLimit is calculated with the following formula: - CommitLimit = ([total RAM pages] - [total huge TLB pages]) * - overcommit_ratio / 100 + [total swap pages] + + The CommitLimit is calculated with the following formula:: + + CommitLimit = ([total RAM pages] - [total huge TLB pages]) * + overcommit_ratio / 100 + [total swap pages] + For example, on a system with 1G of physical RAM and 7G of swap with a `vm.overcommit_ratio` of 30 it would yield a CommitLimit of 7.3G. + For more details, see the memory overcommit documentation in vm/overcommit-accounting. -Committed_AS: The amount of memory presently allocated on the system. +Committed_AS + The amount of memory presently allocated on the system. The committed memory is a sum of all of the memory which has been allocated by processes, even if it has not been "used" by them as of yet. A process which malloc()'s 1G @@ -1005,21 +1080,25 @@ Committed_AS: The amount of memory presently allocated on the system. This is useful if one needs to guarantee that processes will not fail due to lack of memory once that memory has been successfully allocated. -VmallocTotal: total size of vmalloc memory area - VmallocUsed: amount of vmalloc area which is used -VmallocChunk: largest contiguous block of vmalloc area which is free - Percpu: Memory allocated to the percpu allocator used to back percpu +VmallocTotal + total size of vmalloc memory area +VmallocUsed + amount of vmalloc area which is used +VmallocChunk + largest contiguous block of vmalloc area which is free +Percpu + Memory allocated to the percpu allocator used to back percpu allocations. This stat excludes the cost of metadata. -.............................................................................. - -vmallocinfo: +vmallocinfo +~~~~~~~~~~~ Provides information about vmalloced/vmaped areas. One line per area, containing the virtual address range of the area, size in bytes, caller information of the creator, and optional information depending on the kind of area : + ========== =================================================== pages=nr number of pages phys=addr if a physical address was specified ioremap I/O mapping (ioremap() and friends) @@ -1029,49 +1108,54 @@ on the kind of area : vpages buffer for pages pointers was vmalloced (huge area) N<node>=nr (Only on NUMA kernels) Number of pages allocated on memory node <node> - -> cat /proc/vmallocinfo -0xffffc20000000000-0xffffc20000201000 2101248 alloc_large_system_hash+0x204 ... - /0x2c0 pages=512 vmalloc N0=128 N1=128 N2=128 N3=128 -0xffffc20000201000-0xffffc20000302000 1052672 alloc_large_system_hash+0x204 ... - /0x2c0 pages=256 vmalloc N0=64 N1=64 N2=64 N3=64 -0xffffc20000302000-0xffffc20000304000 8192 acpi_tb_verify_table+0x21/0x4f... - phys=7fee8000 ioremap -0xffffc20000304000-0xffffc20000307000 12288 acpi_tb_verify_table+0x21/0x4f... - phys=7fee7000 ioremap -0xffffc2000031d000-0xffffc2000031f000 8192 init_vdso_vars+0x112/0x210 -0xffffc2000031f000-0xffffc2000032b000 49152 cramfs_uncompress_init+0x2e ... - /0x80 pages=11 vmalloc N0=3 N1=3 N2=2 N3=3 -0xffffc2000033a000-0xffffc2000033d000 12288 sys_swapon+0x640/0xac0 ... - pages=2 vmalloc N1=2 -0xffffc20000347000-0xffffc2000034c000 20480 xt_alloc_table_info+0xfe ... - /0x130 [x_tables] pages=4 vmalloc N0=4 -0xffffffffa0000000-0xffffffffa000f000 61440 sys_init_module+0xc27/0x1d00 ... - pages=14 vmalloc N2=14 -0xffffffffa000f000-0xffffffffa0014000 20480 sys_init_module+0xc27/0x1d00 ... - pages=4 vmalloc N1=4 -0xffffffffa0014000-0xffffffffa0017000 12288 sys_init_module+0xc27/0x1d00 ... - pages=2 vmalloc N1=2 -0xffffffffa0017000-0xffffffffa0022000 45056 sys_init_module+0xc27/0x1d00 ... - pages=10 vmalloc N0=10 - -.............................................................................. - -softirqs: + ========== =================================================== + +:: + + > cat /proc/vmallocinfo + 0xffffc20000000000-0xffffc20000201000 2101248 alloc_large_system_hash+0x204 ... + /0x2c0 pages=512 vmalloc N0=128 N1=128 N2=128 N3=128 + 0xffffc20000201000-0xffffc20000302000 1052672 alloc_large_system_hash+0x204 ... + /0x2c0 pages=256 vmalloc N0=64 N1=64 N2=64 N3=64 + 0xffffc20000302000-0xffffc20000304000 8192 acpi_tb_verify_table+0x21/0x4f... + phys=7fee8000 ioremap + 0xffffc20000304000-0xffffc20000307000 12288 acpi_tb_verify_table+0x21/0x4f... + phys=7fee7000 ioremap + 0xffffc2000031d000-0xffffc2000031f000 8192 init_vdso_vars+0x112/0x210 + 0xffffc2000031f000-0xffffc2000032b000 49152 cramfs_uncompress_init+0x2e ... + /0x80 pages=11 vmalloc N0=3 N1=3 N2=2 N3=3 + 0xffffc2000033a000-0xffffc2000033d000 12288 sys_swapon+0x640/0xac0 ... + pages=2 vmalloc N1=2 + 0xffffc20000347000-0xffffc2000034c000 20480 xt_alloc_table_info+0xfe ... + /0x130 [x_tables] pages=4 vmalloc N0=4 + 0xffffffffa0000000-0xffffffffa000f000 61440 sys_init_module+0xc27/0x1d00 ... + pages=14 vmalloc N2=14 + 0xffffffffa000f000-0xffffffffa0014000 20480 sys_init_module+0xc27/0x1d00 ... + pages=4 vmalloc N1=4 + 0xffffffffa0014000-0xffffffffa0017000 12288 sys_init_module+0xc27/0x1d00 ... + pages=2 vmalloc N1=2 + 0xffffffffa0017000-0xffffffffa0022000 45056 sys_init_module+0xc27/0x1d00 ... + pages=10 vmalloc N0=10 + + +softirqs +~~~~~~~~ Provides counts of softirq handlers serviced since boot time, for each cpu. -> cat /proc/softirqs - CPU0 CPU1 CPU2 CPU3 - HI: 0 0 0 0 - TIMER: 27166 27120 27097 27034 - NET_TX: 0 0 0 17 - NET_RX: 42 0 0 39 - BLOCK: 0 0 107 1121 - TASKLET: 0 0 0 290 - SCHED: 27035 26983 26971 26746 - HRTIMER: 0 0 0 0 - RCU: 1678 1769 2178 2250 +:: + + > cat /proc/softirqs + CPU0 CPU1 CPU2 CPU3 + HI: 0 0 0 0 + TIMER: 27166 27120 27097 27034 + NET_TX: 0 0 0 17 + NET_RX: 42 0 0 39 + BLOCK: 0 0 107 1121 + TASKLET: 0 0 0 290 + SCHED: 27035 26983 26971 26746 + HRTIMER: 0 0 0 0 + RCU: 1678 1769 2178 2250 1.3 IDE devices in /proc/ide @@ -1083,7 +1167,7 @@ file drivers and a link for each IDE device, pointing to the device directory in the controller specific subtree. The file drivers contains general information about the drivers used for the -IDE devices: +IDE devices:: > cat /proc/ide/drivers ide-cdrom version 4.53 @@ -1094,57 +1178,61 @@ subdirectories. These are named ide0, ide1 and so on. Each of these directories contains the files shown in table 1-6. -Table 1-6: IDE controller info in /proc/ide/ide? -.............................................................................. - File Content - channel IDE channel (0 or 1) - config Configuration (only for PCI/IDE bridge) - mate Mate name - model Type/Chipset of IDE controller -.............................................................................. +.. table:: Table 1-6: IDE controller info in /proc/ide/ide? + + ======= ======================================= + File Content + ======= ======================================= + channel IDE channel (0 or 1) + config Configuration (only for PCI/IDE bridge) + mate Mate name + model Type/Chipset of IDE controller + ======= ======================================= Each device connected to a controller has a separate subdirectory in the controllers directory. The files listed in table 1-7 are contained in these directories. -Table 1-7: IDE device information -.............................................................................. - File Content - cache The cache - capacity Capacity of the medium (in 512Byte blocks) - driver driver and version - geometry physical and logical geometry - identify device identify block - media media type - model device identifier - settings device setup - smart_thresholds IDE disk management thresholds - smart_values IDE disk management values -.............................................................................. - -The most interesting file is settings. This file contains a nice overview of -the drive parameters: - - # cat /proc/ide/ide0/hda/settings - name value min max mode - ---- ----- --- --- ---- - bios_cyl 526 0 65535 rw - bios_head 255 0 255 rw - bios_sect 63 0 63 rw - breada_readahead 4 0 127 rw - bswap 0 0 1 r - file_readahead 72 0 2097151 rw - io_32bit 0 0 3 rw - keepsettings 0 0 1 rw - max_kb_per_request 122 1 127 rw - multcount 0 0 8 rw - nice1 1 0 1 rw - nowerr 0 0 1 rw - pio_mode write-only 0 255 w - slow 0 0 1 rw - unmaskirq 0 0 1 rw - using_dma 0 0 1 rw +.. table:: Table 1-7: IDE device information + + ================ ========================================== + File Content + ================ ========================================== + cache The cache + capacity Capacity of the medium (in 512Byte blocks) + driver driver and version + geometry physical and logical geometry + identify device identify block + media media type + model device identifier + settings device setup + smart_thresholds IDE disk management thresholds + smart_values IDE disk management values + ================ ========================================== + +The most interesting file is ``settings``. This file contains a nice +overview of the drive parameters:: + + # cat /proc/ide/ide0/hda/settings + name value min max mode + ---- ----- --- --- ---- + bios_cyl 526 0 65535 rw + bios_head 255 0 255 rw + bios_sect 63 0 63 rw + breada_readahead 4 0 127 rw + bswap 0 0 1 r + file_readahead 72 0 2097151 rw + io_32bit 0 0 3 rw + keepsettings 0 0 1 rw + max_kb_per_request 122 1 127 rw + multcount 0 0 8 rw + nice1 1 0 1 rw + nowerr 0 0 1 rw + pio_mode write-only 0 255 w + slow 0 0 1 rw + unmaskirq 0 0 1 rw + using_dma 0 0 1 rw 1.4 Networking info in /proc/net @@ -1155,67 +1243,70 @@ additional values you get for IP version 6 if you configure the kernel to support this. Table 1-9 lists the files and their meaning. -Table 1-8: IPv6 info in /proc/net -.............................................................................. - File Content - udp6 UDP sockets (IPv6) - tcp6 TCP sockets (IPv6) - raw6 Raw device statistics (IPv6) - igmp6 IP multicast addresses, which this host joined (IPv6) - if_inet6 List of IPv6 interface addresses - ipv6_route Kernel routing table for IPv6 - rt6_stats Global IPv6 routing tables statistics - sockstat6 Socket statistics (IPv6) - snmp6 Snmp data (IPv6) -.............................................................................. - - -Table 1-9: Network info in /proc/net -.............................................................................. - File Content - arp Kernel ARP table - dev network devices with statistics +.. table:: Table 1-8: IPv6 info in /proc/net + + ========== ===================================================== + File Content + ========== ===================================================== + udp6 UDP sockets (IPv6) + tcp6 TCP sockets (IPv6) + raw6 Raw device statistics (IPv6) + igmp6 IP multicast addresses, which this host joined (IPv6) + if_inet6 List of IPv6 interface addresses + ipv6_route Kernel routing table for IPv6 + rt6_stats Global IPv6 routing tables statistics + sockstat6 Socket statistics (IPv6) + snmp6 Snmp data (IPv6) + ========== ===================================================== + +.. table:: Table 1-9: Network info in /proc/net + + ============= ================================================================ + File Content + ============= ================================================================ + arp Kernel ARP table + dev network devices with statistics dev_mcast the Layer2 multicast groups a device is listening too (interface index, label, number of references, number of bound - addresses). - dev_stat network device status - ip_fwchains Firewall chain linkage - ip_fwnames Firewall chain names - ip_masq Directory containing the masquerading tables - ip_masquerade Major masquerading table - netstat Network statistics - raw raw device statistics - route Kernel routing table - rpc Directory containing rpc info - rt_cache Routing cache - snmp SNMP data - sockstat Socket statistics - tcp TCP sockets - udp UDP sockets - unix UNIX domain sockets - wireless Wireless interface data (Wavelan etc) - igmp IP multicast addresses, which this host joined - psched Global packet scheduler parameters. - netlink List of PF_NETLINK sockets - ip_mr_vifs List of multicast virtual interfaces - ip_mr_cache List of multicast routing cache -.............................................................................. + addresses). + dev_stat network device status + ip_fwchains Firewall chain linkage + ip_fwnames Firewall chain names + ip_masq Directory containing the masquerading tables + ip_masquerade Major masquerading table + netstat Network statistics + raw raw device statistics + route Kernel routing table + rpc Directory containing rpc info + rt_cache Routing cache + snmp SNMP data + sockstat Socket statistics + tcp TCP sockets + udp UDP sockets + unix UNIX domain sockets + wireless Wireless interface data (Wavelan etc) + igmp IP multicast addresses, which this host joined + psched Global packet scheduler parameters. + netlink List of PF_NETLINK sockets + ip_mr_vifs List of multicast virtual interfaces + ip_mr_cache List of multicast routing cache + ============= ================================================================ You can use this information to see which network devices are available in -your system and how much traffic was routed over those devices: - - > cat /proc/net/dev - Inter-|Receive |[... - face |bytes packets errs drop fifo frame compressed multicast|[... - lo: 908188 5596 0 0 0 0 0 0 [... - ppp0:15475140 20721 410 0 0 410 0 0 [... - eth0: 614530 7085 0 0 0 0 0 1 [... - - ...] Transmit - ...] bytes packets errs drop fifo colls carrier compressed - ...] 908188 5596 0 0 0 0 0 0 - ...] 1375103 17405 0 0 0 0 0 0 - ...] 1703981 5535 0 0 0 3 0 0 +your system and how much traffic was routed over those devices:: + + > cat /proc/net/dev + Inter-|Receive |[... + face |bytes packets errs drop fifo frame compressed multicast|[... + lo: 908188 5596 0 0 0 0 0 0 [... + ppp0:15475140 20721 410 0 0 410 0 0 [... + eth0: 614530 7085 0 0 0 0 0 1 [... + + ...] Transmit + ...] bytes packets errs drop fifo colls carrier compressed + ...] 908188 5596 0 0 0 0 0 0 + ...] 1375103 17405 0 0 0 0 0 0 + ...] 1703981 5535 0 0 0 3 0 0 In addition, each Channel Bond interface has its own directory. For example, the bond0 device will have a directory called /proc/net/bond0/. @@ -1228,62 +1319,62 @@ many times the slaves link has failed. If you have a SCSI host adapter in your system, you'll find a subdirectory named after the driver for this adapter in /proc/scsi. You'll also see a list -of all recognized SCSI devices in /proc/scsi: +of all recognized SCSI devices in /proc/scsi:: - >cat /proc/scsi/scsi - Attached devices: - Host: scsi0 Channel: 00 Id: 00 Lun: 00 - Vendor: IBM Model: DGHS09U Rev: 03E0 - Type: Direct-Access ANSI SCSI revision: 03 - Host: scsi0 Channel: 00 Id: 06 Lun: 00 - Vendor: PIONEER Model: CD-ROM DR-U06S Rev: 1.04 - Type: CD-ROM ANSI SCSI revision: 02 + >cat /proc/scsi/scsi + Attached devices: + Host: scsi0 Channel: 00 Id: 00 Lun: 00 + Vendor: IBM Model: DGHS09U Rev: 03E0 + Type: Direct-Access ANSI SCSI revision: 03 + Host: scsi0 Channel: 00 Id: 06 Lun: 00 + Vendor: PIONEER Model: CD-ROM DR-U06S Rev: 1.04 + Type: CD-ROM ANSI SCSI revision: 02 The directory named after the driver has one file for each adapter found in the system. These files contain information about the controller, including the used IRQ and the IO address range. The amount of information shown is dependent on the adapter you use. The example shows the output for an Adaptec -AHA-2940 SCSI adapter: - - > cat /proc/scsi/aic7xxx/0 - - Adaptec AIC7xxx driver version: 5.1.19/3.2.4 - Compile Options: - TCQ Enabled By Default : Disabled - AIC7XXX_PROC_STATS : Disabled - AIC7XXX_RESET_DELAY : 5 - Adapter Configuration: - SCSI Adapter: Adaptec AHA-294X Ultra SCSI host adapter - Ultra Wide Controller - PCI MMAPed I/O Base: 0xeb001000 - Adapter SEEPROM Config: SEEPROM found and used. - Adaptec SCSI BIOS: Enabled - IRQ: 10 - SCBs: Active 0, Max Active 2, - Allocated 15, HW 16, Page 255 - Interrupts: 160328 - BIOS Control Word: 0x18b6 - Adapter Control Word: 0x005b - Extended Translation: Enabled - Disconnect Enable Flags: 0xffff - Ultra Enable Flags: 0x0001 - Tag Queue Enable Flags: 0x0000 - Ordered Queue Tag Flags: 0x0000 - Default Tag Queue Depth: 8 - Tagged Queue By Device array for aic7xxx host instance 0: - {255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255} - Actual queue depth per device for aic7xxx host instance 0: - {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} - Statistics: - (scsi0:0:0:0) - Device using Wide/Sync transfers at 40.0 MByte/sec, offset 8 - Transinfo settings: current(12/8/1/0), goal(12/8/1/0), user(12/15/1/0) - Total transfers 160151 (74577 reads and 85574 writes) - (scsi0:0:6:0) - Device using Narrow/Sync transfers at 5.0 MByte/sec, offset 15 - Transinfo settings: current(50/15/0/0), goal(50/15/0/0), user(50/15/0/0) - Total transfers 0 (0 reads and 0 writes) +AHA-2940 SCSI adapter:: + + > cat /proc/scsi/aic7xxx/0 + + Adaptec AIC7xxx driver version: 5.1.19/3.2.4 + Compile Options: + TCQ Enabled By Default : Disabled + AIC7XXX_PROC_STATS : Disabled + AIC7XXX_RESET_DELAY : 5 + Adapter Configuration: + SCSI Adapter: Adaptec AHA-294X Ultra SCSI host adapter + Ultra Wide Controller + PCI MMAPed I/O Base: 0xeb001000 + Adapter SEEPROM Config: SEEPROM found and used. + Adaptec SCSI BIOS: Enabled + IRQ: 10 + SCBs: Active 0, Max Active 2, + Allocated 15, HW 16, Page 255 + Interrupts: 160328 + BIOS Control Word: 0x18b6 + Adapter Control Word: 0x005b + Extended Translation: Enabled + Disconnect Enable Flags: 0xffff + Ultra Enable Flags: 0x0001 + Tag Queue Enable Flags: 0x0000 + Ordered Queue Tag Flags: 0x0000 + Default Tag Queue Depth: 8 + Tagged Queue By Device array for aic7xxx host instance 0: + {255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255} + Actual queue depth per device for aic7xxx host instance 0: + {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} + Statistics: + (scsi0:0:0:0) + Device using Wide/Sync transfers at 40.0 MByte/sec, offset 8 + Transinfo settings: current(12/8/1/0), goal(12/8/1/0), user(12/15/1/0) + Total transfers 160151 (74577 reads and 85574 writes) + (scsi0:0:6:0) + Device using Narrow/Sync transfers at 5.0 MByte/sec, offset 15 + Transinfo settings: current(50/15/0/0), goal(50/15/0/0), user(50/15/0/0) + Total transfers 0 (0 reads and 0 writes) 1.6 Parallel port info in /proc/parport @@ -1296,18 +1387,20 @@ number (0,1,2,...). These directories contain the four files shown in Table 1-10. -Table 1-10: Files in /proc/parport -.............................................................................. - File Content - autoprobe Any IEEE-1284 device ID information that has been acquired. +.. table:: Table 1-10: Files in /proc/parport + + ========= ==================================================================== + File Content + ========= ==================================================================== + autoprobe Any IEEE-1284 device ID information that has been acquired. devices list of the device drivers using that port. A + will appear by the name of the device currently using the port (it might not appear - against any). - hardware Parallel port's base address, IRQ line and DMA channel. + against any). + hardware Parallel port's base address, IRQ line and DMA channel. irq IRQ that parport is using for that port. This is in a separate file to allow you to alter it by writing a new value in (IRQ - number or none). -.............................................................................. + number or none). + ========= ==================================================================== 1.7 TTY info in /proc/tty ------------------------- @@ -1317,29 +1410,31 @@ directory /proc/tty.You'll find entries for drivers and line disciplines in this directory, as shown in Table 1-11. -Table 1-11: Files in /proc/tty -.............................................................................. - File Content - drivers list of drivers and their usage - ldiscs registered line disciplines - driver/serial usage statistic and status of single tty lines -.............................................................................. +.. table:: Table 1-11: Files in /proc/tty + + ============= ============================================== + File Content + ============= ============================================== + drivers list of drivers and their usage + ldiscs registered line disciplines + driver/serial usage statistic and status of single tty lines + ============= ============================================== To see which tty's are currently in use, you can simply look into the file -/proc/tty/drivers: - - > cat /proc/tty/drivers - pty_slave /dev/pts 136 0-255 pty:slave - pty_master /dev/ptm 128 0-255 pty:master - pty_slave /dev/ttyp 3 0-255 pty:slave - pty_master /dev/pty 2 0-255 pty:master - serial /dev/cua 5 64-67 serial:callout - serial /dev/ttyS 4 64-67 serial - /dev/tty0 /dev/tty0 4 0 system:vtmaster - /dev/ptmx /dev/ptmx 5 2 system - /dev/console /dev/console 5 1 system:console - /dev/tty /dev/tty 5 0 system:/dev/tty - unknown /dev/tty 4 1-63 console +/proc/tty/drivers:: + + > cat /proc/tty/drivers + pty_slave /dev/pts 136 0-255 pty:slave + pty_master /dev/ptm 128 0-255 pty:master + pty_slave /dev/ttyp 3 0-255 pty:slave + pty_master /dev/pty 2 0-255 pty:master + serial /dev/cua 5 64-67 serial:callout + serial /dev/ttyS 4 64-67 serial + /dev/tty0 /dev/tty0 4 0 system:vtmaster + /dev/ptmx /dev/ptmx 5 2 system + /dev/console /dev/console 5 1 system:console + /dev/tty /dev/tty 5 0 system:/dev/tty + unknown /dev/tty 4 1-63 console 1.8 Miscellaneous kernel statistics in /proc/stat @@ -1347,7 +1442,7 @@ To see which tty's are currently in use, you can simply look into the file Various pieces of information about kernel activity are available in the /proc/stat file. All of the numbers reported in this file are aggregates -since the system first booted. For a quick look, simply cat the file: +since the system first booted. For a quick look, simply cat the file:: > cat /proc/stat cpu 2255 34 2290 22625563 6290 127 456 0 0 0 @@ -1372,6 +1467,7 @@ second). The meanings of the columns are as follows, from left to right: - idle: twiddling thumbs - iowait: In a word, iowait stands for waiting for I/O to complete. But there are several problems: + 1. Cpu will not wait for I/O to complete, iowait is the time that a task is waiting for I/O to complete. When cpu goes into idle state for outstanding task io, another task will be scheduled on this CPU. @@ -1379,6 +1475,7 @@ second). The meanings of the columns are as follows, from left to right: on any CPU, so the iowait of each CPU is difficult to calculate. 3. The value of iowait field in /proc/stat will decrease in certain conditions. + So, the iowait is not reliable by reading from /proc/stat. - irq: servicing interrupts - softirq: servicing softirqs @@ -1422,18 +1519,19 @@ Information about mounted ext4 file systems can be found in /proc/fs/ext4/dm-0). The files in each per-device directory are shown in Table 1-12, below. -Table 1-12: Files in /proc/fs/ext4/<devname> -.............................................................................. - File Content +.. table:: Table 1-12: Files in /proc/fs/ext4/<devname> + + ============== ========================================================== + File Content mb_groups details of multiblock allocator buddy cache of free blocks -.............................................................................. + ============== ========================================================== 2.0 /proc/consoles ------------------ Shows registered system console lines. To see which character device lines are currently used for the system console -/dev/console, you may simply look into the file /proc/consoles: +/dev/console, you may simply look into the file /proc/consoles:: > cat /proc/consoles tty0 -WU (ECp) 4:7 @@ -1441,41 +1539,45 @@ To see which character device lines are currently used for the system console The columns are: - device name of the device - operations R = can do read operations - W = can do write operations - U = can do unblank - flags E = it is enabled - C = it is preferred console - B = it is primary boot console - p = it is used for printk buffer - b = it is not a TTY but a Braille device - a = it is safe to use when cpu is offline - major:minor major and minor number of the device separated by a colon ++--------------------+-------------------------------------------------------+ +| device | name of the device | ++====================+=======================================================+ +| operations | * R = can do read operations | +| | * W = can do write operations | +| | * U = can do unblank | ++--------------------+-------------------------------------------------------+ +| flags | * E = it is enabled | +| | * C = it is preferred console | +| | * B = it is primary boot console | +| | * p = it is used for printk buffer | +| | * b = it is not a TTY but a Braille device | +| | * a = it is safe to use when cpu is offline | ++--------------------+-------------------------------------------------------+ +| major:minor | major and minor number of the device separated by a | +| | colon | ++--------------------+-------------------------------------------------------+ ------------------------------------------------------------------------------- Summary ------------------------------------------------------------------------------- +------- + The /proc file system serves information about the running system. It not only allows access to process data but also allows you to request the kernel status by reading files in the hierarchy. The directory structure of /proc reflects the types of information and makes it easy, if not obvious, where to look for specific data. ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- -CHAPTER 2: MODIFYING SYSTEM PARAMETERS ------------------------------------------------------------------------------- +Chapter 2: Modifying System Parameters +====================================== ------------------------------------------------------------------------------- In This Chapter ------------------------------------------------------------------------------- +--------------- + * Modifying kernel parameters by writing into files found in /proc/sys * Exploring the files which modify certain parameters * Review of the /proc/sys file tree ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ A very interesting part of /proc is the directory /proc/sys. This is not only a source of information, it also allows you to change parameters within the @@ -1503,19 +1605,18 @@ kernels, and became part of it in version 2.2.1 of the Linux kernel. Please see: Documentation/admin-guide/sysctl/ directory for descriptions of these entries. ------------------------------------------------------------------------------- Summary ------------------------------------------------------------------------------- +------- + Certain aspects of kernel behavior can be modified at runtime, without the need to recompile the kernel, or even to reboot the system. The files in the /proc/sys tree can not only be read, but also modified. You can use the echo command to write value into these files, thereby changing the default settings of the kernel. ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- -CHAPTER 3: PER-PROCESS PARAMETERS ------------------------------------------------------------------------------- + +Chapter 3: Per-process Parameters +================================= 3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj- Adjust the oom-killer score -------------------------------------------------------------------------------- @@ -1588,26 +1689,28 @@ process should be killed in an out-of-memory situation. This file contains IO statistics for each running process Example -------- +~~~~~~~ + +:: -test:/tmp # dd if=/dev/zero of=/tmp/test.dat & -[1] 3828 + test:/tmp # dd if=/dev/zero of=/tmp/test.dat & + [1] 3828 -test:/tmp # cat /proc/3828/io -rchar: 323934931 -wchar: 323929600 -syscr: 632687 -syscw: 632675 -read_bytes: 0 -write_bytes: 323932160 -cancelled_write_bytes: 0 + test:/tmp # cat /proc/3828/io + rchar: 323934931 + wchar: 323929600 + syscr: 632687 + syscw: 632675 + read_bytes: 0 + write_bytes: 323932160 + cancelled_write_bytes: 0 Description ------------ +~~~~~~~~~~~ rchar ------ +^^^^^ I/O counter: chars read The number of bytes which this task has caused to be read from storage. This @@ -1618,7 +1721,7 @@ pagecache) wchar ------ +^^^^^ I/O counter: chars written The number of bytes which this task has caused, or shall cause to be written @@ -1626,7 +1729,7 @@ to disk. Similar caveats apply here as with rchar. syscr ------ +^^^^^ I/O counter: read syscalls Attempt to count the number of read I/O operations, i.e. syscalls like read() @@ -1634,7 +1737,7 @@ and pread(). syscw ------ +^^^^^ I/O counter: write syscalls Attempt to count the number of write I/O operations, i.e. syscalls like @@ -1642,7 +1745,7 @@ write() and pwrite(). read_bytes ----------- +^^^^^^^^^^ I/O counter: bytes read Attempt to count the number of bytes which this process really did cause to @@ -1652,7 +1755,7 @@ CIFS at a later time> write_bytes ------------ +^^^^^^^^^^^ I/O counter: bytes written Attempt to count the number of bytes which this process caused to be sent to @@ -1660,7 +1763,7 @@ the storage layer. This is done at page-dirtying time. cancelled_write_bytes ---------------------- +^^^^^^^^^^^^^^^^^^^^^ The big inaccuracy here is truncate. If a process writes 1MB to a file and then deletes the file, it will in fact perform no writeout. But it will have @@ -1673,12 +1776,11 @@ from the truncating task's write_bytes, but there is information loss in doing that. -Note ----- +.. Note:: -At its current implementation state, this is a bit racy on 32-bit machines: if -process A reads process B's /proc/pid/io while process B is updating one of -those 64-bit counters, process A could see an intermediate result. + At its current implementation state, this is a bit racy on 32-bit machines: + if process A reads process B's /proc/pid/io while process B is updating one + of those 64-bit counters, process A could see an intermediate result. More information about this can be found within the taskstats documentation in @@ -1698,12 +1800,13 @@ of memory types. If a bit of the bitmask is set, memory segments of the corresponding memory type are dumped, otherwise they are not dumped. The following 9 memory types are supported: + - (bit 0) anonymous private memory - (bit 1) anonymous shared memory - (bit 2) file-backed private memory - (bit 3) file-backed shared memory - (bit 4) ELF header pages in file-backed private memory areas (it is - effective only if the bit 2 is cleared) + effective only if the bit 2 is cleared) - (bit 5) hugetlb private memory - (bit 6) hugetlb shared memory - (bit 7) DAX private memory @@ -1719,13 +1822,13 @@ The default value of coredump_filter is 0x33; this means all anonymous memory segments, ELF header pages and hugetlb private memory are dumped. If you don't want to dump all shared memory segments attached to pid 1234, -write 0x31 to the process's proc file. +write 0x31 to the process's proc file:: $ echo 0x31 > /proc/1234/coredump_filter When a new process is created, the process inherits the bitmask status from its parent. It is useful to set up coredump_filter before the program runs. -For example: +For example:: $ echo 0x7 > /proc/self/coredump_filter $ ./some_program @@ -1733,35 +1836,37 @@ For example: 3.5 /proc/<pid>/mountinfo - Information about mounts -------------------------------------------------------- -This file contains lines of the form: +This file contains lines of the form:: -36 35 98:0 /mnt1 /mnt2 rw,noatime master:1 - ext3 /dev/root rw,errors=continue -(1)(2)(3) (4) (5) (6) (7) (8) (9) (10) (11) + 36 35 98:0 /mnt1 /mnt2 rw,noatime master:1 - ext3 /dev/root rw,errors=continue + (1)(2)(3) (4) (5) (6) (7) (8) (9) (10) (11) -(1) mount ID: unique identifier of the mount (may be reused after umount) -(2) parent ID: ID of parent (or of self for the top of the mount tree) -(3) major:minor: value of st_dev for files on filesystem -(4) root: root of the mount within the filesystem -(5) mount point: mount point relative to the process's root -(6) mount options: per mount options -(7) optional fields: zero or more fields of the form "tag[:value]" -(8) separator: marks the end of the optional fields -(9) filesystem type: name of filesystem of the form "type[.subtype]" -(10) mount source: filesystem specific information or "none" -(11) super options: per super block options + (1) mount ID: unique identifier of the mount (may be reused after umount) + (2) parent ID: ID of parent (or of self for the top of the mount tree) + (3) major:minor: value of st_dev for files on filesystem + (4) root: root of the mount within the filesystem + (5) mount point: mount point relative to the process's root + (6) mount options: per mount options + (7) optional fields: zero or more fields of the form "tag[:value]" + (8) separator: marks the end of the optional fields + (9) filesystem type: name of filesystem of the form "type[.subtype]" + (10) mount source: filesystem specific information or "none" + (11) super options: per super block options Parsers should ignore all unrecognised optional fields. Currently the possible optional fields are: -shared:X mount is shared in peer group X -master:X mount is slave to peer group X -propagate_from:X mount is slave and receives propagation from peer group X (*) -unbindable mount is unbindable +================ ============================================================== +shared:X mount is shared in peer group X +master:X mount is slave to peer group X +propagate_from:X mount is slave and receives propagation from peer group X [#]_ +unbindable mount is unbindable +================ ============================================================== -(*) X is the closest dominant peer group under the process's root. If -X is the immediate master of the mount, or if there's no dominant peer -group under the same root, then only the "master:X" field is present -and not the "propagate_from:X" field. +.. [#] X is the closest dominant peer group under the process's root. If + X is the immediate master of the mount, or if there's no dominant peer + group under the same root, then only the "master:X" field is present + and not the "propagate_from:X" field. For more information on mount propagation see: @@ -1804,77 +1909,86 @@ created with [see open(2) for details] and 'mnt_id' represents mount ID of the file system containing the opened file [see 3.5 /proc/<pid>/mountinfo for details]. -A typical output is +A typical output is:: pos: 0 flags: 0100002 mnt_id: 19 -All locks associated with a file descriptor are shown in its fdinfo too. +All locks associated with a file descriptor are shown in its fdinfo too:: -lock: 1: FLOCK ADVISORY WRITE 359 00:13:11691 0 EOF + lock: 1: FLOCK ADVISORY WRITE 359 00:13:11691 0 EOF The files such as eventfd, fsnotify, signalfd, epoll among the regular pos/flags pair provide additional information particular to the objects they represent. - Eventfd files - ~~~~~~~~~~~~~ +Eventfd files +~~~~~~~~~~~~~ + +:: + pos: 0 flags: 04002 mnt_id: 9 eventfd-count: 5a - where 'eventfd-count' is hex value of a counter. +where 'eventfd-count' is hex value of a counter. + +Signalfd files +~~~~~~~~~~~~~~ + +:: - Signalfd files - ~~~~~~~~~~~~~~ pos: 0 flags: 04002 mnt_id: 9 sigmask: 0000000000000200 - where 'sigmask' is hex value of the signal mask associated - with a file. +where 'sigmask' is hex value of the signal mask associated +with a file. + +Epoll files +~~~~~~~~~~~ + +:: - Epoll files - ~~~~~~~~~~~ pos: 0 flags: 02 mnt_id: 9 tfd: 5 events: 1d data: ffffffffffffffff pos:0 ino:61af sdev:7 - where 'tfd' is a target file descriptor number in decimal form, - 'events' is events mask being watched and the 'data' is data - associated with a target [see epoll(7) for more details]. +where 'tfd' is a target file descriptor number in decimal form, +'events' is events mask being watched and the 'data' is data +associated with a target [see epoll(7) for more details]. - The 'pos' is current offset of the target file in decimal form - [see lseek(2)], 'ino' and 'sdev' are inode and device numbers - where target file resides, all in hex format. +The 'pos' is current offset of the target file in decimal form +[see lseek(2)], 'ino' and 'sdev' are inode and device numbers +where target file resides, all in hex format. - Fsnotify files - ~~~~~~~~~~~~~~ - For inotify files the format is the following +Fsnotify files +~~~~~~~~~~~~~~ +For inotify files the format is the following:: pos: 0 flags: 02000000 inotify wd:3 ino:9e7e sdev:800013 mask:800afce ignored_mask:0 fhandle-bytes:8 fhandle-type:1 f_handle:7e9e0000640d1b6d - where 'wd' is a watch descriptor in decimal form, ie a target file - descriptor number, 'ino' and 'sdev' are inode and device where the - target file resides and the 'mask' is the mask of events, all in hex - form [see inotify(7) for more details]. +where 'wd' is a watch descriptor in decimal form, ie a target file +descriptor number, 'ino' and 'sdev' are inode and device where the +target file resides and the 'mask' is the mask of events, all in hex +form [see inotify(7) for more details]. - If the kernel was built with exportfs support, the path to the target - file is encoded as a file handle. The file handle is provided by three - fields 'fhandle-bytes', 'fhandle-type' and 'f_handle', all in hex - format. +If the kernel was built with exportfs support, the path to the target +file is encoded as a file handle. The file handle is provided by three +fields 'fhandle-bytes', 'fhandle-type' and 'f_handle', all in hex +format. - If the kernel is built without exportfs support the file handle won't be - printed out. +If the kernel is built without exportfs support the file handle won't be +printed out. - If there is no inotify mark attached yet the 'inotify' line will be omitted. +If there is no inotify mark attached yet the 'inotify' line will be omitted. - For fanotify files the format is +For fanotify files the format is:: pos: 0 flags: 02 @@ -1883,20 +1997,22 @@ pair provide additional information particular to the objects they represent. fanotify mnt_id:12 mflags:40 mask:38 ignored_mask:40000003 fanotify ino:4f969 sdev:800013 mflags:0 mask:3b ignored_mask:40000000 fhandle-bytes:8 fhandle-type:1 f_handle:69f90400c275b5b4 - where fanotify 'flags' and 'event-flags' are values used in fanotify_init - call, 'mnt_id' is the mount point identifier, 'mflags' is the value of - flags associated with mark which are tracked separately from events - mask. 'ino', 'sdev' are target inode and device, 'mask' is the events - mask and 'ignored_mask' is the mask of events which are to be ignored. - All in hex format. Incorporation of 'mflags', 'mask' and 'ignored_mask' - does provide information about flags and mask used in fanotify_mark - call [see fsnotify manpage for details]. +where fanotify 'flags' and 'event-flags' are values used in fanotify_init +call, 'mnt_id' is the mount point identifier, 'mflags' is the value of +flags associated with mark which are tracked separately from events +mask. 'ino', 'sdev' are target inode and device, 'mask' is the events +mask and 'ignored_mask' is the mask of events which are to be ignored. +All in hex format. Incorporation of 'mflags', 'mask' and 'ignored_mask' +does provide information about flags and mask used in fanotify_mark +call [see fsnotify manpage for details]. + +While the first three lines are mandatory and always printed, the rest is +optional and may be omitted if no marks created yet. - While the first three lines are mandatory and always printed, the rest is - optional and may be omitted if no marks created yet. +Timerfd files +~~~~~~~~~~~~~ - Timerfd files - ~~~~~~~~~~~~~ +:: pos: 0 flags: 02 @@ -1907,18 +2023,18 @@ pair provide additional information particular to the objects they represent. it_value: (0, 49406829) it_interval: (1, 0) - where 'clockid' is the clock type and 'ticks' is the number of the timer expirations - that have occurred [see timerfd_create(2) for details]. 'settime flags' are - flags in octal form been used to setup the timer [see timerfd_settime(2) for - details]. 'it_value' is remaining time until the timer exiration. - 'it_interval' is the interval for the timer. Note the timer might be set up - with TIMER_ABSTIME option which will be shown in 'settime flags', but 'it_value' - still exhibits timer's remaining time. +where 'clockid' is the clock type and 'ticks' is the number of the timer expirations +that have occurred [see timerfd_create(2) for details]. 'settime flags' are +flags in octal form been used to setup the timer [see timerfd_settime(2) for +details]. 'it_value' is remaining time until the timer exiration. +'it_interval' is the interval for the timer. Note the timer might be set up +with TIMER_ABSTIME option which will be shown in 'settime flags', but 'it_value' +still exhibits timer's remaining time. 3.9 /proc/<pid>/map_files - Information about memory mapped files --------------------------------------------------------------------- This directory contains symbolic links which represent memory mapped files -the process is maintaining. Example output: +the process is maintaining. Example output:: | lr-------- 1 root root 64 Jan 27 11:24 333c600000-333c620000 -> /usr/lib64/ld-2.18.so | lr-------- 1 root root 64 Jan 27 11:24 333c81f000-333c820000 -> /usr/lib64/ld-2.18.so @@ -1976,17 +2092,22 @@ When CONFIG_PROC_PID_ARCH_STATUS is enabled, this file displays the architecture specific status of the task. Example -------- +~~~~~~~ + +:: + $ cat /proc/6753/arch_status AVX512_elapsed_ms: 8 Description ------------ +~~~~~~~~~~~ x86 specific entries: ---------------------- - AVX512_elapsed_ms: - ------------------ +~~~~~~~~~~~~~~~~~~~~~ + +AVX512_elapsed_ms: +^^^^^^^^^^^^^^^^^^ + If AVX512 is supported on the machine, this entry shows the milliseconds elapsed since the last time AVX512 usage was recorded. The recording happens on a best effort basis when a task is scheduled out. This means @@ -2010,17 +2131,18 @@ x86 specific entries: the task is unlikely an AVX512 user, but depends on the workload and the scheduling scenario, it also could be a false negative mentioned above. ------------------------------------------------------------------------------- Configuring procfs ------------------------------------------------------------------------------- +------------------ 4.1 Mount options --------------------- The following mount options are supported: + ========= ======================================================== hidepid= Set /proc/<pid>/ access mode. gid= Set the group authorized to learn processes information. + ========= ======================================================== hidepid=0 means classic mode - everybody may access all /proc/<pid>/ directories (default). diff --git a/Documentation/filesystems/qnx6.txt b/Documentation/filesystems/qnx6.rst index 48ea68f15845..fd13433d362c 100644 --- a/Documentation/filesystems/qnx6.txt +++ b/Documentation/filesystems/qnx6.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================== The QNX6 Filesystem =================== @@ -14,10 +17,12 @@ Specification qnx6fs shares many properties with traditional Unix filesystems. It has the concepts of blocks, inodes and directories. + On QNX it is possible to create little endian and big endian qnx6 filesystems. This feature makes it possible to create and use a different endianness fs for the target (QNX is used on quite a range of embedded systems) platform running on a different endianness. + The Linux driver handles endianness transparently. (LE and BE) Blocks @@ -26,6 +31,7 @@ Blocks The space in the device or file is split up into blocks. These are a fixed size of 512, 1024, 2048 or 4096, which is decided when the filesystem is created. + Blockpointers are 32bit, so the maximum space that can be addressed is 2^32 * 4096 bytes or 16TB @@ -50,6 +56,7 @@ Each of these root nodes holds information like total size of the stored data and the addressing levels in that specific tree. If the level value is 0, up to 16 direct blocks can be addressed by each node. + Level 1 adds an additional indirect addressing level where each indirect addressing block holds up to blocksize / 4 bytes pointers to data blocks. Level 2 adds an additional indirect addressing block level (so, already up @@ -57,11 +64,13 @@ to 16 * 256 * 256 = 1048576 blocks that can be addressed by such a tree). Unused block pointers are always set to ~0 - regardless of root node, indirect addressing blocks or inodes. + Data leaves are always on the lowest level. So no data is stored on upper tree levels. The first Superblock is located at 0x2000. (0x2000 is the bootblock size) The Audi MMI 3G first superblock directly starts at byte 0. + Second superblock position can either be calculated from the superblock information (total number of filesystem blocks) or by taking the highest device address, zeroing the last 3 bytes and then subtracting 0x1000 from @@ -84,6 +93,7 @@ Object mode field is POSIX format. (which makes things easier) There are also pointers to the first 16 blocks, if the object data can be addressed with 16 direct blocks. + For more than 16 blocks an indirect addressing in form of another tree is used. (scheme is the same as the one used for the superblock root nodes) @@ -96,13 +106,18 @@ Directories A directory is a filesystem object and has an inode just like a file. It is a specially formatted file containing records which associate each name with an inode number. + '.' inode number points to the directory inode + '..' inode number points to the parent directory inode + Eeach filename record additionally got a filename length field. One special case are long filenames or subdirectory names. + These got set a filename length field of 0xff in the corresponding directory record plus the longfile inode number also stored in that record. + With that longfilename inode number, the longfilename tree can be walked starting with the superblock longfilename root node pointers. @@ -111,6 +126,7 @@ Special files Symbolic links are also filesystem objects with inodes. They got a specific bit in the inode mode field identifying them as symbolic link. + The directory entry file inode pointer points to the target file inode. Hard links got an inode, a directory entry, but a specific mode bit set, @@ -126,9 +142,11 @@ Long filenames Long filenames are stored in a separate addressing tree. The staring point is the longfilename root node in the active superblock. + Each data block (tree leaves) holds one long filename. That filename is limited to 510 bytes. The first two starting bytes are used as length field for the actual filename. + If that structure shall fit for all allowed blocksizes, it is clear why there is a limit of 510 bytes for the actual filename stored. @@ -138,6 +156,7 @@ Bitmap The qnx6fs filesystem allocation bitmap is stored in a tree under bitmap root node in the superblock and each bit in the bitmap represents one filesystem block. + The first block is block 0, which starts 0x1000 after superblock start. So for a normal qnx6fs 0x3000 (bootblock + superblock) is the physical address at which block 0 is located. @@ -149,11 +168,14 @@ Bitmap system area ------------------ The bitmap itself is divided into three parts. + First the system area, that is split into two halves. + Then userspace. The requirement for a static, fixed preallocated system area comes from how qnx6fs deals with writes. + Each superblock got it's own half of the system area. So superblock #1 always uses blocks from the lower half while superblock #2 just writes to blocks represented by the upper half bitmap system area bits. @@ -163,7 +185,7 @@ tree structures are treated as system blocks. The rational behind that is that a write request can work on a new snapshot (system area of the inactive - resp. lower serial numbered superblock) while -at the same time there is still a complete stable filesystem structer in the +at the same time there is still a complete stable filesystem structure in the other half of the system area. When finished with writing (a sync write is completed, the maximum sync leap diff --git a/Documentation/filesystems/ramfs-rootfs-initramfs.txt b/Documentation/filesystems/ramfs-rootfs-initramfs.rst index 97d42ccaa92d..6c576e241d86 100644 --- a/Documentation/filesystems/ramfs-rootfs-initramfs.txt +++ b/Documentation/filesystems/ramfs-rootfs-initramfs.rst @@ -1,5 +1,11 @@ -ramfs, rootfs and initramfs +.. SPDX-License-Identifier: GPL-2.0 + +=========================== +Ramfs, rootfs and initramfs +=========================== + October 17, 2005 + Rob Landley <rob@landley.net> ============================= @@ -99,14 +105,14 @@ out of that. All this differs from the old initrd in several ways: - The old initrd was always a separate file, while the initramfs archive is - linked into the linux kernel image. (The directory linux-*/usr is devoted - to generating this archive during the build.) + linked into the linux kernel image. (The directory ``linux-*/usr`` is + devoted to generating this archive during the build.) - The old initrd file was a gzipped filesystem image (in some file format, such as ext2, that needed a driver built into the kernel), while the new initramfs archive is a gzipped cpio archive (like tar only simpler, - see cpio(1) and Documentation/driver-api/early-userspace/buffer-format.rst). The - kernel's cpio extraction code is not only extremely small, it's also + see cpio(1) and Documentation/driver-api/early-userspace/buffer-format.rst). + The kernel's cpio extraction code is not only extremely small, it's also __init text and data that can be discarded during the boot process. - The program run by the old initrd (which was called /initrd, not /init) did @@ -139,7 +145,7 @@ and living in usr/Kconfig) can be used to specify a source for the initramfs archive, which will automatically be incorporated into the resulting binary. This option can point to an existing gzipped cpio archive, a directory containing files to be archived, or a text file -specification such as the following example: +specification such as the following example:: dir /dev 755 0 0 nod /dev/console 644 0 0 c 5 1 @@ -175,12 +181,12 @@ or extracting your own preprepared cpio files to feed to the kernel build (instead of a config file or directory). The following command line can extract a cpio image (either by the above script -or by the kernel build) back into its component files: +or by the kernel build) back into its component files:: cpio -i -d -H newc -F initramfs_data.cpio --no-absolute-filenames The following shell script can create a prebuilt cpio archive you can -use in place of the above config file: +use in place of the above config file:: #!/bin/sh @@ -202,14 +208,17 @@ use in place of the above config file: exit 1 fi -Note: The cpio man page contains some bad advice that will break your initramfs -archive if you follow it. It says "A typical way to generate the list -of filenames is with the find command; you should give find the -depth option -to minimize problems with permissions on directories that are unwritable or not -searchable." Don't do this when creating initramfs.cpio.gz images, it won't -work. The Linux kernel cpio extractor won't create files in a directory that -doesn't exist, so the directory entries must go before the files that go in -those directories. The above script gets them in the right order. +.. Note:: + + The cpio man page contains some bad advice that will break your initramfs + archive if you follow it. It says "A typical way to generate the list + of filenames is with the find command; you should give find the -depth + option to minimize problems with permissions on directories that are + unwritable or not searchable." Don't do this when creating + initramfs.cpio.gz images, it won't work. The Linux kernel cpio extractor + won't create files in a directory that doesn't exist, so the directory + entries must go before the files that go in those directories. + The above script gets them in the right order. External initramfs images: -------------------------- @@ -236,9 +245,10 @@ An initramfs archive is a complete self-contained root filesystem for Linux. If you don't already understand what shared libraries, devices, and paths you need to get a minimal root filesystem up and running, here are some references: -http://www.tldp.org/HOWTO/Bootdisk-HOWTO/ -http://www.tldp.org/HOWTO/From-PowerUp-To-Bash-Prompt-HOWTO.html -http://www.linuxfromscratch.org/lfs/view/stable/ + +- http://www.tldp.org/HOWTO/Bootdisk-HOWTO/ +- http://www.tldp.org/HOWTO/From-PowerUp-To-Bash-Prompt-HOWTO.html +- http://www.linuxfromscratch.org/lfs/view/stable/ The "klibc" package (http://www.kernel.org/pub/linux/libs/klibc) is designed to be a tiny C library to statically link early userspace @@ -255,7 +265,7 @@ name lookups, even when otherwise statically linked.) A good first step is to get initramfs to run a statically linked "hello world" program as init, and test it under an emulator like qemu (www.qemu.org) or -User Mode Linux, like so: +User Mode Linux, like so:: cat > hello.c << EOF #include <stdio.h> @@ -326,8 +336,8 @@ the above threads) is: explained his reasoning: - http://www.uwsg.iu.edu/hypermail/linux/kernel/0112.2/1550.html - http://www.uwsg.iu.edu/hypermail/linux/kernel/0112.2/1638.html + - http://www.uwsg.iu.edu/hypermail/linux/kernel/0112.2/1550.html + - http://www.uwsg.iu.edu/hypermail/linux/kernel/0112.2/1638.html and, most importantly, designed and implemented the initramfs code. diff --git a/Documentation/filesystems/relay.txt b/Documentation/filesystems/relay.rst index cd709a94d054..04ad083cfe62 100644 --- a/Documentation/filesystems/relay.txt +++ b/Documentation/filesystems/relay.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================== relay interface (formerly relayfs) ================================== @@ -108,6 +111,7 @@ The relay interface implements basic file operations for user space access to relay channel buffer data. Here are the file operations that are available and some comments regarding their behavior: +=========== ============================================================ open() enables user to open an _existing_ channel buffer. mmap() results in channel buffer being mapped into the caller's @@ -136,13 +140,16 @@ poll() POLLIN/POLLRDNORM/POLLERR supported. User applications are close() decrements the channel buffer's refcount. When the refcount reaches 0, i.e. when no process or kernel client has the buffer open, the channel buffer is freed. +=========== ============================================================ In order for a user application to make use of relay files, the -host filesystem must be mounted. For example, +host filesystem must be mounted. For example:: mount -t debugfs debugfs /sys/kernel/debug -NOTE: the host filesystem doesn't need to be mounted for kernel +.. Note:: + + the host filesystem doesn't need to be mounted for kernel clients to create or use channels - it only needs to be mounted when user space applications need access to the buffer data. @@ -154,7 +161,7 @@ The relay interface kernel API Here's a summary of the API the relay interface provides to in-kernel clients: TBD(curr. line MT:/API/) - channel management functions: + channel management functions:: relay_open(base_filename, parent, subbuf_size, n_subbufs, callbacks, private_data) @@ -162,17 +169,17 @@ TBD(curr. line MT:/API/) relay_flush(chan) relay_reset(chan) - channel management typically called on instigation of userspace: + channel management typically called on instigation of userspace:: relay_subbufs_consumed(chan, cpu, subbufs_consumed) - write functions: + write functions:: relay_write(chan, data, length) __relay_write(chan, data, length) relay_reserve(chan, length) - callbacks: + callbacks:: subbuf_start(buf, subbuf, prev_subbuf, prev_padding) buf_mapped(buf, filp) @@ -180,7 +187,7 @@ TBD(curr. line MT:/API/) create_buf_file(filename, parent, mode, buf, is_global) remove_buf_file(dentry) - helper functions: + helper functions:: relay_buf_full(buf) subbuf_start_reserve(buf, length) @@ -215,41 +222,41 @@ the file(s) created in create_buf_file() and is called during relay_close(). Here are some typical definitions for these callbacks, in this case -using debugfs: - -/* - * create_buf_file() callback. Creates relay file in debugfs. - */ -static struct dentry *create_buf_file_handler(const char *filename, - struct dentry *parent, - umode_t mode, - struct rchan_buf *buf, - int *is_global) -{ - return debugfs_create_file(filename, mode, parent, buf, - &relay_file_operations); -} - -/* - * remove_buf_file() callback. Removes relay file from debugfs. - */ -static int remove_buf_file_handler(struct dentry *dentry) -{ - debugfs_remove(dentry); - - return 0; -} - -/* - * relay interface callbacks - */ -static struct rchan_callbacks relay_callbacks = -{ - .create_buf_file = create_buf_file_handler, - .remove_buf_file = remove_buf_file_handler, -}; - -And an example relay_open() invocation using them: +using debugfs:: + + /* + * create_buf_file() callback. Creates relay file in debugfs. + */ + static struct dentry *create_buf_file_handler(const char *filename, + struct dentry *parent, + umode_t mode, + struct rchan_buf *buf, + int *is_global) + { + return debugfs_create_file(filename, mode, parent, buf, + &relay_file_operations); + } + + /* + * remove_buf_file() callback. Removes relay file from debugfs. + */ + static int remove_buf_file_handler(struct dentry *dentry) + { + debugfs_remove(dentry); + + return 0; + } + + /* + * relay interface callbacks + */ + static struct rchan_callbacks relay_callbacks = + { + .create_buf_file = create_buf_file_handler, + .remove_buf_file = remove_buf_file_handler, + }; + +And an example relay_open() invocation using them:: chan = relay_open("cpu", NULL, SUBBUF_SIZE, N_SUBBUFS, &relay_callbacks, NULL); @@ -339,23 +346,23 @@ whether or not to actually move on to the next sub-buffer. To implement 'no-overwrite' mode, the userspace client would provide an implementation of the subbuf_start() callback something like the -following: +following:: -static int subbuf_start(struct rchan_buf *buf, - void *subbuf, - void *prev_subbuf, - unsigned int prev_padding) -{ - if (prev_subbuf) - *((unsigned *)prev_subbuf) = prev_padding; + static int subbuf_start(struct rchan_buf *buf, + void *subbuf, + void *prev_subbuf, + unsigned int prev_padding) + { + if (prev_subbuf) + *((unsigned *)prev_subbuf) = prev_padding; - if (relay_buf_full(buf)) - return 0; + if (relay_buf_full(buf)) + return 0; - subbuf_start_reserve(buf, sizeof(unsigned int)); + subbuf_start_reserve(buf, sizeof(unsigned int)); - return 1; -} + return 1; + } If the current buffer is full, i.e. all sub-buffers remain unconsumed, the callback returns 0 to indicate that the buffer switch should not @@ -370,20 +377,20 @@ ready sub-buffers will relay_buf_full() return 0, in which case the buffer switch can continue. The implementation of the subbuf_start() callback for 'overwrite' mode -would be very similar: +would be very similar:: -static int subbuf_start(struct rchan_buf *buf, - void *subbuf, - void *prev_subbuf, - size_t prev_padding) -{ - if (prev_subbuf) - *((unsigned *)prev_subbuf) = prev_padding; + static int subbuf_start(struct rchan_buf *buf, + void *subbuf, + void *prev_subbuf, + size_t prev_padding) + { + if (prev_subbuf) + *((unsigned *)prev_subbuf) = prev_padding; - subbuf_start_reserve(buf, sizeof(unsigned int)); + subbuf_start_reserve(buf, sizeof(unsigned int)); - return 1; -} + return 1; + } In this case, the relay_buf_full() check is meaningless and the callback always returns 1, causing the buffer switch to occur diff --git a/Documentation/filesystems/romfs.txt b/Documentation/filesystems/romfs.rst index e2b07cc9120a..465b11efa9be 100644 --- a/Documentation/filesystems/romfs.txt +++ b/Documentation/filesystems/romfs.rst @@ -1,4 +1,8 @@ -ROMFS - ROM FILE SYSTEM +.. SPDX-License-Identifier: GPL-2.0 + +======================= +ROMFS - ROM File System +======================= This is a quite dumb, read only filesystem, mainly for initial RAM disks of installation disks. It has grown up by the need of having @@ -51,9 +55,9 @@ the 16 byte padding for the name and the contents, also 16+14+15 = 45 bytes. This is quite rare however, since most file names are longer than 3 bytes, and shorter than 15 bytes. -The layout of the filesystem is the following: +The layout of the filesystem is the following:: -offset content + offset content +---+---+---+---+ 0 | - | r | o | m | \ @@ -84,9 +88,9 @@ the source. This algorithm was chosen because although it's not quite reliable, it does not require any tables, and it is very simple. The following bytes are now part of the file system; each file header -must begin on a 16 byte boundary. +must begin on a 16 byte boundary:: -offset content + offset content +---+---+---+---+ 0 | next filehdr|X| The offset of the next file header @@ -114,7 +118,9 @@ file is user and group 0, this should never be a problem for the intended use. The mapping of the 8 possible values to file types is the following: +== =============== ============================================ mapping spec.info means +== =============== ============================================ 0 hard link link destination [file header] 1 directory first file's header 2 regular file unused, must be zero [MBZ] @@ -123,6 +129,7 @@ the following: 5 char device - " - 6 socket unused, MBZ 7 fifo unused, MBZ +== =============== ============================================ Note that hard links are specifically marked in this filesystem, but they will behave as you can expect (i.e. share the inode number). @@ -158,24 +165,24 @@ to romfs-subscribe@shadow.banki.hu, the content is irrelevant. Pending issues: - Permissions and owner information are pretty essential features of a -Un*x like system, but romfs does not provide the full possibilities. -I have never found this limiting, but others might. + Un*x like system, but romfs does not provide the full possibilities. + I have never found this limiting, but others might. - The file system is read only, so it can be very small, but in case -one would want to write _anything_ to a file system, he still needs -a writable file system, thus negating the size advantages. Possible -solutions: implement write access as a compile-time option, or a new, -similarly small writable filesystem for RAM disks. + one would want to write _anything_ to a file system, he still needs + a writable file system, thus negating the size advantages. Possible + solutions: implement write access as a compile-time option, or a new, + similarly small writable filesystem for RAM disks. - Since the files are only required to have alignment on a 16 byte -boundary, it is currently possibly suboptimal to read or execute files -from the filesystem. It might be resolved by reordering file data to -have most of it (i.e. except the start and the end) laying at "natural" -boundaries, thus it would be possible to directly map a big portion of -the file contents to the mm subsystem. + boundary, it is currently possibly suboptimal to read or execute files + from the filesystem. It might be resolved by reordering file data to + have most of it (i.e. except the start and the end) laying at "natural" + boundaries, thus it would be possible to directly map a big portion of + the file contents to the mm subsystem. - Compression might be an useful feature, but memory is quite a -limiting factor in my eyes. + limiting factor in my eyes. - Where it is used? @@ -183,4 +190,5 @@ limiting factor in my eyes. Have fun, + Janos Farkas <chexum@shadow.banki.hu> diff --git a/Documentation/filesystems/squashfs.txt b/Documentation/filesystems/squashfs.rst index e5274f84dc56..df42106bae71 100644 --- a/Documentation/filesystems/squashfs.txt +++ b/Documentation/filesystems/squashfs.rst @@ -1,7 +1,11 @@ -SQUASHFS 4.0 FILESYSTEM +.. SPDX-License-Identifier: GPL-2.0 + +======================= +Squashfs 4.0 Filesystem ======================= Squashfs is a compressed read-only filesystem for Linux. + It uses zlib, lz4, lzo, or xz compression to compress files, inodes and directories. Inodes in the system are very small and all blocks are packed to minimise data overhead. Block sizes greater than 4K are supported up to a @@ -15,31 +19,33 @@ needed. Mailing list: squashfs-devel@lists.sourceforge.net Web site: www.squashfs.org -1. FILESYSTEM FEATURES +1. Filesystem Features ---------------------- Squashfs filesystem features versus Cramfs: +============================== ========= ========== Squashfs Cramfs - -Max filesystem size: 2^64 256 MiB -Max file size: ~ 2 TiB 16 MiB -Max files: unlimited unlimited -Max directories: unlimited unlimited -Max entries per directory: unlimited unlimited -Max block size: 1 MiB 4 KiB -Metadata compression: yes no -Directory indexes: yes no -Sparse file support: yes no -Tail-end packing (fragments): yes no -Exportable (NFS etc.): yes no -Hard link support: yes no -"." and ".." in readdir: yes no -Real inode numbers: yes no -32-bit uids/gids: yes no -File creation time: yes no -Xattr support: yes no -ACL support: no no +============================== ========= ========== +Max filesystem size 2^64 256 MiB +Max file size ~ 2 TiB 16 MiB +Max files unlimited unlimited +Max directories unlimited unlimited +Max entries per directory unlimited unlimited +Max block size 1 MiB 4 KiB +Metadata compression yes no +Directory indexes yes no +Sparse file support yes no +Tail-end packing (fragments) yes no +Exportable (NFS etc.) yes no +Hard link support yes no +"." and ".." in readdir yes no +Real inode numbers yes no +32-bit uids/gids yes no +File creation time yes no +Xattr support yes no +ACL support no no +============================== ========= ========== Squashfs compresses data, inodes and directories. In addition, inode and directory data are highly compacted, and packed on byte boundaries. Each @@ -47,7 +53,7 @@ compressed inode is on average 8 bytes in length (the exact length varies on file type, i.e. regular file, directory, symbolic link, and block/char device inodes have different sizes). -2. USING SQUASHFS +2. Using Squashfs ----------------- As squashfs is a read-only filesystem, the mksquashfs program must be used to @@ -58,11 +64,11 @@ obtained from this site also. The squashfs-tools development tree is now located on kernel.org git://git.kernel.org/pub/scm/fs/squashfs/squashfs-tools.git -3. SQUASHFS FILESYSTEM DESIGN +3. Squashfs Filesystem Design ----------------------------- A squashfs filesystem consists of a maximum of nine parts, packed together on a -byte alignment: +byte alignment:: --------------- | superblock | @@ -229,15 +235,15 @@ location of the xattr list inside each inode, a 32-bit xattr id is stored. This xattr id is mapped into the location of the xattr list using a second xattr id lookup table. -4. TODOS AND OUTSTANDING ISSUES +4. TODOs and Outstanding Issues ------------------------------- -4.1 Todo list +4.1 TODO list ------------- Implement ACL support. -4.2 Squashfs internal cache +4.2 Squashfs Internal Cache --------------------------- Blocks in Squashfs are compressed. To avoid repeatedly decompressing diff --git a/Documentation/filesystems/sysfs.txt b/Documentation/filesystems/sysfs.rst index ddf15b1b0d5a..290891c3fecb 100644 --- a/Documentation/filesystems/sysfs.txt +++ b/Documentation/filesystems/sysfs.rst @@ -1,32 +1,36 @@ +.. SPDX-License-Identifier: GPL-2.0 -sysfs - _The_ filesystem for exporting kernel objects. +===================================================== +sysfs - _The_ filesystem for exporting kernel objects +===================================================== Patrick Mochel <mochel@osdl.org> + Mike Murphy <mamurph@cs.clemson.edu> -Revised: 16 August 2011 -Original: 10 January 2003 +:Revised: 16 August 2011 +:Original: 10 January 2003 What it is: ~~~~~~~~~~~ sysfs is a ram-based filesystem initially based on ramfs. It provides -a means to export kernel data structures, their attributes, and the -linkages between them to userspace. +a means to export kernel data structures, their attributes, and the +linkages between them to userspace. sysfs is tied inherently to the kobject infrastructure. Please read Documentation/kobject.txt for more information concerning the kobject -interface. +interface. Using sysfs ~~~~~~~~~~~ sysfs is always compiled in if CONFIG_SYSFS is defined. You can access -it by doing: +it by doing:: - mount -t sysfs sysfs /sys + mount -t sysfs sysfs /sys Directory Creation @@ -37,7 +41,7 @@ created for it in sysfs. That directory is created as a subdirectory of the kobject's parent, expressing internal object hierarchies to userspace. Top-level directories in sysfs represent the common ancestors of object hierarchies; i.e. the subsystems the objects -belong to. +belong to. Sysfs internally stores a pointer to the kobject that implements a directory in the kernfs_node object associated with the directory. In @@ -58,63 +62,63 @@ attributes. Attributes should be ASCII text files, preferably with only one value per file. It is noted that it may not be efficient to contain only one value per file, so it is socially acceptable to express an array of -values of the same type. +values of the same type. Mixing types, expressing multiple lines of data, and doing fancy formatting of data is heavily frowned upon. Doing these things may get -you publicly humiliated and your code rewritten without notice. +you publicly humiliated and your code rewritten without notice. -An attribute definition is simply: +An attribute definition is simply:: -struct attribute { - char * name; - struct module *owner; - umode_t mode; -}; + struct attribute { + char * name; + struct module *owner; + umode_t mode; + }; -int sysfs_create_file(struct kobject * kobj, const struct attribute * attr); -void sysfs_remove_file(struct kobject * kobj, const struct attribute * attr); + int sysfs_create_file(struct kobject * kobj, const struct attribute * attr); + void sysfs_remove_file(struct kobject * kobj, const struct attribute * attr); A bare attribute contains no means to read or write the value of the attribute. Subsystems are encouraged to define their own attribute structure and wrapper functions for adding and removing attributes for -a specific object type. +a specific object type. -For example, the driver model defines struct device_attribute like: +For example, the driver model defines struct device_attribute like:: -struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); -}; + struct device_attribute { + struct attribute attr; + ssize_t (*show)(struct device *dev, struct device_attribute *attr, + char *buf); + ssize_t (*store)(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count); + }; -int device_create_file(struct device *, const struct device_attribute *); -void device_remove_file(struct device *, const struct device_attribute *); + int device_create_file(struct device *, const struct device_attribute *); + void device_remove_file(struct device *, const struct device_attribute *); -It also defines this helper for defining device attributes: +It also defines this helper for defining device attributes:: -#define DEVICE_ATTR(_name, _mode, _show, _store) \ -struct device_attribute dev_attr_##_name = __ATTR(_name, _mode, _show, _store) + #define DEVICE_ATTR(_name, _mode, _show, _store) \ + struct device_attribute dev_attr_##_name = __ATTR(_name, _mode, _show, _store) -For example, declaring +For example, declaring:: -static DEVICE_ATTR(foo, S_IWUSR | S_IRUGO, show_foo, store_foo); + static DEVICE_ATTR(foo, S_IWUSR | S_IRUGO, show_foo, store_foo); -is equivalent to doing: +is equivalent to doing:: -static struct device_attribute dev_attr_foo = { - .attr = { - .name = "foo", - .mode = S_IWUSR | S_IRUGO, - }, - .show = show_foo, - .store = store_foo, -}; + static struct device_attribute dev_attr_foo = { + .attr = { + .name = "foo", + .mode = S_IWUSR | S_IRUGO, + }, + .show = show_foo, + .store = store_foo, + }; Note as stated in include/linux/kernel.h "OTHER_WRITABLE? Generally considered a bad idea." so trying to set a sysfs file writable for @@ -127,15 +131,21 @@ readable. The above case could be shortened to: static struct device_attribute dev_attr_foo = __ATTR_RW(foo); the list of helpers available to define your wrapper function is: -__ATTR_RO(name): assumes default name_show and mode 0444 -__ATTR_WO(name): assumes a name_store only and is restricted to mode + +__ATTR_RO(name): + assumes default name_show and mode 0444 +__ATTR_WO(name): + assumes a name_store only and is restricted to mode 0200 that is root write access only. -__ATTR_RO_MODE(name, mode): fore more restrictive RO access currently +__ATTR_RO_MODE(name, mode): + fore more restrictive RO access currently only use case is the EFI System Resource Table (see drivers/firmware/efi/esrt.c) -__ATTR_RW(name): assumes default name_show, name_store and setting +__ATTR_RW(name): + assumes default name_show, name_store and setting mode to 0644. -__ATTR_NULL: which sets the name to NULL and is used as end of list +__ATTR_NULL: + which sets the name to NULL and is used as end of list indicator (see: kernel/workqueue.c) Subsystem-Specific Callbacks @@ -143,12 +153,12 @@ Subsystem-Specific Callbacks When a subsystem defines a new attribute type, it must implement a set of sysfs operations for forwarding read and write calls to the -show and store methods of the attribute owners. +show and store methods of the attribute owners:: -struct sysfs_ops { - ssize_t (*show)(struct kobject *, struct attribute *, char *); - ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t); -}; + struct sysfs_ops { + ssize_t (*show)(struct kobject *, struct attribute *, char *); + ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t); + }; [ Subsystems should have already defined a struct kobj_type as a descriptor for this type, which is where the sysfs_ops pointer is @@ -157,29 +167,29 @@ stored. See the kobject documentation for more information. ] When a file is read or written, sysfs calls the appropriate method for the type. The method then translates the generic struct kobject and struct attribute pointers to the appropriate pointer types, and -calls the associated methods. +calls the associated methods. -To illustrate: +To illustrate:: -#define to_dev(obj) container_of(obj, struct device, kobj) -#define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr) + #define to_dev(obj) container_of(obj, struct device, kobj) + #define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr) -static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr, - char *buf) -{ - struct device_attribute *dev_attr = to_dev_attr(attr); - struct device *dev = to_dev(kobj); - ssize_t ret = -EIO; + static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr, + char *buf) + { + struct device_attribute *dev_attr = to_dev_attr(attr); + struct device *dev = to_dev(kobj); + ssize_t ret = -EIO; - if (dev_attr->show) - ret = dev_attr->show(dev, dev_attr, buf); - if (ret >= (ssize_t)PAGE_SIZE) { - printk("dev_attr_show: %pS returned bad count\n", - dev_attr->show); - } - return ret; -} + if (dev_attr->show) + ret = dev_attr->show(dev, dev_attr, buf); + if (ret >= (ssize_t)PAGE_SIZE) { + printk("dev_attr_show: %pS returned bad count\n", + dev_attr->show); + } + return ret; + } @@ -188,11 +198,11 @@ Reading/Writing Attribute Data To read or write attributes, show() or store() methods must be specified when declaring the attribute. The method types should be as -simple as those defined for device attributes: +simple as those defined for device attributes:: -ssize_t (*show)(struct device *dev, struct device_attribute *attr, char *buf); -ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); + ssize_t (*show)(struct device *dev, struct device_attribute *attr, char *buf); + ssize_t (*store)(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count); IOW, they should take only an object, an attribute, and a buffer as parameters. @@ -200,11 +210,11 @@ IOW, they should take only an object, an attribute, and a buffer as parameters. sysfs allocates a buffer of size (PAGE_SIZE) and passes it to the method. Sysfs will call the method exactly once for each read or write. This forces the following behavior on the method -implementations: +implementations: -- On read(2), the show() method should fill the entire buffer. +- On read(2), the show() method should fill the entire buffer. Recall that an attribute should only be exporting one value, or an - array of similar values, so this shouldn't be that expensive. + array of similar values, so this shouldn't be that expensive. This allows userspace to do partial reads and forward seeks arbitrarily over the entire file at will. If userspace seeks back to @@ -218,10 +228,10 @@ implementations: When writing sysfs files, userspace processes should first read the entire file, modify the values it wishes to change, then write the - entire buffer back. + entire buffer back. Attribute method implementations should operate on an identical - buffer when reading and writing values. + buffer when reading and writing values. Other notes: @@ -229,7 +239,7 @@ Other notes: file position. - The buffer will always be PAGE_SIZE bytes in length. On i386, this - is 4096. + is 4096. - show() methods should return the number of bytes printed into the buffer. This is the return value of scnprintf(). @@ -246,31 +256,31 @@ Other notes: through, be sure to return an error. - The object passed to the methods will be pinned in memory via sysfs - referencing counting its embedded object. However, the physical - entity (e.g. device) the object represents may not be present. Be - sure to have a way to check this, if necessary. + referencing counting its embedded object. However, the physical + entity (e.g. device) the object represents may not be present. Be + sure to have a way to check this, if necessary. -A very simple (and naive) implementation of a device attribute is: +A very simple (and naive) implementation of a device attribute is:: -static ssize_t show_name(struct device *dev, struct device_attribute *attr, - char *buf) -{ - return scnprintf(buf, PAGE_SIZE, "%s\n", dev->name); -} + static ssize_t show_name(struct device *dev, struct device_attribute *attr, + char *buf) + { + return scnprintf(buf, PAGE_SIZE, "%s\n", dev->name); + } -static ssize_t store_name(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - snprintf(dev->name, sizeof(dev->name), "%.*s", - (int)min(count, sizeof(dev->name) - 1), buf); - return count; -} + static ssize_t store_name(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) + { + snprintf(dev->name, sizeof(dev->name), "%.*s", + (int)min(count, sizeof(dev->name) - 1), buf); + return count; + } -static DEVICE_ATTR(name, S_IRUGO, show_name, store_name); + static DEVICE_ATTR(name, S_IRUGO, show_name, store_name); -(Note that the real implementation doesn't allow userspace to set the +(Note that the real implementation doesn't allow userspace to set the name for a device.) @@ -278,25 +288,25 @@ Top Level Directory Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~ The sysfs directory arrangement exposes the relationship of kernel -data structures. +data structures. -The top level sysfs directory looks like: +The top level sysfs directory looks like:: -block/ -bus/ -class/ -dev/ -devices/ -firmware/ -net/ -fs/ + block/ + bus/ + class/ + dev/ + devices/ + firmware/ + net/ + fs/ devices/ contains a filesystem representation of the device tree. It maps directly to the internal kernel device tree, which is a hierarchy of -struct device. +struct device. bus/ contains flat directory layout of the various bus types in the -kernel. Each bus's directory contains two subdirectories: +kernel. Each bus's directory contains two subdirectories:: devices/ drivers/ @@ -331,71 +341,71 @@ Current Interfaces The following interface layers currently exist in sysfs: -- devices (include/linux/device.h) ----------------------------------- -Structure: +devices (include/linux/device.h) +-------------------------------- +Structure:: -struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); -}; + struct device_attribute { + struct attribute attr; + ssize_t (*show)(struct device *dev, struct device_attribute *attr, + char *buf); + ssize_t (*store)(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count); + }; -Declaring: +Declaring:: -DEVICE_ATTR(_name, _mode, _show, _store); + DEVICE_ATTR(_name, _mode, _show, _store); -Creation/Removal: +Creation/Removal:: -int device_create_file(struct device *dev, const struct device_attribute * attr); -void device_remove_file(struct device *dev, const struct device_attribute * attr); + int device_create_file(struct device *dev, const struct device_attribute * attr); + void device_remove_file(struct device *dev, const struct device_attribute * attr); -- bus drivers (include/linux/device.h) --------------------------------------- -Structure: +bus drivers (include/linux/device.h) +------------------------------------ +Structure:: -struct bus_attribute { - struct attribute attr; - ssize_t (*show)(struct bus_type *, char * buf); - ssize_t (*store)(struct bus_type *, const char * buf, size_t count); -}; + struct bus_attribute { + struct attribute attr; + ssize_t (*show)(struct bus_type *, char * buf); + ssize_t (*store)(struct bus_type *, const char * buf, size_t count); + }; -Declaring: +Declaring:: -static BUS_ATTR_RW(name); -static BUS_ATTR_RO(name); -static BUS_ATTR_WO(name); + static BUS_ATTR_RW(name); + static BUS_ATTR_RO(name); + static BUS_ATTR_WO(name); -Creation/Removal: +Creation/Removal:: -int bus_create_file(struct bus_type *, struct bus_attribute *); -void bus_remove_file(struct bus_type *, struct bus_attribute *); + int bus_create_file(struct bus_type *, struct bus_attribute *); + void bus_remove_file(struct bus_type *, struct bus_attribute *); -- device drivers (include/linux/device.h) ------------------------------------------ +device drivers (include/linux/device.h) +--------------------------------------- -Structure: +Structure:: -struct driver_attribute { - struct attribute attr; - ssize_t (*show)(struct device_driver *, char * buf); - ssize_t (*store)(struct device_driver *, const char * buf, - size_t count); -}; + struct driver_attribute { + struct attribute attr; + ssize_t (*show)(struct device_driver *, char * buf); + ssize_t (*store)(struct device_driver *, const char * buf, + size_t count); + }; -Declaring: +Declaring:: -DRIVER_ATTR_RO(_name) -DRIVER_ATTR_RW(_name) + DRIVER_ATTR_RO(_name) + DRIVER_ATTR_RW(_name) -Creation/Removal: +Creation/Removal:: -int driver_create_file(struct device_driver *, const struct driver_attribute *); -void driver_remove_file(struct device_driver *, const struct driver_attribute *); + int driver_create_file(struct device_driver *, const struct driver_attribute *); + void driver_remove_file(struct device_driver *, const struct driver_attribute *); Documentation diff --git a/Documentation/filesystems/sysv-fs.txt b/Documentation/filesystems/sysv-fs.rst index 253b50d1328e..89e40911ad7c 100644 --- a/Documentation/filesystems/sysv-fs.txt +++ b/Documentation/filesystems/sysv-fs.rst @@ -1,25 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== +SystemV Filesystem +================== + It implements all of - Xenix FS, - SystemV/386 FS, - Coherent FS. To install: + * Answer the 'System V and Coherent filesystem support' question with 'y' when configuring the kernel. -* To mount a disk or a partition, use +* To mount a disk or a partition, use:: + mount [-r] -t sysv device mountpoint - The file system type names + + The file system type names:: + -t sysv -t xenix -t coherent + may be used interchangeably, but the last two will eventually disappear. Bugs in the present implementation: + - Coherent FS: + - The "free list interleave" n:m is currently ignored. - Only file systems with no filesystem name and no pack name are recognized. - (See Coherent "man mkfs" for a description of these features.) + (See Coherent "man mkfs" for a description of these features.) + - SystemV Release 2 FS: + The superblock is only searched in the blocks 9, 15, 18, which corresponds to the beginning of track 1 on floppy disks. No support for this FS on hard disk yet. @@ -28,12 +43,14 @@ Bugs in the present implementation: These filesystems are rather similar. Here is a comparison with Minix FS: * Linux fdisk reports on partitions + - Minix FS 0x81 Linux/Minix - Xenix FS ?? - SystemV FS ?? - Coherent FS 0x08 AIX bootable * Size of a block or zone (data allocation unit on disk) + - Minix FS 1024 - Xenix FS 1024 (also 512 ??) - SystemV FS 1024 (also 512 and 2048) @@ -45,37 +62,51 @@ These filesystems are rather similar. Here is a comparison with Minix FS: all the block numbers (including the super block) are offset by one track. * Byte ordering of "short" (16 bit entities) on disk: + - Minix FS little endian 0 1 - Xenix FS little endian 0 1 - SystemV FS little endian 0 1 - Coherent FS little endian 0 1 + Of course, this affects only the file system, not the data of files on it! * Byte ordering of "long" (32 bit entities) on disk: + - Minix FS little endian 0 1 2 3 - Xenix FS little endian 0 1 2 3 - SystemV FS little endian 0 1 2 3 - Coherent FS PDP-11 2 3 0 1 + Of course, this affects only the file system, not the data of files on it! * Inode on disk: "short", 0 means non-existent, the root dir ino is: - - Minix FS 1 - - Xenix FS, SystemV FS, Coherent FS 2 + + ================================= == + Minix FS 1 + Xenix FS, SystemV FS, Coherent FS 2 + ================================= == * Maximum number of hard links to a file: - - Minix FS 250 - - Xenix FS ?? - - SystemV FS ?? - - Coherent FS >=10000 + + =========== ========= + Minix FS 250 + Xenix FS ?? + SystemV FS ?? + Coherent FS >=10000 + =========== ========= * Free inode management: - - Minix FS a bitmap + + - Minix FS + a bitmap - Xenix FS, SystemV FS, Coherent FS There is a cache of a certain number of free inodes in the super-block. When it is exhausted, new free inodes are found using a linear search. * Free block management: - - Minix FS a bitmap + + - Minix FS + a bitmap - Xenix FS, SystemV FS, Coherent FS Free blocks are organized in a "free list". Maybe a misleading term, since it is not true that every free block contains a pointer to @@ -86,13 +117,18 @@ These filesystems are rather similar. Here is a comparison with Minix FS: 0 on Xenix FS and SystemV FS, with a block zeroed out on Coherent FS. * Super-block location: - - Minix FS block 1 = bytes 1024..2047 - - Xenix FS block 1 = bytes 1024..2047 - - SystemV FS bytes 512..1023 - - Coherent FS block 1 = bytes 512..1023 + + =========== ========================== + Minix FS block 1 = bytes 1024..2047 + Xenix FS block 1 = bytes 1024..2047 + SystemV FS bytes 512..1023 + Coherent FS block 1 = bytes 512..1023 + =========== ========================== * Super-block layout: - - Minix FS + + - Minix FS:: + unsigned short s_ninodes; unsigned short s_nzones; unsigned short s_imap_blocks; @@ -101,7 +137,9 @@ These filesystems are rather similar. Here is a comparison with Minix FS: unsigned short s_log_zone_size; unsigned long s_max_size; unsigned short s_magic; - - Xenix FS, SystemV FS, Coherent FS + + - Xenix FS, SystemV FS, Coherent FS:: + unsigned short s_firstdatazone; unsigned long s_nzones; unsigned short s_fzone_count; @@ -120,23 +158,33 @@ These filesystems are rather similar. Here is a comparison with Minix FS: unsigned short s_interleave_m,s_interleave_n; -- Coherent FS only char s_fname[6]; char s_fpack[6]; + then they differ considerably: - Xenix FS + + Xenix FS:: + char s_clean; char s_fill[371]; long s_magic; long s_type; - SystemV FS + + SystemV FS:: + long s_fill[12 or 14]; long s_state; long s_magic; long s_type; - Coherent FS + + Coherent FS:: + unsigned long s_unique; + Note that Coherent FS has no magic. * Inode layout: - - Minix FS + + - Minix FS:: + unsigned short i_mode; unsigned short i_uid; unsigned long i_size; @@ -144,7 +192,9 @@ These filesystems are rather similar. Here is a comparison with Minix FS: unsigned char i_gid; unsigned char i_nlinks; unsigned short i_zone[7+1+1]; - - Xenix FS, SystemV FS, Coherent FS + + - Xenix FS, SystemV FS, Coherent FS:: + unsigned short i_mode; unsigned short i_nlink; unsigned short i_uid; @@ -155,38 +205,55 @@ These filesystems are rather similar. Here is a comparison with Minix FS: unsigned long i_mtime; unsigned long i_ctime; + * Regular file data blocks are organized as - - Minix FS - 7 direct blocks - 1 indirect block (pointers to blocks) - 1 double-indirect block (pointer to pointers to blocks) - - Xenix FS, SystemV FS, Coherent FS - 10 direct blocks - 1 indirect block (pointers to blocks) - 1 double-indirect block (pointer to pointers to blocks) - 1 triple-indirect block (pointer to pointers to pointers to blocks) -* Inode size, inodes per block - - Minix FS 32 32 - - Xenix FS 64 16 - - SystemV FS 64 16 - - Coherent FS 64 8 + - Minix FS: + + - 7 direct blocks + - 1 indirect block (pointers to blocks) + - 1 double-indirect block (pointer to pointers to blocks) + + - Xenix FS, SystemV FS, Coherent FS: + + - 10 direct blocks + - 1 indirect block (pointers to blocks) + - 1 double-indirect block (pointer to pointers to blocks) + - 1 triple-indirect block (pointer to pointers to pointers to blocks) + + + =========== ========== ================ + Inode size inodes per block + =========== ========== ================ + Minix FS 32 32 + Xenix FS 64 16 + SystemV FS 64 16 + Coherent FS 64 8 + =========== ========== ================ * Directory entry on disk - - Minix FS + + - Minix FS:: + unsigned short inode; char name[14/30]; - - Xenix FS, SystemV FS, Coherent FS + + - Xenix FS, SystemV FS, Coherent FS:: + unsigned short inode; char name[14]; -* Dir entry size, dir entries per block - - Minix FS 16/32 64/32 - - Xenix FS 16 64 - - SystemV FS 16 64 - - Coherent FS 16 32 + =========== ============== ===================== + Dir entry size dir entries per block + =========== ============== ===================== + Minix FS 16/32 64/32 + Xenix FS 16 64 + SystemV FS 16 64 + Coherent FS 16 32 + =========== ============== ===================== * How to implement symbolic links such that the host fsck doesn't scream: + - Minix FS normal - Xenix FS kludge: as regular files with chmod 1000 - SystemV FS ?? diff --git a/Documentation/filesystems/tmpfs.txt b/Documentation/filesystems/tmpfs.rst index 5ecbc03e6b2f..4e95929301a5 100644 --- a/Documentation/filesystems/tmpfs.txt +++ b/Documentation/filesystems/tmpfs.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===== +Tmpfs +===== + Tmpfs is a file system which keeps all files in virtual memory. @@ -14,7 +20,7 @@ If you compare it to ramfs (which was the template to create tmpfs) you gain swapping and limit checking. Another similar thing is the RAM disk (/dev/ram*), which simulates a fixed size hard disk in physical RAM, where you have to create an ordinary filesystem on top. Ramdisks -cannot swap and you do not have the possibility to resize them. +cannot swap and you do not have the possibility to resize them. Since tmpfs lives completely in the page cache and on swap, all tmpfs pages will be shown as "Shmem" in /proc/meminfo and "Shared" in @@ -26,7 +32,7 @@ tmpfs has the following uses: 1) There is always a kernel internal mount which you will not see at all. This is used for shared anonymous mappings and SYSV shared - memory. + memory. This mount does not depend on CONFIG_TMPFS. If CONFIG_TMPFS is not set, the user visible part of tmpfs is not build. But the internal @@ -34,7 +40,7 @@ tmpfs has the following uses: 2) glibc 2.2 and above expects tmpfs to be mounted at /dev/shm for POSIX shared memory (shm_open, shm_unlink). Adding the following - line to /etc/fstab should take care of this: + line to /etc/fstab should take care of this:: tmpfs /dev/shm tmpfs defaults 0 0 @@ -56,15 +62,17 @@ tmpfs has the following uses: tmpfs has three mount options for sizing: -size: The limit of allocated bytes for this tmpfs instance. The +========= ============================================================ +size The limit of allocated bytes for this tmpfs instance. The default is half of your physical RAM without swap. If you oversize your tmpfs instances the machine will deadlock since the OOM handler will not be able to free that memory. -nr_blocks: The same as size, but in blocks of PAGE_SIZE. -nr_inodes: The maximum number of inodes for this instance. The default +nr_blocks The same as size, but in blocks of PAGE_SIZE. +nr_inodes The maximum number of inodes for this instance. The default is half of the number of your physical RAM pages, or (on a machine with highmem) the number of lowmem RAM pages, whichever is the lower. +========= ============================================================ These parameters accept a suffix k, m or g for kilo, mega and giga and can be changed on remount. The size parameter also accepts a suffix % @@ -82,6 +90,7 @@ tmpfs has a mount option to set the NUMA memory allocation policy for all files in that instance (if CONFIG_NUMA is enabled) - which can be adjusted on the fly via 'mount -o remount ...' +======================== ============================================== mpol=default use the process allocation policy (see set_mempolicy(2)) mpol=prefer:Node prefers to allocate memory from the given Node @@ -89,6 +98,7 @@ mpol=bind:NodeList allocates memory only from nodes in NodeList mpol=interleave prefers to allocate from each node in turn mpol=interleave:NodeList allocates from each node of NodeList in turn mpol=local prefers to allocate memory from the local node +======================== ============================================== NodeList format is a comma-separated list of decimal numbers and ranges, a range being two hyphen-separated decimal numbers, the smallest and @@ -98,9 +108,9 @@ A memory policy with a valid NodeList will be saved, as specified, for use at file creation time. When a task allocates a file in the file system, the mount option memory policy will be applied with a NodeList, if any, modified by the calling task's cpuset constraints -[See Documentation/admin-guide/cgroup-v1/cpusets.rst] and any optional flags, listed -below. If the resulting NodeLists is the empty set, the effective memory -policy for the file will revert to "default" policy. +[See Documentation/admin-guide/cgroup-v1/cpusets.rst] and any optional flags, +listed below. If the resulting NodeLists is the empty set, the effective +memory policy for the file will revert to "default" policy. NUMA memory allocation policies have optional flags that can be used in conjunction with their modes. These optional flags can be specified @@ -109,6 +119,8 @@ See Documentation/admin-guide/mm/numa_memory_policy.rst for a list of all available memory allocation policy mode flags and their effect on memory policy. +:: + =static is equivalent to MPOL_F_STATIC_NODES =relative is equivalent to MPOL_F_RELATIVE_NODES @@ -128,9 +140,11 @@ on MountPoint, by 'mount -o remount,mpol=Policy:NodeList MountPoint'. To specify the initial root directory you can use the following mount options: -mode: The permissions as an octal number -uid: The user id -gid: The group id +==== ================================== +mode The permissions as an octal number +uid The user id +gid The group id +==== ================================== These options do not have any effect on remount. You can change these parameters with chmod(1), chown(1) and chgrp(1) on a mounted filesystem. @@ -141,9 +155,9 @@ will give you tmpfs instance on /mytmpfs which can allocate 10GB RAM/SWAP in 10240 inodes and it is only accessible by root. -Author: +:Author: Christoph Rohland <cr@sap.com>, 1.12.01 -Updated: +:Updated: Hugh Dickins, 4 June 2007 -Updated: +:Updated: KOSAKI Motohiro, 16 Mar 2010 diff --git a/Documentation/filesystems/ubifs-authentication.rst b/Documentation/filesystems/ubifs-authentication.rst index 6a9584f6ff46..16efd729bf7c 100644 --- a/Documentation/filesystems/ubifs-authentication.rst +++ b/Documentation/filesystems/ubifs-authentication.rst @@ -1,3 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + :orphan: .. UBIFS Authentication @@ -92,11 +94,11 @@ UBIFS Index & Tree Node Cache ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Basic on-flash UBIFS entities are called *nodes*. UBIFS knows different types -of nodes. Eg. data nodes (`struct ubifs_data_node`) which store chunks of file -contents or inode nodes (`struct ubifs_ino_node`) which represent VFS inodes. -Almost all types of nodes share a common header (`ubifs_ch`) containing basic +of nodes. Eg. data nodes (``struct ubifs_data_node``) which store chunks of file +contents or inode nodes (``struct ubifs_ino_node``) which represent VFS inodes. +Almost all types of nodes share a common header (``ubifs_ch``) containing basic information like node type, node length, a sequence number, etc. (see -`fs/ubifs/ubifs-media.h`in kernel source). Exceptions are entries of the LPT +``fs/ubifs/ubifs-media.h`` in kernel source). Exceptions are entries of the LPT and some less important node types like padding nodes which are used to pad unusable content at the end of LEBs. diff --git a/Documentation/filesystems/ubifs.txt b/Documentation/filesystems/ubifs.rst index acc80442a3bb..e6ee99762534 100644 --- a/Documentation/filesystems/ubifs.txt +++ b/Documentation/filesystems/ubifs.rst @@ -1,5 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============== +UBI File System +=============== + Introduction -============= +============ UBIFS file-system stands for UBI File System. UBI stands for "Unsorted Block Images". UBIFS is a flash file system, which means it is designed @@ -79,6 +85,7 @@ Mount options (*) == default. +==================== ======================================================= bulk_read read more in one go to take advantage of flash media that read faster sequentially no_bulk_read (*) do not bulk-read @@ -98,6 +105,7 @@ auth_key= specify the key used for authenticating the filesystem. auth_hash_name= The hash algorithm used for authentication. Used for both hashing and for creating HMACs. Typical values include "sha256" or "sha512" +==================== ======================================================= Quick usage instructions @@ -107,12 +115,14 @@ The UBI volume to mount is specified using "ubiX_Y" or "ubiX:NAME" syntax, where "X" is UBI device number, "Y" is UBI volume number, and "NAME" is UBI volume name. -Mount volume 0 on UBI device 0 to /mnt/ubifs: -$ mount -t ubifs ubi0_0 /mnt/ubifs +Mount volume 0 on UBI device 0 to /mnt/ubifs:: + + $ mount -t ubifs ubi0_0 /mnt/ubifs Mount "rootfs" volume of UBI device 0 to /mnt/ubifs ("rootfs" is volume -name): -$ mount -t ubifs ubi0:rootfs /mnt/ubifs +name):: + + $ mount -t ubifs ubi0:rootfs /mnt/ubifs The following is an example of the kernel boot arguments to attach mtd0 to UBI and mount volume "rootfs": @@ -122,5 +132,6 @@ References ========== UBIFS documentation and FAQ/HOWTO at the MTD web site: -http://www.linux-mtd.infradead.org/doc/ubifs.html -http://www.linux-mtd.infradead.org/faq/ubifs.html + +- http://www.linux-mtd.infradead.org/doc/ubifs.html +- http://www.linux-mtd.infradead.org/faq/ubifs.html diff --git a/Documentation/filesystems/udf.txt b/Documentation/filesystems/udf.rst index e2f2faf32f18..d9badbf285b2 100644 --- a/Documentation/filesystems/udf.txt +++ b/Documentation/filesystems/udf.rst @@ -1,6 +1,8 @@ -* -* Documentation/filesystems/udf.txt -* +.. SPDX-License-Identifier: GPL-2.0 + +=============== +UDF file system +=============== If you encounter problems with reading UDF discs using this driver, please report them according to MAINTAINERS file. @@ -18,8 +20,10 @@ performance due to very poor read-modify-write support supplied internally by drive firmware. ------------------------------------------------------------------------------- + The following mount options are supported: + =========== ====================================== gid= Set the default group. umask= Set the default umask. mode= Set the default file permissions. @@ -34,6 +38,7 @@ The following mount options are supported: longad Use long ad's (default) nostrict Unset strict conformance iocharset= Set the NLS character set + =========== ====================================== The uid= and gid= options need a bit more explaining. They will accept a decimal numeric value and all inodes on that mount will then appear as @@ -47,13 +52,17 @@ the interactive user will always see the files on the disk as belonging to him. The remaining are for debugging and disaster recovery: - novrs Skip volume sequence recognition + ===== ================================ + novrs Skip volume sequence recognition + ===== ================================ The following expect a offset from 0. + ========== ================================================= session= Set the CDROM session (default= last session) anchor= Override standard anchor location. (default= 256) lastblock= Set the last block of the filesystem/ + ========== ================================================= ------------------------------------------------------------------------------- @@ -62,5 +71,5 @@ For the latest version and toolset see: https://github.com/pali/udftools Documentation on UDF and ECMA 167 is available FREE from: - http://www.osta.org/ - http://www.ecma-international.org/ + - http://www.osta.org/ + - http://www.ecma-international.org/ diff --git a/Documentation/filesystems/virtiofs.rst b/Documentation/filesystems/virtiofs.rst index 4f338e3cb3f7..e06e4951cb39 100644 --- a/Documentation/filesystems/virtiofs.rst +++ b/Documentation/filesystems/virtiofs.rst @@ -1,5 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 +.. _virtiofs_index: + =================================================== virtiofs: virtio-fs host<->guest shared file system =================================================== diff --git a/Documentation/filesystems/zonefs.txt b/Documentation/filesystems/zonefs.rst index d54fa98ac158..71d845c6a700 100644 --- a/Documentation/filesystems/zonefs.txt +++ b/Documentation/filesystems/zonefs.rst @@ -1,4 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================================ ZoneFS - Zone filesystem for Zoned block devices +================================================ Introduction ============ @@ -29,6 +33,7 @@ Zoned block devices Zoned storage devices belong to a class of storage devices with an address space that is divided into zones. A zone is a group of consecutive LBAs and all zones are contiguous (there are no LBA gaps). Zones may have different types. + * Conventional zones: there are no access constraints to LBAs belonging to conventional zones. Any read or write access can be executed, similarly to a regular block device. @@ -158,6 +163,7 @@ Format options -------------- Several optional features of zonefs can be enabled at format time. + * Conventional zone aggregation: ranges of contiguous conventional zones can be aggregated into a single larger file instead of the default one file per zone. * File ownership: The owner UID and GID of zone files is by default 0 (root) @@ -249,7 +255,7 @@ permissions. Further action taken by zonefs I/O error recovery can be controlled by the user with the "errors=xxx" mount option. The table below summarizes the result of zonefs I/O error processing depending on the mount option and on the zone -conditions. +conditions:: +--------------+-----------+-----------------------------------------+ | | | Post error state | @@ -258,11 +264,11 @@ conditions. | option | condition | size read write read write | +--------------+-----------+-----------------------------------------+ | | good | fixed yes no yes yes | - | remount-ro | read-only | fixed yes no yes no | + | remount-ro | read-only | as is yes no yes no | | (default) | offline | 0 no no no no | +--------------+-----------+-----------------------------------------+ | | good | fixed yes no yes yes | - | zone-ro | read-only | fixed yes no yes no | + | zone-ro | read-only | as is yes no yes no | | | offline | 0 no no no no | +--------------+-----------+-----------------------------------------+ | | good | 0 no no yes yes | @@ -270,11 +276,12 @@ conditions. | | offline | 0 no no no no | +--------------+-----------+-----------------------------------------+ | | good | fixed yes yes yes yes | - | repair | read-only | fixed yes no yes no | + | repair | read-only | as is yes no yes no | | | offline | 0 no no no no | +--------------+-----------+-----------------------------------------+ Further notes: + * The "errors=remount-ro" mount option is the default behavior of zonefs I/O error processing if no errors mount option is specified. * With the "errors=remount-ro" mount option, the change of the file access @@ -302,13 +309,22 @@ Mount options zonefs define the "errors=<behavior>" mount option to allow the user to specify zonefs behavior in response to I/O errors, inode size inconsistencies or zone condition changes. The defined behaviors are as follow: + * remount-ro (default) * zone-ro * zone-offline * repair -The I/O error actions defined for each behavior are detailed in the previous -section. +The run-time I/O error actions defined for each behavior are detailed in the +previous section. Mount time I/O errors will cause the mount operation to fail. +The handling of read-only zones also differs between mount-time and run-time. +If a read-only zone is found at mount time, the zone is always treated in the +same manner as offline zones, that is, all accesses are disabled and the zone +file size set to 0. This is necessary as the write pointer of read-only zones +is defined as invalib by the ZBC and ZAC standards, making it impossible to +discover the amount of data that has been written to the zone. In the case of a +read-only zone discovered at run-time, as indicated in the previous section. +the size of the zone file is left unchanged from its last updated value. Zonefs User Space Tools ======================= @@ -325,78 +341,78 @@ Examples -------- The following formats a 15TB host-managed SMR HDD with 256 MB zones -with the conventional zones aggregation feature enabled. +with the conventional zones aggregation feature enabled:: -# mkzonefs -o aggr_cnv /dev/sdX -# mount -t zonefs /dev/sdX /mnt -# ls -l /mnt/ -total 0 -dr-xr-xr-x 2 root root 1 Nov 25 13:23 cnv -dr-xr-xr-x 2 root root 55356 Nov 25 13:23 seq + # mkzonefs -o aggr_cnv /dev/sdX + # mount -t zonefs /dev/sdX /mnt + # ls -l /mnt/ + total 0 + dr-xr-xr-x 2 root root 1 Nov 25 13:23 cnv + dr-xr-xr-x 2 root root 55356 Nov 25 13:23 seq The size of the zone files sub-directories indicate the number of files existing for each type of zones. In this example, there is only one conventional zone file (all conventional zones are aggregated under a single -file). +file):: -# ls -l /mnt/cnv -total 137101312 --rw-r----- 1 root root 140391743488 Nov 25 13:23 0 + # ls -l /mnt/cnv + total 137101312 + -rw-r----- 1 root root 140391743488 Nov 25 13:23 0 -This aggregated conventional zone file can be used as a regular file. +This aggregated conventional zone file can be used as a regular file:: -# mkfs.ext4 /mnt/cnv/0 -# mount -o loop /mnt/cnv/0 /data + # mkfs.ext4 /mnt/cnv/0 + # mount -o loop /mnt/cnv/0 /data The "seq" sub-directory grouping files for sequential write zones has in this -example 55356 zones. +example 55356 zones:: -# ls -lv /mnt/seq -total 14511243264 --rw-r----- 1 root root 0 Nov 25 13:23 0 --rw-r----- 1 root root 0 Nov 25 13:23 1 --rw-r----- 1 root root 0 Nov 25 13:23 2 -... --rw-r----- 1 root root 0 Nov 25 13:23 55354 --rw-r----- 1 root root 0 Nov 25 13:23 55355 + # ls -lv /mnt/seq + total 14511243264 + -rw-r----- 1 root root 0 Nov 25 13:23 0 + -rw-r----- 1 root root 0 Nov 25 13:23 1 + -rw-r----- 1 root root 0 Nov 25 13:23 2 + ... + -rw-r----- 1 root root 0 Nov 25 13:23 55354 + -rw-r----- 1 root root 0 Nov 25 13:23 55355 For sequential write zone files, the file size changes as data is appended at -the end of the file, similarly to any regular file system. +the end of the file, similarly to any regular file system:: -# dd if=/dev/zero of=/mnt/seq/0 bs=4096 count=1 conv=notrunc oflag=direct -1+0 records in -1+0 records out -4096 bytes (4.1 kB, 4.0 KiB) copied, 0.00044121 s, 9.3 MB/s + # dd if=/dev/zero of=/mnt/seq/0 bs=4096 count=1 conv=notrunc oflag=direct + 1+0 records in + 1+0 records out + 4096 bytes (4.1 kB, 4.0 KiB) copied, 0.00044121 s, 9.3 MB/s -# ls -l /mnt/seq/0 --rw-r----- 1 root root 4096 Nov 25 13:23 /mnt/seq/0 + # ls -l /mnt/seq/0 + -rw-r----- 1 root root 4096 Nov 25 13:23 /mnt/seq/0 The written file can be truncated to the zone size, preventing any further -write operation. +write operation:: -# truncate -s 268435456 /mnt/seq/0 -# ls -l /mnt/seq/0 --rw-r----- 1 root root 268435456 Nov 25 13:49 /mnt/seq/0 + # truncate -s 268435456 /mnt/seq/0 + # ls -l /mnt/seq/0 + -rw-r----- 1 root root 268435456 Nov 25 13:49 /mnt/seq/0 Truncation to 0 size allows freeing the file zone storage space and restart -append-writes to the file. +append-writes to the file:: -# truncate -s 0 /mnt/seq/0 -# ls -l /mnt/seq/0 --rw-r----- 1 root root 0 Nov 25 13:49 /mnt/seq/0 + # truncate -s 0 /mnt/seq/0 + # ls -l /mnt/seq/0 + -rw-r----- 1 root root 0 Nov 25 13:49 /mnt/seq/0 Since files are statically mapped to zones on the disk, the number of blocks of -a file as reported by stat() and fstat() indicates the size of the file zone. - -# stat /mnt/seq/0 - File: /mnt/seq/0 - Size: 0 Blocks: 524288 IO Block: 4096 regular empty file -Device: 870h/2160d Inode: 50431 Links: 1 -Access: (0640/-rw-r-----) Uid: ( 0/ root) Gid: ( 0/ root) -Access: 2019-11-25 13:23:57.048971997 +0900 -Modify: 2019-11-25 13:52:25.553805765 +0900 -Change: 2019-11-25 13:52:25.553805765 +0900 - Birth: - +a file as reported by stat() and fstat() indicates the size of the file zone:: + + # stat /mnt/seq/0 + File: /mnt/seq/0 + Size: 0 Blocks: 524288 IO Block: 4096 regular empty file + Device: 870h/2160d Inode: 50431 Links: 1 + Access: (0640/-rw-r-----) Uid: ( 0/ root) Gid: ( 0/ root) + Access: 2019-11-25 13:23:57.048971997 +0900 + Modify: 2019-11-25 13:52:25.553805765 +0900 + Change: 2019-11-25 13:52:25.553805765 +0900 + Birth: - The number of blocks of the file ("Blocks") in units of 512B blocks gives the maximum file size of 524288 * 512 B = 256 MB, corresponding to the device zone diff --git a/Documentation/firmware-guide/acpi/namespace.rst b/Documentation/firmware-guide/acpi/namespace.rst index 3eb763d6656d..6193582a2204 100644 --- a/Documentation/firmware-guide/acpi/namespace.rst +++ b/Documentation/firmware-guide/acpi/namespace.rst @@ -56,13 +56,13 @@ are illustrated in the following diagram:: +- - - -+ | +-------------------| | | Entry | - - - - - - - -+ | | Definition Blocks | | +- - - -+ | | +-------------------+ | - | | +- - - - - - - - - -+ | - +-|->| SSDT | | + | | +- - - - - - - - - -+ | + +-|->| SSDT | | | +-------------------+ | | | Definition Blocks | | | +- - - - - - - - - -+ | +------------------------+ - | + | OSPM Loading | \|/ +----------------+ diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index b24adb67ddca..8ef62fd39787 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -162,6 +162,7 @@ Hardware Monitoring Kernel Drivers tmp421 tmp513 tps40422 + tps53679 twl4030-madc-hwmon ucd9000 ucd9200 diff --git a/Documentation/hwmon/isl68137.rst b/Documentation/hwmon/isl68137.rst index a5a7c8545c9e..cc4b61447b63 100644 --- a/Documentation/hwmon/isl68137.rst +++ b/Documentation/hwmon/isl68137.rst @@ -3,7 +3,7 @@ Kernel driver isl68137 Supported chips: - * Intersil ISL68137 + * Renesas ISL68137 Prefix: 'isl68137' @@ -11,19 +11,405 @@ Supported chips: Datasheet: - Publicly available at the Intersil website - https://www.intersil.com/content/dam/Intersil/documents/isl6/isl68137.pdf + Publicly available at the Renesas website + https://www.renesas.com/us/en/www/doc/datasheet/isl68137.pdf + + * Renesas ISL68220 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68221 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68222 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68223 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68224 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68225 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68226 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68227 + + Prefix: 'raa_dmpvr2_1rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68229 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68233 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL68239 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69222 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69223 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69224 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69225 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69227 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69228 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69234 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69236 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69239 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69242 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69243 + + Prefix: 'raa_dmpvr2_1rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69247 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69248 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69254 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69255 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69256 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69259 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69260 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69268 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69269 + + Prefix: 'raa_dmpvr2_3rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas ISL69298 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA228000 + + Prefix: 'raa_dmpvr2_hv' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA228004 + + Prefix: 'raa_dmpvr2_hv' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA228006 + + Prefix: 'raa_dmpvr2_hv' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA228228 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA229001 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website + + * Renesas RAA229004 + + Prefix: 'raa_dmpvr2_2rail' + + Addresses scanned: - + + Datasheet: + + Publicly available (after August 2020 launch) at the Renesas website Authors: - Maxim Sloyko <maxims@google.com> - Robert Lippert <rlippert@google.com> - Patrick Venture <venture@google.com> + - Grant Peltier <grant.peltier.jg@renesas.com> Description ----------- -Intersil ISL68137 is a digital output 7-phase configurable PWM -controller with an AVSBus interface. +This driver supports the Renesas ISL68137 and all 2nd generation Renesas +digital multiphase voltage regulators (raa_dmpvr2). The ISL68137 is a digital +output 7-phase configurable PWM controller with an AVSBus interface. 2nd +generation devices are grouped into 4 distinct configurations: '1rail' for +single-rail devices, '2rail' for dual-rail devices, '3rail' for 3-rail devices, +and 'hv' for high voltage single-rail devices. Consult the individual datasheets +for more information. Usage Notes ----------- @@ -33,10 +419,14 @@ devices explicitly. The ISL68137 AVS operation mode must be enabled/disabled at runtime. -Beyond the normal sysfs pmbus attributes, the driver exposes a control attribute. +Beyond the normal sysfs pmbus attributes, the driver exposes a control attribute +for the ISL68137. + +For 2nd generation Renesas digital multiphase voltage regulators, only the +normal sysfs pmbus attributes are supported. -Additional Sysfs attributes ---------------------------- +ISL68137 sysfs attributes +------------------------- ======================= ==================================== avs(0|1)_enable Controls the AVS state of each rail. @@ -78,3 +468,138 @@ temp[1-3]_crit_alarm Chip temperature critical high alarm temp[1-3]_max Maximum temperature temp[1-3]_max_alarm Chip temperature high alarm ======================= ==================================== + +raa_dmpvr2_1rail/hv sysfs attributes +------------------------------------ + +======================= ========================================== +curr1_label "iin" +curr1_input Measured input current +curr1_crit Critical maximum current +curr1_crit_alarm Current critical high alarm + +curr2_label "iout" +curr2_input Measured output current +curr2_crit Critical maximum current +curr2_crit_alarm Current critical high alarm + +in1_label "vin" +in1_input Measured input voltage +in1_lcrit Critical minimum input voltage +in1_lcrit_alarm Input voltage critical low alarm +in1_crit Critical maximum input voltage +in1_crit_alarm Input voltage critical high alarm + +in2_label "vmon" +in2_input Scaled VMON voltage read from the VMON pin + +in3_label "vout" +in3_input Measured output voltage +in3_lcrit Critical minimum output voltage +in3_lcrit_alarm Output voltage critical low alarm +in3_crit Critical maximum output voltage +in3_crit_alarm Output voltage critical high alarm + +power1_label "pin" +power1_input Measured input power +power1_alarm Input power high alarm + +power2_label "pout" +power2_input Measured output power + +temp[1-3]_input Measured temperature +temp[1-3]_crit Critical high temperature +temp[1-3]_crit_alarm Chip temperature critical high alarm +temp[1-3]_max Maximum temperature +temp[1-3]_max_alarm Chip temperature high alarm +======================= ========================================== + +raa_dmpvr2_2rail sysfs attributes +--------------------------------- + +======================= ========================================== +curr[1-2]_label "iin[1-2]" +curr[1-2]_input Measured input current +curr[1-2]_crit Critical maximum current +curr[1-2]_crit_alarm Current critical high alarm + +curr[3-4]_label "iout[1-2]" +curr[3-4]_input Measured output current +curr[3-4]_crit Critical maximum current +curr[3-4]_crit_alarm Current critical high alarm + +in1_label "vin" +in1_input Measured input voltage +in1_lcrit Critical minimum input voltage +in1_lcrit_alarm Input voltage critical low alarm +in1_crit Critical maximum input voltage +in1_crit_alarm Input voltage critical high alarm + +in2_label "vmon" +in2_input Scaled VMON voltage read from the VMON pin + +in[3-4]_label "vout[1-2]" +in[3-4]_input Measured output voltage +in[3-4]_lcrit Critical minimum output voltage +in[3-4]_lcrit_alarm Output voltage critical low alarm +in[3-4]_crit Critical maximum output voltage +in[3-4]_crit_alarm Output voltage critical high alarm + +power[1-2]_label "pin[1-2]" +power[1-2]_input Measured input power +power[1-2]_alarm Input power high alarm + +power[3-4]_label "pout[1-2]" +power[3-4]_input Measured output power + +temp[1-5]_input Measured temperature +temp[1-5]_crit Critical high temperature +temp[1-5]_crit_alarm Chip temperature critical high alarm +temp[1-5]_max Maximum temperature +temp[1-5]_max_alarm Chip temperature high alarm +======================= ========================================== + +raa_dmpvr2_3rail sysfs attributes +--------------------------------- + +======================= ========================================== +curr[1-3]_label "iin[1-3]" +curr[1-3]_input Measured input current +curr[1-3]_crit Critical maximum current +curr[1-3]_crit_alarm Current critical high alarm + +curr[4-6]_label "iout[1-3]" +curr[4-6]_input Measured output current +curr[4-6]_crit Critical maximum current +curr[4-6]_crit_alarm Current critical high alarm + +in1_label "vin" +in1_input Measured input voltage +in1_lcrit Critical minimum input voltage +in1_lcrit_alarm Input voltage critical low alarm +in1_crit Critical maximum input voltage +in1_crit_alarm Input voltage critical high alarm + +in2_label "vmon" +in2_input Scaled VMON voltage read from the VMON pin + +in[3-5]_label "vout[1-3]" +in[3-5]_input Measured output voltage +in[3-5]_lcrit Critical minimum output voltage +in[3-5]_lcrit_alarm Output voltage critical low alarm +in[3-5]_crit Critical maximum output voltage +in[3-5]_crit_alarm Output voltage critical high alarm + +power[1-3]_label "pin[1-3]" +power[1-3]_input Measured input power +power[1-3]_alarm Input power high alarm + +power[4-6]_label "pout[1-3]" +power[4-6]_input Measured output power + +temp[1-7]_input Measured temperature +temp[1-7]_crit Critical high temperature +temp[1-7]_crit_alarm Chip temperature critical high alarm +temp[1-7]_max Maximum temperature +temp[1-7]_max_alarm Chip temperature high alarm +======================= ========================================== diff --git a/Documentation/hwmon/k10temp.rst b/Documentation/hwmon/k10temp.rst index 4451d59b9425..8557e26281c3 100644 --- a/Documentation/hwmon/k10temp.rst +++ b/Documentation/hwmon/k10temp.rst @@ -100,9 +100,10 @@ socket type, not the processor's actual capabilities. Therefore, if you are using an AM3 processor on an AM2+ mainboard, you can safely use the "force=1" parameter. -There is one temperature measurement value, available as temp1_input in -sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree. -Please note that it is defined as a relative value; to quote the AMD manual:: +For CPUs older than Family 17h, there is one temperature measurement value, +available as temp1_input in sysfs. It is measured in degrees Celsius with a +resolution of 1/8th degree. Please note that it is defined as a relative +value; to quote the AMD manual:: Tctl is the processor temperature control value, used by the platform to control cooling systems. Tctl is a non-physical temperature on an @@ -126,3 +127,25 @@ it. Models from 17h family report relative temperature, the driver aims to compensate and report the real temperature. + +On Family 17h and Family 18h CPUs, additional temperature sensors may report +Core Complex Die (CCD) temperatures. Up to 8 such temperatures are reported +as temp{3..10}_input, labeled Tccd{1..8}. Actual support depends on the CPU +variant. + +Various Family 17h and 18h CPUs report voltage and current telemetry +information. The following attributes may be reported. + +Attribute Label Description +=============== ======= ================ +in0_input Vcore Core voltage +in1_input Vsoc SoC voltage +curr1_input Icore Core current +curr2_input Isoc SoC current +=============== ======= ================ + +Current values are raw (unscaled) as reported by the CPU. Core current is +reported as multiples of 1A / LSB. SoC is reported as multiples of 0.25A +/ LSB. The real current is board specific. Reported currents should be seen +as rough guidance, and should be scaled using sensors3.conf as appropriate +for a given board. diff --git a/Documentation/hwmon/ltc2978.rst b/Documentation/hwmon/ltc2978.rst index 01a24fd6d5fe..bc5270e5a477 100644 --- a/Documentation/hwmon/ltc2978.rst +++ b/Documentation/hwmon/ltc2978.rst @@ -3,13 +3,21 @@ Kernel driver ltc2978 Supported chips: + * Linear Technology LTC2972 + + Prefix: 'ltc2972' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltc2972.html + * Linear Technology LTC2974 Prefix: 'ltc2974' Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc2974 + Datasheet: https://www.analog.com/en/products/ltc2974 * Linear Technology LTC2975 @@ -17,7 +25,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc2975 + Datasheet: https://www.analog.com/en/products/ltc2975 * Linear Technology LTC2977 @@ -25,7 +33,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc2977 + Datasheet: https://www.analog.com/en/products/ltc2977 * Linear Technology LTC2978, LTC2978A @@ -33,9 +41,17 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc2978 + Datasheet: https://www.analog.com/en/products/ltc2978 + + https://www.analog.com/en/products/ltc2978a + + * Linear Technology LTC2979 - http://www.linear.com/product/ltc2978a + Prefix: 'ltc2979' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltc2979 * Linear Technology LTC2980 @@ -43,7 +59,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc2980 + Datasheet: https://www.analog.com/en/products/ltc2980 * Linear Technology LTC3880 @@ -51,7 +67,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc3880 + Datasheet: https://www.analog.com/en/products/ltc3880 * Linear Technology LTC3882 @@ -59,7 +75,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc3882 + Datasheet: https://www.analog.com/en/products/ltc3882 * Linear Technology LTC3883 @@ -67,7 +83,15 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc3883 + Datasheet: https://www.analog.com/en/products/ltc3883 + + * Linear Technology LTC3884 + + Prefix: 'ltc3884' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltc3884 * Linear Technology LTC3886 @@ -75,7 +99,7 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc3886 + Datasheet: https://www.analog.com/en/products/ltc3886 * Linear Technology LTC3887 @@ -83,7 +107,23 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltc3887 + Datasheet: https://www.analog.com/en/products/ltc3887 + + * Linear Technology LTC3889 + + Prefix: 'ltc3889' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltc3889 + + * Linear Technology LTC7880 + + Prefix: 'ltc7880' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltc7880 * Linear Technology LTM2987 @@ -91,15 +131,23 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltm2987 + Datasheet: https://www.analog.com/en/products/ltm2987 - * Linear Technology LTM4675 + * Linear Technology LTM4644 + + Prefix: 'ltm4644' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltm4644 + + * Linear Technology LTM4675 Prefix: 'ltm4675' Addresses scanned: - - Datasheet: http://www.linear.com/product/ltm4675 + Datasheet: https://www.analog.com/en/products/ltm4675 * Linear Technology LTM4676 @@ -107,7 +155,31 @@ Supported chips: Addresses scanned: - - Datasheet: http://www.linear.com/product/ltm4676 + Datasheet: https://www.analog.com/en/products/ltm4676 + + * Linear Technology LTM4677 + + Prefix: 'ltm4677' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltm4677 + + * Linear Technology LTM4678 + + Prefix: 'ltm4678' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/ltm4678 + + * Analog Devices LTM4680 + + Prefix: 'ltm4680' + + Addresses scanned: - + + Datasheet: http://www.analog.com/ltm4680 * Analog Devices LTM4686 @@ -117,6 +189,15 @@ Supported chips: Datasheet: http://www.analog.com/ltm4686 + * Analog Devices LTM4700 + + Prefix: 'ltm4700' + + Addresses scanned: - + + Datasheet: http://www.analog.com/ltm4700 + + Author: Guenter Roeck <linux@roeck-us.net> @@ -166,13 +247,13 @@ in1_min Minimum input voltage. in1_max Maximum input voltage. - LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, and - LTM2987 only. + LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, + LTC2979 and LTM2987 only. in1_lcrit Critical minimum input voltage. - LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, and - LTM2987 only. + LTC2972, LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, + LTC2979 and LTM2987 only. in1_crit Critical maximum input voltage. @@ -180,29 +261,34 @@ in1_min_alarm Input voltage low alarm. in1_max_alarm Input voltage high alarm. - LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, and - LTM2987 only. + LTC2972, LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, + LTC2979 and LTM2987 only. + in1_lcrit_alarm Input voltage critical low alarm. - LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, and - LTM2987 only. + LTC2972, LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, + LTC2979 and LTM2987 only. + in1_crit_alarm Input voltage critical high alarm. in1_lowest Lowest input voltage. - LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, and - LTM2987 only. + LTC2972, LTC2974, LTC2975, LTC2977, LTC2980, LTC2978, + and LTM2987 only. + in1_highest Highest input voltage. in1_reset_history Reset input voltage history. in[N]_label "vout[1-8]". + - LTC2972: N=2-3 - LTC2974, LTC2975: N=2-5 - - LTC2977, LTC2980, LTM2987: N=2-9 + - LTC2977, LTC2979, LTC2980, LTM2987: N=2-9 - LTC2978: N=2-9 - - LTC3880, LTC3882, LTC23886 LTC3887, LTM4675, LTM4676: - N=2-3 + - LTC3880, LTC3882, LTC3884, LTC23886 LTC3887, LTC3889, + LTC7880, LTM4644, LTM4675, LTM4676, LTM4677, LTM4678, + LTM4680, LTM4700: N=2-3 - LTC3883: N=2 in[N]_input Measured output voltage. @@ -225,8 +311,7 @@ in[N]_crit_alarm Output voltage critical high alarm. in[N]_lowest Lowest output voltage. - - LTC2974, LTC2975,and LTC2978 only. + LTC2972, LTC2974, LTC2975,and LTC2978 only. in[N]_highest Highest output voltage. @@ -234,20 +319,24 @@ in[N]_reset_history Reset output voltage history. temp[N]_input Measured temperature. + - On LTC2972, temp[1-2] report external temperatures, + and temp 3 reports the chip temperature. - On LTC2974 and LTC2975, temp[1-4] report external temperatures, and temp5 reports the chip temperature. - - On LTC2977, LTC2980, LTC2978, and LTM2987, only one - temperature measurement is supported and reports - the chip temperature. - - On LTC3880, LTC3882, LTC3887, LTM4675, and LTM4676, - temp1 and temp2 report external temperatures, and - temp3 reports the chip temperature. + - On LTC2977, LTC2979, LTC2980, LTC2978, and LTM2987, + only one temperature measurement is supported and + reports the chip temperature. + - On LTC3880, LTC3882, LTC3886, LTC3887, LTC3889, + LTM4664, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, + and LTM4700, temp1 and temp2 report external + temperatures, and temp3 reports the chip temperature. - On LTC3883, temp1 reports an external temperature, and temp2 reports the chip temperature. temp[N]_min Mimimum temperature. - LTC2974, LCT2977, LTM2980, LTC2978, and LTM2987 only. + LTC2972, LTC2974, LCT2977, LTM2980, LTC2978, + LTC2979, and LTM2987 only. temp[N]_max Maximum temperature. @@ -257,8 +346,8 @@ temp[N]_crit Critical high temperature. temp[N]_min_alarm Temperature low alarm. - LTC2974, LTC2975, LTC2977, LTM2980, LTC2978, and - LTM2987 only. + LTC2972, LTC2974, LTC2975, LTC2977, LTM2980, LTC2978, + LTC2979, and LTM2987 only. temp[N]_max_alarm Temperature high alarm. @@ -269,8 +358,8 @@ temp[N]_crit_alarm Temperature critical high alarm. temp[N]_lowest Lowest measured temperature. - - LTC2974, LTC2975, LTC2977, LTM2980, LTC2978, and - LTM2987 only. + - LTC2972, LTC2974, LTC2975, LTC2977, LTM2980, LTC2978, + LTC2979, and LTM2987 only. - Not supported for chip temperature sensor on LTC2974 and LTC2975. @@ -290,19 +379,22 @@ power1_input Measured input power. power[N]_label "pout[1-4]". + - LTC2972: N=1-2 - LTC2974, LTC2975: N=1-4 - - LTC2977, LTC2980, LTM2987: Not supported + - LTC2977, LTC2979, LTC2980, LTM2987: Not supported - LTC2978: Not supported - - LTC3880, LTC3882, LTC3886, LTC3887, LTM4675, LTM4676: - N=1-2 + - LTC3880, LTC3882, LTC3884, LTC3886, LTC3887, LTC3889, + LTM4664, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, + LTM4700: N=1-2 - LTC3883: N=2 power[N]_input Measured output power. curr1_label "iin". - LTC3880, LTC3883, LTC3886, LTC3887, LTM4675, - and LTM4676 only. + LTC3880, LTC3883, LTC3884, LTC3886, LTC3887, LTC3889, + LTM4644, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, + and LTM4700 only. curr1_input Measured input current. @@ -320,11 +412,13 @@ curr1_reset_history Reset input current history. curr[N]_label "iout[1-4]". + - LTC2972: N-1-2 - LTC2974, LTC2975: N=1-4 - - LTC2977, LTC2980, LTM2987: not supported + - LTC2977, LTC2979, LTC2980, LTM2987: not supported - LTC2978: not supported - - LTC3880, LTC3882, LTC3886, LTC3887, LTM4675, LTM4676: - N=2-3 + - LTC3880, LTC3882, LTC3884, LTC3886, LTC3887, LTC3889, + LTM4664, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, + LTM4700: N=2-3 - LTC3883: N=2 curr[N]_input Measured output current. @@ -335,7 +429,7 @@ curr[N]_crit Critical high output current. curr[N]_lcrit Critical low output current. - LTC2974 and LTC2975 only. + LTC2972, LTC2974 and LTC2975 only. curr[N]_max_alarm Output current high alarm. @@ -343,11 +437,11 @@ curr[N]_crit_alarm Output current critical high alarm. curr[N]_lcrit_alarm Output current critical low alarm. - LTC2974 and LTC2975 only. + LTC2972, LTC2974 and LTC2975 only. curr[N]_lowest Lowest output current. - LTC2974 and LTC2975 only. + LTC2972, LTC2974 and LTC2975 only. curr[N]_highest Highest output current. diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst index 92515c446fe3..501b37b0610d 100644 --- a/Documentation/hwmon/pmbus-core.rst +++ b/Documentation/hwmon/pmbus-core.rst @@ -162,9 +162,12 @@ Read byte from page <page>, register <reg>. :: - int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); -Read word from page <page>, register <reg>. +Read word from page <page>, phase <pase>, register <reg>. If the chip does not +support multiple phases, the phase parameter can be ignored. If the chip +supports multiple phases, a phase value of 0xff indicates all phases. :: @@ -201,16 +204,21 @@ is mandatory. :: - int pmbus_set_page(struct i2c_client *client, u8 page); + int pmbus_set_page(struct i2c_client *client, u8 page, u8 phase); -Set PMBus page register to <page> for subsequent commands. +Set PMBus page register to <page> and <phase> for subsequent commands. +If the chip does not support multiple phases, the phase parameter is +ignored. Otherwise, a phase value of 0xff selects all phases. :: - int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); + int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 phase, + u8 reg); -Read word data from <page>, <reg>. Similar to i2c_smbus_read_word_data(), but -selects page first. +Read word data from <page>, <phase>, <reg>. Similar to +i2c_smbus_read_word_data(), but selects page and phase first. If the chip does +not support multiple phases, the phase parameter is ignored. Otherwise, a phase +value of 0xff selects all phases. :: diff --git a/Documentation/hwmon/pmbus.rst b/Documentation/hwmon/pmbus.rst index f787984e88a9..2658ddee70eb 100644 --- a/Documentation/hwmon/pmbus.rst +++ b/Documentation/hwmon/pmbus.rst @@ -227,7 +227,9 @@ currX_lcrit_alarm Output current critical low alarm. From IOUT_UC_FAULT status. currX_crit_alarm Current critical high alarm. From IIN_OC_FAULT or IOUT_OC_FAULT status. -currX_label "iin" or "ioutY" +currX_label "iin", "iinY", "iinY.Z", "ioutY", or "ioutY.Z", + where Y reflects the page number and Z reflects the + phase. powerX_input Measured power. From READ_PIN or READ_POUT register. powerX_cap Output power cap. From POUT_MAX register. @@ -239,7 +241,9 @@ powerX_alarm Power high alarm. From PIN_OP_WARNING or POUT_OP_WARNING status. powerX_crit_alarm Output power critical high alarm. From POUT_OP_FAULT status. -powerX_label "pin" or "poutY" +powerX_label "pin", "pinY", "pinY.Z", "poutY", or "poutY.Z", + where Y reflects the page number and Z reflects the + phase. tempX_input Measured temperature. From READ_TEMPERATURE_X register. diff --git a/Documentation/hwmon/tps53679.rst b/Documentation/hwmon/tps53679.rst new file mode 100644 index 000000000000..be94cab78967 --- /dev/null +++ b/Documentation/hwmon/tps53679.rst @@ -0,0 +1,178 @@ +Kernel driver tps53679 +====================== + +Supported chips: + + * Texas Instruments TPS53647 + + Prefix: 'tps53647' + + Addresses scanned: - + + Datasheet: http://www.ti.com/lit/gpn/tps53647 + + * Texas Instruments TPS53667 + + Prefix: 'tps53667' + + Addresses scanned: - + + Datasheet: http://www.ti.com/lit/gpn/TPS53667 + + * Texas Instruments TPS53679 + + Prefix: 'tps53679' + + Addresses scanned: - + + Datasheet: http://www.ti.com/lit/gpn/TPS53679 (short version) + + * Texas Instruments TPS53681 + + Prefix: 'tps53681' + + Addresses scanned: - + + Datasheet: http://www.ti.com/lit/gpn/TPS53681 + + * Texas Instruments TPS53688 + + Prefix: 'tps53688' + + Addresses scanned: - + + Datasheet: Available under NDA + + +Authors: + Vadim Pasternak <vadimp@mellanox.com> + Guenter Roeck <linux@roeck-us.net> + + +Description +----------- + +Chips in this series are multi-phase step-down converters with one or two +output channels and up to 8 phases per channel. + + +Usage Notes +----------- + +This driver does not probe for PMBus devices. You will have to instantiate +devices explicitly. + +Example: the following commands will load the driver for an TPS53681 at address +0x60 on I2C bus #1:: + + # modprobe tps53679 + # echo tps53681 0x60 > /sys/bus/i2c/devices/i2c-1/new_device + + +Sysfs attributes +---------------- + +======================= ======================================================== +in1_label "vin" + +in1_input Measured input voltage. + +in1_lcrit Critical minimum input voltage + + TPS53679, TPS53681, TPS53688 only. + +in1_lcrit_alarm Input voltage critical low alarm. + + TPS53679, TPS53681, TPS53688 only. + +in1_crit Critical maximum input voltage. + +in1_crit_alarm Input voltage critical high alarm. + +in[N]_label "vout[1-2]" + + - TPS53647, TPS53667: N=2 + - TPS53679, TPS53588: N=2,3 + +in[N]_input Measured output voltage. + +in[N]_lcrit Critical minimum input voltage. + + TPS53679, TPS53681, TPS53688 only. + +in[N]_lcrit_alarm Critical minimum voltage alarm. + + TPS53679, TPS53681, TPS53688 only. + +in[N]_alarm Output voltage alarm. + + TPS53647, TPS53667 only. + +in[N]_crit Critical maximum output voltage. + + TPS53679, TPS53681, TPS53688 only. + +in[N]_crit_alarm Output voltage critical high alarm. + + TPS53679, TPS53681, TPS53688 only. + +temp[N]_input Measured temperature. + + - TPS53647, TPS53667: N=1 + - TPS53679, TPS53681, TPS53588: N=1,2 + +temp[N]_max Maximum temperature. + +temp[N]_crit Critical high temperature. + +temp[N]_max_alarm Temperature high alarm. + +temp[N]_crit_alarm Temperature critical high alarm. + +power1_label "pin". + +power1_input Measured input power. + +power[N]_label "pout[1-2]". + + - TPS53647, TPS53667: N=2 + - TPS53679, TPS53681, TPS53588: N=2,3 + +power[N]_input Measured output power. + +curr1_label "iin". + +curr1_input Measured input current. + +curr1_max Maximum input current. + +curr1_max_alarm Input current high alarm. + +curr1_crit Critical input current. + +curr1_crit_alarm Input current critical alarm. + +curr[N]_label "iout[1-2]" or "iout1.[0-5]". + + The first digit is the output channel, the second + digit is the phase within the channel. Per-phase + telemetry supported on TPS53681 only. + + - TPS53647, TPS53667: N=2 + - TPS53679, TPS53588: N=2,3 + - TPS53681: N=2-9 + +curr[N]_input Measured output current. + +curr[N]_max Maximum output current. + +curr[N]_crit Critical high output current. + +curr[N]_max_alarm Output current high alarm. + +curr[N]_crit_alarm Output current critical high alarm. + + Limit and alarm attributes are only available for + non-phase telemetry (iout1, iout2). + +======================= ======================================================== diff --git a/Documentation/i2c/smbus-protocol.rst b/Documentation/i2c/smbus-protocol.rst index c122ed239f7f..c2e29633071e 100644 --- a/Documentation/i2c/smbus-protocol.rst +++ b/Documentation/i2c/smbus-protocol.rst @@ -274,7 +274,7 @@ to know which slave triggered the interrupt. This is implemented the following way in the Linux kernel: * I2C bus drivers which support SMBus alert should call - i2c_setup_smbus_alert() to setup SMBus alert support. + i2c_new_smbus_alert_device() to install SMBus alert support. * I2C drivers for devices which can trigger SMBus alerts should implement the optional alert() callback. diff --git a/Documentation/index.rst b/Documentation/index.rst index e99d0bd2589d..9599c0f3eea8 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -99,6 +99,7 @@ needed). accounting/index block/index cdrom/index + cpu-freq/index ide/index fb/index fpga/index @@ -130,9 +131,10 @@ needed). bpf/index usb/index PCI/index + scsi/index misc-devices/index - mic/index scheduler/index + mhi/index Architecture-agnostic documentation ----------------------------------- diff --git a/Documentation/core-api/gcc-plugins.rst b/Documentation/kbuild/gcc-plugins.rst index 8502f24396fb..4b1c10f88e30 100644 --- a/Documentation/core-api/gcc-plugins.rst +++ b/Documentation/kbuild/gcc-plugins.rst @@ -72,6 +72,10 @@ e.g., on Ubuntu for gcc-4.9:: apt-get install gcc-4.9-plugin-dev +Or on Fedora:: + + dnf install gcc-plugin-devel + Enable a GCC plugin based feature in the kernel config:: CONFIG_GCC_PLUGIN_CYC_COMPLEXITY = y diff --git a/Documentation/kbuild/index.rst b/Documentation/kbuild/index.rst index 0f144fad99a6..cee2f99f734b 100644 --- a/Documentation/kbuild/index.rst +++ b/Documentation/kbuild/index.rst @@ -19,6 +19,8 @@ Kernel Build System issues reproducible-builds + gcc-plugins + llvm .. only:: subproject and html diff --git a/Documentation/kbuild/kbuild.rst b/Documentation/kbuild/kbuild.rst index f1e5dce86af7..2d1fc03d346e 100644 --- a/Documentation/kbuild/kbuild.rst +++ b/Documentation/kbuild/kbuild.rst @@ -237,7 +237,7 @@ This is solely useful to speed up test compiles. KBUILD_EXTRA_SYMBOLS -------------------- For modules that use symbols from other modules. -See more details in modules.txt. +See more details in modules.rst. ALLSOURCE_ARCHS --------------- @@ -262,3 +262,8 @@ KBUILD_BUILD_USER, KBUILD_BUILD_HOST These two variables allow to override the user@host string displayed during boot and in /proc/version. The default value is the output of the commands whoami and host, respectively. + +LLVM +---- +If this variable is set to 1, Kbuild will use Clang and LLVM utilities instead +of GCC and GNU binutils to build the kernel. diff --git a/Documentation/kbuild/kconfig-language.rst b/Documentation/kbuild/kconfig-language.rst index d0111dd26410..a1601ec3317b 100644 --- a/Documentation/kbuild/kconfig-language.rst +++ b/Documentation/kbuild/kconfig-language.rst @@ -159,11 +159,11 @@ applicable everywhere (see syntax). Given the following example:: config FOO - tristate + tristate "foo" imply BAZ config BAZ - tristate + tristate "baz" depends on BAR The following values are possible: @@ -173,7 +173,10 @@ applicable everywhere (see syntax). === === ============= ============== n y n N/m/y m y m M/y/n - y y y Y/n + y y y Y/m/n + n m n N/m + m m m M/n + y m n M/n y n * N === === ============= ============== @@ -181,6 +184,24 @@ applicable everywhere (see syntax). ability to hook into a secondary subsystem while allowing the user to configure that subsystem out without also having to unset these drivers. + Note: If the combination of FOO=y and BAR=m causes a link error, + you can guard the function call with IS_REACHABLE():: + + foo_init() + { + if (IS_REACHABLE(CONFIG_BAZ)) + baz_register(&foo); + ... + } + + Note: If the feature provided by BAZ is highly desirable for FOO, + FOO should imply not only BAZ, but also its dependency BAR:: + + config FOO + tristate "foo" + imply BAR + imply BAZ + - limiting menu display: "visible if" <expr> This attribute is only applicable to menu blocks, if the condition is diff --git a/Documentation/kbuild/kconfig-macro-language.rst b/Documentation/kbuild/kconfig-macro-language.rst index 35b3263b7e40..8b413ef9603d 100644 --- a/Documentation/kbuild/kconfig-macro-language.rst +++ b/Documentation/kbuild/kconfig-macro-language.rst @@ -44,7 +44,7 @@ intermediate:: def_bool y Then, Kconfig moves onto the evaluation stage to resolve inter-symbol -dependency as explained in kconfig-language.txt. +dependency as explained in kconfig-language.rst. Variables diff --git a/Documentation/kbuild/llvm.rst b/Documentation/kbuild/llvm.rst new file mode 100644 index 000000000000..c776b6eee969 --- /dev/null +++ b/Documentation/kbuild/llvm.rst @@ -0,0 +1,87 @@ +============================== +Building Linux with Clang/LLVM +============================== + +This document covers how to build the Linux kernel with Clang and LLVM +utilities. + +About +----- + +The Linux kernel has always traditionally been compiled with GNU toolchains +such as GCC and binutils. Ongoing work has allowed for `Clang +<https://clang.llvm.org/>`_ and `LLVM <https://llvm.org/>`_ utilities to be +used as viable substitutes. Distributions such as `Android +<https://www.android.com/>`_, `ChromeOS +<https://www.chromium.org/chromium-os>`_, and `OpenMandriva +<https://www.openmandriva.org/>`_ use Clang built kernels. `LLVM is a +collection of toolchain components implemented in terms of C++ objects +<https://www.aosabook.org/en/llvm.html>`_. Clang is a front-end to LLVM that +supports C and the GNU C extensions required by the kernel, and is pronounced +"klang," not "see-lang." + +Clang +----- + +The compiler used can be swapped out via `CC=` command line argument to `make`. +`CC=` should be set when selecting a config and during a build. + + make CC=clang defconfig + + make CC=clang + +Cross Compiling +--------------- + +A single Clang compiler binary will typically contain all supported backends, +which can help simplify cross compiling. + + ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang + +`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead +`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For +example: + + clang --target aarch64-linux-gnu foo.c + +LLVM Utilities +-------------- + +LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1` +to enable them. + + make LLVM=1 + +They can be enabled individually. The full list of the parameters: + + make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\ + OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\ + READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\ + HOSTLD=ld.lld + +Currently, the integrated assembler is disabled by default. You can pass +`LLVM_IAS=1` to enable it. + +Getting Help +------------ + +- `Website <https://clangbuiltlinux.github.io/>`_ +- `Mailing List <https://groups.google.com/forum/#!forum/clang-built-linux>`_: <clang-built-linux@googlegroups.com> +- `Issue Tracker <https://github.com/ClangBuiltLinux/linux/issues>`_ +- IRC: #clangbuiltlinux on chat.freenode.net +- `Telegram <https://t.me/ClangBuiltLinux>`_: @ClangBuiltLinux +- `Wiki <https://github.com/ClangBuiltLinux/linux/wiki>`_ +- `Beginner Bugs <https://github.com/ClangBuiltLinux/linux/issues?q=is%3Aopen+is%3Aissue+label%3A%22good+first+issue%22>`_ + +Getting LLVM +------------- + +- http://releases.llvm.org/download.html +- https://github.com/llvm/llvm-project +- https://llvm.org/docs/GettingStarted.html +- https://llvm.org/docs/CMake.html +- https://apt.llvm.org/ +- https://www.archlinux.org/packages/extra/x86_64/llvm/ +- https://github.com/ClangBuiltLinux/tc-build +- https://github.com/ClangBuiltLinux/linux/wiki/Building-Clang-from-source +- https://android.googlesource.com/platform/prebuilts/clang/host/linux-x86/ diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst index 6bc126a14b3d..04d5c01a2e99 100644 --- a/Documentation/kbuild/makefiles.rst +++ b/Documentation/kbuild/makefiles.rst @@ -924,7 +924,7 @@ When kbuild executes, the following steps are followed (roughly): $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that are used for assembler. - From commandline AFLAGS_MODULE shall be used (see kbuild.txt). + From commandline AFLAGS_MODULE shall be used (see kbuild.rst). KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in @@ -937,7 +937,7 @@ When kbuild executes, the following steps are followed (roughly): $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that are used for $(CC). - From commandline CFLAGS_MODULE shall be used (see kbuild.txt). + From commandline CFLAGS_MODULE shall be used (see kbuild.rst). KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules @@ -945,7 +945,7 @@ When kbuild executes, the following steps are followed (roughly): $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options used when linking modules. This is often a linker script. - From commandline LDFLAGS_MODULE shall be used (see kbuild.txt). + From commandline LDFLAGS_MODULE shall be used (see kbuild.rst). KBUILD_LDS diff --git a/Documentation/kbuild/modules.rst b/Documentation/kbuild/modules.rst index 69fa48ee93d6..e0b45a257f21 100644 --- a/Documentation/kbuild/modules.rst +++ b/Documentation/kbuild/modules.rst @@ -470,9 +470,9 @@ build. The syntax of the Module.symvers file is:: - <CRC> <Symbol> <Namespace> <Module> <Export Type> + <CRC> <Symbol> <Module> <Export Type> <Namespace> - 0xe1cc2a05 usb_stor_suspend USB_STORAGE drivers/usb/storage/usb-storage EXPORT_SYMBOL_GPL + 0xe1cc2a05 usb_stor_suspend drivers/usb/storage/usb-storage EXPORT_SYMBOL_GPL USB_STORAGE The fields are separated by tabs and values may be empty (e.g. if no namespace is defined for an exported symbol). diff --git a/Documentation/kernel-hacking/hacking.rst b/Documentation/kernel-hacking/hacking.rst index d62aacb2822a..eed2136d847f 100644 --- a/Documentation/kernel-hacking/hacking.rst +++ b/Documentation/kernel-hacking/hacking.rst @@ -601,7 +601,7 @@ Defined in ``include/linux/export.h`` This is the variant of `EXPORT_SYMBOL()` that allows specifying a symbol namespace. Symbol Namespaces are documented in -``Documentation/core-api/symbol-namespaces.rst``. +:doc:`../core-api/symbol-namespaces` :c:func:`EXPORT_SYMBOL_NS_GPL()` -------------------------------- @@ -610,7 +610,7 @@ Defined in ``include/linux/export.h`` This is the variant of `EXPORT_SYMBOL_GPL()` that allows specifying a symbol namespace. Symbol Namespaces are documented in -``Documentation/core-api/symbol-namespaces.rst``. +:doc:`../core-api/symbol-namespaces` Routines and Conventions ======================== diff --git a/Documentation/kernel-hacking/locking.rst b/Documentation/kernel-hacking/locking.rst index a8518ac0d31d..6ed806e6061b 100644 --- a/Documentation/kernel-hacking/locking.rst +++ b/Documentation/kernel-hacking/locking.rst @@ -150,17 +150,17 @@ Locking Only In User Context If you have a data structure which is only ever accessed from user context, then you can use a simple mutex (``include/linux/mutex.h``) to protect it. This is the most trivial case: you initialize the mutex. -Then you can call :c:func:`mutex_lock_interruptible()` to grab the -mutex, and :c:func:`mutex_unlock()` to release it. There is also a -:c:func:`mutex_lock()`, which should be avoided, because it will +Then you can call mutex_lock_interruptible() to grab the +mutex, and mutex_unlock() to release it. There is also a +mutex_lock(), which should be avoided, because it will not return if a signal is received. Example: ``net/netfilter/nf_sockopt.c`` allows registration of new -:c:func:`setsockopt()` and :c:func:`getsockopt()` calls, with -:c:func:`nf_register_sockopt()`. Registration and de-registration +setsockopt() and getsockopt() calls, with +nf_register_sockopt(). Registration and de-registration are only done on module load and unload (and boot time, where there is no concurrency), and the list of registrations is only consulted for an -unknown :c:func:`setsockopt()` or :c:func:`getsockopt()` system +unknown setsockopt() or getsockopt() system call. The ``nf_sockopt_mutex`` is perfect to protect this, especially since the setsockopt and getsockopt calls may well sleep. @@ -170,19 +170,19 @@ Locking Between User Context and Softirqs If a softirq shares data with user context, you have two problems. Firstly, the current user context can be interrupted by a softirq, and secondly, the critical region could be entered from another CPU. This is -where :c:func:`spin_lock_bh()` (``include/linux/spinlock.h``) is +where spin_lock_bh() (``include/linux/spinlock.h``) is used. It disables softirqs on that CPU, then grabs the lock. -:c:func:`spin_unlock_bh()` does the reverse. (The '_bh' suffix is +spin_unlock_bh() does the reverse. (The '_bh' suffix is a historical reference to "Bottom Halves", the old name for software interrupts. It should really be called spin_lock_softirq()' in a perfect world). -Note that you can also use :c:func:`spin_lock_irq()` or -:c:func:`spin_lock_irqsave()` here, which stop hardware interrupts +Note that you can also use spin_lock_irq() or +spin_lock_irqsave() here, which stop hardware interrupts as well: see `Hard IRQ Context <#hard-irq-context>`__. This works perfectly for UP as well: the spin lock vanishes, and this -macro simply becomes :c:func:`local_bh_disable()` +macro simply becomes local_bh_disable() (``include/linux/interrupt.h``), which protects you from the softirq being run. @@ -216,8 +216,8 @@ Different Tasklets/Timers ~~~~~~~~~~~~~~~~~~~~~~~~~ If another tasklet/timer wants to share data with your tasklet or timer -, you will both need to use :c:func:`spin_lock()` and -:c:func:`spin_unlock()` calls. :c:func:`spin_lock_bh()` is +, you will both need to use spin_lock() and +spin_unlock() calls. spin_lock_bh() is unnecessary here, as you are already in a tasklet, and none will be run on the same CPU. @@ -234,14 +234,14 @@ The same softirq can run on the other CPUs: you can use a per-CPU array going so far as to use a softirq, you probably care about scalable performance enough to justify the extra complexity. -You'll need to use :c:func:`spin_lock()` and -:c:func:`spin_unlock()` for shared data. +You'll need to use spin_lock() and +spin_unlock() for shared data. Different Softirqs ~~~~~~~~~~~~~~~~~~ -You'll need to use :c:func:`spin_lock()` and -:c:func:`spin_unlock()` for shared data, whether it be a timer, +You'll need to use spin_lock() and +spin_unlock() for shared data, whether it be a timer, tasklet, different softirq or the same or another softirq: any of them could be running on a different CPU. @@ -259,38 +259,38 @@ If a hardware irq handler shares data with a softirq, you have two concerns. Firstly, the softirq processing can be interrupted by a hardware interrupt, and secondly, the critical region could be entered by a hardware interrupt on another CPU. This is where -:c:func:`spin_lock_irq()` is used. It is defined to disable +spin_lock_irq() is used. It is defined to disable interrupts on that cpu, then grab the lock. -:c:func:`spin_unlock_irq()` does the reverse. +spin_unlock_irq() does the reverse. -The irq handler does not to use :c:func:`spin_lock_irq()`, because +The irq handler does not need to use spin_lock_irq(), because the softirq cannot run while the irq handler is running: it can use -:c:func:`spin_lock()`, which is slightly faster. The only exception +spin_lock(), which is slightly faster. The only exception would be if a different hardware irq handler uses the same lock: -:c:func:`spin_lock_irq()` will stop that from interrupting us. +spin_lock_irq() will stop that from interrupting us. This works perfectly for UP as well: the spin lock vanishes, and this -macro simply becomes :c:func:`local_irq_disable()` +macro simply becomes local_irq_disable() (``include/asm/smp.h``), which protects you from the softirq/tasklet/BH being run. -:c:func:`spin_lock_irqsave()` (``include/linux/spinlock.h``) is a +spin_lock_irqsave() (``include/linux/spinlock.h``) is a variant which saves whether interrupts were on or off in a flags word, -which is passed to :c:func:`spin_unlock_irqrestore()`. This means +which is passed to spin_unlock_irqrestore(). This means that the same code can be used inside an hard irq handler (where interrupts are already off) and in softirqs (where the irq disabling is required). Note that softirqs (and hence tasklets and timers) are run on return -from hardware interrupts, so :c:func:`spin_lock_irq()` also stops -these. In that sense, :c:func:`spin_lock_irqsave()` is the most +from hardware interrupts, so spin_lock_irq() also stops +these. In that sense, spin_lock_irqsave() is the most general and powerful locking function. Locking Between Two Hard IRQ Handlers ------------------------------------- It is rare to have to share data between two IRQ handlers, but if you -do, :c:func:`spin_lock_irqsave()` should be used: it is +do, spin_lock_irqsave() should be used: it is architecture-specific whether all interrupts are disabled inside irq handlers themselves. @@ -304,11 +304,11 @@ Pete Zaitcev gives the following summary: (``copy_from_user*(`` or ``kmalloc(x,GFP_KERNEL)``). - Otherwise (== data can be touched in an interrupt), use - :c:func:`spin_lock_irqsave()` and - :c:func:`spin_unlock_irqrestore()`. + spin_lock_irqsave() and + spin_unlock_irqrestore(). - Avoid holding spinlock for more than 5 lines of code and across any - function call (except accessors like :c:func:`readb()`). + function call (except accessors like readb()). Table of Minimum Requirements ----------------------------- @@ -320,7 +320,7 @@ particular thread can only run on one CPU at a time, but if it needs shares data with another thread, locking is required). Remember the advice above: you can always use -:c:func:`spin_lock_irqsave()`, which is a superset of all other +spin_lock_irqsave(), which is a superset of all other spinlock primitives. ============== ============= ============= ========= ========= ========= ========= ======= ======= ============== ============== @@ -363,13 +363,13 @@ They can be used if you need no access to the data protected with the lock when some other thread is holding the lock. You should acquire the lock later if you then need access to the data protected with the lock. -:c:func:`spin_trylock()` does not spin but returns non-zero if it +spin_trylock() does not spin but returns non-zero if it acquires the spinlock on the first try or 0 if not. This function can be -used in all contexts like :c:func:`spin_lock()`: you must have +used in all contexts like spin_lock(): you must have disabled the contexts that might interrupt you and acquire the spin lock. -:c:func:`mutex_trylock()` does not suspend your task but returns +mutex_trylock() does not suspend your task but returns non-zero if it could lock the mutex on the first try or 0 if not. This function cannot be safely used in hardware or software interrupt contexts despite not sleeping. @@ -490,14 +490,14 @@ easy, since we copy the data for the user, and never let them access the objects directly. There is a slight (and common) optimization here: in -:c:func:`cache_add()` we set up the fields of the object before +cache_add() we set up the fields of the object before grabbing the lock. This is safe, as no-one else can access it until we put it in cache. Accessing From Interrupt Context -------------------------------- -Now consider the case where :c:func:`cache_find()` can be called +Now consider the case where cache_find() can be called from interrupt context: either a hardware interrupt or a softirq. An example would be a timer which deletes object from the cache. @@ -566,16 +566,16 @@ which are taken away, and the ``+`` are lines which are added. return ret; } -Note that the :c:func:`spin_lock_irqsave()` will turn off +Note that the spin_lock_irqsave() will turn off interrupts if they are on, otherwise does nothing (if we are already in an interrupt handler), hence these functions are safe to call from any context. -Unfortunately, :c:func:`cache_add()` calls :c:func:`kmalloc()` +Unfortunately, cache_add() calls kmalloc() with the ``GFP_KERNEL`` flag, which is only legal in user context. I -have assumed that :c:func:`cache_add()` is still only called in +have assumed that cache_add() is still only called in user context, otherwise this should become a parameter to -:c:func:`cache_add()`. +cache_add(). Exposing Objects Outside This File ---------------------------------- @@ -592,7 +592,7 @@ This makes locking trickier, as it is no longer all in one place. The second problem is the lifetime problem: if another structure keeps a pointer to an object, it presumably expects that pointer to remain valid. Unfortunately, this is only guaranteed while you hold the lock, -otherwise someone might call :c:func:`cache_delete()` and even +otherwise someone might call cache_delete() and even worse, add another object, re-using the same address. As there is only one lock, you can't hold it forever: no-one else would @@ -693,8 +693,8 @@ Here is the code:: We encapsulate the reference counting in the standard 'get' and 'put' functions. Now we can return the object itself from -:c:func:`cache_find()` which has the advantage that the user can -now sleep holding the object (eg. to :c:func:`copy_to_user()` to +cache_find() which has the advantage that the user can +now sleep holding the object (eg. to copy_to_user() to name to userspace). The other point to note is that I said a reference should be held for @@ -710,7 +710,7 @@ number of atomic operations defined in ``include/asm/atomic.h``: these are guaranteed to be seen atomically from all CPUs in the system, so no lock is required. In this case, it is simpler than using spinlocks, although for anything non-trivial using spinlocks is clearer. The -:c:func:`atomic_inc()` and :c:func:`atomic_dec_and_test()` +atomic_inc() and atomic_dec_and_test() are used instead of the standard increment and decrement operators, and the lock is no longer used to protect the reference count itself. @@ -802,7 +802,7 @@ name to change, there are three possibilities: - You can make ``cache_lock`` non-static, and tell people to grab that lock before changing the name in any object. -- You can provide a :c:func:`cache_obj_rename()` which grabs this +- You can provide a cache_obj_rename() which grabs this lock and changes the name for the caller, and tell everyone to use that function. @@ -861,11 +861,11 @@ Note that I decide that the popularity count should be protected by the ``cache_lock`` rather than the per-object lock: this is because it (like the :c:type:`struct list_head <list_head>` inside the object) is logically part of the infrastructure. This way, I don't need to grab -the lock of every object in :c:func:`__cache_add()` when seeking +the lock of every object in __cache_add() when seeking the least popular. I also decided that the id member is unchangeable, so I don't need to -grab each object lock in :c:func:`__cache_find()` to examine the +grab each object lock in __cache_find() to examine the id: the object lock is only used by a caller who wants to read or write the name field. @@ -887,7 +887,7 @@ trivial to diagnose: not a stay-up-five-nights-talk-to-fluffy-code-bunnies kind of problem. For a slightly more complex case, imagine you have a region shared by a -softirq and user context. If you use a :c:func:`spin_lock()` call +softirq and user context. If you use a spin_lock() call to protect it, it is possible that the user context will be interrupted by the softirq while it holds the lock, and the softirq will then spin forever trying to get the same lock. @@ -985,12 +985,12 @@ you might do the following:: Sooner or later, this will crash on SMP, because a timer can have just -gone off before the :c:func:`spin_lock_bh()`, and it will only get -the lock after we :c:func:`spin_unlock_bh()`, and then try to free +gone off before the spin_lock_bh(), and it will only get +the lock after we spin_unlock_bh(), and then try to free the element (which has already been freed!). This can be avoided by checking the result of -:c:func:`del_timer()`: if it returns 1, the timer has been deleted. +del_timer(): if it returns 1, the timer has been deleted. If 0, it means (in this case) that it is currently running, so we can do:: @@ -1012,9 +1012,9 @@ do:: Another common problem is deleting timers which restart themselves (by -calling :c:func:`add_timer()` at the end of their timer function). +calling add_timer() at the end of their timer function). Because this is a fairly common case which is prone to races, you should -use :c:func:`del_timer_sync()` (``include/linux/timer.h``) to +use del_timer_sync() (``include/linux/timer.h``) to handle this case. It returns the number of times the timer had to be deleted before we finally stopped it from adding itself back in. @@ -1086,7 +1086,7 @@ adding ``new`` to a single linked list called ``list``:: list->next = new; -The :c:func:`wmb()` is a write memory barrier. It ensures that the +The wmb() is a write memory barrier. It ensures that the first operation (setting the new element's ``next`` pointer) is complete and will be seen by all CPUs, before the second operation is (putting the new element into the list). This is important, since modern @@ -1097,7 +1097,7 @@ rest of the list. Fortunately, there is a function to do this for standard :c:type:`struct list_head <list_head>` lists: -:c:func:`list_add_rcu()` (``include/linux/list.h``). +list_add_rcu() (``include/linux/list.h``). Removing an element from the list is even simpler: we replace the pointer to the old element with a pointer to its successor, and readers @@ -1108,7 +1108,7 @@ will either see it, or skip over it. list->next = old->next; -There is :c:func:`list_del_rcu()` (``include/linux/list.h``) which +There is list_del_rcu() (``include/linux/list.h``) which does this (the normal version poisons the old object, which we don't want). @@ -1116,9 +1116,9 @@ The reader must also be careful: some CPUs can look through the ``next`` pointer to start reading the contents of the next element early, but don't realize that the pre-fetched contents is wrong when the ``next`` pointer changes underneath them. Once again, there is a -:c:func:`list_for_each_entry_rcu()` (``include/linux/list.h``) +list_for_each_entry_rcu() (``include/linux/list.h``) to help you. Of course, writers can just use -:c:func:`list_for_each_entry()`, since there cannot be two +list_for_each_entry(), since there cannot be two simultaneous writers. Our final dilemma is this: when can we actually destroy the removed @@ -1127,14 +1127,14 @@ the list right now: if we free this element and the ``next`` pointer changes, the reader will jump off into garbage and crash. We need to wait until we know that all the readers who were traversing the list when we deleted the element are finished. We use -:c:func:`call_rcu()` to register a callback which will actually +call_rcu() to register a callback which will actually destroy the object once all pre-existing readers are finished. -Alternatively, :c:func:`synchronize_rcu()` may be used to block +Alternatively, synchronize_rcu() may be used to block until all pre-existing are finished. But how does Read Copy Update know when the readers are finished? The method is this: firstly, the readers always traverse the list inside -:c:func:`rcu_read_lock()`/:c:func:`rcu_read_unlock()` pairs: +rcu_read_lock()/rcu_read_unlock() pairs: these simply disable preemption so the reader won't go to sleep while reading the list. @@ -1223,12 +1223,12 @@ this is the fundamental idea. } Note that the reader will alter the popularity member in -:c:func:`__cache_find()`, and now it doesn't hold a lock. One +__cache_find(), and now it doesn't hold a lock. One solution would be to make it an ``atomic_t``, but for this usage, we don't really care about races: an approximate result is good enough, so I didn't change it. -The result is that :c:func:`cache_find()` requires no +The result is that cache_find() requires no synchronization with any other functions, so is almost as fast on SMP as it would be on UP. @@ -1240,9 +1240,9 @@ and put the reference count. Now, because the 'read lock' in RCU is simply disabling preemption, a caller which always has preemption disabled between calling -:c:func:`cache_find()` and :c:func:`object_put()` does not +cache_find() and object_put() does not need to actually get and put the reference count: we could expose -:c:func:`__cache_find()` by making it non-static, and such +__cache_find() by making it non-static, and such callers could simply call that. The benefit here is that the reference count is not written to: the @@ -1260,11 +1260,11 @@ counter. Nice and simple. If that was too slow (it's usually not, but if you've got a really big machine to test on and can show that it is), you could instead use a counter for each CPU, then none of them need an exclusive lock. See -:c:func:`DEFINE_PER_CPU()`, :c:func:`get_cpu_var()` and -:c:func:`put_cpu_var()` (``include/linux/percpu.h``). +DEFINE_PER_CPU(), get_cpu_var() and +put_cpu_var() (``include/linux/percpu.h``). Of particular use for simple per-cpu counters is the ``local_t`` type, -and the :c:func:`cpu_local_inc()` and related functions, which are +and the cpu_local_inc() and related functions, which are more efficient than simple code on some architectures (``include/asm/local.h``). @@ -1289,10 +1289,10 @@ irq handler doesn't use a lock, and all other accesses are done as so:: enable_irq(irq); spin_unlock(&lock); -The :c:func:`disable_irq()` prevents the irq handler from running +The disable_irq() prevents the irq handler from running (and waits for it to finish if it's currently running on other CPUs). The spinlock prevents any other accesses happening at the same time. -Naturally, this is slower than just a :c:func:`spin_lock_irq()` +Naturally, this is slower than just a spin_lock_irq() call, so it only makes sense if this type of access happens extremely rarely. @@ -1315,22 +1315,22 @@ from user context, and can sleep. - Accesses to userspace: - - :c:func:`copy_from_user()` + - copy_from_user() - - :c:func:`copy_to_user()` + - copy_to_user() - - :c:func:`get_user()` + - get_user() - - :c:func:`put_user()` + - put_user() -- :c:func:`kmalloc(GFP_KERNEL) <kmalloc>` +- kmalloc(GP_KERNEL) <kmalloc>` -- :c:func:`mutex_lock_interruptible()` and - :c:func:`mutex_lock()` +- mutex_lock_interruptible() and + mutex_lock() - There is a :c:func:`mutex_trylock()` which does not sleep. + There is a mutex_trylock() which does not sleep. Still, it must not be used inside interrupt context since its - implementation is not safe for that. :c:func:`mutex_unlock()` + implementation is not safe for that. mutex_unlock() will also never sleep. It cannot be used in interrupt context either since a mutex must be released by the same task that acquired it. @@ -1340,11 +1340,11 @@ Some Functions Which Don't Sleep Some functions are safe to call from any context, or holding almost any lock. -- :c:func:`printk()` +- printk() -- :c:func:`kfree()` +- kfree() -- :c:func:`add_timer()` and :c:func:`del_timer()` +- add_timer() and del_timer() Mutex API reference =================== @@ -1400,26 +1400,26 @@ preemption bh Bottom Half: for historical reasons, functions with '_bh' in them often - now refer to any software interrupt, e.g. :c:func:`spin_lock_bh()` + now refer to any software interrupt, e.g. spin_lock_bh() blocks any software interrupt on the current CPU. Bottom halves are deprecated, and will eventually be replaced by tasklets. Only one bottom half will be running at any time. Hardware Interrupt / Hardware IRQ - Hardware interrupt request. :c:func:`in_irq()` returns true in a + Hardware interrupt request. in_irq() returns true in a hardware interrupt handler. Interrupt Context Not user context: processing a hardware irq or software irq. Indicated - by the :c:func:`in_interrupt()` macro returning true. + by the in_interrupt() macro returning true. SMP Symmetric Multi-Processor: kernels compiled for multiple-CPU machines. (``CONFIG_SMP=y``). Software Interrupt / softirq - Software interrupt handler. :c:func:`in_irq()` returns false; - :c:func:`in_softirq()` returns true. Tasklets and softirqs both + Software interrupt handler. in_irq() returns false; + in_softirq() returns true. Tasklets and softirqs both fall into the category of 'software interrupts'. Strictly speaking a softirq is one of up to 32 enumerated software diff --git a/Documentation/kref.txt b/Documentation/kref.txt index 3af384156d7e..c61eea6f1bf2 100644 --- a/Documentation/kref.txt +++ b/Documentation/kref.txt @@ -128,6 +128,10 @@ since we already have a valid pointer that we own a refcount for. The put needs no lock because nothing tries to get the data without already holding a pointer. +In the above example, kref_put() will be called 2 times in both success +and error paths. This is necessary because the reference count got +incremented 2 times by kref_init() and kref_get(). + Note that the "before" in rule 1 is very important. You should never do something like:: diff --git a/Documentation/locking/index.rst b/Documentation/locking/index.rst index 626a463f7e42..5d6800a723dc 100644 --- a/Documentation/locking/index.rst +++ b/Documentation/locking/index.rst @@ -7,6 +7,7 @@ locking .. toctree:: :maxdepth: 1 + locktypes lockdep-design lockstat locktorture diff --git a/Documentation/locking/locktypes.rst b/Documentation/locking/locktypes.rst new file mode 100644 index 000000000000..09f45ce38d26 --- /dev/null +++ b/Documentation/locking/locktypes.rst @@ -0,0 +1,347 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _kernel_hacking_locktypes: + +========================== +Lock types and their rules +========================== + +Introduction +============ + +The kernel provides a variety of locking primitives which can be divided +into two categories: + + - Sleeping locks + - Spinning locks + +This document conceptually describes these lock types and provides rules +for their nesting, including the rules for use under PREEMPT_RT. + + +Lock categories +=============== + +Sleeping locks +-------------- + +Sleeping locks can only be acquired in preemptible task context. + +Although implementations allow try_lock() from other contexts, it is +necessary to carefully evaluate the safety of unlock() as well as of +try_lock(). Furthermore, it is also necessary to evaluate the debugging +versions of these primitives. In short, don't acquire sleeping locks from +other contexts unless there is no other option. + +Sleeping lock types: + + - mutex + - rt_mutex + - semaphore + - rw_semaphore + - ww_mutex + - percpu_rw_semaphore + +On PREEMPT_RT kernels, these lock types are converted to sleeping locks: + + - spinlock_t + - rwlock_t + +Spinning locks +-------------- + + - raw_spinlock_t + - bit spinlocks + +On non-PREEMPT_RT kernels, these lock types are also spinning locks: + + - spinlock_t + - rwlock_t + +Spinning locks implicitly disable preemption and the lock / unlock functions +can have suffixes which apply further protections: + + =================== ==================================================== + _bh() Disable / enable bottom halves (soft interrupts) + _irq() Disable / enable interrupts + _irqsave/restore() Save and disable / restore interrupt disabled state + =================== ==================================================== + +Owner semantics +=============== + +The aforementioned lock types except semaphores have strict owner +semantics: + + The context (task) that acquired the lock must release it. + +rw_semaphores have a special interface which allows non-owner release for +readers. + + +rtmutex +======= + +RT-mutexes are mutexes with support for priority inheritance (PI). + +PI has limitations on non-PREEMPT_RT kernels due to preemption and +interrupt disabled sections. + +PI clearly cannot preempt preemption-disabled or interrupt-disabled +regions of code, even on PREEMPT_RT kernels. Instead, PREEMPT_RT kernels +execute most such regions of code in preemptible task context, especially +interrupt handlers and soft interrupts. This conversion allows spinlock_t +and rwlock_t to be implemented via RT-mutexes. + + +semaphore +========= + +semaphore is a counting semaphore implementation. + +Semaphores are often used for both serialization and waiting, but new use +cases should instead use separate serialization and wait mechanisms, such +as mutexes and completions. + +semaphores and PREEMPT_RT +---------------------------- + +PREEMPT_RT does not change the semaphore implementation because counting +semaphores have no concept of owners, thus preventing PREEMPT_RT from +providing priority inheritance for semaphores. After all, an unknown +owner cannot be boosted. As a consequence, blocking on semaphores can +result in priority inversion. + + +rw_semaphore +============ + +rw_semaphore is a multiple readers and single writer lock mechanism. + +On non-PREEMPT_RT kernels the implementation is fair, thus preventing +writer starvation. + +rw_semaphore complies by default with the strict owner semantics, but there +exist special-purpose interfaces that allow non-owner release for readers. +These interfaces work independent of the kernel configuration. + +rw_semaphore and PREEMPT_RT +--------------------------- + +PREEMPT_RT kernels map rw_semaphore to a separate rt_mutex-based +implementation, thus changing the fairness: + + Because an rw_semaphore writer cannot grant its priority to multiple + readers, a preempted low-priority reader will continue holding its lock, + thus starving even high-priority writers. In contrast, because readers + can grant their priority to a writer, a preempted low-priority writer will + have its priority boosted until it releases the lock, thus preventing that + writer from starving readers. + + +raw_spinlock_t and spinlock_t +============================= + +raw_spinlock_t +-------------- + +raw_spinlock_t is a strict spinning lock implementation regardless of the +kernel configuration including PREEMPT_RT enabled kernels. + +raw_spinlock_t is a strict spinning lock implementation in all kernels, +including PREEMPT_RT kernels. Use raw_spinlock_t only in real critical +core code, low-level interrupt handling and places where disabling +preemption or interrupts is required, for example, to safely access +hardware state. raw_spinlock_t can sometimes also be used when the +critical section is tiny, thus avoiding RT-mutex overhead. + +spinlock_t +---------- + +The semantics of spinlock_t change with the state of PREEMPT_RT. + +On a non-PREEMPT_RT kernel spinlock_t is mapped to raw_spinlock_t and has +exactly the same semantics. + +spinlock_t and PREEMPT_RT +------------------------- + +On a PREEMPT_RT kernel spinlock_t is mapped to a separate implementation +based on rt_mutex which changes the semantics: + + - Preemption is not disabled. + + - The hard interrupt related suffixes for spin_lock / spin_unlock + operations (_irq, _irqsave / _irqrestore) do not affect the CPU's + interrupt disabled state. + + - The soft interrupt related suffix (_bh()) still disables softirq + handlers. + + Non-PREEMPT_RT kernels disable preemption to get this effect. + + PREEMPT_RT kernels use a per-CPU lock for serialization which keeps + preemption disabled. The lock disables softirq handlers and also + prevents reentrancy due to task preemption. + +PREEMPT_RT kernels preserve all other spinlock_t semantics: + + - Tasks holding a spinlock_t do not migrate. Non-PREEMPT_RT kernels + avoid migration by disabling preemption. PREEMPT_RT kernels instead + disable migration, which ensures that pointers to per-CPU variables + remain valid even if the task is preempted. + + - Task state is preserved across spinlock acquisition, ensuring that the + task-state rules apply to all kernel configurations. Non-PREEMPT_RT + kernels leave task state untouched. However, PREEMPT_RT must change + task state if the task blocks during acquisition. Therefore, it saves + the current task state before blocking and the corresponding lock wakeup + restores it, as shown below:: + + task->state = TASK_INTERRUPTIBLE + lock() + block() + task->saved_state = task->state + task->state = TASK_UNINTERRUPTIBLE + schedule() + lock wakeup + task->state = task->saved_state + + Other types of wakeups would normally unconditionally set the task state + to RUNNING, but that does not work here because the task must remain + blocked until the lock becomes available. Therefore, when a non-lock + wakeup attempts to awaken a task blocked waiting for a spinlock, it + instead sets the saved state to RUNNING. Then, when the lock + acquisition completes, the lock wakeup sets the task state to the saved + state, in this case setting it to RUNNING:: + + task->state = TASK_INTERRUPTIBLE + lock() + block() + task->saved_state = task->state + task->state = TASK_UNINTERRUPTIBLE + schedule() + non lock wakeup + task->saved_state = TASK_RUNNING + + lock wakeup + task->state = task->saved_state + + This ensures that the real wakeup cannot be lost. + + +rwlock_t +======== + +rwlock_t is a multiple readers and single writer lock mechanism. + +Non-PREEMPT_RT kernels implement rwlock_t as a spinning lock and the +suffix rules of spinlock_t apply accordingly. The implementation is fair, +thus preventing writer starvation. + +rwlock_t and PREEMPT_RT +----------------------- + +PREEMPT_RT kernels map rwlock_t to a separate rt_mutex-based +implementation, thus changing semantics: + + - All the spinlock_t changes also apply to rwlock_t. + + - Because an rwlock_t writer cannot grant its priority to multiple + readers, a preempted low-priority reader will continue holding its lock, + thus starving even high-priority writers. In contrast, because readers + can grant their priority to a writer, a preempted low-priority writer + will have its priority boosted until it releases the lock, thus + preventing that writer from starving readers. + + +PREEMPT_RT caveats +================== + +spinlock_t and rwlock_t +----------------------- + +These changes in spinlock_t and rwlock_t semantics on PREEMPT_RT kernels +have a few implications. For example, on a non-PREEMPT_RT kernel the +following code sequence works as expected:: + + local_irq_disable(); + spin_lock(&lock); + +and is fully equivalent to:: + + spin_lock_irq(&lock); + +Same applies to rwlock_t and the _irqsave() suffix variants. + +On PREEMPT_RT kernel this code sequence breaks because RT-mutex requires a +fully preemptible context. Instead, use spin_lock_irq() or +spin_lock_irqsave() and their unlock counterparts. In cases where the +interrupt disabling and locking must remain separate, PREEMPT_RT offers a +local_lock mechanism. Acquiring the local_lock pins the task to a CPU, +allowing things like per-CPU interrupt disabled locks to be acquired. +However, this approach should be used only where absolutely necessary. + + +raw_spinlock_t +-------------- + +Acquiring a raw_spinlock_t disables preemption and possibly also +interrupts, so the critical section must avoid acquiring a regular +spinlock_t or rwlock_t, for example, the critical section must avoid +allocating memory. Thus, on a non-PREEMPT_RT kernel the following code +works perfectly:: + + raw_spin_lock(&lock); + p = kmalloc(sizeof(*p), GFP_ATOMIC); + +But this code fails on PREEMPT_RT kernels because the memory allocator is +fully preemptible and therefore cannot be invoked from truly atomic +contexts. However, it is perfectly fine to invoke the memory allocator +while holding normal non-raw spinlocks because they do not disable +preemption on PREEMPT_RT kernels:: + + spin_lock(&lock); + p = kmalloc(sizeof(*p), GFP_ATOMIC); + + +bit spinlocks +------------- + +PREEMPT_RT cannot substitute bit spinlocks because a single bit is too +small to accommodate an RT-mutex. Therefore, the semantics of bit +spinlocks are preserved on PREEMPT_RT kernels, so that the raw_spinlock_t +caveats also apply to bit spinlocks. + +Some bit spinlocks are replaced with regular spinlock_t for PREEMPT_RT +using conditional (#ifdef'ed) code changes at the usage site. In contrast, +usage-site changes are not needed for the spinlock_t substitution. +Instead, conditionals in header files and the core locking implemementation +enable the compiler to do the substitution transparently. + + +Lock type nesting rules +======================= + +The most basic rules are: + + - Lock types of the same lock category (sleeping, spinning) can nest + arbitrarily as long as they respect the general lock ordering rules to + prevent deadlocks. + + - Sleeping lock types cannot nest inside spinning lock types. + + - Spinning lock types can nest inside sleeping lock types. + +These constraints apply both in PREEMPT_RT and otherwise. + +The fact that PREEMPT_RT changes the lock category of spinlock_t and +rwlock_t from spinning to sleeping means that they cannot be acquired while +holding a raw spinlock. This results in the following nesting ordering: + + 1) Sleeping locks + 2) spinlock_t and rwlock_t + 3) raw_spinlock_t and bit spinlocks + +Lockdep will complain if these constraints are violated, both in +PREEMPT_RT and otherwise. diff --git a/Documentation/media/kapi/csi2.rst b/Documentation/media/kapi/csi2.rst index 030a5c41ec75..e111ff7bfd3d 100644 --- a/Documentation/media/kapi/csi2.rst +++ b/Documentation/media/kapi/csi2.rst @@ -74,7 +74,7 @@ Before the receiver driver may enable the CSI-2 transmitter by using the :c:type:`v4l2_subdev_video_ops`->s_stream(), it must have powered the transmitter up by using the :c:type:`v4l2_subdev_core_ops`->s_power() callback. This may take -place either indirectly by using :c:func:`v4l2_pipeline_pm_use` or +place either indirectly by using :c:func:`v4l2_pipeline_pm_get` or directly. Formats diff --git a/Documentation/media/kapi/v4l2-controls.rst b/Documentation/media/kapi/v4l2-controls.rst index b20800cae3f2..5129019afb49 100644 --- a/Documentation/media/kapi/v4l2-controls.rst +++ b/Documentation/media/kapi/v4l2-controls.rst @@ -291,8 +291,8 @@ and QUERYMENU. And G/S_CTRL as well as G/TRY/S_EXT_CTRLS are automatically suppo In practice the basic usage as described above is sufficient for most drivers. -Inheriting Controls -------------------- +Inheriting Sub-device Controls +------------------------------ When a sub-device is registered with a V4L2 driver by calling v4l2_device_register_subdev() and the ctrl_handler fields of both v4l2_subdev @@ -757,8 +757,8 @@ attempting to find another control from the same handler will deadlock. It is recommended not to use this function from inside the control ops. -Inheriting Controls -------------------- +Preventing Controls inheritance +------------------------------- When one control handler is added to another using v4l2_ctrl_add_handler, then by default all controls from one are merged to the other. But a subdev might diff --git a/Documentation/media/kapi/v4l2-dev.rst b/Documentation/media/kapi/v4l2-dev.rst index 4c5a15c53dbf..63c064837c00 100644 --- a/Documentation/media/kapi/v4l2-dev.rst +++ b/Documentation/media/kapi/v4l2-dev.rst @@ -185,7 +185,7 @@ This will create the character device for you. .. code-block:: c - err = video_register_device(vdev, VFL_TYPE_GRABBER, -1); + err = video_register_device(vdev, VFL_TYPE_VIDEO, -1); if (err) { video_device_release(vdev); /* or kfree(my_vdev); */ return err; @@ -201,7 +201,7 @@ types exist: ========================== ==================== ============================== :c:type:`vfl_devnode_type` Device name Usage ========================== ==================== ============================== -``VFL_TYPE_GRABBER`` ``/dev/videoX`` for video input/output devices +``VFL_TYPE_VIDEO`` ``/dev/videoX`` for video input/output devices ``VFL_TYPE_VBI`` ``/dev/vbiX`` for vertical blank data (i.e. closed captions, teletext) ``VFL_TYPE_RADIO`` ``/dev/radioX`` for radio tuners diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst index a21659d55c6b..6818ddf1495c 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst +++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst @@ -44,18 +44,18 @@ is only available if the ``CEC_CAP_CONNECTOR_INFO`` capability is set. .. flat-table:: struct cec_connector_info :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 8 + :widths: 1 1 8 * - __u32 - ``type`` - The type of connector this adapter is associated with. - * - union + * - union { - ``(anonymous)`` - - - * - - - ``struct cec_drm_connector_info`` + * - ``struct cec_drm_connector_info`` - drm - :ref:`cec-drm-connector-info` + * - } + - .. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}| diff --git a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst index 5e21b1fbfc01..d16b226b1bef 100644 --- a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst +++ b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst @@ -109,35 +109,33 @@ it is guaranteed that the state did change in between the two events. .. flat-table:: struct cec_event :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 8 + :widths: 1 1 8 * - __u64 - ``ts`` - - :cspan:`1`\ Timestamp of the event in ns. + - Timestamp of the event in ns. The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access the same clock from userspace use :c:func:`clock_gettime`. * - __u32 - ``event`` - - :cspan:`1` The CEC event type, see :ref:`cec-events`. + - The CEC event type, see :ref:`cec-events`. * - __u32 - ``flags`` - - :cspan:`1` Event flags, see :ref:`cec-event-flags`. - * - union + - Event flags, see :ref:`cec-event-flags`. + * - union { - (anonymous) - - - - - * - - - struct cec_event_state_change + * - struct cec_event_state_change - ``state_change`` - The new adapter state as sent by the :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` event. - * - - - struct cec_event_lost_msgs + * - struct cec_event_lost_msgs - ``lost_msgs`` - The number of lost messages as sent by the :ref:`CEC_EVENT_LOST_MSGS <CEC-EVENT-LOST-MSGS>` event. + * - } + - .. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| diff --git a/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst b/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst index 6218d9cbdd83..33e2b110145c 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst +++ b/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst @@ -64,12 +64,11 @@ id's until they get an error. .. flat-table:: struct media_entity_desc :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 1 8 + :widths: 2 2 1 8 * - __u32 - ``id`` - - - - Entity ID, set by the application. When the ID is or'ed with ``MEDIA_ENT_ID_FLAG_NEXT``, the driver clears the flag and returns the first entity with a larger ID. Do not expect that the ID will @@ -79,79 +78,70 @@ id's until they get an error. * - char - ``name``\ [32] - - - - Entity name as an UTF-8 NULL-terminated string. This name must be unique within the media topology. * - __u32 - ``type`` - - - - Entity type, see :ref:`media-entity-functions` for details. * - __u32 - ``revision`` - - - - Entity revision. Always zero (obsolete) * - __u32 - ``flags`` - - - - Entity flags, see :ref:`media-entity-flag` for details. * - __u32 - ``group_id`` - - - - Entity group ID. Always zero (obsolete) * - __u16 - ``pads`` - - - - Number of pads * - __u16 - ``links`` - - - - Total number of outbound links. Inbound links are not counted in this field. * - __u32 - ``reserved[4]`` - - - - Reserved for future extensions. Drivers and applications must set the array to zero. - * - union + * - union { + - (anonymous) - * - - - struct + * - struct - ``dev`` - - Valid for (sub-)devices that create a single device node. * - - - - __u32 - ``major`` - Device node major number. * - - - - __u32 - ``minor`` - Device node minor number. - * - - - __u8 + * - __u8 - ``raw``\ [184] - - + * - } + - Return Value diff --git a/Documentation/media/uapi/v4l/buffer.rst b/Documentation/media/uapi/v4l/buffer.rst index 9149b57728e5..3112300c2fa0 100644 --- a/Documentation/media/uapi/v4l/buffer.rst +++ b/Documentation/media/uapi/v4l/buffer.rst @@ -172,11 +172,10 @@ struct v4l2_buffer .. flat-table:: struct v4l2_buffer :header-rows: 0 :stub-columns: 0 - :widths: 1 2 1 10 + :widths: 1 2 10 * - __u32 - ``index`` - - - Number of the buffer, set by the application except when calling :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>`, then it is set by the driver. This field can range from zero to the number of buffers @@ -186,14 +185,12 @@ struct v4l2_buffer :ref:`VIDIOC_CREATE_BUFS` minus one. * - __u32 - ``type`` - - - Type of the buffer, same as struct :c:type:`v4l2_format` ``type`` or struct :c:type:`v4l2_requestbuffers` ``type``, set by the application. See :c:type:`v4l2_buf_type` * - __u32 - ``bytesused`` - - - The number of bytes occupied by the data in the buffer. It depends on the negotiated data format and may change with each buffer for compressed variable size data like JPEG images. Drivers must set @@ -205,18 +202,15 @@ struct v4l2_buffer ``planes`` pointer is used instead. * - __u32 - ``flags`` - - - Flags set by the application or driver, see :ref:`buffer-flags`. * - __u32 - ``field`` - - - Indicates the field order of the image in the buffer, see :c:type:`v4l2_field`. This field is not used when the buffer contains VBI data. Drivers must set it when ``type`` refers to a capture stream, applications when it refers to an output stream. * - struct timeval - ``timestamp`` - - - For capture streams this is time when the first data byte was captured, as returned by the :c:func:`clock_gettime()` function for the relevant clock id; see ``V4L2_BUF_FLAG_TIMESTAMP_*`` in @@ -229,7 +223,6 @@ struct v4l2_buffer stream. * - struct :c:type:`v4l2_timecode` - ``timecode`` - - - When the ``V4L2_BUF_FLAG_TIMECODE`` flag is set in ``flags``, this structure contains a frame timecode. In :c:type:`V4L2_FIELD_ALTERNATE <v4l2_field>` mode the top and @@ -239,10 +232,9 @@ struct v4l2_buffer independent of the ``timestamp`` and ``sequence`` fields. * - __u32 - ``sequence`` - - - Set by the driver, counting the frames (not fields!) in sequence. This field is set for both input and output devices. - * - :cspan:`3` + * - :cspan:`2` In :c:type:`V4L2_FIELD_ALTERNATE <v4l2_field>` mode the top and bottom field have the same sequence number. The count starts at @@ -262,13 +254,11 @@ struct v4l2_buffer * - __u32 - ``memory`` - - - This field must be set by applications and/or drivers in accordance with the selected I/O method. See :c:type:`v4l2_memory` - * - union + * - union { - ``m`` - * - - - __u32 + * - __u32 - ``offset`` - For the single-planar API and when ``memory`` is ``V4L2_MEMORY_MMAP`` this is the offset of the buffer from the @@ -276,29 +266,27 @@ struct v4l2_buffer and apart of serving as parameter to the :ref:`mmap() <func-mmap>` function not useful for applications. See :ref:`mmap` for details - * - - - unsigned long + * - unsigned long - ``userptr`` - For the single-planar API and when ``memory`` is ``V4L2_MEMORY_USERPTR`` this is a pointer to the buffer (casted to unsigned long type) in virtual memory, set by the application. See :ref:`userp` for details. - * - - - struct v4l2_plane + * - struct v4l2_plane - ``*planes`` - When using the multi-planar API, contains a userspace pointer to an array of struct :c:type:`v4l2_plane`. The size of the array should be put in the ``length`` field of this struct :c:type:`v4l2_buffer` structure. - * - - - int + * - int - ``fd`` - For the single-plane API and when ``memory`` is ``V4L2_MEMORY_DMABUF`` this is the file descriptor associated with a DMABUF buffer. + * - } + - * - __u32 - ``length`` - - - Size of the buffer (not the payload) in bytes for the single-planar API. This is set by the driver based on the calls to :ref:`VIDIOC_REQBUFS` and/or @@ -308,12 +296,10 @@ struct v4l2_buffer actual number of valid elements in that array. * - __u32 - ``reserved2`` - - - A place holder for future extensions. Drivers and applications must set this to 0. * - __u32 - ``request_fd`` - - - The file descriptor of the request to queue the buffer to. If the flag ``V4L2_BUF_FLAG_REQUEST_FD`` is set, then the buffer will be queued to this request. If the flag is not set, then this field will @@ -344,11 +330,10 @@ struct v4l2_plane .. flat-table:: :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u32 - ``bytesused`` - - - The number of bytes occupied by data in the plane (its payload). Drivers must set this field when ``type`` refers to a capture stream, applications when it refers to an output stream. If the @@ -362,40 +347,35 @@ struct v4l2_plane which may not be 0. * - __u32 - ``length`` - - - Size in bytes of the plane (not its payload). This is set by the driver based on the calls to :ref:`VIDIOC_REQBUFS` and/or :ref:`VIDIOC_CREATE_BUFS`. - * - union + * - union { - ``m`` - - - - - * - - - __u32 + * - __u32 - ``mem_offset`` - When the memory type in the containing struct :c:type:`v4l2_buffer` is ``V4L2_MEMORY_MMAP``, this is the value that should be passed to :ref:`mmap() <func-mmap>`, similar to the ``offset`` field in struct :c:type:`v4l2_buffer`. - * - - - unsigned long + * - unsigned long - ``userptr`` - When the memory type in the containing struct :c:type:`v4l2_buffer` is ``V4L2_MEMORY_USERPTR``, this is a userspace pointer to the memory allocated for this plane by an application. - * - - - int + * - int - ``fd`` - When the memory type in the containing struct :c:type:`v4l2_buffer` is ``V4L2_MEMORY_DMABUF``, this is a file descriptor associated with a DMABUF buffer, similar to the ``fd`` field in struct :c:type:`v4l2_buffer`. + * - } + - * - __u32 - ``data_offset`` - - - Offset in bytes to video data in the plane. Drivers must set this field when ``type`` refers to a capture stream, applications when it refers to an output stream. @@ -407,7 +387,6 @@ struct v4l2_plane at offset ``data_offset`` from the start of the plane. * - __u32 - ``reserved[11]`` - - - Reserved for future use. Should be zeroed by drivers and applications. diff --git a/Documentation/media/uapi/v4l/dev-sliced-vbi.rst b/Documentation/media/uapi/v4l/dev-sliced-vbi.rst index e86346f66017..7b2d38dd402a 100644 --- a/Documentation/media/uapi/v4l/dev-sliced-vbi.rst +++ b/Documentation/media/uapi/v4l/dev-sliced-vbi.rst @@ -478,33 +478,30 @@ struct v4l2_mpeg_vbi_fmt_ivtv .. flat-table:: :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u8 - ``magic``\ [4] - - - A "magic" constant from :ref:`v4l2-mpeg-vbi-fmt-ivtv-magic` that indicates this is a valid sliced VBI data payload and also indicates which member of the anonymous union, ``itv0`` or ``ITV0``, to use for the payload data. - * - union + * - union { - (anonymous) - * - - - struct :c:type:`v4l2_mpeg_vbi_itv0` + * - struct :c:type:`v4l2_mpeg_vbi_itv0` - ``itv0`` - The primary form of the sliced VBI data payload that contains anywhere from 1 to 35 lines of sliced VBI data. Line masks are provided in this form of the payload indicating which VBI lines are provided. - * - - - struct :ref:`v4l2_mpeg_vbi_ITV0 <v4l2-mpeg-vbi-itv0-1>` + * - struct :ref:`v4l2_mpeg_vbi_ITV0 <v4l2-mpeg-vbi-itv0-1>` - ``ITV0`` - An alternate form of the sliced VBI data payload used when 36 lines of sliced VBI data are present. No line masks are provided in this form of the payload; all valid line mask bits are implcitly set. - - + * - } + - .. _v4l2-mpeg-vbi-fmt-ivtv-magic: diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst index 28313c0f4e7c..d4fc5f25aa14 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst +++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst @@ -2028,6 +2028,22 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - * - ``V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM`` - 0x00000004 - The DPB entry is a long term reference frame + * - ``V4L2_H264_DPB_ENTRY_FLAG_FIELD`` + - 0x00000008 + - The DPB entry is a field reference, which means only one of the field + will be used when decoding the new frame/field. When not set the DPB + entry is a frame reference (both fields will be used). Note that this + flag does not say anything about the number of fields contained in the + reference frame, it just describes the one used to decode the new + field/frame + * - ``V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD`` + - 0x00000010 + - The DPB entry is a bottom field reference (only the bottom field of the + reference frame is needed to decode the new frame/field). Only valid if + V4L2_H264_DPB_ENTRY_FLAG_FIELD is set. When + V4L2_H264_DPB_ENTRY_FLAG_FIELD is set but + V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD is not, that means the + DPB entry is a top field reference ``V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (enum)`` Specifies the decoding mode to use. Currently exposes slice-based and diff --git a/Documentation/media/uapi/v4l/pixfmt-bayer.rst b/Documentation/media/uapi/v4l/pixfmt-bayer.rst index cfa2f4e3e114..807ab34ba93b 100644 --- a/Documentation/media/uapi/v4l/pixfmt-bayer.rst +++ b/Documentation/media/uapi/v4l/pixfmt-bayer.rst @@ -34,5 +34,6 @@ orders. See also `the Wikipedia article on Bayer filter pixfmt-srggb10-ipu3 pixfmt-srggb12 pixfmt-srggb12p + pixfmt-srggb14 pixfmt-srggb14p pixfmt-srggb16 diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb14.rst b/Documentation/media/uapi/v4l/pixfmt-srggb14.rst new file mode 100644 index 000000000000..3420d4d1825e --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-srggb14.rst @@ -0,0 +1,82 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _V4L2-PIX-FMT-SRGGB14: +.. _v4l2-pix-fmt-sbggr14: +.. _v4l2-pix-fmt-sgbrg14: +.. _v4l2-pix-fmt-sgrbg14: + + +*************************************************************************************************************************** +V4L2_PIX_FMT_SRGGB14 ('RG14'), V4L2_PIX_FMT_SGRBG14 ('GR14'), V4L2_PIX_FMT_SGBRG14 ('GB14'), V4L2_PIX_FMT_SBGGR14 ('BG14'), +*************************************************************************************************************************** + + +14-bit Bayer formats expanded to 16 bits + + +Description +=========== + +These four pixel formats are raw sRGB / Bayer formats with 14 bits per +colour. Each sample is stored in a 16-bit word, with two unused high +bits filled with zeros. Each n-pixel row contains n/2 green samples +and n/2 blue or red samples, with alternating red and blue rows. Bytes +are stored in memory in little endian order. They are conventionally +described as GRGR... BGBG..., RGRG... GBGB..., etc. Below is an +example of a small V4L2_PIX_FMT_SBGGR14 image: + +**Byte Order.** +Each cell is one byte, the two most significant bits in the high bytes are +zero. + + + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 2 1 1 1 1 1 1 1 1 + + + * - start + 0: + - B\ :sub:`00low` + - B\ :sub:`00high` + - G\ :sub:`01low` + - G\ :sub:`01high` + - B\ :sub:`02low` + - B\ :sub:`02high` + - G\ :sub:`03low` + - G\ :sub:`03high` + * - start + 8: + - G\ :sub:`10low` + - G\ :sub:`10high` + - R\ :sub:`11low` + - R\ :sub:`11high` + - G\ :sub:`12low` + - G\ :sub:`12high` + - R\ :sub:`13low` + - R\ :sub:`13high` + * - start + 16: + - B\ :sub:`20low` + - B\ :sub:`20high` + - G\ :sub:`21low` + - G\ :sub:`21high` + - B\ :sub:`22low` + - B\ :sub:`22high` + - G\ :sub:`23low` + - G\ :sub:`23high` + * - start + 24: + - G\ :sub:`30low` + - G\ :sub:`30high` + - R\ :sub:`31low` + - R\ :sub:`31high` + - G\ :sub:`32low` + - G\ :sub:`32high` + - R\ :sub:`33low` + - R\ :sub:`33high` diff --git a/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst b/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst index db43dda5aafb..054275c0dfc1 100644 --- a/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst +++ b/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst @@ -100,7 +100,8 @@ describing all planes of that format. * - __u8 - ``flags`` - Flags set by the application or driver, see :ref:`format-flags`. - * - :cspan:`2` union { (anonymous) + * - union { + - (anonymous) * - __u8 - ``ycbcr_enc`` - Y'CbCr encoding, from enum :c:type:`v4l2_ycbcr_encoding`. @@ -113,7 +114,8 @@ describing all planes of that format. This information supplements the ``colorspace`` and must be set by the driver for capture streams and by the application for output streams, see :ref:`colorspaces`. - * - :cspan:`2` } + * - } + - * - __u8 - ``quantization`` - Quantization range, from enum :c:type:`v4l2_quantization`. diff --git a/Documentation/media/uapi/v4l/pixfmt-v4l2.rst b/Documentation/media/uapi/v4l/pixfmt-v4l2.rst index a8321c348bf8..a993b861bf75 100644 --- a/Documentation/media/uapi/v4l/pixfmt-v4l2.rst +++ b/Documentation/media/uapi/v4l/pixfmt-v4l2.rst @@ -143,7 +143,6 @@ Single-planar format structure - Flags set by the application or driver, see :ref:`format-flags`. * - union { - (anonymous) - - * - __u32 - ``ycbcr_enc`` - Y'CbCr encoding, from enum :c:type:`v4l2_ycbcr_encoding`. @@ -158,7 +157,6 @@ Single-planar format structure streams, see :ref:`colorspaces`. * - } - - - * - __u32 - ``quantization`` - Quantization range, from enum :c:type:`v4l2_quantization`. diff --git a/Documentation/media/uapi/v4l/pixfmt-y14.rst b/Documentation/media/uapi/v4l/pixfmt-y14.rst new file mode 100644 index 000000000000..5c260f8da088 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-y14.rst @@ -0,0 +1,72 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _V4L2-PIX-FMT-Y14: + +************************* +V4L2_PIX_FMT_Y14 ('Y14 ') +************************* + + +Grey-scale image + + +Description +=========== + +This is a grey-scale image with a depth of 14 bits per pixel. Pixels are +stored in 16-bit words with unused high bits padded with 0. The least +significant byte is stored at lower memory addresses (little-endian). + +**Byte Order.** +Each cell is one byte. + + + + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + + * - start + 0: + - Y'\ :sub:`00low` + - Y'\ :sub:`00high` + - Y'\ :sub:`01low` + - Y'\ :sub:`01high` + - Y'\ :sub:`02low` + - Y'\ :sub:`02high` + - Y'\ :sub:`03low` + - Y'\ :sub:`03high` + * - start + 8: + - Y'\ :sub:`10low` + - Y'\ :sub:`10high` + - Y'\ :sub:`11low` + - Y'\ :sub:`11high` + - Y'\ :sub:`12low` + - Y'\ :sub:`12high` + - Y'\ :sub:`13low` + - Y'\ :sub:`13high` + * - start + 16: + - Y'\ :sub:`20low` + - Y'\ :sub:`20high` + - Y'\ :sub:`21low` + - Y'\ :sub:`21high` + - Y'\ :sub:`22low` + - Y'\ :sub:`22high` + - Y'\ :sub:`23low` + - Y'\ :sub:`23high` + * - start + 24: + - Y'\ :sub:`30low` + - Y'\ :sub:`30high` + - Y'\ :sub:`31low` + - Y'\ :sub:`31high` + - Y'\ :sub:`32low` + - Y'\ :sub:`32high` + - Y'\ :sub:`33low` + - Y'\ :sub:`33high` diff --git a/Documentation/media/uapi/v4l/subdev-formats.rst b/Documentation/media/uapi/v4l/subdev-formats.rst index 15e11f27b4c8..17bfb2beaa6a 100644 --- a/Documentation/media/uapi/v4l/subdev-formats.rst +++ b/Documentation/media/uapi/v4l/subdev-formats.rst @@ -5792,6 +5792,43 @@ the following codes. - u\ :sub:`2` - u\ :sub:`1` - u\ :sub:`0` + * .. _MEDIA-BUS-FMT-Y14-1X14: + + - MEDIA_BUS_FMT_Y14_1X14 + - 0x202d + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` * .. _MEDIA-BUS-FMT-UYVY8-1X16: - MEDIA_BUS_FMT_UYVY8_1X16 diff --git a/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst b/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst index a1cf20181cf1..d38031dbe4e4 100644 --- a/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst +++ b/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst @@ -91,23 +91,23 @@ instructions. .. flat-table:: struct v4l2_dbg_match :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u32 - ``type`` - See :ref:`name-chip-match-types` for a list of possible types. - * - union + * - union { - (anonymous) - * - - - __u32 + * - __u32 - ``addr`` - Match a chip by this number, interpreted according to the ``type`` field. - * - - - char + * - char - ``name[32]`` - Match a chip by this name, interpreted according to the ``type`` field. Currently unused. + * - } + - diff --git a/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst b/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst index 29e1d4fc4f52..112597c6cad2 100644 --- a/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst +++ b/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst @@ -100,23 +100,23 @@ instructions. .. flat-table:: struct v4l2_dbg_match :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u32 - ``type`` - See :ref:`chip-match-types` for a list of possible types. - * - union + * - union { - (anonymous) - * - - - __u32 + * - __u32 - ``addr`` - Match a chip by this number, interpreted according to the ``type`` field. - * - - - char + * - char - ``name[32]`` - Match a chip by this name, interpreted according to the ``type`` field. Currently unused. + * - } + - diff --git a/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst b/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst index f1a504836f31..784c5980da8d 100644 --- a/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst +++ b/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst @@ -77,32 +77,25 @@ introduced in Linux 3.3. They are, however, mandatory for stateful mem2mem decod .. flat-table:: struct v4l2_decoder_cmd :header-rows: 0 :stub-columns: 0 - :widths: 11 24 12 16 106 + :widths: 1 1 1 3 * - __u32 - ``cmd`` - - - - The decoder command, see :ref:`decoder-cmds`. * - __u32 - ``flags`` - - - - Flags to go with the command. If no flags are defined for this command, drivers and applications must set this field to zero. - * - union + * - union { - (anonymous) - - - - - - - * - - - struct + * - struct - ``start`` - - Structure containing additional data for the ``V4L2_DEC_CMD_START`` command. * - - - - __s32 - ``speed`` - Playback speed and direction. The playback speed is defined as @@ -113,7 +106,6 @@ introduced in Linux 3.3. They are, however, mandatory for stateful mem2mem decod of 1 steps just one frame forward, a speed of -1 steps just one frame back. * - - - - __u32 - ``format`` - Format restrictions. This field is set by the driver, not the @@ -124,30 +116,26 @@ introduced in Linux 3.3. They are, however, mandatory for stateful mem2mem decod GOPs, which it can then play in reverse order. So to implement reverse playback the application must feed the decoder the last GOP in the video file, then the GOP before that, etc. etc. - * - - - struct + * - struct - ``stop`` - - Structure containing additional data for the ``V4L2_DEC_CMD_STOP`` command. * - - - - __u64 - ``pts`` - Stop playback at this ``pts`` or immediately if the playback is already past that timestamp. Leave to 0 if you want to stop after the last frame was decoded. - * - - - struct + * - struct - ``raw`` - - - - * - - - - __u32 - ``data``\ [16] - Reserved for future extensions. Drivers and applications must set the array to zero. + * - } + - diff --git a/Documentation/media/uapi/v4l/vidioc-dqevent.rst b/Documentation/media/uapi/v4l/vidioc-dqevent.rst index 42659a3d1705..2f37d255352a 100644 --- a/Documentation/media/uapi/v4l/vidioc-dqevent.rst +++ b/Documentation/media/uapi/v4l/vidioc-dqevent.rst @@ -55,66 +55,54 @@ call. .. flat-table:: struct v4l2_event :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 * - __u32 - ``type`` - - - Type of the event, see :ref:`event-type`. - * - union + * - union { - ``u`` - - - - - * - - - struct :c:type:`v4l2_event_vsync` + * - struct :c:type:`v4l2_event_vsync` - ``vsync`` - Event data for event ``V4L2_EVENT_VSYNC``. - * - - - struct :c:type:`v4l2_event_ctrl` + * - struct :c:type:`v4l2_event_ctrl` - ``ctrl`` - Event data for event ``V4L2_EVENT_CTRL``. - * - - - struct :c:type:`v4l2_event_frame_sync` + * - struct :c:type:`v4l2_event_frame_sync` - ``frame_sync`` - Event data for event ``V4L2_EVENT_FRAME_SYNC``. - * - - - struct :c:type:`v4l2_event_motion_det` + * - struct :c:type:`v4l2_event_motion_det` - ``motion_det`` - Event data for event V4L2_EVENT_MOTION_DET. - * - - - struct :c:type:`v4l2_event_src_change` + * - struct :c:type:`v4l2_event_src_change` - ``src_change`` - Event data for event V4L2_EVENT_SOURCE_CHANGE. - * - - - __u8 + * - __u8 - ``data``\ [64] - Event data. Defined by the event type. The union should be used to define easily accessible type for events. + * - } + - * - __u32 - ``pending`` - - - Number of pending events excluding this one. * - __u32 - ``sequence`` - - - Event sequence number. The sequence number is incremented for every subscribed event that takes place. If sequence numbers are not contiguous it means that events have been lost. * - struct timespec - ``timestamp`` - - - Event timestamp. The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access the same clock outside V4L2, use :c:func:`clock_gettime`. * - u32 - ``id`` - - - The ID associated with the event source. If the event does not have an associated ID (this depends on the event type), then this is 0. * - __u32 - ``reserved``\ [8] - - - Reserved for future extensions. Drivers must set the array to zero. @@ -233,54 +221,45 @@ call. .. flat-table:: struct v4l2_event_ctrl :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 * - __u32 - ``changes`` - - - A bitmask that tells what has changed. See :ref:`ctrl-changes-flags`. * - __u32 - ``type`` - - - The type of the control. See enum :c:type:`v4l2_ctrl_type`. - * - union (anonymous) - - - - - - - * - - - __s32 + * - union { + - (anonymous) + * - __s32 - ``value`` - The 32-bit value of the control for 32-bit control types. This is 0 for string controls since the value of a string cannot be passed using :ref:`VIDIOC_DQEVENT`. - * - - - __s64 + * - __s64 - ``value64`` - The 64-bit value of the control for 64-bit control types. + * - } + - * - __u32 - ``flags`` - - - The control flags. See :ref:`control-flags`. * - __s32 - ``minimum`` - - - The minimum value of the control. See struct :ref:`v4l2_queryctrl <v4l2-queryctrl>`. * - __s32 - ``maximum`` - - - The maximum value of the control. See struct :ref:`v4l2_queryctrl <v4l2-queryctrl>`. * - __s32 - ``step`` - - - The step value of the control. See struct :ref:`v4l2_queryctrl <v4l2-queryctrl>`. * - __s32 - ``default_value`` - - - The default value value of the control. See struct :ref:`v4l2_queryctrl <v4l2-queryctrl>`. diff --git a/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst b/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst index e62d45d37072..1d0acbf14c4f 100644 --- a/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst +++ b/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst @@ -112,7 +112,7 @@ that doesn't support them will return an ``EINVAL`` error code. .. flat-table:: struct v4l2_dv_timings_cap :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 * - __u32 - ``type`` @@ -127,16 +127,14 @@ that doesn't support them will return an ``EINVAL`` error code. - Reserved for future extensions. Drivers and applications must set the array to zero. - * - union - - - - - * - - - struct :c:type:`v4l2_bt_timings_cap` + * - union { + - (anonymous) + * - struct :c:type:`v4l2_bt_timings_cap` - ``bt`` - BT.656/1120 timings capabilities of the hardware. - * - - - __u32 + * - __u32 - ``raw_data``\ [32] + * - } - .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| diff --git a/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst b/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst index 2c69f26b165d..563a67cddeca 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst +++ b/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst @@ -138,36 +138,31 @@ application should zero out all members except for the *IN* fields. * - __u32 - ``index`` - - - IN: Index of the given frame interval in the enumeration. * - __u32 - ``pixel_format`` - - - IN: Pixel format for which the frame intervals are enumerated. * - __u32 - ``width`` - - - IN: Frame width for which the frame intervals are enumerated. * - __u32 - ``height`` - - - IN: Frame height for which the frame intervals are enumerated. * - __u32 - ``type`` - - - OUT: Frame interval type the device supports. - * - union - - - - + * - union { + - (anonymous) - OUT: Frame interval with the given index. - * - - - struct :c:type:`v4l2_fract` + * - struct :c:type:`v4l2_fract` - ``discrete`` - Frame interval [s]. - * - - - struct :c:type:`v4l2_frmival_stepwise` + * - struct :c:type:`v4l2_frmival_stepwise` - ``stepwise`` - + * - } + - + - * - __u32 - ``reserved[2]`` - diff --git a/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst b/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst index cf31f548826f..cd97546a7122 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst +++ b/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst @@ -155,31 +155,27 @@ application should zero out all members except for the *IN* fields. * - __u32 - ``index`` - - - IN: Index of the given frame size in the enumeration. * - __u32 - ``pixel_format`` - - - IN: Pixel format for which the frame sizes are enumerated. * - __u32 - ``type`` - - - OUT: Frame size type the device supports. - * - union - - - - + * - union { + - (anonymous) - OUT: Frame size with the given index. - * - - - struct :c:type:`v4l2_frmsize_discrete` + * - struct :c:type:`v4l2_frmsize_discrete` - ``discrete`` - - * - - - struct :c:type:`v4l2_frmsize_stepwise` + * - struct :c:type:`v4l2_frmsize_stepwise` - ``stepwise`` - + * - } + - + - * - __u32 - ``reserved[2]`` - - - Reserved space for future use. Must be zeroed by drivers and applications. diff --git a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst b/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst index 5c675cbac4cf..e36dd2622857 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst @@ -179,23 +179,21 @@ EBUSY .. flat-table:: struct v4l2_dv_timings :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 * - __u32 - ``type`` - - - Type of DV timings as listed in :ref:`dv-timing-types`. - * - union - - - - - * - - - struct :c:type:`v4l2_bt_timings` + * - union { + - (anonymous) + * - struct :c:type:`v4l2_bt_timings` - ``bt`` - Timings defined by BT.656/1120 specifications - * - - - __u32 + * - __u32 - ``reserved``\ [32] - + * - } + - .. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}| diff --git a/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst b/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst index 271cac18afbb..cdb2a2a512d6 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst @@ -136,15 +136,13 @@ still cause this situation. .. flat-table:: struct v4l2_ext_control :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u32 - ``id`` - - - Identifies the control, set by the application. * - __u32 - ``size`` - - - The total size in bytes of the payload of this control. This is normally 0, but for pointer controls this should be set to the size of the memory containing the payload, or that will receive @@ -161,55 +159,48 @@ still cause this situation. *length* of the string may well be much smaller. * - __u32 - ``reserved2``\ [1] - - - Reserved for future extensions. Drivers and applications must set the array to zero. - * - union + * - union { - (anonymous) - * - - - __s32 + * - __s32 - ``value`` - New value or current value. Valid if this control is not of type ``V4L2_CTRL_TYPE_INTEGER64`` and ``V4L2_CTRL_FLAG_HAS_PAYLOAD`` is not set. - * - - - __s64 + * - __s64 - ``value64`` - New value or current value. Valid if this control is of type ``V4L2_CTRL_TYPE_INTEGER64`` and ``V4L2_CTRL_FLAG_HAS_PAYLOAD`` is not set. - * - - - char * + * - char * - ``string`` - A pointer to a string. Valid if this control is of type ``V4L2_CTRL_TYPE_STRING``. - * - - - __u8 * + * - __u8 * - ``p_u8`` - A pointer to a matrix control of unsigned 8-bit values. Valid if this control is of type ``V4L2_CTRL_TYPE_U8``. - * - - - __u16 * + * - __u16 * - ``p_u16`` - A pointer to a matrix control of unsigned 16-bit values. Valid if this control is of type ``V4L2_CTRL_TYPE_U16``. - * - - - __u32 * + * - __u32 * - ``p_u32`` - A pointer to a matrix control of unsigned 32-bit values. Valid if this control is of type ``V4L2_CTRL_TYPE_U32``. - * - - - :c:type:`v4l2_area` * + * - :c:type:`v4l2_area` * - ``p_area`` - A pointer to a struct :c:type:`v4l2_area`. Valid if this control is of type ``V4L2_CTRL_TYPE_AREA``. - * - - - void * + * - void * - ``ptr`` - A pointer to a compound type which can be an N-dimensional array and/or a compound type (the control's type is >= ``V4L2_CTRL_COMPOUND_TYPES``). Valid if ``V4L2_CTRL_FLAG_HAS_PAYLOAD`` is set for this control. + * - } + - .. tabularcolumns:: |p{4.0cm}|p{2.2cm}|p{2.1cm}|p{8.2cm}| @@ -221,12 +212,11 @@ still cause this situation. .. flat-table:: struct v4l2_ext_controls :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 - * - union + * - union { - (anonymous) - * - - - __u32 + * - __u32 - ``ctrl_class`` - The control class to which all controls belong, see :ref:`ctrl-class`. Drivers that use a kernel framework for @@ -235,8 +225,7 @@ still cause this situation. support this can be tested by setting ``ctrl_class`` to 0 and calling :ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` with a ``count`` of 0. If that succeeds, then the driver supports this feature. - * - - - __u32 + * - __u32 - ``which`` - Which value of the control to get/set/try. ``V4L2_CTRL_WHICH_CUR_VAL`` will return the current value of the @@ -261,6 +250,8 @@ still cause this situation. by setting ctrl_class to ``V4L2_CTRL_WHICH_CUR_VAL`` and calling VIDIOC_TRY_EXT_CTRLS with a count of 0. If that fails, then the driver does not support ``V4L2_CTRL_WHICH_CUR_VAL``. + * - } + - * - __u32 - ``count`` - The number of controls in the controls array. May also be zero. diff --git a/Documentation/media/uapi/v4l/vidioc-g-fmt.rst b/Documentation/media/uapi/v4l/vidioc-g-fmt.rst index e35a9caff652..1e69bfc46e8d 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-fmt.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-fmt.rst @@ -103,51 +103,44 @@ The format as returned by :ref:`VIDIOC_TRY_FMT <VIDIOC_G_FMT>` must be identical * - __u32 - ``type`` - - - Type of the data stream, see :c:type:`v4l2_buf_type`. - * - union + * - union { - ``fmt`` - * - - - struct :c:type:`v4l2_pix_format` + * - struct :c:type:`v4l2_pix_format` - ``pix`` - Definition of an image format, see :ref:`pixfmt`, used by video capture and output devices. - * - - - struct :c:type:`v4l2_pix_format_mplane` + * - struct :c:type:`v4l2_pix_format_mplane` - ``pix_mp`` - Definition of an image format, see :ref:`pixfmt`, used by video capture and output devices that support the :ref:`multi-planar version of the API <planar-apis>`. - * - - - struct :c:type:`v4l2_window` + * - struct :c:type:`v4l2_window` - ``win`` - Definition of an overlaid image, see :ref:`overlay`, used by video overlay devices. - * - - - struct :c:type:`v4l2_vbi_format` + * - struct :c:type:`v4l2_vbi_format` - ``vbi`` - Raw VBI capture or output parameters. This is discussed in more detail in :ref:`raw-vbi`. Used by raw VBI capture and output devices. - * - - - struct :c:type:`v4l2_sliced_vbi_format` + * - struct :c:type:`v4l2_sliced_vbi_format` - ``sliced`` - Sliced VBI capture or output parameters. See :ref:`sliced` for details. Used by sliced VBI capture and output devices. - * - - - struct :c:type:`v4l2_sdr_format` + * - struct :c:type:`v4l2_sdr_format` - ``sdr`` - Definition of a data format, see :ref:`pixfmt`, used by SDR capture and output devices. - * - - - struct :c:type:`v4l2_meta_format` + * - struct :c:type:`v4l2_meta_format` - ``meta`` - Definition of a metadata format, see :ref:`meta-formats`, used by metadata capture devices. - * - - - __u8 + * - __u8 - ``raw_data``\ [200] - Place holder for future extensions. + * - } + - Return Value diff --git a/Documentation/media/uapi/v4l/vidioc-g-parm.rst b/Documentation/media/uapi/v4l/vidioc-g-parm.rst index d9d5d97848d3..044a459e073f 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-parm.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-parm.rst @@ -69,33 +69,29 @@ union holding separate parameters for input and output devices. .. flat-table:: struct v4l2_streamparm :header-rows: 0 :stub-columns: 0 - :widths: 1 1 1 2 + :widths: 1 1 2 * - __u32 - ``type`` - - - The buffer (stream) type, same as struct :c:type:`v4l2_format` ``type``, set by the application. See :c:type:`v4l2_buf_type`. - * - union + * - union { - ``parm`` - - - - - * - - - struct :c:type:`v4l2_captureparm` + * - struct :c:type:`v4l2_captureparm` - ``capture`` - Parameters for capture devices, used when ``type`` is ``V4L2_BUF_TYPE_VIDEO_CAPTURE`` or ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``. - * - - - struct :c:type:`v4l2_outputparm` + * - struct :c:type:`v4l2_outputparm` - ``output`` - Parameters for output devices, used when ``type`` is ``V4L2_BUF_TYPE_VIDEO_OUTPUT`` or ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE``. - * - - - __u8 + * - __u8 - ``raw_data``\ [200] - A place holder for future extensions. + * - } + - diff --git a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst b/Documentation/media/uapi/v4l/vidioc-queryctrl.rst index 6690928e657b..8971f4cfb16e 100644 --- a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst +++ b/Documentation/media/uapi/v4l/vidioc-queryctrl.rst @@ -290,34 +290,29 @@ See also the examples in :ref:`control`. .. flat-table:: struct v4l2_querymenu :header-rows: 0 :stub-columns: 0 - :widths: 1 1 2 1 + :widths: 1 1 2 * - __u32 - - - ``id`` - Identifies the control, set by the application from the respective struct :ref:`v4l2_queryctrl <v4l2-queryctrl>` ``id``. * - __u32 - - - ``index`` - Index of the menu item, starting at zero, set by the application. - * - union - - - - - - - * - - - __u8 + * - union { + - (anonymous) + * - __u8 - ``name``\ [32] - Name of the menu item, a NUL-terminated ASCII string. This information is intended for the user. This field is valid for ``V4L2_CTRL_TYPE_MENU`` type controls. - * - - - __s64 + * - __s64 - ``value`` - Value of the integer menu item. This field is valid for ``V4L2_CTRL_TYPE_INTEGER_MENU`` type controls. - * - __u32 + * - } - + * - __u32 - ``reserved`` - Reserved for future extensions. Drivers must set the array to zero. @@ -378,7 +373,7 @@ See also the examples in :ref:`control`. - 0 - 0 - A control which performs an action when set. Drivers must ignore - the value passed with ``VIDIOC_S_CTRL`` and return an ``EINVAL`` error + the value passed with ``VIDIOC_S_CTRL`` and return an ``EACCES`` error code on a ``VIDIOC_G_CTRL`` attempt. * - ``V4L2_CTRL_TYPE_INTEGER64`` - any diff --git a/Documentation/media/uapi/v4l/yuv-formats.rst b/Documentation/media/uapi/v4l/yuv-formats.rst index 867470e5f9e1..3b259e31b7a1 100644 --- a/Documentation/media/uapi/v4l/yuv-formats.rst +++ b/Documentation/media/uapi/v4l/yuv-formats.rst @@ -35,6 +35,7 @@ to brightness information. pixfmt-grey pixfmt-y10 pixfmt-y12 + pixfmt-y14 pixfmt-y10b pixfmt-y10p pixfmt-y16 diff --git a/Documentation/media/v4l-drivers/ipu3.rst b/Documentation/media/v4l-drivers/ipu3.rst index e4904ab44e60..a694f49491f9 100644 --- a/Documentation/media/v4l-drivers/ipu3.rst +++ b/Documentation/media/v4l-drivers/ipu3.rst @@ -311,10 +311,13 @@ Down Scaler and GDC blocks should be configured with the supported resolutions as each hardware block has its own alignment requirement. You must configure the output resolution of the hardware blocks smartly to meet -the hardware requirement along with keeping the maximum field of view. -The intermediate resolutions can be generated by specific tool and this -information can be obtained by looking at the following IPU3 ImgU configuration -table. +the hardware requirement along with keeping the maximum field of view. The +intermediate resolutions can be generated by specific tool - + +https://github.com/intel/intel-ipu3-pipecfg + +This tool can be used to generate intermediate resolutions. More information can +be obtained by looking at the following IPU3 ImgU configuration table. https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/master diff --git a/Documentation/media/v4l-drivers/vivid.rst b/Documentation/media/v4l-drivers/vivid.rst index 7082fec4075d..52e57b773f07 100644 --- a/Documentation/media/v4l-drivers/vivid.rst +++ b/Documentation/media/v4l-drivers/vivid.rst @@ -4,9 +4,9 @@ The Virtual Video Test Driver (vivid) ===================================== This driver emulates video4linux hardware of various types: video capture, video -output, vbi capture and output, radio receivers and transmitters and a software -defined radio receiver. In addition a simple framebuffer device is available for -testing capture and output overlays. +output, vbi capture and output, metadata capture and output, radio receivers and +transmitters, touch capture and a software defined radio receiver. In addition a +simple framebuffer device is available for testing capture and output overlays. Up to 64 vivid instances can be created, each with up to 16 inputs and 16 outputs. @@ -36,6 +36,8 @@ This document describes the features implemented by this driver: - Radio receiver and transmitter support, including RDS support - Software defined radio (SDR) support - Capture and output overlay support +- Metadata capture and output support +- Touch capture support These features will be described in more detail below. @@ -69,6 +71,9 @@ all configurable using the following module options: - bit 10-11: VBI Output node: 0 = none, 1 = raw vbi, 2 = sliced vbi, 3 = both - bit 12: Radio Transmitter node - bit 16: Framebuffer for testing overlays + - bit 17: Metadata Capture node + - bit 18: Metadata Output node + - bit 19: Touch Capture node So to create four instances, the first two with just one video capture device, the second two with just one video output device you would pass @@ -175,6 +180,21 @@ all configurable using the following module options: give the desired swradioX start number for each SDR capture device. The default is -1 which will just take the first free number. +- meta_cap_nr: + + give the desired videoX start number for each metadata capture device. + The default is -1 which will just take the first free number. + +- meta_out_nr: + + give the desired videoX start number for each metadata output device. + The default is -1 which will just take the first free number. + +- touch_cap_nr: + + give the desired v4l-touchX start number for each touch capture device. + The default is -1 which will just take the first free number. + - ccs_cap_mode: specify the allowed video capture crop/compose/scaling combination @@ -547,6 +567,33 @@ The generated data contains the In-phase and Quadrature components of a 1 kHz tone that has an amplitude of sqrt(2). +Metadata Capture +---------------- + +The Metadata capture generates UVC format metadata. The PTS and SCR are +transmitted based on the values set in vivid contols. + +The Metadata device will only work for the Webcam input, it will give +back an error for all other inputs. + + +Metadata Output +--------------- + +The Metadata output can be used to set brightness, contrast, saturation and hue. + +The Metadata device will only work for the Webcam output, it will give +back an error for all other outputs. + + +Touch Capture +------------- + +The Touch capture generates touch patterns simulating single tap, double tap, +triple tap, move from left to right, zoom in, zoom out, palm press (simulating +a large area being pressed on a touchpad), and simulating 16 simultaneous +touch points. + Controls -------- @@ -1049,6 +1096,16 @@ FM Radio Modulator Controls to pass the RDS blocks to the driver, or "Controls" where the RDS data is Provided by the RDS controls mentioned above. +Metadata Capture Controls +~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Generate PTS + + if set, then the generated metadata stream contains Presentation timestamp. + +- Generate SCR + + if set, then the generated metadata stream contains Source Clock information. Video, VBI and RDS Looping -------------------------- diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 7146da061693..e1c355e84edd 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -185,7 +185,7 @@ As a further example, consider this sequence of events: =============== =============== { A == 1, B == 2, C == 3, P == &A, Q == &C } B = 4; Q = P; - P = &B D = *Q; + P = &B; D = *Q; There is an obvious data dependency here, as the value loaded into D depends on the address retrieved from P by CPU 2. At the end of the sequence, any of the @@ -569,7 +569,7 @@ following sequence of events: { A == 1, B == 2, C == 3, P == &A, Q == &C } B = 4; <write barrier> - WRITE_ONCE(P, &B) + WRITE_ONCE(P, &B); Q = READ_ONCE(P); D = *Q; @@ -1721,7 +1721,7 @@ of optimizations: and WRITE_ONCE() are more selective: With READ_ONCE() and WRITE_ONCE(), the compiler need only forget the contents of the indicated memory locations, while with barrier() the compiler must - discard the value of all memory locations that it has currented + discard the value of all memory locations that it has currently cached in any machine registers. Of course, the compiler must also respect the order in which the READ_ONCE()s and WRITE_ONCE()s occur, though the CPU of course need not do so. @@ -1833,7 +1833,7 @@ Aside: In the case of data dependencies, the compiler would be expected to issue the loads in the correct order (eg. `a[b]` would have to load the value of b before loading a[b]), however there is no guarantee in the C specification that the compiler may not speculate the value of b -(eg. is equal to 1) and load a before b (eg. tmp = a[1]; if (b != 1) +(eg. is equal to 1) and load a[b] before b (eg. tmp = a[1]; if (b != 1) tmp = a[b]; ). There is also the problem of a compiler reloading b after having loaded a[b], thus having a newer copy of b than a[b]. A consensus has not yet been reached about these problems, however the READ_ONCE() diff --git a/Documentation/mhi/index.rst b/Documentation/mhi/index.rst new file mode 100644 index 000000000000..1d8dec302780 --- /dev/null +++ b/Documentation/mhi/index.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +MHI +=== + +.. toctree:: + :maxdepth: 1 + + mhi + topology + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` diff --git a/Documentation/mhi/mhi.rst b/Documentation/mhi/mhi.rst new file mode 100644 index 000000000000..803ff84f7d7b --- /dev/null +++ b/Documentation/mhi/mhi.rst @@ -0,0 +1,218 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================== +MHI (Modem Host Interface) +========================== + +This document provides information about the MHI protocol. + +Overview +======== + +MHI is a protocol developed by Qualcomm Innovation Center, Inc. It is used +by the host processors to control and communicate with modem devices over high +speed peripheral buses or shared memory. Even though MHI can be easily adapted +to any peripheral buses, it is primarily used with PCIe based devices. MHI +provides logical channels over the physical buses and allows transporting the +modem protocols, such as IP data packets, modem control messages, and +diagnostics over at least one of those logical channels. Also, the MHI +protocol provides data acknowledgment feature and manages the power state of the +modems via one or more logical channels. + +MHI Internals +============= + +MMIO +---- + +MMIO (Memory mapped IO) consists of a set of registers in the device hardware, +which are mapped to the host memory space by the peripheral buses like PCIe. +Following are the major components of MMIO register space: + +MHI control registers: Access to MHI configurations registers + +MHI BHI registers: BHI (Boot Host Interface) registers are used by the host +for downloading the firmware to the device before MHI initialization. + +Channel Doorbell array: Channel Doorbell (DB) registers used by the host to +notify the device when there is new work to do. + +Event Doorbell array: Associated with event context array, the Event Doorbell +(DB) registers are used by the host to notify the device when new events are +available. + +Debug registers: A set of registers and counters used by the device to expose +debugging information like performance, functional, and stability to the host. + +Data structures +--------------- + +All data structures used by MHI are in the host system memory. Using the +physical interface, the device accesses those data structures. MHI data +structures and data buffers in the host system memory regions are mapped for +the device. + +Channel context array: All channel configurations are organized in channel +context data array. + +Transfer rings: Used by the host to schedule work items for a channel. The +transfer rings are organized as a circular queue of Transfer Descriptors (TD). + +Event context array: All event configurations are organized in the event context +data array. + +Event rings: Used by the device to send completion and state transition messages +to the host + +Command context array: All command configurations are organized in command +context data array. + +Command rings: Used by the host to send MHI commands to the device. The command +rings are organized as a circular queue of Command Descriptors (CD). + +Channels +-------- + +MHI channels are logical, unidirectional data pipes between a host and a device. +The concept of channels in MHI is similar to endpoints in USB. MHI supports up +to 256 channels. However, specific device implementations may support less than +the maximum number of channels allowed. + +Two unidirectional channels with their associated transfer rings form a +bidirectional data pipe, which can be used by the upper-layer protocols to +transport application data packets (such as IP packets, modem control messages, +diagnostics messages, and so on). Each channel is associated with a single +transfer ring. + +Transfer rings +-------------- + +Transfers between the host and device are organized by channels and defined by +Transfer Descriptors (TD). TDs are managed through transfer rings, which are +defined for each channel between the device and host and reside in the host +memory. TDs consist of one or more ring elements (or transfer blocks):: + + [Read Pointer (RP)] ----------->[Ring Element] } TD + [Write Pointer (WP)]- [Ring Element] + - [Ring Element] + --------->[Ring Element] + [Ring Element] + +Below is the basic usage of transfer rings: + +* Host allocates memory for transfer ring. +* Host sets the base pointer, read pointer, and write pointer in corresponding + channel context. +* Ring is considered empty when RP == WP. +* Ring is considered full when WP + 1 == RP. +* RP indicates the next element to be serviced by the device. +* When the host has a new buffer to send, it updates the ring element with + buffer information, increments the WP to the next element and rings the + associated channel DB. + +Event rings +----------- + +Events from the device to host are organized in event rings and defined by Event +Descriptors (ED). Event rings are used by the device to report events such as +data transfer completion status, command completion status, and state changes +to the host. Event rings are the array of EDs that resides in the host +memory. EDs consist of one or more ring elements (or transfer blocks):: + + [Read Pointer (RP)] ----------->[Ring Element] } ED + [Write Pointer (WP)]- [Ring Element] + - [Ring Element] + --------->[Ring Element] + [Ring Element] + +Below is the basic usage of event rings: + +* Host allocates memory for event ring. +* Host sets the base pointer, read pointer, and write pointer in corresponding + channel context. +* Both host and device has a local copy of RP, WP. +* Ring is considered empty (no events to service) when WP + 1 == RP. +* Ring is considered full of events when RP == WP. +* When there is a new event the device needs to send, the device updates ED + pointed by RP, increments the RP to the next element and triggers the + interrupt. + +Ring Element +------------ + +A Ring Element is a data structure used to transfer a single block +of data between the host and the device. Transfer ring element types contain a +single buffer pointer, the size of the buffer, and additional control +information. Other ring element types may only contain control and status +information. For single buffer operations, a ring descriptor is composed of a +single element. For large multi-buffer operations (such as scatter and gather), +elements can be chained to form a longer descriptor. + +MHI Operations +============== + +MHI States +---------- + +MHI_STATE_RESET +~~~~~~~~~~~~~~~ +MHI is in reset state after power-up or hardware reset. The host is not allowed +to access device MMIO register space. + +MHI_STATE_READY +~~~~~~~~~~~~~~~ +MHI is ready for initialization. The host can start MHI initialization by +programming MMIO registers. + +MHI_STATE_M0 +~~~~~~~~~~~~ +MHI is running and operational in the device. The host can start channels by +issuing channel start command. + +MHI_STATE_M1 +~~~~~~~~~~~~ +MHI operation is suspended by the device. This state is entered when the +device detects inactivity at the physical interface within a preset time. + +MHI_STATE_M2 +~~~~~~~~~~~~ +MHI is in low power state. MHI operation is suspended and the device may +enter lower power mode. + +MHI_STATE_M3 +~~~~~~~~~~~~ +MHI operation stopped by the host. This state is entered when the host suspends +MHI operation. + +MHI Initialization +------------------ + +After system boots, the device is enumerated over the physical interface. +In the case of PCIe, the device is enumerated and assigned BAR-0 for +the device's MMIO register space. To initialize the MHI in a device, +the host performs the following operations: + +* Allocates the MHI context for event, channel and command arrays. +* Initializes the context array, and prepares interrupts. +* Waits until the device enters READY state. +* Programs MHI MMIO registers and sets device into MHI_M0 state. +* Waits for the device to enter M0 state. + +MHI Data Transfer +----------------- + +MHI data transfer is initiated by the host to transfer data to the device. +Following are the sequence of operations performed by the host to transfer +data to device: + +* Host prepares TD with buffer information. +* Host increments the WP of the corresponding channel transfer ring. +* Host rings the channel DB register. +* Device wakes up to process the TD. +* Device generates a completion event for the processed TD by updating ED. +* Device increments the RP of the corresponding event ring. +* Device triggers IRQ to wake up the host. +* Host wakes up and checks the event ring for completion event. +* Host updates the WP of the corresponding event ring to indicate that the + data transfer has been completed successfully. + diff --git a/Documentation/mhi/topology.rst b/Documentation/mhi/topology.rst new file mode 100644 index 000000000000..dc7799d03294 --- /dev/null +++ b/Documentation/mhi/topology.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============ +MHI Topology +============ + +This document provides information about the MHI topology modeling and +representation in the kernel. + +MHI Controller +-------------- + +MHI controller driver manages the interaction with the MHI client devices +such as the external modems and WiFi chipsets. It is also the MHI bus master +which is in charge of managing the physical link between the host and device. +It is however not involved in the actual data transfer as the data transfer +is taken care by the physical bus such as PCIe. Each controller driver exposes +channels and events based on the client device type. + +Below are the roles of the MHI controller driver: + +* Turns on the physical bus and establishes the link to the device +* Configures IRQs, IOMMU, and IOMEM +* Allocates struct mhi_controller and registers with the MHI bus framework + with channel and event configurations using mhi_register_controller. +* Initiates power on and shutdown sequence +* Initiates suspend and resume power management operations of the device. + +MHI Device +---------- + +MHI device is the logical device which binds to a maximum of two MHI channels +for bi-directional communication. Once MHI is in powered on state, the MHI +core will create MHI devices based on the channel configuration exposed +by the controller. There can be a single MHI device for each channel or for a +couple of channels. + +Each supported device is enumerated in:: + + /sys/bus/mhi/devices/ + +MHI Driver +---------- + +MHI driver is the client driver which binds to one or more MHI devices. The MHI +driver sends and receives the upper-layer protocol packets like IP packets, +modem control messages, and diagnostics messages over MHI. The MHI core will +bind the MHI devices to the MHI driver. + +Each supported driver is enumerated in:: + + /sys/bus/mhi/drivers/ + +Below are the roles of the MHI driver: + +* Registers the driver with the MHI bus framework using mhi_driver_register. +* Prepares the device for transfer by calling mhi_prepare_for_transfer. +* Initiates data transfer by calling mhi_queue_transfer. +* Once the data transfer is finished, calls mhi_unprepare_from_transfer to + end data transfer. diff --git a/Documentation/mips/au1xxx_ide.rst b/Documentation/mips/au1xxx_ide.rst deleted file mode 100644 index 2f9c2cff6738..000000000000 --- a/Documentation/mips/au1xxx_ide.rst +++ /dev/null @@ -1,130 +0,0 @@ -.. include:: <isonum.txt> - -====================== -MIPS AU1XXX IDE driver -====================== - -Released 2005-07-15 - -About -===== - -This file describes the 'drivers/ide/au1xxx-ide.c', related files and the -services they provide. - -If you are short in patience and just want to know how to add your hard disc to -the white or black list, go to the 'ADD NEW HARD DISC TO WHITE OR BLACK LIST' -section. - - -License -======= - -:Copyright: |copy| 2003-2005 AMD, Personal Connectivity Solutions - -This program is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free Software -Foundation; either version 2 of the License, or (at your option) any later -version. - -THIS SOFTWARE IS PROVIDED ``AS IS`` AND ANY EXPRESS OR IMPLIED WARRANTIES, -INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND -FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR -BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. - -You should have received a copy of the GNU General Public License along with -this program; if not, write to the Free Software Foundation, Inc., -675 Mass Ave, Cambridge, MA 02139, USA. - -Note: - for more information, please refer "AMD Alchemy Au1200/Au1550 IDE - Interface and Linux Device Driver" Application Note. - - -Files, Configs and Compatibility -================================ - -Two files are introduced: - - a) 'arch/mips/include/asm/mach-au1x00/au1xxx_ide.h' - contains : struct _auide_hwif - - - timing parameters for PIO mode 0/1/2/3/4 - - timing parameters for MWDMA 0/1/2 - - b) 'drivers/ide/mips/au1xxx-ide.c' - contains the functionality of the AU1XXX IDE driver - -Following extra configs variables are introduced: - - CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA - - enable the PIO+DBDMA mode - CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - - enable the MWDMA mode - - -Supported IDE Modes -=================== - -The AU1XXX IDE driver supported all PIO modes - PIO mode 0/1/2/3/4 - and all -MWDMA modes - MWDMA 0/1/2 -. There is no support for SWDMA and UDMA mode. - -To change the PIO mode use the program hdparm with option -p, e.g. -'hdparm -p0 [device]' for PIO mode 0. To enable the MWDMA mode use the option --X, e.g. 'hdparm -X32 [device]' for MWDMA mode 0. - - -Performance Configurations -========================== - -If the used system doesn't need USB support enable the following kernel -configs:: - - CONFIG_IDE=y - CONFIG_BLK_DEV_IDE=y - CONFIG_IDE_GENERIC=y - CONFIG_BLK_DEV_IDEPCI=y - CONFIG_BLK_DEV_GENERIC=y - CONFIG_BLK_DEV_IDEDMA_PCI=y - CONFIG_BLK_DEV_IDE_AU1XXX=y - CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y - CONFIG_BLK_DEV_IDEDMA=y - -Also define 'IDE_AU1XXX_BURSTMODE' in 'drivers/ide/mips/au1xxx-ide.c' to enable -the burst support on DBDMA controller. - -If the used system need the USB support enable the following kernel configs for -high IDE to USB throughput. - -:: - - CONFIG_IDE_GENERIC=y - CONFIG_BLK_DEV_IDEPCI=y - CONFIG_BLK_DEV_GENERIC=y - CONFIG_BLK_DEV_IDEDMA_PCI=y - CONFIG_BLK_DEV_IDE_AU1XXX=y - CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y - CONFIG_BLK_DEV_IDEDMA=y - -Also undefine 'IDE_AU1XXX_BURSTMODE' in 'drivers/ide/mips/au1xxx-ide.c' to -disable the burst support on DBDMA controller. - - -Acknowledgments -=============== - -These drivers wouldn't have been done without the base of kernel 2.4.x AU1XXX -IDE driver from AMD. - -Additional input also from: -Matthias Lenk <matthias.lenk@amd.com> - -Happy hacking! - -Enrico Walther <enrico.walther@amd.com> diff --git a/Documentation/mips/index.rst b/Documentation/mips/index.rst index a93c2f65884c..d5ad8c00f0bd 100644 --- a/Documentation/mips/index.rst +++ b/Documentation/mips/index.rst @@ -10,8 +10,6 @@ MIPS-specific Documentation ingenic-tcu - au1xxx_ide - .. only:: subproject and html Indices diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index f11c5daeada5..c1dcd2628911 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -20,4 +20,5 @@ fit into other categories. isl29003 lis3lv02d max6875 + mic/index xilinx_sdfec diff --git a/Documentation/mic/index.rst b/Documentation/misc-devices/mic/index.rst index 3a8d06367ef1..3a8d06367ef1 100644 --- a/Documentation/mic/index.rst +++ b/Documentation/misc-devices/mic/index.rst diff --git a/Documentation/mic/mic_overview.rst b/Documentation/misc-devices/mic/mic_overview.rst index 17d956bdaf7c..17d956bdaf7c 100644 --- a/Documentation/mic/mic_overview.rst +++ b/Documentation/misc-devices/mic/mic_overview.rst diff --git a/Documentation/mic/scif_overview.rst b/Documentation/misc-devices/mic/scif_overview.rst index 4c8ad9e43706..4c8ad9e43706 100644 --- a/Documentation/mic/scif_overview.rst +++ b/Documentation/misc-devices/mic/scif_overview.rst diff --git a/Documentation/misc-devices/uacce.rst b/Documentation/misc-devices/uacce.rst new file mode 100644 index 000000000000..1db412e9b1a3 --- /dev/null +++ b/Documentation/misc-devices/uacce.rst @@ -0,0 +1,176 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Introduction of Uacce +--------------------- + +Uacce (Unified/User-space-access-intended Accelerator Framework) targets to +provide Shared Virtual Addressing (SVA) between accelerators and processes. +So accelerator can access any data structure of the main cpu. +This differs from the data sharing between cpu and io device, which share +only data content rather than address. +Because of the unified address, hardware and user space of process can +share the same virtual address in the communication. +Uacce takes the hardware accelerator as a heterogeneous processor, while +IOMMU share the same CPU page tables and as a result the same translation +from va to pa. + +:: + + __________________________ __________________________ + | | | | + | User application (CPU) | | Hardware Accelerator | + |__________________________| |__________________________| + + | | + | va | va + V V + __________ __________ + | | | | + | MMU | | IOMMU | + |__________| |__________| + | | + | | + V pa V pa + _______________________________________ + | | + | Memory | + |_______________________________________| + + + +Architecture +------------ + +Uacce is the kernel module, taking charge of iommu and address sharing. +The user drivers and libraries are called WarpDrive. + +The uacce device, built around the IOMMU SVA API, can access multiple +address spaces, including the one without PASID. + +A virtual concept, queue, is used for the communication. It provides a +FIFO-like interface. And it maintains a unified address space between the +application and all involved hardware. + +:: + + ___________________ ________________ + | | user API | | + | WarpDrive library | ------------> | user driver | + |___________________| |________________| + | | + | | + | queue fd | + | | + | | + v | + ___________________ _________ | + | | | | | mmap memory + | Other framework | | uacce | | r/w interface + | crypto/nic/others | |_________| | + |___________________| | + | | | + | register | register | + | | | + | | | + | _________________ __________ | + | | | | | | + ------------- | Device Driver | | IOMMU | | + |_________________| |__________| | + | | + | V + | ___________________ + | | | + -------------------------- | Device(Hardware) | + |___________________| + + +How does it work +---------------- + +Uacce uses mmap and IOMMU to play the trick. + +Uacce creates a chrdev for every device registered to it. New queue is +created when user application open the chrdev. The file descriptor is used +as the user handle of the queue. +The accelerator device present itself as an Uacce object, which exports as +a chrdev to the user space. The user application communicates with the +hardware by ioctl (as control path) or share memory (as data path). + +The control path to the hardware is via file operation, while data path is +via mmap space of the queue fd. + +The queue file address space: + +:: + + /** + * enum uacce_qfrt: qfrt type + * @UACCE_QFRT_MMIO: device mmio region + * @UACCE_QFRT_DUS: device user share region + */ + enum uacce_qfrt { + UACCE_QFRT_MMIO = 0, + UACCE_QFRT_DUS = 1, + }; + +All regions are optional and differ from device type to type. +Each region can be mmapped only once, otherwise -EEXIST returns. + +The device mmio region is mapped to the hardware mmio space. It is generally +used for doorbell or other notification to the hardware. It is not fast enough +as data channel. + +The device user share region is used for share data buffer between user process +and device. + + +The Uacce register API +---------------------- + +The register API is defined in uacce.h. + +:: + + struct uacce_interface { + char name[UACCE_MAX_NAME_SIZE]; + unsigned int flags; + const struct uacce_ops *ops; + }; + +According to the IOMMU capability, uacce_interface flags can be: + +:: + + /** + * UACCE Device flags: + * UACCE_DEV_SVA: Shared Virtual Addresses + * Support PASID + * Support device page faults (PCI PRI or SMMU Stall) + */ + #define UACCE_DEV_SVA BIT(0) + + struct uacce_device *uacce_alloc(struct device *parent, + struct uacce_interface *interface); + int uacce_register(struct uacce_device *uacce); + void uacce_remove(struct uacce_device *uacce); + +uacce_register results can be: + +a. If uacce module is not compiled, ERR_PTR(-ENODEV) + +b. Succeed with the desired flags + +c. Succeed with the negotiated flags, for example + + uacce_interface.flags = UACCE_DEV_SVA but uacce->flags = ~UACCE_DEV_SVA + + So user driver need check return value as well as the negotiated uacce->flags. + + +The user driver +--------------- + +The queue file mmap space will need a user driver to wrap the communication +protocol. Uacce provides some attributes in sysfs for the user driver to +match the right accelerator accordingly. +More details in Documentation/ABI/testing/sysfs-driver-uacce. diff --git a/Documentation/networking/6lowpan.txt b/Documentation/networking/6lowpan.rst index 2e5a939d7e6f..e70a6520cc33 100644 --- a/Documentation/networking/6lowpan.txt +++ b/Documentation/networking/6lowpan.rst @@ -1,37 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 -Netdev private dataroom for 6lowpan interfaces: +============================================== +Netdev private dataroom for 6lowpan interfaces +============================================== All 6lowpan able net devices, means all interfaces with ARPHRD_6LOWPAN, must have "struct lowpan_priv" placed at beginning of netdev_priv. -The priv_size of each interface should be calculate by: +The priv_size of each interface should be calculate by:: dev->priv_size = LOWPAN_PRIV_SIZE(LL_6LOWPAN_PRIV_DATA); Where LL_PRIV_6LOWPAN_DATA is sizeof linklayer 6lowpan private data struct. -To access the LL_PRIV_6LOWPAN_DATA structure you can cast: +To access the LL_PRIV_6LOWPAN_DATA structure you can cast:: lowpan_priv(dev)-priv; to your LL_6LOWPAN_PRIV_DATA structure. -Before registering the lowpan netdev interface you must run: +Before registering the lowpan netdev interface you must run:: lowpan_netdev_setup(dev, LOWPAN_LLTYPE_FOOBAR); wheres LOWPAN_LLTYPE_FOOBAR is a define for your 6LoWPAN linklayer type of enum lowpan_lltypes. -Example to evaluate the private usually you can do: +Example to evaluate the private usually you can do:: -static inline struct lowpan_priv_foobar * -lowpan_foobar_priv(struct net_device *dev) -{ + static inline struct lowpan_priv_foobar * + lowpan_foobar_priv(struct net_device *dev) + { return (struct lowpan_priv_foobar *)lowpan_priv(dev)->priv; -} + } -switch (dev->type) { -case ARPHRD_6LOWPAN: + switch (dev->type) { + case ARPHRD_6LOWPAN: lowpan_priv = lowpan_priv(dev); /* do great stuff which is ARPHRD_6LOWPAN related */ switch (lowpan_priv->lltype) { @@ -42,8 +45,8 @@ case ARPHRD_6LOWPAN: ... } break; -... -} + ... + } In case of generic 6lowpan branch ("net/6lowpan") you can remove the check on ARPHRD_6LOWPAN, because you can be sure that these function are called diff --git a/Documentation/networking/bareudp.rst b/Documentation/networking/bareudp.rst new file mode 100644 index 000000000000..465a8b251bfe --- /dev/null +++ b/Documentation/networking/bareudp.rst @@ -0,0 +1,52 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================================== +Bare UDP Tunnelling Module Documentation +======================================== + +There are various L3 encapsulation standards using UDP being discussed to +leverage the UDP based load balancing capability of different networks. +MPLSoUDP (__ https://tools.ietf.org/html/rfc7510) is one among them. + +The Bareudp tunnel module provides a generic L3 encapsulation tunnelling +support for tunnelling different L3 protocols like MPLS, IP, NSH etc. inside +a UDP tunnel. + +Special Handling +---------------- +The bareudp device supports special handling for MPLS & IP as they can have +multiple ethertypes. +MPLS procotcol can have ethertypes ETH_P_MPLS_UC (unicast) & ETH_P_MPLS_MC (multicast). +IP protocol can have ethertypes ETH_P_IP (v4) & ETH_P_IPV6 (v6). +This special handling can be enabled only for ethertypes ETH_P_IP & ETH_P_MPLS_UC +with a flag called multiproto mode. + +Usage +------ + +1) Device creation & deletion + + a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847. + + This creates a bareudp tunnel device which tunnels L3 traffic with ethertype + 0x8847 (MPLS traffic). The destination port of the UDP header will be set to + 6635.The device will listen on UDP port 6635 to receive traffic. + + b) ip link delete bareudp0 + +2) Device creation with multiple proto mode enabled + +There are two ways to create a bareudp device for MPLS & IP with multiproto mode +enabled. + + a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847 multiproto + + b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls + +3) Device Usage + +The bareudp device could be used along with OVS or flower filter in TC. +The OVS or TC flower layer must set the tunnel information in SKB dst field before +sending packet buffer to the bareudp device for transmission. On reception the +bareudp device extracts and stores the tunnel information in SKB dst field before +passing the packet buffer to the network stack. diff --git a/Documentation/networking/device_drivers/mellanox/mlx5.rst b/Documentation/networking/device_drivers/mellanox/mlx5.rst index f575a49790e8..e9b65035cd47 100644 --- a/Documentation/networking/device_drivers/mellanox/mlx5.rst +++ b/Documentation/networking/device_drivers/mellanox/mlx5.rst @@ -101,7 +101,7 @@ Enabling the driver and kconfig options **External options** ( Choose if the corresponding mlx5 feature is required ) - CONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabled -- CONFIG_VXLAN: When chosen, mlx5 vxaln support will be enabled. +- CONFIG_VXLAN: When chosen, mlx5 vxlan support will be enabled. - CONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool). Devlink info diff --git a/Documentation/networking/device_drivers/stmicro/stmmac.rst b/Documentation/networking/device_drivers/stmicro/stmmac.rst index c34bab3d2df0..5d46e5036129 100644 --- a/Documentation/networking/device_drivers/stmicro/stmmac.rst +++ b/Documentation/networking/device_drivers/stmicro/stmmac.rst @@ -32,7 +32,8 @@ is also supported. DesignWare(R) Cores Ethernet MAC 10/100/1000 Universal version 3.70a (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0 (and upper) have been used for developing this driver as well as -DesignWare(R) Cores XGMAC - 10G Ethernet MAC. +DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores +Enterprise MAC - 100G Ethernet MAC. This driver supports both the platform bus and PCI. @@ -48,6 +49,8 @@ Cores Ethernet Controllers and corresponding minimum and maximum versions: +-------------------------------+--------------+--------------+--------------+ | XGMAC - 10G Ethernet MAC | 2.10a | N/A | XGMAC2+ | +-------------------------------+--------------+--------------+--------------+ +| XLGMAC - 100G Ethernet MAC | 2.00a | N/A | XLGMAC2+ | ++-------------------------------+--------------+--------------+--------------+ For questions related to hardware requirements, refer to the documentation supplied with your Ethernet adapter. All hardware requirements listed apply @@ -57,7 +60,7 @@ Feature List ============ The following features are available in this driver: - - GMII/MII/RGMII/SGMII/RMII/XGMII Interface + - GMII/MII/RGMII/SGMII/RMII/XGMII/XLGMII Interface - Half-Duplex / Full-Duplex Operation - Energy Efficient Ethernet (EEE) - IEEE 802.3x PAUSE Packets (Flow Control) diff --git a/Documentation/networking/devlink/bnxt.rst b/Documentation/networking/devlink/bnxt.rst index 82ef9ec46707..3dfd84ccb1c7 100644 --- a/Documentation/networking/devlink/bnxt.rst +++ b/Documentation/networking/devlink/bnxt.rst @@ -51,6 +51,9 @@ The ``bnxt_en`` driver reports the following versions * - Name - Type - Description + * - ``board.id`` + - fixed + - Part number identifying the board design * - ``asic.id`` - fixed - ASIC design identifier @@ -63,12 +66,15 @@ The ``bnxt_en`` driver reports the following versions * - ``fw`` - stored, running - Overall board firmware version - * - ``fw.app`` - - stored, running - - Data path firmware version * - ``fw.mgmt`` - stored, running - - Management firmware version + - NIC hardware resource management firmware version + * - ``fw.mgmt.api`` + - running + - Minimum firmware interface spec version supported between driver and firmware + * - ``fw.nsci`` + - stored, running + - General platform management firmware version * - ``fw.roce`` - stored, running - RoCE management firmware version diff --git a/Documentation/networking/devlink/devlink-flash.rst b/Documentation/networking/devlink/devlink-flash.rst new file mode 100644 index 000000000000..40a87c0222cb --- /dev/null +++ b/Documentation/networking/devlink/devlink-flash.rst @@ -0,0 +1,93 @@ +.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +.. _devlink_flash: + +============= +Devlink Flash +============= + +The ``devlink-flash`` API allows updating device firmware. It replaces the +older ``ethtool-flash`` mechanism, and doesn't require taking any +networking locks in the kernel to perform the flash update. Example use:: + + $ devlink dev flash pci/0000:05:00.0 file flash-boot.bin + +Note that the file name is a path relative to the firmware loading path +(usually ``/lib/firmware/``). Drivers may send status updates to inform +user space about the progress of the update operation. + +Firmware Loading +================ + +Devices which require firmware to operate usually store it in non-volatile +memory on the board, e.g. flash. Some devices store only basic firmware on +the board, and the driver loads the rest from disk during probing. +``devlink-info`` allows users to query firmware information (loaded +components and versions). + +In other cases the device can both store the image on the board, load from +disk, or automatically flash a new image from disk. The ``fw_load_policy`` +devlink parameter can be used to control this behavior +(:ref:`Documentation/networking/devlink/devlink-params.rst <devlink_params_generic>`). + +On-disk firmware files are usually stored in ``/lib/firmware/``. + +Firmware Version Management +=========================== + +Drivers are expected to implement ``devlink-flash`` and ``devlink-info`` +functionality, which together allow for implementing vendor-independent +automated firmware update facilities. + +``devlink-info`` exposes the ``driver`` name and three version groups +(``fixed``, ``running``, ``stored``). + +The ``driver`` attribute and ``fixed`` group identify the specific device +design, e.g. for looking up applicable firmware updates. This is why +``serial_number`` is not part of the ``fixed`` versions (even though it +is fixed) - ``fixed`` versions should identify the design, not a single +device. + +``running`` and ``stored`` firmware versions identify the firmware running +on the device, and firmware which will be activated after reboot or device +reset. + +The firmware update agent is supposed to be able to follow this simple +algorithm to update firmware contents, regardless of the device vendor: + +.. code-block:: sh + + # Get unique HW design identifier + $hw_id = devlink-dev-info['fixed'] + + # Find out which FW flash we want to use for this NIC + $want_flash_vers = some-db-backed.lookup($hw_id, 'flash') + + # Update flash if necessary + if $want_flash_vers != devlink-dev-info['stored']: + $file = some-db-backed.download($hw_id, 'flash') + devlink-dev-flash($file) + + # Find out the expected overall firmware versions + $want_fw_vers = some-db-backed.lookup($hw_id, 'all') + + # Update on-disk file if necessary + if $want_fw_vers != devlink-dev-info['running']: + $file = some-db-backed.download($hw_id, 'disk') + write($file, '/lib/firmware/') + + # Try device reset, if available + if $want_fw_vers != devlink-dev-info['running']: + devlink-reset() + + # Reboot, if reset wasn't enough + if $want_fw_vers != devlink-dev-info['running']: + reboot() + +Note that each reference to ``devlink-dev-info`` in this pseudo-code +is expected to fetch up-to-date information from the kernel. + +For the convenience of identifying firmware files some vendors add +``bundle_id`` information to the firmware versions. This meta-version covers +multiple per-component versions and can be used e.g. in firmware file names +(all component versions could get rather long.) diff --git a/Documentation/networking/devlink/devlink-info.rst b/Documentation/networking/devlink/devlink-info.rst index 70981dd1b981..3fe11401b838 100644 --- a/Documentation/networking/devlink/devlink-info.rst +++ b/Documentation/networking/devlink/devlink-info.rst @@ -5,34 +5,119 @@ Devlink Info ============ The ``devlink-info`` mechanism enables device drivers to report device -information in a generic fashion. It is extensible, and enables exporting -even device or driver specific information. +(hardware and firmware) information in a standard, extensible fashion. -devlink supports representing the following types of versions +The original motivation for the ``devlink-info`` API was twofold: -.. list-table:: List of version types + - making it possible to automate device and firmware management in a fleet + of machines in a vendor-independent fashion (see also + :ref:`Documentation/networking/devlink/devlink-flash.rst <devlink_flash>`); + - name the per component FW versions (as opposed to the crowded ethtool + version string). + +``devlink-info`` supports reporting multiple types of objects. Reporting driver +versions is generally discouraged - here, and via any other Linux API. + +.. list-table:: List of top level info objects :widths: 5 95 - * - Type + * - Name - Description + * - ``driver`` + - Name of the currently used device driver, also available through sysfs. + + * - ``serial_number`` + - Serial number of the device. + + This is usually the serial number of the ASIC, also often available + in PCI config space of the device in the *Device Serial Number* + capability. + + The serial number should be unique per physical device. + Sometimes the serial number of the device is only 48 bits long (the + length of the Ethernet MAC address), and since PCI DSN is 64 bits long + devices pad or encode additional information into the serial number. + One example is adding port ID or PCI interface ID in the extra two bytes. + Drivers should make sure to strip or normalize any such padding + or interface ID, and report only the part of the serial number + which uniquely identifies the hardware. In other words serial number + reported for two ports of the same device or on two hosts of + a multi-host device should be identical. + + .. note:: ``devlink-info`` API should be extended with a new field + if devices want to report board/product serial number (often + reported in PCI *Vital Product Data* capability). + * - ``fixed`` - - Represents fixed versions, which cannot change. For example, + - Group for hardware identifiers, and versions of components + which are not field-updatable. + + Versions in this section identify the device design. For example, component identifiers or the board version reported in the PCI VPD. + Data in ``devlink-info`` should be broken into the smallest logical + components, e.g. PCI VPD may concatenate various information + to form the Part Number string, while in ``devlink-info`` all parts + should be reported as separate items. + + This group must not contain any frequently changing identifiers, + such as serial numbers. See + :ref:`Documentation/networking/devlink/devlink-flash.rst <devlink_flash>` + to understand why. + * - ``running`` - - Represents the version of the currently running component. For - example the running version of firmware. These versions generally - only update after a reboot. + - Group for information about currently running software/firmware. + These versions often only update after a reboot, sometimes device reset. + * - ``stored`` - - Represents the version of a component as stored, such as after a - flash update. Stored values should update to reflect changes in the - flash even if a reboot has not yet occurred. + - Group for software/firmware versions in device flash. + + Stored values must update to reflect changes in the flash even + if reboot has not yet occurred. If device is not capable of updating + ``stored`` versions when new software is flashed, it must not report + them. + +Each version can be reported at most once in each version group. Firmware +components stored on the flash should feature in both the ``running`` and +``stored`` sections, if device is capable of reporting ``stored`` versions +(see :ref:`Documentation/networking/devlink/devlink-flash.rst <devlink_flash>`). +In case software/firmware components are loaded from the disk (e.g. +``/lib/firmware``) only the running version should be reported via +the kernel API. Generic Versions ================ It is expected that drivers use the following generic names for exporting -version information. Other information may be exposed using driver-specific -names, but these should be documented in the driver-specific file. +version information. If a generic name for a given component doesn't exist yet, +driver authors should consult existing driver-specific versions and attempt +reuse. As last resort, if a component is truly unique, using driver-specific +names is allowed, but these should be documented in the driver-specific file. + +All versions should try to use the following terminology: + +.. list-table:: List of common version suffixes + :widths: 10 90 + + * - Name + - Description + * - ``id``, ``revision`` + - Identifiers of designs and revision, mostly used for hardware versions. + + * - ``api`` + - Version of API between components. API items are usually of limited + value to the user, and can be inferred from other versions by the vendor, + so adding API versions is generally discouraged as noise. + + * - ``bundle_id`` + - Identifier of a distribution package which was flashed onto the device. + This is an attribute of a firmware package which covers multiple versions + for ease of managing firmware images (see + :ref:`Documentation/networking/devlink/devlink-flash.rst <devlink_flash>`). + + ``bundle_id`` can appear in both ``running`` and ``stored`` versions, + but it must not be reported if any of the components covered by the + ``bundle_id`` was changed and no longer matches the version from + the bundle. board.id -------- @@ -52,7 +137,7 @@ ASIC design identifier. asic.rev -------- -ASIC design revision. +ASIC design revision/stepping. board.manufacture ----------------- @@ -72,6 +157,12 @@ Control unit firmware version. This firmware is responsible for house keeping tasks, PHY control etc. but not the packet-by-packet data path operation. +fw.mgmt.api +----------- + +Firmware interface specification version of the software interfaces between +driver and firmware. + fw.app ------ @@ -91,10 +182,31 @@ Network Controller Sideband Interface. fw.psid ------- -Unique identifier of the firmware parameter set. +Unique identifier of the firmware parameter set. These are usually +parameters of a particular board, defined at manufacturing time. fw.roce ------- RoCE firmware version which is responsible for handling roce management. + +fw.bundle_id +------------ + +Unique identifier of the entire firmware bundle. + +Future work +=========== + +The following extensions could be useful: + + - product serial number - NIC boards often get labeled with a board serial + number rather than ASIC serial number; it'd be useful to add board serial + numbers to the API if they can be retrieved from the device; + + - on-disk firmware file names - drivers list the file names of firmware they + may need to load onto devices via the ``MODULE_FIRMWARE()`` macro. These, + however, are per module, rather than per device. It'd be useful to list + the names of firmware files the driver will try to load for a given device, + in order of priority. diff --git a/Documentation/networking/devlink/devlink-params.rst b/Documentation/networking/devlink/devlink-params.rst index da2f85c0fa21..d075fd090b3d 100644 --- a/Documentation/networking/devlink/devlink-params.rst +++ b/Documentation/networking/devlink/devlink-params.rst @@ -41,6 +41,8 @@ In order for ``driverinit`` parameters to take effect, the driver must support reloading via the ``devlink-reload`` command. This command will request a reload of the device driver. +.. _devlink_params_generic: + Generic configuration parameters ================================ The following is a list of generic configuration parameters that drivers may diff --git a/Documentation/networking/devlink/devlink-region.rst b/Documentation/networking/devlink/devlink-region.rst index 1a7683e7acb2..04e04d1ff627 100644 --- a/Documentation/networking/devlink/devlink-region.rst +++ b/Documentation/networking/devlink/devlink-region.rst @@ -20,6 +20,11 @@ address regions that are otherwise inaccessible to the user. Regions may also be used to provide an additional way to debug complex error states, but see also :doc:`devlink-health` +Regions may optionally support capturing a snapshot on demand via the +``DEVLINK_CMD_REGION_NEW`` netlink message. A driver wishing to allow +requested snapshots must implement the ``.snapshot`` callback for the region +in its ``devlink_region_ops`` structure. + example usage ------------- @@ -29,8 +34,7 @@ example usage $ devlink region show [ DEV/REGION ] $ devlink region del DEV/REGION snapshot SNAPSHOT_ID $ devlink region dump DEV/REGION [ snapshot SNAPSHOT_ID ] - $ devlink region read DEV/REGION [ snapshot SNAPSHOT_ID ] - address ADDRESS length length + $ devlink region read DEV/REGION [ snapshot SNAPSHOT_ID ] address ADDRESS length length # Show all of the exposed regions with region sizes: $ devlink region show @@ -40,8 +44,8 @@ example usage # Delete a snapshot using: $ devlink region del pci/0000:00:05.0/cr-space snapshot 1 - # Trigger (request) a snapshot be taken: - $ devlink region trigger pci/0000:00:05.0/cr-space + # Request an immediate snapshot, if supported by the region + $ devlink region new pci/0000:00:05.0/cr-space snapshot 5 # Dump a snapshot: $ devlink region dump pci/0000:00:05.0/fw-health snapshot 1 @@ -51,8 +55,7 @@ example usage 0000000000000030 bada cce5 bada cce5 bada cce5 bada cce5 # Read a specific part of a snapshot: - $ devlink region read pci/0000:00:05.0/fw-health snapshot 1 address 0 - length 16 + $ devlink region read pci/0000:00:05.0/fw-health snapshot 1 address 0 length 16 0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30 As regions are likely very device or driver specific, no generic regions are diff --git a/Documentation/networking/devlink/devlink-trap.rst b/Documentation/networking/devlink/devlink-trap.rst index 47a429bb8658..a09971c2115c 100644 --- a/Documentation/networking/devlink/devlink-trap.rst +++ b/Documentation/networking/devlink/devlink-trap.rst @@ -238,6 +238,12 @@ be added to the following table: - ``drop`` - Traps NVE packets that the device decided to drop because their overlay source MAC is multicast + * - ``ingress_flow_action_drop`` + - ``drop`` + - Traps packets dropped during processing of ingress flow action drop + * - ``egress_flow_action_drop`` + - ``drop`` + - Traps packets dropped during processing of egress flow action drop Driver-specific Packet Traps ============================ @@ -277,6 +283,35 @@ narrow. The description of these groups must be added to the following table: * - ``tunnel_drops`` - Contains packet traps for packets that were dropped by the device during tunnel encapsulation / decapsulation + * - ``acl_drops`` + - Contains packet traps for packets that were dropped by the device during + ACL processing + +Packet Trap Policers +==================== + +As previously explained, the underlying device can trap certain packets to the +CPU for processing. In most cases, the underlying device is capable of handling +packet rates that are several orders of magnitude higher compared to those that +can be handled by the CPU. + +Therefore, in order to prevent the underlying device from overwhelming the CPU, +devices usually include packet trap policers that are able to police the +trapped packets to rates that can be handled by the CPU. + +The ``devlink-trap`` mechanism allows capable device drivers to register their +supported packet trap policers with ``devlink``. The device driver can choose +to associate these policers with supported packet trap groups (see +:ref:`Generic-Packet-Trap-Groups`) during its initialization, thereby exposing +its default control plane policy to user space. + +Device drivers should allow user space to change the parameters of the policers +(e.g., rate, burst size) as well as the association between the policers and +trap groups by implementing the relevant callbacks. + +If possible, device drivers should implement a callback that allows user space +to retrieve the number of packets that were dropped by the policer because its +configured policy was violated. Testing ======= diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst new file mode 100644 index 000000000000..5b58fc4e1268 --- /dev/null +++ b/Documentation/networking/devlink/ice.rst @@ -0,0 +1,96 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================== +ice devlink support +=================== + +This document describes the devlink features implemented by the ``ice`` +device driver. + +Info versions +============= + +The ``ice`` driver reports the following versions + +.. list-table:: devlink info versions implemented + :widths: 5 5 5 90 + + * - Name + - Type + - Example + - Description + * - ``board.id`` + - fixed + - K65390-000 + - The Product Board Assembly (PBA) identifier of the board. + * - ``fw.mgmt`` + - running + - 2.1.7 + - 3-digit version number of the management firmware that controls the + PHY, link, etc. + * - ``fw.mgmt.api`` + - running + - 1.5 + - 2-digit version number of the API exported over the AdminQ by the + management firmware. Used by the driver to identify what commands + are supported. + * - ``fw.mgmt.build`` + - running + - 0x305d955f + - Unique identifier of the source for the management firmware. + * - ``fw.undi`` + - running + - 1.2581.0 + - Version of the Option ROM containing the UEFI driver. The version is + reported in ``major.minor.patch`` format. The major version is + incremented whenever a major breaking change occurs, or when the + minor version would overflow. The minor version is incremented for + non-breaking changes and reset to 1 when the major version is + incremented. The patch version is normally 0 but is incremented when + a fix is delivered as a patch against an older base Option ROM. + * - ``fw.psid.api`` + - running + - 0.80 + - Version defining the format of the flash contents. + * - ``fw.bundle_id`` + - running + - 0x80002ec0 + - Unique identifier of the firmware image file that was loaded onto + the device. Also referred to as the EETRACK identifier of the NVM. + * - ``fw.app.name`` + - running + - ICE OS Default Package + - The name of the DDP package that is active in the device. The DDP + package is loaded by the driver during initialization. Each varation + of DDP package shall have a unique name. + * - ``fw.app`` + - running + - 1.3.1.0 + - The version of the DDP package that is active in the device. Note + that both the name (as reported by ``fw.app.name``) and version are + required to uniquely identify the package. + +Regions +======= + +The ``ice`` driver enables access to the contents of the Non Volatile Memory +flash chip via the ``nvm-flash`` region. + +Users can request an immediate capture of a snapshot via the +``DEVLINK_CMD_REGION_NEW`` + +.. code:: shell + + $ devlink region new pci/0000:01:00.0/nvm-flash snapshot 1 + $ devlink region dump pci/0000:01:00.0/nvm-flash snapshot 1 + + $ devlink region dump pci/0000:01:00.0/nvm-flash snapshot 1 + 0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30 + 0000000000000010 0000 0000 ffff ff04 0029 8c00 0028 8cc8 + 0000000000000020 0016 0bb8 0016 1720 0000 0000 c00f 3ffc + 0000000000000030 bada cce5 bada cce5 bada cce5 bada cce5 + + $ devlink region read pci/0000:01:00.0/nvm-flash snapshot 1 address 0 length 16 + 0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30 + + $ devlink region delete pci/0000:01:00.0/nvm-flash snapshot 1 diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst index 087ff54d53fc..c536db2cc0f9 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -16,6 +16,7 @@ general. devlink-dpipe devlink-health devlink-info + devlink-flash devlink-params devlink-region devlink-resource @@ -32,6 +33,7 @@ parameters, info versions, and other features it supports. bnxt ionic + ice mlx4 mlx5 mlxsw diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 629a6e69c036..4e4b97f7971a 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -37,6 +37,12 @@ parameters. * ``smfs`` Software managed flow steering. In SMFS mode, the HW steering entities are created and manage through the driver without firmware intervention. + * - ``fdb_large_groups`` + - u32 + - driverinit + - Control the number of large groups (size > 1) in the FDB table. + + * The default value is 15, and the range is between 1 and 1024. The ``mlx5`` driver supports reloading via ``DEVLINK_CMD_RELOAD`` diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index f1f868479ceb..567326491f80 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -189,6 +189,21 @@ Userspace to kernel: ``ETHTOOL_MSG_DEBUG_SET`` set debugging settings ``ETHTOOL_MSG_WOL_GET`` get wake-on-lan settings ``ETHTOOL_MSG_WOL_SET`` set wake-on-lan settings + ``ETHTOOL_MSG_FEATURES_GET`` get device features + ``ETHTOOL_MSG_FEATURES_SET`` set device features + ``ETHTOOL_MSG_PRIVFLAGS_GET`` get private flags + ``ETHTOOL_MSG_PRIVFLAGS_SET`` set private flags + ``ETHTOOL_MSG_RINGS_GET`` get ring sizes + ``ETHTOOL_MSG_RINGS_SET`` set ring sizes + ``ETHTOOL_MSG_CHANNELS_GET`` get channel counts + ``ETHTOOL_MSG_CHANNELS_SET`` set channel counts + ``ETHTOOL_MSG_COALESCE_GET`` get coalescing parameters + ``ETHTOOL_MSG_COALESCE_SET`` set coalescing parameters + ``ETHTOOL_MSG_PAUSE_GET`` get pause parameters + ``ETHTOOL_MSG_PAUSE_SET`` set pause parameters + ``ETHTOOL_MSG_EEE_GET`` get EEE settings + ``ETHTOOL_MSG_EEE_SET`` set EEE settings + ``ETHTOOL_MSG_TSINFO_GET`` get timestamping info ===================================== ================================ Kernel to userspace: @@ -204,6 +219,22 @@ Kernel to userspace: ``ETHTOOL_MSG_DEBUG_NTF`` debugging settings notification ``ETHTOOL_MSG_WOL_GET_REPLY`` wake-on-lan settings ``ETHTOOL_MSG_WOL_NTF`` wake-on-lan settings notification + ``ETHTOOL_MSG_FEATURES_GET_REPLY`` device features + ``ETHTOOL_MSG_FEATURES_SET_REPLY`` optional reply to FEATURES_SET + ``ETHTOOL_MSG_FEATURES_NTF`` netdev features notification + ``ETHTOOL_MSG_PRIVFLAGS_GET_REPLY`` private flags + ``ETHTOOL_MSG_PRIVFLAGS_NTF`` private flags + ``ETHTOOL_MSG_RINGS_GET_REPLY`` ring sizes + ``ETHTOOL_MSG_RINGS_NTF`` ring sizes + ``ETHTOOL_MSG_CHANNELS_GET_REPLY`` channel counts + ``ETHTOOL_MSG_CHANNELS_NTF`` channel counts + ``ETHTOOL_MSG_COALESCE_GET_REPLY`` coalescing parameters + ``ETHTOOL_MSG_COALESCE_NTF`` coalescing parameters + ``ETHTOOL_MSG_PAUSE_GET_REPLY`` pause parameters + ``ETHTOOL_MSG_PAUSE_NTF`` pause parameters + ``ETHTOOL_MSG_EEE_GET_REPLY`` EEE settings + ``ETHTOOL_MSG_EEE_NTF`` EEE settings + ``ETHTOOL_MSG_TSINFO_GET_REPLY`` timestamping info ===================================== ================================= ``GET`` requests are sent by userspace applications to retrieve device @@ -521,6 +552,410 @@ Request contents: ``WAKE_MAGICSECURE`` mode. +FEATURES_GET +============ + +Gets netdev features like ``ETHTOOL_GFEATURES`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_FEATURES_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_FEATURES_HEADER`` nested reply header + ``ETHTOOL_A_FEATURES_HW`` bitset dev->hw_features + ``ETHTOOL_A_FEATURES_WANTED`` bitset dev->wanted_features + ``ETHTOOL_A_FEATURES_ACTIVE`` bitset dev->features + ``ETHTOOL_A_FEATURES_NOCHANGE`` bitset NETIF_F_NEVER_CHANGE + ==================================== ====== ========================== + +Bitmaps in kernel response have the same meaning as bitmaps used in ioctl +interference but attribute names are different (they are based on +corresponding members of struct net_device). Legacy "flags" are not provided, +if userspace needs them (most likely only ethtool for backward compatibility), +it can calculate their values from related feature bits itself. +ETHA_FEATURES_HW uses mask consisting of all features recognized by kernel (to +provide all names when using verbose bitmap format), the other three use no +mask (simple bit lists). + + +FEATURES_SET +============ + +Request to set netdev features like ``ETHTOOL_SFEATURES`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_FEATURES_HEADER`` nested request header + ``ETHTOOL_A_FEATURES_WANTED`` bitset requested features + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_FEATURES_HEADER`` nested reply header + ``ETHTOOL_A_FEATURES_WANTED`` bitset diff wanted vs. result + ``ETHTOOL_A_FEATURES_ACTIVE`` bitset diff old vs. new active + ==================================== ====== ========================== + +Request constains only one bitset which can be either value/mask pair (request +to change specific feature bits and leave the rest) or only a value (request +to set all features to specified set). + +As request is subject to netdev_change_features() sanity checks, optional +kernel reply (can be suppressed by ``ETHTOOL_FLAG_OMIT_REPLY`` flag in request +header) informs client about the actual result. ``ETHTOOL_A_FEATURES_WANTED`` +reports the difference between client request and actual result: mask consists +of bits which differ between requested features and result (dev->features +after the operation), value consists of values of these bits in the request +(i.e. negated values from resulting features). ``ETHTOOL_A_FEATURES_ACTIVE`` +reports the difference between old and new dev->features: mask consists of +bits which have changed, values are their values in new dev->features (after +the operation). + +``ETHTOOL_MSG_FEATURES_NTF`` notification is sent not only if device features +are modified using ``ETHTOOL_MSG_FEATURES_SET`` request or on of ethtool ioctl +request but also each time features are modified with netdev_update_features() +or netdev_change_features(). + + +PRIVFLAGS_GET +============= + +Gets private flags like ``ETHTOOL_GPFLAGS`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_PRIVFLAGS_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_PRIVFLAGS_HEADER`` nested reply header + ``ETHTOOL_A_PRIVFLAGS_FLAGS`` bitset private flags + ==================================== ====== ========================== + +``ETHTOOL_A_PRIVFLAGS_FLAGS`` is a bitset with values of device private flags. +These flags are defined by driver, their number and names (and also meaning) +are device dependent. For compact bitset format, names can be retrieved as +``ETH_SS_PRIV_FLAGS`` string set. If verbose bitset format is requested, +response uses all private flags supported by the device as mask so that client +gets the full information without having to fetch the string set with names. + + +PRIVFLAGS_SET +============= + +Sets or modifies values of device private flags like ``ETHTOOL_SPFLAGS`` +ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_PRIVFLAGS_HEADER`` nested request header + ``ETHTOOL_A_PRIVFLAGS_FLAGS`` bitset private flags + ==================================== ====== ========================== + +``ETHTOOL_A_PRIVFLAGS_FLAGS`` can either set the whole set of private flags or +modify only values of some of them. + + +RINGS_GET +========= + +Gets ring sizes like ``ETHTOOL_GRINGPARAM`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_RINGS_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_RINGS_HEADER`` nested reply header + ``ETHTOOL_A_RINGS_RX_MAX`` u32 max size of RX ring + ``ETHTOOL_A_RINGS_RX_MINI_MAX`` u32 max size of RX mini ring + ``ETHTOOL_A_RINGS_RX_JUMBO_MAX`` u32 max size of RX jumbo ring + ``ETHTOOL_A_RINGS_TX_MAX`` u32 max size of TX ring + ``ETHTOOL_A_RINGS_RX`` u32 size of RX ring + ``ETHTOOL_A_RINGS_RX_MINI`` u32 size of RX mini ring + ``ETHTOOL_A_RINGS_RX_JUMBO`` u32 size of RX jumbo ring + ``ETHTOOL_A_RINGS_TX`` u32 size of TX ring + ==================================== ====== ========================== + + +RINGS_SET +========= + +Sets ring sizes like ``ETHTOOL_SRINGPARAM`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_RINGS_HEADER`` nested reply header + ``ETHTOOL_A_RINGS_RX`` u32 size of RX ring + ``ETHTOOL_A_RINGS_RX_MINI`` u32 size of RX mini ring + ``ETHTOOL_A_RINGS_RX_JUMBO`` u32 size of RX jumbo ring + ``ETHTOOL_A_RINGS_TX`` u32 size of TX ring + ==================================== ====== ========================== + +Kernel checks that requested ring sizes do not exceed limits reported by +driver. Driver may impose additional constraints and may not suspport all +attributes. + + +CHANNELS_GET +============ + +Gets channel counts like ``ETHTOOL_GCHANNELS`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_CHANNELS_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_CHANNELS_HEADER`` nested reply header + ``ETHTOOL_A_CHANNELS_RX_MAX`` u32 max receive channels + ``ETHTOOL_A_CHANNELS_TX_MAX`` u32 max transmit channels + ``ETHTOOL_A_CHANNELS_OTHER_MAX`` u32 max other channels + ``ETHTOOL_A_CHANNELS_COMBINED_MAX`` u32 max combined channels + ``ETHTOOL_A_CHANNELS_RX_COUNT`` u32 receive channel count + ``ETHTOOL_A_CHANNELS_TX_COUNT`` u32 transmit channel count + ``ETHTOOL_A_CHANNELS_OTHER_COUNT`` u32 other channel count + ``ETHTOOL_A_CHANNELS_COMBINED_COUNT`` u32 combined channel count + ===================================== ====== ========================== + + +CHANNELS_SET +============ + +Sets channel counts like ``ETHTOOL_SCHANNELS`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_CHANNELS_HEADER`` nested request header + ``ETHTOOL_A_CHANNELS_RX_COUNT`` u32 receive channel count + ``ETHTOOL_A_CHANNELS_TX_COUNT`` u32 transmit channel count + ``ETHTOOL_A_CHANNELS_OTHER_COUNT`` u32 other channel count + ``ETHTOOL_A_CHANNELS_COMBINED_COUNT`` u32 combined channel count + ===================================== ====== ========================== + +Kernel checks that requested channel counts do not exceed limits reported by +driver. Driver may impose additional constraints and may not suspport all +attributes. + + +COALESCE_GET +============ + +Gets coalescing parameters like ``ETHTOOL_GCOALESCE`` ioctl request. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_COALESCE_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + =========================================== ====== ======================= + ``ETHTOOL_A_COALESCE_HEADER`` nested reply header + ``ETHTOOL_A_COALESCE_RX_USECS`` u32 delay (us), normal Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES`` u32 max packets, normal Rx + ``ETHTOOL_A_COALESCE_RX_USECS_IRQ`` u32 delay (us), Rx in IRQ + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_IRQ`` u32 max packets, Rx in IRQ + ``ETHTOOL_A_COALESCE_TX_USECS`` u32 delay (us), normal Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES`` u32 max packets, normal Tx + ``ETHTOOL_A_COALESCE_TX_USECS_IRQ`` u32 delay (us), Tx in IRQ + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_IRQ`` u32 IRQ packets, Tx in IRQ + ``ETHTOOL_A_COALESCE_STATS_BLOCK_USECS`` u32 delay of stats update + ``ETHTOOL_A_COALESCE_USE_ADAPTIVE_RX`` bool adaptive Rx coalesce + ``ETHTOOL_A_COALESCE_USE_ADAPTIVE_TX`` bool adaptive Tx coalesce + ``ETHTOOL_A_COALESCE_PKT_RATE_LOW`` u32 threshold for low rate + ``ETHTOOL_A_COALESCE_RX_USECS_LOW`` u32 delay (us), low Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_LOW`` u32 max packets, low Rx + ``ETHTOOL_A_COALESCE_TX_USECS_LOW`` u32 delay (us), low Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW`` u32 max packets, low Tx + ``ETHTOOL_A_COALESCE_PKT_RATE_HIGH`` u32 threshold for high rate + ``ETHTOOL_A_COALESCE_RX_USECS_HIGH`` u32 delay (us), high Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_HIGH`` u32 max packets, high Rx + ``ETHTOOL_A_COALESCE_TX_USECS_HIGH`` u32 delay (us), high Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH`` u32 max packets, high Tx + ``ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL`` u32 rate sampling interval + =========================================== ====== ======================= + +Attributes are only included in reply if their value is not zero or the +corresponding bit in ``ethtool_ops::supported_coalesce_params`` is set (i.e. +they are declared as supported by driver). + + +COALESCE_SET +============ + +Sets coalescing parameters like ``ETHTOOL_SCOALESCE`` ioctl request. + +Request contents: + + =========================================== ====== ======================= + ``ETHTOOL_A_COALESCE_HEADER`` nested request header + ``ETHTOOL_A_COALESCE_RX_USECS`` u32 delay (us), normal Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES`` u32 max packets, normal Rx + ``ETHTOOL_A_COALESCE_RX_USECS_IRQ`` u32 delay (us), Rx in IRQ + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_IRQ`` u32 max packets, Rx in IRQ + ``ETHTOOL_A_COALESCE_TX_USECS`` u32 delay (us), normal Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES`` u32 max packets, normal Tx + ``ETHTOOL_A_COALESCE_TX_USECS_IRQ`` u32 delay (us), Tx in IRQ + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_IRQ`` u32 IRQ packets, Tx in IRQ + ``ETHTOOL_A_COALESCE_STATS_BLOCK_USECS`` u32 delay of stats update + ``ETHTOOL_A_COALESCE_USE_ADAPTIVE_RX`` bool adaptive Rx coalesce + ``ETHTOOL_A_COALESCE_USE_ADAPTIVE_TX`` bool adaptive Tx coalesce + ``ETHTOOL_A_COALESCE_PKT_RATE_LOW`` u32 threshold for low rate + ``ETHTOOL_A_COALESCE_RX_USECS_LOW`` u32 delay (us), low Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_LOW`` u32 max packets, low Rx + ``ETHTOOL_A_COALESCE_TX_USECS_LOW`` u32 delay (us), low Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW`` u32 max packets, low Tx + ``ETHTOOL_A_COALESCE_PKT_RATE_HIGH`` u32 threshold for high rate + ``ETHTOOL_A_COALESCE_RX_USECS_HIGH`` u32 delay (us), high Rx + ``ETHTOOL_A_COALESCE_RX_MAX_FRAMES_HIGH`` u32 max packets, high Rx + ``ETHTOOL_A_COALESCE_TX_USECS_HIGH`` u32 delay (us), high Tx + ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH`` u32 max packets, high Tx + ``ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL`` u32 rate sampling interval + =========================================== ====== ======================= + +Request is rejected if it attributes declared as unsupported by driver (i.e. +such that the corresponding bit in ``ethtool_ops::supported_coalesce_params`` +is not set), regardless of their values. Driver may impose additional +constraints on coalescing parameters and their values. + + +PAUSE_GET +============ + +Gets channel counts like ``ETHTOOL_GPAUSE`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_PAUSE_HEADER`` nested request header + ===================================== ====== ========================== + +Kernel response contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_PAUSE_HEADER`` nested request header + ``ETHTOOL_A_PAUSE_AUTONEG`` bool pause autonegotiation + ``ETHTOOL_A_PAUSE_RX`` bool receive pause frames + ``ETHTOOL_A_PAUSE_TX`` bool transmit pause frames + ===================================== ====== ========================== + + +PAUSE_SET +============ + +Sets pause parameters like ``ETHTOOL_GPAUSEPARAM`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_PAUSE_HEADER`` nested request header + ``ETHTOOL_A_PAUSE_AUTONEG`` bool pause autonegotiation + ``ETHTOOL_A_PAUSE_RX`` bool receive pause frames + ``ETHTOOL_A_PAUSE_TX`` bool transmit pause frames + ===================================== ====== ========================== + + +EEE_GET +======= + +Gets channel counts like ``ETHTOOL_GEEE`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_EEE_HEADER`` nested request header + ===================================== ====== ========================== + +Kernel response contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_EEE_HEADER`` nested request header + ``ETHTOOL_A_EEE_MODES_OURS`` bool supported/advertised modes + ``ETHTOOL_A_EEE_MODES_PEER`` bool peer advertised link modes + ``ETHTOOL_A_EEE_ACTIVE`` bool EEE is actively used + ``ETHTOOL_A_EEE_ENABLED`` bool EEE is enabled + ``ETHTOOL_A_EEE_TX_LPI_ENABLED`` bool Tx lpi enabled + ``ETHTOOL_A_EEE_TX_LPI_TIMER`` u32 Tx lpi timeout (in us) + ===================================== ====== ========================== + +In ``ETHTOOL_A_EEE_MODES_OURS``, mask consists of link modes for which EEE is +enabled, value of link modes for which EEE is advertised. Link modes for which +peer advertises EEE are listed in ``ETHTOOL_A_EEE_MODES_PEER`` (no mask). The +netlink interface allows reporting EEE status for all link modes but only +first 32 are provided by the ``ethtool_ops`` callback. + + +EEE_SET +======= + +Sets pause parameters like ``ETHTOOL_GEEEPARAM`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_EEE_HEADER`` nested request header + ``ETHTOOL_A_EEE_MODES_OURS`` bool advertised modes + ``ETHTOOL_A_EEE_ENABLED`` bool EEE is enabled + ``ETHTOOL_A_EEE_TX_LPI_ENABLED`` bool Tx lpi enabled + ``ETHTOOL_A_EEE_TX_LPI_TIMER`` u32 Tx lpi timeout (in us) + ===================================== ====== ========================== + +``ETHTOOL_A_EEE_MODES_OURS`` is used to either list link modes to advertise +EEE for (if there is no mask) or specify changes to the list (if there is +a mask). The netlink interface allows reporting EEE status for all link modes +but only first 32 can be set at the moment as that is what the ``ethtool_ops`` +callback supports. + + +TSINFO_GET +========== + +Gets timestamping information like ``ETHTOOL_GET_TS_INFO`` ioctl request. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_TSINFO_HEADER`` nested request header + ===================================== ====== ========================== + +Kernel response contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_TSINFO_HEADER`` nested request header + ``ETHTOOL_A_TSINFO_TIMESTAMPING`` bitset SO_TIMESTAMPING flags + ``ETHTOOL_A_TSINFO_TX_TYPES`` bitset supported Tx types + ``ETHTOOL_A_TSINFO_RX_FILTERS`` bitset supported Rx filters + ``ETHTOOL_A_TSINFO_PHC_INDEX`` u32 PTP hw clock index + ===================================== ====== ========================== + +``ETHTOOL_A_TSINFO_PHC_INDEX`` is absent if there is no associated PHC (there +is no special value for this case). The bitset attributes are omitted if they +would be empty (no bit set). + + Request translation =================== @@ -545,37 +980,37 @@ have their netlink replacement yet. ``ETHTOOL_GLINK`` ``ETHTOOL_MSG_LINKSTATE_GET`` ``ETHTOOL_GEEPROM`` n/a ``ETHTOOL_SEEPROM`` n/a - ``ETHTOOL_GCOALESCE`` n/a - ``ETHTOOL_SCOALESCE`` n/a - ``ETHTOOL_GRINGPARAM`` n/a - ``ETHTOOL_SRINGPARAM`` n/a - ``ETHTOOL_GPAUSEPARAM`` n/a - ``ETHTOOL_SPAUSEPARAM`` n/a - ``ETHTOOL_GRXCSUM`` n/a - ``ETHTOOL_SRXCSUM`` n/a - ``ETHTOOL_GTXCSUM`` n/a - ``ETHTOOL_STXCSUM`` n/a - ``ETHTOOL_GSG`` n/a - ``ETHTOOL_SSG`` n/a + ``ETHTOOL_GCOALESCE`` ``ETHTOOL_MSG_COALESCE_GET`` + ``ETHTOOL_SCOALESCE`` ``ETHTOOL_MSG_COALESCE_SET`` + ``ETHTOOL_GRINGPARAM`` ``ETHTOOL_MSG_RINGS_GET`` + ``ETHTOOL_SRINGPARAM`` ``ETHTOOL_MSG_RINGS_SET`` + ``ETHTOOL_GPAUSEPARAM`` ``ETHTOOL_MSG_PAUSE_GET`` + ``ETHTOOL_SPAUSEPARAM`` ``ETHTOOL_MSG_PAUSE_SET`` + ``ETHTOOL_GRXCSUM`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SRXCSUM`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GTXCSUM`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_STXCSUM`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GSG`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SSG`` ``ETHTOOL_MSG_FEATURES_SET`` ``ETHTOOL_TEST`` n/a ``ETHTOOL_GSTRINGS`` ``ETHTOOL_MSG_STRSET_GET`` ``ETHTOOL_PHYS_ID`` n/a ``ETHTOOL_GSTATS`` n/a - ``ETHTOOL_GTSO`` n/a - ``ETHTOOL_STSO`` n/a + ``ETHTOOL_GTSO`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_STSO`` ``ETHTOOL_MSG_FEATURES_SET`` ``ETHTOOL_GPERMADDR`` rtnetlink ``RTM_GETLINK`` - ``ETHTOOL_GUFO`` n/a - ``ETHTOOL_SUFO`` n/a - ``ETHTOOL_GGSO`` n/a - ``ETHTOOL_SGSO`` n/a - ``ETHTOOL_GFLAGS`` n/a - ``ETHTOOL_SFLAGS`` n/a - ``ETHTOOL_GPFLAGS`` n/a - ``ETHTOOL_SPFLAGS`` n/a + ``ETHTOOL_GUFO`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SUFO`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GGSO`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SGSO`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GFLAGS`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SFLAGS`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GPFLAGS`` ``ETHTOOL_MSG_PRIVFLAGS_GET`` + ``ETHTOOL_SPFLAGS`` ``ETHTOOL_MSG_PRIVFLAGS_SET`` ``ETHTOOL_GRXFH`` n/a ``ETHTOOL_SRXFH`` n/a - ``ETHTOOL_GGRO`` n/a - ``ETHTOOL_SGRO`` n/a + ``ETHTOOL_GGRO`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SGRO`` ``ETHTOOL_MSG_FEATURES_SET`` ``ETHTOOL_GRXRINGS`` n/a ``ETHTOOL_GRXCLSRLCNT`` n/a ``ETHTOOL_GRXCLSRULE`` n/a @@ -589,18 +1024,18 @@ have their netlink replacement yet. ``ETHTOOL_GSSET_INFO`` ``ETHTOOL_MSG_STRSET_GET`` ``ETHTOOL_GRXFHINDIR`` n/a ``ETHTOOL_SRXFHINDIR`` n/a - ``ETHTOOL_GFEATURES`` n/a - ``ETHTOOL_SFEATURES`` n/a - ``ETHTOOL_GCHANNELS`` n/a - ``ETHTOOL_SCHANNELS`` n/a + ``ETHTOOL_GFEATURES`` ``ETHTOOL_MSG_FEATURES_GET`` + ``ETHTOOL_SFEATURES`` ``ETHTOOL_MSG_FEATURES_SET`` + ``ETHTOOL_GCHANNELS`` ``ETHTOOL_MSG_CHANNELS_GET`` + ``ETHTOOL_SCHANNELS`` ``ETHTOOL_MSG_CHANNELS_SET`` ``ETHTOOL_SET_DUMP`` n/a ``ETHTOOL_GET_DUMP_FLAG`` n/a ``ETHTOOL_GET_DUMP_DATA`` n/a - ``ETHTOOL_GET_TS_INFO`` n/a + ``ETHTOOL_GET_TS_INFO`` ``ETHTOOL_MSG_TSINFO_GET`` ``ETHTOOL_GMODULEINFO`` n/a ``ETHTOOL_GMODULEEEPROM`` n/a - ``ETHTOOL_GEEE`` n/a - ``ETHTOOL_SEEE`` n/a + ``ETHTOOL_GEEE`` ``ETHTOOL_MSG_EEE_GET`` + ``ETHTOOL_SEEE`` ``ETHTOOL_MSG_EEE_SET`` ``ETHTOOL_GRSSH`` n/a ``ETHTOOL_SRSSH`` n/a ``ETHTOOL_GTUNABLE`` n/a diff --git a/Documentation/networking/filter.txt b/Documentation/networking/filter.txt index c4a328f2d57a..2f0f8b17dade 100644 --- a/Documentation/networking/filter.txt +++ b/Documentation/networking/filter.txt @@ -606,7 +606,7 @@ before a conversion to the new layout is being done behind the scenes! Currently, the classic BPF format is being used for JITing on most 32-bit architectures, whereas x86-64, aarch64, s390x, powerpc64, -sparc64, arm32, riscv (RV64G) perform JIT compilation from eBPF +sparc64, arm32, riscv64, riscv32 perform JIT compilation from eBPF instruction set. Some core changes of the new internal format: diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index d07d9855dcd3..50133d9761c9 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -8,6 +8,7 @@ Contents: netdev-FAQ af_xdp + bareudp batman-adv can can_ucan_protocol @@ -33,6 +34,7 @@ Contents: tls tls-offload nfc + 6lowpan .. only:: subproject and html diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt index 5f53faff4e25..ee961d322d93 100644 --- a/Documentation/networking/ip-sysctl.txt +++ b/Documentation/networking/ip-sysctl.txt @@ -958,6 +958,15 @@ ip_nonlocal_bind - BOOLEAN which can be quite useful - but may break some applications. Default: 0 +ip_autobind_reuse - BOOLEAN + By default, bind() does not select the ports automatically even if + the new socket and all sockets bound to the port have SO_REUSEADDR. + ip_autobind_reuse allows bind() to reuse the port and this is useful + when you use bind()+connect(), but may break some applications. + The preferred solution is to use IP_BIND_ADDRESS_NO_PORT and this + option should only be set by experts. + Default: 0 + ip_dynaddr - BOOLEAN If set non-zero, enables support for dynamic addresses. If set to a non-zero value larger than 1, a kernel log diff --git a/Documentation/networking/net_failover.rst b/Documentation/networking/net_failover.rst index 06c97dcb57ca..e143ab79a960 100644 --- a/Documentation/networking/net_failover.rst +++ b/Documentation/networking/net_failover.rst @@ -8,9 +8,9 @@ Overview ======== The net_failover driver provides an automated failover mechanism via APIs -to create and destroy a failover master netdev and mananges a primary and +to create and destroy a failover master netdev and manages a primary and standby slave netdevs that get registered via the generic failover -infrastructrure. +infrastructure. The failover netdev acts a master device and controls 2 slave devices. The original paravirtual interface is registered as 'standby' slave netdev and @@ -29,7 +29,7 @@ virtio-net accelerated datapath: STANDBY mode ============================================= net_failover enables hypervisor controlled accelerated datapath to virtio-net -enabled VMs in a transparent manner with no/minimal guest userspace chanages. +enabled VMs in a transparent manner with no/minimal guest userspace changes. To support this, the hypervisor needs to enable VIRTIO_NET_F_STANDBY feature on the virtio-net interface and assign the same MAC address to both diff --git a/Documentation/networking/page_pool.rst b/Documentation/networking/page_pool.rst new file mode 100644 index 000000000000..43088ddf95e4 --- /dev/null +++ b/Documentation/networking/page_pool.rst @@ -0,0 +1,159 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +Page Pool API +============= + +The page_pool allocator is optimized for the XDP mode that uses one frame +per-page, but it can fallback on the regular page allocator APIs. + +Basic use involves replacing alloc_pages() calls with the +page_pool_alloc_pages() call. Drivers should use page_pool_dev_alloc_pages() +replacing dev_alloc_pages(). + +API keeps track of inflight pages, in order to let API user know +when it is safe to free a page_pool object. Thus, API users +must run page_pool_release_page() when a page is leaving the page_pool or +call page_pool_put_page() where appropriate in order to maintain correct +accounting. + +API user must call page_pool_put_page() once on a page, as it +will either recycle the page, or in case of refcnt > 1, it will +release the DMA mapping and inflight state accounting. + +Architecture overview +===================== + +.. code-block:: none + + +------------------+ + | Driver | + +------------------+ + ^ + | + | + | + v + +--------------------------------------------+ + | request memory | + +--------------------------------------------+ + ^ ^ + | | + | Pool empty | Pool has entries + | | + v v + +-----------------------+ +------------------------+ + | alloc (and map) pages | | get page from cache | + +-----------------------+ +------------------------+ + ^ ^ + | | + | cache available | No entries, refill + | | from ptr-ring + | | + v v + +-----------------+ +------------------+ + | Fast cache | | ptr-ring cache | + +-----------------+ +------------------+ + +API interface +============= +The number of pools created **must** match the number of hardware queues +unless hardware restrictions make that impossible. This would otherwise beat the +purpose of page pool, which is allocate pages fast from cache without locking. +This lockless guarantee naturally comes from running under a NAPI softirq. +The protection doesn't strictly have to be NAPI, any guarantee that allocating +a page will cause no race conditions is enough. + +* page_pool_create(): Create a pool. + * flags: PP_FLAG_DMA_MAP, PP_FLAG_DMA_SYNC_DEV + * order: 2^order pages on allocation + * pool_size: size of the ptr_ring + * nid: preferred NUMA node for allocation + * dev: struct device. Used on DMA operations + * dma_dir: DMA direction + * max_len: max DMA sync memory size + * offset: DMA address offset + +* page_pool_put_page(): The outcome of this depends on the page refcnt. If the + driver bumps the refcnt > 1 this will unmap the page. If the page refcnt is 1 + the allocator owns the page and will try to recycle it in one of the pool + caches. If PP_FLAG_DMA_SYNC_DEV is set, the page will be synced for_device + using dma_sync_single_range_for_device(). + +* page_pool_put_full_page(): Similar to page_pool_put_page(), but will DMA sync + for the entire memory area configured in area pool->max_len. + +* page_pool_recycle_direct(): Similar to page_pool_put_full_page() but caller + must guarantee safe context (e.g NAPI), since it will recycle the page + directly into the pool fast cache. + +* page_pool_release_page(): Unmap the page (if mapped) and account for it on + inflight counters. + +* page_pool_dev_alloc_pages(): Get a page from the page allocator or page_pool + caches. + +* page_pool_get_dma_addr(): Retrieve the stored DMA address. + +* page_pool_get_dma_dir(): Retrieve the stored DMA direction. + +Coding examples +=============== + +Registration +------------ + +.. code-block:: c + + /* Page pool registration */ + struct page_pool_params pp_params = { 0 }; + struct xdp_rxq_info xdp_rxq; + int err; + + pp_params.order = 0; + /* internal DMA mapping in page_pool */ + pp_params.flags = PP_FLAG_DMA_MAP; + pp_params.pool_size = DESC_NUM; + pp_params.nid = NUMA_NO_NODE; + pp_params.dev = priv->dev; + pp_params.dma_dir = xdp_prog ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE; + page_pool = page_pool_create(&pp_params); + + err = xdp_rxq_info_reg(&xdp_rxq, ndev, 0); + if (err) + goto err_out; + + err = xdp_rxq_info_reg_mem_model(&xdp_rxq, MEM_TYPE_PAGE_POOL, page_pool); + if (err) + goto err_out; + +NAPI poller +----------- + + +.. code-block:: c + + /* NAPI Rx poller */ + enum dma_data_direction dma_dir; + + dma_dir = page_pool_get_dma_dir(dring->page_pool); + while (done < budget) { + if (some error) + page_pool_recycle_direct(page_pool, page); + if (packet_is_xdp) { + if XDP_DROP: + page_pool_recycle_direct(page_pool, page); + } else (packet_is_skb) { + page_pool_release_page(page_pool, page); + new_page = page_pool_dev_alloc_pages(page_pool); + } + } + +Driver unload +------------- + +.. code-block:: c + + /* Driver unload */ + page_pool_put_full_page(page_pool, page, false); + xdp_rxq_info_unreg(&xdp_rxq); diff --git a/Documentation/networking/rds.txt b/Documentation/networking/rds.txt index f2a0147c933d..eec61694e894 100644 --- a/Documentation/networking/rds.txt +++ b/Documentation/networking/rds.txt @@ -159,7 +159,7 @@ Socket Interface set SO_RDS_TRANSPORT on a socket for which the transport has been previously attached explicitly (by SO_RDS_TRANSPORT) or implicitly (via bind(2)) will return an error of EOPNOTSUPP. - An attempt to set SO_RDS_TRANSPPORT to RDS_TRANS_NONE will + An attempt to set SO_RDS_TRANSPORT to RDS_TRANS_NONE will always return EINVAL. RDMA for RDS diff --git a/Documentation/networking/sfp-phylink.rst b/Documentation/networking/sfp-phylink.rst index d753a309f9d1..5aec7c8857d0 100644 --- a/Documentation/networking/sfp-phylink.rst +++ b/Documentation/networking/sfp-phylink.rst @@ -74,10 +74,13 @@ phylib to the sfp/phylink support. Please send patches to improve this documentation. 1. Optionally split the network driver's phylib update function into - three parts dealing with link-down, link-up and reconfiguring the - MAC settings. This can be done as a separate preparation commit. + two parts dealing with link-down and link-up. This can be done as + a separate preparation commit. - An example of this preparation can be found in git commit fc548b991fb0. + An older example of this preparation can be found in git commit + fc548b991fb0, although this was splitting into three parts; the + link-up part now includes configuring the MAC for the link settings. + Please see :c:func:`mac_link_up` for more information on this. 2. Replace:: @@ -135,27 +138,27 @@ this documentation. .. code-block:: c - static int foo_ethtool_set_link_ksettings(struct net_device *dev, - const struct ethtool_link_ksettings *cmd) - { - struct foo_priv *priv = netdev_priv(dev); - - return phylink_ethtool_ksettings_set(priv->phylink, cmd); - } - - static int foo_ethtool_get_link_ksettings(struct net_device *dev, - struct ethtool_link_ksettings *cmd) - { - struct foo_priv *priv = netdev_priv(dev); + static int foo_ethtool_set_link_ksettings(struct net_device *dev, + const struct ethtool_link_ksettings *cmd) + { + struct foo_priv *priv = netdev_priv(dev); + + return phylink_ethtool_ksettings_set(priv->phylink, cmd); + } - return phylink_ethtool_ksettings_get(priv->phylink, cmd); - } + static int foo_ethtool_get_link_ksettings(struct net_device *dev, + struct ethtool_link_ksettings *cmd) + { + struct foo_priv *priv = netdev_priv(dev); + + return phylink_ethtool_ksettings_get(priv->phylink, cmd); + } -7. Replace the call to: +7. Replace the call to:: phy_dev = of_phy_connect(dev, node, link_func, flags, phy_interface); - and associated code with a call to: + and associated code with a call to:: err = phylink_of_phy_connect(priv->phylink, node, flags); @@ -207,6 +210,14 @@ this documentation. using. This is particularly important for in-band negotiation methods such as 1000base-X and SGMII. + The :c:func:`mac_link_up` method is used to inform the MAC that the + link has come up. The call includes the negotiation mode and interface + for reference only. The finalised link parameters are also supplied + (speed, duplex and flow control/pause enablement settings) which + should be used to configure the MAC when the MAC and PCS are not + tightly integrated, or when the settings are not coming from in-band + negotiation. + The :c:func:`mac_config` method is used to update the MAC with the requested state, and must avoid unnecessarily taking the link down when making changes to the MAC configuration. This means the diff --git a/Documentation/networking/snmp_counter.rst b/Documentation/networking/snmp_counter.rst index 38a4edc4522b..10e11099e74a 100644 --- a/Documentation/networking/snmp_counter.rst +++ b/Documentation/networking/snmp_counter.rst @@ -908,8 +908,8 @@ A TLP probe packet is sent. A packet loss is detected and recovered by TLP. -TCP Fast Open -============= +TCP Fast Open description +========================= TCP Fast Open is a technology which allows data transfer before the 3-way handshake complete. Please refer the `TCP Fast Open wiki`_ for a general description. diff --git a/Documentation/openrisc/openrisc_port.rst b/Documentation/openrisc/openrisc_port.rst index a18747a8d191..4b2c437942a0 100644 --- a/Documentation/openrisc/openrisc_port.rst +++ b/Documentation/openrisc/openrisc_port.rst @@ -37,8 +37,8 @@ or Stafford's toolchain build and release scripts. Build the Linux kernel as usual:: - make ARCH=openrisc defconfig - make ARCH=openrisc + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" 3) Running on FPGA (optional) diff --git a/Documentation/power/pm_qos_interface.rst b/Documentation/power/pm_qos_interface.rst index 0d62d506caf0..69b0fe3e2542 100644 --- a/Documentation/power/pm_qos_interface.rst +++ b/Documentation/power/pm_qos_interface.rst @@ -7,86 +7,78 @@ performance expectations by drivers, subsystems and user space applications on one of the parameters. Two different PM QoS frameworks are available: -1. PM QoS classes for cpu_dma_latency -2. The per-device PM QoS framework provides the API to manage the + * CPU latency QoS. + * The per-device PM QoS framework provides the API to manage the per-device latency constraints and PM QoS flags. -Each parameters have defined units: - - * latency: usec - * timeout: usec - * throughput: kbs (kilo bit / sec) - * memory bandwidth: mbs (mega bit / sec) +The latency unit used in the PM QoS framework is the microsecond (usec). 1. PM QoS framework =================== -The infrastructure exposes multiple misc device nodes one per implemented -parameter. The set of parameters implement is defined by pm_qos_power_init() -and pm_qos_params.h. This is done because having the available parameters -being runtime configurable or changeable from a driver was seen as too easy to -abuse. - -For each parameter a list of performance requests is maintained along with -an aggregated target value. The aggregated target value is updated with -changes to the request list or elements of the list. Typically the -aggregated target value is simply the max or min of the request values held -in the parameter list elements. +A global list of CPU latency QoS requests is maintained along with an aggregated +(effective) target value. The aggregated target value is updated with changes +to the request list or elements of the list. For CPU latency QoS, the +aggregated target value is simply the min of the request values held in the list +elements. + Note: the aggregated target value is implemented as an atomic variable so that reading the aggregated value does not require any locking mechanism. +From kernel space the use of this interface is simple: -From kernel mode the use of this interface is simple: - -void pm_qos_add_request(handle, param_class, target_value): - Will insert an element into the list for that identified PM QoS class with the - target value. Upon change to this list the new target is recomputed and any - registered notifiers are called only if the target value is now different. - Clients of pm_qos need to save the returned handle for future use in other - pm_qos API functions. +void cpu_latency_qos_add_request(handle, target_value): + Will insert an element into the CPU latency QoS list with the target value. + Upon change to this list the new target is recomputed and any registered + notifiers are called only if the target value is now different. + Clients of PM QoS need to save the returned handle for future use in other + PM QoS API functions. -void pm_qos_update_request(handle, new_target_value): +void cpu_latency_qos_update_request(handle, new_target_value): Will update the list element pointed to by the handle with the new target value and recompute the new aggregated target, calling the notification tree if the target is changed. -void pm_qos_remove_request(handle): +void cpu_latency_qos_remove_request(handle): Will remove the element. After removal it will update the aggregate target and call the notification tree if the target was changed as a result of removing the request. -int pm_qos_request(param_class): - Returns the aggregated value for a given PM QoS class. +int cpu_latency_qos_limit(): + Returns the aggregated value for the CPU latency QoS. + +int cpu_latency_qos_request_active(handle): + Returns if the request is still active, i.e. it has not been removed from the + CPU latency QoS list. -int pm_qos_request_active(handle): - Returns if the request is still active, i.e. it has not been removed from a - PM QoS class constraints list. +int cpu_latency_qos_add_notifier(notifier): + Adds a notification callback function to the CPU latency QoS. The callback is + called when the aggregated value for the CPU latency QoS is changed. -int pm_qos_add_notifier(param_class, notifier): - Adds a notification callback function to the PM QoS class. The callback is - called when the aggregated value for the PM QoS class is changed. +int cpu_latency_qos_remove_notifier(notifier): + Removes the notification callback function from the CPU latency QoS. -int pm_qos_remove_notifier(int param_class, notifier): - Removes the notification callback function for the PM QoS class. +From user space: -From user mode: +The infrastructure exposes one device node, /dev/cpu_dma_latency, for the CPU +latency QoS. -Only processes can register a pm_qos request. To provide for automatic +Only processes can register a PM QoS request. To provide for automatic cleanup of a process, the interface requires the process to register its -parameter requests in the following way: +parameter requests as follows. -To register the default pm_qos target for the specific parameter, the process -must open /dev/cpu_dma_latency +To register the default PM QoS target for the CPU latency QoS, the process must +open /dev/cpu_dma_latency. As long as the device node is held open that process has a registered request on the parameter. -To change the requested target value the process needs to write an s32 value to -the open device node. Alternatively the user mode program could write a hex -string for the value using 10 char long format e.g. "0x12345678". This -translates to a pm_qos_update_request call. +To change the requested target value, the process needs to write an s32 value to +the open device node. Alternatively, it can write a hex string for the value +using the 10 char long format e.g. "0x12345678". This translates to a +cpu_latency_qos_update_request() call. To remove the user mode request for a target value simply close the device node. diff --git a/Documentation/power/runtime_pm.rst b/Documentation/power/runtime_pm.rst index ab8406c84254..0553008b6279 100644 --- a/Documentation/power/runtime_pm.rst +++ b/Documentation/power/runtime_pm.rst @@ -382,6 +382,12 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h: nonzero, increment the counter and return 1; otherwise return 0 without changing the counter + `int pm_runtime_get_if_active(struct device *dev, bool ign_usage_count);` + - return -EINVAL if 'power.disable_depth' is nonzero; otherwise, if the + runtime PM status is RPM_ACTIVE, and either ign_usage_count is true + or the device's usage_count is non-zero, increment the counter and + return 1; otherwise return 0 without changing the counter + `void pm_runtime_put_noidle(struct device *dev);` - decrement the device's usage counter diff --git a/Documentation/power/userland-swsusp.rst b/Documentation/power/userland-swsusp.rst index a0fa51bb1a4d..1cf62d80a9ca 100644 --- a/Documentation/power/userland-swsusp.rst +++ b/Documentation/power/userland-swsusp.rst @@ -69,11 +69,13 @@ SNAPSHOT_PREF_IMAGE_SIZE SNAPSHOT_GET_IMAGE_SIZE return the actual size of the hibernation image + (the last argument should be a pointer to a loff_t variable that + will contain the result if the call is successful) SNAPSHOT_AVAIL_SWAP_SIZE - return the amount of available swap in bytes (the - last argument should be a pointer to an unsigned int variable that will - contain the result if the call is successful). + return the amount of available swap in bytes + (the last argument should be a pointer to a loff_t variable that + will contain the result if the call is successful) SNAPSHOT_ALLOC_SWAP_PAGE allocate a swap page from the resume partition diff --git a/Documentation/powerpc/firmware-assisted-dump.rst b/Documentation/powerpc/firmware-assisted-dump.rst index 0455a78486d5..b3f3ee135dbe 100644 --- a/Documentation/powerpc/firmware-assisted-dump.rst +++ b/Documentation/powerpc/firmware-assisted-dump.rst @@ -112,13 +112,13 @@ to ensure that crash data is preserved to process later. -- On OPAL based machines (PowerNV), if the kernel is build with CONFIG_OPAL_CORE=y, OPAL memory at the time of crash is also - exported as /sys/firmware/opal/core file. This procfs file is + exported as /sys/firmware/opal/mpipl/core file. This procfs file is helpful in debugging OPAL crashes with GDB. The kernel memory used for exporting this procfs file can be released by echo'ing - '1' to /sys/kernel/fadump_release_opalcore node. + '1' to /sys/firmware/opal/mpipl/release_core node. e.g. - # echo 1 > /sys/kernel/fadump_release_opalcore + # echo 1 > /sys/firmware/opal/mpipl/release_core Implementation details: ----------------------- @@ -268,6 +268,11 @@ Here is the list of files under kernel sysfs: be handled and vmcore will not be captured. This interface can be easily integrated with kdump service start/stop. + /sys/kernel/fadump/mem_reserved + + This is used to display the memory reserved by FADump for saving the + crash dump. + /sys/kernel/fadump_release_mem This file is available only when FADump is active during second kernel. This is used to release the reserved memory @@ -283,14 +288,29 @@ Here is the list of files under kernel sysfs: enhanced to use this interface to release the memory reserved for dump and continue without 2nd reboot. - /sys/kernel/fadump_release_opalcore +Note: /sys/kernel/fadump_release_opalcore sysfs has moved to + /sys/firmware/opal/mpipl/release_core + + /sys/firmware/opal/mpipl/release_core This file is available only on OPAL based machines when FADump is active during capture kernel. This is used to release the memory - used by the kernel to export /sys/firmware/opal/core file. To + used by the kernel to export /sys/firmware/opal/mpipl/core file. To release this memory, echo '1' to it: - echo 1 > /sys/kernel/fadump_release_opalcore + echo 1 > /sys/firmware/opal/mpipl/release_core + +Note: The following FADump sysfs files are deprecated. + ++----------------------------------+--------------------------------+ +| Deprecated | Alternative | ++----------------------------------+--------------------------------+ +| /sys/kernel/fadump_enabled | /sys/kernel/fadump/enabled | ++----------------------------------+--------------------------------+ +| /sys/kernel/fadump_registered | /sys/kernel/fadump/registered | ++----------------------------------+--------------------------------+ +| /sys/kernel/fadump_release_mem | /sys/kernel/fadump/release_mem | ++----------------------------------+--------------------------------+ Here is the list of files under powerpc debugfs: (Assuming debugfs is mounted on /sys/kernel/debug directory.) diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst index 363736d7fd36..df136c8f91fa 100644 --- a/Documentation/powerpc/ultravisor.rst +++ b/Documentation/powerpc/ultravisor.rst @@ -8,8 +8,8 @@ Protected Execution Facility .. contents:: :depth: 3 -Protected Execution Facility -############################ +Introduction +############ Protected Execution Facility (PEF) is an architectural change for POWER 9 that enables Secure Virtual Machines (SVMs). DD2.3 chips diff --git a/Documentation/process/2.Process.rst b/Documentation/process/2.Process.rst index ae020d84d7c4..b21b5b245d13 100644 --- a/Documentation/process/2.Process.rst +++ b/Documentation/process/2.Process.rst @@ -18,18 +18,18 @@ major kernel release happening every two or three months. The recent release history looks like this: ====== ================= - 4.11 April 30, 2017 - 4.12 July 2, 2017 - 4.13 September 3, 2017 - 4.14 November 12, 2017 - 4.15 January 28, 2018 - 4.16 April 1, 2018 + 5.0 March 3, 2019 + 5.1 May 5, 2019 + 5.2 July 7, 2019 + 5.3 September 15, 2019 + 5.4 November 24, 2019 + 5.5 January 6, 2020 ====== ================= -Every 4.x release is a major kernel release with new features, internal -API changes, and more. A typical 4.x release contain about 13,000 -changesets with changes to several hundred thousand lines of code. 4.x is -thus the leading edge of Linux kernel development; the kernel uses a +Every 5.x release is a major kernel release with new features, internal +API changes, and more. A typical release can contain about 13,000 +changesets with changes to several hundred thousand lines of code. 5.x is +the leading edge of Linux kernel development; the kernel uses a rolling development model which is continually integrating major changes. A relatively straightforward discipline is followed with regard to the @@ -48,9 +48,9 @@ detail later on). The merge window lasts for approximately two weeks. At the end of this time, Linus Torvalds will declare that the window is closed and release the -first of the "rc" kernels. For the kernel which is destined to be 2.6.40, +first of the "rc" kernels. For the kernel which is destined to be 5.6, for example, the release which happens at the end of the merge window will -be called 2.6.40-rc1. The -rc1 release is the signal that the time to +be called 5.6-rc1. The -rc1 release is the signal that the time to merge new features has passed, and that the time to stabilize the next kernel has begun. @@ -67,22 +67,23 @@ add at any time). As fixes make their way into the mainline, the patch rate will slow over time. Linus releases new -rc kernels about once a week; a normal series will get up to somewhere between -rc6 and -rc9 before the kernel is -considered to be sufficiently stable and the final 2.6.x release is made. +considered to be sufficiently stable and the final release is made. At that point the whole process starts over again. -As an example, here is how the 4.16 development cycle went (all dates in -2018): +As an example, here is how the 5.4 development cycle went (all dates in +2019): ============== =============================== - January 28 4.15 stable release - February 11 4.16-rc1, merge window closes - February 18 4.16-rc2 - February 25 4.16-rc3 - March 4 4.16-rc4 - March 11 4.16-rc5 - March 18 4.16-rc6 - March 25 4.16-rc7 - April 1 4.16 stable release + September 15 5.3 stable release + September 30 5.4-rc1, merge window closes + October 6 5.4-rc2 + October 13 5.4-rc3 + October 20 5.4-rc4 + October 27 5.4-rc5 + November 3 5.4-rc6 + November 10 5.4-rc7 + November 17 5.4-rc8 + November 24 5.4 stable release ============== =============================== How do the developers decide when to close the development cycle and create @@ -98,43 +99,44 @@ release is made. In the real world, this kind of perfection is hard to achieve; there are just too many variables in a project of this size. There comes a point where delaying the final release just makes the problem worse; the pile of changes waiting for the next merge window will grow -larger, creating even more regressions the next time around. So most 4.x +larger, creating even more regressions the next time around. So most 5.x kernels go out with a handful of known regressions though, hopefully, none of them are serious. Once a stable release is made, its ongoing maintenance is passed off to the -"stable team," currently consisting of Greg Kroah-Hartman. The stable team -will release occasional updates to the stable release using the 4.x.y -numbering scheme. To be considered for an update release, a patch must (1) -fix a significant bug, and (2) already be merged into the mainline for the -next development kernel. Kernels will typically receive stable updates for -a little more than one development cycle past their initial release. So, -for example, the 4.13 kernel's history looked like: +"stable team," currently Greg Kroah-Hartman. The stable team will release +occasional updates to the stable release using the 5.x.y numbering scheme. +To be considered for an update release, a patch must (1) fix a significant +bug, and (2) already be merged into the mainline for the next development +kernel. Kernels will typically receive stable updates for a little more +than one development cycle past their initial release. So, for example, the +5.2 kernel's history looked like this (all dates in 2019): ============== =============================== - September 3 4.13 stable release - September 13 4.13.1 - September 20 4.13.2 - September 27 4.13.3 - October 5 4.13.4 - October 12 4.13.5 + September 15 5.2 stable release + July 14 5.2.1 + July 21 5.2.2 + July 26 5.2.3 + July 28 5.2.4 + July 31 5.2.5 ... ... - November 24 4.13.16 + October 11 5.2.21 ============== =============================== -4.13.16 was the final stable update of the 4.13 release. +5.2.21 was the final stable update of the 5.2 release. Some kernels are designated "long term" kernels; they will receive support for a longer period. As of this writing, the current long term kernels and their maintainers are: - ====== ====================== ============================== - 3.16 Ben Hutchings (very long-term stable kernel) - 4.1 Sasha Levin - 4.4 Greg Kroah-Hartman (very long-term stable kernel) - 4.9 Greg Kroah-Hartman - 4.14 Greg Kroah-Hartman - ====== ====================== ============================== + ====== ================================ ======================= + 3.16 Ben Hutchings (very long-term kernel) + 4.4 Greg Kroah-Hartman & Sasha Levin (very long-term kernel) + 4.9 Greg Kroah-Hartman & Sasha Levin + 4.14 Greg Kroah-Hartman & Sasha Levin + 4.19 Greg Kroah-Hartman & Sasha Levin + 5.4 Greg Kroah-Hartman & Sasha Levin + ====== ================================ ======================= The selection of a kernel for long-term support is purely a matter of a maintainer having the need and the time to maintain that release. There @@ -215,12 +217,12 @@ How patches get into the Kernel ------------------------------- There is exactly one person who can merge patches into the mainline kernel -repository: Linus Torvalds. But, of the over 9,500 patches which went -into the 2.6.38 kernel, only 112 (around 1.3%) were directly chosen by Linus -himself. The kernel project has long since grown to a size where no single -developer could possibly inspect and select every patch unassisted. The -way the kernel developers have addressed this growth is through the use of -a lieutenant system built around a chain of trust. +repository: Linus Torvalds. But, for example, of the over 9,500 patches +which went into the 2.6.38 kernel, only 112 (around 1.3%) were directly +chosen by Linus himself. The kernel project has long since grown to a size +where no single developer could possibly inspect and select every patch +unassisted. The way the kernel developers have addressed this growth is +through the use of a lieutenant system built around a chain of trust. The kernel code base is logically broken down into a set of subsystems: networking, specific architecture support, memory management, video diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index e47863575917..91c5ff8e161e 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -31,7 +31,7 @@ you probably needn't concern yourself with pcmciautils. ====================== =============== ======================================== GNU C 4.6 gcc --version GNU make 3.81 make --version -binutils 2.21 ld -v +binutils 2.23 ld -v flex 2.5.35 flex --version bison 2.0 bison --version util-linux 2.10o fdformat --version @@ -76,7 +76,7 @@ You will need GNU make 3.81 or later to build the kernel. Binutils -------- -Binutils 2.21 or newer is needed to build the kernel. +Binutils 2.23 or newer is needed to build the kernel. pkg-config ---------- diff --git a/Documentation/process/coding-style.rst b/Documentation/process/coding-style.rst index edb296c52f61..acb2f1b36350 100644 --- a/Documentation/process/coding-style.rst +++ b/Documentation/process/coding-style.rst @@ -284,9 +284,9 @@ context lines. 4) Naming --------- -C is a Spartan language, and so should your naming be. Unlike Modula-2 -and Pascal programmers, C programmers do not use cute names like -ThisVariableIsATemporaryCounter. A C programmer would call that +C is a Spartan language, and your naming conventions should follow suit. +Unlike Modula-2 and Pascal programmers, C programmers do not use cute +names like ThisVariableIsATemporaryCounter. A C programmer would call that variable ``tmp``, which is much easier to write, and not the least more difficult to understand. @@ -300,9 +300,9 @@ that counts the number of active users, you should call that ``count_active_users()`` or similar, you should **not** call it ``cntusr()``. Encoding the type of a function into the name (so-called Hungarian -notation) is brain damaged - the compiler knows the types anyway and can -check those, and it only confuses the programmer. No wonder MicroSoft -makes buggy programs. +notation) is asinine - the compiler knows the types anyway and can check +those, and it only confuses the programmer. No wonder Microsoft makes buggy +programs. LOCAL variable names should be short, and to the point. If you have some random integer loop counter, it should probably be called ``i``. @@ -806,9 +806,9 @@ covers RTL which is used frequently with assembly language in the kernel. ---------------------------- Kernel developers like to be seen as literate. Do mind the spelling -of kernel messages to make a good impression. Do not use crippled -words like ``dont``; use ``do not`` or ``don't`` instead. Make the messages -concise, clear, and unambiguous. +of kernel messages to make a good impression. Do not use incorrect +contractions like ``dont``; use ``do not`` or ``don't`` instead. Make the +messages concise, clear, and unambiguous. Kernel messages do not have to be terminated with a period. diff --git a/Documentation/process/deprecated.rst b/Documentation/process/deprecated.rst index 179f2a5625a0..652e2aa02a66 100644 --- a/Documentation/process/deprecated.rst +++ b/Documentation/process/deprecated.rst @@ -29,6 +29,28 @@ a header file, it isn't the full solution. Such interfaces must either be fully removed from the kernel, or added to this file to discourage others from using them in the future. +BUG() and BUG_ON() +------------------ +Use WARN() and WARN_ON() instead, and handle the "impossible" +error condition as gracefully as possible. While the BUG()-family +of APIs were originally designed to act as an "impossible situation" +assert and to kill a kernel thread "safely", they turn out to just be +too risky. (e.g. "In what order do locks need to be released? Have +various states been restored?") Very commonly, using BUG() will +destabilize a system or entirely break it, which makes it impossible +to debug or even get viable crash reports. Linus has `very strong +<https://lore.kernel.org/lkml/CA+55aFy6jNLsywVYdGp83AMrXBo_P-pkjkphPGrO=82SPKCpLQ@mail.gmail.com/>`_ +feelings `about this +<https://lore.kernel.org/lkml/CAHk-=whDHsbK3HTOpTF=ue_o04onRwTEaK_ZoJp_fjbqq4+=Jw@mail.gmail.com/>`_. + +Note that the WARN()-family should only be used for "expected to +be unreachable" situations. If you want to warn about "reachable +but undesirable" situations, please use the pr_warn()-family of +functions. System owners may have set the *panic_on_warn* sysctl, +to make sure their systems do not continue running in the face of +"unreachable" conditions. (For example, see commits like `this one +<https://git.kernel.org/linus/d4689846881d160a4d12a514e991a740bcb5d65a>`_.) + open-coded arithmetic in allocator arguments -------------------------------------------- Dynamic size calculations (especially multiplication) should not be @@ -63,51 +85,73 @@ Instead, use the helper:: header = kzalloc(struct_size(header, item, count), GFP_KERNEL); -See :c:func:`array_size`, :c:func:`array3_size`, and :c:func:`struct_size`, -for more details as well as the related :c:func:`check_add_overflow` and -:c:func:`check_mul_overflow` family of functions. +See array_size(), array3_size(), and struct_size(), +for more details as well as the related check_add_overflow() and +check_mul_overflow() family of functions. simple_strtol(), simple_strtoll(), simple_strtoul(), simple_strtoull() ---------------------------------------------------------------------- -The :c:func:`simple_strtol`, :c:func:`simple_strtoll`, -:c:func:`simple_strtoul`, and :c:func:`simple_strtoull` functions +The simple_strtol(), simple_strtoll(), +simple_strtoul(), and simple_strtoull() functions explicitly ignore overflows, which may lead to unexpected results -in callers. The respective :c:func:`kstrtol`, :c:func:`kstrtoll`, -:c:func:`kstrtoul`, and :c:func:`kstrtoull` functions tend to be the +in callers. The respective kstrtol(), kstrtoll(), +kstrtoul(), and kstrtoull() functions tend to be the correct replacements, though note that those require the string to be NUL or newline terminated. strcpy() -------- -:c:func:`strcpy` performs no bounds checking on the destination +strcpy() performs no bounds checking on the destination buffer. This could result in linear overflows beyond the end of the buffer, leading to all kinds of misbehaviors. While `CONFIG_FORTIFY_SOURCE=y` and various compiler flags help reduce the risk of using this function, there is no good reason to add new uses of -this function. The safe replacement is :c:func:`strscpy`. +this function. The safe replacement is strscpy(). strncpy() on NUL-terminated strings ----------------------------------- -Use of :c:func:`strncpy` does not guarantee that the destination buffer +Use of strncpy() does not guarantee that the destination buffer will be NUL terminated. This can lead to various linear read overflows and other misbehavior due to the missing termination. It also NUL-pads the destination buffer if the source contents are shorter than the destination buffer size, which may be a needless performance penalty for callers using -only NUL-terminated strings. The safe replacement is :c:func:`strscpy`. -(Users of :c:func:`strscpy` still needing NUL-padding will need an -explicit :c:func:`memset` added.) +only NUL-terminated strings. The safe replacement is strscpy(). +(Users of strscpy() still needing NUL-padding should instead +use strscpy_pad().) -If a caller is using non-NUL-terminated strings, :c:func:`strncpy()` can +If a caller is using non-NUL-terminated strings, strncpy()() can still be used, but destinations should be marked with the `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_ attribute to avoid future compiler warnings. strlcpy() --------- -:c:func:`strlcpy` reads the entire source buffer first, possibly exceeding +strlcpy() reads the entire source buffer first, possibly exceeding the given limit of bytes to copy. This is inefficient and can lead to linear read overflows if a source string is not NUL-terminated. The -safe replacement is :c:func:`strscpy`. +safe replacement is strscpy(). + +%p format specifier +------------------- +Traditionally, using "%p" in format strings would lead to regular address +exposure flaws in dmesg, proc, sysfs, etc. Instead of leaving these to +be exploitable, all "%p" uses in the kernel are being printed as a hashed +value, rendering them unusable for addressing. New uses of "%p" should not +be added to the kernel. For text addresses, using "%pS" is likely better, +as it produces the more useful symbol name instead. For nearly everything +else, just do not add "%p" at all. + +Paraphrasing Linus's current `guidance <https://lore.kernel.org/lkml/CA+55aFwQEd_d40g4mUCSsVRZzrFPUJt74vc6PPpb675hYNXcKw@mail.gmail.com/>`_: + +- If the hashed "%p" value is pointless, ask yourself whether the pointer + itself is important. Maybe it should be removed entirely? +- If you really think the true pointer value is important, why is some + system state or user privilege level considered "special"? If you think + you can justify it (in comments and commit log) well enough to stand + up to Linus's scrutiny, maybe you can use "%px", along with making sure + you have sensible permissions. + +And finally, know that a toggle for "%p" hashing will `not be accepted <https://lore.kernel.org/lkml/CA+55aFwieC1-nAs+NFq9RTwaR8ef9hWa4MjNBWL41F-8wM49eA@mail.gmail.com/>`_. Variable Length Arrays (VLAs) ----------------------------- @@ -122,27 +166,37 @@ memory adjacent to the stack (when built without `CONFIG_VMAP_STACK=y`) Implicit switch case fall-through --------------------------------- -The C language allows switch cases to "fall-through" when a "break" statement -is missing at the end of a case. This, however, introduces ambiguity in the -code, as it's not always clear if the missing break is intentional or a bug. +The C language allows switch cases to fall through to the next case +when a "break" statement is missing at the end of a case. This, however, +introduces ambiguity in the code, as it's not always clear if the missing +break is intentional or a bug. For example, it's not obvious just from +looking at the code if `STATE_ONE` is intentionally designed to fall +through into `STATE_TWO`:: + + switch (value) { + case STATE_ONE: + do_something(); + case STATE_TWO: + do_other(); + break; + default: + WARN("unknown state"); + } As there have been a long list of flaws `due to missing "break" statements <https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow -"implicit fall-through". - -In order to identify intentional fall-through cases, we have adopted a -pseudo-keyword macro 'fallthrough' which expands to gcc's extension -__attribute__((__fallthrough__)). `Statement Attributes -<https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html>`_ - -When the C17/C18 [[fallthrough]] syntax is more commonly supported by +implicit fall-through. In order to identify intentional fall-through +cases, we have adopted a pseudo-keyword macro "fallthrough" which +expands to gcc's extension `__attribute__((__fallthrough__)) +<https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html>`_. +(When the C17/C18 `[[fallthrough]]` syntax is more commonly supported by C compilers, static analyzers, and IDEs, we can switch to using that syntax -for the macro pseudo-keyword. +for the macro pseudo-keyword.) All switch/case blocks must end in one of: - break; - fallthrough; - continue; - goto <label>; - return [expression]; +* break; +* fallthrough; +* continue; +* goto <label>; +* return [expression]; diff --git a/Documentation/process/email-clients.rst b/Documentation/process/email-clients.rst index 5273d06c8ff6..c9e4ce2613c0 100644 --- a/Documentation/process/email-clients.rst +++ b/Documentation/process/email-clients.rst @@ -237,9 +237,9 @@ using Mutt to send patches through Gmail:: The Mutt docs have lots more information: - http://dev.mutt.org/trac/wiki/UseCases/Gmail + https://gitlab.com/muttmua/mutt/-/wikis/UseCases/Gmail - http://dev.mutt.org/doc/manual.html + http://www.mutt.org/doc/manual/ Pine (TUI) ********** diff --git a/Documentation/process/embargoed-hardware-issues.rst b/Documentation/process/embargoed-hardware-issues.rst index a19d084f9b2c..43cdc67e4f8e 100644 --- a/Documentation/process/embargoed-hardware-issues.rst +++ b/Documentation/process/embargoed-hardware-issues.rst @@ -246,7 +246,8 @@ an involved disclosed party. The current ambassadors list: ============= ======================================================== ARM Grant Likely <grant.likely@arm.com> AMD Tom Lendacky <tom.lendacky@amd.com> - IBM + IBM Z Christian Borntraeger <borntraeger@de.ibm.com> + IBM Power Anton Blanchard <anton@linux.ibm.com> Intel Tony Luck <tony.luck@intel.com> Qualcomm Trilok Soni <tsoni@codeaurora.org> diff --git a/Documentation/process/howto.rst b/Documentation/process/howto.rst index b6f5a379ad6c..70791e153de1 100644 --- a/Documentation/process/howto.rst +++ b/Documentation/process/howto.rst @@ -243,10 +243,10 @@ branches. These different branches are: Mainline tree ~~~~~~~~~~~~~ -Mainline tree are maintained by Linus Torvalds, and can be found at +The mainline tree is maintained by Linus Torvalds, and can be found at https://kernel.org or in the repo. Its development process is as follows: - - As soon as a new kernel is released a two weeks window is open, + - As soon as a new kernel is released a two week window is open, during this period of time maintainers can submit big diffs to Linus, usually the patches that have already been included in the linux-next for a few weeks. The preferred way to submit big changes @@ -281,8 +281,9 @@ Various stable trees with multiple major numbers Kernels with 3-part versions are -stable kernels. They contain relatively small and critical fixes for security problems or significant -regressions discovered in a given major mainline release, with the first -2-part of version number are the same correspondingly. +regressions discovered in a given major mainline release. Each release +in a major stable series increments the third part of the version +number, keeping the first two parts the same. This is the recommended branch for users who want the most recent stable kernel and are not interested in helping test development/experimental @@ -359,10 +360,10 @@ Managing bug reports One of the best ways to put into practice your hacking skills is by fixing bugs reported by other people. Not only you will help to make the kernel -more stable, you'll learn to fix real world problems and you will improve -your skills, and other developers will be aware of your presence. Fixing -bugs is one of the best ways to get merits among other developers, because -not many people like wasting time fixing other people's bugs. +more stable, but you'll also learn to fix real world problems and you will +improve your skills, and other developers will be aware of your presence. +Fixing bugs is one of the best ways to get merits among other developers, +because not many people like wasting time fixing other people's bugs. To work in the already reported bug reports, go to https://bugzilla.kernel.org. diff --git a/Documentation/process/kernel-docs.rst b/Documentation/process/kernel-docs.rst index 7a45a8e36ea7..9d6d0ac4fca9 100644 --- a/Documentation/process/kernel-docs.rst +++ b/Documentation/process/kernel-docs.rst @@ -313,7 +313,7 @@ On-line docs :URL: http://www.linuxjournal.com/article.php?sid=2391 :Date: 1997 :Keywords: RAID, MD driver. - :Description: Linux Journal Kernel Korner article. Here is its + :Description: Linux Journal Kernel Korner article. :Abstract: *A description of the implementation of the RAID-1, RAID-4 and RAID-5 personalities of the MD device driver in the Linux kernel, providing users with high performance and reliable, @@ -338,7 +338,7 @@ On-line docs :Date: 1996 :Keywords: device driver, module, loading/unloading modules, allocating resources. - :Description: Linux Journal Kernel Korner article. Here is its + :Description: Linux Journal Kernel Korner article. :Abstract: *This is the first of a series of four articles co-authored by Alessandro Rubini and Georg Zezchwitz which present a practical approach to writing Linux device drivers as kernel @@ -354,7 +354,7 @@ On-line docs :Keywords: character driver, init_module, clean_up module, autodetection, mayor number, minor number, file operations, open(), close(). - :Description: Linux Journal Kernel Korner article. Here is its + :Description: Linux Journal Kernel Korner article. :Abstract: *This article, the second of four, introduces part of the actual code to create custom module implementing a character device driver. It describes the code for module initialization and @@ -367,7 +367,7 @@ On-line docs :Date: 1996 :Keywords: read(), write(), select(), ioctl(), blocking/non blocking mode, interrupt handler. - :Description: Linux Journal Kernel Korner article. Here is its + :Description: Linux Journal Kernel Korner article. :Abstract: *This article, the third of four on writing character device drivers, introduces concepts of reading, writing, and using ioctl-calls*. @@ -378,7 +378,7 @@ On-line docs :URL: http://www.linuxjournal.com/article.php?sid=1222 :Date: 1996 :Keywords: interrupts, irqs, DMA, bottom halves, task queues. - :Description: Linux Journal Kernel Korner article. Here is its + :Description: Linux Journal Kernel Korner article. :Abstract: *This is the fourth in a series of articles about writing character device drivers as loadable kernel modules. This month, we further investigate the field of interrupt handling. diff --git a/Documentation/process/management-style.rst b/Documentation/process/management-style.rst index 186753ff3d2d..dfbc69bf49d4 100644 --- a/Documentation/process/management-style.rst +++ b/Documentation/process/management-style.rst @@ -227,7 +227,7 @@ incompetence will grudgingly admit that you at least didn't try to weasel out of it. Then make the developer who really screwed up (if you can find them) know -**in_private** that they screwed up. Not just so they can avoid it in the +**in private** that they screwed up. Not just so they can avoid it in the future, but so that they know they owe you one. And, perhaps even more importantly, they're also likely the person who can fix it. Because, let's face it, it sure ain't you. diff --git a/Documentation/remoteproc.txt b/Documentation/remoteproc.txt index 03c3d2e568b0..2be1147256e0 100644 --- a/Documentation/remoteproc.txt +++ b/Documentation/remoteproc.txt @@ -230,7 +230,7 @@ in the used rings. Binary Firmware Structure ========================= -At this point remoteproc only supports ELF32 firmware binaries. However, +At this point remoteproc supports ELF32 and ELF64 firmware binaries. However, it is quite expected that other platforms/devices which we'd want to support with this framework will be based on different binary formats. diff --git a/Documentation/robust-futex-ABI.txt b/Documentation/robust-futex-ABI.txt index 8a5d34abf726..f24904f1c16f 100644 --- a/Documentation/robust-futex-ABI.txt +++ b/Documentation/robust-futex-ABI.txt @@ -61,8 +61,8 @@ setup that list. address of the associated 'lock entry', plus or minus, of what will be called the 'lock word', from that 'lock entry'. The 'lock word' is always a 32 bit word, unlike the other words above. The 'lock - word' holds 3 flag bits in the upper 3 bits, and the thread id (TID) - of the thread holding the lock in the bottom 29 bits. See further + word' holds 2 flag bits in the upper 2 bits, and the thread id (TID) + of the thread holding the lock in the bottom 30 bits. See further below for a description of the flag bits. The third word, called 'list_op_pending', contains transient copy of @@ -128,7 +128,7 @@ that thread's robust_futex linked lock list a given time. A given futex lock structure in a user shared memory region may be held at different times by any of the threads with access to that region. The thread currently holding such a lock, if any, is marked with the threads -TID in the lower 29 bits of the 'lock word'. +TID in the lower 30 bits of the 'lock word'. When adding or removing a lock from its list of held locks, in order for the kernel to correctly handle lock cleanup regardless of when the task @@ -141,7 +141,7 @@ On insertion: 1) set the 'list_op_pending' word to the address of the 'lock entry' to be inserted, 2) acquire the futex lock, - 3) add the lock entry, with its thread id (TID) in the bottom 29 bits + 3) add the lock entry, with its thread id (TID) in the bottom 30 bits of the 'lock word', to the linked list starting at 'head', and 4) clear the 'list_op_pending' word. @@ -155,7 +155,7 @@ On removal: On exit, the kernel will consider the address stored in 'list_op_pending' and the address of each 'lock word' found by walking -the list starting at 'head'. For each such address, if the bottom 29 +the list starting at 'head'. For each such address, if the bottom 30 bits of the 'lock word' at offset 'offset' from that address equals the exiting threads TID, then the kernel will do two things: @@ -180,7 +180,5 @@ any point: future kernel configuration changes) elements. When the kernel sees a list entry whose 'lock word' doesn't have the -current threads TID in the lower 29 bits, it does nothing with that +current threads TID in the lower 30 bits, it does nothing with that entry, and goes on to the next entry. - -Bit 29 (0x20000000) of the 'lock word' is reserved for future use. diff --git a/Documentation/scsi/53c700.txt b/Documentation/scsi/53c700.rst index e31aceb6df15..53a0e9f9c198 100644 --- a/Documentation/scsi/53c700.txt +++ b/Documentation/scsi/53c700.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +The 53c700 Driver Notes +======================= + General Description =================== @@ -16,9 +22,9 @@ fill in to get the driver working. Compile Time Flags ================== -A compile time flag is: +A compile time flag is:: -CONFIG_53C700_LE_ON_BE + CONFIG_53C700_LE_ON_BE define if the chipset must be supported in little endian mode on a big endian architecture (used for the 700 on parisc). @@ -51,9 +57,11 @@ consistent with the best operation of the chip (although some choose to drive it off the CPU or bus clock rather than going to the expense of an extra clock chip). The best operation clock speeds are: -53c700 - 25MHz -53c700-66 - 50MHz -53c710 - 40Mhz +========= ===== +53c700 25MHz +53c700-66 50MHz +53c710 40Mhz +========= ===== Writing Your Glue Driver ======================== @@ -69,7 +77,7 @@ parameters that matter to you (see below), plumb the NCR_700_intr routine into the interrupt line and call NCR_700_detect with the host template and the new parameters as arguments. You should also call the relevant request_*_region function and place the register base -address into the `base' pointer of the host parameters. +address into the 'base' pointer of the host parameters. In the release routine, you must free the NCR_700_Host_Parameters that you allocated, call the corresponding release_*_region and free the @@ -78,7 +86,7 @@ interrupt. Handling Interrupts ------------------- -In general, you should just plumb the card's interrupt line in with +In general, you should just plumb the card's interrupt line in with request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host); @@ -95,41 +103,32 @@ Settable NCR_700_Host_Parameters The following are a list of the user settable parameters: clock: (MANDATORY) - -Set to the clock speed of the chip in MHz. + Set to the clock speed of the chip in MHz. base: (MANDATORY) - -set to the base of the io or mem region for the register set. On 64 -bit architectures this is only 32 bits wide, so the registers must be -mapped into the low 32 bits of memory. + Set to the base of the io or mem region for the register set. On 64 + bit architectures this is only 32 bits wide, so the registers must be + mapped into the low 32 bits of memory. pci_dev: (OPTIONAL) - -set to the PCI board device. Leave NULL for a non-pci board. This is -used for the pci_alloc_consistent() and pci_map_*() functions. + Set to the PCI board device. Leave NULL for a non-pci board. This is + used for the pci_alloc_consistent() and pci_map_*() functions. dmode_extra: (OPTIONAL, 53c710 only) - -extra flags for the DMODE register. These are used to control bus -output pins on the 710. The settings should be a combination of -DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up -to the board designer. Usually it is safe to ignore this setting. + Extra flags for the DMODE register. These are used to control bus + output pins on the 710. The settings should be a combination of + DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up + to the board designer. Usually it is safe to ignore this setting. differential: (OPTIONAL) - -set to 1 if the chip drives a differential bus. + Set to 1 if the chip drives a differential bus. force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) - -set to 1 if the chip is operating in little endian mode on a big -endian architecture. + Set to 1 if the chip is operating in little endian mode on a big + endian architecture. chip710: (OPTIONAL) - -set to 1 if the chip is a 53c710. + Set to 1 if the chip is a 53c710. burst_disable: (OPTIONAL, 53c710 only) - -disable 8 byte bursting for DMA transfers. - + Disable 8 byte bursting for DMA transfers. diff --git a/Documentation/scsi/BusLogic.txt b/Documentation/scsi/BusLogic.rst index 48e982cd6fe7..b60169812358 100644 --- a/Documentation/scsi/BusLogic.txt +++ b/Documentation/scsi/BusLogic.rst @@ -1,6 +1,11 @@ - BusLogic MultiMaster and FlashPoint SCSI Driver for Linux +.. SPDX-License-Identifier: GPL-2.0 + +========================================================= +BusLogic MultiMaster and FlashPoint SCSI Driver for Linux +========================================================= Version 2.0.15 for Linux 2.0 + Version 2.1.15 for Linux 2.1 PRODUCTION RELEASE @@ -8,13 +13,16 @@ 17 August 1998 Leonard N. Zubkoff + Dandelion Digital + lnz@dandelion.com Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com> - INTRODUCTION +Introduction +============ BusLogic, Inc. designed and manufactured a variety of high performance SCSI host adapters which share a common programming interface across a diverse @@ -86,9 +94,11 @@ Contact information for offices in Europe and Japan is available on the Web site. - DRIVER FEATURES +Driver Features +=============== -o Configuration Reporting and Testing +Configuration Reporting and Testing +----------------------------------- During system initialization, the driver reports extensively on the host adapter hardware configuration, including the synchronous transfer parameters @@ -130,7 +140,8 @@ o Configuration Reporting and Testing The status of Wide Negotiation, Disconnect/Reconnect, and Tagged Queuing are reported as "Enabled", Disabled", or a sequence of "Y" and "N" letters. -o Performance Features +Performance Features +-------------------- BusLogic SCSI Host Adapters directly implement SCSI-2 Tagged Queuing, and so support has been included in the driver to utilize tagged queuing with any @@ -150,7 +161,8 @@ o Performance Features queue depth of 1 is selected. Tagged queuing is also disabled for individual target devices if disconnect/reconnect is disabled for that device. -o Robustness Features +Robustness Features +------------------- The driver implements extensive error recovery procedures. When the higher level parts of the SCSI subsystem request that a timed out command be reset, @@ -174,7 +186,8 @@ o Robustness Features lock up or crash, and thereby allowing a clean shutdown and restart after the offending component is removed. -o PCI Configuration Support +PCI Configuration Support +------------------------- On PCI systems running kernels compiled with PCI BIOS support enabled, this driver will interrogate the PCI configuration space and use the I/O port @@ -184,19 +197,22 @@ o PCI Configuration Support used to disable the ISA compatible I/O port entirely as it is not necessary. The ISA compatible I/O port is disabled by default on the BT-948/958/958D. -o /proc File System Support +/proc File System Support +------------------------- Copies of the host adapter configuration information together with updated data transfer and error recovery statistics are available through the /proc/scsi/BusLogic/<N> interface. -o Shared Interrupts Support +Shared Interrupts Support +------------------------- On systems that support shared interrupts, any number of BusLogic Host Adapters may share the same interrupt request channel. - SUPPORTED HOST ADAPTERS +Supported Host Adapters +======================= The following list comprises the supported BusLogic SCSI Host Adapters as of the date of this document. It is recommended that anyone purchasing a BusLogic @@ -205,6 +221,7 @@ that it is or will be supported. FlashPoint Series PCI Host Adapters: +======================= ============================================= FlashPoint LT (BT-930) Ultra SCSI-3 FlashPoint LT (BT-930R) Ultra SCSI-3 with RAIDPlus FlashPoint LT (BT-920) Ultra SCSI-3 (BT-930 without BIOS) @@ -214,15 +231,19 @@ FlashPoint LW (BT-950) Wide Ultra SCSI-3 FlashPoint LW (BT-950R) Wide Ultra SCSI-3 with RAIDPlus FlashPoint DW (BT-952) Dual Channel Wide Ultra SCSI-3 FlashPoint DW (BT-952R) Dual Channel Wide Ultra SCSI-3 with RAIDPlus +======================= ============================================= MultiMaster "W" Series Host Adapters: +======= === ============================== BT-948 PCI Ultra SCSI-3 BT-958 PCI Wide Ultra SCSI-3 BT-958D PCI Wide Differential Ultra SCSI-3 +======= === ============================== MultiMaster "C" Series Host Adapters: +======== ==== ============================== BT-946C PCI Fast SCSI-2 BT-956C PCI Wide Fast SCSI-2 BT-956CD PCI Wide Differential Fast SCSI-2 @@ -232,9 +253,11 @@ BT-757C EISA Wide Fast SCSI-2 BT-757CD EISA Wide Differential Fast SCSI-2 BT-545C ISA Fast SCSI-2 BT-540CF ISA Fast SCSI-2 +======== ==== ============================== MultiMaster "S" Series Host Adapters: +======= ==== ============================== BT-445S VLB Fast SCSI-2 BT-747S EISA Fast SCSI-2 BT-747D EISA Differential Fast SCSI-2 @@ -244,11 +267,14 @@ BT-545S ISA Fast SCSI-2 BT-542D ISA Differential Fast SCSI-2 BT-742A EISA SCSI-2 (742A revision H) BT-542B ISA SCSI-2 (542B revision H) +======= ==== ============================== MultiMaster "A" Series Host Adapters: +======= ==== ============================== BT-742A EISA SCSI-2 (742A revisions A - G) BT-542B ISA SCSI-2 (542B revisions A - G) +======= ==== ============================== AMI FastDisk Host Adapters that are true BusLogic MultiMaster clones are also supported by this driver. @@ -260,9 +286,11 @@ list. The retail kit includes the bare board and manual as well as cabling and driver media and documentation that are not provided with bare boards. - FLASHPOINT INSTALLATION NOTES +FlashPoint Installation Notes +============================= -o RAIDPlus Support +RAIDPlus Support +---------------- FlashPoint Host Adapters now include RAIDPlus, Mylex's bootable software RAID. RAIDPlus is not supported on Linux, and there are no plans to support @@ -273,7 +301,8 @@ o RAIDPlus Support than RAIDPlus, so there is little impetus to include RAIDPlus support in the BusLogic driver. -o Enabling UltraSCSI Transfers +Enabling UltraSCSI Transfers +---------------------------- FlashPoint Host Adapters ship with their configuration set to "Factory Default" settings that are conservative and do not allow for UltraSCSI speed @@ -287,12 +316,14 @@ o Enabling UltraSCSI Transfers the "Optimum Performance" settings are loaded. - BT-948/958/958D INSTALLATION NOTES +BT-948/958/958D Installation Notes +================================== The BT-948/958/958D PCI Ultra SCSI Host Adapters have some features which may require attention in some circumstances when installing Linux. -o PCI I/O Port Assignments +PCI I/O Port Assignments +------------------------ When configured to factory default settings, the BT-948/958/958D will only recognize the PCI I/O port assignments made by the motherboard's PCI BIOS. @@ -312,7 +343,8 @@ o PCI I/O Port Assignments possible future I/O port conflicts. The older BT-946C/956C/956CD also have this configuration option, but the factory default setting is "Primary". -o PCI Slot Scanning Order +PCI Slot Scanning Order +----------------------- In systems with multiple BusLogic PCI Host Adapters, the order in which the PCI slots are scanned may appear reversed with the BT-948/958/958D as @@ -339,7 +371,8 @@ o PCI Slot Scanning Order so as to recognize the host adapters in the same order as they are enumerated by the host adapter's BIOS. -o Enabling UltraSCSI Transfers +Enabling UltraSCSI Transfers +---------------------------- The BT-948/958/958D ship with their configuration set to "Factory Default" settings that are conservative and do not allow for UltraSCSI speed to be @@ -353,7 +386,8 @@ o Enabling UltraSCSI Transfers "Optimum Performance" settings are loaded. - DRIVER OPTIONS +Driver Options +============== BusLogic Driver Options may be specified either via the Linux Kernel Command Line or via the Loadable Kernel Module Installation Facility. Driver Options @@ -520,30 +554,34 @@ The following examples demonstrate setting the Queue Depth for Target Devices Devices on the second host adapter to 31, and the Bus Settle Time on the second host adapter to 30 seconds. -Linux Kernel Command Line: +Linux Kernel Command Line:: linux BusLogic=QueueDepth:[,7,15];QueueDepth:31,BusSettleTime:30 -LILO Linux Boot Loader (in /etc/lilo.conf): +LILO Linux Boot Loader (in /etc/lilo.conf):: append = "BusLogic=QueueDepth:[,7,15];QueueDepth:31,BusSettleTime:30" -INSMOD Loadable Kernel Module Installation Facility: +INSMOD Loadable Kernel Module Installation Facility:: insmod BusLogic.o \ 'BusLogic="QueueDepth:[,7,15];QueueDepth:31,BusSettleTime:30"' -NOTE: Module Utilities 2.1.71 or later is required for correct parsing + +.. Note:: + + Module Utilities 2.1.71 or later is required for correct parsing of driver options containing commas. - DRIVER INSTALLATION +Driver Installation +=================== This distribution was prepared for Linux kernel version 2.0.35, but should be compatible with 2.0.4 or any later 2.0 series kernel. To install the new BusLogic SCSI driver, you may use the following commands, -replacing "/usr/src" with wherever you keep your Linux kernel source tree: +replacing "/usr/src" with wherever you keep your Linux kernel source tree:: cd /usr/src tar -xvzf BusLogic-2.0.15.tar.gz @@ -557,7 +595,8 @@ Then install "arch/x86/boot/zImage" as your standard kernel, run lilo if appropriate, and reboot. - BUSLOGIC ANNOUNCEMENTS MAILING LIST +BusLogic Announcements Mailing List +=================================== The BusLogic Announcements Mailing List provides a forum for informing Linux users of new driver releases and other announcements regarding Linux support diff --git a/Documentation/scsi/FlashPoint.rst b/Documentation/scsi/FlashPoint.rst new file mode 100644 index 000000000000..ef3c07e94ad6 --- /dev/null +++ b/Documentation/scsi/FlashPoint.rst @@ -0,0 +1,176 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================================== +The BusLogic FlashPoint SCSI Driver +=================================== + +The BusLogic FlashPoint SCSI Host Adapters are now fully supported on Linux. +The upgrade program described below has been officially terminated effective +31 March 1997 since it is no longer needed. + +:: + + MYLEX INTRODUCES LINUX OPERATING SYSTEM SUPPORT FOR ITS + BUSLOGIC FLASHPOINT LINE OF SCSI HOST ADAPTERS + + + FREMONT, CA, -- October 8, 1996 -- Mylex Corporation has expanded Linux + operating system support to its BusLogic brand of FlashPoint Ultra SCSI + host adapters. All of BusLogic's other SCSI host adapters, including the + MultiMaster line, currently support the Linux operating system. Linux + drivers and information will be available on October 15th at + http://sourceforge.net/projects/dandelion/. + + "Mylex is committed to supporting the Linux community," says Peter Shambora, + vice president of marketing for Mylex. "We have supported Linux driver + development and provided technical support for our host adapters for several + years, and are pleased to now make our FlashPoint products available to this + user base." + +The Linux Operating System +========================== + +Linux is a freely-distributed implementation of UNIX for Intel x86, Sun +SPARC, SGI MIPS, Motorola 68k, Digital Alpha AXP and Motorola PowerPC +machines. It supports a wide range of software, including the X Window +System, Emacs, and TCP/IP networking. Further information is available at +http://www.linux.org and http://www.ssc.com/. + +FlashPoint Host Adapters +======================== + +The FlashPoint family of Ultra SCSI host adapters, designed for workstation +and file server environments, are available in narrow, wide, dual channel, +and dual channel wide versions. These adapters feature SeqEngine +automation technology, which minimizes SCSI command overhead and reduces +the number of interrupts generated to the CPU. + +About Mylex +=========== + +Mylex Corporation (NASDAQ/NM SYMBOL: MYLX), founded in 1983, is a leading +producer of RAID technology and network management products. The company +produces high performance disk array (RAID) controllers, and complementary +computer products for network servers, mass storage systems, workstations +and system boards. Through its wide range of RAID controllers and its +BusLogic line of Ultra SCSI host adapter products, Mylex provides enabling +intelligent I/O technologies that increase network management control, +enhance CPU utilization, optimize I/O performance, and ensure data security +and availability. Products are sold globally through a network of OEMs, +major distributors, VARs, and system integrators. Mylex Corporation is +headquartered at 34551 Ardenwood Blvd., Fremont, CA. + +Contact: +======== + +:: + + Peter Shambora + Vice President of Marketing + Mylex Corp. + 510/796-6100 + peters@mylex.com + + +:: + + ANNOUNCEMENT + BusLogic FlashPoint LT/BT-948 Upgrade Program + 1 February 1996 + + ADDITIONAL ANNOUNCEMENT + BusLogic FlashPoint LW/BT-958 Upgrade Program + 14 June 1996 + + Ever since its introduction last October, the BusLogic FlashPoint LT has + been problematic for members of the Linux community, in that no Linux + drivers have been available for this new Ultra SCSI product. Despite its + officially being positioned as a desktop workstation product, and not being + particularly well suited for a high performance multitasking operating + system like Linux, the FlashPoint LT has been touted by computer system + vendors as the latest thing, and has been sold even on many of their high + end systems, to the exclusion of the older MultiMaster products. This has + caused grief for many people who inadvertently purchased a system expecting + that all BusLogic SCSI Host Adapters were supported by Linux, only to + discover that the FlashPoint was not supported and would not be for quite + some time, if ever. + + After this problem was identified, BusLogic contacted its major OEM + customers to make sure the BT-946C/956C MultiMaster cards would still be + made available, and that Linux users who mistakenly ordered systems with + the FlashPoint would be able to upgrade to the BT-946C. While this helped + many purchasers of new systems, it was only a partial solution to the + overall problem of FlashPoint support for Linux users. It did nothing to + assist the people who initially purchased a FlashPoint for a supported + operating system and then later decided to run Linux, or those who had + ended up with a FlashPoint LT, believing it was supported, and were unable + to return it. + + In the middle of December, I asked to meet with BusLogic's senior + management to discuss the issues related to Linux and free software support + for the FlashPoint. Rumors of varying accuracy had been circulating + publicly about BusLogic's attitude toward the Linux community, and I felt + it was best that these issues be addressed directly. I sent an email + message after 11pm one evening, and the meeting took place the next + afternoon. Unfortunately, corporate wheels sometimes grind slowly, + especially when a company is being acquired, and so it's taken until now + before the details were completely determined and a public statement could + be made. + + BusLogic is not prepared at this time to release the information necessary + for third parties to write drivers for the FlashPoint. The only existing + FlashPoint drivers have been written directly by BusLogic Engineering, and + there is no FlashPoint documentation sufficiently detailed to allow outside + developers to write a driver without substantial assistance. While there + are people at BusLogic who would rather not release the details of the + FlashPoint architecture at all, that debate has not yet been settled either + way. In any event, even if documentation were available today it would + take quite a while for a usable driver to be written, especially since I'm + not convinced that the effort required would be worthwhile. + + However, BusLogic does remain committed to providing a high performance + SCSI solution for the Linux community, and does not want to see anyone left + unable to run Linux because they have a Flashpoint LT. Therefore, BusLogic + has put in place a direct upgrade program to allow any Linux user worldwide + to trade in their FlashPoint LT for the new BT-948 MultiMaster PCI Ultra + SCSI Host Adapter. The BT-948 is the Ultra SCSI successor to the BT-946C + and has all the best features of both the BT-946C and FlashPoint LT, + including smart termination and a flash PROM for easy firmware updates, and + is of course compatible with the present Linux driver. The price for this + upgrade has been set at US $45 plus shipping and handling, and the upgrade + program will be administered through BusLogic Technical Support, which can + be reached by electronic mail at techsup@buslogic.com, by Voice at +1 408 + 654-0760, or by FAX at +1 408 492-1542. + + As of 14 June 1996, the original BusLogic FlashPoint LT to BT-948 upgrade + program has now been extended to encompass the FlashPoint LW Wide Ultra + SCSI Host Adapter. Any Linux user worldwide may trade in their FlashPoint + LW (BT-950) for a BT-958 MultiMaster PCI Ultra SCSI Host Adapter. The + price for this upgrade has been set at US $65 plus shipping and handling. + + I was a beta test site for the BT-948/958, and versions 1.2.1 and 1.3.1 of + my BusLogic driver already included latent support for the BT-948/958. + Additional cosmetic support for the Ultra SCSI MultiMaster cards was added + subsequent releases. As a result of this cooperative testing process, + several firmware bugs were found and corrected. My heavily loaded Linux + test system provided an ideal environment for testing error recovery + processes that are much more rarely exercised in production systems, but + are crucial to overall system stability. It was especially convenient + being able to work directly with their firmware engineer in demonstrating + the problems under control of the firmware debugging environment; things + sure have come a long way since the last time I worked on firmware for an + embedded system. I am presently working on some performance testing and + expect to have some data to report in the not too distant future. + + BusLogic asked me to send this announcement since a large percentage of the + questions regarding support for the FlashPoint have either been sent to me + directly via email, or have appeared in the Linux newsgroups in which I + participate. To summarize, BusLogic is offering Linux users an upgrade + from the unsupported FlashPoint LT (BT-930) to the supported BT-948 for US + $45 plus shipping and handling, or from the unsupported FlashPoint LW + (BT-950) to the supported BT-958 for $65 plus shipping and handling. + Contact BusLogic Technical Support at techsup@buslogic.com or +1 408 + 654-0760 to take advantage of their offer. + + Leonard N. Zubkoff + lnz@dandelion.com diff --git a/Documentation/scsi/FlashPoint.txt b/Documentation/scsi/FlashPoint.txt deleted file mode 100644 index 5b5f29cb9f8b..000000000000 --- a/Documentation/scsi/FlashPoint.txt +++ /dev/null @@ -1,163 +0,0 @@ -The BusLogic FlashPoint SCSI Host Adapters are now fully supported on Linux. -The upgrade program described below has been officially terminated effective -31 March 1997 since it is no longer needed. - - - - MYLEX INTRODUCES LINUX OPERATING SYSTEM SUPPORT FOR ITS - BUSLOGIC FLASHPOINT LINE OF SCSI HOST ADAPTERS - - -FREMONT, CA, -- October 8, 1996 -- Mylex Corporation has expanded Linux -operating system support to its BusLogic brand of FlashPoint Ultra SCSI -host adapters. All of BusLogic's other SCSI host adapters, including the -MultiMaster line, currently support the Linux operating system. Linux -drivers and information will be available on October 15th at -http://sourceforge.net/projects/dandelion/. - -"Mylex is committed to supporting the Linux community," says Peter Shambora, -vice president of marketing for Mylex. "We have supported Linux driver -development and provided technical support for our host adapters for several -years, and are pleased to now make our FlashPoint products available to this -user base." - -The Linux Operating System - -Linux is a freely-distributed implementation of UNIX for Intel x86, Sun -SPARC, SGI MIPS, Motorola 68k, Digital Alpha AXP and Motorola PowerPC -machines. It supports a wide range of software, including the X Window -System, Emacs, and TCP/IP networking. Further information is available at -http://www.linux.org and http://www.ssc.com/. - -FlashPoint Host Adapters - -The FlashPoint family of Ultra SCSI host adapters, designed for workstation -and file server environments, are available in narrow, wide, dual channel, -and dual channel wide versions. These adapters feature SeqEngine -automation technology, which minimizes SCSI command overhead and reduces -the number of interrupts generated to the CPU. - -About Mylex - -Mylex Corporation (NASDAQ/NM SYMBOL: MYLX), founded in 1983, is a leading -producer of RAID technology and network management products. The company -produces high performance disk array (RAID) controllers, and complementary -computer products for network servers, mass storage systems, workstations -and system boards. Through its wide range of RAID controllers and its -BusLogic line of Ultra SCSI host adapter products, Mylex provides enabling -intelligent I/O technologies that increase network management control, -enhance CPU utilization, optimize I/O performance, and ensure data security -and availability. Products are sold globally through a network of OEMs, -major distributors, VARs, and system integrators. Mylex Corporation is -headquartered at 34551 Ardenwood Blvd., Fremont, CA. - - #### - -Contact: - -Peter Shambora -Vice President of Marketing -Mylex Corp. -510/796-6100 -peters@mylex.com - - ANNOUNCEMENT - BusLogic FlashPoint LT/BT-948 Upgrade Program - 1 February 1996 - - ADDITIONAL ANNOUNCEMENT - BusLogic FlashPoint LW/BT-958 Upgrade Program - 14 June 1996 - -Ever since its introduction last October, the BusLogic FlashPoint LT has -been problematic for members of the Linux community, in that no Linux -drivers have been available for this new Ultra SCSI product. Despite its -officially being positioned as a desktop workstation product, and not being -particularly well suited for a high performance multitasking operating -system like Linux, the FlashPoint LT has been touted by computer system -vendors as the latest thing, and has been sold even on many of their high -end systems, to the exclusion of the older MultiMaster products. This has -caused grief for many people who inadvertently purchased a system expecting -that all BusLogic SCSI Host Adapters were supported by Linux, only to -discover that the FlashPoint was not supported and would not be for quite -some time, if ever. - -After this problem was identified, BusLogic contacted its major OEM -customers to make sure the BT-946C/956C MultiMaster cards would still be -made available, and that Linux users who mistakenly ordered systems with -the FlashPoint would be able to upgrade to the BT-946C. While this helped -many purchasers of new systems, it was only a partial solution to the -overall problem of FlashPoint support for Linux users. It did nothing to -assist the people who initially purchased a FlashPoint for a supported -operating system and then later decided to run Linux, or those who had -ended up with a FlashPoint LT, believing it was supported, and were unable -to return it. - -In the middle of December, I asked to meet with BusLogic's senior -management to discuss the issues related to Linux and free software support -for the FlashPoint. Rumors of varying accuracy had been circulating -publicly about BusLogic's attitude toward the Linux community, and I felt -it was best that these issues be addressed directly. I sent an email -message after 11pm one evening, and the meeting took place the next -afternoon. Unfortunately, corporate wheels sometimes grind slowly, -especially when a company is being acquired, and so it's taken until now -before the details were completely determined and a public statement could -be made. - -BusLogic is not prepared at this time to release the information necessary -for third parties to write drivers for the FlashPoint. The only existing -FlashPoint drivers have been written directly by BusLogic Engineering, and -there is no FlashPoint documentation sufficiently detailed to allow outside -developers to write a driver without substantial assistance. While there -are people at BusLogic who would rather not release the details of the -FlashPoint architecture at all, that debate has not yet been settled either -way. In any event, even if documentation were available today it would -take quite a while for a usable driver to be written, especially since I'm -not convinced that the effort required would be worthwhile. - -However, BusLogic does remain committed to providing a high performance -SCSI solution for the Linux community, and does not want to see anyone left -unable to run Linux because they have a Flashpoint LT. Therefore, BusLogic -has put in place a direct upgrade program to allow any Linux user worldwide -to trade in their FlashPoint LT for the new BT-948 MultiMaster PCI Ultra -SCSI Host Adapter. The BT-948 is the Ultra SCSI successor to the BT-946C -and has all the best features of both the BT-946C and FlashPoint LT, -including smart termination and a flash PROM for easy firmware updates, and -is of course compatible with the present Linux driver. The price for this -upgrade has been set at US $45 plus shipping and handling, and the upgrade -program will be administered through BusLogic Technical Support, which can -be reached by electronic mail at techsup@buslogic.com, by Voice at +1 408 -654-0760, or by FAX at +1 408 492-1542. - -As of 14 June 1996, the original BusLogic FlashPoint LT to BT-948 upgrade -program has now been extended to encompass the FlashPoint LW Wide Ultra -SCSI Host Adapter. Any Linux user worldwide may trade in their FlashPoint -LW (BT-950) for a BT-958 MultiMaster PCI Ultra SCSI Host Adapter. The -price for this upgrade has been set at US $65 plus shipping and handling. - -I was a beta test site for the BT-948/958, and versions 1.2.1 and 1.3.1 of -my BusLogic driver already included latent support for the BT-948/958. -Additional cosmetic support for the Ultra SCSI MultiMaster cards was added -subsequent releases. As a result of this cooperative testing process, -several firmware bugs were found and corrected. My heavily loaded Linux -test system provided an ideal environment for testing error recovery -processes that are much more rarely exercised in production systems, but -are crucial to overall system stability. It was especially convenient -being able to work directly with their firmware engineer in demonstrating -the problems under control of the firmware debugging environment; things -sure have come a long way since the last time I worked on firmware for an -embedded system. I am presently working on some performance testing and -expect to have some data to report in the not too distant future. - -BusLogic asked me to send this announcement since a large percentage of the -questions regarding support for the FlashPoint have either been sent to me -directly via email, or have appeared in the Linux newsgroups in which I -participate. To summarize, BusLogic is offering Linux users an upgrade -from the unsupported FlashPoint LT (BT-930) to the supported BT-948 for US -$45 plus shipping and handling, or from the unsupported FlashPoint LW -(BT-950) to the supported BT-958 for $65 plus shipping and handling. -Contact BusLogic Technical Support at techsup@buslogic.com or +1 408 -654-0760 to take advantage of their offer. - - Leonard N. Zubkoff - lnz@dandelion.com diff --git a/Documentation/scsi/NinjaSCSI.rst b/Documentation/scsi/NinjaSCSI.rst new file mode 100644 index 000000000000..999a6ed5bf7e --- /dev/null +++ b/Documentation/scsi/NinjaSCSI.rst @@ -0,0 +1,164 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================= +WorkBiT NinjaSCSI-3/32Bi driver for Linux +========================================= + +1. Comment +========== + +This is Workbit corp.'s(http://www.workbit.co.jp/) NinjaSCSI-3 +for Linux. + +2. My Linux environment +======================= + +:Linux kernel: 2.4.7 / 2.2.19 +:pcmcia-cs: 3.1.27 +:gcc: gcc-2.95.4 +:PC card: I-O data PCSC-F (NinjaSCSI-3), + I-O data CBSC-II in 16 bit mode (NinjaSCSI-32Bi) +:SCSI device: I-O data CDPS-PX24 (CD-ROM drive), + Media Intelligent MMO-640GT (Optical disk drive) + +3. Install +========== + +(a) Check your PC card is true "NinjaSCSI-3" card. + + If you installed pcmcia-cs already, pcmcia reports your card as UNKNOWN + card, and write ["WBT", "NinjaSCSI-3", "R1.0"] or some other string to + your console or log file. + + You can also use "cardctl" program (this program is in pcmcia-cs source + code) to get more info. + + :: + + # cat /var/log/messages + ... + Jan 2 03:45:06 lindberg cardmgr[78]: unsupported card in socket 1 + Jan 2 03:45:06 lindberg cardmgr[78]: product info: "WBT", "NinjaSCSI-3", "R1.0" + ... + # cardctl ident + Socket 0: + no product info available + Socket 1: + product info: "IO DATA", "CBSC16 ", "1" + + +(b) Get the Linux kernel source, and extract it to /usr/src. + Because the NinjaSCSI driver requires some SCSI header files in Linux + kernel source, I recommend rebuilding your kernel; this eliminates + some versioning problems. + + :: + + $ cd /usr/src + $ tar -zxvf linux-x.x.x.tar.gz + $ cd linux + $ make config + ... + +(c) If you use this driver with Kernel 2.2, unpack pcmcia-cs in some directory + and make & install. This driver requires the pcmcia-cs header file. + + :: + + $ cd /usr/src + $ tar zxvf cs-pcmcia-cs-3.x.x.tar.gz + ... + +(d) Extract this driver's archive somewhere, and edit Makefile, then do make:: + + $ tar -zxvf nsp_cs-x.x.tar.gz + $ cd nsp_cs-x.x + $ emacs Makefile + ... + $ make + +(e) Copy nsp_cs.ko to suitable place, like /lib/modules/<Kernel version>/pcmcia/ . + +(f) Add these lines to /etc/pcmcia/config . + + If you use pcmcia-cs-3.1.8 or later, we can use "nsp_cs.conf" file. + So, you don't need to edit file. Just copy to /etc/pcmcia/ . + + :: + + device "nsp_cs" + class "scsi" module "nsp_cs" + + card "WorkBit NinjaSCSI-3" + version "WBT", "NinjaSCSI-3", "R1.0" + bind "nsp_cs" + + card "WorkBit NinjaSCSI-32Bi (16bit)" + version "WORKBIT", "UltraNinja-16", "1" + bind "nsp_cs" + + # OEM + card "WorkBit NinjaSCSI-32Bi (16bit) / IO-DATA" + version "IO DATA", "CBSC16 ", "1" + bind "nsp_cs" + + # OEM + card "WorkBit NinjaSCSI-32Bi (16bit) / KME-1" + version "KME ", "SCSI-CARD-001", "1" + bind "nsp_cs" + card "WorkBit NinjaSCSI-32Bi (16bit) / KME-2" + version "KME ", "SCSI-CARD-002", "1" + bind "nsp_cs" + card "WorkBit NinjaSCSI-32Bi (16bit) / KME-3" + version "KME ", "SCSI-CARD-003", "1" + bind "nsp_cs" + card "WorkBit NinjaSCSI-32Bi (16bit) / KME-4" + version "KME ", "SCSI-CARD-004", "1" + bind "nsp_cs" + +(f) Start (or restart) pcmcia-cs:: + + # /etc/rc.d/rc.pcmcia start (BSD style) + + or:: + + # /etc/init.d/pcmcia start (SYSV style) + + +4. History +========== + +See README.nin_cs . + +5. Caution +========== + +If you eject card when doing some operation for your SCSI device or suspend +your computer, you encount some *BAD* error like disk crash. + +It works good when I using this driver right way. But I'm not guarantee +your data. Please backup your data when you use this driver. + +6. Known Bugs +============= + +In 2.4 kernel, you can't use 640MB Optical disk. This error comes from +high level SCSI driver. + +7. Testing +========== + +Please send me some reports(bug reports etc..) of this software. +When you send report, please tell me these or more. + + - card name + - kernel version + - your SCSI device name(hard drive, CD-ROM, etc...) + +8. Copyright +============ + + See GPL. + + +2001/08/08 yokota@netlab.is.tsukuba.ac.jp <YOKOTA Hiroshi> diff --git a/Documentation/scsi/NinjaSCSI.txt b/Documentation/scsi/NinjaSCSI.txt deleted file mode 100644 index ac8db8ceec77..000000000000 --- a/Documentation/scsi/NinjaSCSI.txt +++ /dev/null @@ -1,128 +0,0 @@ - - WorkBiT NinjaSCSI-3/32Bi driver for Linux - -1. Comment - This is Workbit corp.'s(http://www.workbit.co.jp/) NinjaSCSI-3 -for Linux. - -2. My Linux environment -Linux kernel: 2.4.7 / 2.2.19 -pcmcia-cs: 3.1.27 -gcc: gcc-2.95.4 -PC card: I-O data PCSC-F (NinjaSCSI-3) - I-O data CBSC-II in 16 bit mode (NinjaSCSI-32Bi) -SCSI device: I-O data CDPS-PX24 (CD-ROM drive) - Media Intelligent MMO-640GT (Optical disk drive) - -3. Install -[1] Check your PC card is true "NinjaSCSI-3" card. - If you installed pcmcia-cs already, pcmcia reports your card as UNKNOWN - card, and write ["WBT", "NinjaSCSI-3", "R1.0"] or some other string to - your console or log file. - You can also use "cardctl" program (this program is in pcmcia-cs source - code) to get more info. - -# cat /var/log/messages -... -Jan 2 03:45:06 lindberg cardmgr[78]: unsupported card in socket 1 -Jan 2 03:45:06 lindberg cardmgr[78]: product info: "WBT", "NinjaSCSI-3", "R1.0" -... -# cardctl ident -Socket 0: - no product info available -Socket 1: - product info: "IO DATA", "CBSC16 ", "1" - - -[2] Get the Linux kernel source, and extract it to /usr/src. - Because the NinjaSCSI driver requires some SCSI header files in Linux - kernel source, I recommend rebuilding your kernel; this eliminates - some versioning problems. -$ cd /usr/src -$ tar -zxvf linux-x.x.x.tar.gz -$ cd linux -$ make config -... - -[3] If you use this driver with Kernel 2.2, unpack pcmcia-cs in some directory - and make & install. This driver requires the pcmcia-cs header file. -$ cd /usr/src -$ tar zxvf cs-pcmcia-cs-3.x.x.tar.gz -... - -[4] Extract this driver's archive somewhere, and edit Makefile, then do make. -$ tar -zxvf nsp_cs-x.x.tar.gz -$ cd nsp_cs-x.x -$ emacs Makefile -... -$ make - -[5] Copy nsp_cs.ko to suitable place, like /lib/modules/<Kernel version>/pcmcia/ . - -[6] Add these lines to /etc/pcmcia/config . - If you use pcmcia-cs-3.1.8 or later, we can use "nsp_cs.conf" file. - So, you don't need to edit file. Just copy to /etc/pcmcia/ . - -------------------------------------- -device "nsp_cs" - class "scsi" module "nsp_cs" - -card "WorkBit NinjaSCSI-3" - version "WBT", "NinjaSCSI-3", "R1.0" - bind "nsp_cs" - -card "WorkBit NinjaSCSI-32Bi (16bit)" - version "WORKBIT", "UltraNinja-16", "1" - bind "nsp_cs" - -# OEM -card "WorkBit NinjaSCSI-32Bi (16bit) / IO-DATA" - version "IO DATA", "CBSC16 ", "1" - bind "nsp_cs" - -# OEM -card "WorkBit NinjaSCSI-32Bi (16bit) / KME-1" - version "KME ", "SCSI-CARD-001", "1" - bind "nsp_cs" -card "WorkBit NinjaSCSI-32Bi (16bit) / KME-2" - version "KME ", "SCSI-CARD-002", "1" - bind "nsp_cs" -card "WorkBit NinjaSCSI-32Bi (16bit) / KME-3" - version "KME ", "SCSI-CARD-003", "1" - bind "nsp_cs" -card "WorkBit NinjaSCSI-32Bi (16bit) / KME-4" - version "KME ", "SCSI-CARD-004", "1" - bind "nsp_cs" -------------------------------------- - -[7] Start (or restart) pcmcia-cs. -# /etc/rc.d/rc.pcmcia start (BSD style) -or -# /etc/init.d/pcmcia start (SYSV style) - - -4. History -See README.nin_cs . - -5. Caution - If you eject card when doing some operation for your SCSI device or suspend -your computer, you encount some *BAD* error like disk crash. - It works good when I using this driver right way. But I'm not guarantee -your data. Please backup your data when you use this driver. - -6. Known Bugs - In 2.4 kernel, you can't use 640MB Optical disk. This error comes from -high level SCSI driver. - -7. Testing - Please send me some reports(bug reports etc..) of this software. -When you send report, please tell me these or more. - card name - kernel version - your SCSI device name(hard drive, CD-ROM, etc...) - -8. Copyright - See GPL. - - -2001/08/08 yokota@netlab.is.tsukuba.ac.jp <YOKOTA Hiroshi> diff --git a/Documentation/scsi/aacraid.txt b/Documentation/scsi/aacraid.rst index 30f643f611b2..1904674b94f3 100644 --- a/Documentation/scsi/aacraid.txt +++ b/Documentation/scsi/aacraid.rst @@ -1,7 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================================== AACRAID Driver for Linux (take two) +=================================== Introduction -------------------------- +============ The aacraid driver adds support for Adaptec (http://www.adaptec.com) RAID controllers. This is a major rewrite from the original Adaptec supplied driver. It has significantly cleaned up both the code @@ -9,8 +13,11 @@ and the running binary size (the module is less than half the size of the original). Supported Cards/Chipsets -------------------------- +======================== + + =================== ======= ======================================= PCI ID (pci.ids) OEM Product + =================== ======= ======================================= 9005:0285:9005:0285 Adaptec 2200S (Vulcan) 9005:0285:9005:0286 Adaptec 2120S (Crusader) 9005:0285:9005:0287 Adaptec 2200S (Vulcan-2m) @@ -117,34 +124,54 @@ Supported Cards/Chipsets 9005:0285:108e:0286 SUN STK RAID INT (Cougar) 9005:0285:108e:0287 SUN STK RAID EXT (Prometheus) 9005:0285:108e:7aae SUN STK RAID EM (Narvi) + =================== ======= ======================================= People -------------------------- +====== + Alan Cox <alan@lxorguk.ukuu.org.uk> -Christoph Hellwig <hch@infradead.org> (updates for new-style PCI probing and SCSI host registration, - small cleanups/fixes) -Matt Domsch <matt_domsch@dell.com> (revision ioctl, adapter messages) -Deanna Bonds (non-DASD support, PAE fibs and 64 bit, added new adaptec controllers - added new ioctls, changed scsi interface to use new error handler, - increased the number of fibs and outstanding commands to a container) - - (fixed 64bit and 64G memory model, changed confusing naming convention - where fibs that go to the hardware are consistently called hw_fibs and - not just fibs like the name of the driver tracking structure) -Mark Salyzyn <Mark_Salyzyn@adaptec.com> Fixed panic issues and added some new product ids for upcoming hbas. Performance tuning, card failover and bug mitigations. + +Christoph Hellwig <hch@infradead.org> + +- updates for new-style PCI probing and SCSI host registration, + small cleanups/fixes + +Matt Domsch <matt_domsch@dell.com> + +- revision ioctl, adapter messages + +Deanna Bonds + +- non-DASD support, PAE fibs and 64 bit, added new adaptec controllers + added new ioctls, changed scsi interface to use new error handler, + increased the number of fibs and outstanding commands to a container +- fixed 64bit and 64G memory model, changed confusing naming convention + where fibs that go to the hardware are consistently called hw_fibs and + not just fibs like the name of the driver tracking structure + +Mark Salyzyn <Mark_Salyzyn@adaptec.com> + +- Fixed panic issues and added some new product ids for upcoming hbas. +- Performance tuning, card failover and bug mitigations. + Achim Leubner <Achim_Leubner@adaptec.com> -Original Driver +- Original Driver + ------------------------- + Adaptec Unix OEM Product Group Mailing List -------------------------- +============ + linux-scsi@vger.kernel.org (Interested parties troll here) Also note this is very different to Brian's original driver so don't expect him to support it. + Adaptec does support this driver. Contact Adaptec tech support or aacraid@adaptec.com Original by Brian Boerner February 2001 + Rewritten by Alan Cox, November 2001 diff --git a/Documentation/scsi/advansys.txt b/Documentation/scsi/advansys.rst index 4a3db62b7424..e0367e179696 100644 --- a/Documentation/scsi/advansys.txt +++ b/Documentation/scsi/advansys.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +AdvanSys Driver Notes +===================== + AdvanSys (Advanced System Products, Inc.) manufactures the following RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI @@ -12,50 +18,51 @@ adapter detected. The number of CDBs used by the driver can be lowered in the BIOS by changing the 'Host Queue Size' adapter setting. Laptop Products: - ABP-480 - Bus-Master CardBus (16 CDB) + - ABP-480 - Bus-Master CardBus (16 CDB) Connectivity Products: - ABP510/5150 - Bus-Master ISA (240 CDB) - ABP5140 - Bus-Master ISA PnP (16 CDB) - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) - ABP902/3902 - Bus-Master PCI (16 CDB) - ABP3905 - Bus-Master PCI (16 CDB) - ABP915 - Bus-Master PCI (16 CDB) - ABP920 - Bus-Master PCI (16 CDB) - ABP3922 - Bus-Master PCI (16 CDB) - ABP3925 - Bus-Master PCI (16 CDB) - ABP930 - Bus-Master PCI (16 CDB) - ABP930U - Bus-Master PCI Ultra (16 CDB) - ABP930UA - Bus-Master PCI Ultra (16 CDB) - ABP960 - Bus-Master PCI MAC/PC (16 CDB) - ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) + - ABP510/5150 - Bus-Master ISA (240 CDB) + - ABP5140 - Bus-Master ISA PnP (16 CDB) + - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) + - ABP902/3902 - Bus-Master PCI (16 CDB) + - ABP3905 - Bus-Master PCI (16 CDB) + - ABP915 - Bus-Master PCI (16 CDB) + - ABP920 - Bus-Master PCI (16 CDB) + - ABP3922 - Bus-Master PCI (16 CDB) + - ABP3925 - Bus-Master PCI (16 CDB) + - ABP930 - Bus-Master PCI (16 CDB) + - ABP930U - Bus-Master PCI Ultra (16 CDB) + - ABP930UA - Bus-Master PCI Ultra (16 CDB) + - ABP960 - Bus-Master PCI MAC/PC (16 CDB) + - ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) Single Channel Products: - ABP542 - Bus-Master ISA with floppy (240 CDB) - ABP742 - Bus-Master EISA (240 CDB) - ABP842 - Bus-Master VL (240 CDB) - ABP940 - Bus-Master PCI (240 CDB) - ABP940U - Bus-Master PCI Ultra (240 CDB) - ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB) - ABP970 - Bus-Master PCI MAC/PC (240 CDB) - ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) - ABP3960UA - Bus-Master PCI MAC/PC Ultra (240 CDB) - ABP940UW/3940UW - Bus-Master PCI Ultra-Wide (253 CDB) - ABP970UW - Bus-Master PCI MAC/PC Ultra-Wide (253 CDB) - ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB) + - ABP542 - Bus-Master ISA with floppy (240 CDB) + - ABP742 - Bus-Master EISA (240 CDB) + - ABP842 - Bus-Master VL (240 CDB) + - ABP940 - Bus-Master PCI (240 CDB) + - ABP940U - Bus-Master PCI Ultra (240 CDB) + - ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB) + - ABP970 - Bus-Master PCI MAC/PC (240 CDB) + - ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) + - ABP3960UA - Bus-Master PCI MAC/PC Ultra (240 CDB) + - ABP940UW/3940UW - Bus-Master PCI Ultra-Wide (253 CDB) + - ABP970UW - Bus-Master PCI MAC/PC Ultra-Wide (253 CDB) + - ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB) Multi-Channel Products: - ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel) - ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) - ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) - ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB Per Channel) - ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) - ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) - ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.) - ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB) - ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB) + - ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel) + - ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) + - ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) + - ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB Per Channel) + - ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) + - ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) + - ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.) + - ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB) + - ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB) Driver Compile Time Options and Debugging +========================================= The following constants can be defined in the source file. @@ -88,26 +95,30 @@ The following constants can be defined in the source file. first three hex digits of the pseudo I/O Port must be set to 'deb' and the fourth hex digit specifies the debug level: 0 - F. The following command line will look for an adapter at 0x330 - and set the debug level to 2. + and set the debug level to 2:: linux advansys=0x330,0,0,0,0xdeb2 If the driver is built as a loadable module this variable can be defined when the driver is loaded. The following insmod command - will set the debug level to one. + will set the debug level to one:: insmod advansys.o asc_dbglvl=1 Debugging Message Levels: - 0: Errors Only - 1: High-Level Tracing - 2-N: Verbose Tracing + + + ==== ================== + 0 Errors Only + 1 High-Level Tracing + 2-N Verbose Tracing + ==== ================== To enable debug output to console, please make sure that: a. System and kernel logging is enabled (syslogd, klogd running). b. Kernel messages are routed to console output. Check - /etc/syslog.conf for an entry similar to this: + /etc/syslog.conf for an entry similar to this:: kern.* /dev/console @@ -120,8 +131,11 @@ The following constants can be defined in the source file. Alternatively you can enable printk() to console with this program. However, this is not the 'official' way to do this. + Debug output is logged in /var/log/messages. + :: + main() { syscall(103, 7, 0, 0); @@ -144,11 +158,11 @@ The following constants can be defined in the source file. Statistics are only available for kernels greater than or equal to v1.3.0 with the CONFIG_PROC_FS (/proc) file system configured. - AdvanSys SCSI adapter files have the following path name format: + AdvanSys SCSI adapter files have the following path name format:: /proc/scsi/advansys/{0,1,2,3,...} - This information can be displayed with cat. For example: + This information can be displayed with cat. For example:: cat /proc/scsi/advansys/0 @@ -156,6 +170,7 @@ The following constants can be defined in the source file. contain adapter and device configuration information. Driver LILO Option +================== If init/main.c is modified as described in the 'Directions for Adding the AdvanSys Driver to Linux' section (B.4.) above, the driver will @@ -167,17 +182,30 @@ affects searching for ISA and VL boards. Examples: 1. Eliminate I/O port scanning: - boot: linux advansys= - or - boot: linux advansys=0x0 + + boot:: + + linux advansys= + + or:: + + boot: linux advansys=0x0 + 2. Limit I/O port scanning to one I/O port: - boot: linux advansys=0x110 + + boot:: + + linux advansys=0x110 + 3. Limit I/O port scanning to four I/O ports: - boot: linux advansys=0x110,0x210,0x230,0x330 + + boot:: + + linux advansys=0x110,0x210,0x230,0x330 For a loadable module the same effect can be achieved by setting the 'asc_iopflag' variable and 'asc_ioport' array when loading -the driver, e.g. +the driver, e.g.:: insmod advansys.o asc_iopflag=1 asc_ioport=0x110,0x330 @@ -187,6 +215,7 @@ the 'Driver Compile Time Options and Debugging' section above for more information. Credits (Chronological Order) +============================= Bob Frey <bfrey@turbolinux.com.cn> wrote the AdvanSys SCSI driver and maintained it up to 3.3F. He continues to answer questions diff --git a/Documentation/scsi/aha152x.txt b/Documentation/scsi/aha152x.rst index 94848734ac66..7012b5c46d5d 100644 --- a/Documentation/scsi/aha152x.txt +++ b/Documentation/scsi/aha152x.rst @@ -1,7 +1,12 @@ -$Id: README.aha152x,v 1.2 1999/12/25 15:32:30 fischer Exp fischer $ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +===================================================== Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x) +===================================================== + +Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de> -Copyright 1993-1999 Jürgen Fischer <fischer@norbit.de> TC1550 patches by Luuk van Dijk (ldz@xs4all.nl) @@ -14,8 +19,10 @@ less polling loops), has slightly higher throughput (at least on my ancient test box; a i486/33Mhz/20MB). -CONFIGURATION ARGUMENTS: +Configuration Arguments +======================= +============ ======================================== ====================== IOPORT base io address (0x340/0x140) IRQ interrupt level (9-12; default 11) SCSI_ID scsi id of controller (0-7; default 7) @@ -25,31 +32,38 @@ SYNCHRONOUS enable synchronous transfers (0/1; default 1 [on]) DELAY: bus reset delay (default 100) EXT_TRANS: enable extended translation (0/1: default 0 [off]) (see NOTES) +============ ======================================== ====================== + +Compile Time Configuration +========================== + +(go into AHA152X in drivers/scsi/Makefile): -COMPILE TIME CONFIGURATION (go into AHA152X in drivers/scsi/Makefile): +- DAUTOCONF + use configuration the controller reports (AHA-152x only) --DAUTOCONF - use configuration the controller reports (AHA-152x only) +- DSKIP_BIOSTEST + Don't test for BIOS signature (AHA-1510 or disabled BIOS) --DSKIP_BIOSTEST - Don't test for BIOS signature (AHA-1510 or disabled BIOS) +- DSETUP0="{ IOPORT, IRQ, SCSI_ID, RECONNECT, PARITY, SYNCHRONOUS, DELAY, EXT_TRANS }" + override for the first controller --DSETUP0="{ IOPORT, IRQ, SCSI_ID, RECONNECT, PARITY, SYNCHRONOUS, DELAY, EXT_TRANS }" - override for the first controller +- DSETUP1="{ IOPORT, IRQ, SCSI_ID, RECONNECT, PARITY, SYNCHRONOUS, DELAY, EXT_TRANS }" + override for the second controller --DSETUP1="{ IOPORT, IRQ, SCSI_ID, RECONNECT, PARITY, SYNCHRONOUS, DELAY, EXT_TRANS }" - override for the second controller +- DAHA152X_DEBUG + enable debugging output --DAHA152X_DEBUG - enable debugging output +- DAHA152X_STAT + enable some statistics --DAHA152X_STAT - enable some statistics +LILO Command Line Options +========================= -LILO COMMAND LINE OPTIONS: + :: -aha152x=<IOPORT>[,<IRQ>[,<SCSI-ID>[,<RECONNECT>[,<PARITY>[,<SYNCHRONOUS>[,<DELAY> [,<EXT_TRANS]]]]]]] + aha152x=<IOPORT>[,<IRQ>[,<SCSI-ID>[,<RECONNECT>[,<PARITY>[,<SYNCHRONOUS>[,<DELAY> [,<EXT_TRANS]]]]]]] The normal configuration can be overridden by specifying a command line. When you do this, the BIOS test is skipped. Entered values have to be @@ -58,17 +72,21 @@ aha152x=<IOPORT>[,<IRQ>[,<SCSI-ID>[,<RECONNECT>[,<PARITY>[,<SYNCHRONOUS>[,<DELAY For two controllers use the aha152x statement twice. -SYMBOLS FOR MODULE CONFIGURATION: +Symbols for Module Configuration +================================ Choose from 2 alternatives: -1. specify everything (old) +1. specify everything (old):: + + aha152x=IOPORT,IRQ,SCSI_ID,RECONNECT,PARITY,SYNCHRONOUS,DELAY,EXT_TRANS -aha152x=IOPORT,IRQ,SCSI_ID,RECONNECT,PARITY,SYNCHRONOUS,DELAY,EXT_TRANS configuration override for first controller + :: + + aha152x1=IOPORT,IRQ,SCSI_ID,RECONNECT,PARITY,SYNCHRONOUS,DELAY,EXT_TRANS -aha152x1=IOPORT,IRQ,SCSI_ID,RECONNECT,PARITY,SYNCHRONOUS,DELAY,EXT_TRANS configuration override for second controller 2. specify only what you need to (irq or io is required; new) @@ -101,7 +119,8 @@ exttrans=EXTTRANS0[,EXTTRANS1] If you use both alternatives the first will be taken. -NOTES ON EXT_TRANS: +Notes on EXT_TRANS +================== SCSI uses block numbers to address blocks/sectors on a device. The BIOS uses a cylinder/head/sector addressing scheme (C/H/S) @@ -150,8 +169,9 @@ geometry right in most cases: - for disks<1GB: use default translation (C/32/64) - for disks>1GB: + - take current geometry from the partition table - (using scsicam_bios_param and accept only `valid' geometries, + (using scsicam_bios_param and accept only 'valid' geometries, ie. either (C/32/64) or (C/63/255)). This can be extended translation even if it's not enabled in the driver. @@ -161,7 +181,8 @@ geometry right in most cases: disks. -REFERENCES USED: +References Used +=============== "AIC-6260 SCSI Chip Specification", Adaptec Corporation. @@ -177,7 +198,7 @@ REFERENCES USED: Drew Eckhardt (drew@cs.colorado.edu) - Eric Youngdale (eric@andante.org) + Eric Youngdale (eric@andante.org) special thanks to Eric Youngdale for the free(!) supplying the documentation on the chip. diff --git a/Documentation/scsi/aic79xx.rst b/Documentation/scsi/aic79xx.rst new file mode 100644 index 000000000000..071ff5111a4f --- /dev/null +++ b/Documentation/scsi/aic79xx.rst @@ -0,0 +1,593 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +=================================== +Adaptec Ultra320 Family Manager Set +=================================== + +README for The Linux Operating System + +.. The following information is available in this file: + + 1. Supported Hardware + 2. Version History + 3. Command Line Options + 4. Additional Notes + 5. Contacting Adaptec + + +1. Supported Hardware +===================== + + The following Adaptec SCSI Host Adapters are supported by this + driver set. + + ============= ========================================= + Ultra320 ASIC Description + ============= ========================================= + AIC-7901A Single Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC + AIC-7901B Single Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC with Retained Training + AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC + AIC-7902B Dual Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC with Retained Training + ============= ========================================= + + ========================== ===================================== ============ + Ultra320 Adapters Description ASIC + ========================== ===================================== ============ + Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin) + Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin) + Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 + Ultra320 SCSI Card (two external VHDC + and one internal 68-pin) + Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 + Ultra320 SCSI Card (two external VHDC + and one internal 68-pin) based on the + AIC-7902B ASIC + Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to 7901A + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin, one + internal 50-pin) + Adaptec SCSI Card 29320A Single Channel 64-bit PCI-X 133MHz to 7901B + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin, one + internal 50-pin) + Adaptec SCSI Card 29320LP Single Channel 64-bit Low Profile 7901A + PCI-X 133MHz to Ultra320 SCSI Card + (One external VHDC, one internal + 68-pin) + Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile 7901B + PCI-X 133MHz to Ultra320 SCSI Card + (One external VHDC, one internal + 68-pin) + ========================== ===================================== ============ + +2. Version History +================== + + + * 3.0 (December 1st, 2005) + - Updated driver to use SCSI transport class infrastructure + - Upported sequencer and core fixes from adaptec released + version 2.0.15 of the driver. + + * 1.3.11 (July 11, 2003) + - Fix several deadlock issues. + - Add 29320ALP and 39320B Id's. + + * 1.3.10 (June 3rd, 2003) + - Align the SCB_TAG field on a 16byte boundary. This avoids + SCB corruption on some PCI-33 busses. + - Correct non-zero luns on Rev B. hardware. + - Update for change in 2.5.X SCSI proc FS interface. + - When negotiation async via an 8bit WDTR message, send + an SDTR with an offset of 0 to be sure the target + knows we are async. This works around a firmware defect + in the Quantum Atlas 10K. + - Implement controller suspend and resume. + - Clear PCI error state during driver attach so that we + don't disable memory mapped I/O due to a stray write + by some other driver probe that occurred before we + claimed the controller. + + * 1.3.9 (May 22nd, 2003) + - Fix compiler errors. + - Remove S/G splitting for segments that cross a 4GB boundary. + This is guaranteed not to happen in Linux. + - Add support for scsi_report_device_reset() found in + 2.5.X kernels. + - Add 7901B support. + - Simplify handling of the packetized lun Rev A workaround. + - Correct and simplify handling of the ignore wide residue + message. The previous code would fail to report a residual + if the transaction data length was even and we received + an IWR message. + + * 1.3.8 (April 29th, 2003) + - Fix types accessed via the command line interface code. + - Perform a few firmware optimizations. + - Fix "Unexpected PKT busfree" errors. + - Use a sequencer interrupt to notify the host of + commands with bad status. We defer the notification + until there are no outstanding selections to ensure + that the host is interrupted for as short a time as + possible. + - Remove pre-2.2.X support. + - Add support for new 2.5.X interrupt API. + - Correct big-endian architecture support. + + * 1.3.7 (April 16th, 2003) + - Use del_timer_sync() to ensure that no timeouts + are pending during controller shutdown. + - For pre-2.5.X kernels, carefully adjust our segment + list size to avoid SCSI malloc pool fragmentation. + - Cleanup channel display in our /proc output. + - Workaround duplicate device entries in the mid-layer + device list during add-single-device. + + * 1.3.6 (March 28th, 2003) + - Correct a double free in the Domain Validation code. + - Correct a reference to free'ed memory during controller + shutdown. + - Reset the bus on an SE->LVD change. This is required + to reset our transceivers. + + * 1.3.5 (March 24th, 2003) + - Fix a few register window mode bugs. + - Include read streaming in the PPR flags we display in + diagnostics as well as /proc. + - Add PCI hot plug support for 2.5.X kernels. + - Correct default precompensation value for RevA hardware. + - Fix Domain Validation thread shutdown. + - Add a firmware workaround to make the LED blink + brighter during packetized operations on the H2A4. + - Correct /proc display of user read streaming settings. + - Simplify driver locking by releasing the io_request_lock + upon driver entry from the mid-layer. + - Cleanup command line parsing and move much of this code + to aiclib. + + * 1.3.4 (February 28th, 2003) + - Correct a race condition in our error recovery handler. + - Allow Test Unit Ready commands to take a full 5 seconds + during Domain Validation. + + * 1.3.2 (February 19th, 2003) + - Correct a Rev B. regression due to the GEM318 + compatibility fix included in 1.3.1. + + * 1.3.1 (February 11th, 2003) + - Add support for the 39320A. + - Improve recovery for certain PCI-X errors. + - Fix handling of LQ/DATA/LQ/DATA for the + same write transaction that can occur without + interveining training. + - Correct compatibility issues with the GEM318 + enclosure services device. + - Correct data corruption issue that occurred under + high tag depth write loads. + - Adapt to a change in the 2.5.X daemonize() API. + - Correct a "Missing case in ahd_handle_scsiint" panic. + + * 1.3.0 (January 21st, 2003) + - Full regression testing for all U320 products completed. + - Added abort and target/lun reset error recovery handler and + interrupt coalescing. + + * 1.2.0 (November 14th, 2002) + - Added support for Domain Validation + - Add support for the Hewlett-Packard version of the 39320D + and AIC-7902 adapters. + + Support for previous adapters has not been fully tested and should + only be used at the customer's own risk. + + * 1.1.1 (September 24th, 2002) + - Added support for the Linux 2.5.X kernel series + + * 1.1.0 (September 17th, 2002) + - Added support for four additional SCSI products: + ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. + + * 1.0.0 (May 30th, 2002) + - Initial driver release. + + * 2.1. Software/Hardware Features + - Support for the SPI-4 "Ultra320" standard: + - 320MB/s transfer rates + - Packetized SCSI Protocol at 160MB/s and 320MB/s + - Quick Arbitration Selection (QAS) + - Retained Training Information (Rev B. ASIC only) + - Interrupt Coalescing + - Initiator Mode (target mode not currently + supported) + - Support for the PCI-X standard up to 133MHz + - Support for the PCI v2.2 standard + - Domain Validation + + * 2.2. Operating System Support: + - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 + - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 + - only Intel and AMD x86 supported at this time + - >4GB memory configurations supported. + + Refer to the User's Guide for more details on this. + +3. Command Line Options +======================= + + .. Warning:: + + ALTERING OR ADDING THESE DRIVER PARAMETERS + INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. + USE THEM WITH CAUTION. + + Put a .conf file in the /etc/modprobe.d/ directory and add/edit a + line containing ``options aic79xx aic79xx=[command[,command...]]`` where + ``command`` is one or more of the following: + + +verbose + :Definition: enable additional informative messages during driver operation. + :Possible Values: This option is a flag + :Default Value: disabled + +debug:[value] + :Definition: Enables various levels of debugging information + The bit definitions for the debugging mask can + be found in drivers/scsi/aic7xxx/aic79xx.h under + the "Debug" heading. + :Possible Values: 0x0000 = no debugging, 0xffff = full debugging + :Default Value: 0x0000 + +no_reset + :Definition: Do not reset the bus during the initial probe + phase + :Possible Values: This option is a flag + :Default Value: disabled + +extended + :Definition: Force extended translation on the controller + :Possible Values: This option is a flag + :Default Value: disabled + +periodic_otag + :Definition: Send an ordered tag periodically to prevent + tag starvation. Needed for some older devices + :Possible Values: This option is a flag + :Default Value: disabled + +reverse_scan + :Definition: Probe the scsi bus in reverse order, starting with target 15 + :Possible Values: This option is a flag + :Default Value: disabled + +global_tag_depth + :Definition: Global tag depth for all targets on all busses. + This option sets the default tag depth which + may be selectively overridden vi the tag_info + option. + + :Possible Values: 1 - 253 + :Default Value: 32 + +tag_info:{{value[,value...]}[,{value[,value...]}...]} + :Definition: Set the per-target tagged queue depth on a + per controller basis. Both controllers and targets + may be omitted indicating that they should retain + the default tag depth. + + :Possible Values: 1 - 253 + :Default Value: 32 + + Examples: + + + :: + + tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} + + On Controller 0 + + - specifies a tag depth of 16 for target 0 + - specifies a tag depth of 64 for target 3 + - specifies a tag depth of 8 for targets 4 and 5 + - leaves target 6 at the default + - specifies a tag depth of 32 for targets 1,2,7-15 + + All other targets retain the default depth. + + :: + + tag_info:{{},{32,,32}} + + On Controller 1 + + - specifies a tag depth of 32 for targets 0 and 2 + + All other targets retain the default depth. + + +rd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]} + :Definition: Enable read streaming on a per target basis. + The rd_strm_bitmask is a 16 bit hex value in which + each bit represents a target. Setting the target's + bit to '1' enables read streaming for that + target. Controllers may be omitted indicating that + they should retain the default read streaming setting. + + Examples: + + :: + + rd_strm:{0x0041} + + On Controller 0 + + - enables read streaming for targets 0 and 6. + - disables read streaming for targets 1-5,7-15. + + All other targets retain the default read + streaming setting. + + :: + + rd_strm:{0x0023,,0xFFFF} + + On Controller 0 + + - enables read streaming for targets 1,2, and 5. + - disables read streaming for targets 3,4,6-15. + + On Controller 2 + + - enables read streaming for all targets. + + All other targets retain the default read + streaming setting. + + :Possible Values: 0x0000 - 0xffff + :Default Value: 0x0000 + +dv: {value[,value...]} + :Definition: Set Domain Validation Policy on a per-controller basis. + Controllers may be omitted indicating that + they should retain the default read streaming setting. + + :Possible Values: + + ==== =============================== + < 0 Use setting from serial EEPROM. + 0 Disable DV + > 0 Enable DV + ==== =============================== + + :Default Value: DV Serial EEPROM configuration setting. + + Example: + + :: + + dv:{-1,0,,1,1,0} + + - On Controller 0 leave DV at its default setting. + - On Controller 1 disable DV. + - Skip configuration on Controller 2. + - On Controllers 3 and 4 enable DV. + - On Controller 5 disable DV. + +seltime:[value] + :Definition: Specifies the selection timeout value + :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms + :Default Value: 0 + +.. Warning: + + The following three options should only be changed at + the direction of a technical support representative. + + +precomp: {value[,value...]} + :Definition: Set IO Cell precompensation value on a per-controller basis. + Controllers may be omitted indicating that + they should retain the default precompensation setting. + + :Possible Values: 0 - 7 + :Default Value: Varies based on chip revision + + Examples: + + :: + + precomp:{0x1} + + On Controller 0 set precompensation to 1. + + :: + + precomp:{1,,7} + + - On Controller 0 set precompensation to 1. + - On Controller 2 set precompensation to 8. + +slewrate: {value[,value...]} + :Definition: Set IO Cell slew rate on a per-controller basis. + Controllers may be omitted indicating that + they should retain the default slew rate setting. + + :Possible Values: 0 - 15 + :Default Value: Varies based on chip revision + + Examples: + + :: + + slewrate:{0x1} + + - On Controller 0 set slew rate to 1. + + :: + + slewrate :{1,,8} + + - On Controller 0 set slew rate to 1. + - On Controller 2 set slew rate to 8. + +amplitude: {value[,value...]} + :Definition: Set IO Cell signal amplitude on a per-controller basis. + Controllers may be omitted indicating that + they should retain the default read streaming setting. + + :Possible Values: 1 - 7 + :Default Value: Varies based on chip revision + + Examples: + + :: + + amplitude:{0x1} + + On Controller 0 set amplitude to 1. + + :: + + amplitude :{1,,7} + + - On Controller 0 set amplitude to 1. + - On Controller 2 set amplitude to 7. + +Example:: + + options aic79xx aic79xx=verbose,rd_strm:{{0x0041}} + +enables verbose output in the driver and turns read streaming on +for targets 0 and 6 of Controller 0. + +4. Additional Notes +=================== + +4.1. Known/Unresolved or FYI Issues +----------------------------------- + + * Under SuSE Linux Enterprise 7, the driver may fail to operate + correctly due to a problem with PCI interrupt routing in the + Linux kernel. Please contact SuSE for an updated Linux + kernel. + +4.2. Third-Party Compatibility Issues +------------------------------------- + + * Adaptec only supports Ultra320 hard drives running + the latest firmware available. Please check with + your hard drive manufacturer to ensure you have the + latest version. + +4.3. Operating System or Technology Limitations +----------------------------------------------- + + * PCI Hot Plug is untested and may cause the operating system + to stop responding. + * Luns that are not numbered contiguously starting with 0 might not + be automatically probed during system startup. This is a limitation + of the OS. Please contact your Linux vendor for instructions on + manually probing non-contiguous luns. + * Using the Driver Update Disk version of this package during OS + installation under RedHat might result in two versions of this + driver being installed into the system module directory. This + might cause problems with the /sbin/mkinitrd program and/or + other RPM packages that try to install system modules. The best + way to correct this once the system is running is to install + the latest RPM package version of this driver, available from + http://www.adaptec.com. + + +5. Adaptec Customer Support +=========================== + + A Technical Support Identification (TSID) Number is required for + Adaptec technical support. + + - The 12-digit TSID can be found on the white barcode-type label + included inside the box with your product. The TSID helps us + provide more efficient service by accurately identifying your + product and support status. + + Support Options + - Search the Adaptec Support Knowledgebase (ASK) at + http://ask.adaptec.com for articles, troubleshooting tips, and + frequently asked questions about your product. + - For support via Email, submit your question to Adaptec's + Technical Support Specialists at http://ask.adaptec.com/. + + North America + - Visit our Web site at http://www.adaptec.com/. + - For information about Adaptec's support options, call + 408-957-2550, 24 hours a day, 7 days a week. + - To speak with a Technical Support Specialist, + + * For hardware products, call 408-934-7274, + Monday to Friday, 3:00 am to 5:00 pm, PDT. + * For RAID and Fibre Channel products, call 321-207-2000, + Monday to Friday, 3:00 am to 5:00 pm, PDT. + + To expedite your service, have your computer with you. + - To order Adaptec products, including accessories and cables, + call 408-957-7274. To order cables online go to + http://www.adaptec.com/buy-cables/. + + Europe + - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. + - To speak with a Technical Support Specialist, call, or email, + + * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, + http://ask-de.adaptec.com/. + * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, + http://ask-fr.adaptec.com/. + * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, + http://ask.adaptec.com/. + + - You can order Adaptec cables online at + http://www.adaptec.com/buy-cables/. + + Japan + - Visit our web site at http://www.adaptec.co.jp/. + - To speak with a Technical Support Specialist, call + +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., + 1:00 p.m. to 6:00 p.m. + +Copyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. +All rights reserved. + +You are permitted to redistribute, use and modify this README file in whole +or in part in conjunction with redistribution of software governed by the +General Public License, provided that the following conditions are met: + +1. Redistributions of README file must retain the above copyright + notice, this list of conditions, and the following disclaimer, + without modification. +2. The name of the author may not be used to endorse or promote products + derived from this software without specific prior written permission. +3. Modifications or new contributions must be attributed in a copyright + notice identifying the author ("Contributor") and added below the + original copyright notice. The copyright notice is for purposes of + identifying contributors and should not be deemed as permission to alter + the permissions given by Adaptec. + +THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY +WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY +AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README +FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/Documentation/scsi/aic79xx.txt b/Documentation/scsi/aic79xx.txt deleted file mode 100644 index e2d3273000d4..000000000000 --- a/Documentation/scsi/aic79xx.txt +++ /dev/null @@ -1,497 +0,0 @@ -==================================================================== -= Adaptec Ultra320 Family Manager Set = -= = -= README for = -= The Linux Operating System = -==================================================================== - -The following information is available in this file: - - 1. Supported Hardware - 2. Version History - 3. Command Line Options - 4. Additional Notes - 5. Contacting Adaptec - - -1. Supported Hardware - - The following Adaptec SCSI Host Adapters are supported by this - driver set. - - Ultra320 ASIC Description - ---------------------------------------------------------------- - AIC-7901A Single Channel 64-bit PCI-X 133MHz to - Ultra320 SCSI ASIC - AIC-7901B Single Channel 64-bit PCI-X 133MHz to - Ultra320 SCSI ASIC with Retained Training - AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to - Ultra320 SCSI ASIC - AIC-7902B Dual Channel 64-bit PCI-X 133MHz to - Ultra320 SCSI ASIC with Retained Training - - Ultra320 Adapters Description ASIC - -------------------------------------------------------------------------- - Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B - Ultra320 SCSI Card (one external - 68-pin, two internal 68-pin) - Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B - Ultra320 SCSI Card (one external - 68-pin, two internal 68-pin) - Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 - Ultra320 SCSI Card (two external VHDC - and one internal 68-pin) - Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 - Ultra320 SCSI Card (two external VHDC - and one internal 68-pin) based on the - AIC-7902B ASIC - Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to 7901A - Ultra320 SCSI Card (one external - 68-pin, two internal 68-pin, one - internal 50-pin) - Adaptec SCSI Card 29320A Single Channel 64-bit PCI-X 133MHz to 7901B - Ultra320 SCSI Card (one external - 68-pin, two internal 68-pin, one - internal 50-pin) - Adaptec SCSI Card 29320LP Single Channel 64-bit Low Profile 7901A - PCI-X 133MHz to Ultra320 SCSI Card - (One external VHDC, one internal - 68-pin) - Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile 7901B - PCI-X 133MHz to Ultra320 SCSI Card - (One external VHDC, one internal - 68-pin) -2. Version History - - 3.0 (December 1st, 2005) - - Updated driver to use SCSI transport class infrastructure - - Upported sequencer and core fixes from adaptec released - version 2.0.15 of the driver. - - 1.3.11 (July 11, 2003) - - Fix several deadlock issues. - - Add 29320ALP and 39320B Id's. - - 1.3.10 (June 3rd, 2003) - - Align the SCB_TAG field on a 16byte boundary. This avoids - SCB corruption on some PCI-33 busses. - - Correct non-zero luns on Rev B. hardware. - - Update for change in 2.5.X SCSI proc FS interface. - - When negotiation async via an 8bit WDTR message, send - an SDTR with an offset of 0 to be sure the target - knows we are async. This works around a firmware defect - in the Quantum Atlas 10K. - - Implement controller suspend and resume. - - Clear PCI error state during driver attach so that we - don't disable memory mapped I/O due to a stray write - by some other driver probe that occurred before we - claimed the controller. - - 1.3.9 (May 22nd, 2003) - - Fix compiler errors. - - Remove S/G splitting for segments that cross a 4GB boundary. - This is guaranteed not to happen in Linux. - - Add support for scsi_report_device_reset() found in - 2.5.X kernels. - - Add 7901B support. - - Simplify handling of the packetized lun Rev A workaround. - - Correct and simplify handling of the ignore wide residue - message. The previous code would fail to report a residual - if the transaction data length was even and we received - an IWR message. - - 1.3.8 (April 29th, 2003) - - Fix types accessed via the command line interface code. - - Perform a few firmware optimizations. - - Fix "Unexpected PKT busfree" errors. - - Use a sequencer interrupt to notify the host of - commands with bad status. We defer the notification - until there are no outstanding selections to ensure - that the host is interrupted for as short a time as - possible. - - Remove pre-2.2.X support. - - Add support for new 2.5.X interrupt API. - - Correct big-endian architecture support. - - 1.3.7 (April 16th, 2003) - - Use del_timer_sync() to ensure that no timeouts - are pending during controller shutdown. - - For pre-2.5.X kernels, carefully adjust our segment - list size to avoid SCSI malloc pool fragmentation. - - Cleanup channel display in our /proc output. - - Workaround duplicate device entries in the mid-layer - device list during add-single-device. - - 1.3.6 (March 28th, 2003) - - Correct a double free in the Domain Validation code. - - Correct a reference to free'ed memory during controller - shutdown. - - Reset the bus on an SE->LVD change. This is required - to reset our transceivers. - - 1.3.5 (March 24th, 2003) - - Fix a few register window mode bugs. - - Include read streaming in the PPR flags we display in - diagnostics as well as /proc. - - Add PCI hot plug support for 2.5.X kernels. - - Correct default precompensation value for RevA hardware. - - Fix Domain Validation thread shutdown. - - Add a firmware workaround to make the LED blink - brighter during packetized operations on the H2A4. - - Correct /proc display of user read streaming settings. - - Simplify driver locking by releasing the io_request_lock - upon driver entry from the mid-layer. - - Cleanup command line parsing and move much of this code - to aiclib. - - 1.3.4 (February 28th, 2003) - - Correct a race condition in our error recovery handler. - - Allow Test Unit Ready commands to take a full 5 seconds - during Domain Validation. - - 1.3.2 (February 19th, 2003) - - Correct a Rev B. regression due to the GEM318 - compatibility fix included in 1.3.1. - - 1.3.1 (February 11th, 2003) - - Add support for the 39320A. - - Improve recovery for certain PCI-X errors. - - Fix handling of LQ/DATA/LQ/DATA for the - same write transaction that can occur without - interveining training. - - Correct compatibility issues with the GEM318 - enclosure services device. - - Correct data corruption issue that occurred under - high tag depth write loads. - - Adapt to a change in the 2.5.X daemonize() API. - - Correct a "Missing case in ahd_handle_scsiint" panic. - - 1.3.0 (January 21st, 2003) - - Full regression testing for all U320 products completed. - - Added abort and target/lun reset error recovery handler and - interrupt coalescing. - - 1.2.0 (November 14th, 2002) - - Added support for Domain Validation - - Add support for the Hewlett-Packard version of the 39320D - and AIC-7902 adapters. - Support for previous adapters has not been fully tested and should - only be used at the customer's own risk. - - 1.1.1 (September 24th, 2002) - - Added support for the Linux 2.5.X kernel series - - 1.1.0 (September 17th, 2002) - - Added support for four additional SCSI products: - ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. - - 1.0.0 (May 30th, 2002) - - Initial driver release. - - 2.1. Software/Hardware Features - - Support for the SPI-4 "Ultra320" standard: - - 320MB/s transfer rates - - Packetized SCSI Protocol at 160MB/s and 320MB/s - - Quick Arbitration Selection (QAS) - - Retained Training Information (Rev B. ASIC only) - - Interrupt Coalescing - - Initiator Mode (target mode not currently - supported) - - Support for the PCI-X standard up to 133MHz - - Support for the PCI v2.2 standard - - Domain Validation - - 2.2. Operating System Support: - - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - - only Intel and AMD x86 supported at this time - - >4GB memory configurations supported. - - Refer to the User's Guide for more details on this. - -3. Command Line Options - - WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS - INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. - USE THEM WITH CAUTION. - - Put a .conf file in the /etc/modprobe.d/ directory and add/edit a - line containing 'options aic79xx aic79xx=[command[,command...]]' where - 'command' is one or more of the following: - ----------------------------------------------------------------- - Option: verbose - Definition: enable additional informative messages during - driver operation. - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: debug:[value] - Definition: Enables various levels of debugging information - The bit definitions for the debugging mask can - be found in drivers/scsi/aic7xxx/aic79xx.h under - the "Debug" heading. - Possible Values: 0x0000 = no debugging, 0xffff = full debugging - Default Value: 0x0000 - ----------------------------------------------------------------- - Option: no_reset - Definition: Do not reset the bus during the initial probe - phase - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: extended - Definition: Force extended translation on the controller - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: periodic_otag - Definition: Send an ordered tag periodically to prevent - tag starvation. Needed for some older devices - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: reverse_scan - Definition: Probe the scsi bus in reverse order, starting - with target 15 - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: global_tag_depth - Definition: Global tag depth for all targets on all busses. - This option sets the default tag depth which - may be selectively overridden vi the tag_info - option. - Possible Values: 1 - 253 - Default Value: 32 - ----------------------------------------------------------------- - Option: tag_info:{{value[,value...]}[,{value[,value...]}...]} - Definition: Set the per-target tagged queue depth on a - per controller basis. Both controllers and targets - may be omitted indicating that they should retain - the default tag depth. - Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} - On Controller 0 - specifies a tag depth of 16 for target 0 - specifies a tag depth of 64 for target 3 - specifies a tag depth of 8 for targets 4 and 5 - leaves target 6 at the default - specifies a tag depth of 32 for targets 1,2,7-15 - All other targets retain the default depth. - - tag_info:{{},{32,,32}} - On Controller 1 - specifies a tag depth of 32 for targets 0 and 2 - All other targets retain the default depth. - - Possible Values: 1 - 253 - Default Value: 32 - ----------------------------------------------------------------- - Option: rd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]} - Definition: Enable read streaming on a per target basis. - The rd_strm_bitmask is a 16 bit hex value in which - each bit represents a target. Setting the target's - bit to '1' enables read streaming for that - target. Controllers may be omitted indicating that - they should retain the default read streaming setting. - Example: rd_strm:{0x0041} - On Controller 0 - enables read streaming for targets 0 and 6. - disables read streaming for targets 1-5,7-15. - All other targets retain the default read - streaming setting. - Example: rd_strm:{0x0023,,0xFFFF} - On Controller 0 - enables read streaming for targets 1,2, and 5. - disables read streaming for targets 3,4,6-15. - On Controller 2 - enables read streaming for all targets. - All other targets retain the default read - streaming setting. - - Possible Values: 0x0000 - 0xffff - Default Value: 0x0000 - ----------------------------------------------------------------- - Option: dv: {value[,value...]} - Definition: Set Domain Validation Policy on a per-controller basis. - Controllers may be omitted indicating that - they should retain the default read streaming setting. - Example: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. - - Possible Values: < 0 Use setting from serial EEPROM. - 0 Disable DV - > 0 Enable DV - Default Value: DV Serial EEPROM configuration setting. - ----------------------------------------------------------------- - Option: seltime:[value] - Definition: Specifies the selection timeout value - Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms - Default Value: 0 - ----------------------------------------------------------------- - - *** The following three options should only be changed at *** - *** the direction of a technical support representative. *** - - ----------------------------------------------------------------- - Option: precomp: {value[,value...]} - Definition: Set IO Cell precompensation value on a per-controller - basis. - Controllers may be omitted indicating that - they should retain the default precompensation setting. - Example: precomp:{0x1} - On Controller 0 set precompensation to 1. - Example: precomp:{1,,7} - On Controller 0 set precompensation to 1. - On Controller 2 set precompensation to 8. - - Possible Values: 0 - 7 - Default Value: Varies based on chip revision - ----------------------------------------------------------------- - Option: slewrate: {value[,value...]} - Definition: Set IO Cell slew rate on a per-controller basis. - Controllers may be omitted indicating that - they should retain the default slew rate setting. - Example: slewrate:{0x1} - On Controller 0 set slew rate to 1. - Example: slewrate :{1,,8} - On Controller 0 set slew rate to 1. - On Controller 2 set slew rate to 8. - - Possible Values: 0 - 15 - Default Value: Varies based on chip revision - ----------------------------------------------------------------- - Option: amplitude: {value[,value...]} - Definition: Set IO Cell signal amplitude on a per-controller basis. - Controllers may be omitted indicating that - they should retain the default read streaming setting. - Example: amplitude:{0x1} - On Controller 0 set amplitude to 1. - Example: amplitude :{1,,7} - On Controller 0 set amplitude to 1. - On Controller 2 set amplitude to 7. - - Possible Values: 1 - 7 - Default Value: Varies based on chip revision - ----------------------------------------------------------------- - - Example: 'options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}' - enables verbose output in the driver and turns read streaming on - for targets 0 and 6 of Controller 0. - -4. Additional Notes - - 4.1. Known/Unresolved or FYI Issues - - * Under SuSE Linux Enterprise 7, the driver may fail to operate - correctly due to a problem with PCI interrupt routing in the - Linux kernel. Please contact SuSE for an updated Linux - kernel. - - 4.2. Third-Party Compatibility Issues - - * Adaptec only supports Ultra320 hard drives running - the latest firmware available. Please check with - your hard drive manufacturer to ensure you have the - latest version. - - 4.3. Operating System or Technology Limitations - - * PCI Hot Plug is untested and may cause the operating system - to stop responding. - * Luns that are not numbered contiguously starting with 0 might not - be automatically probed during system startup. This is a limitation - of the OS. Please contact your Linux vendor for instructions on - manually probing non-contiguous luns. - * Using the Driver Update Disk version of this package during OS - installation under RedHat might result in two versions of this - driver being installed into the system module directory. This - might cause problems with the /sbin/mkinitrd program and/or - other RPM packages that try to install system modules. The best - way to correct this once the system is running is to install - the latest RPM package version of this driver, available from - http://www.adaptec.com. - - -5. Adaptec Customer Support - - A Technical Support Identification (TSID) Number is required for - Adaptec technical support. - - The 12-digit TSID can be found on the white barcode-type label - included inside the box with your product. The TSID helps us - provide more efficient service by accurately identifying your - product and support status. - - Support Options - - Search the Adaptec Support Knowledgebase (ASK) at - http://ask.adaptec.com for articles, troubleshooting tips, and - frequently asked questions about your product. - - For support via Email, submit your question to Adaptec's - Technical Support Specialists at http://ask.adaptec.com/. - - North America - - Visit our Web site at http://www.adaptec.com/. - - For information about Adaptec's support options, call - 408-957-2550, 24 hours a day, 7 days a week. - - To speak with a Technical Support Specialist, - * For hardware products, call 408-934-7274, - Monday to Friday, 3:00 am to 5:00 pm, PDT. - * For RAID and Fibre Channel products, call 321-207-2000, - Monday to Friday, 3:00 am to 5:00 pm, PDT. - To expedite your service, have your computer with you. - - To order Adaptec products, including accessories and cables, - call 408-957-7274. To order cables online go to - http://www.adaptec.com/buy-cables/. - - Europe - - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - - To speak with a Technical Support Specialist, call, or email, - * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, - http://ask-de.adaptec.com/. - * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, - http://ask-fr.adaptec.com/. - * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, - http://ask.adaptec.com/. - - You can order Adaptec cables online at - http://www.adaptec.com/buy-cables/. - - Japan - - Visit our web site at http://www.adaptec.co.jp/. - - To speak with a Technical Support Specialist, call - +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., - 1:00 p.m. to 6:00 p.m. - -------------------------------------------------------------------- -/* - * Copyright (c) 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. - * All rights reserved. - * - * You are permitted to redistribute, use and modify this README file in whole - * or in part in conjunction with redistribution of software governed by the - * General Public License, provided that the following conditions are met: - * 1. Redistributions of README file must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * 3. Modifications or new contributions must be attributed in a copyright - * notice identifying the author ("Contributor") and added below the - * original copyright notice. The copyright notice is for purposes of - * identifying contributors and should not be deemed as permission to alter - * the permissions given by Adaptec. - * - * THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY - * WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README - * FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ diff --git a/Documentation/scsi/aic7xxx.rst b/Documentation/scsi/aic7xxx.rst new file mode 100644 index 000000000000..bad0e5567b21 --- /dev/null +++ b/Documentation/scsi/aic7xxx.rst @@ -0,0 +1,458 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +======================================================== +Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0 +======================================================== + +README for The Linux Operating System + +The following information is available in this file: + + 1. Supported Hardware + 2. Version History + 3. Command Line Options + 4. Contacting Adaptec + +1. Supported Hardware +===================== + + The following Adaptec SCSI Chips and Host Adapters are supported by + the aic7xxx driver. + + ======== ===== ========= ======== ========= ===== =============== + Chip MIPS Host Bus MaxSync MaxWidth SCBs Notes + ======== ===== ========= ======== ========= ===== =============== + aic7770 10 EISA/VL 10MHz 16Bit 4 1 + aic7850 10 PCI/32 10MHz 8Bit 3 + aic7855 10 PCI/32 10MHz 8Bit 3 + aic7856 10 PCI/32 10MHz 8Bit 3 + aic7859 10 PCI/32 20MHz 8Bit 3 + aic7860 10 PCI/32 20MHz 8Bit 3 + aic7870 10 PCI/32 10MHz 16Bit 16 + aic7880 10 PCI/32 20MHz 16Bit 16 + aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 + aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 + aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8 + aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 + aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 + aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 + aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 + aic7899 20 PCI/64-66 80MHz 16Bit 16 2 3 4 5 6 7 8 + ======== ===== ========= ======== ========= ===== =============== + + 1. Multiplexed Twin Channel Device - One controller servicing two + busses. + 2. Multi-function Twin Channel Device - Two controllers on one chip. + 3. Command Channel Secondary DMA Engine - Allows scatter gather list + and SCB prefetch. + 4. 64 Byte SCB Support - Allows disconnected, untagged request table + for all possible target/lun combinations. + 5. Block Move Instruction Support - Doubles the speed of certain + sequencer operations. + 6. 'Bayonet' style Scatter Gather Engine - Improves S/G prefetch + performance. + 7. Queuing Registers - Allows queuing of new transactions without + pausing the sequencer. + 8. Multiple Target IDs - Allows the controller to respond to selection + as a target on multiple SCSI IDs. + + ============== ======= =========== =============== =============== ========= + Controller Chip Host-Bus Int-Connectors Ext-Connectors Notes + ============== ======= =========== =============== =============== ========= + AHA-274X[A] aic7770 EISA SE-50M SE-HD50F + AHA-274X[A]W aic7770 EISA SE-HD68F SE-HD68F + SE-50M + AHA-274X[A]T aic7770 EISA 2 X SE-50M SE-HD50F + AHA-2842 aic7770 VL SE-50M SE-HD50F + AHA-2940AU aic7860 PCI/32 SE-50M SE-HD50F + AVA-2902I aic7860 PCI/32 SE-50M + AVA-2902E aic7860 PCI/32 SE-50M + AVA-2906 aic7856 PCI/32 SE-50M SE-DB25F + APC-7850 aic7850 PCI/32 SE-50M 1 + AVA-2940 aic7860 PCI/32 SE-50M + AHA-2920B aic7860 PCI/32 SE-50M + AHA-2930B aic7860 PCI/32 SE-50M + AHA-2920C aic7856 PCI/32 SE-50M SE-HD50F + AHA-2930C aic7860 PCI/32 SE-50M + AHA-2930C aic7860 PCI/32 SE-50M + AHA-2910C aic7860 PCI/32 SE-50M + AHA-2915C aic7860 PCI/32 SE-50M + AHA-2940AU/CN aic7860 PCI/32 SE-50M SE-HD50F + AHA-2944W aic7870 PCI/32 HVD-HD68F HVD-HD68F + HVD-50M + AHA-3940W aic7870 PCI/32 2 X SE-HD68F SE-HD68F 2 + AHA-2940UW aic7880 PCI/32 SE-HD68F + SE-50M SE-HD68F + AHA-2940U aic7880 PCI/32 SE-50M SE-HD50F + AHA-2940D aic7880 PCI/32 + aHA-2940 A/T aic7880 PCI/32 + AHA-2940D A/T aic7880 PCI/32 + AHA-3940UW aic7880 PCI/32 2 X SE-HD68F SE-HD68F 3 + AHA-3940UWD aic7880 PCI/32 2 X SE-HD68F 2 X SE-VHD68F 3 + AHA-3940U aic7880 PCI/32 2 X SE-50M SE-HD50F 3 + AHA-2944UW aic7880 PCI/32 HVD-HD68F HVD-HD68F + HVD-50M + AHA-3944UWD aic7880 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F 3 + AHA-4944UW aic7880 PCI/32 + AHA-2930UW aic7880 PCI/32 + AHA-2940UW Pro aic7880 PCI/32 SE-HD68F SE-HD68F 4 + SE-50M + AHA-2940UW/CN aic7880 PCI/32 + AHA-2940UDual aic7895 PCI/32 + AHA-2940UWDual aic7895 PCI/32 + AHA-3940UWD aic7895 PCI/32 + AHA-3940AUW aic7895 PCI/32 + AHA-3940AUWD aic7895 PCI/32 + AHA-3940AU aic7895 PCI/32 + AHA-3944AUWD aic7895 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F + AHA-2940U2B aic7890 PCI/32 LVD-HD68F LVD-HD68F + AHA-2940U2 OEM aic7891 PCI/64 + AHA-2940U2W aic7890 PCI/32 LVD-HD68F LVD-HD68F + SE-HD68F + SE-50M + AHA-2950U2B aic7891 PCI/64 LVD-HD68F LVD-HD68F + AHA-2930U2 aic7890 PCI/32 LVD-HD68F SE-HD50F + SE-50M + AHA-3950U2B aic7897 PCI/64 + AHA-3950U2D aic7897 PCI/64 + AHA-29160 aic7892 PCI/64-66 + AHA-29160 CPQ aic7892 PCI/64-66 + AHA-29160N aic7892 PCI/32 LVD-HD68F SE-HD50F + SE-50M + AHA-29160LP aic7892 PCI/64-66 + AHA-19160 aic7892 PCI/64-66 + AHA-29150LP aic7892 PCI/64-66 + AHA-29130LP aic7892 PCI/64-66 + AHA-3960D aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + AHA-3960D CPQ aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + AHA-39160 aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + ============== ======= =========== =============== =============== ========= + + 1. No BIOS support + 2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus + 3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus + 4. All three SCSI connectors may be used simultaneously without + SCSI "stub" effects. + +2. Version History +================== + + * 7.0 (4th August, 2005) + - Updated driver to use SCSI transport class infrastructure + - Upported sequencer and core fixes from last adaptec released + version of the driver. + + * 6.2.36 (June 3rd, 2003) + - Correct code that disables PCI parity error checking. + - Correct and simplify handling of the ignore wide residue + message. The previous code would fail to report a residual + if the transaction data length was even and we received + an IWR message. + - Add support for the 2.5.X EISA framework. + - Update for change in 2.5.X SCSI proc FS interface. + - Correct Domain Validation command-line option parsing. + - When negotiation async via an 8bit WDTR message, send + an SDTR with an offset of 0 to be sure the target + knows we are async. This works around a firmware defect + in the Quantum Atlas 10K. + - Clear PCI error state during driver attach so that we + don't disable memory mapped I/O due to a stray write + by some other driver probe that occurred before we + claimed the controller. + + * 6.2.35 (May 14th, 2003) + - Fix a few GCC 3.3 compiler warnings. + - Correct operation on EISA Twin Channel controller. + - Add support for 2.5.X's scsi_report_device_reset(). + + * 6.2.34 (May 5th, 2003) + - Fix locking regression introduced in 6.2.29 that + could cause a lock order reversal between the io_request_lock + and our per-softc lock. This was only possible on RH9, + SuSE, and kernel.org 2.4.X kernels. + + * 6.2.33 (April 30th, 2003) + - Dynamically disable PCI parity error reporting after + 10 errors are reported to the user. These errors are + the result of some other device issuing PCI transactions + with bad parity. Once the user has been informed of the + problem, continuing to report the errors just degrades + our performance. + + * 6.2.32 (March 28th, 2003) + - Dynamically sized S/G lists to avoid SCSI malloc + pool fragmentation and SCSI mid-layer deadlock. + + * 6.2.28 (January 20th, 2003) + - Domain Validation Fixes + - Add ability to disable PCI parity error checking. + - Enhanced Memory Mapped I/O probe + + * 6.2.20 (November 7th, 2002) + - Added Domain Validation. + +3. Command Line Options +======================= + + + .. Warning:: + + ALTERING OR ADDING THESE DRIVER PARAMETERS + INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. + USE THEM WITH CAUTION. + + Put a .conf file in the /etc/modprobe.d directory and add/edit a + line containing ``options aic7xxx aic7xxx=[command[,command...]]`` where + ``command`` is one or more of the following: + +verbose + + :Definition: enable additional informative messages during driver operation. + :Possible Values: This option is a flag + :Default Value: disabled + + +debug:[value] + + :Definition: Enables various levels of debugging information + :Possible Values: 0x0000 = no debugging, 0xffff = full debugging + :Default Value: 0x0000 + +no_probe + +probe_eisa_vl + + :Definition: Do not probe for EISA/VLB controllers. + This is a toggle. If the driver is compiled + to not probe EISA/VLB controllers by default, + specifying "no_probe" will enable this probing. + If the driver is compiled to probe EISA/VLB + controllers by default, specifying "no_probe" + will disable this probing. + + :Possible Values: This option is a toggle + :Default Value: EISA/VLB probing is disabled by default. + +pci_parity + + :Definition: Toggles the detection of PCI parity errors. + On many motherboards with VIA chipsets, + PCI parity is not generated correctly on the + PCI bus. It is impossible for the hardware to + differentiate between these "spurious" parity + errors and real parity errors. The symptom of + this problem is a stream of the message:: + + "scsi0: Data Parity Error Detected during address or write data phase" + + output by the driver. + + :Possible Values: This option is a toggle + :Default Value: PCI Parity Error reporting is disabled + +no_reset + + :Definition: Do not reset the bus during the initial probe + phase + + :Possible Values: This option is a flag + :Default Value: disabled + +extended + + :Definition: Force extended translation on the controller + :Possible Values: This option is a flag + :Default Value: disabled + +periodic_otag + + :Definition: Send an ordered tag periodically to prevent + tag starvation. Needed for some older devices + + :Possible Values: This option is a flag + :Default Value: disabled + +reverse_scan + + :Definition: Probe the scsi bus in reverse order, starting + with target 15 + + :Possible Values: This option is a flag + :Default Value: disabled + +global_tag_depth:[value] + + :Definition: Global tag depth for all targets on all busses. + This option sets the default tag depth which + may be selectively overridden vi the tag_info + option. + + :Possible Values: 1 - 253 + :Default Value: 32 + +tag_info:{{value[,value...]}[,{value[,value...]}...]} + + :Definition: Set the per-target tagged queue depth on a + per controller basis. Both controllers and targets + may be omitted indicating that they should retain + the default tag depth. + + :Possible Values: 1 - 253 + :Default Value: 32 + + Examples: + + :: + + tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} + + On Controller 0: + + - specifies a tag depth of 16 for target 0 + - specifies a tag depth of 64 for target 3 + - specifies a tag depth of 8 for targets 4 and 5 + - leaves target 6 at the default + - specifies a tag depth of 32 for targets 1,2,7-15 + - All other targets retain the default depth. + + :: + + tag_info:{{},{32,,32}} + + On Controller 1: + + - specifies a tag depth of 32 for targets 0 and 2 + - All other targets retain the default depth. + +seltime:[value] + + :Definition: Specifies the selection timeout value + :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms + :Default Value: 0 + +dv: {value[,value...]} + + :Definition: Set Domain Validation Policy on a per-controller basis. + Controllers may be omitted indicating that + they should retain the default read streaming setting. + + :Possible Values: + + ==== =============================== + < 0 Use setting from serial EEPROM. + 0 Disable DV + > 0 Enable DV + ==== =============================== + + + :Default Value: SCSI-Select setting on controllers with a SCSI Select + option for DV. Otherwise, on for controllers supporting + U160 speeds and off for all other controller types. + + Example: + + :: + + dv:{-1,0,,1,1,0} + + - On Controller 0 leave DV at its default setting. + - On Controller 1 disable DV. + - Skip configuration on Controller 2. + - On Controllers 3 and 4 enable DV. + - On Controller 5 disable DV. + +Example:: + + options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1 + +enables verbose logging, Disable EISA/VLB probing, +and set tag depth on Controller 1/Target 2 to 10 tags. + +4. Adaptec Customer Support +=========================== + + A Technical Support Identification (TSID) Number is required for + Adaptec technical support. + + - The 12-digit TSID can be found on the white barcode-type label + included inside the box with your product. The TSID helps us + provide more efficient service by accurately identifying your + product and support status. + + Support Options + - Search the Adaptec Support Knowledgebase (ASK) at + http://ask.adaptec.com for articles, troubleshooting tips, and + frequently asked questions about your product. + - For support via Email, submit your question to Adaptec's + Technical Support Specialists at http://ask.adaptec.com/. + + North America + - Visit our Web site at http://www.adaptec.com/. + - For information about Adaptec's support options, call + 408-957-2550, 24 hours a day, 7 days a week. + - To speak with a Technical Support Specialist, + + * For hardware products, call 408-934-7274, + Monday to Friday, 3:00 am to 5:00 pm, PDT. + * For RAID and Fibre Channel products, call 321-207-2000, + Monday to Friday, 3:00 am to 5:00 pm, PDT. + + To expedite your service, have your computer with you. + - To order Adaptec products, including accessories and cables, + call 408-957-7274. To order cables online go to + http://www.adaptec.com/buy-cables/. + + Europe + - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. + - To speak with a Technical Support Specialist, call, or email, + + * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, + http://ask-de.adaptec.com/. + * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, + http://ask-fr.adaptec.com/. + * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, + http://ask.adaptec.com/. + + - You can order Adaptec cables online at + http://www.adaptec.com/buy-cables/. + + Japan + - Visit our web site at http://www.adaptec.co.jp/. + - To speak with a Technical Support Specialist, call + +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., + 1:00 p.m. to 6:00 p.m. + +Copyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. + +All rights reserved. + +You are permitted to redistribute, use and modify this README file in whole +or in part in conjunction with redistribution of software governed by the +General Public License, provided that the following conditions are met: + +1. Redistributions of README file must retain the above copyright + notice, this list of conditions, and the following disclaimer, + without modification. +2. The name of the author may not be used to endorse or promote products + derived from this software without specific prior written permission. +3. Modifications or new contributions must be attributed in a copyright + notice identifying the author ("Contributor") and added below the + original copyright notice. The copyright notice is for purposes of + identifying contributors and should not be deemed as permission to alter + the permissions given by Adaptec. + +THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY +WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY +AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README +FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/Documentation/scsi/aic7xxx.txt b/Documentation/scsi/aic7xxx.txt deleted file mode 100644 index 7c5d0223d444..000000000000 --- a/Documentation/scsi/aic7xxx.txt +++ /dev/null @@ -1,394 +0,0 @@ -==================================================================== -= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0 = -= README for = -= The Linux Operating System = -==================================================================== - -The following information is available in this file: - - 1. Supported Hardware - 2. Version History - 3. Command Line Options - 4. Contacting Adaptec - -1. Supported Hardware - - The following Adaptec SCSI Chips and Host Adapters are supported by - the aic7xxx driver. - - Chip MIPS Host Bus MaxSync MaxWidth SCBs Notes - --------------------------------------------------------------- - aic7770 10 EISA/VL 10MHz 16Bit 4 1 - aic7850 10 PCI/32 10MHz 8Bit 3 - aic7855 10 PCI/32 10MHz 8Bit 3 - aic7856 10 PCI/32 10MHz 8Bit 3 - aic7859 10 PCI/32 20MHz 8Bit 3 - aic7860 10 PCI/32 20MHz 8Bit 3 - aic7870 10 PCI/32 10MHz 16Bit 16 - aic7880 10 PCI/32 20MHz 16Bit 16 - aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 - aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 - aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8 - aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 - aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 - aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 - aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 - aic7899 20 PCI/64-66 80MHz 16Bit 16 2 3 4 5 6 7 8 - - 1. Multiplexed Twin Channel Device - One controller servicing two - busses. - 2. Multi-function Twin Channel Device - Two controllers on one chip. - 3. Command Channel Secondary DMA Engine - Allows scatter gather list - and SCB prefetch. - 4. 64 Byte SCB Support - Allows disconnected, untagged request table - for all possible target/lun combinations. - 5. Block Move Instruction Support - Doubles the speed of certain - sequencer operations. - 6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch - performance. - 7. Queuing Registers - Allows queuing of new transactions without - pausing the sequencer. - 8. Multiple Target IDs - Allows the controller to respond to selection - as a target on multiple SCSI IDs. - - Controller Chip Host-Bus Int-Connectors Ext-Connectors Notes - -------------------------------------------------------------------------- - AHA-274X[A] aic7770 EISA SE-50M SE-HD50F - AHA-274X[A]W aic7770 EISA SE-HD68F SE-HD68F - SE-50M - AHA-274X[A]T aic7770 EISA 2 X SE-50M SE-HD50F - AHA-2842 aic7770 VL SE-50M SE-HD50F - AHA-2940AU aic7860 PCI/32 SE-50M SE-HD50F - AVA-2902I aic7860 PCI/32 SE-50M - AVA-2902E aic7860 PCI/32 SE-50M - AVA-2906 aic7856 PCI/32 SE-50M SE-DB25F - APC-7850 aic7850 PCI/32 SE-50M 1 - AVA-2940 aic7860 PCI/32 SE-50M - AHA-2920B aic7860 PCI/32 SE-50M - AHA-2930B aic7860 PCI/32 SE-50M - AHA-2920C aic7856 PCI/32 SE-50M SE-HD50F - AHA-2930C aic7860 PCI/32 SE-50M - AHA-2930C aic7860 PCI/32 SE-50M - AHA-2910C aic7860 PCI/32 SE-50M - AHA-2915C aic7860 PCI/32 SE-50M - AHA-2940AU/CN aic7860 PCI/32 SE-50M SE-HD50F - AHA-2944W aic7870 PCI/32 HVD-HD68F HVD-HD68F - HVD-50M - AHA-3940W aic7870 PCI/32 2 X SE-HD68F SE-HD68F 2 - AHA-2940UW aic7880 PCI/32 SE-HD68F - SE-50M SE-HD68F - AHA-2940U aic7880 PCI/32 SE-50M SE-HD50F - AHA-2940D aic7880 PCI/32 - aHA-2940 A/T aic7880 PCI/32 - AHA-2940D A/T aic7880 PCI/32 - AHA-3940UW aic7880 PCI/32 2 X SE-HD68F SE-HD68F 3 - AHA-3940UWD aic7880 PCI/32 2 X SE-HD68F 2 X SE-VHD68F 3 - AHA-3940U aic7880 PCI/32 2 X SE-50M SE-HD50F 3 - AHA-2944UW aic7880 PCI/32 HVD-HD68F HVD-HD68F - HVD-50M - AHA-3944UWD aic7880 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F 3 - AHA-4944UW aic7880 PCI/32 - AHA-2930UW aic7880 PCI/32 - AHA-2940UW Pro aic7880 PCI/32 SE-HD68F SE-HD68F 4 - SE-50M - AHA-2940UW/CN aic7880 PCI/32 - AHA-2940UDual aic7895 PCI/32 - AHA-2940UWDual aic7895 PCI/32 - AHA-3940UWD aic7895 PCI/32 - AHA-3940AUW aic7895 PCI/32 - AHA-3940AUWD aic7895 PCI/32 - AHA-3940AU aic7895 PCI/32 - AHA-3944AUWD aic7895 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F - AHA-2940U2B aic7890 PCI/32 LVD-HD68F LVD-HD68F - AHA-2940U2 OEM aic7891 PCI/64 - AHA-2940U2W aic7890 PCI/32 LVD-HD68F LVD-HD68F - SE-HD68F - SE-50M - AHA-2950U2B aic7891 PCI/64 LVD-HD68F LVD-HD68F - AHA-2930U2 aic7890 PCI/32 LVD-HD68F SE-HD50F - SE-50M - AHA-3950U2B aic7897 PCI/64 - AHA-3950U2D aic7897 PCI/64 - AHA-29160 aic7892 PCI/64-66 - AHA-29160 CPQ aic7892 PCI/64-66 - AHA-29160N aic7892 PCI/32 LVD-HD68F SE-HD50F - SE-50M - AHA-29160LP aic7892 PCI/64-66 - AHA-19160 aic7892 PCI/64-66 - AHA-29150LP aic7892 PCI/64-66 - AHA-29130LP aic7892 PCI/64-66 - AHA-3960D aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F - LVD-50M - AHA-3960D CPQ aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F - LVD-50M - AHA-39160 aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F - LVD-50M - - 1. No BIOS support - 2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus - 3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus - 4. All three SCSI connectors may be used simultaneously without - SCSI "stub" effects. - -2. Version History - 7.0 (4th August, 2005) - - Updated driver to use SCSI transport class infrastructure - - Upported sequencer and core fixes from last adaptec released - version of the driver. - 6.2.36 (June 3rd, 2003) - - Correct code that disables PCI parity error checking. - - Correct and simplify handling of the ignore wide residue - message. The previous code would fail to report a residual - if the transaction data length was even and we received - an IWR message. - - Add support for the 2.5.X EISA framework. - - Update for change in 2.5.X SCSI proc FS interface. - - Correct Domain Validation command-line option parsing. - - When negotiation async via an 8bit WDTR message, send - an SDTR with an offset of 0 to be sure the target - knows we are async. This works around a firmware defect - in the Quantum Atlas 10K. - - Clear PCI error state during driver attach so that we - don't disable memory mapped I/O due to a stray write - by some other driver probe that occurred before we - claimed the controller. - - 6.2.35 (May 14th, 2003) - - Fix a few GCC 3.3 compiler warnings. - - Correct operation on EISA Twin Channel controller. - - Add support for 2.5.X's scsi_report_device_reset(). - - 6.2.34 (May 5th, 2003) - - Fix locking regression introduced in 6.2.29 that - could cause a lock order reversal between the io_request_lock - and our per-softc lock. This was only possible on RH9, - SuSE, and kernel.org 2.4.X kernels. - - 6.2.33 (April 30th, 2003) - - Dynamically disable PCI parity error reporting after - 10 errors are reported to the user. These errors are - the result of some other device issuing PCI transactions - with bad parity. Once the user has been informed of the - problem, continuing to report the errors just degrades - our performance. - - 6.2.32 (March 28th, 2003) - - Dynamically sized S/G lists to avoid SCSI malloc - pool fragmentation and SCSI mid-layer deadlock. - - 6.2.28 (January 20th, 2003) - - Domain Validation Fixes - - Add ability to disable PCI parity error checking. - - Enhanced Memory Mapped I/O probe - - 6.2.20 (November 7th, 2002) - - Added Domain Validation. - -3. Command Line Options - - WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS - INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. - USE THEM WITH CAUTION. - - Put a .conf file in the /etc/modprobe.d directory and add/edit a - line containing 'options aic7xxx aic7xxx=[command[,command...]]' where - 'command' is one or more of the following: - ----------------------------------------------------------------- - Option: verbose - Definition: enable additional informative messages during - driver operation. - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: debug:[value] - Definition: Enables various levels of debugging information - Possible Values: 0x0000 = no debugging, 0xffff = full debugging - Default Value: 0x0000 - ----------------------------------------------------------------- - Option: no_probe - Option: probe_eisa_vl - Definition: Do not probe for EISA/VLB controllers. - This is a toggle. If the driver is compiled - to not probe EISA/VLB controllers by default, - specifying "no_probe" will enable this probing. - If the driver is compiled to probe EISA/VLB - controllers by default, specifying "no_probe" - will disable this probing. - Possible Values: This option is a toggle - Default Value: EISA/VLB probing is disabled by default. - ----------------------------------------------------------------- - Option: pci_parity - Definition: Toggles the detection of PCI parity errors. - On many motherboards with VIA chipsets, - PCI parity is not generated correctly on the - PCI bus. It is impossible for the hardware to - differentiate between these "spurious" parity - errors and real parity errors. The symptom of - this problem is a stream of the message: - "scsi0: Data Parity Error Detected during address or write data phase" - output by the driver. - Possible Values: This option is a toggle - Default Value: PCI Parity Error reporting is disabled - ----------------------------------------------------------------- - Option: no_reset - Definition: Do not reset the bus during the initial probe - phase - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: extended - Definition: Force extended translation on the controller - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: periodic_otag - Definition: Send an ordered tag periodically to prevent - tag starvation. Needed for some older devices - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: reverse_scan - Definition: Probe the scsi bus in reverse order, starting - with target 15 - Possible Values: This option is a flag - Default Value: disabled - ----------------------------------------------------------------- - Option: global_tag_depth:[value] - Definition: Global tag depth for all targets on all busses. - This option sets the default tag depth which - may be selectively overridden vi the tag_info - option. - Possible Values: 1 - 253 - Default Value: 32 - ----------------------------------------------------------------- - Option: tag_info:{{value[,value...]}[,{value[,value...]}...]} - Definition: Set the per-target tagged queue depth on a - per controller basis. Both controllers and targets - may be omitted indicating that they should retain - the default tag depth. - Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} - On Controller 0 - specifies a tag depth of 16 for target 0 - specifies a tag depth of 64 for target 3 - specifies a tag depth of 8 for targets 4 and 5 - leaves target 6 at the default - specifies a tag depth of 32 for targets 1,2,7-15 - All other targets retain the default depth. - - tag_info:{{},{32,,32}} - On Controller 1 - specifies a tag depth of 32 for targets 0 and 2 - All other targets retain the default depth. - - Possible Values: 1 - 253 - Default Value: 32 - ----------------------------------------------------------------- - Option: seltime:[value] - Definition: Specifies the selection timeout value - Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms - Default Value: 0 - ----------------------------------------------------------------- - Option: dv: {value[,value...]} - Definition: Set Domain Validation Policy on a per-controller basis. - Controllers may be omitted indicating that - they should retain the default read streaming setting. - Example: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. - - Possible Values: < 0 Use setting from serial EEPROM. - 0 Disable DV - > 0 Enable DV - - Default Value: SCSI-Select setting on controllers with a SCSI Select - option for DV. Otherwise, on for controllers supporting - U160 speeds and off for all other controller types. - ----------------------------------------------------------------- - - Example: - 'options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1' - enables verbose logging, Disable EISA/VLB probing, - and set tag depth on Controller 1/Target 2 to 10 tags. - -4. Adaptec Customer Support - - A Technical Support Identification (TSID) Number is required for - Adaptec technical support. - - The 12-digit TSID can be found on the white barcode-type label - included inside the box with your product. The TSID helps us - provide more efficient service by accurately identifying your - product and support status. - - Support Options - - Search the Adaptec Support Knowledgebase (ASK) at - http://ask.adaptec.com for articles, troubleshooting tips, and - frequently asked questions about your product. - - For support via Email, submit your question to Adaptec's - Technical Support Specialists at http://ask.adaptec.com/. - - North America - - Visit our Web site at http://www.adaptec.com/. - - For information about Adaptec's support options, call - 408-957-2550, 24 hours a day, 7 days a week. - - To speak with a Technical Support Specialist, - * For hardware products, call 408-934-7274, - Monday to Friday, 3:00 am to 5:00 pm, PDT. - * For RAID and Fibre Channel products, call 321-207-2000, - Monday to Friday, 3:00 am to 5:00 pm, PDT. - To expedite your service, have your computer with you. - - To order Adaptec products, including accessories and cables, - call 408-957-7274. To order cables online go to - http://www.adaptec.com/buy-cables/. - - Europe - - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - - To speak with a Technical Support Specialist, call, or email, - * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, - http://ask-de.adaptec.com/. - * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, - http://ask-fr.adaptec.com/. - * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, - http://ask.adaptec.com/. - - You can order Adaptec cables online at - http://www.adaptec.com/buy-cables/. - - Japan - - Visit our web site at http://www.adaptec.co.jp/. - - To speak with a Technical Support Specialist, call - +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., - 1:00 p.m. to 6:00 p.m. - -------------------------------------------------------------------- -/* - * Copyright (c) 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. - * All rights reserved. - * - * You are permitted to redistribute, use and modify this README file in whole - * or in part in conjunction with redistribution of software governed by the - * General Public License, provided that the following conditions are met: - * 1. Redistributions of README file must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * 3. Modifications or new contributions must be attributed in a copyright - * notice identifying the author ("Contributor") and added below the - * original copyright notice. The copyright notice is for purposes of - * identifying contributors and should not be deemed as permission to alter - * the permissions given by Adaptec. - * - * THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY - * WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README - * FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ diff --git a/Documentation/scsi/arcmsr_spec.rst b/Documentation/scsi/arcmsr_spec.rst new file mode 100644 index 000000000000..83dd53bcff78 --- /dev/null +++ b/Documentation/scsi/arcmsr_spec.rst @@ -0,0 +1,907 @@ +ARECA FIRMWARE SPEC +=================== + +Usage of IOP331 adapter +======================= + +(All In/Out is in IOP331's view) + +1. Message 0 +------------ + +- InitThread message and return code + +2. Doorbell is used for RS-232 emulation +---------------------------------------- + +inDoorBell + bit0 + data in ready + zDRIVER DATA WRITE OK) + bit1 + data out has been read + (DRIVER DATA READ OK) + +outDooeBell: + bit0 + data out ready + (IOP331 DATA WRITE OK) + bit1 + data in has been read + (IOP331 DATA READ OK) + +3. Index Memory Usage +--------------------- + +============ ========================================== +offset 0xf00 for RS232 out (request buffer) +offset 0xe00 for RS232 in (scratch buffer) +offset 0xa00 for inbound message code message_rwbuffer + (driver send to IOP331) +offset 0xa00 for outbound message code message_rwbuffer + (IOP331 send to driver) +============ ========================================== + +4. RS-232 emulation +------------------- + +Currently 128 byte buffer is used: + +============ ===================== +1st uint32_t Data length (1--124) +Byte 4--127 Max 124 bytes of data +============ ===================== + +5. PostQ +-------- + +All SCSI Command must be sent through postQ: + + (inbound queue port) + Request frame must be 32 bytes aligned: + + #bit27--bit31 + flag for post ccb + #bit0--bit26 + real address (bit27--bit31) of post arcmsr_cdb + + ===== =================== + bit31 == =============== + 0 256 bytes frame + 1 512 bytes frame + == =============== + bit30 == ============== + 0 normal request + 1 BIOS request + == ============== + bit29 reserved + bit28 reserved + bit27 reserved + ===== =================== + + (outbount queue port) + Request reply: + + #bit27--bit31 + flag for reply + #bit0--bit26 + real address (bit27--bit31) of reply arcmsr_cdb + + ===== ======================================================= + bit31 must be 0 (for this type of reply) + bit30 reserved for BIOS handshake + bit29 reserved + bit28 == =================================================== + 0 no error, ignore AdapStatus/DevStatus/SenseData + 1 Error, error code in AdapStatus/DevStatus/SenseData + == =================================================== + bit27 reserved + ===== ======================================================= + +6. BIOS request +--------------- + +All BIOS request is the same with request from PostQ + +Except: + +Request frame is sent from configuration space: + + ============ ========================== + offset: 0x78 Request Frame (bit30 == 1) + offset: 0x18 writeonly to generate + IRQ to IOP331 + ============ ========================== + +Completion of request:: + + (bit30 == 0, bit28==err flag) + +7. Definition of SGL entry (structure) +-------------------------------------- + +8. Message1 Out - Diag Status Code (????) +----------------------------------------- + +9. Message0 message code +------------------------ + +====== ================================================================= +0x00 NOP +0x01 Get Config + ->offset 0xa00 :for outbound message code message_rwbuffer + (IOP331 send to driver) + + ===================== ========================================== + Signature 0x87974060(4) + Request len 0x00000200(4) + numbers of queue 0x00000100(4) + SDRAM Size 0x00000100(4)-->256 MB + IDE Channels 0x00000008(4) + vendor 40 bytes char + model 8 bytes char + FirmVer 16 bytes char + Device Map 16 bytes char + FirmwareVersion DWORD + + - Added for checking of + new firmware capability + ===================== ========================================== +0x02 Set Config + ->offset 0xa00 :for inbound message code message_rwbuffer + (driver send to IOP331) + + ========================= ================== + Signature 0x87974063(4) + UPPER32 of Request Frame (4)-->Driver Only + ========================= ================== +0x03 Reset (Abort all queued Command) +0x04 Stop Background Activity +0x05 Flush Cache +0x06 Start Background Activity + (re-start if background is halted) +0x07 Check If Host Command Pending + (Novell May Need This Function) +0x08 Set controller time + ->offset 0xa00 for inbound message code message_rwbuffer + (driver to IOP331) + + ====== ================== + byte 0 0xaa <-- signature + byte 1 0x55 <-- signature + byte 2 year (04) + byte 3 month (1..12) + byte 4 date (1..31) + byte 5 hour (0..23) + byte 6 minute (0..59) + byte 7 second (0..59) + ====== ================== +====== ================================================================= + + +RS-232 Interface for Areca Raid Controller +========================================== + + The low level command interface is exclusive with VT100 terminal + +1. Sequence of command execution +-------------------------------- + + (A) Header + 3 bytes sequence (0x5E, 0x01, 0x61) + + (B) Command block + variable length of data including length, + command code, data and checksum byte + + (C) Return data + variable length of data + +2. Command block +---------------- + + (A) 1st byte + command block length (low byte) + + (B) 2nd byte + command block length (high byte) + + .. Note:: command block length shouldn't > 2040 bytes, + length excludes these two bytes + + (C) 3rd byte + command code + + (D) 4th and following bytes + variable length data bytes + + depends on command code + + (E) last byte + checksum byte (sum of 1st byte until last data byte) + +3. Command code and associated data +----------------------------------- + +The following are command code defined in raid controller Command +code 0x10--0x1? are used for system level management, +no password checking is needed and should be implemented in separate +well controlled utility and not for end user access. +Command code 0x20--0x?? always check the password, +password must be entered to enable these command:: + + enum + { + GUI_SET_SERIAL=0x10, + GUI_SET_VENDOR, + GUI_SET_MODEL, + GUI_IDENTIFY, + GUI_CHECK_PASSWORD, + GUI_LOGOUT, + GUI_HTTP, + GUI_SET_ETHERNET_ADDR, + GUI_SET_LOGO, + GUI_POLL_EVENT, + GUI_GET_EVENT, + GUI_GET_HW_MONITOR, + // GUI_QUICK_CREATE=0x20, (function removed) + GUI_GET_INFO_R=0x20, + GUI_GET_INFO_V, + GUI_GET_INFO_P, + GUI_GET_INFO_S, + GUI_CLEAR_EVENT, + GUI_MUTE_BEEPER=0x30, + GUI_BEEPER_SETTING, + GUI_SET_PASSWORD, + GUI_HOST_INTERFACE_MODE, + GUI_REBUILD_PRIORITY, + GUI_MAX_ATA_MODE, + GUI_RESET_CONTROLLER, + GUI_COM_PORT_SETTING, + GUI_NO_OPERATION, + GUI_DHCP_IP, + GUI_CREATE_PASS_THROUGH=0x40, + GUI_MODIFY_PASS_THROUGH, + GUI_DELETE_PASS_THROUGH, + GUI_IDENTIFY_DEVICE, + GUI_CREATE_RAIDSET=0x50, + GUI_DELETE_RAIDSET, + GUI_EXPAND_RAIDSET, + GUI_ACTIVATE_RAIDSET, + GUI_CREATE_HOT_SPARE, + GUI_DELETE_HOT_SPARE, + GUI_CREATE_VOLUME=0x60, + GUI_MODIFY_VOLUME, + GUI_DELETE_VOLUME, + GUI_START_CHECK_VOLUME, + GUI_STOP_CHECK_VOLUME + }; + +Command description +^^^^^^^^^^^^^^^^^^^ + +GUI_SET_SERIAL + Set the controller serial# + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x10 + byte 3 password length (should be 0x0f) + byte 4-0x13 should be "ArEcATecHnoLogY" + byte 0x14--0x23 Serial number string (must be 16 bytes) + ================ ============================================= + +GUI_SET_VENDOR + Set vendor string for the controller + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x11 + byte 3 password length (should be 0x08) + byte 4-0x13 should be "ArEcAvAr" + byte 0x14--0x3B vendor string (must be 40 bytes) + ================ ============================================= + +GUI_SET_MODEL + Set the model name of the controller + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x12 + byte 3 password length (should be 0x08) + byte 4-0x13 should be "ArEcAvAr" + byte 0x14--0x1B model string (must be 8 bytes) + ================ ============================================= + +GUI_IDENTIFY + Identify device + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x13 + return "Areca RAID Subsystem " + ================ ============================================= + +GUI_CHECK_PASSWORD + Verify password + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x14 + byte 3 password length + byte 4-0x?? user password to be checked + ================ ============================================= + +GUI_LOGOUT + Logout GUI (force password checking on next command) + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x15 + ================ ============================================= + +GUI_HTTP + HTTP interface (reserved for Http proxy service)(0x16) + +GUI_SET_ETHERNET_ADDR + Set the ethernet MAC address + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x17 + byte 3 password length (should be 0x08) + byte 4-0x13 should be "ArEcAvAr" + byte 0x14--0x19 Ethernet MAC address (must be 6 bytes) + ================ ============================================= + +GUI_SET_LOGO + Set logo in HTTP + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x18 + byte 3 Page# (0/1/2/3) (0xff --> clear OEM logo) + byte 4/5/6/7 0x55/0xaa/0xa5/0x5a + byte 8 TITLE.JPG data (each page must be 2000 bytes) + + .. Note:: page0 1st 2 byte must be + actual length of the JPG file + ================ ============================================= + +GUI_POLL_EVENT + Poll If Event Log Changed + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x19 + ================ ============================================= + +GUI_GET_EVENT + Read Event + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x1a + byte 3 Event Page (0:1st page/1/2/3:last page) + ================ ============================================= + +GUI_GET_HW_MONITOR + Get HW monitor data + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x1b + byte 3 # of FANs(example 2) + byte 4 # of Voltage sensor(example 3) + byte 5 # of temperature sensor(example 2) + byte 6 # of power + byte 7/8 Fan#0 (RPM) + byte 9/10 Fan#1 + byte 11/12 Voltage#0 original value in ``*1000`` + byte 13/14 Voltage#0 value + byte 15/16 Voltage#1 org + byte 17/18 Voltage#1 + byte 19/20 Voltage#2 org + byte 21/22 Voltage#2 + byte 23 Temp#0 + byte 24 Temp#1 + byte 25 Power indicator (bit0 power#0, + bit1 power#1) + byte 26 UPS indicator + ================ ============================================= + +GUI_QUICK_CREATE + Quick create raid/volume set + + ================ ============================================== + byte 0,1 length + byte 2 command code 0x20 + byte 3/4/5/6 raw capacity + byte 7 raid level + byte 8 stripe size + byte 9 spare + byte 10/11/12/13 device mask (the devices to create raid/volume) + ================ ============================================== + + This function is removed, application like + to implement quick create function + + need to use GUI_CREATE_RAIDSET and GUI_CREATE_VOLUMESET function. + +GUI_GET_INFO_R + Get Raid Set Information + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x20 + byte 3 raidset# + ================ ============================================= + + :: + + typedef struct sGUI_RAIDSET + { + BYTE grsRaidSetName[16]; + DWORD grsCapacity; + DWORD grsCapacityX; + DWORD grsFailMask; + BYTE grsDevArray[32]; + BYTE grsMemberDevices; + BYTE grsNewMemberDevices; + BYTE grsRaidState; + BYTE grsVolumes; + BYTE grsVolumeList[16]; + BYTE grsRes1; + BYTE grsRes2; + BYTE grsRes3; + BYTE grsFreeSegments; + DWORD grsRawStripes[8]; + DWORD grsRes4; + DWORD grsRes5; // Total to 128 bytes + DWORD grsRes6; // Total to 128 bytes + } sGUI_RAIDSET, *pGUI_RAIDSET; + +GUI_GET_INFO_V + Get Volume Set Information + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x21 + byte 3 volumeset# + ================ ============================================= + + :: + + typedef struct sGUI_VOLUMESET + { + BYTE gvsVolumeName[16]; // 16 + DWORD gvsCapacity; + DWORD gvsCapacityX; + DWORD gvsFailMask; + DWORD gvsStripeSize; + DWORD gvsNewFailMask; + DWORD gvsNewStripeSize; + DWORD gvsVolumeStatus; + DWORD gvsProgress; // 32 + sSCSI_ATTR gvsScsi; + BYTE gvsMemberDisks; + BYTE gvsRaidLevel; // 8 + BYTE gvsNewMemberDisks; + BYTE gvsNewRaidLevel; + BYTE gvsRaidSetNumber; + BYTE gvsRes0; // 4 + BYTE gvsRes1[4]; // 64 bytes + } sGUI_VOLUMESET, *pGUI_VOLUMESET; + +GUI_GET_INFO_P + Get Physical Drive Information + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x22 + byte 3 drive # (from 0 to max-channels - 1) + ================ ============================================= + + :: + + typedef struct sGUI_PHY_DRV + { + BYTE gpdModelName[40]; + BYTE gpdSerialNumber[20]; + BYTE gpdFirmRev[8]; + DWORD gpdCapacity; + DWORD gpdCapacityX; // Reserved for expansion + BYTE gpdDeviceState; + BYTE gpdPioMode; + BYTE gpdCurrentUdmaMode; + BYTE gpdUdmaMode; + BYTE gpdDriveSelect; + BYTE gpdRaidNumber; // 0xff if not belongs to a raid set + sSCSI_ATTR gpdScsi; + BYTE gpdReserved[40]; // Total to 128 bytes + } sGUI_PHY_DRV, *pGUI_PHY_DRV; + +GUI_GET_INFO_S + Get System Information + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x23 + ================ ============================================= + + :: + + typedef struct sCOM_ATTR + { + BYTE comBaudRate; + BYTE comDataBits; + BYTE comStopBits; + BYTE comParity; + BYTE comFlowControl; + } sCOM_ATTR, *pCOM_ATTR; + typedef struct sSYSTEM_INFO + { + BYTE gsiVendorName[40]; + BYTE gsiSerialNumber[16]; + BYTE gsiFirmVersion[16]; + BYTE gsiBootVersion[16]; + BYTE gsiMbVersion[16]; + BYTE gsiModelName[8]; + BYTE gsiLocalIp[4]; + BYTE gsiCurrentIp[4]; + DWORD gsiTimeTick; + DWORD gsiCpuSpeed; + DWORD gsiICache; + DWORD gsiDCache; + DWORD gsiScache; + DWORD gsiMemorySize; + DWORD gsiMemorySpeed; + DWORD gsiEvents; + BYTE gsiMacAddress[6]; + BYTE gsiDhcp; + BYTE gsiBeeper; + BYTE gsiChannelUsage; + BYTE gsiMaxAtaMode; + BYTE gsiSdramEcc; // 1:if ECC enabled + BYTE gsiRebuildPriority; + sCOM_ATTR gsiComA; // 5 bytes + sCOM_ATTR gsiComB; // 5 bytes + BYTE gsiIdeChannels; + BYTE gsiScsiHostChannels; + BYTE gsiIdeHostChannels; + BYTE gsiMaxVolumeSet; + BYTE gsiMaxRaidSet; + BYTE gsiEtherPort; // 1:if ether net port supported + BYTE gsiRaid6Engine; // 1:Raid6 engine supported + BYTE gsiRes[75]; + } sSYSTEM_INFO, *pSYSTEM_INFO; + +GUI_CLEAR_EVENT + Clear System Event + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x24 + ================ ============================================= + +GUI_MUTE_BEEPER + Mute current beeper + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x30 + ================ ============================================= +GUI_BEEPER_SETTING + Disable beeper + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x31 + byte 3 0->disable, 1->enable + ================ ============================================= + +GUI_SET_PASSWORD + Change password + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x32 + byte 3 pass word length ( must <= 15 ) + byte 4 password (must be alpha-numerical) + ================ ============================================= + +GUI_HOST_INTERFACE_MODE + Set host interface mode + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x33 + byte 3 0->Independent, 1->cluster + ================ ============================================= + +GUI_REBUILD_PRIORITY + Set rebuild priority + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x34 + byte 3 0/1/2/3 (low->high) + ================ ============================================= + +GUI_MAX_ATA_MODE + Set maximum ATA mode to be used + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x35 + byte 3 0/1/2/3 (133/100/66/33) + ================ ============================================= + +GUI_RESET_CONTROLLER + Reset Controller + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x36 + * Response with VT100 screen (discard it) + ================ ============================================= + +GUI_COM_PORT_SETTING + COM port setting + + ================ ================================================= + byte 0,1 length + byte 2 command code 0x37 + byte 3 0->COMA (term port), + 1->COMB (debug port) + byte 4 0/1/2/3/4/5/6/7 + (1200/2400/4800/9600/19200/38400/57600/115200) + byte 5 data bit + (0:7 bit, 1:8 bit must be 8 bit) + byte 6 stop bit (0:1, 1:2 stop bits) + byte 7 parity (0:none, 1:off, 2:even) + byte 8 flow control + (0:none, 1:xon/xoff, 2:hardware => must use none) + ================ ================================================= + +GUI_NO_OPERATION + No operation + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x38 + ================ ============================================= + +GUI_DHCP_IP + Set DHCP option and local IP address + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x39 + byte 3 0:dhcp disabled, 1:dhcp enabled + byte 4/5/6/7 IP address + ================ ============================================= + +GUI_CREATE_PASS_THROUGH + Create pass through disk + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x40 + byte 3 device # + byte 4 scsi channel (0/1) + byte 5 scsi id (0-->15) + byte 6 scsi lun (0-->7) + byte 7 tagged queue (1 enabled) + byte 8 cache mode (1 enabled) + byte 9 max speed (0/1/2/3/4, + async/20/40/80/160 for scsi) + (0/1/2/3/4, 33/66/100/133/150 for ide ) + ================ ============================================= + +GUI_MODIFY_PASS_THROUGH + Modify pass through disk + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x41 + byte 3 device # + byte 4 scsi channel (0/1) + byte 5 scsi id (0-->15) + byte 6 scsi lun (0-->7) + byte 7 tagged queue (1 enabled) + byte 8 cache mode (1 enabled) + byte 9 max speed (0/1/2/3/4, + async/20/40/80/160 for scsi) + (0/1/2/3/4, 33/66/100/133/150 for ide ) + ================ ============================================= + +GUI_DELETE_PASS_THROUGH + Delete pass through disk + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x42 + byte 3 device# to be deleted + ================ ============================================= +GUI_IDENTIFY_DEVICE + Identify Device + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x43 + byte 3 Flash Method + (0:flash selected, 1:flash not selected) + byte 4/5/6/7 IDE device mask to be flashed + .. Note:: no response data available + ================ ============================================= + +GUI_CREATE_RAIDSET + Create Raid Set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x50 + byte 3/4/5/6 device mask + byte 7-22 raidset name (if byte 7 == 0:use default) + ================ ============================================= + +GUI_DELETE_RAIDSET + Delete Raid Set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x51 + byte 3 raidset# + ================ ============================================= + +GUI_EXPAND_RAIDSET + Expand Raid Set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x52 + byte 3 raidset# + byte 4/5/6/7 device mask for expansion + byte 8/9/10 (8:0 no change, 1 change, 0xff:terminate, + 9:new raid level, + 10:new stripe size + 0/1/2/3/4/5->4/8/16/32/64/128K ) + byte 11/12/13 repeat for each volume in the raidset + ================ ============================================= + +GUI_ACTIVATE_RAIDSET + Activate incomplete raid set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x53 + byte 3 raidset# + ================ ============================================= + +GUI_CREATE_HOT_SPARE + Create hot spare disk + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x54 + byte 3/4/5/6 device mask for hot spare creation + ================ ============================================= + +GUI_DELETE_HOT_SPARE + Delete hot spare disk + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x55 + byte 3/4/5/6 device mask for hot spare deletion + ================ ============================================= + +GUI_CREATE_VOLUME + Create volume set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x60 + byte 3 raidset# + byte 4-19 volume set name + (if byte4 == 0, use default) + byte 20-27 volume capacity (blocks) + byte 28 raid level + byte 29 stripe size + (0/1/2/3/4/5->4/8/16/32/64/128K) + byte 30 channel + byte 31 ID + byte 32 LUN + byte 33 1 enable tag + byte 34 1 enable cache + byte 35 speed + (0/1/2/3/4->async/20/40/80/160 for scsi) + (0/1/2/3/4->33/66/100/133/150 for IDE ) + byte 36 1 to select quick init + ================ ============================================= + +GUI_MODIFY_VOLUME + Modify volume Set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x61 + byte 3 volumeset# + byte 4-19 new volume set name + (if byte4 == 0, not change) + byte 20-27 new volume capacity (reserved) + byte 28 new raid level + byte 29 new stripe size + (0/1/2/3/4/5->4/8/16/32/64/128K) + byte 30 new channel + byte 31 new ID + byte 32 new LUN + byte 33 1 enable tag + byte 34 1 enable cache + byte 35 speed + (0/1/2/3/4->async/20/40/80/160 for scsi) + (0/1/2/3/4->33/66/100/133/150 for IDE ) + ================ ============================================= + +GUI_DELETE_VOLUME + Delete volume set + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x62 + byte 3 volumeset# + ================ ============================================= + +GUI_START_CHECK_VOLUME + Start volume consistency check + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x63 + byte 3 volumeset# + ================ ============================================= + +GUI_STOP_CHECK_VOLUME + Stop volume consistency check + + ================ ============================================= + byte 0,1 length + byte 2 command code 0x64 + ================ ============================================= + +4. Returned data +---------------- + +(A) Header + 3 bytes sequence (0x5E, 0x01, 0x61) +(B) Length + 2 bytes + (low byte 1st, excludes length and checksum byte) +(C) + status or data: + + 1) If length == 1 ==> 1 byte status code:: + + #define GUI_OK 0x41 + #define GUI_RAIDSET_NOT_NORMAL 0x42 + #define GUI_VOLUMESET_NOT_NORMAL 0x43 + #define GUI_NO_RAIDSET 0x44 + #define GUI_NO_VOLUMESET 0x45 + #define GUI_NO_PHYSICAL_DRIVE 0x46 + #define GUI_PARAMETER_ERROR 0x47 + #define GUI_UNSUPPORTED_COMMAND 0x48 + #define GUI_DISK_CONFIG_CHANGED 0x49 + #define GUI_INVALID_PASSWORD 0x4a + #define GUI_NO_DISK_SPACE 0x4b + #define GUI_CHECKSUM_ERROR 0x4c + #define GUI_PASSWORD_REQUIRED 0x4d + + 2) If length > 1: + + data block returned from controller + and the contents depends on the command code + +(E) Checksum + checksum of length and status or data byte + diff --git a/Documentation/scsi/arcmsr_spec.txt b/Documentation/scsi/arcmsr_spec.txt deleted file mode 100644 index 45d9482c1517..000000000000 --- a/Documentation/scsi/arcmsr_spec.txt +++ /dev/null @@ -1,574 +0,0 @@ -******************************************************************************* -** ARECA FIRMWARE SPEC -******************************************************************************* -** Usage of IOP331 adapter -** (All In/Out is in IOP331's view) -** 1. Message 0 --> InitThread message and return code -** 2. Doorbell is used for RS-232 emulation -** inDoorBell : bit0 -- data in ready -** (DRIVER DATA WRITE OK) -** bit1 -- data out has been read -** (DRIVER DATA READ OK) -** outDooeBell: bit0 -- data out ready -** (IOP331 DATA WRITE OK) -** bit1 -- data in has been read -** (IOP331 DATA READ OK) -** 3. Index Memory Usage -** offset 0xf00 : for RS232 out (request buffer) -** offset 0xe00 : for RS232 in (scratch buffer) -** offset 0xa00 : for inbound message code message_rwbuffer -** (driver send to IOP331) -** offset 0xa00 : for outbound message code message_rwbuffer -** (IOP331 send to driver) -** 4. RS-232 emulation -** Currently 128 byte buffer is used -** 1st uint32_t : Data length (1--124) -** Byte 4--127 : Max 124 bytes of data -** 5. PostQ -** All SCSI Command must be sent through postQ: -** (inbound queue port) Request frame must be 32 bytes aligned -** #bit27--bit31 => flag for post ccb -** #bit0--bit26 => real address (bit27--bit31) of post arcmsr_cdb -** bit31 : -** 0 : 256 bytes frame -** 1 : 512 bytes frame -** bit30 : -** 0 : normal request -** 1 : BIOS request -** bit29 : reserved -** bit28 : reserved -** bit27 : reserved -** --------------------------------------------------------------------------- -** (outbount queue port) Request reply -** #bit27--bit31 -** => flag for reply -** #bit0--bit26 -** => real address (bit27--bit31) of reply arcmsr_cdb -** bit31 : must be 0 (for this type of reply) -** bit30 : reserved for BIOS handshake -** bit29 : reserved -** bit28 : -** 0 : no error, ignore AdapStatus/DevStatus/SenseData -** 1 : Error, error code in AdapStatus/DevStatus/SenseData -** bit27 : reserved -** 6. BIOS request -** All BIOS request is the same with request from PostQ -** Except : -** Request frame is sent from configuration space -** offset: 0x78 : Request Frame (bit30 == 1) -** offset: 0x18 : writeonly to generate -** IRQ to IOP331 -** Completion of request: -** (bit30 == 0, bit28==err flag) -** 7. Definition of SGL entry (structure) -** 8. Message1 Out - Diag Status Code (????) -** 9. Message0 message code : -** 0x00 : NOP -** 0x01 : Get Config -** ->offset 0xa00 :for outbound message code message_rwbuffer -** (IOP331 send to driver) -** Signature 0x87974060(4) -** Request len 0x00000200(4) -** numbers of queue 0x00000100(4) -** SDRAM Size 0x00000100(4)-->256 MB -** IDE Channels 0x00000008(4) -** vendor 40 bytes char -** model 8 bytes char -** FirmVer 16 bytes char -** Device Map 16 bytes char -** FirmwareVersion DWORD <== Added for checking of -** new firmware capability -** 0x02 : Set Config -** ->offset 0xa00 :for inbound message code message_rwbuffer -** (driver send to IOP331) -** Signature 0x87974063(4) -** UPPER32 of Request Frame (4)-->Driver Only -** 0x03 : Reset (Abort all queued Command) -** 0x04 : Stop Background Activity -** 0x05 : Flush Cache -** 0x06 : Start Background Activity -** (re-start if background is halted) -** 0x07 : Check If Host Command Pending -** (Novell May Need This Function) -** 0x08 : Set controller time -** ->offset 0xa00 : for inbound message code message_rwbuffer -** (driver to IOP331) -** byte 0 : 0xaa <-- signature -** byte 1 : 0x55 <-- signature -** byte 2 : year (04) -** byte 3 : month (1..12) -** byte 4 : date (1..31) -** byte 5 : hour (0..23) -** byte 6 : minute (0..59) -** byte 7 : second (0..59) -******************************************************************************* -******************************************************************************* -** RS-232 Interface for Areca Raid Controller -** The low level command interface is exclusive with VT100 terminal -** -------------------------------------------------------------------- -** 1. Sequence of command execution -** -------------------------------------------------------------------- -** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) -** (B) Command block : variable length of data including length, -** command code, data and checksum byte -** (C) Return data : variable length of data -** -------------------------------------------------------------------- -** 2. Command block -** -------------------------------------------------------------------- -** (A) 1st byte : command block length (low byte) -** (B) 2nd byte : command block length (high byte) -** note ..command block length shouldn't > 2040 bytes, -** length excludes these two bytes -** (C) 3rd byte : command code -** (D) 4th and following bytes : variable length data bytes -** depends on command code -** (E) last byte : checksum byte (sum of 1st byte until last data byte) -** -------------------------------------------------------------------- -** 3. Command code and associated data -** -------------------------------------------------------------------- -** The following are command code defined in raid controller Command -** code 0x10--0x1? are used for system level management, -** no password checking is needed and should be implemented in separate -** well controlled utility and not for end user access. -** Command code 0x20--0x?? always check the password, -** password must be entered to enable these command. -** enum -** { -** GUI_SET_SERIAL=0x10, -** GUI_SET_VENDOR, -** GUI_SET_MODEL, -** GUI_IDENTIFY, -** GUI_CHECK_PASSWORD, -** GUI_LOGOUT, -** GUI_HTTP, -** GUI_SET_ETHERNET_ADDR, -** GUI_SET_LOGO, -** GUI_POLL_EVENT, -** GUI_GET_EVENT, -** GUI_GET_HW_MONITOR, -** // GUI_QUICK_CREATE=0x20, (function removed) -** GUI_GET_INFO_R=0x20, -** GUI_GET_INFO_V, -** GUI_GET_INFO_P, -** GUI_GET_INFO_S, -** GUI_CLEAR_EVENT, -** GUI_MUTE_BEEPER=0x30, -** GUI_BEEPER_SETTING, -** GUI_SET_PASSWORD, -** GUI_HOST_INTERFACE_MODE, -** GUI_REBUILD_PRIORITY, -** GUI_MAX_ATA_MODE, -** GUI_RESET_CONTROLLER, -** GUI_COM_PORT_SETTING, -** GUI_NO_OPERATION, -** GUI_DHCP_IP, -** GUI_CREATE_PASS_THROUGH=0x40, -** GUI_MODIFY_PASS_THROUGH, -** GUI_DELETE_PASS_THROUGH, -** GUI_IDENTIFY_DEVICE, -** GUI_CREATE_RAIDSET=0x50, -** GUI_DELETE_RAIDSET, -** GUI_EXPAND_RAIDSET, -** GUI_ACTIVATE_RAIDSET, -** GUI_CREATE_HOT_SPARE, -** GUI_DELETE_HOT_SPARE, -** GUI_CREATE_VOLUME=0x60, -** GUI_MODIFY_VOLUME, -** GUI_DELETE_VOLUME, -** GUI_START_CHECK_VOLUME, -** GUI_STOP_CHECK_VOLUME -** }; -** Command description : -** GUI_SET_SERIAL : Set the controller serial# -** byte 0,1 : length -** byte 2 : command code 0x10 -** byte 3 : password length (should be 0x0f) -** byte 4-0x13 : should be "ArEcATecHnoLogY" -** byte 0x14--0x23 : Serial number string (must be 16 bytes) -** GUI_SET_VENDOR : Set vendor string for the controller -** byte 0,1 : length -** byte 2 : command code 0x11 -** byte 3 : password length (should be 0x08) -** byte 4-0x13 : should be "ArEcAvAr" -** byte 0x14--0x3B : vendor string (must be 40 bytes) -** GUI_SET_MODEL : Set the model name of the controller -** byte 0,1 : length -** byte 2 : command code 0x12 -** byte 3 : password length (should be 0x08) -** byte 4-0x13 : should be "ArEcAvAr" -** byte 0x14--0x1B : model string (must be 8 bytes) -** GUI_IDENTIFY : Identify device -** byte 0,1 : length -** byte 2 : command code 0x13 -** return "Areca RAID Subsystem " -** GUI_CHECK_PASSWORD : Verify password -** byte 0,1 : length -** byte 2 : command code 0x14 -** byte 3 : password length -** byte 4-0x?? : user password to be checked -** GUI_LOGOUT : Logout GUI (force password checking on next command) -** byte 0,1 : length -** byte 2 : command code 0x15 -** GUI_HTTP : HTTP interface (reserved for Http proxy service)(0x16) -** -** GUI_SET_ETHERNET_ADDR : Set the ethernet MAC address -** byte 0,1 : length -** byte 2 : command code 0x17 -** byte 3 : password length (should be 0x08) -** byte 4-0x13 : should be "ArEcAvAr" -** byte 0x14--0x19 : Ethernet MAC address (must be 6 bytes) -** GUI_SET_LOGO : Set logo in HTTP -** byte 0,1 : length -** byte 2 : command code 0x18 -** byte 3 : Page# (0/1/2/3) (0xff --> clear OEM logo) -** byte 4/5/6/7 : 0x55/0xaa/0xa5/0x5a -** byte 8 : TITLE.JPG data (each page must be 2000 bytes) -** note page0 1st 2 byte must be -** actual length of the JPG file -** GUI_POLL_EVENT : Poll If Event Log Changed -** byte 0,1 : length -** byte 2 : command code 0x19 -** GUI_GET_EVENT : Read Event -** byte 0,1 : length -** byte 2 : command code 0x1a -** byte 3 : Event Page (0:1st page/1/2/3:last page) -** GUI_GET_HW_MONITOR : Get HW monitor data -** byte 0,1 : length -** byte 2 : command code 0x1b -** byte 3 : # of FANs(example 2) -** byte 4 : # of Voltage sensor(example 3) -** byte 5 : # of temperature sensor(example 2) -** byte 6 : # of power -** byte 7/8 : Fan#0 (RPM) -** byte 9/10 : Fan#1 -** byte 11/12 : Voltage#0 original value in *1000 -** byte 13/14 : Voltage#0 value -** byte 15/16 : Voltage#1 org -** byte 17/18 : Voltage#1 -** byte 19/20 : Voltage#2 org -** byte 21/22 : Voltage#2 -** byte 23 : Temp#0 -** byte 24 : Temp#1 -** byte 25 : Power indicator (bit0 : power#0, -** bit1 : power#1) -** byte 26 : UPS indicator -** GUI_QUICK_CREATE : Quick create raid/volume set -** byte 0,1 : length -** byte 2 : command code 0x20 -** byte 3/4/5/6 : raw capacity -** byte 7 : raid level -** byte 8 : stripe size -** byte 9 : spare -** byte 10/11/12/13: device mask (the devices to create raid/volume) -** This function is removed, application like -** to implement quick create function -** need to use GUI_CREATE_RAIDSET and GUI_CREATE_VOLUMESET function. -** GUI_GET_INFO_R : Get Raid Set Information -** byte 0,1 : length -** byte 2 : command code 0x20 -** byte 3 : raidset# -** typedef struct sGUI_RAIDSET -** { -** BYTE grsRaidSetName[16]; -** DWORD grsCapacity; -** DWORD grsCapacityX; -** DWORD grsFailMask; -** BYTE grsDevArray[32]; -** BYTE grsMemberDevices; -** BYTE grsNewMemberDevices; -** BYTE grsRaidState; -** BYTE grsVolumes; -** BYTE grsVolumeList[16]; -** BYTE grsRes1; -** BYTE grsRes2; -** BYTE grsRes3; -** BYTE grsFreeSegments; -** DWORD grsRawStripes[8]; -** DWORD grsRes4; -** DWORD grsRes5; // Total to 128 bytes -** DWORD grsRes6; // Total to 128 bytes -** } sGUI_RAIDSET, *pGUI_RAIDSET; -** GUI_GET_INFO_V : Get Volume Set Information -** byte 0,1 : length -** byte 2 : command code 0x21 -** byte 3 : volumeset# -** typedef struct sGUI_VOLUMESET -** { -** BYTE gvsVolumeName[16]; // 16 -** DWORD gvsCapacity; -** DWORD gvsCapacityX; -** DWORD gvsFailMask; -** DWORD gvsStripeSize; -** DWORD gvsNewFailMask; -** DWORD gvsNewStripeSize; -** DWORD gvsVolumeStatus; -** DWORD gvsProgress; // 32 -** sSCSI_ATTR gvsScsi; -** BYTE gvsMemberDisks; -** BYTE gvsRaidLevel; // 8 -** BYTE gvsNewMemberDisks; -** BYTE gvsNewRaidLevel; -** BYTE gvsRaidSetNumber; -** BYTE gvsRes0; // 4 -** BYTE gvsRes1[4]; // 64 bytes -** } sGUI_VOLUMESET, *pGUI_VOLUMESET; -** GUI_GET_INFO_P : Get Physical Drive Information -** byte 0,1 : length -** byte 2 : command code 0x22 -** byte 3 : drive # (from 0 to max-channels - 1) -** typedef struct sGUI_PHY_DRV -** { -** BYTE gpdModelName[40]; -** BYTE gpdSerialNumber[20]; -** BYTE gpdFirmRev[8]; -** DWORD gpdCapacity; -** DWORD gpdCapacityX; // Reserved for expansion -** BYTE gpdDeviceState; -** BYTE gpdPioMode; -** BYTE gpdCurrentUdmaMode; -** BYTE gpdUdmaMode; -** BYTE gpdDriveSelect; -** BYTE gpdRaidNumber; // 0xff if not belongs to a raid set -** sSCSI_ATTR gpdScsi; -** BYTE gpdReserved[40]; // Total to 128 bytes -** } sGUI_PHY_DRV, *pGUI_PHY_DRV; -** GUI_GET_INFO_S : Get System Information -** byte 0,1 : length -** byte 2 : command code 0x23 -** typedef struct sCOM_ATTR -** { -** BYTE comBaudRate; -** BYTE comDataBits; -** BYTE comStopBits; -** BYTE comParity; -** BYTE comFlowControl; -** } sCOM_ATTR, *pCOM_ATTR; -** typedef struct sSYSTEM_INFO -** { -** BYTE gsiVendorName[40]; -** BYTE gsiSerialNumber[16]; -** BYTE gsiFirmVersion[16]; -** BYTE gsiBootVersion[16]; -** BYTE gsiMbVersion[16]; -** BYTE gsiModelName[8]; -** BYTE gsiLocalIp[4]; -** BYTE gsiCurrentIp[4]; -** DWORD gsiTimeTick; -** DWORD gsiCpuSpeed; -** DWORD gsiICache; -** DWORD gsiDCache; -** DWORD gsiScache; -** DWORD gsiMemorySize; -** DWORD gsiMemorySpeed; -** DWORD gsiEvents; -** BYTE gsiMacAddress[6]; -** BYTE gsiDhcp; -** BYTE gsiBeeper; -** BYTE gsiChannelUsage; -** BYTE gsiMaxAtaMode; -** BYTE gsiSdramEcc; // 1:if ECC enabled -** BYTE gsiRebuildPriority; -** sCOM_ATTR gsiComA; // 5 bytes -** sCOM_ATTR gsiComB; // 5 bytes -** BYTE gsiIdeChannels; -** BYTE gsiScsiHostChannels; -** BYTE gsiIdeHostChannels; -** BYTE gsiMaxVolumeSet; -** BYTE gsiMaxRaidSet; -** BYTE gsiEtherPort; // 1:if ether net port supported -** BYTE gsiRaid6Engine; // 1:Raid6 engine supported -** BYTE gsiRes[75]; -** } sSYSTEM_INFO, *pSYSTEM_INFO; -** GUI_CLEAR_EVENT : Clear System Event -** byte 0,1 : length -** byte 2 : command code 0x24 -** GUI_MUTE_BEEPER : Mute current beeper -** byte 0,1 : length -** byte 2 : command code 0x30 -** GUI_BEEPER_SETTING : Disable beeper -** byte 0,1 : length -** byte 2 : command code 0x31 -** byte 3 : 0->disable, 1->enable -** GUI_SET_PASSWORD : Change password -** byte 0,1 : length -** byte 2 : command code 0x32 -** byte 3 : pass word length ( must <= 15 ) -** byte 4 : password (must be alpha-numerical) -** GUI_HOST_INTERFACE_MODE : Set host interface mode -** byte 0,1 : length -** byte 2 : command code 0x33 -** byte 3 : 0->Independent, 1->cluster -** GUI_REBUILD_PRIORITY : Set rebuild priority -** byte 0,1 : length -** byte 2 : command code 0x34 -** byte 3 : 0/1/2/3 (low->high) -** GUI_MAX_ATA_MODE : Set maximum ATA mode to be used -** byte 0,1 : length -** byte 2 : command code 0x35 -** byte 3 : 0/1/2/3 (133/100/66/33) -** GUI_RESET_CONTROLLER : Reset Controller -** byte 0,1 : length -** byte 2 : command code 0x36 -** *Response with VT100 screen (discard it) -** GUI_COM_PORT_SETTING : COM port setting -** byte 0,1 : length -** byte 2 : command code 0x37 -** byte 3 : 0->COMA (term port), -** 1->COMB (debug port) -** byte 4 : 0/1/2/3/4/5/6/7 -** (1200/2400/4800/9600/19200/38400/57600/115200) -** byte 5 : data bit -** (0:7 bit, 1:8 bit : must be 8 bit) -** byte 6 : stop bit (0:1, 1:2 stop bits) -** byte 7 : parity (0:none, 1:off, 2:even) -** byte 8 : flow control -** (0:none, 1:xon/xoff, 2:hardware => must use none) -** GUI_NO_OPERATION : No operation -** byte 0,1 : length -** byte 2 : command code 0x38 -** GUI_DHCP_IP : Set DHCP option and local IP address -** byte 0,1 : length -** byte 2 : command code 0x39 -** byte 3 : 0:dhcp disabled, 1:dhcp enabled -** byte 4/5/6/7 : IP address -** GUI_CREATE_PASS_THROUGH : Create pass through disk -** byte 0,1 : length -** byte 2 : command code 0x40 -** byte 3 : device # -** byte 4 : scsi channel (0/1) -** byte 5 : scsi id (0-->15) -** byte 6 : scsi lun (0-->7) -** byte 7 : tagged queue (1 : enabled) -** byte 8 : cache mode (1 : enabled) -** byte 9 : max speed (0/1/2/3/4, -** async/20/40/80/160 for scsi) -** (0/1/2/3/4, 33/66/100/133/150 for ide ) -** GUI_MODIFY_PASS_THROUGH : Modify pass through disk -** byte 0,1 : length -** byte 2 : command code 0x41 -** byte 3 : device # -** byte 4 : scsi channel (0/1) -** byte 5 : scsi id (0-->15) -** byte 6 : scsi lun (0-->7) -** byte 7 : tagged queue (1 : enabled) -** byte 8 : cache mode (1 : enabled) -** byte 9 : max speed (0/1/2/3/4, -** async/20/40/80/160 for scsi) -** (0/1/2/3/4, 33/66/100/133/150 for ide ) -** GUI_DELETE_PASS_THROUGH : Delete pass through disk -** byte 0,1 : length -** byte 2 : command code 0x42 -** byte 3 : device# to be deleted -** GUI_IDENTIFY_DEVICE : Identify Device -** byte 0,1 : length -** byte 2 : command code 0x43 -** byte 3 : Flash Method -** (0:flash selected, 1:flash not selected) -** byte 4/5/6/7 : IDE device mask to be flashed -** note .... no response data available -** GUI_CREATE_RAIDSET : Create Raid Set -** byte 0,1 : length -** byte 2 : command code 0x50 -** byte 3/4/5/6 : device mask -** byte 7-22 : raidset name (if byte 7 == 0:use default) -** GUI_DELETE_RAIDSET : Delete Raid Set -** byte 0,1 : length -** byte 2 : command code 0x51 -** byte 3 : raidset# -** GUI_EXPAND_RAIDSET : Expand Raid Set -** byte 0,1 : length -** byte 2 : command code 0x52 -** byte 3 : raidset# -** byte 4/5/6/7 : device mask for expansion -** byte 8/9/10 : (8:0 no change, 1 change, 0xff:terminate, -** 9:new raid level, -** 10:new stripe size -** 0/1/2/3/4/5->4/8/16/32/64/128K ) -** byte 11/12/13 : repeat for each volume in the raidset -** GUI_ACTIVATE_RAIDSET : Activate incomplete raid set -** byte 0,1 : length -** byte 2 : command code 0x53 -** byte 3 : raidset# -** GUI_CREATE_HOT_SPARE : Create hot spare disk -** byte 0,1 : length -** byte 2 : command code 0x54 -** byte 3/4/5/6 : device mask for hot spare creation -** GUI_DELETE_HOT_SPARE : Delete hot spare disk -** byte 0,1 : length -** byte 2 : command code 0x55 -** byte 3/4/5/6 : device mask for hot spare deletion -** GUI_CREATE_VOLUME : Create volume set -** byte 0,1 : length -** byte 2 : command code 0x60 -** byte 3 : raidset# -** byte 4-19 : volume set name -** (if byte4 == 0, use default) -** byte 20-27 : volume capacity (blocks) -** byte 28 : raid level -** byte 29 : stripe size -** (0/1/2/3/4/5->4/8/16/32/64/128K) -** byte 30 : channel -** byte 31 : ID -** byte 32 : LUN -** byte 33 : 1 enable tag -** byte 34 : 1 enable cache -** byte 35 : speed -** (0/1/2/3/4->async/20/40/80/160 for scsi) -** (0/1/2/3/4->33/66/100/133/150 for IDE ) -** byte 36 : 1 to select quick init -** -** GUI_MODIFY_VOLUME : Modify volume Set -** byte 0,1 : length -** byte 2 : command code 0x61 -** byte 3 : volumeset# -** byte 4-19 : new volume set name -** (if byte4 == 0, not change) -** byte 20-27 : new volume capacity (reserved) -** byte 28 : new raid level -** byte 29 : new stripe size -** (0/1/2/3/4/5->4/8/16/32/64/128K) -** byte 30 : new channel -** byte 31 : new ID -** byte 32 : new LUN -** byte 33 : 1 enable tag -** byte 34 : 1 enable cache -** byte 35 : speed -** (0/1/2/3/4->async/20/40/80/160 for scsi) -** (0/1/2/3/4->33/66/100/133/150 for IDE ) -** GUI_DELETE_VOLUME : Delete volume set -** byte 0,1 : length -** byte 2 : command code 0x62 -** byte 3 : volumeset# -** GUI_START_CHECK_VOLUME : Start volume consistency check -** byte 0,1 : length -** byte 2 : command code 0x63 -** byte 3 : volumeset# -** GUI_STOP_CHECK_VOLUME : Stop volume consistency check -** byte 0,1 : length -** byte 2 : command code 0x64 -** --------------------------------------------------------------------- -** 4. Returned data -** --------------------------------------------------------------------- -** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) -** (B) Length : 2 bytes -** (low byte 1st, excludes length and checksum byte) -** (C) status or data : -** <1> If length == 1 ==> 1 byte status code -** #define GUI_OK 0x41 -** #define GUI_RAIDSET_NOT_NORMAL 0x42 -** #define GUI_VOLUMESET_NOT_NORMAL 0x43 -** #define GUI_NO_RAIDSET 0x44 -** #define GUI_NO_VOLUMESET 0x45 -** #define GUI_NO_PHYSICAL_DRIVE 0x46 -** #define GUI_PARAMETER_ERROR 0x47 -** #define GUI_UNSUPPORTED_COMMAND 0x48 -** #define GUI_DISK_CONFIG_CHANGED 0x49 -** #define GUI_INVALID_PASSWORD 0x4a -** #define GUI_NO_DISK_SPACE 0x4b -** #define GUI_CHECKSUM_ERROR 0x4c -** #define GUI_PASSWORD_REQUIRED 0x4d -** <2> If length > 1 ==> -** data block returned from controller -** and the contents depends on the command code -** (E) Checksum : checksum of length and status or data byte -************************************************************************** diff --git a/Documentation/scsi/bfa.txt b/Documentation/scsi/bfa.rst index 3cc4d80d6092..3abc0411857d 100644 --- a/Documentation/scsi/bfa.txt +++ b/Documentation/scsi/bfa.rst @@ -1,5 +1,8 @@ -Linux driver for Brocade FC/FCOE adapters +.. SPDX-License-Identifier: GPL-2.0 +========================================= +Linux driver for Brocade FC/FCOE adapters +========================================= Supported Hardware ------------------ @@ -7,8 +10,9 @@ Supported Hardware bfa 3.0.2.2 driver supports all Brocade FC/FCOE adapters. Below is a list of adapter models with corresponding PCIIDs. - PCIID Model - + =================== =========================================== + PCIID Model + =================== =========================================== 1657:0013:1657:0014 425 4Gbps dual port FC HBA 1657:0013:1657:0014 825 8Gbps PCIe dual port FC HBA 1657:0013:103c:1742 HP 82B 8Gbps PCIedual port FC HBA @@ -26,6 +30,7 @@ adapter models with corresponding PCIIDs. 1657:0022:1657:0024 1860 16Gbps FC HBA 1657:0022:1657:0022 1860 10Gbps CNA - FCOE + =================== =========================================== Firmware download @@ -37,9 +42,11 @@ http://www.brocade.com/services-support/drivers-downloads/adapters/Linux.page and then click following respective util package link: - Version Link - + ========= ======================================================= + Version Link + ========= ======================================================= v3.0.0.0 Linux Adapter Firmware package for RHEL 6.2, SLES 11SP2 + ========= ======================================================= Configuration & Management utility download @@ -52,9 +59,11 @@ http://www.brocade.com/services-support/drivers-downloads/adapters/Linux.page and then click following respective util package link - Version Link - + ========= ======================================================= + Version Link + ========= ======================================================= v3.0.2.0 Linux Adapter Firmware package for RHEL 6.2, SLES 11SP2 + ========= ======================================================= Documentation @@ -69,10 +78,11 @@ http://www.brocade.com/services-support/drivers-downloads/adapters/Linux.page and use the following inbox and out-of-box driver version mapping to find the corresponding documentation: + ============= ================== Inbox Version Out-of-box Version - + ============= ================== v3.0.2.2 v3.0.0.0 - + ============= ================== Support ------- diff --git a/Documentation/scsi/bnx2fc.txt b/Documentation/scsi/bnx2fc.rst index 80823556d62f..2fef2dff80c7 100644 --- a/Documentation/scsi/bnx2fc.txt +++ b/Documentation/scsi/bnx2fc.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================== Operating FCoE using bnx2fc =========================== Broadcom FCoE offload through bnx2fc is full stateful hardware offload that @@ -24,6 +27,7 @@ Driver Usage Model: 2. Configure the interfaces on which bnx2fc driver has to operate on. Here are the steps to configure: + a. cd /etc/fcoe b. copy cfg-ethx to cfg-eth5 if FCoE has to be enabled on eth5. c. Repeat this for all the interfaces where FCoE has to be enabled. @@ -39,8 +43,10 @@ discovery and log into the targets. 5. "Symbolic Name" in 'fcoeadm -i' output would display if bnx2fc has claimed the interface. -Eg: -[root@bh2 ~]# fcoeadm -i + +Eg:: + + [root@bh2 ~]# fcoeadm -i Description: NetXtreme II BCM57712 10 Gigabit Ethernet Revision: 01 Manufacturer: Broadcom Corporation @@ -60,16 +66,16 @@ Eg: State: Online 6. Verify the vlan discovery is performed by running ifconfig and notice -<INTERFACE>.<VLAN>-fcoe interfaces are automatically created. + <INTERFACE>.<VLAN>-fcoe interfaces are automatically created. Refer to fcoeadm manpage for more information on fcoeadm operations to create/destroy interfaces or to display lun/target information. -NOTE: +NOTE ==== ** Broadcom FCoE capable devices implement a DCBX/LLDP client on-chip. Only one LLDP client is allowed per interface. For proper operation all host software based DCBX/LLDP clients (e.g. lldpad) must be disabled. To disable lldpad on a -given interface, run the following command: +given interface, run the following command:: -lldptool set-lldp -i <interface_name> adminStatus=disabled + lldptool set-lldp -i <interface_name> adminStatus=disabled diff --git a/Documentation/scsi/cxgb3i.txt b/Documentation/scsi/cxgb3i.rst index 7ac8032ee9b2..e01f18fbfa9f 100644 --- a/Documentation/scsi/cxgb3i.txt +++ b/Documentation/scsi/cxgb3i.rst @@ -1,4 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================= Chelsio S3 iSCSI Driver for Linux +================================= Introduction ============ @@ -49,7 +53,8 @@ The following steps need to be taken to accelerates the open-iscsi initiator: The cxgb3i module registers a new transport class "cxgb3i" with open-iscsi. - * in the case of recompiling the kernel, the cxgb3i selection is located at + * in the case of recompiling the kernel, the cxgb3i selection is located at:: + Device Drivers SCSI device support ---> [*] SCSI low-level drivers ---> @@ -58,25 +63,26 @@ The following steps need to be taken to accelerates the open-iscsi initiator: 2. Create an interface file located under /etc/iscsi/ifaces/ for the new transport class "cxgb3i". - The content of the file should be in the following format: + The content of the file should be in the following format:: + iface.transport_name = cxgb3i iface.net_ifacename = <ethX> iface.ipaddress = <iscsi ip address> * if iface.ipaddress is specified, <iscsi ip address> needs to be either the - same as the ethX's ip address or an address on the same subnet. Make - sure the ip address is unique in the network. + same as the ethX's ip address or an address on the same subnet. Make + sure the ip address is unique in the network. 3. edit /etc/iscsi/iscsid.conf The default setting for MaxRecvDataSegmentLength (131072) is too big; - replace with a value no bigger than 15360 (for example 8192): + replace with a value no bigger than 15360 (for example 8192):: node.conn[0].iscsi.MaxRecvDataSegmentLength = 8192 * The login would fail for a normal session if MaxRecvDataSegmentLength is - too big. A error message in the format of - "cxgb3i: ERR! MaxRecvSegmentLength <X> too big. Need to be <= <Y>." - would be logged to dmesg. + too big. A error message in the format of + "cxgb3i: ERR! MaxRecvSegmentLength <X> too big. Need to be <= <Y>." + would be logged to dmesg. 4. To direct open-iscsi traffic to go through cxgb3i's accelerated path, "-I <iface file name>" option needs to be specified with most of the diff --git a/Documentation/scsi/dc395x.txt b/Documentation/scsi/dc395x.rst index 88219f96633d..d779e782b1cb 100644 --- a/Documentation/scsi/dc395x.txt +++ b/Documentation/scsi/dc395x.rst @@ -1,5 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== README file for the dc395x SCSI driver -========================================== +====================================== Status ------ @@ -18,14 +21,14 @@ http://lists.twibble.org/mailman/listinfo/dc395x/ Parameters ---------- -The driver uses the settings from the EEPROM set in the SCSI BIOS +The driver uses the settings from the EEPROM set in the SCSI BIOS setup. If there is no EEPROM, the driver uses default values. Both can be overridden by command line parameters (module or kernel parameters). The following parameters are available: - - safe +safe Default: 0, Acceptable values: 0 or 1 If safe is set to 1 then the adapter will use conservative @@ -33,52 +36,63 @@ The following parameters are available: shortcut for dc395x=7,4,9,15,2,10 - - adapter_id +adapter_id Default: 7, Acceptable values: 0 to 15 Sets the host adapter SCSI ID. - - max_speed +max_speed Default: 1, Acceptable value: 0 to 7 - 0 = 20 Mhz - 1 = 12.2 Mhz - 2 = 10 Mhz - 3 = 8 Mhz - 4 = 6.7 Mhz - 5 = 5.8 Hhz - 6 = 5 Mhz - 7 = 4 Mhz - - - dev_mode + + == ======== + 0 20 Mhz + 1 12.2 Mhz + 2 10 Mhz + 3 8 Mhz + 4 6.7 Mhz + 5 5.8 Hhz + 6 5 Mhz + 7 4 Mhz + == ======== + +dev_mode Bitmap for device configuration DevMode bit definition: + + === ======== ======== ========================================= Bit Val(hex) Val(dec) Meaning - *0 0x01 1 Parity check - *1 0x02 2 Synchronous Negotiation - *2 0x04 4 Disconnection - *3 0x08 8 Send Start command on startup. (Not used) - *4 0x10 16 Tagged Command Queueing - *5 0x20 32 Wide Negotiation - - - adapter_mode + === ======== ======== ========================================= + 0 0x01 1 Parity check + 1 0x02 2 Synchronous Negotiation + 2 0x04 4 Disconnection + 3 0x08 8 Send Start command on startup. (Not used) + 4 0x10 16 Tagged Command Queueing + 5 0x20 32 Wide Negotiation + === ======== ======== ========================================= + +adapter_mode Bitmap for adapter configuration AdaptMode bit definition + + ===== ======== ======== ==================================================== Bit Val(hex) Val(dec) Meaning - *0 0x01 1 Support more than two drives. (Not used) - *1 0x02 2 Use DOS compatible mapping for HDs greater than 1GB. - *2 0x04 4 Reset SCSI Bus on startup. - *3 0x08 8 Active Negation: Improves SCSI Bus noise immunity. + ===== ======== ======== ==================================================== + 0 0x01 1 Support more than two drives. (Not used) + 1 0x02 2 Use DOS compatible mapping for HDs greater than 1GB. + 2 0x04 4 Reset SCSI Bus on startup. + 3 0x08 8 Active Negation: Improves SCSI Bus noise immunity. 4 0x10 16 Immediate return on BIOS seek command. (Not used) (*)5 0x20 32 Check for LUNs >= 1. + ===== ======== ======== ==================================================== - - tags +tags Default: 3, Acceptable values: 0-5 - + The number of tags is 1<<x, if x has been specified - - reset_delay +reset_delay Default: 1, Acceptable values: 0-180 The seconds to not accept commands after a SCSI Reset @@ -95,8 +109,9 @@ License (GPL). Please read it, before using this driver. It should be included in your kernel sources and with your distribution. It carries the filename COPYING. If you don't have it, please ask me to send you one by email. -Note: The GNU GPL says also something about warranty and liability. + +Note: The GNU GPL says also something about warranty and liability. Please be aware the following: While we do my best to provide a working and -reliable driver, there is a chance, that it will kill your valuable data. +reliable driver, there is a chance, that it will kill your valuable data. We refuse to take any responsibility for that. The driver is provided as-is and YOU USE IT AT YOUR OWN RESPONSIBILITY. diff --git a/Documentation/scsi/dpti.rst b/Documentation/scsi/dpti.rst new file mode 100644 index 000000000000..0496919d87d3 --- /dev/null +++ b/Documentation/scsi/dpti.rst @@ -0,0 +1,92 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================== +Adaptec dpti driver +=================== + +Redistribution and use in source form, with or without modification, are +permitted provided that redistributions of source code must retain the +above copyright notice, this list of conditions and the following disclaimer. + +This software is provided ``as is`` by Adaptec and +any express or implied warranties, including, but not limited to, the +implied warranties of merchantability and fitness for a particular purpose, +are disclaimed. In no event shall Adaptec be +liable for any direct, indirect, incidental, special, exemplary or +consequential damages (including, but not limited to, procurement of +substitute goods or services; loss of use, data, or profits; or business +interruptions) however caused and on any theory of liability, whether in +contract, strict liability, or tort (including negligence or otherwise) +arising in any way out of the use of this driver software, even if advised +of the possibility of such damage. + +This driver supports the Adaptec I2O RAID and DPT SmartRAID V I2O boards. + +Credits +======= + +The original linux driver was ported to Linux by Karen White while at +Dell Computer. It was ported from Bob Pasteur's (of DPT) original +non-Linux driver. Mark Salyzyn and Bob Pasteur consulted on the original +driver. + +2.0 version of the driver by Deanna Bonds and Mark Salyzyn. + +History +======= + +The driver was originally ported to linux version 2.0.34 + +==== ========================================================================== +V2.0 Rewrite of driver. Re-architectured based on i2o subsystem. + This was the first full GPL version since the last version used + i2osig headers which were not GPL. Developer Testing version. +V2.1 Internal testing +V2.2 First released version + +V2.3 Changes: + + - Added Raptor Support + - Fixed bug causing system to hang under extreme load with + - management utilities running (removed GFP_DMA from kmalloc flags) + +V2.4 First version ready to be submitted to be embedded in the kernel + + Changes: + + - Implemented suggestions from Alan Cox + - Added calculation of resid for sg layer + - Better error handling + - Added checking underflow conditions + - Added DATAPROTECT checking + - Changed error return codes + - Fixed pointer bug in bus reset routine + - Enabled hba reset from ioctls (allows a FW flash to reboot and use + the new FW without having to reboot) + - Changed proc output +==== ========================================================================== + +TODO +==== +- Add 64 bit Scatter Gather when compiled on 64 bit architectures +- Add sparse lun scanning +- Add code that checks if a device that had been taken offline is + now online (at the FW level) when test unit ready or inquiry + command from scsi-core +- Add proc read interface +- busrescan command +- rescan command +- Add code to rescan routine that notifies scsi-core about new devices +- Add support for C-PCI (hotplug stuff) +- Add ioctl passthru error recovery + +Notes +===== +The DPT card optimizes the order of processing commands. Consequently, +a command may take up to 6 minutes to complete after it has been sent +to the board. + +The files dpti_ioctl.h dptsig.h osd_defs.h osd_util.h sys_info.h are part of the +interface files for Adaptec's management routines. These define the structures used +in the ioctls. They are written to be portable. They are hard to read, but I need +to use them 'as is' or I can miss changes in the interface. diff --git a/Documentation/scsi/dpti.txt b/Documentation/scsi/dpti.txt deleted file mode 100644 index f36dc0e7c8da..000000000000 --- a/Documentation/scsi/dpti.txt +++ /dev/null @@ -1,83 +0,0 @@ - /* TERMS AND CONDITIONS OF USE - * - * Redistribution and use in source form, with or without modification, are - * permitted provided that redistributions of source code must retain the - * above copyright notice, this list of conditions and the following disclaimer. - * - * This software is provided `as is' by Adaptec and - * any express or implied warranties, including, but not limited to, the - * implied warranties of merchantability and fitness for a particular purpose, - * are disclaimed. In no event shall Adaptec be - * liable for any direct, indirect, incidental, special, exemplary or - * consequential damages (including, but not limited to, procurement of - * substitute goods or services; loss of use, data, or profits; or business - * interruptions) however caused and on any theory of liability, whether in - * contract, strict liability, or tort (including negligence or otherwise) - * arising in any way out of the use of this driver software, even if advised - * of the possibility of such damage. - * - **************************************************************** - * This driver supports the Adaptec I2O RAID and DPT SmartRAID V I2O boards. - * - * CREDITS: - * The original linux driver was ported to Linux by Karen White while at - * Dell Computer. It was ported from Bob Pasteur's (of DPT) original - * non-Linux driver. Mark Salyzyn and Bob Pasteur consulted on the original - * driver. - * - * 2.0 version of the driver by Deanna Bonds and Mark Salyzyn. - * - * HISTORY: - * The driver was originally ported to linux version 2.0.34 - * - * V2.0 Rewrite of driver. Re-architectured based on i2o subsystem. - * This was the first full GPL version since the last version used - * i2osig headers which were not GPL. Developer Testing version. - * V2.1 Internal testing - * V2.2 First released version - * - * V2.3 - * Changes: - * Added Raptor Support - * Fixed bug causing system to hang under extreme load with - * management utilities running (removed GFP_DMA from kmalloc flags) - * - * - * V2.4 First version ready to be submitted to be embedded in the kernel - * Changes: - * Implemented suggestions from Alan Cox - * Added calculation of resid for sg layer - * Better error handling - * Added checking underflow conditions - * Added DATAPROTECT checking - * Changed error return codes - * Fixed pointer bug in bus reset routine - * Enabled hba reset from ioctls (allows a FW flash to reboot and use the new - * FW without having to reboot) - * Changed proc output - * - * TODO: - * Add 64 bit Scatter Gather when compiled on 64 bit architectures - * Add sparse lun scanning - * Add code that checks if a device that had been taken offline is - * now online (at the FW level) when test unit ready or inquiry - * command from scsi-core - * Add proc read interface - * busrescan command - * rescan command - * Add code to rescan routine that notifies scsi-core about new devices - * Add support for C-PCI (hotplug stuff) - * Add ioctl passthru error recovery - * - * NOTES: - * The DPT card optimizes the order of processing commands. Consequently, - * a command may take up to 6 minutes to complete after it has been sent - * to the board. - * - * The files dpti_ioctl.h dptsig.h osd_defs.h osd_util.h sys_info.h are part of the - * interface files for Adaptec's management routines. These define the structures used - * in the ioctls. They are written to be portable. They are hard to read, but I need - * to use them 'as is' or I can miss changes in the interface. - * - */ - diff --git a/Documentation/scsi/g_NCR5380.rst b/Documentation/scsi/g_NCR5380.rst new file mode 100644 index 000000000000..a282059fec43 --- /dev/null +++ b/Documentation/scsi/g_NCR5380.rst @@ -0,0 +1,93 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +========================================== +README file for the Linux g_NCR5380 driver +========================================== + +Copyright |copy| 1993 Drew Eckhard + +NCR53c400 extensions Copyright |copy| 1994,1995,1996 Kevin Lentin + +This file documents the NCR53c400 extensions by Kevin Lentin and some +enhancements to the NCR5380 core. + +This driver supports NCR5380 and NCR53c400 and compatible cards in port or +memory mapped modes. + +Use of an interrupt is recommended, if supported by the board, as this will +allow targets to disconnect and thereby improve SCSI bus utilization. + +If the irq parameter is 254 or is omitted entirely, the driver will probe +for the correct IRQ line automatically. If the irq parameter is 0 or 255 +then no IRQ will be used. + +The NCR53c400 does not support DMA but it does have Pseudo-DMA which is +supported by the driver. + +This driver provides some information on what it has detected in +/proc/scsi/g_NCR5380/x where x is the scsi card number as detected at boot +time. More info to come in the future. + +This driver works as a module. +When included as a module, parameters can be passed on the insmod/modprobe +command line: + + ============= =============================================================== + irq=xx[,...] the interrupt(s) + base=xx[,...] the port or base address(es) (for port or memory mapped, resp.) + card=xx[,...] card type(s): + + == ====================================== + 0 NCR5380, + 1 NCR53C400, + 2 NCR53C400A, + 3 Domex Technology Corp 3181E (DTC3181E) + 4 Hewlett Packard C2502 + == ====================================== + ============= =============================================================== + +These old-style parameters can support only one card: + + ============= ================================================= + ncr_irq=xx the interrupt + ncr_addr=xx the port or base address (for port or memory + mapped, resp.) + ncr_5380=1 to set up for a NCR5380 board + ncr_53c400=1 to set up for a NCR53C400 board + ncr_53c400a=1 to set up for a NCR53C400A board + dtc_3181e=1 to set up for a Domex Technology Corp 3181E board + hp_c2502=1 to set up for a Hewlett Packard C2502 board + ============= ================================================= + +E.g. Trantor T130B in its default configuration:: + + modprobe g_NCR5380 irq=5 base=0x350 card=1 + +or alternatively, using the old syntax:: + + modprobe g_NCR5380 ncr_irq=5 ncr_addr=0x350 ncr_53c400=1 + +E.g. a port mapped NCR5380 board, driver to probe for IRQ:: + + modprobe g_NCR5380 base=0x350 card=0 + +or alternatively:: + + modprobe g_NCR5380 ncr_addr=0x350 ncr_5380=1 + +E.g. a memory mapped NCR53C400 board with no IRQ:: + + modprobe g_NCR5380 irq=255 base=0xc8000 card=1 + +or alternatively:: + + modprobe g_NCR5380 ncr_irq=255 ncr_addr=0xc8000 ncr_53c400=1 + +E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ +and HP C2502 at 0x300 with IRQ 7:: + + modprobe g_NCR5380 irq=0,7 base=0x240,0x300 card=3,4 + +Kevin Lentin +K.Lentin@cs.monash.edu.au diff --git a/Documentation/scsi/g_NCR5380.txt b/Documentation/scsi/g_NCR5380.txt deleted file mode 100644 index 37b1967a00a9..000000000000 --- a/Documentation/scsi/g_NCR5380.txt +++ /dev/null @@ -1,68 +0,0 @@ -README file for the Linux g_NCR5380 driver. - -(c) 1993 Drew Eckhard -NCR53c400 extensions (c) 1994,1995,1996 Kevin Lentin - -This file documents the NCR53c400 extensions by Kevin Lentin and some -enhancements to the NCR5380 core. - -This driver supports NCR5380 and NCR53c400 and compatible cards in port or -memory mapped modes. - -Use of an interrupt is recommended, if supported by the board, as this will -allow targets to disconnect and thereby improve SCSI bus utilization. - -If the irq parameter is 254 or is omitted entirely, the driver will probe -for the correct IRQ line automatically. If the irq parameter is 0 or 255 -then no IRQ will be used. - -The NCR53c400 does not support DMA but it does have Pseudo-DMA which is -supported by the driver. - -This driver provides some information on what it has detected in -/proc/scsi/g_NCR5380/x where x is the scsi card number as detected at boot -time. More info to come in the future. - -This driver works as a module. -When included as a module, parameters can be passed on the insmod/modprobe -command line: - irq=xx[,...] the interrupt(s) - base=xx[,...] the port or base address(es) (for port or memory mapped, resp.) - card=xx[,...] card type(s): - 0 = NCR5380, - 1 = NCR53C400, - 2 = NCR53C400A, - 3 = Domex Technology Corp 3181E (DTC3181E) - 4 = Hewlett Packard C2502 - -These old-style parameters can support only one card: - ncr_irq=xx the interrupt - ncr_addr=xx the port or base address (for port or memory - mapped, resp.) - ncr_5380=1 to set up for a NCR5380 board - ncr_53c400=1 to set up for a NCR53C400 board - ncr_53c400a=1 to set up for a NCR53C400A board - dtc_3181e=1 to set up for a Domex Technology Corp 3181E board - hp_c2502=1 to set up for a Hewlett Packard C2502 board - -E.g. Trantor T130B in its default configuration: -modprobe g_NCR5380 irq=5 base=0x350 card=1 -or alternatively, using the old syntax, -modprobe g_NCR5380 ncr_irq=5 ncr_addr=0x350 ncr_53c400=1 - -E.g. a port mapped NCR5380 board, driver to probe for IRQ: -modprobe g_NCR5380 base=0x350 card=0 -or alternatively, -modprobe g_NCR5380 ncr_addr=0x350 ncr_5380=1 - -E.g. a memory mapped NCR53C400 board with no IRQ: -modprobe g_NCR5380 irq=255 base=0xc8000 card=1 -or alternatively, -modprobe g_NCR5380 ncr_irq=255 ncr_addr=0xc8000 ncr_53c400=1 - -E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ -and HP C2502 at 0x300 with IRQ 7: -modprobe g_NCR5380 irq=0,7 base=0x240,0x300 card=3,4 - -Kevin Lentin -K.Lentin@cs.monash.edu.au diff --git a/Documentation/scsi/hpsa.txt b/Documentation/scsi/hpsa.rst index 891435a72fce..340e10c6e35f 100644 --- a/Documentation/scsi/hpsa.txt +++ b/Documentation/scsi/hpsa.rst @@ -1,6 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 +========================================= HPSA - Hewlett Packard Smart Array driver ------------------------------------------ +========================================= This file describes the hpsa SCSI driver for HP Smart Array controllers. The hpsa driver is intended to supplant the cciss driver for newer @@ -11,17 +13,17 @@ driver (for logical drives) AND a SCSI driver (for tape drives). This complexity and eliminating that complexity is one of the reasons for hpsa to exist. -Supported devices: ------------------- +Supported devices +================= -Smart Array P212 -Smart Array P410 -Smart Array P410i -Smart Array P411 -Smart Array P812 -Smart Array P712m -Smart Array P711m -StorageWorks P1210m +- Smart Array P212 +- Smart Array P410 +- Smart Array P410i +- Smart Array P411 +- Smart Array P812 +- Smart Array P712m +- Smart Array P711m +- StorageWorks P1210m Additionally, older Smart Arrays may work with the hpsa driver if the kernel boot parameter "hpsa_allow_any=1" is specified, however these are not tested @@ -35,18 +37,20 @@ mode, each command completion requires an interrupt, while with "performant mode command completions indicated by a single interrupt. HPSA specific entries in /sys ------------------------------ +============================= In addition to the generic SCSI attributes available in /sys, hpsa supports the following attributes: - HPSA specific host attributes: - ------------------------------ +HPSA specific host attributes +============================= + + :: - /sys/class/scsi_host/host*/rescan - /sys/class/scsi_host/host*/firmware_revision - /sys/class/scsi_host/host*/resettable - /sys/class/scsi_host/host*/transport_mode + /sys/class/scsi_host/host*/rescan + /sys/class/scsi_host/host*/firmware_revision + /sys/class/scsi_host/host*/resettable + /sys/class/scsi_host/host*/transport_mode the host "rescan" attribute is a write only attribute. Writing to this attribute will cause the driver to scan for new, changed, or removed devices @@ -58,7 +62,7 @@ HPSA specific entries in /sys tape drives, or entire storage boxes containing pre-configured logical drives. The "firmware_revision" attribute contains the firmware version of the Smart Array. - For example: + For example:: root@host:/sys/class/scsi_host/host4# cat firmware_revision 7.14 @@ -78,16 +82,18 @@ HPSA specific entries in /sys kexec tools to warn the user if they attempt to designate a device which is unable to honor the reset_devices kernel parameter as a dump device. - HPSA specific disk attributes: - ------------------------------ +HPSA specific disk attributes +----------------------------- + + :: - /sys/class/scsi_disk/c:b:t:l/device/unique_id - /sys/class/scsi_disk/c:b:t:l/device/raid_level - /sys/class/scsi_disk/c:b:t:l/device/lunid + /sys/class/scsi_disk/c:b:t:l/device/unique_id + /sys/class/scsi_disk/c:b:t:l/device/raid_level + /sys/class/scsi_disk/c:b:t:l/device/lunid (where c:b:t:l are the controller, bus, target and lun of the device) - For example: + For example:: root@host:/sys/class/scsi_disk/4:0:0:0/device# cat unique_id 600508B1001044395355323037570F77 @@ -96,35 +102,28 @@ HPSA specific entries in /sys root@host:/sys/class/scsi_disk/4:0:0:0/device# cat raid_level RAID 0 -HPSA specific ioctls: ---------------------- +HPSA specific ioctls +==================== For compatibility with applications written for the cciss driver, many, but not all of the ioctls supported by the cciss driver are also supported by the hpsa driver. The data structures used by these are described in include/linux/cciss_ioctl.h - CCISS_DEREGDISK - CCISS_REGNEWDISK - CCISS_REGNEWD - - The above three ioctls all do exactly the same thing, which is to cause the driver - to rescan for new devices. This does exactly the same thing as writing to the - hpsa specific host "rescan" attribute. + CCISS_DEREGDISK, CCISS_REGNEWDISK, CCISS_REGNEWD + The above three ioctls all do exactly the same thing, which is to cause the driver + to rescan for new devices. This does exactly the same thing as writing to the + hpsa specific host "rescan" attribute. CCISS_GETPCIINFO - Returns PCI domain, bus, device and function and "board ID" (PCI subsystem ID). CCISS_GETDRIVVER + Returns driver version in three bytes encoded as:: - Returns driver version in three bytes encoded as: (major_version << 16) | (minor_version << 8) | (subminor_version) - CCISS_PASSTHRU - CCISS_BIG_PASSTHRU - + CCISS_PASSTHRU, CCISS_BIG_PASSTHRU Allows "BMIC" and "CISS" commands to be passed through to the Smart Array. These are used extensively by the HP Array Configuration Utility, SNMP storage agents, etc. See cciss_vol_status at http://cciss.sf.net for some examples. - diff --git a/Documentation/scsi/hptiop.txt b/Documentation/scsi/hptiop.rst index 12ecfd308e55..23ae7ae36971 100644 --- a/Documentation/scsi/hptiop.txt +++ b/Documentation/scsi/hptiop.rst @@ -1,15 +1,25 @@ -HIGHPOINT ROCKETRAID 3xxx/4xxx ADAPTER DRIVER (hptiop) +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +====================================================== +Highpoint RocketRAID 3xxx/4xxx Adapter Driver (hptiop) +====================================================== Controller Register Map -------------------------- +----------------------- -For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2: +For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2 + ============== ================================== BAR0 offset Register + ============== ================================== 0x11C5C Link Interface IRQ Set 0x11C60 Link Interface IRQ Clear + ============== ================================== + ============== ================================== BAR2 offset Register + ============== ================================== 0x10 Inbound Message Register 0 0x14 Inbound Message Register 1 0x18 Outbound Message Register 0 @@ -21,10 +31,13 @@ For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 0x34 Outbound Interrupt Mask Register 0x40 Inbound Queue Port 0x44 Outbound Queue Port + ============== ================================== For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0: + ============== ================================== BAR0 offset Register + ============== ================================== 0x10 Inbound Message Register 0 0x14 Inbound Message Register 1 0x18 Outbound Message Register 0 @@ -36,16 +49,22 @@ For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0: 0x34 Outbound Interrupt Mask Register 0x40 Inbound Queue Port 0x44 Outbound Queue Port + ============== ================================== For Marvell not Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1: + ============== ================================== BAR0 offset Register + ============== ================================== 0x20400 Inbound Doorbell Register 0x20404 Inbound Interrupt Mask Register 0x20408 Outbound Doorbell Register 0x2040C Outbound Interrupt Mask Register + ============== ================================== + ============== ================================== BAR1 offset Register + ============== ================================== 0x0 Inbound Queue Head Pointer 0x4 Inbound Queue Tail Pointer 0x8 Outbound Queue Head Pointer @@ -53,14 +72,20 @@ For Marvell not Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BA 0x10 Inbound Message Register 0x14 Outbound Message Register 0x40-0x1040 Inbound Queue - 0x1040-0x2040 Outbound Queue + 0x1040-0x2040 Outbound Queue + ============== ================================== For Marvell Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1: + ============== ================================== BAR0 offset Register + ============== ================================== 0x0 IOP configuration information. + ============== ================================== + ============== =================================================== BAR1 offset Register + ============== =================================================== 0x4000 Inbound List Base Address Low 0x4004 Inbound List Base Address High 0x4018 Inbound List Write Pointer @@ -76,10 +101,11 @@ For Marvell Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1: 0x10420 CPU to PCIe Function 0 Message A 0x10480 CPU to PCIe Function 0 Doorbell 0x10484 CPU to PCIe Function 0 Doorbell Enable + ============== =================================================== I/O Request Workflow of Not Marvell Frey ------------------------------------------- +---------------------------------------- All queued requests are handled via inbound/outbound queue port. A request packet can be allocated in either IOP or host memory. @@ -124,7 +150,7 @@ of an inbound message. I/O Request Workflow of Marvell Frey --------------------------------------- +------------------------------------ All queued requests are handled via inbound/outbound list. @@ -167,13 +193,17 @@ User-level Interface The driver exposes following sysfs attributes: + ================== === ======================== NAME R/W Description + ================== === ======================== driver-version R driver version string firmware-version R firmware version string + ================== === ======================== ----------------------------------------------------------------------------- -Copyright (C) 2006-2012 HighPoint Technologies, Inc. All Rights Reserved. + +Copyright |copy| 2006-2012 HighPoint Technologies, Inc. All Rights Reserved. This file is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -181,4 +211,5 @@ Copyright (C) 2006-2012 HighPoint Technologies, Inc. All Rights Reserved. GNU General Public License for more details. linux@highpoint-tech.com + http://www.highpoint-tech.com diff --git a/Documentation/scsi/index.rst b/Documentation/scsi/index.rst new file mode 100644 index 000000000000..7c5f5f8f614e --- /dev/null +++ b/Documentation/scsi/index.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Linux SCSI Subsystem +==================== + +.. toctree:: + :maxdepth: 1 + + 53c700 + aacraid + advansys + aha152x + aic79xx + aic7xxx + arcmsr_spec + bfa + bnx2fc + BusLogic + cxgb3i + dc395x + dpti + FlashPoint + g_NCR5380 + hpsa + hptiop + libsas + link_power_management_policy + lpfc + megaraid + ncr53c8xx + NinjaSCSI + ppa + qlogicfas + scsi-changer + scsi_eh + scsi_fc_transport + scsi-generic + scsi_mid_low_api + scsi-parameters + scsi + sd-parameters + smartpqi + st + sym53c500_cs + sym53c8xx_2 + tcm_qla2xxx + ufs + wd719x + + scsi_transport_srp/figures diff --git a/Documentation/scsi/libsas.txt b/Documentation/scsi/libsas.rst index 8cac6492aade..7216b5d25800 100644 --- a/Documentation/scsi/libsas.txt +++ b/Documentation/scsi/libsas.rst @@ -1,5 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========= SAS Layer ---------- +========= The SAS Layer is a management infrastructure which manages SAS LLDDs. It sits between SCSI Core and SAS LLDDs. The @@ -37,16 +40,21 @@ It will then return. Then you enable your phys to actually start OOB (at which point your driver will start calling the notify_* event callbacks). -Structure descriptions: +Structure descriptions +====================== + +``struct sas_phy`` +------------------ -struct sas_phy -------------------- Normally this is statically embedded to your driver's -phy structure: - struct my_phy { - blah; - struct sas_phy sas_phy; - bleh; - }; +phy structure:: + + struct my_phy { + blah; + struct sas_phy sas_phy; + bleh; + }; + And then all the phys are an array of my_phy in your HA struct (shown below). @@ -63,94 +71,122 @@ There is a scheme where the LLDD can RW certain fields, and the SAS layer can only read such ones, and vice versa. The idea is to avoid unnecessary locking. -enabled -- must be set (0/1) -id -- must be set [0,MAX_PHYS) -class, proto, type, role, oob_mode, linkrate -- must be set -oob_mode -- you set this when OOB has finished and then notify -the SAS Layer. - -sas_addr -- this normally points to an array holding the sas -address of the phy, possibly somewhere in your my_phy -struct. - -attached_sas_addr -- set this when you (LLDD) receive an -IDENTIFY frame or a FIS frame, _before_ notifying the SAS -layer. The idea is that sometimes the LLDD may want to fake -or provide a different SAS address on that phy/port and this -allows it to do this. At best you should copy the sas -address from the IDENTIFY frame or maybe generate a SAS -address for SATA directly attached devices. The Discover -process may later change this. - -frame_rcvd -- this is where you copy the IDENTIFY/FIS frame -when you get it; you lock, copy, set frame_rcvd_size and -unlock the lock, and then call the event. It is a pointer -since there's no way to know your hw frame size _exactly_, -so you define the actual array in your phy struct and let -this pointer point to it. You copy the frame from your -DMAable memory to that area holding the lock. - -sas_prim -- this is where primitives go when they're -received. See sas.h. Grab the lock, set the primitive, -release the lock, notify. - -port -- this points to the sas_port if the phy belongs -to a port -- the LLDD only reads this. It points to the -sas_port this phy is part of. Set by the SAS Layer. - -ha -- may be set; the SAS layer sets it anyway. - -lldd_phy -- you should set this to point to your phy so you -can find your way around faster when the SAS layer calls one -of your callbacks and passes you a phy. If the sas_phy is -embedded you can also use container_of -- whatever you -prefer. - - -struct sas_port -------------------- +enabled + - must be set (0/1) + +id + - must be set [0,MAX_PHYS)] + +class, proto, type, role, oob_mode, linkrate + - must be set + +oob_mode + - you set this when OOB has finished and then notify + the SAS Layer. + +sas_addr + - this normally points to an array holding the sas + address of the phy, possibly somewhere in your my_phy + struct. + +attached_sas_addr + - set this when you (LLDD) receive an + IDENTIFY frame or a FIS frame, _before_ notifying the SAS + layer. The idea is that sometimes the LLDD may want to fake + or provide a different SAS address on that phy/port and this + allows it to do this. At best you should copy the sas + address from the IDENTIFY frame or maybe generate a SAS + address for SATA directly attached devices. The Discover + process may later change this. + +frame_rcvd + - this is where you copy the IDENTIFY/FIS frame + when you get it; you lock, copy, set frame_rcvd_size and + unlock the lock, and then call the event. It is a pointer + since there's no way to know your hw frame size _exactly_, + so you define the actual array in your phy struct and let + this pointer point to it. You copy the frame from your + DMAable memory to that area holding the lock. + +sas_prim + - this is where primitives go when they're + received. See sas.h. Grab the lock, set the primitive, + release the lock, notify. + +port + - this points to the sas_port if the phy belongs + to a port -- the LLDD only reads this. It points to the + sas_port this phy is part of. Set by the SAS Layer. + +ha + - may be set; the SAS layer sets it anyway. + +lldd_phy + - you should set this to point to your phy so you + can find your way around faster when the SAS layer calls one + of your callbacks and passes you a phy. If the sas_phy is + embedded you can also use container_of -- whatever you + prefer. + + +``struct sas_port`` +------------------- + The LLDD doesn't set any fields of this struct -- it only reads them. They should be self explanatory. phy_mask is 32 bit, this should be enough for now, as I haven't heard of a HA having more than 8 phys. -lldd_port -- I haven't found use for that -- maybe other -LLDD who wish to have internal port representation can make -use of this. +lldd_port + - I haven't found use for that -- maybe other + LLDD who wish to have internal port representation can make + use of this. +``struct sas_ha_struct`` +------------------------ -struct sas_ha_struct -------------------- It normally is statically declared in your own LLDD -structure describing your adapter: -struct my_sas_ha { - blah; - struct sas_ha_struct sas_ha; - struct my_phy phys[MAX_PHYS]; - struct sas_port sas_ports[MAX_PHYS]; /* (1) */ - bleh; -}; +structure describing your adapter:: + + struct my_sas_ha { + blah; + struct sas_ha_struct sas_ha; + struct my_phy phys[MAX_PHYS]; + struct sas_port sas_ports[MAX_PHYS]; /* (1) */ + bleh; + }; -(1) If your LLDD doesn't have its own port representation. + (1) If your LLDD doesn't have its own port representation. What needs to be initialized (sample function given below). pcidev -sas_addr -- since the SAS layer doesn't want to mess with +^^^^^^ + +sas_addr + - since the SAS layer doesn't want to mess with memory allocation, etc, this points to statically allocated array somewhere (say in your host adapter structure) and holds the SAS address of the host adapter as given by you or the manufacturer, etc. + sas_port -sas_phy -- an array of pointers to structures. (see +^^^^^^^^ + +sas_phy + - an array of pointers to structures. (see note above on sas_addr). These must be set. See more notes below. -num_phys -- the number of phys present in the sas_phy array, + +num_phys + - the number of phys present in the sas_phy array, and the number of ports present in the sas_port array. There can be a maximum num_phys ports (one per port) so we drop the num_ports, and only use num_phys. -The event interface: +The event interface:: /* LLDD calls these to notify the class of an event. */ void (*notify_ha_event)(struct sas_ha_struct *, enum ha_event); @@ -161,7 +197,7 @@ When sas_register_ha() returns, those are set and can be called by the LLDD to notify the SAS layer of such events the SAS layer. -The port notification: +The port notification:: /* The class calls these to notify the LLDD of an event. */ void (*lldd_port_formed)(struct sas_phy *); @@ -171,7 +207,7 @@ If the LLDD wants notification when a port has been formed or deformed it sets those to a function satisfying the type. A SAS LLDD should also implement at least one of the Task -Management Functions (TMFs) described in SAM: +Management Functions (TMFs) described in SAM:: /* Task Management Functions. Must be called from process context. */ int (*lldd_abort_task)(struct sas_task *); @@ -184,7 +220,7 @@ Management Functions (TMFs) described in SAM: For more information please read SAM from T10.org. -Port and Adapter management: +Port and Adapter management:: /* Port and Adapter management */ int (*lldd_clear_nexus_port)(struct sas_port *); @@ -192,75 +228,78 @@ Port and Adapter management: A SAS LLDD should implement at least one of those. -Phy management: +Phy management:: /* Phy management */ int (*lldd_control_phy)(struct sas_phy *, enum phy_func); -lldd_ha -- set this to point to your HA struct. You can also -use container_of if you embedded it as shown above. +lldd_ha + - set this to point to your HA struct. You can also + use container_of if you embedded it as shown above. A sample initialization and registration function can look like this (called last thing from probe()) -*but* before you enable the phys to do OOB: +*but* before you enable the phys to do OOB:: -static int register_sas_ha(struct my_sas_ha *my_ha) -{ - int i; - static struct sas_phy *sas_phys[MAX_PHYS]; - static struct sas_port *sas_ports[MAX_PHYS]; + static int register_sas_ha(struct my_sas_ha *my_ha) + { + int i; + static struct sas_phy *sas_phys[MAX_PHYS]; + static struct sas_port *sas_ports[MAX_PHYS]; - my_ha->sas_ha.sas_addr = &my_ha->sas_addr[0]; + my_ha->sas_ha.sas_addr = &my_ha->sas_addr[0]; - for (i = 0; i < MAX_PHYS; i++) { - sas_phys[i] = &my_ha->phys[i].sas_phy; - sas_ports[i] = &my_ha->sas_ports[i]; - } + for (i = 0; i < MAX_PHYS; i++) { + sas_phys[i] = &my_ha->phys[i].sas_phy; + sas_ports[i] = &my_ha->sas_ports[i]; + } - my_ha->sas_ha.sas_phy = sas_phys; - my_ha->sas_ha.sas_port = sas_ports; - my_ha->sas_ha.num_phys = MAX_PHYS; + my_ha->sas_ha.sas_phy = sas_phys; + my_ha->sas_ha.sas_port = sas_ports; + my_ha->sas_ha.num_phys = MAX_PHYS; - my_ha->sas_ha.lldd_port_formed = my_port_formed; + my_ha->sas_ha.lldd_port_formed = my_port_formed; - my_ha->sas_ha.lldd_dev_found = my_dev_found; - my_ha->sas_ha.lldd_dev_gone = my_dev_gone; + my_ha->sas_ha.lldd_dev_found = my_dev_found; + my_ha->sas_ha.lldd_dev_gone = my_dev_gone; - my_ha->sas_ha.lldd_execute_task = my_execute_task; + my_ha->sas_ha.lldd_execute_task = my_execute_task; - my_ha->sas_ha.lldd_abort_task = my_abort_task; - my_ha->sas_ha.lldd_abort_task_set = my_abort_task_set; - my_ha->sas_ha.lldd_clear_aca = my_clear_aca; - my_ha->sas_ha.lldd_clear_task_set = my_clear_task_set; - my_ha->sas_ha.lldd_I_T_nexus_reset= NULL; (2) - my_ha->sas_ha.lldd_lu_reset = my_lu_reset; - my_ha->sas_ha.lldd_query_task = my_query_task; + my_ha->sas_ha.lldd_abort_task = my_abort_task; + my_ha->sas_ha.lldd_abort_task_set = my_abort_task_set; + my_ha->sas_ha.lldd_clear_aca = my_clear_aca; + my_ha->sas_ha.lldd_clear_task_set = my_clear_task_set; + my_ha->sas_ha.lldd_I_T_nexus_reset= NULL; (2) + my_ha->sas_ha.lldd_lu_reset = my_lu_reset; + my_ha->sas_ha.lldd_query_task = my_query_task; - my_ha->sas_ha.lldd_clear_nexus_port = my_clear_nexus_port; - my_ha->sas_ha.lldd_clear_nexus_ha = my_clear_nexus_ha; + my_ha->sas_ha.lldd_clear_nexus_port = my_clear_nexus_port; + my_ha->sas_ha.lldd_clear_nexus_ha = my_clear_nexus_ha; - my_ha->sas_ha.lldd_control_phy = my_control_phy; + my_ha->sas_ha.lldd_control_phy = my_control_phy; - return sas_register_ha(&my_ha->sas_ha); -} + return sas_register_ha(&my_ha->sas_ha); + } (2) SAS 1.1 does not define I_T Nexus Reset TMF. Events ------- +====== -Events are _the only way_ a SAS LLDD notifies the SAS layer +Events are **the only way** a SAS LLDD notifies the SAS layer of anything. There is no other method or way a LLDD to tell the SAS layer of anything happening internally or in the SAS domain. -Phy events: +Phy events:: + PHYE_LOSS_OF_SIGNAL, (C) PHYE_OOB_DONE, PHYE_OOB_ERROR, (C) PHYE_SPINUP_HOLD. -Port events, passed on a _phy_: +Port events, passed on a _phy_:: + PORTE_BYTES_DMAED, (M) PORTE_BROADCAST_RCVD, (E) PORTE_LINK_RESET_ERR, (C) @@ -271,6 +310,7 @@ Host Adapter event: HAE_RESET A SAS LLDD should be able to generate + - at least one event from group C (choice), - events marked M (mandatory) are mandatory (only one), - events marked E (expander) if it wants the SAS layer @@ -279,26 +319,42 @@ A SAS LLDD should be able to generate Meaning: -HAE_RESET -- when your HA got internal error and was reset. +HAE_RESET + - when your HA got internal error and was reset. + +PORTE_BYTES_DMAED + - on receiving an IDENTIFY/FIS frame + +PORTE_BROADCAST_RCVD + - on receiving a primitive + +PORTE_LINK_RESET_ERR + - timer expired, loss of signal, loss of DWS, etc. [1]_ -PORTE_BYTES_DMAED -- on receiving an IDENTIFY/FIS frame -PORTE_BROADCAST_RCVD -- on receiving a primitive -PORTE_LINK_RESET_ERR -- timer expired, loss of signal, loss -of DWS, etc. (*) -PORTE_TIMER_EVENT -- DWS reset timeout timer expired (*) -PORTE_HARD_RESET -- Hard Reset primitive received. +PORTE_TIMER_EVENT + - DWS reset timeout timer expired [1]_ -PHYE_LOSS_OF_SIGNAL -- the device is gone (*) -PHYE_OOB_DONE -- OOB went fine and oob_mode is valid -PHYE_OOB_ERROR -- Error while doing OOB, the device probably -got disconnected. (*) -PHYE_SPINUP_HOLD -- SATA is present, COMWAKE not sent. +PORTE_HARD_RESET + - Hard Reset primitive received. -(*) should set/clear the appropriate fields in the phy, - or alternatively call the inlined sas_phy_disconnected() - which is just a helper, from their tasklet. +PHYE_LOSS_OF_SIGNAL + - the device is gone [1]_ -The Execute Command SCSI RPC: +PHYE_OOB_DONE + - OOB went fine and oob_mode is valid + +PHYE_OOB_ERROR + - Error while doing OOB, the device probably + got disconnected. [1]_ + +PHYE_SPINUP_HOLD + - SATA is present, COMWAKE not sent. + +.. [1] should set/clear the appropriate fields in the phy, + or alternatively call the inlined sas_phy_disconnected() + which is just a helper, from their tasklet. + +The Execute Command SCSI RPC:: int (*lldd_execute_task)(struct sas_task *, gfp_t gfp_flags); @@ -311,23 +367,28 @@ That is, when lldd_execute_task() is called, the command go out on the transport *immediately*. There is *no* queuing of any sort and at any level in a SAS LLDD. -Returns: -SAS_QUEUE_FULL, -ENOMEM, nothing was queued; - 0, the task(s) were queued. +Returns: -struct sas_task { - dev -- the device this task is destined to - task_proto -- _one_ of enum sas_proto - scatter -- pointer to scatter gather list array - num_scatter -- number of elements in scatter - total_xfer_len -- total number of bytes expected to be transferred - data_dir -- PCI_DMA_... - task_done -- callback when the task has finished execution -}; + * -SAS_QUEUE_FULL, -ENOMEM, nothing was queued; + * 0, the task(s) were queued. -DISCOVERY ---------- +:: + + struct sas_task { + dev -- the device this task is destined to + task_proto -- _one_ of enum sas_proto + scatter -- pointer to scatter gather list array + num_scatter -- number of elements in scatter + total_xfer_len -- total number of bytes expected to be transferred + data_dir -- PCI_DMA_... + task_done -- callback when the task has finished execution + }; + +Discovery +========= The sysfs tree has the following purposes: + a) It shows you the physical layout of the SAS domain at the current time, i.e. how the domain looks in the physical world right now. @@ -336,6 +397,7 @@ The sysfs tree has the following purposes: This is a link to the tree(1) program, very useful in viewing the SAS domain: ftp://mama.indstate.edu/linux/tree/ + I expect user space applications to actually create a graphical interface of this. @@ -359,7 +421,7 @@ contents of the domain_device structure, but it never creates or destroys one. Expander management from User Space ------------------------------------ +=================================== In each expander directory in sysfs, there is a file called "smp_portal". It is a binary sysfs attribute file, which @@ -371,15 +433,23 @@ Functionality is deceptively simple: 1. Build the SMP frame you want to send. The format and layout is described in the SAS spec. Leave the CRC field equal 0. + open(2) + 2. Open the expander's SMP portal sysfs file in RW mode. + write(2) + 3. Write the frame you built in 1. + read(2) + 4. Read the amount of data you expect to receive for the frame you built. If you receive different amount of data you expected to receive, then there was some kind of error. + close(2) + All this process is shown in detail in the function do_smp_func() and its callers, in the file "expander_conf.c". diff --git a/Documentation/scsi/link_power_management_policy.txt b/Documentation/scsi/link_power_management_policy.rst index d18993d01884..64288dcf10f6 100644 --- a/Documentation/scsi/link_power_management_policy.txt +++ b/Documentation/scsi/link_power_management_policy.rst @@ -1,8 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================== +Link Power Managent Policy +========================== + This parameter allows the user to set the link (interface) power management. There are 3 possible options: +===================== ===================================================== Value Effect ----------------------------------------------------------------------------- +===================== ===================================================== min_power Tell the controller to try to make the link use the least possible power when possible. This may sacrifice some performance due to increased latency @@ -15,5 +22,4 @@ max_performance Generally, this means no power management. Tell medium_power Tell the controller to enter a lower power state when possible, but do not enter the lowest power state, thus improving latency over min_power setting. - - +===================== ===================================================== diff --git a/Documentation/scsi/lpfc.txt b/Documentation/scsi/lpfc.rst index 5741ea8aa88a..6e217e82b9b9 100644 --- a/Documentation/scsi/lpfc.txt +++ b/Documentation/scsi/lpfc.rst @@ -1,10 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 -LPFC Driver Release Notes: +========================= +LPFC Driver Release Notes +========================= -============================================================================= - - IMPORTANT: +.. important:: Starting in the 8.0.17 release, the driver began to be targeted strictly toward the upstream kernel. As such, we removed #ifdefs for older kernels @@ -22,9 +23,6 @@ LPFC Driver Release Notes: Please heed these dependencies.... - ******************************************************************** - - The following information is provided for additional background on the history of the driver as we push for upstream acceptance. @@ -64,6 +62,7 @@ Cable pull and temporary device Loss: Kernel Support +============== This source package is targeted for the upstream kernel only. (See notes at the top of this file). It relies on interfaces that are slowing @@ -77,7 +76,6 @@ Kernel Support Patches +======= Thankfully, at this time, patches are not needed. - - diff --git a/Documentation/scsi/megaraid.txt b/Documentation/scsi/megaraid.rst index 3c7cea51e687..22b75a86ba72 100644 --- a/Documentation/scsi/megaraid.txt +++ b/Documentation/scsi/megaraid.rst @@ -1,7 +1,10 @@ - Notes on Management Module - ~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. SPDX-License-Identifier: GPL-2.0 -Overview: +========================== +Notes on Management Module +========================== + +Overview -------- Different classes of controllers from LSI Logic accept and respond to the @@ -25,28 +28,32 @@ ioctl commands. But this module is envisioned to handle all user space level interactions. So any 'proc', 'sysfs' implementations will be localized in this common module. -Credits: +Credits ------- -"Shared code in a third module, a "library module", is an acceptable -solution. modprobe automatically loads dependent modules, so users -running "modprobe driver1" or "modprobe driver2" would automatically -load the shared library module." +:: + + "Shared code in a third module, a "library module", is an acceptable + solution. modprobe automatically loads dependent modules, so users + running "modprobe driver1" or "modprobe driver2" would automatically + load the shared library module." + +- Jeff Garzik (jgarzik@pobox.com), 02.25.2004 LKML - - Jeff Garzik (jgarzik@pobox.com), 02.25.2004 LKML +:: -"As Jeff hinted, if your userspace<->driver API is consistent between -your new MPT-based RAID controllers and your existing megaraid driver, -then perhaps you need a single small helper module (lsiioctl or some -better name), loaded by both mptraid and megaraid automatically, which -handles registering the /dev/megaraid node dynamically. In this case, -both mptraid and megaraid would register with lsiioctl for each -adapter discovered, and lsiioctl would essentially be a switch, -redirecting userspace tool ioctls to the appropriate driver." + "As Jeff hinted, if your userspace<->driver API is consistent between + your new MPT-based RAID controllers and your existing megaraid driver, + then perhaps you need a single small helper module (lsiioctl or some + better name), loaded by both mptraid and megaraid automatically, which + handles registering the /dev/megaraid node dynamically. In this case, + both mptraid and megaraid would register with lsiioctl for each + adapter discovered, and lsiioctl would essentially be a switch, + redirecting userspace tool ioctls to the appropriate driver." - - Matt Domsch, (Matt_Domsch@dell.com), 02.25.2004 LKML +- Matt Domsch, (Matt_Domsch@dell.com), 02.25.2004 LKML -Design: +Design ------ The Common Management Module is implemented in megaraid_mm.[ch] files. This @@ -61,7 +68,7 @@ uioc_t. The management module converts the older ioctl packets from the older applications into uioc_t. After driver handles the uioc_t, the common module will convert that back into the old format before returning to applications. -As new applications evolve and replace the old ones, the old packet format +As new applications evolve and replace the old ones, the old packet format will be retired. Common module dedicates one uioc_t packet to each controller registered. This diff --git a/Documentation/scsi/ncr53c8xx.txt b/Documentation/scsi/ncr53c8xx.rst index 8586efff1e99..c41cec99f07c 100644 --- a/Documentation/scsi/ncr53c8xx.txt +++ b/Documentation/scsi/ncr53c8xx.rst @@ -1,106 +1,114 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================================= The Linux NCR53C8XX/SYM53C8XX drivers README file +================================================= Written by Gerard Roudier <groudier@free.fr> + 21 Rue Carnot + 95170 DEUIL LA BARRE - FRANCE 29 May 1999 -=============================================================================== - -1. Introduction -2. Supported chips and SCSI features -3. Advantages of the enhanced 896 driver - 3.1 Optimized SCSI SCRIPTS - 3.2 New features of the SYM53C896 (64 bit PCI dual LVD SCSI controller) -4. Memory mapped I/O versus normal I/O -5. Tagged command queueing -6. Parity checking -7. Profiling information -8. Control commands - 8.1 Set minimum synchronous period - 8.2 Set wide size - 8.3 Set maximum number of concurrent tagged commands - 8.4 Set order type for tagged command - 8.5 Set debug mode - 8.6 Clear profile counters - 8.7 Set flag (no_disc) - 8.8 Set verbose level - 8.9 Reset all logical units of a target - 8.10 Abort all tasks of all logical units of a target -9. Configuration parameters -10. Boot setup commands - 10.1 Syntax - 10.2 Available arguments - 10.2.1 Master parity checking - 10.2.2 Scsi parity checking - 10.2.3 Scsi disconnections - 10.2.4 Special features - 10.2.5 Ultra SCSI support - 10.2.6 Default number of tagged commands - 10.2.7 Default synchronous period factor - 10.2.8 Negotiate synchronous with all devices - 10.2.9 Verbosity level - 10.2.10 Debug mode - 10.2.11 Burst max - 10.2.12 LED support - 10.2.13 Max wide - 10.2.14 Differential mode - 10.2.15 IRQ mode - 10.2.16 Reverse probe - 10.2.17 Fix up PCI configuration space - 10.2.18 Serial NVRAM - 10.2.19 Check SCSI BUS - 10.2.20 Exclude a host from being attached - 10.2.21 Suggest a default SCSI id for hosts - 10.2.22 Enable use of IMMEDIATE ARBITRATION - 10.3 Advised boot setup commands - 10.4 PCI configuration fix-up boot option - 10.5 Serial NVRAM support boot option - 10.6 SCSI BUS checking boot option - 10.7 IMMEDIATE ARBITRATION boot option -11. Some constants and flags of the ncr53c8xx.h header file -12. Installation -13. Architecture dependent features -14. Known problems - 14.1 Tagged commands with Iomega Jaz device - 14.2 Device names change when another controller is added - 14.3 Using only 8 bit devices with a WIDE SCSI controller. - 14.4 Possible data corruption during a Memory Write and Invalidate - 14.5 IRQ sharing problems -15. SCSI problem troubleshooting - 15.1 Problem tracking - 15.2 Understanding hardware error reports -16. Synchronous transfer negotiation tables - 16.1 Synchronous timings for 53C875 and 53C860 Ultra-SCSI controllers - 16.2 Synchronous timings for fast SCSI-2 53C8XX controllers -17. Serial NVRAM support (by Richard Waltham) - 17.1 Features - 17.2 Symbios NVRAM layout - 17.3 Tekram NVRAM layout -18. Support for Big Endian - 18.1 Big Endian CPU - 18.2 NCR chip in Big Endian mode of operations -=============================================================================== +.. Contents: + + 1. Introduction + 2. Supported chips and SCSI features + 3. Advantages of the enhanced 896 driver + 3.1 Optimized SCSI SCRIPTS + 3.2 New features of the SYM53C896 (64 bit PCI dual LVD SCSI controller) + 4. Memory mapped I/O versus normal I/O + 5. Tagged command queueing + 6. Parity checking + 7. Profiling information + 8. Control commands + 8.1 Set minimum synchronous period + 8.2 Set wide size + 8.3 Set maximum number of concurrent tagged commands + 8.4 Set order type for tagged command + 8.5 Set debug mode + 8.6 Clear profile counters + 8.7 Set flag (no_disc) + 8.8 Set verbose level + 8.9 Reset all logical units of a target + 8.10 Abort all tasks of all logical units of a target + 9. Configuration parameters + 10. Boot setup commands + 10.1 Syntax + 10.2 Available arguments + 10.2.1 Master parity checking + 10.2.2 Scsi parity checking + 10.2.3 Scsi disconnections + 10.2.4 Special features + 10.2.5 Ultra SCSI support + 10.2.6 Default number of tagged commands + 10.2.7 Default synchronous period factor + 10.2.8 Negotiate synchronous with all devices + 10.2.9 Verbosity level + 10.2.10 Debug mode + 10.2.11 Burst max + 10.2.12 LED support + 10.2.13 Max wide + 10.2.14 Differential mode + 10.2.15 IRQ mode + 10.2.16 Reverse probe + 10.2.17 Fix up PCI configuration space + 10.2.18 Serial NVRAM + 10.2.19 Check SCSI BUS + 10.2.20 Exclude a host from being attached + 10.2.21 Suggest a default SCSI id for hosts + 10.2.22 Enable use of IMMEDIATE ARBITRATION + 10.3 Advised boot setup commands + 10.4 PCI configuration fix-up boot option + 10.5 Serial NVRAM support boot option + 10.6 SCSI BUS checking boot option + 10.7 IMMEDIATE ARBITRATION boot option + 11. Some constants and flags of the ncr53c8xx.h header file + 12. Installation + 13. Architecture dependent features + 14. Known problems + 14.1 Tagged commands with Iomega Jaz device + 14.2 Device names change when another controller is added + 14.3 Using only 8 bit devices with a WIDE SCSI controller. + 14.4 Possible data corruption during a Memory Write and Invalidate + 14.5 IRQ sharing problems + 15. SCSI problem troubleshooting + 15.1 Problem tracking + 15.2 Understanding hardware error reports + 16. Synchronous transfer negotiation tables + 16.1 Synchronous timings for 53C875 and 53C860 Ultra-SCSI controllers + 16.2 Synchronous timings for fast SCSI-2 53C8XX controllers + 17. Serial NVRAM support (by Richard Waltham) + 17.1 Features + 17.2 Symbios NVRAM layout + 17.3 Tekram NVRAM layout + 18. Support for Big Endian + 18.1 Big Endian CPU + 18.2 NCR chip in Big Endian mode of operations 1. Introduction +=============== -The initial Linux ncr53c8xx driver has been a port of the ncr driver from +The initial Linux ncr53c8xx driver has been a port of the ncr driver from FreeBSD that has been achieved in November 1995 by: - Gerard Roudier <groudier@free.fr> + + - Gerard Roudier <groudier@free.fr> The original driver has been written for 386bsd and FreeBSD by: - Wolfgang Stanglmeier <wolf@cologne.de> - Stefan Esser <se@mi.Uni-Koeln.de> + + - Wolfgang Stanglmeier <wolf@cologne.de> + - Stefan Esser <se@mi.Uni-Koeln.de> It is now available as a bundle of 2 drivers: -- ncr53c8xx generic driver that supports all the SYM53C8XX family including +- ncr53c8xx generic driver that supports all the SYM53C8XX family including the earliest 810 rev. 1, the latest 896 (2 channel LVD SCSI controller) and the new 895A (1 channel LVD SCSI controller). -- sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest - chips in order to gain advantage of new features, as LOAD/STORE instructions - available since the 810A and hardware phase mismatch available with the +- sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest + chips in order to gain advantage of new features, as LOAD/STORE instructions + available since the 810A and hardware phase mismatch available with the 896 and the 895A. You can find technical information about the NCR 8xx family in the @@ -109,119 +117,145 @@ Drew Eckhardt. Information about new chips is available at LSILOGIC web server: - http://www.lsilogic.com/ + - http://www.lsilogic.com/ SCSI standard documentations are available at SYMBIOS ftp server: - ftp://ftp.symbios.com/ + - ftp://ftp.symbios.com/ Useful SCSI tools written by Eric Youngdale are available at tsx-11: - ftp://tsx-11.mit.edu/pub/linux/ALPHA/scsi/scsiinfo-X.Y.tar.gz - ftp://tsx-11.mit.edu/pub/linux/ALPHA/scsi/scsidev-X.Y.tar.gz + - ftp://tsx-11.mit.edu/pub/linux/ALPHA/scsi/scsiinfo-X.Y.tar.gz + - ftp://tsx-11.mit.edu/pub/linux/ALPHA/scsi/scsidev-X.Y.tar.gz These tools are not ALPHA but quite clean and work quite well. It is essential you have the 'scsiinfo' package. This short documentation describes the features of the generic and enhanced -drivers, configuration parameters and control commands available through +drivers, configuration parameters and control commands available through the proc SCSI file system read / write operations. This driver has been tested OK with linux/i386, Linux/Alpha and Linux/PPC. Latest driver version and patches are available at: - ftp://ftp.tux.org/pub/people/gerard-roudier + - ftp://ftp.tux.org/pub/people/gerard-roudier + or - ftp://ftp.symbios.com/mirror/ftp.tux.org/pub/tux/roudier/drivers + + - ftp://ftp.symbios.com/mirror/ftp.tux.org/pub/tux/roudier/drivers I am not a native speaker of English and there are probably lots of mistakes in this README file. Any help will be welcome. 2. Supported chips and SCSI features +==================================== The following features are supported for all chips: - Synchronous negotiation - Disconnection - Tagged command queuing - SCSI parity checking - Master parity checking + - Synchronous negotiation + - Disconnection + - Tagged command queuing + - SCSI parity checking + - Master parity checking "Wide negotiation" is supported for chips that allow it. The -following table shows some characteristics of NCR 8xx family chips +following table shows some characteristics of NCR 8xx family chips and what drivers support them. - Supported by Supported by - On board the generic the enhanced -Chip SDMS BIOS Wide SCSI std. Max. sync driver driver ----- --------- ---- --------- ---------- ------------ ------------- -810 N N FAST10 10 MB/s Y N -810A N N FAST10 10 MB/s Y Y -815 Y N FAST10 10 MB/s Y N -825 Y Y FAST10 20 MB/s Y N -825A Y Y FAST10 20 MB/s Y Y -860 N N FAST20 20 MB/s Y Y -875 Y Y FAST20 40 MB/s Y Y -876 Y Y FAST20 40 MB/s Y Y -895 Y Y FAST40 80 MB/s Y Y -895A Y Y FAST40 80 MB/s Y Y -896 Y Y FAST40 80 MB/s Y Y -897 Y Y FAST40 80 MB/s Y Y -1510D Y Y FAST40 80 MB/s Y Y -1010 Y Y FAST80 160 MB/s N Y -1010_66* Y Y FAST80 160 MB/s N Y - -* Chip supports 33MHz and 66MHz PCI buses. ++--------+-----------+-----+-----------+------------+------------+------------+ +| | | | | |Supported by|Supported by| +| |On board | | | |the generic |the enhanced| +|Chip |SDMS BIOS |Wide |SCSI std. | Max. sync |driver |driver | ++--------+-----------+-----+-----------+------------+------------+------------+ +|810 | N | N | FAST10 | 10 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+------------+ +|810A | N | N | FAST10 | 10 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|815 | Y | N | FAST10 | 10 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+------------+ +|825 | Y | Y | FAST10 | 20 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+------------+ +|825A | Y | Y | FAST10 | 20 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|860 | N | N | FAST20 | 20 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|875 | Y | Y | FAST20 | 40 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|876 | Y | Y | FAST20 | 40 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|895 | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|895A | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|896 | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|897 | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|1510D | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|1010 | Y | Y | FAST80 |160 MB/s | N | Y | ++--------+-----------+-----+-----------+------------+------------+------------+ +|1010_66 | Y | Y | FAST80 |160 MB/s | N | Y | +|[1]_ | | | | | | | ++--------+-----------+-----+-----------+------------+------------+------------+ + +.. [1] Chip supports 33MHz and 66MHz PCI buses. Summary of other supported features: -Module: allow to load the driver -Memory mapped I/O: increases performance -Profiling information: read operations from the proc SCSI file system -Control commands: write operations to the proc SCSI file system -Debugging information: written to syslog (expert only) -Scatter / gather -Shared interrupt -Boot setup commands -Serial NVRAM: Symbios and Tekram formats +:Module: allow to load the driver +:Memory mapped I/O: increases performance +:Profiling information: read operations from the proc SCSI file system +:Control commands: write operations to the proc SCSI file system +:Debugging information: written to syslog (expert only) +:Serial NVRAM: Symbios and Tekram formats + +- Scatter / gather +- Shared interrupt +- Boot setup commands 3. Advantages of the enhanced 896 driver +======================================== -3.1 Optimized SCSI SCRIPTS. +3.1 Optimized SCSI SCRIPTS +-------------------------- -The 810A, 825A, 875, 895, 896 and 895A support new SCSI SCRIPTS instructions -named LOAD and STORE that allow to move up to 1 DWORD from/to an IO register -to/from memory much faster that the MOVE MEMORY instruction that is supported +The 810A, 825A, 875, 895, 896 and 895A support new SCSI SCRIPTS instructions +named LOAD and STORE that allow to move up to 1 DWORD from/to an IO register +to/from memory much faster that the MOVE MEMORY instruction that is supported by the 53c7xx and 53c8xx family. -The LOAD/STORE instructions support absolute and DSA relative addressing -modes. The SCSI SCRIPTS had been entirely rewritten using LOAD/STORE instead +The LOAD/STORE instructions support absolute and DSA relative addressing +modes. The SCSI SCRIPTS had been entirely rewritten using LOAD/STORE instead of MOVE MEMORY instructions. 3.2 New features of the SYM53C896 (64 bit PCI dual LVD SCSI controller) +----------------------------------------------------------------------- -The 896 and the 895A allows handling of the phase mismatch context from -SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor +The 896 and the 895A allows handling of the phase mismatch context from +SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor until the C code has saved the context of the transfer). -Implementing this without using LOAD/STORE instructions would be painful +Implementing this without using LOAD/STORE instructions would be painful and I didn't even want to try it. -The 896 chip supports 64 bit PCI transactions and addressing, while the +The 896 chip supports 64 bit PCI transactions and addressing, while the 895A supports 32 bit PCI transactions and 64 bit addressing. -The SCRIPTS processor of these chips is not true 64 bit, but uses segment -registers for bit 32-63. Another interesting feature is that LOAD/STORE +The SCRIPTS processor of these chips is not true 64 bit, but uses segment +registers for bit 32-63. Another interesting feature is that LOAD/STORE instructions that address the on-chip RAM (8k) remain internal to the chip. -Due to the use of LOAD/STORE SCRIPTS instructions, this driver does not +Due to the use of LOAD/STORE SCRIPTS instructions, this driver does not support the following chips: + - SYM53C810 revision < 0x10 (16) - SYM53C815 all revisions - SYM53C825 revision < 0x10 (16) 4. Memory mapped I/O versus normal I/O +====================================== Memory mapped I/O has less latency than normal I/O. Since linux-1.3.x, memory mapped I/O is used rather than normal I/O. Memory @@ -233,17 +267,18 @@ driver to use normal I/O in all cases. 5. Tagged command queueing +========================== -Queuing more than 1 command at a time to a device allows it to perform -optimizations based on actual head positions and its mechanical +Queuing more than 1 command at a time to a device allows it to perform +optimizations based on actual head positions and its mechanical characteristics. This feature may also reduce average command latency. -In order to really gain advantage of this feature, devices must have -a reasonable cache size (No miracle is to be expected for a low-end +In order to really gain advantage of this feature, devices must have +a reasonable cache size (No miracle is to be expected for a low-end hard disk with 128 KB or less). Some known SCSI devices do not properly support tagged command queuing. -Generally, firmware revisions that fix this kind of problems are available +Generally, firmware revisions that fix this kind of problems are available at respective vendor web/ftp sites. -All I can say is that the hard disks I use on my machines behave well with +All I can say is that the hard disks I use on my machines behave well with this driver with tagged command queuing enabled: - IBM S12 0662 @@ -251,9 +286,9 @@ this driver with tagged command queuing enabled: - Quantum Atlas I - Quantum Atlas II -If your controller has NVRAM, you can configure this feature per target -from the user setup tool. The Tekram Setup program allows to tune the -maximum number of queued commands up to 32. The Symbios Setup only allows +If your controller has NVRAM, you can configure this feature per target +from the user setup tool. The Tekram Setup program allows to tune the +maximum number of queued commands up to 32. The Symbios Setup only allows to enable or disable this feature. The maximum number of simultaneous tagged commands queued to a device @@ -261,16 +296,16 @@ is currently set to 8 by default. This value is suitable for most SCSI disks. With large SCSI disks (>= 2GB, cache >= 512KB, average seek time <= 10 ms), using a larger value may give better performances. -The sym53c8xx driver supports up to 255 commands per device, and the -generic ncr53c8xx driver supports up to 64, but using more than 32 is -generally not worth-while, unless you are using a very large disk or disk -array. It is noticeable that most of recent hard disks seem not to accept -more than 64 simultaneous commands. So, using more than 64 queued commands +The sym53c8xx driver supports up to 255 commands per device, and the +generic ncr53c8xx driver supports up to 64, but using more than 32 is +generally not worth-while, unless you are using a very large disk or disk +array. It is noticeable that most of recent hard disks seem not to accept +more than 64 simultaneous commands. So, using more than 64 queued commands is probably just resource wasting. -If your controller does not have NVRAM or if it is managed by the SDMS -BIOS/SETUP, you can configure tagged queueing feature and device queue -depths from the boot command-line. For example: +If your controller does not have NVRAM or if it is managed by the SDMS +BIOS/SETUP, you can configure tagged queueing feature and device queue +depths from the boot command-line. For example:: ncr53c8xx=tags:4/t2t3q15-t4q7/t1u0q32 @@ -286,80 +321,85 @@ In some special conditions, some SCSI disk firmwares may return a QUEUE FULL status for a SCSI command. This behaviour is managed by the driver using the following heuristic: -- Each time a QUEUE FULL status is returned, tagged queue depth is reduced - to the actual number of disconnected commands. +- Each time a QUEUE FULL status is returned, tagged queue depth is reduced + to the actual number of disconnected commands. - Every 1000 successfully completed SCSI commands, if allowed by the current limit, the maximum number of queueable commands is incremented. -Since QUEUE FULL status reception and handling is resource wasting, the -driver notifies by default this problem to user by indicating the actual -number of commands used and their status, as well as its decision on the +Since QUEUE FULL status reception and handling is resource wasting, the +driver notifies by default this problem to user by indicating the actual +number of commands used and their status, as well as its decision on the device queue depth change. -The heuristic used by the driver in handling QUEUE FULL ensures that the -impact on performances is not too bad. You can get rid of the messages by +The heuristic used by the driver in handling QUEUE FULL ensures that the +impact on performances is not too bad. You can get rid of the messages by setting verbose level to zero, as follow: -1st method: boot your system using 'ncr53c8xx=verb:0' option. -2nd method: apply "setverbose 0" control command to the proc fs entry +1st method: + boot your system using 'ncr53c8xx=verb:0' option. + +2nd method: + apply "setverbose 0" control command to the proc fs entry corresponding to your controller after boot-up. 6. Parity checking +================== The driver supports SCSI parity checking and PCI bus master parity checking. These features must be enabled in order to ensure safe data transfers. However, some flawed devices or mother boards will have -problems with parity. You can disable either PCI parity or SCSI parity +problems with parity. You can disable either PCI parity or SCSI parity checking by entering appropriate options from the boot command line. (See 10: Boot setup commands). 7. Profiling information +======================== Profiling information is available through the proc SCSI file system. -Since gathering profiling information may impact performances, this -feature is disabled by default and requires a compilation configuration +Since gathering profiling information may impact performances, this +feature is disabled by default and requires a compilation configuration option to be set to Y. -The device associated with a host has the following pathname: +The device associated with a host has the following pathname:: /proc/scsi/ncr53c8xx/N (N=0,1,2 ....) -Generally, only 1 board is used on hardware configuration, and that device is: +Generally, only 1 board is used on hardware configuration, and that device is:: + /proc/scsi/ncr53c8xx/0 However, if the driver has been made as module, the number of the hosts is incremented each time the driver is loaded. -In order to display profiling information, just enter: +In order to display profiling information, just enter:: cat /proc/scsi/ncr53c8xx/0 -and you will get something like the following text: - -------------------------------------------------------- -General information: - Chip NCR53C810, device id 0x1, revision id 0x2 - IO port address 0x6000, IRQ number 10 - Using memory mapped IO at virtual address 0x282c000 - Synchronous transfer period 25, max commands per lun 4 -Profiling information: - num_trans = 18014 - num_kbytes = 671314 - num_disc = 25763 - num_break = 1673 - num_int = 1685 - num_fly = 18038 - ms_setup = 4940 - ms_data = 369940 - ms_disc = 183090 - ms_post = 1320 -------------------------------------------------------- +and you will get something like the following text:: + + General information: + Chip NCR53C810, device id 0x1, revision id 0x2 + IO port address 0x6000, IRQ number 10 + Using memory mapped IO at virtual address 0x282c000 + Synchronous transfer period 25, max commands per lun 4 + Profiling information: + num_trans = 18014 + num_kbytes = 671314 + num_disc = 25763 + num_break = 1673 + num_int = 1685 + num_fly = 18038 + ms_setup = 4940 + ms_data = 369940 + ms_disc = 183090 + ms_post = 1320 General information is easy to understand. The device ID and the revision ID identify the SCSI chip as follows: +======= ============= =========== Chip Device id Revision Id ----- --------- ----------- +======= ============= =========== 810 0x1 < 0x10 810A 0x1 >= 0x10 815 0x4 @@ -368,6 +408,7 @@ Chip Device id Revision Id 825A 0x3 >= 0x10 875 0xf 895 0xc +======= ============= =========== The profiling information is updated upon completion of SCSI commands. A data structure is allocated and zeroed when the host adapter is @@ -425,15 +466,16 @@ Due to the 1/100 second tick of the system clock, "ms_post" time may be wrong. In the example above, we got 18038 interrupts "on the fly" and only -1673 script breaks generally due to disconnections inside a segment +1673 script breaks generally due to disconnections inside a segment of the scatter list. 8. Control commands +=================== Control commands can be sent to the driver with write operations to the proc SCSI file system. The generic command syntax is the -following: +following:: echo "<verb> <parameters>" >/proc/scsi/ncr53c8xx/0 (assumes controller number is 0) @@ -444,66 +486,81 @@ apply to all targets of the SCSI chain (except the controller). Available commands: 8.1 Set minimum synchronous period factor +----------------------------------------- setsync <target> <period factor> - target: target number - period: minimum synchronous period. + :target: target number + :period: minimum synchronous period. Maximum speed = 1000/(4*period factor) except for special cases below. Specify a period of 255, to force asynchronous transfer mode. - 10 means 25 nano-seconds synchronous period - 11 means 30 nano-seconds synchronous period - 12 means 50 nano-seconds synchronous period + - 10 means 25 nano-seconds synchronous period + - 11 means 30 nano-seconds synchronous period + - 12 means 50 nano-seconds synchronous period 8.2 Set wide size +----------------- setwide <target> <size> - target: target number - size: 0=8 bits, 1=16bits + :target: target number + :size: 0=8 bits, 1=16bits 8.3 Set maximum number of concurrent tagged commands - +---------------------------------------------------- + settags <target> <tags> - target: target number - tags: number of concurrent tagged commands + :target: target number + :tags: number of concurrent tagged commands must not be greater than SCSI_NCR_MAX_TAGS (default: 8) 8.4 Set order type for tagged command +------------------------------------- setorder <order> - order: 3 possible values: - simple: use SIMPLE TAG for all operations (read and write) - ordered: use ORDERED TAG for all operations - default: use default tag type, + :order: 3 possible values: + + simple: + use SIMPLE TAG for all operations (read and write) + + ordered: + use ORDERED TAG for all operations + + default: + use default tag type, SIMPLE TAG for read operations ORDERED TAG for write operations 8.5 Set debug mode +------------------ setdebug <list of debug flags> Available debug flags: - alloc: print info about memory allocations (ccb, lcb) - queue: print info about insertions into the command start queue - result: print sense data on CHECK CONDITION status - scatter: print info about the scatter process - scripts: print info about the script binding process - tiny: print minimal debugging information - timing: print timing information of the NCR chip - nego: print information about SCSI negotiations - phase: print information on script interruptions + + ======== ======================================================== + alloc print info about memory allocations (ccb, lcb) + queue print info about insertions into the command start queue + result print sense data on CHECK CONDITION status + scatter print info about the scatter process + scripts print info about the script binding process + tiny print minimal debugging information + timing print timing information of the NCR chip + nego print information about SCSI negotiations + phase print information on script interruptions + ======== ======================================================== Use "setdebug" with no argument to reset debug flags. 8.6 Clear profile counters +-------------------------- clearprof @@ -513,7 +570,8 @@ Available commands: 8.7 Set flag (no_disc) - +---------------------- + setflag <target> <flag> target: target number @@ -523,38 +581,47 @@ Available commands: no_disc: not allow target to disconnect. Do not specify any flag in order to reset the flag. For example: - - setflag 4 + + setflag 4 will reset no_disc flag for target 4, so will allow it disconnections. - - setflag all + + setflag all will allow disconnection for all devices on the SCSI bus. 8.8 Set verbose level +--------------------- setverbose #level - The driver default verbose level is 1. This command allows to change + The driver default verbose level is 1. This command allows to change th driver verbose level after boot-up. 8.9 Reset all logical units of a target +--------------------------------------- resetdev <target> - target: target number + :target: target number + The driver will try to send a BUS DEVICE RESET message to the target. (Only supported by the SYM53C8XX driver and provided for test purpose) 8.10 Abort all tasks of all logical units of a target +----------------------------------------------------- cleardev <target> - target: target number - The driver will try to send a ABORT message to all the logical units + :target: target number + + The driver will try to send a ABORT message to all the logical units of the target. + (Only supported by the SYM53C8XX driver and provided for test purpose) 9. Configuration parameters +=========================== If the firmware of all your devices is perfect enough, all the features supported by the driver can be enabled at start-up. However, @@ -564,6 +631,7 @@ this feature after boot-up only for devices that support it safely. CONFIG_SCSI_NCR53C8XX_IOMAPPED (default answer: n) Answer "y" if you suspect your mother board to not allow memory mapped I/O. + May slow down performance a little. This option is required by Linux/PPC and is used no matter what you select here. Linux/PPC suffers no performance loss with this option since all IO is memory @@ -573,35 +641,37 @@ CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS (default answer: 8) Default tagged command queue depth. CONFIG_SCSI_NCR53C8XX_MAX_TAGS (default answer: 8) - This option allows you to specify the maximum number of tagged commands + This option allows you to specify the maximum number of tagged commands that can be queued to a device. The maximum supported value is 32. CONFIG_SCSI_NCR53C8XX_SYNC (default answer: 5) - This option allows you to specify the frequency in MHz the driver + This option allows you to specify the frequency in MHz the driver will use at boot time for synchronous data transfer negotiations. This frequency can be changed later with the "setsync" control command. 0 means "asynchronous data transfers". CONFIG_SCSI_NCR53C8XX_FORCE_SYNC_NEGO (default answer: n) Force synchronous negotiation for all SCSI-2 devices. - Some SCSI-2 devices do not report this feature in byte 7 of inquiry + + Some SCSI-2 devices do not report this feature in byte 7 of inquiry response but do support it properly (TAMARACK scanners for example). CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT (default and only reasonable answer: n) If you suspect a device of yours does not properly support disconnections, - you can answer "y". Then, all SCSI devices will never disconnect the bus + you can answer "y". Then, all SCSI devices will never disconnect the bus even while performing long SCSI operations. CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT - Genuine SYMBIOS boards use GPIO0 in output for controller LED and GPIO3 + Genuine SYMBIOS boards use GPIO0 in output for controller LED and GPIO3 bit as a flag indicating singled-ended/differential interface. If all the boards of your system are genuine SYMBIOS boards or use BIOS and drivers from SYMBIOS, you would want to enable this option. - This option must NOT be enabled if your system has at least one 53C8XX + + This option must NOT be enabled if your system has at least one 53C8XX based scsi board with a vendor-specific BIOS. - For example, Tekram DC-390/U, DC-390/W and DC-390/F scsi controllers - use a vendor-specific BIOS and are known to not use SYMBIOS compatible - GPIO wiring. So, this option must not be enabled if your system has + For example, Tekram DC-390/U, DC-390/W and DC-390/F scsi controllers + use a vendor-specific BIOS and are known to not use SYMBIOS compatible + GPIO wiring. So, this option must not be enabled if your system has such a board installed. CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT @@ -610,7 +680,7 @@ CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT systems with more than one Symbios compatible controller where at least one has a serial NVRAM, or for a system with a mixture of Symbios and Tekram cards. Enables setting the boot order of host adaptors - to something other than the default order or "reverse probe" order. + to something other than the default order or "reverse probe" order. Also enables Symbios and Tekram cards to be distinguished so CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT may be set in a system with a mixture of Symbios and Tekram cards so the Symbios cards can make use of @@ -618,243 +688,364 @@ CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT causing problems for the Tekram card(s). 10. Boot setup commands +======================= 10.1 Syntax +----------- -Setup commands can be passed to the driver either at boot time or as a +Setup commands can be passed to the driver either at boot time or as a string variable using 'insmod'. -A boot setup command for the ncr53c8xx (sym53c8xx) driver begins with the -driver name "ncr53c8xx="(sym53c8xx). The kernel syntax parser then expects -an optional list of integers separated with comma followed by an optional -list of comma-separated strings. Example of boot setup command under lilo -prompt: +A boot setup command for the ncr53c8xx (sym53c8xx) driver begins with the +driver name "ncr53c8xx="(sym53c8xx). The kernel syntax parser then expects +an optional list of integers separated with comma followed by an optional +list of comma-separated strings. Example of boot setup command under lilo +prompt:: -lilo: linux root=/dev/hda2 ncr53c8xx=tags:4,sync:10,debug:0x200 + lilo: linux root=/dev/hda2 ncr53c8xx=tags:4,sync:10,debug:0x200 - enable tagged commands, up to 4 tagged commands queued. - set synchronous negotiation speed to 10 Mega-transfers / second. - set DEBUG_NEGO flag. -Since comma seems not to be allowed when defining a string variable using -'insmod', the driver also accepts <space> as option separator. -The following command will install driver module with the same options as -above. +Since comma seems not to be allowed when defining a string variable using +'insmod', the driver also accepts <space> as option separator. +The following command will install driver module with the same options as +above:: insmod ncr53c8xx.o ncr53c8xx="tags:4 sync:10 debug:0x200" -For the moment, the integer list of arguments is discarded by the driver. +For the moment, the integer list of arguments is discarded by the driver. It will be used in the future in order to allow a per controller setup. -Each string argument must be specified as "keyword:value". Only lower-case +Each string argument must be specified as "keyword:value". Only lower-case characters and digits are allowed. -In a system that contains multiple 53C8xx adapters insmod will install the +In a system that contains multiple 53C8xx adapters insmod will install the specified driver on each adapter. To exclude a chip use the 'excl' keyword. -The sequence of commands, +The sequence of commands:: insmod sym53c8xx sym53c8xx=excl:0x1400 insmod ncr53c8xx -installs the sym53c8xx driver on all adapters except the one at IO port -address 0x1400 and then installs the ncr53c8xx driver to the adapter at IO +installs the sym53c8xx driver on all adapters except the one at IO port +address 0x1400 and then installs the ncr53c8xx driver to the adapter at IO port address 0x1400. 10.2 Available arguments +------------------------ 10.2.1 Master parity checking +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ======== mpar:y enabled mpar:n disabled + ====== ======== 10.2.2 Scsi parity checking +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ======== spar:y enabled spar:n disabled + ====== ======== 10.2.3 Scsi disconnections +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ======== disc:y enabled disc:n disabled - + ====== ======== + 10.2.4 Special features +^^^^^^^^^^^^^^^^^^^^^^^^ + Only apply to 810A, 825A, 860, 875 and 895 controllers. Have no effect with other ones. + + ======= ================================================= specf:y (or 1) enabled specf:n (or 0) disabled specf:3 enabled except Memory Write And Invalidate - The default driver setup is 'specf:3'. As a consequence, option 'specf:y' - must be specified in the boot setup command to enable Memory Write And + ======= ================================================= + + The default driver setup is 'specf:3'. As a consequence, option 'specf:y' + must be specified in the boot setup command to enable Memory Write And Invalidate. 10.2.5 Ultra SCSI support +^^^^^^^^^^^^^^^^^^^^^^^^^^ + Only apply to 860, 875, 895, 895a, 896, 1010 and 1010_66 controllers. Have no effect with other ones. + + ======= ======================== ultra:n All ultra speeds enabled ultra:2 Ultra2 enabled ultra:1 Ultra enabled ultra:0 Ultra speeds disabled + ======= ======================== 10.2.6 Default number of tagged commands +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ======================= =============================== tags:0 (or tags:1 ) tagged command queuing disabled tags:#tags (#tags > 1) tagged command queuing enabled + ======================= =============================== + #tags will be truncated to the max queued commands configuration parameter. - This option also allows to specify a command queue depth for each device + This option also allows to specify a command queue depth for each device that support tagged command queueing. - Example: + + Example:: + ncr53c8xx=tags:10/t2t3q16-t5q24/t1u2q32 - will set devices queue depth as follow: + + will set devices queue depth as follow: + - controller #0 target #2 and target #3 -> 16 commands, - controller #0 target #5 -> 24 commands, - controller #1 target #1 logical unit #2 -> 32 commands, - all other logical units (all targets, all controllers) -> 10 commands. 10.2.7 Default synchronous period factor - sync:255 disabled (asynchronous transfer mode) - sync:#factor - #factor = 10 Ultra-2 SCSI 40 Mega-transfers / second - #factor = 11 Ultra-2 SCSI 33 Mega-transfers / second - #factor < 25 Ultra SCSI 20 Mega-transfers / second - #factor < 50 Fast SCSI-2 - - In all cases, the driver will use the minimum transfer period supported by +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +============ ======================================================== +sync:255 disabled (asynchronous transfer mode) +sync:#factor + ============ ======================================= + #factor = 10 Ultra-2 SCSI 40 Mega-transfers / second + #factor = 11 Ultra-2 SCSI 33 Mega-transfers / second + #factor < 25 Ultra SCSI 20 Mega-transfers / second + #factor < 50 Fast SCSI-2 + ============ ======================================= +============ ======================================================== + + In all cases, the driver will use the minimum transfer period supported by controllers according to NCR53C8XX chip type. 10.2.8 Negotiate synchronous with all devices +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ (force sync nego) + + ===== ========= fsn:y enabled fsn:n disabled + ===== ========= 10.2.9 Verbosity level +^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ========= verb:0 minimal verb:1 normal verb:2 too much + ====== ========= 10.2.10 Debug mode - debug:0 clear debug flags - debug:#x set debug flags - #x is an integer value combining the following power-of-2 values: - DEBUG_ALLOC 0x1 - DEBUG_PHASE 0x2 - DEBUG_POLL 0x4 - DEBUG_QUEUE 0x8 - DEBUG_RESULT 0x10 - DEBUG_SCATTER 0x20 - DEBUG_SCRIPT 0x40 - DEBUG_TINY 0x80 - DEBUG_TIMING 0x100 - DEBUG_NEGO 0x200 - DEBUG_TAGS 0x400 - DEBUG_FREEZE 0x800 - DEBUG_RESTART 0x1000 - - You can play safely with DEBUG_NEGO. However, some of these flags may - generate bunches of syslog messages. +^^^^^^^^^^^^^^^^^^ + +======== ================================================================== +debug:0 clear debug flags +debug:#x set debug flags + + #x is an integer value combining the following power-of-2 values: + + ============= ====== + DEBUG_ALLOC 0x1 + DEBUG_PHASE 0x2 + DEBUG_POLL 0x4 + DEBUG_QUEUE 0x8 + DEBUG_RESULT 0x10 + DEBUG_SCATTER 0x20 + DEBUG_SCRIPT 0x40 + DEBUG_TINY 0x80 + DEBUG_TIMING 0x100 + DEBUG_NEGO 0x200 + DEBUG_TAGS 0x400 + DEBUG_FREEZE 0x800 + DEBUG_RESTART 0x1000 + ============= ====== +======== ================================================================== + + You can play safely with DEBUG_NEGO. However, some of these flags may + generate bunches of syslog messages. 10.2.11 Burst max - burst:0 burst disabled - burst:255 get burst length from initial IO register settings. - burst:#x burst enabled (1<<#x burst transfers max) - #x is an integer value which is log base 2 of the burst transfers max. - The NCR53C875 and NCR53C825A support up to 128 burst transfers (#x = 7). - Other chips only support up to 16 (#x = 4). - This is a maximum value. The driver set the burst length according to chip - and revision ids. By default the driver uses the maximum value supported - by the chip. +^^^^^^^^^^^^^^^^^ + +========= ================================================================== +burst:0 burst disabled +burst:255 get burst length from initial IO register settings. +burst:#x burst enabled (1<<#x burst transfers max) + + #x is an integer value which is log base 2 of the burst transfers + max. + + The NCR53C875 and NCR53C825A support up to 128 burst transfers + (#x = 7). + + Other chips only support up to 16 (#x = 4). + + This is a maximum value. The driver set the burst length according + to chip and revision ids. By default the driver uses the maximum + value supported by the chip. +========= ================================================================== 10.2.12 LED support +^^^^^^^^^^^^^^^^^^^ + + ===== =================== led:1 enable LED support led:0 disable LED support + ===== =================== + Donnot enable LED support if your scsi board does not use SDMS BIOS. (See 'Configuration parameters') 10.2.13 Max wide +^^^^^^^^^^^^^^^^ + + ====== =================== wide:1 wide scsi enabled wide:0 wide scsi disabled + ====== =================== + Some scsi boards use a 875 (ultra wide) and only supply narrow connectors. - If you have connected a wide device with a 50 pins to 68 pins cable + If you have connected a wide device with a 50 pins to 68 pins cable converter, any accepted wide negotiation will break further data transfers. - In such a case, using "wide:0" in the bootup command will be helpful. + In such a case, using "wide:0" in the bootup command will be helpful. 10.2.14 Differential mode +^^^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ================================= diff:0 never set up diff mode diff:1 set up diff mode if BIOS set it diff:2 always set up diff mode diff:3 set diff mode if GPIO3 is not set + ====== ================================= 10.2.15 IRQ mode +^^^^^^^^^^^^^^^^ + + ========= ======================================================== irqm:0 always open drain irqm:1 same as initial settings (assumed BIOS settings) irqm:2 always totem pole irqm:0x10 driver will not use IRQF_SHARED flag when requesting irq + ========= ======================================================== (Bits 0x10 and 0x20 can be combined with hardware irq mode option) 10.2.16 Reverse probe +^^^^^^^^^^^^^^^^^^^^^ + + ========= ======================================================== revprob:n probe chip ids from the PCI configuration in this order: 810, 815, 820, 860, 875, 885, 895, 896 revprob:y probe chip ids in the reverse order. + ========= ======================================================== 10.2.17 Fix up PCI configuration space +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ pcifix:<option bits> Available option bits: - 0x0: No attempt to fix PCI configuration space registers values. - 0x1: Set PCI cache-line size register if not set. - 0x2: Set write and invalidate bit in PCI command register. - 0x4: Increase if necessary PCI latency timer according to burst max. + + === =============================================================== + 0x0 No attempt to fix PCI configuration space registers values. + 0x1 Set PCI cache-line size register if not set. + 0x2 Set write and invalidate bit in PCI command register. + 0x4 Increase if necessary PCI latency timer according to burst max. + === =============================================================== Use 'pcifix:7' in order to allow the driver to fix up all PCI features. 10.2.18 Serial NVRAM +^^^^^^^^^^^^^^^^^^^^ + + ======= ========================================= nvram:n do not look for serial NVRAM nvram:y test controllers for onboard serial NVRAM + ======= ========================================= + (alternate binary form) mvram=<bits options> + + ==== ================================================================= 0x01 look for NVRAM (equivalent to nvram=y) 0x02 ignore NVRAM "Synchronous negotiation" parameters for all devices 0x04 ignore NVRAM "Wide negotiation" parameter for all devices 0x08 ignore NVRAM "Scan at boot time" parameter for all devices 0x80 also attach controllers set to OFF in the NVRAM (sym53c8xx only) + ==== ================================================================= + +10.2.19 Check SCSI BUS +^^^^^^^^^^^^^^^^^^^^^^ -10.2.19 Check SCSI BUS buschk:<option bits> Available option bits: + + ==== ================================================ 0x0: No check. - 0x1: Check and do not attach the controller on error. + 0x1: Check and do not attach the controller on error. 0x2: Check and just warn on error. 0x4: Disable SCSI bus integrity checking. + ==== ================================================ 10.2.20 Exclude a host from being attached +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + excl=<io_address> Prevent host at a given io address from being attached. - For example 'ncr53c8xx=excl:0xb400,excl:0xc000' indicate to the + For example 'ncr53c8xx=excl:0xb400,excl:0xc000' indicate to the ncr53c8xx driver not to attach hosts at address 0xb400 and 0xc000. 10.2.21 Suggest a default SCSI id for hosts +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ========== ========================================== hostid:255 no id suggested. - hostid:#x (0 < x < 7) x suggested for hosts SCSI id. + hostid:#x (0 < x < 7) x suggested for hosts SCSI id. + ========== ========================================== - If a host SCSI id is available from the NVRAM, the driver will ignore - any value suggested as boot option. Otherwise, if a suggested value - different from 255 has been supplied, it will use it. Otherwise, it will - try to deduce the value previously set in the hardware and use value + If a host SCSI id is available from the NVRAM, the driver will ignore + any value suggested as boot option. Otherwise, if a suggested value + different from 255 has been supplied, it will use it. Otherwise, it will + try to deduce the value previously set in the hardware and use value 7 if the hardware value is zero. 10.2.22 Enable use of IMMEDIATE ARBITRATION +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + (only supported by the sym53c8xx driver. See 10.7 for more details) - iarb:0 do not use this feature. - iarb:#x use this feature according to bit fields as follow: - bit 0 (1) : enable IARB each time the initiator has been reselected - when it arbitrated for the SCSI BUS. - (#x >> 4) : maximum number of successive settings of IARB if the initiator - win arbitration and it has other commands to send to a device. +======= ================================================================= +iarb:0 do not use this feature. +iarb:#x use this feature according to bit fields as follow: + + ========= ======================================================= + bit 0 (1) enable IARB each time the initiator has been reselected + when it arbitrated for the SCSI BUS. + (#x >> 4) maximum number of successive settings of IARB if the + initiator win arbitration and it has other commands + to send to a device. + ========= ======================================================= +======= ================================================================= Boot fail safe safe:y load the following assumed fail safe initial setup + ======================== ====================== ========== master parity disabled mpar:n scsi parity enabled spar:y disconnections not allowed disc:n @@ -876,189 +1067,222 @@ Boot fail safe irq mode from BIOS settings irqm:1 SCSI BUS check do not attach on error buschk:1 immediate arbitration disabled iarb:0 + ======================== ====================== ========== 10.3 Advised boot setup commands +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -If the driver has been configured with default options, the equivalent -boot setup is: +If the driver has been configured with default options, the equivalent +boot setup is:: ncr53c8xx=mpar:y,spar:y,disc:y,specf:3,fsn:n,ultra:2,fsn:n,revprob:n,verb:1\ tags:0,sync:50,debug:0,burst:7,led:0,wide:1,settle:2,diff:0,irqm:0 For an installation diskette or a safe but not fast system, -boot setup can be: +boot setup can be:: ncr53c8xx=safe:y,mpar:y,disc:y ncr53c8xx=safe:y,disc:y ncr53c8xx=safe:y,mpar:y ncr53c8xx=safe:y -My personal system works flawlessly with the following equivalent setup: +My personal system works flawlessly with the following equivalent setup:: ncr53c8xx=mpar:y,spar:y,disc:y,specf:1,fsn:n,ultra:2,fsn:n,revprob:n,verb:1\ tags:32,sync:12,debug:0,burst:7,led:1,wide:1,settle:2,diff:0,irqm:0 -The driver prints its actual setup when verbosity level is 2. You can try -"ncr53c8xx=verb:2" to get the "static" setup of the driver, or add "verb:2" -to your boot setup command in order to check the actual setup the driver is +The driver prints its actual setup when verbosity level is 2. You can try +"ncr53c8xx=verb:2" to get the "static" setup of the driver, or add "verb:2" +to your boot setup command in order to check the actual setup the driver is using. 10.4 PCI configuration fix-up boot option +----------------------------------------- pcifix:<option bits> Available option bits: - 0x1: Set PCI cache-line size register if not set. - 0x2: Set write and invalidate bit in PCI command register. + + === ===================================================== + 0x1 Set PCI cache-line size register if not set. + 0x2 Set write and invalidate bit in PCI command register. + === ===================================================== Use 'pcifix:3' in order to allow the driver to fix both PCI features. -These options only apply to new SYMBIOS chips 810A, 825A, 860, 875 +These options only apply to new SYMBIOS chips 810A, 825A, 860, 875 and 895 and are only supported for Pentium and 486 class processors. -Recent SYMBIOS 53C8XX scsi processors are able to use PCI read multiple -and PCI write and invalidate commands. These features require the -cache line size register to be properly set in the PCI configuration -space of the chips. On the other hand, chips will use PCI write and -invalidate commands only if the corresponding bit is set to 1 in the +Recent SYMBIOS 53C8XX scsi processors are able to use PCI read multiple +and PCI write and invalidate commands. These features require the +cache line size register to be properly set in the PCI configuration +space of the chips. On the other hand, chips will use PCI write and +invalidate commands only if the corresponding bit is set to 1 in the PCI command register. -Not all PCI bioses set the PCI cache line register and the PCI write and +Not all PCI bioses set the PCI cache line register and the PCI write and invalidate bit in the PCI configuration space of 53C8XX chips. -Optimized PCI accesses may be broken for some PCI/memory controllers or +Optimized PCI accesses may be broken for some PCI/memory controllers or make problems with some PCI boards. This fix-up worked flawlessly on my previous system. (MB Triton HX / 53C875 / 53C810A) -I use these options at my own risks as you will do if you decide to +I use these options at my own risks as you will do if you decide to use them too. 10.5 Serial NVRAM support boot option +------------------------------------- +======= ========================================= nvram:n do not look for serial NVRAM nvram:y test controllers for onboard serial NVRAM +======= ========================================= -This option can also been entered as an hexadecimal value that allows -to control what information the driver will get from the NVRAM and what +This option can also been entered as an hexadecimal value that allows +to control what information the driver will get from the NVRAM and what information it will ignore. For details see '17. Serial NVRAM support'. -When this option is enabled, the driver tries to detect all boards using +When this option is enabled, the driver tries to detect all boards using a Serial NVRAM. This memory is used to hold user set up parameters. -The parameters the driver is able to get from the NVRAM depend on the +The parameters the driver is able to get from the NVRAM depend on the data format used, as follow: - Tekram format Symbios format -General and host parameters - Boot order N Y - Host SCSI ID Y Y - SCSI parity checking Y Y - Verbose boot messages N Y -SCSI devices parameters - Synchronous transfer speed Y Y - Wide 16 / Narrow Y Y - Tagged Command Queuing enabled Y Y - Disconnections enabled Y Y - Scan at boot time N Y - -In order to speed up the system boot, for each device configured without -the "scan at boot time" option, the driver forces an error on the ++-------------------------------+------------------+--------------+ +| |Tekram format |Symbios format| ++-------------------------------+------------------+--------------+ +|General and host parameters | | | ++-------------------------------+------------------+--------------+ +| * Boot order | N | Y | ++-------------------------------+------------------+--------------+ +| * Host SCSI ID | Y | Y | ++-------------------------------+------------------+--------------+ +| * SCSI parity checking | Y | Y | ++-------------------------------+------------------+--------------+ +| * Verbose boot messages | N | Y | ++-------------------------------+------------------+--------------+ +|SCSI devices parameters | ++-------------------------------+------------------+--------------+ +| * Synchronous transfer speed | Y | Y | ++-------------------------------+------------------+--------------+ +| * Wide 16 / Narrow | Y | Y | ++-------------------------------+------------------+--------------+ +| * Tagged Command Queuing | Y | Y | +| enabled | | | ++-------------------------------+------------------+--------------+ +| * Disconnections enabled | Y | Y | ++-------------------------------+------------------+--------------+ +| * Scan at boot time | N | Y | ++-------------------------------+------------------+--------------+ + +In order to speed up the system boot, for each device configured without +the "scan at boot time" option, the driver forces an error on the first TEST UNIT READY command received for this device. -Some SDMS BIOS revisions seem to be unable to boot cleanly with very fast -hard disks. In such a situation you cannot configure the NVRAM with +Some SDMS BIOS revisions seem to be unable to boot cleanly with very fast +hard disks. In such a situation you cannot configure the NVRAM with optimized parameters value. -The 'nvram' boot option can be entered in hexadecimal form in order +The 'nvram' boot option can be entered in hexadecimal form in order to ignore some options configured in the NVRAM, as follow: mvram=<bits options> + + ==== ================================================================= 0x01 look for NVRAM (equivalent to nvram=y) 0x02 ignore NVRAM "Synchronous negotiation" parameters for all devices 0x04 ignore NVRAM "Wide negotiation" parameter for all devices 0x08 ignore NVRAM "Scan at boot time" parameter for all devices 0x80 also attach controllers set to OFF in the NVRAM (sym53c8xx only) + ==== ================================================================= -Option 0x80 is only supported by the sym53c8xx driver and is disabled by -default. Result is that, by default (option not set), the sym53c8xx driver +Option 0x80 is only supported by the sym53c8xx driver and is disabled by +default. Result is that, by default (option not set), the sym53c8xx driver will not attach controllers set to OFF in the NVRAM. -The ncr53c8xx always tries to attach all the controllers. Option 0x80 has -not been added to the ncr53c8xx driver, since it has been reported to -confuse users who use this driver since a long time. If you desire a -controller not to be attached by the ncr53c8xx driver at Linux boot, you +The ncr53c8xx always tries to attach all the controllers. Option 0x80 has +not been added to the ncr53c8xx driver, since it has been reported to +confuse users who use this driver since a long time. If you desire a +controller not to be attached by the ncr53c8xx driver at Linux boot, you must use the 'excl' driver boot option. 10.6 SCSI BUS checking boot option. +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -When this option is set to a non-zero value, the driver checks SCSI lines +When this option is set to a non-zero value, the driver checks SCSI lines logic state, 100 micro-seconds after having asserted the SCSI RESET line. The driver just reads SCSI lines and checks all lines read FALSE except RESET. -Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI +Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI RESET has been asserted, any signal to TRUE may indicate a SCSI BUS problem. Unfortunately, the following common SCSI BUS problems are not detected: + - Only 1 terminator installed. - Misplaced terminators. - Bad quality terminators. -On the other hand, either bad cabling, broken devices, not conformant + +On the other hand, either bad cabling, broken devices, not conformant devices, ... may cause a SCSI signal to be wrong when te driver reads it. 10.7 IMMEDIATE ARBITRATION boot option +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This option is only supported by the SYM53C8XX driver (not by the NCR53C8XX). -SYMBIOS 53C8XX chips are able to arbitrate for the SCSI BUS as soon as they -have detected an expected disconnection (BUS FREE PHASE). For this process -to be started, bit 1 of SCNTL1 IO register must be set when the chip is +SYMBIOS 53C8XX chips are able to arbitrate for the SCSI BUS as soon as they +have detected an expected disconnection (BUS FREE PHASE). For this process +to be started, bit 1 of SCNTL1 IO register must be set when the chip is connected to the SCSI BUS. -When this feature has been enabled for the current connection, the chip has -every chance to win arbitration if only devices with lower priority are -competing for the SCSI BUS. By the way, when the chip is using SCSI id 7, +When this feature has been enabled for the current connection, the chip has +every chance to win arbitration if only devices with lower priority are +competing for the SCSI BUS. By the way, when the chip is using SCSI id 7, then it will for sure win the next SCSI BUS arbitration. -Since, there is no way to know what devices are trying to arbitrate for the +Since, there is no way to know what devices are trying to arbitrate for the BUS, using this feature can be extremely unfair. So, you are not advised -to enable it, or at most enable this feature for the case the chip lost +to enable it, or at most enable this feature for the case the chip lost the previous arbitration (boot option 'iarb:1'). This feature has the following advantages: a) Allow the initiator with ID 7 to win arbitration when it wants so. -b) Overlap at least 4 micro-seconds of arbitration time with the execution - of SCRIPTS that deal with the end of the current connection and that +b) Overlap at least 4 micro-seconds of arbitration time with the execution + of SCRIPTS that deal with the end of the current connection and that starts the next job. -Hmmm... But (a) may just prevent other devices from reselecting the initiator, -and delay data transfers or status/completions, and (b) may just waste +Hmmm... But (a) may just prevent other devices from reselecting the initiator, +and delay data transfers or status/completions, and (b) may just waste SCSI BUS bandwidth if the SCRIPTS execution lasts more than 4 micro-seconds. -The use of IARB needs the SCSI_NCR_IARB_SUPPORT option to have been defined -at compile time and the 'iarb' boot option to have been set to a non zero -value at boot time. It is not that useful for real work, but can be used -to stress SCSI devices or for some applications that can gain advantage of -it. By the way, if you experience badnesses like 'unexpected disconnections', -'bad reselections', etc... when using IARB on heavy IO load, you should not -be surprised, because force-feeding anything and blocking its arse at the +The use of IARB needs the SCSI_NCR_IARB_SUPPORT option to have been defined +at compile time and the 'iarb' boot option to have been set to a non zero +value at boot time. It is not that useful for real work, but can be used +to stress SCSI devices or for some applications that can gain advantage of +it. By the way, if you experience badnesses like 'unexpected disconnections', +'bad reselections', etc... when using IARB on heavy IO load, you should not +be surprised, because force-feeding anything and blocking its arse at the same time cannot work for a long time. :-)) 11. Some constants and flags of the ncr53c8xx.h header file +=========================================================== Some of these are defined from the configuration parameters. To change other "defines", you must edit the header file. Do that only if you know what you are doing. SCSI_NCR_SETUP_SPECIAL_FEATURES (default: defined) - If defined, the driver will enable some special features according + If defined, the driver will enable some special features according to chip and revision id. - For 810A, 860, 825A, 875 and 895 scsi chips, this option enables - support of features that reduce load of PCI bus and memory accesses - during scsi transfer processing: burst op-code fetch, read multiple, - read line, prefetch, cache line, write and invalidate, + + For 810A, 860, 825A, 875 and 895 scsi chips, this option enables + support of features that reduce load of PCI bus and memory accesses + during scsi transfer processing: burst op-code fetch, read multiple, + read line, prefetch, cache line, write and invalidate, burst 128 (875 only), large dma fifo (875 only), offset 16 (875 only). - Can be changed by the following boot setup command: + Can be changed by the following boot setup command:: + ncr53c8xx=specf:n SCSI_NCR_IOMAPPED (default: not defined) @@ -1066,22 +1290,26 @@ SCSI_NCR_IOMAPPED (default: not defined) SCSI_NCR_SHARE_IRQ (default: defined) If defined, request shared IRQ. - + SCSI_NCR_MAX_TAGS (default: 8) Maximum number of simultaneous tagged commands to a device. + Can be changed by "settags <target> <maxtags>" SCSI_NCR_SETUP_DEFAULT_SYNC (default: 50) - Transfer period factor the driver will use at boot time for synchronous + Transfer period factor the driver will use at boot time for synchronous negotiation. 0 means asynchronous. + Can be changed by "setsync <target> <period factor>" SCSI_NCR_SETUP_DEFAULT_TAGS (default: 8) Default number of simultaneous tagged commands to a device. + < 1 means tagged command queuing disabled at start-up. SCSI_NCR_ALWAYS_SIMPLE_TAG (default: defined) Use SIMPLE TAG for read and write commands. + Can be changed by "setorder <ordered|simple|default>" SCSI_NCR_SETUP_DISCONNECTION (default: defined) @@ -1089,6 +1317,7 @@ SCSI_NCR_SETUP_DISCONNECTION (default: defined) SCSI_NCR_SETUP_FORCE_SYNC_NEGO (default: not defined) If defined, synchronous negotiation is tried for all SCSI-2 devices. + Can be changed by "setsync <target> <period>" SCSI_NCR_SETUP_MASTER_PARITY (default: defined) @@ -1115,6 +1344,7 @@ SCSI_NCR_SETTLE_TIME (default: 2) SCSI_NCR_TIMEOUT_ALERT (default: 3) If a pending command will time out after this amount of seconds, an ordered tag is used for the next command. + Avoids timeouts for unordered tagged commands. SCSI_NCR_CAN_QUEUE (default: 7*SCSI_NCR_MAX_TAGS) @@ -1131,34 +1361,38 @@ SCSI_NCR_MAX_LUN (default: 8) 12. Installation +================ This driver is part of the linux kernel distribution. -Driver files are located in the sub-directory "drivers/scsi" of the +Driver files are located in the sub-directory "drivers/scsi" of the kernel source tree. -Driver files: +Driver files:: README.ncr53c8xx : this file ChangeLog.ncr53c8xx : change log ncr53c8xx.h : definitions ncr53c8xx.c : the driver code -New driver versions are made available separately in order to allow testing -changes and new features prior to including them into the linux kernel -distribution. The following URL provides information on latest available -patches: +New driver versions are made available separately in order to allow testing +changes and new features prior to including them into the linux kernel +distribution. The following URL provides information on latest available +patches: ftp://ftp.tux.org/pub/people/gerard-roudier/README -13. Architecture dependent features. +13. Architecture dependent features +=================================== <Not yet written> 14. Known problems +================== 14.1 Tagged commands with Iomega Jaz device +------------------------------------------- I have not tried this device, however it has been reported to me the following: This device is capable of Tagged command queuing. However @@ -1170,14 +1404,15 @@ other problem that may appear is timeouts. The only way to avoid timeouts seems to edit linux/drivers/scsi/sd.c and to increase the current timeout values. -14.2 Device names change when another controller is added. +14.2 Device names change when another controller is added +--------------------------------------------------------- -When you add a new NCR53C8XX chip based controller to a system that already -has one or more controllers of this family, it may happen that the order -the driver registers them to the kernel causes problems due to device +When you add a new NCR53C8XX chip based controller to a system that already +has one or more controllers of this family, it may happen that the order +the driver registers them to the kernel causes problems due to device name changes. -When at least one controller uses NvRAM, SDMS BIOS version 4 allows you to -define the order the BIOS will scan the scsi boards. The driver attaches +When at least one controller uses NvRAM, SDMS BIOS version 4 allows you to +define the order the BIOS will scan the scsi boards. The driver attaches controllers according to BIOS information if NvRAM detect option is set. If your controllers do not have NvRAM, you can: @@ -1187,52 +1422,58 @@ If your controllers do not have NvRAM, you can: - Make appropriate changes in the fstab. - Use the 'scsidev' tool from Eric Youngdale. -14.3 Using only 8 bit devices with a WIDE SCSI controller. +14.3 Using only 8 bit devices with a WIDE SCSI controller +--------------------------------------------------------- -When only 8 bit NARROW devices are connected to a 16 bit WIDE SCSI controller, +When only 8 bit NARROW devices are connected to a 16 bit WIDE SCSI controller, you must ensure that lines of the wide part of the SCSI BUS are pulled-up. -This can be achieved by ENABLING the WIDE TERMINATOR portion of the SCSI +This can be achieved by ENABLING the WIDE TERMINATOR portion of the SCSI controller card. + The TYAN 1365 documentation revision 1.2 is not correct about such settings. (page 10, figure 3.3). 14.4 Possible data corruption during a Memory Write and Invalidate +------------------------------------------------------------------ This problem is described in SYMBIOS DEL 397, Part Number 69-039241, ITEM 4. -In some complex situations, 53C875 chips revision <= 3 may start a PCI +In some complex situations, 53C875 chips revision <= 3 may start a PCI Write and Invalidate Command at a not cache-line-aligned 4 DWORDS boundary. This is only possible when Cache Line Size is 8 DWORDS or greater. -Pentium systems use a 8 DWORDS cache line size and so are concerned by +Pentium systems use a 8 DWORDS cache line size and so are concerned by this chip bug, unlike i486 systems that use a 4 DWORDS cache line size. -When this situation occurs, the chip may complete the Write and Invalidate -command after having only filled part of the last cache line involved in +When this situation occurs, the chip may complete the Write and Invalidate +command after having only filled part of the last cache line involved in the transfer, leaving to data corruption the remainder of this cache line. -Not using Write And Invalidate obviously gets rid of this chip bug, and so +Not using Write And Invalidate obviously gets rid of this chip bug, and so it is now the default setting of the driver. -However, for people like me who want to enable this feature, I have added -part of a work-around suggested by SYMBIOS. This work-around resets the -addressing logic when the DATA IN phase is entered and so prevents the bug -from being triggered for the first SCSI MOVE of the phase. This work-around +However, for people like me who want to enable this feature, I have added +part of a work-around suggested by SYMBIOS. This work-around resets the +addressing logic when the DATA IN phase is entered and so prevents the bug +from being triggered for the first SCSI MOVE of the phase. This work-around should be enough according to the following: -The only driver internal data structure that is greater than 8 DWORDS and -that is moved by the SCRIPTS processor is the 'CCB header' that contains -the context of the SCSI transfer. This data structure is aligned on 8 DWORDS -boundary (Pentium Cache Line Size), and so is immune to this chip bug, at +The only driver internal data structure that is greater than 8 DWORDS and +that is moved by the SCRIPTS processor is the 'CCB header' that contains +the context of the SCSI transfer. This data structure is aligned on 8 DWORDS +boundary (Pentium Cache Line Size), and so is immune to this chip bug, at least on Pentium systems. -But the conditions of this bug can be met when a SCSI read command is + +But the conditions of this bug can be met when a SCSI read command is performed using a buffer that is 4 DWORDS but not cache-line aligned. -This cannot happen under Linux when scatter/gather lists are used since -they only refer to system buffers that are well aligned. So, a work around -may only be needed under Linux when a scatter/gather list is not used and +This cannot happen under Linux when scatter/gather lists are used since +they only refer to system buffers that are well aligned. So, a work around +may only be needed under Linux when a scatter/gather list is not used and when the SCSI DATA IN phase is reentered after a phase mismatch. 15. SCSI problem troubleshooting +================================ 15.1 Problem tracking +--------------------- Most SCSI problems are due to a non conformant SCSI bus or to buggy devices. If unfortunately you have SCSI problems, you can check the @@ -1267,193 +1508,286 @@ tagged commands queuing. Try to enable one feature at a time with control commands. For example: -- echo "setsync all 25" >/proc/scsi/ncr53c8xx/0 - Will enable fast synchronous data transfer negotiation for all targets. +:: + + echo "setsync all 25" >/proc/scsi/ncr53c8xx/0 + +Will enable fast synchronous data transfer negotiation for all targets. + +:: -- echo "setflag 3" >/proc/scsi/ncr53c8xx/0 - Will reset flags (no_disc) for target 3, and so will allow it to disconnect - the SCSI Bus. + echo "setflag 3" >/proc/scsi/ncr53c8xx/0 -- echo "settags 3 8" >/proc/scsi/ncr53c8xx/0 - Will enable tagged command queuing for target 3 if that device supports it. +Will reset flags (no_disc) for target 3, and so will allow it to disconnect +the SCSI Bus. -Once you have found the device and the feature that cause problems, just +:: + + echo "settags 3 8" >/proc/scsi/ncr53c8xx/0 + +Will enable tagged command queuing for target 3 if that device supports it. + +Once you have found the device and the feature that cause problems, just disable that feature for that device. 15.2 Understanding hardware error reports +----------------------------------------- -When the driver detects an unexpected error condition, it may display a -message of the following pattern. +When the driver detects an unexpected error condition, it may display a +message of the following pattern:: -sym53c876-0:1: ERROR (0:48) (1-21-65) (f/95) @ (script 7c0:19000000). -sym53c876-0: script cmd = 19000000 -sym53c876-0: regdump: da 10 80 95 47 0f 01 07 75 01 81 21 80 01 09 00. + sym53c876-0:1: ERROR (0:48) (1-21-65) (f/95) @ (script 7c0:19000000). + sym53c876-0: script cmd = 19000000 + sym53c876-0: regdump: da 10 80 95 47 0f 01 07 75 01 81 21 80 01 09 00. -Some fields in such a message may help you understand the cause of the -problem, as follows: +Some fields in such a message may help you understand the cause of the +problem, as follows:: -sym53c876-0:1: ERROR (0:48) (1-21-65) (f/95) @ (script 7c0:19000000). -............A.........B.C....D.E..F....G.H.......I.....J...K....... + sym53c876-0:1: ERROR (0:48) (1-21-65) (f/95) @ (script 7c0:19000000). + ............A.........B.C....D.E..F....G.H.......I.....J...K....... Field A : target number. - SCSI ID of the device the controller was talking with at the moment the + SCSI ID of the device the controller was talking with at the moment the error occurs. Field B : DSTAT io register (DMA STATUS) - Bit 0x40 : MDPE Master Data Parity Error + ======== ============================================================= + Bit 0x40 MDPE Master Data Parity Error Data parity error detected on the PCI BUS. - Bit 0x20 : BF Bus Fault + Bit 0x20 BF Bus Fault PCI bus fault condition detected - Bit 0x01 : IID Illegal Instruction Detected - Set by the chip when it detects an Illegal Instruction format + Bit 0x01 IID Illegal Instruction Detected + Set by the chip when it detects an Illegal Instruction format on some condition that makes an instruction illegal. - Bit 0x80 : DFE Dma Fifo Empty + Bit 0x80 DFE Dma Fifo Empty Pure status bit that does not indicate an error. - If the reported DSTAT value contains a combination of MDPE (0x40), + ======== ============================================================= + + If the reported DSTAT value contains a combination of MDPE (0x40), BF (0x20), then the cause may be likely due to a PCI BUS problem. Field C : SIST io register (SCSI Interrupt Status) - Bit 0x08 : SGE SCSI GROSS ERROR - Indicates that the chip detected a severe error condition + ======== ================================================================== + Bit 0x08 SGE SCSI GROSS ERROR + Indicates that the chip detected a severe error condition on the SCSI BUS that prevents the SCSI protocol from functioning properly. - Bit 0x04 : UDC Unexpected Disconnection - Indicates that the device released the SCSI BUS when the chip - was not expecting this to happen. A device may behave so to - indicate the SCSI initiator that an error condition not reportable using the SCSI protocol has occurred. - Bit 0x02 : RST SCSI BUS Reset - Generally SCSI targets do not reset the SCSI BUS, although any + Bit 0x04 UDC Unexpected Disconnection + Indicates that the device released the SCSI BUS when the chip + was not expecting this to happen. A device may behave so to + indicate the SCSI initiator that an error condition not reportable + using the SCSI protocol has occurred. + Bit 0x02 RST SCSI BUS Reset + Generally SCSI targets do not reset the SCSI BUS, although any device on the BUS can reset it at any time. - Bit 0x01 : PAR Parity + Bit 0x01 PAR Parity SCSI parity error detected. - On a faulty SCSI BUS, any error condition among SGE (0x08), UDC (0x04) and - PAR (0x01) may be detected by the chip. If your SCSI system sometimes - encounters such error conditions, especially SCSI GROSS ERROR, then a SCSI + ======== ================================================================== + + On a faulty SCSI BUS, any error condition among SGE (0x08), UDC (0x04) and + PAR (0x01) may be detected by the chip. If your SCSI system sometimes + encounters such error conditions, especially SCSI GROSS ERROR, then a SCSI BUS problem is likely the cause of these errors. -For fields D,E,F,G and H, you may look into the sym53c8xx_defs.h file +For fields D,E,F,G and H, you may look into the sym53c8xx_defs.h file that contains some minimal comments on IO register bits. + Field D : SOCL Scsi Output Control Latch - This register reflects the state of the SCSI control lines the + This register reflects the state of the SCSI control lines the chip want to drive or compare against. + Field E : SBCL Scsi Bus Control Lines Actual value of control lines on the SCSI BUS. + Field F : SBDL Scsi Bus Data Lines Actual value of data lines on the SCSI BUS. + Field G : SXFER SCSI Transfer - Contains the setting of the Synchronous Period for output and + Contains the setting of the Synchronous Period for output and the current Synchronous offset (offset 0 means asynchronous). + Field H : SCNTL3 Scsi Control Register 3 - Contains the setting of timing values for both asynchronous and - synchronous data transfers. + Contains the setting of timing values for both asynchronous and + synchronous data transfers. -Understanding Fields I, J, K and dumps requires to have good knowledge of +Understanding Fields I, J, K and dumps requires to have good knowledge of SCSI standards, chip cores functionnals and internal driver data structures. -You are not required to decode and understand them, unless you want to help +You are not required to decode and understand them, unless you want to help maintain the driver code. 16. Synchronous transfer negotiation tables +=========================================== Tables below have been created by calling the routine the driver uses for synchronisation negotiation timing calculation and chip setting. -The first table corresponds to Ultra chips 53875 and 53C860 with 80 MHz +The first table corresponds to Ultra chips 53875 and 53C860 with 80 MHz clock and 5 clock divisors. -The second one has been calculated by setting the scsi clock to 40 Mhz -and using 4 clock divisors and so applies to all NCR53C8XX chips in fast +The second one has been calculated by setting the scsi clock to 40 Mhz +and using 4 clock divisors and so applies to all NCR53C8XX chips in fast SCSI-2 mode. Periods are in nano-seconds and speeds are in Mega-transfers per second. -1 Mega-transfers/second means 1 MB/s with 8 bits SCSI and 2 MB/s with +1 Mega-transfers/second means 1 MB/s with 8 bits SCSI and 2 MB/s with Wide16 SCSI. 16.1 Synchronous timings for 53C895, 53C875 and 53C860 SCSI controllers - ---------------------------------------------- - Negotiated NCR settings - Factor Period Speed Period Speed - ------ ------ ------ ------ ------ - 10 25 40.000 25 40.000 (53C895 only) - 11 30.2 33.112 31.25 32.000 (53C895 only) - 12 50 20.000 50 20.000 - 13 52 19.230 62 16.000 - 14 56 17.857 62 16.000 - 15 60 16.666 62 16.000 - 16 64 15.625 75 13.333 - 17 68 14.705 75 13.333 - 18 72 13.888 75 13.333 - 19 76 13.157 87 11.428 - 20 80 12.500 87 11.428 - 21 84 11.904 87 11.428 - 22 88 11.363 93 10.666 - 23 92 10.869 93 10.666 - 24 96 10.416 100 10.000 - 25 100 10.000 100 10.000 - 26 104 9.615 112 8.888 - 27 108 9.259 112 8.888 - 28 112 8.928 112 8.888 - 29 116 8.620 125 8.000 - 30 120 8.333 125 8.000 - 31 124 8.064 125 8.000 - 32 128 7.812 131 7.619 - 33 132 7.575 150 6.666 - 34 136 7.352 150 6.666 - 35 140 7.142 150 6.666 - 36 144 6.944 150 6.666 - 37 148 6.756 150 6.666 - 38 152 6.578 175 5.714 - 39 156 6.410 175 5.714 - 40 160 6.250 175 5.714 - 41 164 6.097 175 5.714 - 42 168 5.952 175 5.714 - 43 172 5.813 175 5.714 - 44 176 5.681 187 5.333 - 45 180 5.555 187 5.333 - 46 184 5.434 187 5.333 - 47 188 5.319 200 5.000 - 48 192 5.208 200 5.000 - 49 196 5.102 200 5.000 - ++-----------------------------+--------+-------+--------------+ +|Negotiated |NCR settings | | ++-------+--------+------------+--------+-------+ | +|Factor |Period |Speed |Period |Speed | | ++-------+--------+------------+--------+-------+--------------+ +|10 | 25 |40.000 | 25 |40.000 | (53C895 only)| ++-------+--------+------------+--------+-------+--------------+ +|11 | 30.2 |33.112 | 31.25 |32.000 | (53C895 only)| ++-------+--------+------------+--------+-------+--------------+ +|12 | 50 |20.000 | 50 |20.000 | | ++-------+--------+------------+--------+-------+--------------+ +|13 | 52 |19.230 | 62 |16.000 | | ++-------+--------+------------+--------+-------+--------------+ +|14 | 56 |17.857 | 62 |16.000 | | ++-------+--------+------------+--------+-------+--------------+ +|15 | 60 |16.666 | 62 |16.000 | | ++-------+--------+------------+--------+-------+--------------+ +|16 | 64 |15.625 | 75 |13.333 | | ++-------+--------+------------+--------+-------+--------------+ +|17 | 68 |14.705 | 75 |13.333 | | ++-------+--------+------------+--------+-------+--------------+ +|18 | 72 |13.888 | 75 |13.333 | | ++-------+--------+------------+--------+-------+--------------+ +|19 | 76 |13.157 | 87 |11.428 | | ++-------+--------+------------+--------+-------+--------------+ +|20 | 80 |12.500 | 87 |11.428 | | ++-------+--------+------------+--------+-------+--------------+ +|21 | 84 |11.904 | 87 |11.428 | | ++-------+--------+------------+--------+-------+--------------+ +|22 | 88 |11.363 | 93 |10.666 | | ++-------+--------+------------+--------+-------+--------------+ +|23 | 92 |10.869 | 93 |10.666 | | ++-------+--------+------------+--------+-------+--------------+ +|24 | 96 |10.416 |100 |10.000 | | ++-------+--------+------------+--------+-------+--------------+ +|25 |100 |10.000 |100 |10.000 | | ++-------+--------+------------+--------+-------+--------------+ +|26 |104 | 9.615 |112 | 8.888 | | ++-------+--------+------------+--------+-------+--------------+ +|27 |108 | 9.259 |112 | 8.888 | | ++-------+--------+------------+--------+-------+--------------+ +|28 |112 | 8.928 |112 | 8.888 | | ++-------+--------+------------+--------+-------+--------------+ +|29 |116 | 8.620 |125 | 8.000 | | ++-------+--------+------------+--------+-------+--------------+ +|30 |120 | 8.333 |125 | 8.000 | | ++-------+--------+------------+--------+-------+--------------+ +|31 |124 | 8.064 |125 | 8.000 | | ++-------+--------+------------+--------+-------+--------------+ +|32 |128 | 7.812 |131 | 7.619 | | ++-------+--------+------------+--------+-------+--------------+ +|33 |132 | 7.575 |150 | 6.666 | | ++-------+--------+------------+--------+-------+--------------+ +|34 |136 | 7.352 |150 | 6.666 | | ++-------+--------+------------+--------+-------+--------------+ +|35 |140 | 7.142 |150 | 6.666 | | ++-------+--------+------------+--------+-------+--------------+ +|36 |144 | 6.944 |150 | 6.666 | | ++-------+--------+------------+--------+-------+--------------+ +|37 |148 | 6.756 |150 | 6.666 | | ++-------+--------+------------+--------+-------+--------------+ +|38 |152 | 6.578 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|39 |156 | 6.410 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|40 |160 | 6.250 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|41 |164 | 6.097 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|42 |168 | 5.952 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|43 |172 | 5.813 |175 | 5.714 | | ++-------+--------+------------+--------+-------+--------------+ +|44 |176 | 5.681 |187 | 5.333 | | ++-------+--------+------------+--------+-------+--------------+ +|45 |180 | 5.555 |187 | 5.333 | | ++-------+--------+------------+--------+-------+--------------+ +|46 |184 | 5.434 |187 | 5.333 | | ++-------+--------+------------+--------+-------+--------------+ +|47 |188 | 5.319 |200 | 5.000 | | ++-------+--------+------------+--------+-------+--------------+ +|48 |192 | 5.208 |200 | 5.000 | | ++-------+--------+------------+--------+-------+--------------+ +|49 |196 | 5.102 |200 | 5.000 | | ++-------+--------+------------+--------+-------+--------------+ 16.2 Synchronous timings for fast SCSI-2 53C8XX controllers - ---------------------------------------------- - Negotiated NCR settings - Factor Period Speed Period Speed - ------ ------ ------ ------ ------ - 25 100 10.000 100 10.000 - 26 104 9.615 125 8.000 - 27 108 9.259 125 8.000 - 28 112 8.928 125 8.000 - 29 116 8.620 125 8.000 - 30 120 8.333 125 8.000 - 31 124 8.064 125 8.000 - 32 128 7.812 131 7.619 - 33 132 7.575 150 6.666 - 34 136 7.352 150 6.666 - 35 140 7.142 150 6.666 - 36 144 6.944 150 6.666 - 37 148 6.756 150 6.666 - 38 152 6.578 175 5.714 - 39 156 6.410 175 5.714 - 40 160 6.250 175 5.714 - 41 164 6.097 175 5.714 - 42 168 5.952 175 5.714 - 43 172 5.813 175 5.714 - 44 176 5.681 187 5.333 - 45 180 5.555 187 5.333 - 46 184 5.434 187 5.333 - 47 188 5.319 200 5.000 - 48 192 5.208 200 5.000 - 49 196 5.102 200 5.000 - - -17. Serial NVRAM (added by Richard Waltham: dormouse@farsrobt.demon.co.uk) ++-----------------------------+----------------+ +|Negotiated |NCR settings | ++-------+--------+------------+--------+-------+ +|Factor |Period |Speed |Period |Speed | ++-------+--------+------------+--------+-------+ +|25 |100 |10.000 |100 |10.000 | ++-------+--------+------------+--------+-------+ +|26 |104 |9.615 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|27 |108 |9.259 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|28 |112 |8.928 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|29 |116 |8.620 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|30 |120 |8.333 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|31 |124 |8.064 |125 | 8.000 | ++-------+--------+------------+--------+-------+ +|32 |128 |7.812 |131 | 7.619 | ++-------+--------+------------+--------+-------+ +|33 |132 |7.575 |150 | 6.666 | ++-------+--------+------------+--------+-------+ +|34 |136 |7.352 |150 | 6.666 | ++-------+--------+------------+--------+-------+ +|35 |140 |7.142 |150 | 6.666 | ++-------+--------+------------+--------+-------+ +|36 |144 |6.944 |150 | 6.666 | ++-------+--------+------------+--------+-------+ +|37 |148 |6.756 |150 | 6.666 | ++-------+--------+------------+--------+-------+ +|38 |152 |6.578 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|39 |156 |6.410 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|40 |160 |6.250 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|41 |164 |6.097 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|42 |168 |5.952 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|43 |172 |5.813 |175 | 5.714 | ++-------+--------+------------+--------+-------+ +|44 |176 |5.681 |187 | 5.333 | ++-------+--------+------------+--------+-------+ +|45 |180 |5.555 |187 | 5.333 | ++-------+--------+------------+--------+-------+ +|46 |184 |5.434 |187 | 5.333 | ++-------+--------+------------+--------+-------+ +|47 |188 |5.319 |200 | 5.000 | ++-------+--------+------------+--------+-------+ +|48 |192 |5.208 |200 | 5.000 | ++-------+--------+------------+--------+-------+ +|49 |196 |5.102 |200 | 5.000 | ++-------+--------+------------+--------+-------+ + + +17. Serial NVRAM +================ + +(added by Richard Waltham: dormouse@farsrobt.demon.co.uk) 17.1 Features +------------- Enabling serial NVRAM support enables detection of the serial NVRAM included -on Symbios and some Symbios compatible host adaptors, and Tekram boards. The -serial NVRAM is used by Symbios and Tekram to hold set up parameters for the +on Symbios and some Symbios compatible host adaptors, and Tekram boards. The +serial NVRAM is used by Symbios and Tekram to hold set up parameters for the host adaptor and its attached drives. The Symbios NVRAM also holds data on the boot order of host adaptors in a @@ -1467,10 +1801,10 @@ NVRAM boot order settings can do this as well as change the order the same types of cards are scanned in, something "reverse probe" cannot do. Tekram boards using Symbios chips, DC390W/F/U, which have NVRAM are detected -and this is used to distinguish between Symbios compatible and Tekram host +and this is used to distinguish between Symbios compatible and Tekram host adaptors. This is used to disable the Symbios compatible "diff" setting -incorrectly set on Tekram boards if the CONFIG_SCSI_53C8XX_SYMBIOS_COMPAT -configuration parameter is set enabling both Symbios and Tekram boards to be +incorrectly set on Tekram boards if the CONFIG_SCSI_53C8XX_SYMBIOS_COMPAT +configuration parameter is set enabling both Symbios and Tekram boards to be used together with the Symbios cards using all their features, including "diff" support. ("led pin" support for Symbios compatible cards can remain enabled when using Tekram cards. It does nothing useful for Tekram host @@ -1478,71 +1812,76 @@ adaptors but does not cause problems either.) 17.2 Symbios NVRAM layout +------------------------- + +typical data at NVRAM address 0x100 (53c810a NVRAM):: + + 00 00 + 64 01 + 8e 0b + + 00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 + + 04 00 0f 00 00 10 00 50 00 00 01 00 00 62 + 04 00 03 00 00 10 00 58 00 00 01 00 00 63 + 04 00 01 00 00 10 00 48 00 00 01 00 00 61 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + fe fe + 00 00 + 00 00 -typical data at NVRAM address 0x100 (53c810a NVRAM) ------------------------------------------------------------ -00 00 -64 01 -8e 0b - -00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 - -04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -04 00 03 00 00 10 00 58 00 00 01 00 00 63 -04 00 01 00 00 10 00 48 00 00 01 00 00 61 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -fe fe -00 00 -00 00 ------------------------------------------------------------ NVRAM layout details -NVRAM Address 0x000-0x0ff not used - 0x100-0x26f initialised data - 0x270-0x7ff not used +============= ================ +NVRAM Address +============= ================ +0x000-0x0ff not used +0x100-0x26f initialised data +0x270-0x7ff not used +============= ================ -general layout +general layout:: header - 6 bytes, data - 356 bytes (checksum is byte sum of this data) @@ -1550,7 +1889,7 @@ general layout --- total 368 bytes -data area layout +data area layout:: controller set up - 20 bytes boot configuration - 56 bytes (4x14 bytes) @@ -1559,121 +1898,126 @@ data area layout --- total 356 bytes ------------------------------------------------------------ -header - -00 00 - ?? start marker -64 01 - byte count (lsb/msb excludes header/trailer) -8e 0b - checksum (lsb/msb excludes header/trailer) ------------------------------------------------------------ -controller set up - -00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 - | | | | - | | | -- host ID - | | | - | | --Removable Media Support - | | 0x00 = none - | | 0x01 = Bootable Device - | | 0x02 = All with Media - | | - | --flag bits 2 - | 0x00000001= scan order hi->low - | (default 0x00 - scan low->hi) - --flag bits 1 - 0x00000001 scam enable - 0x00000010 parity enable - 0x00000100 verbose boot msgs +header:: + + 00 00 - ?? start marker + 64 01 - byte count (lsb/msb excludes header/trailer) + 8e 0b - checksum (lsb/msb excludes header/trailer) + +controller set up:: + + 00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 + | | | | + | | | -- host ID + | | | + | | --Removable Media Support + | | 0x00 = none + | | 0x01 = Bootable Device + | | 0x02 = All with Media + | | + | --flag bits 2 + | 0x00000001= scan order hi->low + | (default 0x00 - scan low->hi) + --flag bits 1 + 0x00000001 scam enable + 0x00000010 parity enable + 0x00000100 verbose boot msgs remaining bytes unknown - they do not appear to change in my current set up for any of the controllers. default set up is identical for 53c810a and 53c875 NVRAM (Removable Media added Symbios BIOS version 4.09) ------------------------------------------------------------ + boot configuration -boot order set by order of the devices in this table +boot order set by order of the devices in this table:: -04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -- 1st controller -04 00 03 00 00 10 00 58 00 00 01 00 00 63 2nd controller -04 00 01 00 00 10 00 48 00 00 01 00 00 61 3rd controller -00 00 00 00 00 00 00 00 00 00 00 00 00 00 4th controller - | | | | | | | | - | | | | | | ---- PCI io port adr - | | | | | --0x01 init/scan at boot time - | | | | --PCI device/function number (0xdddddfff) - | | ----- ?? PCI vendor ID (lsb/msb) - ----PCI device ID (lsb/msb) + 04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -- 1st controller + 04 00 03 00 00 10 00 58 00 00 01 00 00 63 2nd controller + 04 00 01 00 00 10 00 48 00 00 01 00 00 61 3rd controller + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4th controller + | | | | | | | | + | | | | | | ---- PCI io port adr + | | | | | --0x01 init/scan at boot time + | | | | --PCI device/function number (0xdddddfff) + | | ----- ?? PCI vendor ID (lsb/msb) + ----PCI device ID (lsb/msb) -?? use of this data is a guess but seems reasonable + ?? use of this data is a guess but seems reasonable remaining bytes unknown - they do not appear to change in my current set up default set up is identical for 53c810a and 53c875 NVRAM ------------------------------------------------------------ -device set up (up to 16 devices - includes controller) - -0f 00 08 08 64 00 0a 00 - id 0 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - id 15 - | | | | | | - | | | | ----timeout (lsb/msb) - | | | --synch period (0x?? 40 Mtrans/sec- fast 40) (probably 0x28) - | | | (0x30 20 Mtrans/sec- fast 20) - | | | (0x64 10 Mtrans/sec- fast ) - | | | (0xc8 5 Mtrans/sec) - | | | (0x00 asynchronous) - | | -- ?? max sync offset (0x08 in NVRAM on 53c810a) - | | (0x10 in NVRAM on 53c875) - | --device bus width (0x08 narrow) - | (0x10 16 bit wide) - --flag bits - 0x00000001 - disconnect enabled - 0x00000010 - scan at boot time - 0x00000100 - scan luns - 0x00001000 - queue tags enabled +-------------------------------------------------------- + +device set up (up to 16 devices - includes controller):: + + 0f 00 08 08 64 00 0a 00 - id 0 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 - id 15 + | | | | | | + | | | | ----timeout (lsb/msb) + | | | --synch period (0x?? 40 Mtrans/sec- fast 40) (probably 0x28) + | | | (0x30 20 Mtrans/sec- fast 20) + | | | (0x64 10 Mtrans/sec- fast ) + | | | (0xc8 5 Mtrans/sec) + | | | (0x00 asynchronous) + | | -- ?? max sync offset (0x08 in NVRAM on 53c810a) + | | (0x10 in NVRAM on 53c875) + | --device bus width (0x08 narrow) + | (0x10 16 bit wide) + --flag bits + 0x00000001 - disconnect enabled + 0x00000010 - scan at boot time + 0x00000100 - scan luns + 0x00001000 - queue tags enabled remaining bytes unknown - they do not appear to change in my current set up -?? use of this data is a guess but seems reasonable +?? use of this data is a guess but seems reasonable (but it could be max bus width) default set up for 53c810a NVRAM -default set up for 53c875 NVRAM - bus width - 0x10 +default set up for 53c875 NVRAM + + - bus width - 0x10 - sync offset ? - 0x10 - sync period - 0x30 ------------------------------------------------------------ + ?? spare device space (32 bit bus ??) -00 00 00 00 00 00 00 00 (19x8bytes) -. -. -00 00 00 00 00 00 00 00 +:: + + 00 00 00 00 00 00 00 00 (19x8bytes) + . + . + 00 00 00 00 00 00 00 00 default set up is identical for 53c810a and 53c875 NVRAM ------------------------------------------------------------ -trailer +-------------------------------------------------------- -fe fe - ? end marker ? -00 00 -00 00 +trailer:: + + fe fe - ? end marker ? + 00 00 + 00 00 default set up is identical for 53c810a and 53c875 NVRAM ----------------------------------------------------------- @@ -1681,51 +2025,52 @@ default set up is identical for 53c810a and 53c875 NVRAM 17.3 Tekram NVRAM layout +------------------------ nvram 64x16 (1024 bit) -Drive settings - -Drive ID 0-15 (addr 0x0yyyy0 = device setup, yyyy = ID) - (addr 0x0yyyy1 = 0x0000) - - x x x x x x x x x x x x x x x x - | | | | | | | | | - | | | | | | | | ----- parity check 0 - off - | | | | | | | | 1 - on - | | | | | | | | - | | | | | | | ------- sync neg 0 - off - | | | | | | | 1 - on - | | | | | | | - | | | | | | --------- disconnect 0 - off - | | | | | | 1 - on - | | | | | | - | | | | | ----------- start cmd 0 - off - | | | | | 1 - on - | | | | | - | | | | -------------- tagged cmds 0 - off - | | | | 1 - on - | | | | - | | | ---------------- wide neg 0 - off - | | | 1 - on - | | | - --------------------------- sync rate 0 - 10.0 Mtrans/sec - 1 - 8.0 - 2 - 6.6 - 3 - 5.7 - 4 - 5.0 - 5 - 4.0 - 6 - 3.0 - 7 - 2.0 - 7 - 2.0 - 8 - 20.0 - 9 - 16.7 - a - 13.9 - b - 11.9 +Drive settings:: + + Drive ID 0-15 (addr 0x0yyyy0 = device setup, yyyy = ID) + (addr 0x0yyyy1 = 0x0000) + + x x x x x x x x x x x x x x x x + | | | | | | | | | + | | | | | | | | ----- parity check 0 - off + | | | | | | | | 1 - on + | | | | | | | | + | | | | | | | ------- sync neg 0 - off + | | | | | | | 1 - on + | | | | | | | + | | | | | | --------- disconnect 0 - off + | | | | | | 1 - on + | | | | | | + | | | | | ----------- start cmd 0 - off + | | | | | 1 - on + | | | | | + | | | | -------------- tagged cmds 0 - off + | | | | 1 - on + | | | | + | | | ---------------- wide neg 0 - off + | | | 1 - on + | | | + --------------------------- sync rate 0 - 10.0 Mtrans/sec + 1 - 8.0 + 2 - 6.6 + 3 - 5.7 + 4 - 5.0 + 5 - 4.0 + 6 - 3.0 + 7 - 2.0 + 7 - 2.0 + 8 - 20.0 + 9 - 16.7 + a - 13.9 + b - 11.9 Global settings -Host flags 0 (addr 0x100000, 32) +Host flags 0 (addr 0x100000, 32):: x x x x x x x x x x x x x x x x | | | | | | | | | | | | @@ -1733,7 +2078,7 @@ Host flags 0 (addr 0x100000, 32) | | | | | | | | | | | | | | | ----------------------- support for 0 - off | | | | | | | > 2 drives 1 - on - | | | | | | | + | | | | | | | | | | | | | ------------------------- support drives 0 - off | | | | | | > 1Gbytes 1 - on | | | | | | @@ -1753,10 +2098,10 @@ Host flags 0 (addr 0x100000, 32) as BIOS dev 1 - boot device 2 - all -Host flags 1 (addr 0x100001, 33) +Host flags 1 (addr 0x100001, 33):: x x x x x x x x x x x x x x x x - | | | | | | + | | | | | | | | | --------- boot delay 0 - 3 sec | | | 1 - 5 | | | 2 - 10 @@ -1771,7 +2116,7 @@ Host flags 1 (addr 0x100001, 33) 3 - 16 4 - 32 -Host flags 2 (addr 0x100010, 34) +Host flags 2 (addr 0x100010, 34):: x x x x x x x x x x x x x x x x | @@ -1784,41 +2129,41 @@ checksum = 0x1234 - (sum addr 0-63) ---------------------------------------------------------------------------- -default nvram data: +default nvram data:: -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0f07 0x0400 0x0001 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xfbbc + 0x0f07 0x0400 0x0001 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xfbbc 18. Support for Big Endian +========================== The PCI local bus has been primarily designed for x86 architecture. -As a consequence, PCI devices generally expect DWORDS using little endian +As a consequence, PCI devices generally expect DWORDS using little endian byte ordering. 18.1 Big Endian CPU +------------------- -In order to support NCR chips on a Big Endian architecture the driver has to -perform byte reordering each time it is needed. This feature has been -added to the driver by Cort <cort@cs.nmt.edu> and is available in driver -version 2.5 and later ones. For the moment Big Endian support has only +In order to support NCR chips on a Big Endian architecture the driver has to +perform byte reordering each time it is needed. This feature has been +added to the driver by Cort <cort@cs.nmt.edu> and is available in driver +version 2.5 and later ones. For the moment Big Endian support has only been tested on Linux/PPC (PowerPC). 18.2 NCR chip in Big Endian mode of operations +---------------------------------------------- -It can be read in SYMBIOS documentation that some chips support a special +It can be read in SYMBIOS documentation that some chips support a special Big Endian mode, on paper: 53C815, 53C825A, 53C875, 53C875N, 53C895. -This mode of operations is not software-selectable, but needs pin named -BigLit to be pulled-up. Using this mode, most of byte reorderings should +This mode of operations is not software-selectable, but needs pin named +BigLit to be pulled-up. Using this mode, most of byte reorderings should be avoided when the driver is running on a Big Endian CPU. Driver version 2.5 is also, in theory, ready for this feature. - -=============================================================================== -End of NCR53C8XX driver README file diff --git a/Documentation/scsi/ppa.rst b/Documentation/scsi/ppa.rst new file mode 100644 index 000000000000..5fe3859a6892 --- /dev/null +++ b/Documentation/scsi/ppa.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Terse where to get ZIP Drive help info +====================================== + +General Iomega ZIP drive page for Linux: +http://web.archive.org/web/%2E/http://www.torque.net/~campbell/ + +Driver archive for old drivers: +http://web.archive.org/web/%2E/http://www.torque.net/~campbell/ppa + +Linux Parport page (parallel port) +http://web.archive.org/web/%2E/http://www.torque.net/parport/ + +Email list for Linux Parport +linux-parport@torque.net + diff --git a/Documentation/scsi/ppa.txt b/Documentation/scsi/ppa.txt deleted file mode 100644 index 05ff47dbe8d1..000000000000 --- a/Documentation/scsi/ppa.txt +++ /dev/null @@ -1,14 +0,0 @@ --------- Terse where to get ZIP Drive help info -------- - -General Iomega ZIP drive page for Linux: -http://web.archive.org/web/*/http://www.torque.net/~campbell/ - -Driver archive for old drivers: -http://web.archive.org/web/*/http://www.torque.net/~campbell/ppa - -Linux Parport page (parallel port) -http://web.archive.org/web/*/http://www.torque.net/parport/ - -Email list for Linux Parport -linux-parport@torque.net - diff --git a/Documentation/scsi/qlogicfas.txt b/Documentation/scsi/qlogicfas.rst index c211d827fef2..b17f1b3676c3 100644 --- a/Documentation/scsi/qlogicfas.txt +++ b/Documentation/scsi/qlogicfas.rst @@ -1,3 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================= +Qlogic FASXXX Family Driver Notes +================================= This driver supports the Qlogic FASXXX family of chips. This driver only works with the ISA, VLB, and PCMCIA versions of the Qlogic @@ -16,7 +21,8 @@ is provided by the qla1280 driver. Nor does it support the PCI-Basic, which is supported by the 'am53c974' driver. -PCMCIA SUPPORT +PCMCIA Support +============== This currently only works if the card is enabled first from DOS. This means you will have to load your socket and card services, and @@ -31,7 +37,8 @@ it from configuring the card. I am working with the PCMCIA group to make it more flexible, but that may take a while. -ALL CARDS +All Cards +========= The top of the qlogic.c file has a number of defines that controls configuration. As shipped, it provides a balance between speed and @@ -46,7 +53,8 @@ command or something. It comes up faster if this is set to zero, and if you have reliable hardware and connections it may be more useful to not reset things. -SOME TROUBLESHOOTING TIPS +Some Troubleshooting Tips +========================= Make sure it works properly under DOS. You should also do an initial FDISK on a new drive if you want partitions. @@ -54,7 +62,8 @@ on a new drive if you want partitions. Don't enable all the speedups first. If anything is wrong, they will make any problem worse. -IMPORTANT +Important +========= The best way to test if your cables, termination, etc. are good is to copy a very big file (e.g. a doublespace container file, or a very diff --git a/Documentation/scsi/scsi-changer.txt b/Documentation/scsi/scsi-changer.rst index ade046ea7c17..ab60e7e61a6c 100644 --- a/Documentation/scsi/scsi-changer.txt +++ b/Documentation/scsi/scsi-changer.rst @@ -1,4 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 +======================================== README for the SCSI media changer driver ======================================== @@ -28,15 +30,17 @@ The SCSI changer model is complex, compared to - for example - IDE-CD changers. But it allows to handle nearly all possible cases. It knows 4 different types of changer elements: - media transport - this one shuffles around the media, i.e. the + =============== ================================================== + media transport this one shuffles around the media, i.e. the transport arm. Also known as "picker". - storage - a slot which can hold a media. - import/export - the same as above, but is accessible from outside, + storage a slot which can hold a media. + import/export the same as above, but is accessible from outside, i.e. there the operator (you !) can use this to fill in and remove media from the changer. Sometimes named "mailslot". - data transfer - this is the device which reads/writes, i.e. the + data transfer this is the device which reads/writes, i.e. the CD-ROM / Tape / whatever drive. + =============== ================================================== None of these is limited to one: A huge Jukebox could have slots for 123 CD-ROM's, 5 CD-ROM readers (and therefore 6 SCSI ID's: the changer @@ -131,24 +135,23 @@ timeout_init=<seconds> timeout_move=<seconds> timeout for all other commands (default: 120). -dt_id=<id1>,<id2>,... -dt_lun=<lun1>,<lun2>,... +dt_id=<id1>,<id2>,... / dt_lun=<lun1>,<lun2>,... These two allow to specify the SCSI ID and LUN for the data transfer elements. You likely don't need this as the jukebox should provide this information. But some devices don't ... -vendor_firsts= -vendor_counts= -vendor_labels= +vendor_firsts=, vendor_counts=, vendor_labels= These insmod options can be used to tell the driver that there are some vendor-specific element types. Grundig for example does this. Some jukeboxes have a printer to label fresh burned CDs, which is addressed as element 0xc000 (type 5). To tell the - driver about this vendor-specific element, use this: + driver about this vendor-specific element, use this:: + $ insmod ch \ vendor_firsts=0xc000 \ vendor_counts=1 \ vendor_labels=printer + All three insmod options accept up to four comma-separated values, this way you can configure the element types 5-8. You likely need the SCSI specs for the device in question to @@ -162,13 +165,15 @@ Credits I wrote this driver using the famous mailing-patches-around-the-world method. With (more or less) help from: - Daniel Moehwald <moehwald@hdg.de> - Dane Jasper <dane@sonic.net> - R. Scott Bailey <sbailey@dsddi.eds.com> - Jonathan Corbet <corbet@lwn.net> + - Daniel Moehwald <moehwald@hdg.de> + - Dane Jasper <dane@sonic.net> + - R. Scott Bailey <sbailey@dsddi.eds.com> + - Jonathan Corbet <corbet@lwn.net> Special thanks go to - Martin Kuehne <martin.kuehne@bnbt.de> + + - Martin Kuehne <martin.kuehne@bnbt.de> + for a old, second-hand (but full functional) cdrom jukebox which I use to develop/test driver and tools now. @@ -176,5 +181,4 @@ Have fun, Gerd --- Gerd Knorr <kraxel@bytesex.org> diff --git a/Documentation/scsi/scsi-generic.txt b/Documentation/scsi/scsi-generic.rst index 51be20a6a14d..258505e557a6 100644 --- a/Documentation/scsi/scsi-generic.txt +++ b/Documentation/scsi/scsi-generic.rst @@ -1,6 +1,11 @@ - Notes on Linux SCSI Generic (sg) driver - --------------------------------------- +.. SPDX-License-Identifier: GPL-2.0 + +======================================= +Notes on Linux SCSI Generic (sg) driver +======================================= + 20020126 + Introduction ============ The SCSI Generic driver (sg) is one of the four "high level" SCSI device @@ -18,7 +23,7 @@ and examples. Major versions of the sg driver =============================== There are three major versions of sg found in the linux kernel (lk): - - sg version 1 (original) from 1992 to early 1999 (lk 2.2.5) . + - sg version 1 (original) from 1992 to early 1999 (lk 2.2.5) . It is based in the sg_header interface structure. - sg version 2 from lk 2.2.6 in the 2.2 series. It is based on an extended version of the sg_header interface structure. @@ -29,12 +34,16 @@ There are three major versions of sg found in the linux kernel (lk): Sg driver documentation ======================= The most recent documentation of the sg driver is kept at the Linux -Documentation Project's (LDP) site: -http://www.tldp.org/HOWTO/SCSI-Generic-HOWTO +Documentation Project's (LDP) site: + +- http://www.tldp.org/HOWTO/SCSI-Generic-HOWTO + This describes the sg version 3 driver found in the lk 2.4 series. + The LDP renders documents in single and multiple page HTML, postscript and pdf. This document can also be found at: -http://sg.danny.cz/sg/p/sg_v3_ho.html + +- http://sg.danny.cz/sg/p/sg_v3_ho.html Documentation for the version 2 sg driver found in the lk 2.2 series can be found at http://sg.danny.cz/sg/. A larger version @@ -45,23 +54,27 @@ found at http://www.torque.net/sg/p/original/SCSI-Programming-HOWTO.txt and in the LDP archives. A changelog with brief notes can be found in the -/usr/src/linux/include/scsi/sg.h file. Note that the glibc maintainers copy -and edit this file (removing its changelog for example) before placing it -in /usr/include/scsi/sg.h . Driver debugging information and other notes +/usr/src/linux/include/scsi/sg.h file. Note that the glibc maintainers copy +and edit this file (removing its changelog for example) before placing it +in /usr/include/scsi/sg.h . Driver debugging information and other notes can be found at the top of the /usr/src/linux/drivers/scsi/sg.c file. -A more general description of the Linux SCSI subsystem of which sg is a +A more general description of the Linux SCSI subsystem of which sg is a part can be found at http://www.tldp.org/HOWTO/SCSI-2.4-HOWTO . Example code and utilities ========================== There are two packages of sg utilities: - - sg3_utils for the sg version 3 driver found in lk 2.4 - - sg_utils for the sg version 2 (and original) driver found in lk 2.2 + + ========= ========================================================== + sg3_utils for the sg version 3 driver found in lk 2.4 + sg_utils for the sg version 2 (and original) driver found in lk 2.2 and earlier + ========= ========================================================== + Both packages will work in the lk 2.4 series however sg3_utils offers more -capabilities. They can be found at: http://sg.danny.cz/sg/sg3_utils.html and +capabilities. They can be found at: http://sg.danny.cz/sg/sg3_utils.html and freecode.com Another approach is to look at the applications that use the sg driver. @@ -72,30 +85,34 @@ Mapping of Linux kernel versions to sg driver versions ====================================================== Here is a list of linux kernels in the 2.4 series that had new version of the sg driver: - lk 2.4.0 : sg version 3.1.17 - lk 2.4.7 : sg version 3.1.19 - lk 2.4.10 : sg version 3.1.20 ** - lk 2.4.17 : sg version 3.1.22 -** There were 3 changes to sg version 3.1.20 by third parties in the - next six linux kernel versions. + - lk 2.4.0 : sg version 3.1.17 + - lk 2.4.7 : sg version 3.1.19 + - lk 2.4.10 : sg version 3.1.20 [#]_ + - lk 2.4.17 : sg version 3.1.22 + +.. [#] There were 3 changes to sg version 3.1.20 by third parties in the + next six linux kernel versions. -For reference here is a list of linux kernels in the 2.2 series that had +For reference here is a list of linux kernels in the 2.2 series that had new version of the sg driver: - lk 2.2.0 : original sg version [with no version number] - lk 2.2.6 : sg version 2.1.31 - lk 2.2.8 : sg version 2.1.32 - lk 2.2.10 : sg version 2.1.34 [SG_GET_VERSION_NUM ioctl first appeared] - lk 2.2.14 : sg version 2.1.36 - lk 2.2.16 : sg version 2.1.38 - lk 2.2.17 : sg version 2.1.39 - lk 2.2.20 : sg version 2.1.40 + + - lk 2.2.0 : original sg version [with no version number] + - lk 2.2.6 : sg version 2.1.31 + - lk 2.2.8 : sg version 2.1.32 + - lk 2.2.10 : sg version 2.1.34 [SG_GET_VERSION_NUM ioctl first appeared] + - lk 2.2.14 : sg version 2.1.36 + - lk 2.2.16 : sg version 2.1.38 + - lk 2.2.17 : sg version 2.1.39 + - lk 2.2.20 : sg version 2.1.40 The lk 2.5 development series has recently commenced and it currently contains sg version 3.5.23 which is functionally equivalent to sg -version 3.1.22 found in lk 2.4.17 . +version 3.1.22 found in lk 2.4.17. Douglas Gilbert + 26th January 2002 + dgilbert@interlog.com diff --git a/Documentation/scsi/scsi-parameters.txt b/Documentation/scsi/scsi-parameters.rst index 25a4b4cf04a6..9aba897c97ac 100644 --- a/Documentation/scsi/scsi-parameters.txt +++ b/Documentation/scsi/scsi-parameters.rst @@ -1,31 +1,35 @@ - SCSI Kernel Parameters - ~~~~~~~~~~~~~~~~~~~~~~ +.. SPDX-License-Identifier: GPL-2.0 + +====================== +SCSI Kernel Parameters +====================== See Documentation/admin-guide/kernel-parameters.rst for general information on specifying module parameters. This document may not be entirely up to date and comprehensive. The command -"modinfo -p ${modulename}" shows a current list of all parameters of a loadable +``modinfo -p ${modulename}`` shows a current list of all parameters of a loadable module. Loadable modules, after being loaded into the running kernel, also reveal their parameters in /sys/module/${modulename}/parameters/. Some of these parameters may be changed at runtime by the command -"echo -n ${value} > /sys/module/${modulename}/parameters/${parm}". +``echo -n ${value} > /sys/module/${modulename}/parameters/${parm}``. +:: advansys= [HW,SCSI] See header of drivers/scsi/advansys.c. aha152x= [HW,SCSI] - See Documentation/scsi/aha152x.txt. + See Documentation/scsi/aha152x.rst. aha1542= [HW,SCSI] Format: <portbase>[,<buson>,<busoff>[,<dmaspeed>]] aic7xxx= [HW,SCSI] - See Documentation/scsi/aic7xxx.txt. + See Documentation/scsi/aic7xxx.rst. aic79xx= [HW,SCSI] - See Documentation/scsi/aic79xx.txt. + See Documentation/scsi/aic79xx.rst. atascsi= [HW,SCSI] See drivers/scsi/atari_scsi.c. @@ -57,19 +61,19 @@ parameters may be changed at runtime by the command See header of drivers/scsi/NCR_D700.c. ncr5380= [HW,SCSI] - See Documentation/scsi/g_NCR5380.txt. + See Documentation/scsi/g_NCR5380.rst. ncr53c400= [HW,SCSI] - See Documentation/scsi/g_NCR5380.txt. + See Documentation/scsi/g_NCR5380.rst. ncr53c400a= [HW,SCSI] - See Documentation/scsi/g_NCR5380.txt. + See Documentation/scsi/g_NCR5380.rst. ncr53c8xx= [HW,SCSI] osst= [HW,SCSI] SCSI Tape Driver Format: <buffer_size>,<write_threshold> - See also Documentation/scsi/st.txt. + See also Documentation/scsi/st.rst. scsi_debug_*= [SCSI] See drivers/scsi/scsi_debug.c. @@ -101,7 +105,7 @@ parameters may be changed at runtime by the command See header of drivers/scsi/sim710.c. st= [HW,SCSI] SCSI tape parameters (buffers, etc.) - See Documentation/scsi/st.txt. + See Documentation/scsi/st.rst. wd33c93= [HW,SCSI] See header of drivers/scsi/wd33c93.c. diff --git a/Documentation/scsi/scsi.txt b/Documentation/scsi/scsi.rst index 3d99d38cb62a..276918eb4d74 100644 --- a/Documentation/scsi/scsi.txt +++ b/Documentation/scsi/scsi.rst @@ -1,44 +1,47 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================ SCSI subsystem documentation ============================ + The Linux Documentation Project (LDP) maintains a document describing the SCSI subsystem in the Linux kernel (lk) 2.4 series. See: http://www.tldp.org/HOWTO/SCSI-2.4-HOWTO . The LDP has single and multiple page HTML renderings as well as postscript and pdf. It can also be found at: -http://web.archive.org/web/*/http://www.torque.net/scsi/SCSI-2.4-HOWTO +http://web.archive.org/web/%2E/http://www.torque.net/scsi/SCSI-2.4-HOWTO Notes on using modules in the SCSI subsystem ============================================ -The scsi support in the linux kernel can be modularized in a number of +The scsi support in the linux kernel can be modularized in a number of different ways depending upon the needs of the end user. To understand your options, we should first define a few terms. -The scsi-core (also known as the "mid level") contains the core of scsi +The scsi-core (also known as the "mid level") contains the core of scsi support. Without it you can do nothing with any of the other scsi drivers. The scsi core support can be a module (scsi_mod.o), or it can be built into -the kernel. If the core is a module, it must be the first scsi module -loaded, and if you unload the modules, it will have to be the last one +the kernel. If the core is a module, it must be the first scsi module +loaded, and if you unload the modules, it will have to be the last one unloaded. In practice the modprobe and rmmod commands (and "autoclean") will enforce the correct ordering of loading and unloading modules in the SCSI subsystem. -The individual upper and lower level drivers can be loaded in any order +The individual upper and lower level drivers can be loaded in any order once the scsi core is present in the kernel (either compiled in or loaded as a module). The disk driver (sd_mod.o), cdrom driver (sr_mod.o), -tape driver ** (st.o) and scsi generics driver (sg.o) represent the upper -level drivers to support the various assorted devices which can be -controlled. You can for example load the tape driver to use the tape drive, +tape driver [1]_ (st.o) and scsi generics driver (sg.o) represent the upper +level drivers to support the various assorted devices which can be +controlled. You can for example load the tape driver to use the tape drive, and then unload it once you have no further need for the driver (and release the associated memory). The lower level drivers are the ones that support the individual cards that are supported for the hardware platform that you are running under. Those individual cards are often called Host Bus Adapters (HBAs). For example the -aic7xxx.o driver is used to control all recent SCSI controller cards from -Adaptec. Almost all lower level drivers can be built either as modules or +aic7xxx.o driver is used to control all recent SCSI controller cards from +Adaptec. Almost all lower level drivers can be built either as modules or built into the kernel. - -** There is a variant of the st driver for controlling OnStream tape - devices. Its module name is osst.o . +.. [1] There is a variant of the st driver for controlling OnStream tape + devices. Its module name is osst.o . diff --git a/Documentation/scsi/scsi_eh.txt b/Documentation/scsi/scsi_eh.rst index 1b7436932a2b..7d78c2475615 100644 --- a/Documentation/scsi/scsi_eh.txt +++ b/Documentation/scsi/scsi_eh.rst @@ -1,35 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0 +======= SCSI EH -====================================== +======= - This document describes SCSI midlayer error handling infrastructure. -Please refer to Documentation/scsi/scsi_mid_low_api.txt for more +This document describes SCSI midlayer error handling infrastructure. +Please refer to Documentation/scsi/scsi_mid_low_api.rst for more information regarding SCSI midlayer. -TABLE OF CONTENTS +.. TABLE OF CONTENTS -[1] How SCSI commands travel through the midlayer and to EH - [1-1] struct scsi_cmnd - [1-2] How do scmd's get completed? - [1-2-1] Completing a scmd w/ scsi_done - [1-2-2] Completing a scmd w/ timeout - [1-3] How EH takes over -[2] How SCSI EH works - [2-1] EH through fine-grained callbacks - [2-1-1] Overview - [2-1-2] Flow of scmds through EH - [2-1-3] Flow of control - [2-2] EH through transportt->eh_strategy_handler() - [2-2-1] Pre transportt->eh_strategy_handler() SCSI midlayer conditions - [2-2-2] Post transportt->eh_strategy_handler() SCSI midlayer conditions - [2-2-3] Things to consider + [1] How SCSI commands travel through the midlayer and to EH + [1-1] struct scsi_cmnd + [1-2] How do scmd's get completed? + [1-2-1] Completing a scmd w/ scsi_done + [1-2-2] Completing a scmd w/ timeout + [1-3] How EH takes over + [2] How SCSI EH works + [2-1] EH through fine-grained callbacks + [2-1-1] Overview + [2-1-2] Flow of scmds through EH + [2-1-3] Flow of control + [2-2] EH through transportt->eh_strategy_handler() + [2-2-1] Pre transportt->eh_strategy_handler() SCSI midlayer conditions + [2-2-2] Post transportt->eh_strategy_handler() SCSI midlayer conditions + [2-2-3] Things to consider -[1] How SCSI commands travel through the midlayer and to EH +1. How SCSI commands travel through the midlayer and to EH +========================================================== -[1-1] struct scsi_cmnd +1.1 struct scsi_cmnd +-------------------- - Each SCSI command is represented with struct scsi_cmnd (== scmd). A +Each SCSI command is represented with struct scsi_cmnd (== scmd). A scmd has two list_head's to link itself into lists. The two are scmd->list and scmd->eh_entry. The former is used for free list or per-device allocated scmd list and not of much interest to this EH @@ -38,25 +42,28 @@ otherwise stated scmds are always linked using scmd->eh_entry in this discussion. -[1-2] How do scmd's get completed? +1.2 How do scmd's get completed? +-------------------------------- - Once LLDD gets hold of a scmd, either the LLDD will complete the +Once LLDD gets hold of a scmd, either the LLDD will complete the command by calling scsi_done callback passed from midlayer when invoking hostt->queuecommand() or the block layer will time it out. -[1-2-1] Completing a scmd w/ scsi_done +1.2.1 Completing a scmd w/ scsi_done +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - For all non-EH commands, scsi_done() is the completion callback. It +For all non-EH commands, scsi_done() is the completion callback. It just calls blk_complete_request() to delete the block layer timer and raise SCSI_SOFTIRQ - SCSI_SOFTIRQ handler scsi_softirq calls scsi_decide_disposition() to +SCSI_SOFTIRQ handler scsi_softirq calls scsi_decide_disposition() to determine what to do with the command. scsi_decide_disposition() looks at the scmd->result value and sense data to determine what to do with the command. - SUCCESS + scsi_finish_command() is invoked for the command. The function does some maintenance chores and then calls scsi_io_completion() to finish the I/O. @@ -66,17 +73,21 @@ with the command. of the data in case of an error. - NEEDS_RETRY + - ADD_TO_MLQUEUE + scmd is requeued to blk queue. - otherwise + scsi_eh_scmd_add(scmd) is invoked for the command. See [1-3] for details of this function. -[1-2-2] Completing a scmd w/ timeout +1.2.2 Completing a scmd w/ timeout +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - The timeout handler is scsi_times_out(). When a timeout occurs, this +The timeout handler is scsi_times_out(). When a timeout occurs, this function 1. invokes optional hostt->eh_timed_out() callback. Return value can @@ -101,18 +112,21 @@ function 3. scsi_eh_scmd_add(scmd, SCSI_EH_CANCEL_CMD) is invoked for the command. See [1-4] for more information. -[1-3] Asynchronous command aborts +1.3 Asynchronous command aborts +------------------------------- After a timeout occurs a command abort is scheduled from scsi_abort_command(). If the abort is successful the command will either be retried (if the number of retries is not exhausted) or terminated with DID_TIME_OUT. + Otherwise scsi_eh_scmd_add() is invoked for the command. See [1-4] for more information. -[1-4] How EH takes over +1.4 How EH takes over +--------------------- - scmds enter EH via scsi_eh_scmd_add(), which does the following. +scmds enter EH via scsi_eh_scmd_add(), which does the following. 1. Links scmd->eh_entry to shost->eh_cmd_q @@ -122,19 +136,19 @@ function 4. Wakes up SCSI EH thread if shost->host_busy == shost->host_failed - As can be seen above, once any scmd is added to shost->eh_cmd_q, +As can be seen above, once any scmd is added to shost->eh_cmd_q, SHOST_RECOVERY shost_state bit is turned on. This prevents any new scmd to be issued from blk queue to the host; eventually, all scmds on the host either complete normally, fail and get added to eh_cmd_q, or time out and get added to shost->eh_cmd_q. - If all scmds either complete or fail, the number of in-flight scmds +If all scmds either complete or fail, the number of in-flight scmds becomes equal to the number of failed scmds - i.e. shost->host_busy == shost->host_failed. This wakes up SCSI EH thread. So, once woken up, SCSI EH thread can expect that all in-flight commands have failed and are linked on shost->eh_cmd_q. - Note that this does not mean lower layers are quiescent. If a LLDD +Note that this does not mean lower layers are quiescent. If a LLDD completed a scmd with error status, the LLDD and lower layers are assumed to forget about the scmd at that point. However, if a scmd has timed out, unless hostt->eh_timed_out() made lower layers forget @@ -143,13 +157,14 @@ active as long as lower layers are concerned and completion could occur at any time. Of course, all such completions are ignored as the timer has already expired. - We'll talk about how SCSI EH takes actions to abort - make LLDD +We'll talk about how SCSI EH takes actions to abort - make LLDD forget about - timed out scmds later. -[2] How SCSI EH works +2. How SCSI EH works +==================== - LLDD's can implement SCSI EH actions in one of the following two +LLDD's can implement SCSI EH actions in one of the following two ways. - Fine-grained EH callbacks @@ -162,7 +177,7 @@ ways. handling. As such, it should do all chores the SCSI midlayer performs during recovery. This will be discussed in [2-2]. - Once recovery is complete, SCSI EH resumes normal operation by +Once recovery is complete, SCSI EH resumes normal operation by calling scsi_restart_operations(), which 1. Checks if door locking is needed and locks door. @@ -177,34 +192,38 @@ calling scsi_restart_operations(), which 4. Kicks queues in all devices on the host in the asses -[2-1] EH through fine-grained callbacks +2.1 EH through fine-grained callbacks +------------------------------------- -[2-1-1] Overview +2.1.1 Overview +^^^^^^^^^^^^^^ - If eh_strategy_handler() is not present, SCSI midlayer takes charge +If eh_strategy_handler() is not present, SCSI midlayer takes charge of driving error handling. EH's goals are two - make LLDD, host and device forget about timed out scmds and make them ready for new commands. A scmd is said to be recovered if the scmd is forgotten by lower layers and lower layers are ready to process or fail the scmd again. - To achieve these goals, EH performs recovery actions with increasing +To achieve these goals, EH performs recovery actions with increasing severity. Some actions are performed by issuing SCSI commands and others are performed by invoking one of the following fine-grained hostt EH callbacks. Callbacks may be omitted and omitted ones are considered to fail always. -int (* eh_abort_handler)(struct scsi_cmnd *); -int (* eh_device_reset_handler)(struct scsi_cmnd *); -int (* eh_bus_reset_handler)(struct scsi_cmnd *); -int (* eh_host_reset_handler)(struct scsi_cmnd *); +:: - Higher-severity actions are taken only when lower-severity actions + int (* eh_abort_handler)(struct scsi_cmnd *); + int (* eh_device_reset_handler)(struct scsi_cmnd *); + int (* eh_bus_reset_handler)(struct scsi_cmnd *); + int (* eh_host_reset_handler)(struct scsi_cmnd *); + +Higher-severity actions are taken only when lower-severity actions cannot recover some of failed scmds. Also, note that failure of the highest-severity action means EH failure and results in offlining of all unrecovered devices. - During recovery, the following rules are followed +During recovery, the following rules are followed - Recovery actions are performed on failed scmds on the to do list, eh_work_q. If a recovery action succeeds for a scmd, recovered @@ -221,58 +240,72 @@ all unrecovered devices. timed-out scmds, SCSI EH ensures that LLDD forgets about a scmd before reusing it for EH commands. - When a scmd is recovered, the scmd is moved from eh_work_q to EH +When a scmd is recovered, the scmd is moved from eh_work_q to EH local eh_done_q using scsi_eh_finish_cmd(). After all scmds are recovered (eh_work_q is empty), scsi_eh_flush_done_q() is invoked to either retry or error-finish (notify upper layer of failure) recovered scmds. - scmds are retried iff its sdev is still online (not offlined during +scmds are retried iff its sdev is still online (not offlined during EH), REQ_FAILFAST is not set and ++scmd->retries is less than scmd->allowed. -[2-1-2] Flow of scmds through EH +2.1.2 Flow of scmds through EH +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 1. Error completion / time out - ACTION: scsi_eh_scmd_add() is invoked for scmd + + :ACTION: scsi_eh_scmd_add() is invoked for scmd + - add scmd to shost->eh_cmd_q - set SHOST_RECOVERY - shost->host_failed++ - LOCKING: shost->host_lock + + :LOCKING: shost->host_lock 2. EH starts - ACTION: move all scmds to EH's local eh_work_q. shost->eh_cmd_q - is cleared. - LOCKING: shost->host_lock (not strictly necessary, just for + + :ACTION: move all scmds to EH's local eh_work_q. shost->eh_cmd_q + is cleared. + + :LOCKING: shost->host_lock (not strictly necessary, just for consistency) 3. scmd recovered - ACTION: scsi_eh_finish_cmd() is invoked to EH-finish scmd + + :ACTION: scsi_eh_finish_cmd() is invoked to EH-finish scmd + - scsi_setup_cmd_retry() - move from local eh_work_q to local eh_done_q - LOCKING: none - CONCURRENCY: at most one thread per separate eh_work_q to - keep queue manipulation lockless + + :LOCKING: none + + :CONCURRENCY: at most one thread per separate eh_work_q to + keep queue manipulation lockless 4. EH completes - ACTION: scsi_eh_flush_done_q() retries scmds or notifies upper - layer of failure. May be called concurrently but must have - a no more than one thread per separate eh_work_q to - manipulate the queue locklessly - - scmd is removed from eh_done_q and scmd->eh_entry is cleared - - if retry is necessary, scmd is requeued using - scsi_queue_insert() - - otherwise, scsi_finish_command() is invoked for scmd - - zero shost->host_failed - LOCKING: queue or finish function performs appropriate locking + :ACTION: scsi_eh_flush_done_q() retries scmds or notifies upper + layer of failure. May be called concurrently but must have + a no more than one thread per separate eh_work_q to + manipulate the queue locklessly -[2-1-3] Flow of control + - scmd is removed from eh_done_q and scmd->eh_entry is cleared + - if retry is necessary, scmd is requeued using + scsi_queue_insert() + - otherwise, scsi_finish_command() is invoked for scmd + - zero shost->host_failed + + :LOCKING: queue or finish function performs appropriate locking + + +2.1.3 Flow of control +^^^^^^^^^^^^^^^^^^^^^^ EH through fine-grained callbacks start from scsi_unjam_host(). -<<scsi_unjam_host>> +``scsi_unjam_host`` 1. Lock shost->host_lock, splice_init shost->eh_cmd_q into local eh_work_q and unlock host_lock. Note that shost->eh_cmd_q is @@ -280,7 +313,7 @@ scmd->allowed. 2. Invoke scsi_eh_get_sense. - <<scsi_eh_get_sense>> + ``scsi_eh_get_sense`` This action is taken for each error-completed (!SCSI_EH_CANCEL_CMD) commands without valid sense data. Most @@ -315,7 +348,7 @@ scmd->allowed. 3. If !list_empty(&eh_work_q), invoke scsi_eh_abort_cmds(). - <<scsi_eh_abort_cmds>> + ``scsi_eh_abort_cmds`` This action is taken for each timed out command when no_async_abort is enabled in the host template. @@ -339,14 +372,14 @@ scmd->allowed. 4. If !list_empty(&eh_work_q), invoke scsi_eh_ready_devs() - <<scsi_eh_ready_devs>> + ``scsi_eh_ready_devs`` This function takes four increasingly more severe measures to make failed sdevs ready for new commands. 1. Invoke scsi_eh_stu() - <<scsi_eh_stu>> + ``scsi_eh_stu`` For each sdev which has failed scmds with valid sense data of which scsi_check_sense()'s verdict is FAILED, @@ -369,7 +402,7 @@ scmd->allowed. 2. If !list_empty(&eh_work_q), invoke scsi_eh_bus_device_reset(). - <<scsi_eh_bus_device_reset>> + ``scsi_eh_bus_device_reset`` This action is very similar to scsi_eh_stu() except that, instead of issuing STU, hostt->eh_device_reset_handler() @@ -379,7 +412,7 @@ scmd->allowed. 3. If !list_empty(&eh_work_q), invoke scsi_eh_bus_reset() - <<scsi_eh_bus_reset>> + ``scsi_eh_bus_reset`` hostt->eh_bus_reset_handler() is invoked for each channel with failed scmds. If bus reset succeeds, all failed @@ -388,7 +421,7 @@ scmd->allowed. 4. If !list_empty(&eh_work_q), invoke scsi_eh_host_reset() - <<scsi_eh_host_reset>> + ``scsi_eh_host_reset`` This is the last resort. hostt->eh_host_reset_handler() is invoked. If host reset succeeds, all failed scmds on @@ -396,14 +429,14 @@ scmd->allowed. 5. If !list_empty(&eh_work_q), invoke scsi_eh_offline_sdevs() - <<scsi_eh_offline_sdevs>> + ``scsi_eh_offline_sdevs`` Take all sdevs which still have unrecovered scmds offline and EH-finish the scmds. 5. Invoke scsi_eh_flush_done_q(). - <<scsi_eh_flush_done_q>> + ``scsi_eh_flush_done_q`` At this point all scmds are recovered (or given up) and put on eh_done_q by scsi_eh_finish_cmd(). This function @@ -411,9 +444,10 @@ scmd->allowed. layer of failure of the scmds. -[2-2] EH through transportt->eh_strategy_handler() +2.2 EH through transportt->eh_strategy_handler() +------------------------------------------------ - transportt->eh_strategy_handler() is invoked in the place of +transportt->eh_strategy_handler() is invoked in the place of scsi_unjam_host() and it is responsible for whole recovery process. On completion, the handler should have made lower layers forget about all failed scmds and either ready for new commands or offline. Also, @@ -422,7 +456,8 @@ SCSI midlayer. IOW, of the steps described in [2-1-2], all steps except for #1 must be implemented by eh_strategy_handler(). -[2-2-1] Pre transportt->eh_strategy_handler() SCSI midlayer conditions +2.2.1 Pre transportt->eh_strategy_handler() SCSI midlayer conditions +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The following conditions are true on entry to the handler. @@ -435,7 +470,8 @@ except for #1 must be implemented by eh_strategy_handler(). - shost->host_failed == shost->host_busy -[2-2-2] Post transportt->eh_strategy_handler() SCSI midlayer conditions +2.2.2 Post transportt->eh_strategy_handler() SCSI midlayer conditions +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The following conditions must be true on exit from the handler. @@ -453,7 +489,8 @@ except for #1 must be implemented by eh_strategy_handler(). ->allowed to limit the number of retries. -[2-2-3] Things to consider +2.2.3 Things to consider +^^^^^^^^^^^^^^^^^^^^^^^^ - Know that timed out scmds are still active on lower layers. Make lower layers forget about them before doing anything else with @@ -469,7 +506,7 @@ except for #1 must be implemented by eh_strategy_handler(). offline. --- Tejun Heo htejun@gmail.com + 11th September 2005 diff --git a/Documentation/scsi/scsi_fc_transport.txt b/Documentation/scsi/scsi_fc_transport.rst index f79282fc48d7..176c1862cb9b 100644 --- a/Documentation/scsi/scsi_fc_transport.txt +++ b/Documentation/scsi/scsi_fc_transport.rst @@ -1,8 +1,13 @@ - SCSI FC Tansport - ============================================= +.. SPDX-License-Identifier: GPL-2.0 + +================ +SCSI FC Tansport +================ Date: 11/18/2008 -Kernel Revisions for features: + +Kernel Revisions for features:: + rports : <<TBS>> vports : 2.6.22 bsg support : 2.6.30 (?TBD?) @@ -12,25 +17,27 @@ Introduction ============ This file documents the features and components of the SCSI FC Transport. It also provides documents the API between the transport and FC LLDDs. -The FC transport can be found at: + +The FC transport can be found at:: + drivers/scsi/scsi_transport_fc.c include/scsi/scsi_transport_fc.h include/scsi/scsi_netlink_fc.h include/scsi/scsi_bsg_fc.h -This file is found at Documentation/scsi/scsi_fc_transport.txt +This file is found at Documentation/scsi/scsi_fc_transport.rst FC Remote Ports (rports) -======================================================================== +======================== << To Be Supplied >> FC Virtual Ports (vports) -======================================================================== +========================= -Overview: -------------------------------- +Overview +-------- New FC standards have defined mechanisms which allows for a single physical port to appear on as multiple communication ports. Using the N_Port Id @@ -61,12 +68,14 @@ Overview: Thus, whether a FC port is based on a physical port or on a virtual port, each will appear as a unique scsi_host with its own target and lun space. - Note: At this time, the transport is written to create only NPIV-based + .. Note:: + At this time, the transport is written to create only NPIV-based vports. However, consideration was given to VF-based vports and it should be a minor change to add support if needed. The remaining discussion will concentrate on NPIV. - Note: World Wide Name assignment (and uniqueness guarantees) are left + .. Note:: + World Wide Name assignment (and uniqueness guarantees) are left up to an administrative entity controlling the vport. For example, if vports are to be associated with virtual machines, a XEN mgmt utility would be responsible for creating wwpn/wwnn's for the vport, @@ -91,18 +100,29 @@ Device Trees and Vport Objects: port's scsi_host. Here's what to expect in the device tree : - The typical Physical Port's Scsi_Host: + + The typical Physical Port's Scsi_Host:: + /sys/devices/.../host17/ - and it has the typical descendant tree: + + and it has the typical descendant tree:: + /sys/devices/.../host17/rport-17:0-0/target17:0:0/17:0:0:0: - and then the vport is created on the Physical Port: + + and then the vport is created on the Physical Port:: + /sys/devices/.../host17/vport-17:0-0 - and the vport's Scsi_Host is then created: + + and the vport's Scsi_Host is then created:: + /sys/devices/.../host17/vport-17:0-0/host18 - and then the rest of the tree progresses, such as: + + and then the rest of the tree progresses, such as:: + /sys/devices/.../host17/vport-17:0-0/host18/rport-18:0-0/target18:0:0/18:0:0:0: - Here's what to expect in the sysfs tree : + Here's what to expect in the sysfs tree:: + scsi_hosts: /sys/class/scsi_host/host17 physical port's scsi_host /sys/class/scsi_host/host18 vport's scsi_host @@ -116,8 +136,8 @@ Device Trees and Vport Objects: /sys/class/fc_remote_ports/rport-18:0-0 rport on the vport -Vport Attributes: -------------------------------- +Vport Attributes +---------------- The new fc_vport class object has the following attributes @@ -184,16 +204,18 @@ Vport Attributes: (e.g. 0x, x, etc). -Vport States: -------------------------------- +Vport States +------------ Vport instantiation consists of two parts: + - Creation with the kernel and LLDD. This means all transport and driver data structures are built up, and device objects created. This is equivalent to a driver "attach" on an adapter, which is independent of the adapter's link state. - Instantiation of the vport on the FC link via ELS traffic, etc. This is equivalent to a "link up" and successful link initialization. + Further information can be found in the interfaces section below for Vport Creation. @@ -227,6 +249,7 @@ Vport States: FC_VPORT_NO_FABRIC_SUPP - No Fabric Support The vport is not operational. One of the following conditions were encountered: + - The FC topology is not Point-to-Point - The FC port is not connected to an F_Port - The F_Port has indicated that NPIV is not supported. @@ -251,32 +274,53 @@ Vport States: The following state table indicates the different state transitions: - State Event New State - -------------------------------------------------------------------- - n/a Initialization Unknown - Unknown: Link Down Linkdown - Link Up & Loop No Fabric Support - Link Up & no Fabric No Fabric Support - Link Up & FLOGI response No Fabric Support - indicates no NPIV support - Link Up & FDISC being sent Initializing - Disable request Disable - Linkdown: Link Up Unknown - Initializing: FDISC ACC Active - FDISC LS_RJT w/ no resources No Fabric Resources - FDISC LS_RJT w/ invalid Fabric Rejected WWN - pname or invalid nport_id - FDISC LS_RJT failed for Vport Failed - other reasons - Link Down Linkdown - Disable request Disable - Disable: Enable request Unknown - Active: LOGO received from fabric Fabric Logout - Link Down Linkdown - Disable request Disable - Fabric Logout: Link still up Unknown + +------------------+--------------------------------+---------------------+ + | State | Event | New State | + +==================+================================+=====================+ + | n/a | Initialization | Unknown | + +------------------+--------------------------------+---------------------+ + | Unknown: | Link Down | Linkdown | + | +--------------------------------+---------------------+ + | | Link Up & Loop | No Fabric Support | + | +--------------------------------+---------------------+ + | | Link Up & no Fabric | No Fabric Support | + | +--------------------------------+---------------------+ + | | Link Up & FLOGI response | No Fabric Support | + | | indicates no NPIV support | | + | +--------------------------------+---------------------+ + | | Link Up & FDISC being sent | Initializing | + | +--------------------------------+---------------------+ + | | Disable request | Disable | + +------------------+--------------------------------+---------------------+ + | Linkdown: | Link Up | Unknown | + +------------------+--------------------------------+---------------------+ + | Initializing: | FDISC ACC | Active | + | +--------------------------------+---------------------+ + | | FDISC LS_RJT w/ no resources | No Fabric Resources | + | +--------------------------------+---------------------+ + | | FDISC LS_RJT w/ invalid | Fabric Rejected WWN | + | | pname or invalid nport_id | | + | +--------------------------------+---------------------+ + | | FDISC LS_RJT failed for | Vport Failed | + | | other reasons | | + | +--------------------------------+---------------------+ + | | Link Down | Linkdown | + | +--------------------------------+---------------------+ + | | Disable request | Disable | + +------------------+--------------------------------+---------------------+ + | Disable: | Enable request | Unknown | + +------------------+--------------------------------+---------------------+ + | Active: | LOGO received from fabric | Fabric Logout | + | +--------------------------------+---------------------+ + | | Link Down | Linkdown | + | +--------------------------------+---------------------+ + | | Disable request | Disable | + +------------------+--------------------------------+---------------------+ + | Fabric Logout: | Link still up | Unknown | + +------------------+--------------------------------+---------------------+ + +The following 4 error states all have the same transitions:: - The following 4 error states all have the same transitions: No Fabric Support: No Fabric Resources: Fabric Rejected WWN: @@ -285,8 +329,8 @@ Vport States: Link goes down Linkdown -Transport <-> LLDD Interfaces : -------------------------------- +Transport <-> LLDD Interfaces +----------------------------- Vport support by LLDD: @@ -300,14 +344,17 @@ Vport support by LLDD: Vport Creation: - The LLDD vport_create() syntax is: + The LLDD vport_create() syntax is:: int vport_create(struct fc_vport *vport, bool disable) - where: - vport: Is the newly allocated vport object - disable: If "true", the vport is to be created in a disabled stated. + where: + + ======= =========================================================== + vport Is the newly allocated vport object + disable If "true", the vport is to be created in a disabled stated. If "false", the vport is to be enabled upon creation. + ======= =========================================================== When a request is made to create a new vport (via sgio/netlink, or the vport_create fc_host attribute), the transport will validate that the LLDD @@ -317,6 +364,7 @@ Vport Creation: LLDD's vport_create() function with the newly allocated vport object. As mentioned above, vport creation is divided into two parts: + - Creation with the kernel and LLDD. This means all transport and driver data structures are built up, and device objects created. This is equivalent to a driver "attach" on an adapter, which is @@ -329,6 +377,7 @@ Vport Creation: infrastructure exists to support NPIV, and complete the first part of vport creation (data structure build up) before returning. We do not hinge vport_create() on the link-side operation mainly because: + - The link may be down. It is not a failure if it is. It simply means the vport is in an inoperable state until the link comes up. This is consistent with the link bouncing post vport creation. @@ -337,11 +386,15 @@ Vport Creation: FC adapter. The vport_create is synonymous with driver attachment to the adapter, which is independent of link state. - Note: special error codes have been defined to delineate infrastructure + .. Note:: + + special error codes have been defined to delineate infrastructure failure cases for quicker resolution. The expected behavior for the LLDD's vport_create() function is: + - Validate Infrastructure: + - If the driver or adapter cannot support another vport, whether due to improper firmware, (a lie about) max_npiv, or a lack of some other resource - return VPCERR_UNSUPPORTED. @@ -349,17 +402,21 @@ Vport Creation: the adapter and detects an overlap - return VPCERR_BAD_WWN. - If the driver detects the topology is loop, non-fabric, or the FLOGI did not support NPIV - return VPCERR_NO_FABRIC_SUPP. + - Allocate data structures. If errors are encountered, such as out of memory conditions, return the respective negative Exxx error code. - If the role is FCP Initiator, the LLDD is to : + - Call scsi_host_alloc() to allocate a scsi_host for the vport. - Call scsi_add_host(new_shost, &vport->dev) to start the scsi_host and bind it as a child of the vport device. - Initializes the fc_host attribute values. + - Kick of further vport state transitions based on the disable flag and link state - and return success (zero). LLDD Implementers Notes: + - It is suggested that there be a different fc_function_templates for the physical port and the virtual port. The physical port's template would have the vport_create, vport_delete, and vport_disable functions, @@ -373,14 +430,17 @@ Vport Creation: Vport Disable/Enable: - The LLDD vport_disable() syntax is: + The LLDD vport_disable() syntax is:: int vport_disable(struct fc_vport *vport, bool disable) - where: - vport: Is vport to be enabled or disabled - disable: If "true", the vport is to be disabled. + where: + + ======= ======================================= + vport Is vport to be enabled or disabled + disable If "true", the vport is to be disabled. If "false", the vport is to be enabled. + ======= ======================================= When a request is made to change the disabled state on a vport, the transport will validate the request against the existing vport state. @@ -401,11 +461,12 @@ Vport Disable/Enable: Vport Deletion: - The LLDD vport_delete() syntax is: + The LLDD vport_delete() syntax is:: int vport_delete(struct fc_vport *vport) - where: + where: + vport: Is vport to delete When a request is made to delete a vport (via sgio/netlink, or via the @@ -443,39 +504,42 @@ Transport supplied functions The following functions are supplied by the FC-transport for use by LLDs. - fc_vport_create - create a vport - fc_vport_terminate - detach and remove a vport - -Details: - -/** - * fc_vport_create - Admin App or LLDD requests creation of a vport - * @shost: scsi host the virtual port is connected to. - * @ids: The world wide names, FC4 port roles, etc for - * the virtual port. - * - * Notes: - * This routine assumes no locks are held on entry. - */ -struct fc_vport * -fc_vport_create(struct Scsi_Host *shost, struct fc_vport_identifiers *ids) - -/** - * fc_vport_terminate - Admin App or LLDD requests termination of a vport - * @vport: fc_vport to be terminated - * - * Calls the LLDD vport_delete() function, then deallocates and removes - * the vport from the shost and object tree. - * - * Notes: - * This routine assumes no locks are held on entry. - */ -int -fc_vport_terminate(struct fc_vport *vport) + ================== ========================= + fc_vport_create create a vport + fc_vport_terminate detach and remove a vport + ================== ========================= + +Details:: + + /** + * fc_vport_create - Admin App or LLDD requests creation of a vport + * @shost: scsi host the virtual port is connected to. + * @ids: The world wide names, FC4 port roles, etc for + * the virtual port. + * + * Notes: + * This routine assumes no locks are held on entry. + */ + struct fc_vport * + fc_vport_create(struct Scsi_Host *shost, struct fc_vport_identifiers *ids) + + /** + * fc_vport_terminate - Admin App or LLDD requests termination of a vport + * @vport: fc_vport to be terminated + * + * Calls the LLDD vport_delete() function, then deallocates and removes + * the vport from the shost and object tree. + * + * Notes: + * This routine assumes no locks are held on entry. + */ + int + fc_vport_terminate(struct fc_vport *vport) FC BSG support (CT & ELS passthru, and more) -======================================================================== +============================================ + << To Be Supplied >> diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst new file mode 100644 index 000000000000..5358bc10689e --- /dev/null +++ b/Documentation/scsi/scsi_mid_low_api.rst @@ -0,0 +1,1313 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================= +SCSI mid_level - lower_level driver interface +============================================= + +Introduction +============ +This document outlines the interface between the Linux SCSI mid level and +SCSI lower level drivers. Lower level drivers (LLDs) are variously called +host bus adapter (HBA) drivers and host drivers (HD). A "host" in this +context is a bridge between a computer IO bus (e.g. PCI or ISA) and a +single SCSI initiator port on a SCSI transport. An "initiator" port +(SCSI terminology, see SAM-3 at http://www.t10.org) sends SCSI commands +to "target" SCSI ports (e.g. disks). There can be many LLDs in a running +system, but only one per hardware type. Most LLDs can control one or more +SCSI HBAs. Some HBAs contain multiple hosts. + +In some cases the SCSI transport is an external bus that already has +its own subsystem in Linux (e.g. USB and ieee1394). In such cases the +SCSI subsystem LLD is a software bridge to the other driver subsystem. +Examples are the usb-storage driver (found in the drivers/usb/storage +directory) and the ieee1394/sbp2 driver (found in the drivers/ieee1394 +directory). + +For example, the aic7xxx LLD controls Adaptec SCSI parallel interface +(SPI) controllers based on that company's 7xxx chip series. The aic7xxx +LLD can be built into the kernel or loaded as a module. There can only be +one aic7xxx LLD running in a Linux system but it may be controlling many +HBAs. These HBAs might be either on PCI daughter-boards or built into +the motherboard (or both). Some aic7xxx based HBAs are dual controllers +and thus represent two hosts. Like most modern HBAs, each aic7xxx host +has its own PCI device address. [The one-to-one correspondence between +a SCSI host and a PCI device is common but not required (e.g. with +ISA adapters).] + +The SCSI mid level isolates an LLD from other layers such as the SCSI +upper layer drivers and the block layer. + +This version of the document roughly matches linux kernel version 2.6.8 . + +Documentation +============= +There is a SCSI documentation directory within the kernel source tree, +typically Documentation/scsi . Most documents are in plain +(i.e. ASCII) text. This file is named scsi_mid_low_api.txt and can be +found in that directory. A more recent copy of this document may be found +at http://web.archive.org/web/20070107183357rn_1/sg.torque.net/scsi/. +Many LLDs are documented there (e.g. aic7xxx.txt). The SCSI mid-level is +briefly described in scsi.txt which contains a url to a document +describing the SCSI subsystem in the lk 2.4 series. Two upper level +drivers have documents in that directory: st.txt (SCSI tape driver) and +scsi-generic.txt (for the sg driver). + +Some documentation (or urls) for LLDs may be found in the C source code +or in the same directory as the C source code. For example to find a url +about the USB mass storage driver see the +/usr/src/linux/drivers/usb/storage directory. + +Driver structure +================ +Traditionally an LLD for the SCSI subsystem has been at least two files in +the drivers/scsi directory. For example, a driver called "xyz" has a header +file "xyz.h" and a source file "xyz.c". [Actually there is no good reason +why this couldn't all be in one file; the header file is superfluous.] Some +drivers that have been ported to several operating systems have more than +two files. For example the aic7xxx driver has separate files for generic +and OS-specific code (e.g. FreeBSD and Linux). Such drivers tend to have +their own directory under the drivers/scsi directory. + +When a new LLD is being added to Linux, the following files (found in the +drivers/scsi directory) will need some attention: Makefile and Kconfig . +It is probably best to study how existing LLDs are organized. + +As the 2.5 series development kernels evolve into the 2.6 series +production series, changes are being introduced into this interface. An +example of this is driver initialization code where there are now 2 models +available. The older one, similar to what was found in the lk 2.4 series, +is based on hosts that are detected at HBA driver load time. This will be +referred to the "passive" initialization model. The newer model allows HBAs +to be hot plugged (and unplugged) during the lifetime of the LLD and will +be referred to as the "hotplug" initialization model. The newer model is +preferred as it can handle both traditional SCSI equipment that is +permanently connected as well as modern "SCSI" devices (e.g. USB or +IEEE 1394 connected digital cameras) that are hotplugged. Both +initialization models are discussed in the following sections. + +An LLD interfaces to the SCSI subsystem several ways: + + a) directly invoking functions supplied by the mid level + b) passing a set of function pointers to a registration function + supplied by the mid level. The mid level will then invoke these + functions at some point in the future. The LLD will supply + implementations of these functions. + c) direct access to instances of well known data structures maintained + by the mid level + +Those functions in group a) are listed in a section entitled "Mid level +supplied functions" below. + +Those functions in group b) are listed in a section entitled "Interface +functions" below. Their function pointers are placed in the members of +"struct scsi_host_template", an instance of which is passed to +scsi_host_alloc() [#]_. Those interface functions that the LLD does not +wish to supply should have NULL placed in the corresponding member of +struct scsi_host_template. Defining an instance of struct +scsi_host_template at file scope will cause NULL to be placed in function +pointer members not explicitly initialized. + +Those usages in group c) should be handled with care, especially in a +"hotplug" environment. LLDs should be aware of the lifetime of instances +that are shared with the mid level and other layers. + +All functions defined within an LLD and all data defined at file scope +should be static. For example the slave_alloc() function in an LLD +called "xxx" could be defined as +``static int xxx_slave_alloc(struct scsi_device * sdev) { /* code */ }`` + +.. [#] the scsi_host_alloc() function is a replacement for the rather vaguely + named scsi_register() function in most situations. + + +Hotplug initialization model +============================ +In this model an LLD controls when SCSI hosts are introduced and removed +from the SCSI subsystem. Hosts can be introduced as early as driver +initialization and removed as late as driver shutdown. Typically a driver +will respond to a sysfs probe() callback that indicates an HBA has been +detected. After confirming that the new device is one that the LLD wants +to control, the LLD will initialize the HBA and then register a new host +with the SCSI mid level. + +During LLD initialization the driver should register itself with the +appropriate IO bus on which it expects to find HBA(s) (e.g. the PCI bus). +This can probably be done via sysfs. Any driver parameters (especially +those that are writable after the driver is loaded) could also be +registered with sysfs at this point. The SCSI mid level first becomes +aware of an LLD when that LLD registers its first HBA. + +At some later time, the LLD becomes aware of an HBA and what follows +is a typical sequence of calls between the LLD and the mid level. +This example shows the mid level scanning the newly introduced HBA for 3 +scsi devices of which only the first 2 respond:: + + HBA PROBE: assume 2 SCSI devices found in scan + LLD mid level LLD + ===-------------------=========--------------------===------ + scsi_host_alloc() --> + scsi_add_host() ----> + scsi_scan_host() -------+ + | + slave_alloc() + slave_configure() --> scsi_change_queue_depth() + | + slave_alloc() + slave_configure() + | + slave_alloc() *** + slave_destroy() *** + + + *** For scsi devices that the mid level tries to scan but do not + respond, a slave_alloc(), slave_destroy() pair is called. + +If the LLD wants to adjust the default queue settings, it can invoke +scsi_change_queue_depth() in its slave_configure() routine. + +When an HBA is being removed it could be as part of an orderly shutdown +associated with the LLD module being unloaded (e.g. with the "rmmod" +command) or in response to a "hot unplug" indicated by sysfs()'s +remove() callback being invoked. In either case, the sequence is the +same:: + + HBA REMOVE: assume 2 SCSI devices attached + LLD mid level LLD + ===----------------------=========-----------------===------ + scsi_remove_host() ---------+ + | + slave_destroy() + slave_destroy() + scsi_host_put() + +It may be useful for a LLD to keep track of struct Scsi_Host instances +(a pointer is returned by scsi_host_alloc()). Such instances are "owned" +by the mid-level. struct Scsi_Host instances are freed from +scsi_host_put() when the reference count hits zero. + +Hot unplugging an HBA that controls a disk which is processing SCSI +commands on a mounted file system is an interesting situation. Reference +counting logic is being introduced into the mid level to cope with many +of the issues involved. See the section on reference counting below. + + +The hotplug concept may be extended to SCSI devices. Currently, when an +HBA is added, the scsi_scan_host() function causes a scan for SCSI devices +attached to the HBA's SCSI transport. On newer SCSI transports the HBA +may become aware of a new SCSI device _after_ the scan has completed. +An LLD can use this sequence to make the mid level aware of a SCSI device:: + + SCSI DEVICE hotplug + LLD mid level LLD + ===-------------------=========--------------------===------ + scsi_add_device() ------+ + | + slave_alloc() + slave_configure() [--> scsi_change_queue_depth()] + +In a similar fashion, an LLD may become aware that a SCSI device has been +removed (unplugged) or the connection to it has been interrupted. Some +existing SCSI transports (e.g. SPI) may not become aware that a SCSI +device has been removed until a subsequent SCSI command fails which will +probably cause that device to be set offline by the mid level. An LLD that +detects the removal of a SCSI device can instigate its removal from +upper layers with this sequence:: + + SCSI DEVICE hot unplug + LLD mid level LLD + ===----------------------=========-----------------===------ + scsi_remove_device() -------+ + | + slave_destroy() + +It may be useful for an LLD to keep track of struct scsi_device instances +(a pointer is passed as the parameter to slave_alloc() and +slave_configure() callbacks). Such instances are "owned" by the mid-level. +struct scsi_device instances are freed after slave_destroy(). + + +Reference Counting +================== +The Scsi_Host structure has had reference counting infrastructure added. +This effectively spreads the ownership of struct Scsi_Host instances +across the various SCSI layers which use them. Previously such instances +were exclusively owned by the mid level. LLDs would not usually need to +directly manipulate these reference counts but there may be some cases +where they do. + +There are 3 reference counting functions of interest associated with +struct Scsi_Host: + + - scsi_host_alloc(): + returns a pointer to new instance of struct + Scsi_Host which has its reference count ^^ set to 1 + + - scsi_host_get(): + adds 1 to the reference count of the given instance + + - scsi_host_put(): + decrements 1 from the reference count of the given + instance. If the reference count reaches 0 then the given instance + is freed + +The scsi_device structure has had reference counting infrastructure added. +This effectively spreads the ownership of struct scsi_device instances +across the various SCSI layers which use them. Previously such instances +were exclusively owned by the mid level. See the access functions declared +towards the end of include/scsi/scsi_device.h . If an LLD wants to keep +a copy of a pointer to a scsi_device instance it should use scsi_device_get() +to bump its reference count. When it is finished with the pointer it can +use scsi_device_put() to decrement its reference count (and potentially +delete it). + +.. Note:: + + struct Scsi_Host actually has 2 reference counts which are manipulated + in parallel by these functions. + + +Conventions +=========== +First, Linus Torvalds's thoughts on C coding style can be found in the +Documentation/process/coding-style.rst file. + +Next, there is a movement to "outlaw" typedefs introducing synonyms for +struct tags. Both can be still found in the SCSI subsystem, but +the typedefs have been moved to a single file, scsi_typedefs.h to +make their future removal easier, for example: +"typedef struct scsi_cmnd Scsi_Cmnd;" + +Also, most C99 enhancements are encouraged to the extent they are supported +by the relevant gcc compilers. So C99 style structure and array +initializers are encouraged where appropriate. Don't go too far, +VLAs are not properly supported yet. An exception to this is the use of +``//`` style comments; ``/*...*/`` comments are still preferred in Linux. + +Well written, tested and documented code, need not be re-formatted to +comply with the above conventions. For example, the aic7xxx driver +comes to Linux from FreeBSD and Adaptec's own labs. No doubt FreeBSD +and Adaptec have their own coding conventions. + + +Mid level supplied functions +============================ +These functions are supplied by the SCSI mid level for use by LLDs. +The names (i.e. entry points) of these functions are exported +so an LLD that is a module can access them. The kernel will +arrange for the SCSI mid level to be loaded and initialized before any LLD +is initialized. The functions below are listed alphabetically and their +names all start with ``scsi_``. + +Summary: + + - scsi_add_device - creates new scsi device (lu) instance + - scsi_add_host - perform sysfs registration and set up transport class + - scsi_change_queue_depth - change the queue depth on a SCSI device + - scsi_bios_ptable - return copy of block device's partition table + - scsi_block_requests - prevent further commands being queued to given host + - scsi_host_alloc - return a new scsi_host instance whose refcount==1 + - scsi_host_get - increments Scsi_Host instance's refcount + - scsi_host_put - decrements Scsi_Host instance's refcount (free if 0) + - scsi_register - create and register a scsi host adapter instance. + - scsi_remove_device - detach and remove a SCSI device + - scsi_remove_host - detach and remove all SCSI devices owned by host + - scsi_report_bus_reset - report scsi _bus_ reset observed + - scsi_scan_host - scan SCSI bus + - scsi_track_queue_full - track successive QUEUE_FULL events + - scsi_unblock_requests - allow further commands to be queued to given host + - scsi_unregister - [calls scsi_host_put()] + + +Details:: + + /** + * scsi_add_device - creates new scsi device (lu) instance + * @shost: pointer to scsi host instance + * @channel: channel number (rarely other than 0) + * @id: target id number + * @lun: logical unit number + * + * Returns pointer to new struct scsi_device instance or + * ERR_PTR(-ENODEV) (or some other bent pointer) if something is + * wrong (e.g. no lu responds at given address) + * + * Might block: yes + * + * Notes: This call is usually performed internally during a scsi + * bus scan when an HBA is added (i.e. scsi_scan_host()). So it + * should only be called if the HBA becomes aware of a new scsi + * device (lu) after scsi_scan_host() has completed. If successful + * this call can lead to slave_alloc() and slave_configure() callbacks + * into the LLD. + * + * Defined in: drivers/scsi/scsi_scan.c + **/ + struct scsi_device * scsi_add_device(struct Scsi_Host *shost, + unsigned int channel, + unsigned int id, unsigned int lun) + + + /** + * scsi_add_host - perform sysfs registration and set up transport class + * @shost: pointer to scsi host instance + * @dev: pointer to struct device of type scsi class + * + * Returns 0 on success, negative errno of failure (e.g. -ENOMEM) + * + * Might block: no + * + * Notes: Only required in "hotplug initialization model" after a + * successful call to scsi_host_alloc(). This function does not + * scan the bus; this can be done by calling scsi_scan_host() or + * in some other transport-specific way. The LLD must set up + * the transport template before calling this function and may only + * access the transport class data after this function has been called. + * + * Defined in: drivers/scsi/hosts.c + **/ + int scsi_add_host(struct Scsi_Host *shost, struct device * dev) + + + /** + * scsi_change_queue_depth - allow LLD to change queue depth on a SCSI device + * @sdev: pointer to SCSI device to change queue depth on + * @tags Number of tags allowed if tagged queuing enabled, + * or number of commands the LLD can queue up + * in non-tagged mode (as per cmd_per_lun). + * + * Returns nothing + * + * Might block: no + * + * Notes: Can be invoked any time on a SCSI device controlled by this + * LLD. [Specifically during and after slave_configure() and prior to + * slave_destroy().] Can safely be invoked from interrupt code. + * + * Defined in: drivers/scsi/scsi.c [see source code for more notes] + * + **/ + int scsi_change_queue_depth(struct scsi_device *sdev, int tags) + + + /** + * scsi_bios_ptable - return copy of block device's partition table + * @dev: pointer to block device + * + * Returns pointer to partition table, or NULL for failure + * + * Might block: yes + * + * Notes: Caller owns memory returned (free with kfree() ) + * + * Defined in: drivers/scsi/scsicam.c + **/ + unsigned char *scsi_bios_ptable(struct block_device *dev) + + + /** + * scsi_block_requests - prevent further commands being queued to given host + * + * @shost: pointer to host to block commands on + * + * Returns nothing + * + * Might block: no + * + * Notes: There is no timer nor any other means by which the requests + * get unblocked other than the LLD calling scsi_unblock_requests(). + * + * Defined in: drivers/scsi/scsi_lib.c + **/ + void scsi_block_requests(struct Scsi_Host * shost) + + + /** + * scsi_host_alloc - create a scsi host adapter instance and perform basic + * initialization. + * @sht: pointer to scsi host template + * @privsize: extra bytes to allocate in hostdata array (which is the + * last member of the returned Scsi_Host instance) + * + * Returns pointer to new Scsi_Host instance or NULL on failure + * + * Might block: yes + * + * Notes: When this call returns to the LLD, the SCSI bus scan on + * this host has _not_ yet been done. + * The hostdata array (by default zero length) is a per host scratch + * area for the LLD's exclusive use. + * Both associated refcounting objects have their refcount set to 1. + * Full registration (in sysfs) and a bus scan are performed later when + * scsi_add_host() and scsi_scan_host() are called. + * + * Defined in: drivers/scsi/hosts.c . + **/ + struct Scsi_Host * scsi_host_alloc(struct scsi_host_template * sht, + int privsize) + + + /** + * scsi_host_get - increment Scsi_Host instance refcount + * @shost: pointer to struct Scsi_Host instance + * + * Returns nothing + * + * Might block: currently may block but may be changed to not block + * + * Notes: Actually increments the counts in two sub-objects + * + * Defined in: drivers/scsi/hosts.c + **/ + void scsi_host_get(struct Scsi_Host *shost) + + + /** + * scsi_host_put - decrement Scsi_Host instance refcount, free if 0 + * @shost: pointer to struct Scsi_Host instance + * + * Returns nothing + * + * Might block: currently may block but may be changed to not block + * + * Notes: Actually decrements the counts in two sub-objects. If the + * latter refcount reaches 0, the Scsi_Host instance is freed. + * The LLD need not worry exactly when the Scsi_Host instance is + * freed, it just shouldn't access the instance after it has balanced + * out its refcount usage. + * + * Defined in: drivers/scsi/hosts.c + **/ + void scsi_host_put(struct Scsi_Host *shost) + + + /** + * scsi_register - create and register a scsi host adapter instance. + * @sht: pointer to scsi host template + * @privsize: extra bytes to allocate in hostdata array (which is the + * last member of the returned Scsi_Host instance) + * + * Returns pointer to new Scsi_Host instance or NULL on failure + * + * Might block: yes + * + * Notes: When this call returns to the LLD, the SCSI bus scan on + * this host has _not_ yet been done. + * The hostdata array (by default zero length) is a per host scratch + * area for the LLD. + * + * Defined in: drivers/scsi/hosts.c . + **/ + struct Scsi_Host * scsi_register(struct scsi_host_template * sht, + int privsize) + + + /** + * scsi_remove_device - detach and remove a SCSI device + * @sdev: a pointer to a scsi device instance + * + * Returns value: 0 on success, -EINVAL if device not attached + * + * Might block: yes + * + * Notes: If an LLD becomes aware that a scsi device (lu) has + * been removed but its host is still present then it can request + * the removal of that scsi device. If successful this call will + * lead to the slave_destroy() callback being invoked. sdev is an + * invalid pointer after this call. + * + * Defined in: drivers/scsi/scsi_sysfs.c . + **/ + int scsi_remove_device(struct scsi_device *sdev) + + + /** + * scsi_remove_host - detach and remove all SCSI devices owned by host + * @shost: a pointer to a scsi host instance + * + * Returns value: 0 on success, 1 on failure (e.g. LLD busy ??) + * + * Might block: yes + * + * Notes: Should only be invoked if the "hotplug initialization + * model" is being used. It should be called _prior_ to + * scsi_unregister(). + * + * Defined in: drivers/scsi/hosts.c . + **/ + int scsi_remove_host(struct Scsi_Host *shost) + + + /** + * scsi_report_bus_reset - report scsi _bus_ reset observed + * @shost: a pointer to a scsi host involved + * @channel: channel (within) host on which scsi bus reset occurred + * + * Returns nothing + * + * Might block: no + * + * Notes: This only needs to be called if the reset is one which + * originates from an unknown location. Resets originated by the + * mid level itself don't need to call this, but there should be + * no harm. The main purpose of this is to make sure that a + * CHECK_CONDITION is properly treated. + * + * Defined in: drivers/scsi/scsi_error.c . + **/ + void scsi_report_bus_reset(struct Scsi_Host * shost, int channel) + + + /** + * scsi_scan_host - scan SCSI bus + * @shost: a pointer to a scsi host instance + * + * Might block: yes + * + * Notes: Should be called after scsi_add_host() + * + * Defined in: drivers/scsi/scsi_scan.c + **/ + void scsi_scan_host(struct Scsi_Host *shost) + + + /** + * scsi_track_queue_full - track successive QUEUE_FULL events on given + * device to determine if and when there is a need + * to adjust the queue depth on the device. + * @sdev: pointer to SCSI device instance + * @depth: Current number of outstanding SCSI commands on this device, + * not counting the one returned as QUEUE_FULL. + * + * Returns 0 - no change needed + * >0 - adjust queue depth to this new depth + * -1 - drop back to untagged operation using host->cmd_per_lun + * as the untagged command depth + * + * Might block: no + * + * Notes: LLDs may call this at any time and we will do "The Right + * Thing"; interrupt context safe. + * + * Defined in: drivers/scsi/scsi.c . + **/ + int scsi_track_queue_full(struct scsi_device *sdev, int depth) + + + /** + * scsi_unblock_requests - allow further commands to be queued to given host + * + * @shost: pointer to host to unblock commands on + * + * Returns nothing + * + * Might block: no + * + * Defined in: drivers/scsi/scsi_lib.c . + **/ + void scsi_unblock_requests(struct Scsi_Host * shost) + + + /** + * scsi_unregister - unregister and free memory used by host instance + * @shp: pointer to scsi host instance to unregister. + * + * Returns nothing + * + * Might block: no + * + * Notes: Should not be invoked if the "hotplug initialization + * model" is being used. Called internally by exit_this_scsi_driver() + * in the "passive initialization model". Hence a LLD has no need to + * call this function directly. + * + * Defined in: drivers/scsi/hosts.c . + **/ + void scsi_unregister(struct Scsi_Host * shp) + + + + +Interface Functions +=================== +Interface functions are supplied (defined) by LLDs and their function +pointers are placed in an instance of struct scsi_host_template which +is passed to scsi_host_alloc() [or scsi_register() / init_this_scsi_driver()]. +Some are mandatory. Interface functions should be declared static. The +accepted convention is that driver "xyz" will declare its slave_configure() +function as:: + + static int xyz_slave_configure(struct scsi_device * sdev); + +and so forth for all interface functions listed below. + +A pointer to this function should be placed in the 'slave_configure' member +of a "struct scsi_host_template" instance. A pointer to such an instance +should be passed to the mid level's scsi_host_alloc() [or scsi_register() / +init_this_scsi_driver()]. + +The interface functions are also described in the include/scsi/scsi_host.h +file immediately above their definition point in "struct scsi_host_template". +In some cases more detail is given in scsi_host.h than below. + +The interface functions are listed below in alphabetical order. + +Summary: + + - bios_param - fetch head, sector, cylinder info for a disk + - eh_timed_out - notify the host that a command timer expired + - eh_abort_handler - abort given command + - eh_bus_reset_handler - issue SCSI bus reset + - eh_device_reset_handler - issue SCSI device reset + - eh_host_reset_handler - reset host (host bus adapter) + - info - supply information about given host + - ioctl - driver can respond to ioctls + - proc_info - supports /proc/scsi/{driver_name}/{host_no} + - queuecommand - queue scsi command, invoke 'done' on completion + - slave_alloc - prior to any commands being sent to a new device + - slave_configure - driver fine tuning for given device after attach + - slave_destroy - given device is about to be shut down + + +Details:: + + /** + * bios_param - fetch head, sector, cylinder info for a disk + * @sdev: pointer to scsi device context (defined in + * include/scsi/scsi_device.h) + * @bdev: pointer to block device context (defined in fs.h) + * @capacity: device size (in 512 byte sectors) + * @params: three element array to place output: + * params[0] number of heads (max 255) + * params[1] number of sectors (max 63) + * params[2] number of cylinders + * + * Return value is ignored + * + * Locks: none + * + * Calling context: process (sd) + * + * Notes: an arbitrary geometry (based on READ CAPACITY) is used + * if this function is not provided. The params array is + * pre-initialized with made up values just in case this function + * doesn't output anything. + * + * Optionally defined in: LLD + **/ + int bios_param(struct scsi_device * sdev, struct block_device *bdev, + sector_t capacity, int params[3]) + + + /** + * eh_timed_out - The timer for the command has just fired + * @scp: identifies command timing out + * + * Returns: + * + * EH_HANDLED: I fixed the error, please complete the command + * EH_RESET_TIMER: I need more time, reset the timer and + * begin counting again + * EH_NOT_HANDLED Begin normal error recovery + * + * + * Locks: None held + * + * Calling context: interrupt + * + * Notes: This is to give the LLD an opportunity to do local recovery. + * This recovery is limited to determining if the outstanding command + * will ever complete. You may not abort and restart the command from + * this callback. + * + * Optionally defined in: LLD + **/ + int eh_timed_out(struct scsi_cmnd * scp) + + + /** + * eh_abort_handler - abort command associated with scp + * @scp: identifies command to be aborted + * + * Returns SUCCESS if command aborted else FAILED + * + * Locks: None held + * + * Calling context: kernel thread + * + * Notes: If 'no_async_abort' is defined this callback + * will be invoked from scsi_eh thread. No other commands + * will then be queued on current host during eh. + * Otherwise it will be called whenever scsi_times_out() + * is called due to a command timeout. + * + * Optionally defined in: LLD + **/ + int eh_abort_handler(struct scsi_cmnd * scp) + + + /** + * eh_bus_reset_handler - issue SCSI bus reset + * @scp: SCSI bus that contains this device should be reset + * + * Returns SUCCESS if command aborted else FAILED + * + * Locks: None held + * + * Calling context: kernel thread + * + * Notes: Invoked from scsi_eh thread. No other commands will be + * queued on current host during eh. + * + * Optionally defined in: LLD + **/ + int eh_bus_reset_handler(struct scsi_cmnd * scp) + + + /** + * eh_device_reset_handler - issue SCSI device reset + * @scp: identifies SCSI device to be reset + * + * Returns SUCCESS if command aborted else FAILED + * + * Locks: None held + * + * Calling context: kernel thread + * + * Notes: Invoked from scsi_eh thread. No other commands will be + * queued on current host during eh. + * + * Optionally defined in: LLD + **/ + int eh_device_reset_handler(struct scsi_cmnd * scp) + + + /** + * eh_host_reset_handler - reset host (host bus adapter) + * @scp: SCSI host that contains this device should be reset + * + * Returns SUCCESS if command aborted else FAILED + * + * Locks: None held + * + * Calling context: kernel thread + * + * Notes: Invoked from scsi_eh thread. No other commands will be + * queued on current host during eh. + * With the default eh_strategy in place, if none of the _abort_, + * _device_reset_, _bus_reset_ or this eh handler function are + * defined (or they all return FAILED) then the device in question + * will be set offline whenever eh is invoked. + * + * Optionally defined in: LLD + **/ + int eh_host_reset_handler(struct scsi_cmnd * scp) + + + /** + * info - supply information about given host: driver name plus data + * to distinguish given host + * @shp: host to supply information about + * + * Return ASCII null terminated string. [This driver is assumed to + * manage the memory pointed to and maintain it, typically for the + * lifetime of this host.] + * + * Locks: none + * + * Calling context: process + * + * Notes: Often supplies PCI or ISA information such as IO addresses + * and interrupt numbers. If not supplied struct Scsi_Host::name used + * instead. It is assumed the returned information fits on one line + * (i.e. does not included embedded newlines). + * The SCSI_IOCTL_PROBE_HOST ioctl yields the string returned by this + * function (or struct Scsi_Host::name if this function is not + * available). + * In a similar manner, init_this_scsi_driver() outputs to the console + * each host's "info" (or name) for the driver it is registering. + * Also if proc_info() is not supplied, the output of this function + * is used instead. + * + * Optionally defined in: LLD + **/ + const char * info(struct Scsi_Host * shp) + + + /** + * ioctl - driver can respond to ioctls + * @sdp: device that ioctl was issued for + * @cmd: ioctl number + * @arg: pointer to read or write data from. Since it points to + * user space, should use appropriate kernel functions + * (e.g. copy_from_user() ). In the Unix style this argument + * can also be viewed as an unsigned long. + * + * Returns negative "errno" value when there is a problem. 0 or a + * positive value indicates success and is returned to the user space. + * + * Locks: none + * + * Calling context: process + * + * Notes: The SCSI subsystem uses a "trickle down" ioctl model. + * The user issues an ioctl() against an upper level driver + * (e.g. /dev/sdc) and if the upper level driver doesn't recognize + * the 'cmd' then it is passed to the SCSI mid level. If the SCSI + * mid level does not recognize it, then the LLD that controls + * the device receives the ioctl. According to recent Unix standards + * unsupported ioctl() 'cmd' numbers should return -ENOTTY. + * + * Optionally defined in: LLD + **/ + int ioctl(struct scsi_device *sdp, int cmd, void *arg) + + + /** + * proc_info - supports /proc/scsi/{driver_name}/{host_no} + * @buffer: anchor point to output to (0==writeto1_read0) or fetch from + * (1==writeto1_read0). + * @start: where "interesting" data is written to. Ignored when + * 1==writeto1_read0. + * @offset: offset within buffer 0==writeto1_read0 is actually + * interested in. Ignored when 1==writeto1_read0 . + * @length: maximum (or actual) extent of buffer + * @host_no: host number of interest (struct Scsi_Host::host_no) + * @writeto1_read0: 1 -> data coming from user space towards driver + * (e.g. "echo some_string > /proc/scsi/xyz/2") + * 0 -> user what data from this driver + * (e.g. "cat /proc/scsi/xyz/2") + * + * Returns length when 1==writeto1_read0. Otherwise number of chars + * output to buffer past offset. + * + * Locks: none held + * + * Calling context: process + * + * Notes: Driven from scsi_proc.c which interfaces to proc_fs. proc_fs + * support can now be configured out of the scsi subsystem. + * + * Optionally defined in: LLD + **/ + int proc_info(char * buffer, char ** start, off_t offset, + int length, int host_no, int writeto1_read0) + + + /** + * queuecommand - queue scsi command, invoke scp->scsi_done on completion + * @shost: pointer to the scsi host object + * @scp: pointer to scsi command object + * + * Returns 0 on success. + * + * If there's a failure, return either: + * + * SCSI_MLQUEUE_DEVICE_BUSY if the device queue is full, or + * SCSI_MLQUEUE_HOST_BUSY if the entire host queue is full + * + * On both of these returns, the mid-layer will requeue the I/O + * + * - if the return is SCSI_MLQUEUE_DEVICE_BUSY, only that particular + * device will be paused, and it will be unpaused when a command to + * the device returns (or after a brief delay if there are no more + * outstanding commands to it). Commands to other devices continue + * to be processed normally. + * + * - if the return is SCSI_MLQUEUE_HOST_BUSY, all I/O to the host + * is paused and will be unpaused when any command returns from + * the host (or after a brief delay if there are no outstanding + * commands to the host). + * + * For compatibility with earlier versions of queuecommand, any + * other return value is treated the same as + * SCSI_MLQUEUE_HOST_BUSY. + * + * Other types of errors that are detected immediately may be + * flagged by setting scp->result to an appropriate value, + * invoking the scp->scsi_done callback, and then returning 0 + * from this function. If the command is not performed + * immediately (and the LLD is starting (or will start) the given + * command) then this function should place 0 in scp->result and + * return 0. + * + * Command ownership. If the driver returns zero, it owns the + * command and must take responsibility for ensuring the + * scp->scsi_done callback is executed. Note: the driver may + * call scp->scsi_done before returning zero, but after it has + * called scp->scsi_done, it may not return any value other than + * zero. If the driver makes a non-zero return, it must not + * execute the command's scsi_done callback at any time. + * + * Locks: up to and including 2.6.36, struct Scsi_Host::host_lock + * held on entry (with "irqsave") and is expected to be + * held on return. From 2.6.37 onwards, queuecommand is + * called without any locks held. + * + * Calling context: in interrupt (soft irq) or process context + * + * Notes: This function should be relatively fast. Normally it + * will not wait for IO to complete. Hence the scp->scsi_done + * callback is invoked (often directly from an interrupt service + * routine) some time after this function has returned. In some + * cases (e.g. pseudo adapter drivers that manufacture the + * response to a SCSI INQUIRY) the scp->scsi_done callback may be + * invoked before this function returns. If the scp->scsi_done + * callback is not invoked within a certain period the SCSI mid + * level will commence error processing. If a status of CHECK + * CONDITION is placed in "result" when the scp->scsi_done + * callback is invoked, then the LLD driver should perform + * autosense and fill in the struct scsi_cmnd::sense_buffer + * array. The scsi_cmnd::sense_buffer array is zeroed prior to + * the mid level queuing a command to an LLD. + * + * Defined in: LLD + **/ + int queuecommand(struct Scsi_Host *shost, struct scsi_cmnd * scp) + + + /** + * slave_alloc - prior to any commands being sent to a new device + * (i.e. just prior to scan) this call is made + * @sdp: pointer to new device (about to be scanned) + * + * Returns 0 if ok. Any other return is assumed to be an error and + * the device is ignored. + * + * Locks: none + * + * Calling context: process + * + * Notes: Allows the driver to allocate any resources for a device + * prior to its initial scan. The corresponding scsi device may not + * exist but the mid level is just about to scan for it (i.e. send + * and INQUIRY command plus ...). If a device is found then + * slave_configure() will be called while if a device is not found + * slave_destroy() is called. + * For more details see the include/scsi/scsi_host.h file. + * + * Optionally defined in: LLD + **/ + int slave_alloc(struct scsi_device *sdp) + + + /** + * slave_configure - driver fine tuning for given device just after it + * has been first scanned (i.e. it responded to an + * INQUIRY) + * @sdp: device that has just been attached + * + * Returns 0 if ok. Any other return is assumed to be an error and + * the device is taken offline. [offline devices will _not_ have + * slave_destroy() called on them so clean up resources.] + * + * Locks: none + * + * Calling context: process + * + * Notes: Allows the driver to inspect the response to the initial + * INQUIRY done by the scanning code and take appropriate action. + * For more details see the include/scsi/scsi_host.h file. + * + * Optionally defined in: LLD + **/ + int slave_configure(struct scsi_device *sdp) + + + /** + * slave_destroy - given device is about to be shut down. All + * activity has ceased on this device. + * @sdp: device that is about to be shut down + * + * Returns nothing + * + * Locks: none + * + * Calling context: process + * + * Notes: Mid level structures for given device are still in place + * but are about to be torn down. Any per device resources allocated + * by this driver for given device should be freed now. No further + * commands will be sent for this sdp instance. [However the device + * could be re-attached in the future in which case a new instance + * of struct scsi_device would be supplied by future slave_alloc() + * and slave_configure() calls.] + * + * Optionally defined in: LLD + **/ + void slave_destroy(struct scsi_device *sdp) + + + +Data Structures +=============== +struct scsi_host_template +------------------------- +There is one "struct scsi_host_template" instance per LLD [#]_. It is +typically initialized as a file scope static in a driver's header file. That +way members that are not explicitly initialized will be set to 0 or NULL. +Member of interest: + + name + - name of driver (may contain spaces, please limit to + less than 80 characters) + + proc_name + - name used in "/proc/scsi/<proc_name>/<host_no>" and + by sysfs in one of its "drivers" directories. Hence + "proc_name" should only contain characters acceptable + to a Unix file name. + + ``(*queuecommand)()`` + - primary callback that the mid level uses to inject + SCSI commands into an LLD. + +The structure is defined and commented in include/scsi/scsi_host.h + +.. [#] In extreme situations a single driver may have several instances + if it controls several different classes of hardware (e.g. an LLD + that handles both ISA and PCI cards and has a separate instance of + struct scsi_host_template for each class). + +struct Scsi_Host +---------------- +There is one struct Scsi_Host instance per host (HBA) that an LLD +controls. The struct Scsi_Host structure has many members in common +with "struct scsi_host_template". When a new struct Scsi_Host instance +is created (in scsi_host_alloc() in hosts.c) those common members are +initialized from the driver's struct scsi_host_template instance. Members +of interest: + + host_no + - system wide unique number that is used for identifying + this host. Issued in ascending order from 0. + can_queue + - must be greater than 0; do not send more than can_queue + commands to the adapter. + this_id + - scsi id of host (scsi initiator) or -1 if not known + sg_tablesize + - maximum scatter gather elements allowed by host. + Set this to SG_ALL or less to avoid chained SG lists. + Must be at least 1. + max_sectors + - maximum number of sectors (usually 512 bytes) allowed + in a single SCSI command. The default value of 0 leads + to a setting of SCSI_DEFAULT_MAX_SECTORS (defined in + scsi_host.h) which is currently set to 1024. So for a + disk the maximum transfer size is 512 KB when max_sectors + is not defined. Note that this size may not be sufficient + for disk firmware uploads. + cmd_per_lun + - maximum number of commands that can be queued on devices + controlled by the host. Overridden by LLD calls to + scsi_change_queue_depth(). + unchecked_isa_dma + - 1=>only use bottom 16 MB of ram (ISA DMA addressing + restriction), 0=>can use full 32 bit (or better) DMA + address space + no_async_abort + - 1=>Asynchronous aborts are not supported + - 0=>Timed-out commands will be aborted asynchronously + hostt + - pointer to driver's struct scsi_host_template from which + this struct Scsi_Host instance was spawned + hostt->proc_name + - name of LLD. This is the driver name that sysfs uses + transportt + - pointer to driver's struct scsi_transport_template instance + (if any). FC and SPI transports currently supported. + sh_list + - a double linked list of pointers to all struct Scsi_Host + instances (currently ordered by ascending host_no) + my_devices + - a double linked list of pointers to struct scsi_device + instances that belong to this host. + hostdata[0] + - area reserved for LLD at end of struct Scsi_Host. Size + is set by the second argument (named 'xtr_bytes') to + scsi_host_alloc() or scsi_register(). + vendor_id + - a unique value that identifies the vendor supplying + the LLD for the Scsi_Host. Used most often in validating + vendor-specific message requests. Value consists of an + identifier type and a vendor-specific value. + See scsi_netlink.h for a description of valid formats. + +The scsi_host structure is defined in include/scsi/scsi_host.h + +struct scsi_device +------------------ +Generally, there is one instance of this structure for each SCSI logical unit +on a host. Scsi devices connected to a host are uniquely identified by a +channel number, target id and logical unit number (lun). +The structure is defined in include/scsi/scsi_device.h + +struct scsi_cmnd +---------------- +Instances of this structure convey SCSI commands to the LLD and responses +back to the mid level. The SCSI mid level will ensure that no more SCSI +commands become queued against the LLD than are indicated by +scsi_change_queue_depth() (or struct Scsi_Host::cmd_per_lun). There will +be at least one instance of struct scsi_cmnd available for each SCSI device. +Members of interest: + + cmnd + - array containing SCSI command + cmnd_len + - length (in bytes) of SCSI command + sc_data_direction + - direction of data transfer in data phase. See + "enum dma_data_direction" in include/linux/dma-mapping.h + request_bufflen + - number of data bytes to transfer (0 if no data phase) + use_sg + - ==0 -> no scatter gather list, hence transfer data + to/from request_buffer + - >0 -> scatter gather list (actually an array) in + request_buffer with use_sg elements + request_buffer + - either contains data buffer or scatter gather list + depending on the setting of use_sg. Scatter gather + elements are defined by 'struct scatterlist' found + in include/linux/scatterlist.h . + done + - function pointer that should be invoked by LLD when the + SCSI command is completed (successfully or otherwise). + Should only be called by an LLD if the LLD has accepted + the command (i.e. queuecommand() returned or will return + 0). The LLD may invoke 'done' prior to queuecommand() + finishing. + result + - should be set by LLD prior to calling 'done'. A value + of 0 implies a successfully completed command (and all + data (if any) has been transferred to or from the SCSI + target device). 'result' is a 32 bit unsigned integer that + can be viewed as 4 related bytes. The SCSI status value is + in the LSB. See include/scsi/scsi.h status_byte(), + msg_byte(), host_byte() and driver_byte() macros and + related constants. + sense_buffer + - an array (maximum size: SCSI_SENSE_BUFFERSIZE bytes) that + should be written when the SCSI status (LSB of 'result') + is set to CHECK_CONDITION (2). When CHECK_CONDITION is + set, if the top nibble of sense_buffer[0] has the value 7 + then the mid level will assume the sense_buffer array + contains a valid SCSI sense buffer; otherwise the mid + level will issue a REQUEST_SENSE SCSI command to + retrieve the sense buffer. The latter strategy is error + prone in the presence of command queuing so the LLD should + always "auto-sense". + device + - pointer to scsi_device object that this command is + associated with. + resid + - an LLD should set this signed integer to the requested + transfer length (i.e. 'request_bufflen') less the number + of bytes that are actually transferred. 'resid' is + preset to 0 so an LLD can ignore it if it cannot detect + underruns (overruns should be rare). If possible an LLD + should set 'resid' prior to invoking 'done'. The most + interesting case is data transfers from a SCSI target + device (e.g. READs) that underrun. + underflow + - LLD should place (DID_ERROR << 16) in 'result' if + actual number of bytes transferred is less than this + figure. Not many LLDs implement this check and some that + do just output an error message to the log rather than + report a DID_ERROR. Better for an LLD to implement + 'resid'. + +It is recommended that a LLD set 'resid' on data transfers from a SCSI +target device (e.g. READs). It is especially important that 'resid' is set +when such data transfers have sense keys of MEDIUM ERROR and HARDWARE ERROR +(and possibly RECOVERED ERROR). In these cases if a LLD is in doubt how much +data has been received then the safest approach is to indicate no bytes have +been received. For example: to indicate that no valid data has been received +a LLD might use these helpers:: + + scsi_set_resid(SCpnt, scsi_bufflen(SCpnt)); + +where 'SCpnt' is a pointer to a scsi_cmnd object. To indicate only three 512 +bytes blocks has been received 'resid' could be set like this:: + + scsi_set_resid(SCpnt, scsi_bufflen(SCpnt) - (3 * 512)); + +The scsi_cmnd structure is defined in include/scsi/scsi_cmnd.h + + +Locks +===== +Each struct Scsi_Host instance has a spin_lock called struct +Scsi_Host::default_lock which is initialized in scsi_host_alloc() [found in +hosts.c]. Within the same function the struct Scsi_Host::host_lock pointer +is initialized to point at default_lock. Thereafter lock and unlock +operations performed by the mid level use the struct Scsi_Host::host_lock +pointer. Previously drivers could override the host_lock pointer but +this is not allowed anymore. + + +Autosense +========= +Autosense (or auto-sense) is defined in the SAM-2 document as "the +automatic return of sense data to the application client coincident +with the completion of a SCSI command" when a status of CHECK CONDITION +occurs. LLDs should perform autosense. This should be done when the LLD +detects a CHECK CONDITION status by either: + + a) instructing the SCSI protocol (e.g. SCSI Parallel Interface (SPI)) + to perform an extra data in phase on such responses + b) or, the LLD issuing a REQUEST SENSE command itself + +Either way, when a status of CHECK CONDITION is detected, the mid level +decides whether the LLD has performed autosense by checking struct +scsi_cmnd::sense_buffer[0] . If this byte has an upper nibble of 7 (or 0xf) +then autosense is assumed to have taken place. If it has another value (and +this byte is initialized to 0 before each command) then the mid level will +issue a REQUEST SENSE command. + +In the presence of queued commands the "nexus" that maintains sense +buffer data from the command that failed until a following REQUEST SENSE +may get out of synchronization. This is why it is best for the LLD +to perform autosense. + + +Changes since lk 2.4 series +=========================== +io_request_lock has been replaced by several finer grained locks. The lock +relevant to LLDs is struct Scsi_Host::host_lock and there is +one per SCSI host. + +The older error handling mechanism has been removed. This means the +LLD interface functions abort() and reset() have been removed. +The struct scsi_host_template::use_new_eh_code flag has been removed. + +In the 2.4 series the SCSI subsystem configuration descriptions were +aggregated with the configuration descriptions from all other Linux +subsystems in the Documentation/Configure.help file. In the 2.6 series, +the SCSI subsystem now has its own (much smaller) drivers/scsi/Kconfig +file that contains both configuration and help information. + +struct SHT has been renamed to struct scsi_host_template. + +Addition of the "hotplug initialization model" and many extra functions +to support it. + + +Credits +======= +The following people have contributed to this document: + + - Mike Anderson <andmike at us dot ibm dot com> + - James Bottomley <James dot Bottomley at hansenpartnership dot com> + - Patrick Mansfield <patmans at us dot ibm dot com> + - Christoph Hellwig <hch at infradead dot org> + - Doug Ledford <dledford at redhat dot com> + - Andries Brouwer <Andries dot Brouwer at cwi dot nl> + - Randy Dunlap <rdunlap at xenotime dot net> + - Alan Stern <stern at rowland dot harvard dot edu> + + +Douglas Gilbert +dgilbert at interlog dot com + +21st September 2004 diff --git a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt deleted file mode 100644 index 2a4be1c3e6db..000000000000 --- a/Documentation/scsi/scsi_mid_low_api.txt +++ /dev/null @@ -1,1280 +0,0 @@ - Linux Kernel 2.6 series - SCSI mid_level - lower_level driver interface - ============================================= - -Introduction -============ -This document outlines the interface between the Linux SCSI mid level and -SCSI lower level drivers. Lower level drivers (LLDs) are variously called -host bus adapter (HBA) drivers and host drivers (HD). A "host" in this -context is a bridge between a computer IO bus (e.g. PCI or ISA) and a -single SCSI initiator port on a SCSI transport. An "initiator" port -(SCSI terminology, see SAM-3 at http://www.t10.org) sends SCSI commands -to "target" SCSI ports (e.g. disks). There can be many LLDs in a running -system, but only one per hardware type. Most LLDs can control one or more -SCSI HBAs. Some HBAs contain multiple hosts. - -In some cases the SCSI transport is an external bus that already has -its own subsystem in Linux (e.g. USB and ieee1394). In such cases the -SCSI subsystem LLD is a software bridge to the other driver subsystem. -Examples are the usb-storage driver (found in the drivers/usb/storage -directory) and the ieee1394/sbp2 driver (found in the drivers/ieee1394 -directory). - -For example, the aic7xxx LLD controls Adaptec SCSI parallel interface -(SPI) controllers based on that company's 7xxx chip series. The aic7xxx -LLD can be built into the kernel or loaded as a module. There can only be -one aic7xxx LLD running in a Linux system but it may be controlling many -HBAs. These HBAs might be either on PCI daughter-boards or built into -the motherboard (or both). Some aic7xxx based HBAs are dual controllers -and thus represent two hosts. Like most modern HBAs, each aic7xxx host -has its own PCI device address. [The one-to-one correspondence between -a SCSI host and a PCI device is common but not required (e.g. with -ISA adapters).] - -The SCSI mid level isolates an LLD from other layers such as the SCSI -upper layer drivers and the block layer. - -This version of the document roughly matches linux kernel version 2.6.8 . - -Documentation -============= -There is a SCSI documentation directory within the kernel source tree, -typically Documentation/scsi . Most documents are in plain -(i.e. ASCII) text. This file is named scsi_mid_low_api.txt and can be -found in that directory. A more recent copy of this document may be found -at http://web.archive.org/web/20070107183357rn_1/sg.torque.net/scsi/. -Many LLDs are documented there (e.g. aic7xxx.txt). The SCSI mid-level is -briefly described in scsi.txt which contains a url to a document -describing the SCSI subsystem in the lk 2.4 series. Two upper level -drivers have documents in that directory: st.txt (SCSI tape driver) and -scsi-generic.txt (for the sg driver). - -Some documentation (or urls) for LLDs may be found in the C source code -or in the same directory as the C source code. For example to find a url -about the USB mass storage driver see the -/usr/src/linux/drivers/usb/storage directory. - -Driver structure -================ -Traditionally an LLD for the SCSI subsystem has been at least two files in -the drivers/scsi directory. For example, a driver called "xyz" has a header -file "xyz.h" and a source file "xyz.c". [Actually there is no good reason -why this couldn't all be in one file; the header file is superfluous.] Some -drivers that have been ported to several operating systems have more than -two files. For example the aic7xxx driver has separate files for generic -and OS-specific code (e.g. FreeBSD and Linux). Such drivers tend to have -their own directory under the drivers/scsi directory. - -When a new LLD is being added to Linux, the following files (found in the -drivers/scsi directory) will need some attention: Makefile and Kconfig . -It is probably best to study how existing LLDs are organized. - -As the 2.5 series development kernels evolve into the 2.6 series -production series, changes are being introduced into this interface. An -example of this is driver initialization code where there are now 2 models -available. The older one, similar to what was found in the lk 2.4 series, -is based on hosts that are detected at HBA driver load time. This will be -referred to the "passive" initialization model. The newer model allows HBAs -to be hot plugged (and unplugged) during the lifetime of the LLD and will -be referred to as the "hotplug" initialization model. The newer model is -preferred as it can handle both traditional SCSI equipment that is -permanently connected as well as modern "SCSI" devices (e.g. USB or -IEEE 1394 connected digital cameras) that are hotplugged. Both -initialization models are discussed in the following sections. - -An LLD interfaces to the SCSI subsystem several ways: - a) directly invoking functions supplied by the mid level - b) passing a set of function pointers to a registration function - supplied by the mid level. The mid level will then invoke these - functions at some point in the future. The LLD will supply - implementations of these functions. - c) direct access to instances of well known data structures maintained - by the mid level - -Those functions in group a) are listed in a section entitled "Mid level -supplied functions" below. - -Those functions in group b) are listed in a section entitled "Interface -functions" below. Their function pointers are placed in the members of -"struct scsi_host_template", an instance of which is passed to -scsi_host_alloc() ** . Those interface functions that the LLD does not -wish to supply should have NULL placed in the corresponding member of -struct scsi_host_template. Defining an instance of struct -scsi_host_template at file scope will cause NULL to be placed in function - pointer members not explicitly initialized. - -Those usages in group c) should be handled with care, especially in a -"hotplug" environment. LLDs should be aware of the lifetime of instances -that are shared with the mid level and other layers. - -All functions defined within an LLD and all data defined at file scope -should be static. For example the slave_alloc() function in an LLD -called "xxx" could be defined as -"static int xxx_slave_alloc(struct scsi_device * sdev) { /* code */ }" - -** the scsi_host_alloc() function is a replacement for the rather vaguely -named scsi_register() function in most situations. - - -Hotplug initialization model -============================ -In this model an LLD controls when SCSI hosts are introduced and removed -from the SCSI subsystem. Hosts can be introduced as early as driver -initialization and removed as late as driver shutdown. Typically a driver -will respond to a sysfs probe() callback that indicates an HBA has been -detected. After confirming that the new device is one that the LLD wants -to control, the LLD will initialize the HBA and then register a new host -with the SCSI mid level. - -During LLD initialization the driver should register itself with the -appropriate IO bus on which it expects to find HBA(s) (e.g. the PCI bus). -This can probably be done via sysfs. Any driver parameters (especially -those that are writable after the driver is loaded) could also be -registered with sysfs at this point. The SCSI mid level first becomes -aware of an LLD when that LLD registers its first HBA. - -At some later time, the LLD becomes aware of an HBA and what follows -is a typical sequence of calls between the LLD and the mid level. -This example shows the mid level scanning the newly introduced HBA for 3 -scsi devices of which only the first 2 respond: - - HBA PROBE: assume 2 SCSI devices found in scan -LLD mid level LLD -===-------------------=========--------------------===------ -scsi_host_alloc() --> -scsi_add_host() ----> -scsi_scan_host() -------+ - | - slave_alloc() - slave_configure() --> scsi_change_queue_depth() - | - slave_alloc() - slave_configure() - | - slave_alloc() *** - slave_destroy() *** ------------------------------------------------------------- - -If the LLD wants to adjust the default queue settings, it can invoke -scsi_change_queue_depth() in its slave_configure() routine. - -*** For scsi devices that the mid level tries to scan but do not - respond, a slave_alloc(), slave_destroy() pair is called. - -When an HBA is being removed it could be as part of an orderly shutdown -associated with the LLD module being unloaded (e.g. with the "rmmod" -command) or in response to a "hot unplug" indicated by sysfs()'s -remove() callback being invoked. In either case, the sequence is the -same: - - HBA REMOVE: assume 2 SCSI devices attached -LLD mid level LLD -===----------------------=========-----------------===------ -scsi_remove_host() ---------+ - | - slave_destroy() - slave_destroy() -scsi_host_put() ------------------------------------------------------------- - -It may be useful for a LLD to keep track of struct Scsi_Host instances -(a pointer is returned by scsi_host_alloc()). Such instances are "owned" -by the mid-level. struct Scsi_Host instances are freed from -scsi_host_put() when the reference count hits zero. - -Hot unplugging an HBA that controls a disk which is processing SCSI -commands on a mounted file system is an interesting situation. Reference -counting logic is being introduced into the mid level to cope with many -of the issues involved. See the section on reference counting below. - - -The hotplug concept may be extended to SCSI devices. Currently, when an -HBA is added, the scsi_scan_host() function causes a scan for SCSI devices -attached to the HBA's SCSI transport. On newer SCSI transports the HBA -may become aware of a new SCSI device _after_ the scan has completed. -An LLD can use this sequence to make the mid level aware of a SCSI device: - - SCSI DEVICE hotplug -LLD mid level LLD -===-------------------=========--------------------===------ -scsi_add_device() ------+ - | - slave_alloc() - slave_configure() [--> scsi_change_queue_depth()] ------------------------------------------------------------- - -In a similar fashion, an LLD may become aware that a SCSI device has been -removed (unplugged) or the connection to it has been interrupted. Some -existing SCSI transports (e.g. SPI) may not become aware that a SCSI -device has been removed until a subsequent SCSI command fails which will -probably cause that device to be set offline by the mid level. An LLD that -detects the removal of a SCSI device can instigate its removal from -upper layers with this sequence: - - SCSI DEVICE hot unplug -LLD mid level LLD -===----------------------=========-----------------===------ -scsi_remove_device() -------+ - | - slave_destroy() ------------------------------------------------------------- - -It may be useful for an LLD to keep track of struct scsi_device instances -(a pointer is passed as the parameter to slave_alloc() and -slave_configure() callbacks). Such instances are "owned" by the mid-level. -struct scsi_device instances are freed after slave_destroy(). - - -Reference Counting -================== -The Scsi_Host structure has had reference counting infrastructure added. -This effectively spreads the ownership of struct Scsi_Host instances -across the various SCSI layers which use them. Previously such instances -were exclusively owned by the mid level. LLDs would not usually need to -directly manipulate these reference counts but there may be some cases -where they do. - -There are 3 reference counting functions of interest associated with -struct Scsi_Host: - - scsi_host_alloc(): returns a pointer to new instance of struct - Scsi_Host which has its reference count ^^ set to 1 - - scsi_host_get(): adds 1 to the reference count of the given instance - - scsi_host_put(): decrements 1 from the reference count of the given - instance. If the reference count reaches 0 then the given instance - is freed - -The scsi_device structure has had reference counting infrastructure added. -This effectively spreads the ownership of struct scsi_device instances -across the various SCSI layers which use them. Previously such instances -were exclusively owned by the mid level. See the access functions declared -towards the end of include/scsi/scsi_device.h . If an LLD wants to keep -a copy of a pointer to a scsi_device instance it should use scsi_device_get() -to bump its reference count. When it is finished with the pointer it can -use scsi_device_put() to decrement its reference count (and potentially -delete it). - -^^ struct Scsi_Host actually has 2 reference counts which are manipulated -in parallel by these functions. - - -Conventions -=========== -First, Linus Torvalds's thoughts on C coding style can be found in the -Documentation/process/coding-style.rst file. - -Next, there is a movement to "outlaw" typedefs introducing synonyms for -struct tags. Both can be still found in the SCSI subsystem, but -the typedefs have been moved to a single file, scsi_typedefs.h to -make their future removal easier, for example: -"typedef struct scsi_cmnd Scsi_Cmnd;" - -Also, most C99 enhancements are encouraged to the extent they are supported -by the relevant gcc compilers. So C99 style structure and array -initializers are encouraged where appropriate. Don't go too far, -VLAs are not properly supported yet. An exception to this is the use of -"//" style comments; /*...*/ comments are still preferred in Linux. - -Well written, tested and documented code, need not be re-formatted to -comply with the above conventions. For example, the aic7xxx driver -comes to Linux from FreeBSD and Adaptec's own labs. No doubt FreeBSD -and Adaptec have their own coding conventions. - - -Mid level supplied functions -============================ -These functions are supplied by the SCSI mid level for use by LLDs. -The names (i.e. entry points) of these functions are exported -so an LLD that is a module can access them. The kernel will -arrange for the SCSI mid level to be loaded and initialized before any LLD -is initialized. The functions below are listed alphabetically and their -names all start with "scsi_". - -Summary: - scsi_add_device - creates new scsi device (lu) instance - scsi_add_host - perform sysfs registration and set up transport class - scsi_change_queue_depth - change the queue depth on a SCSI device - scsi_bios_ptable - return copy of block device's partition table - scsi_block_requests - prevent further commands being queued to given host - scsi_host_alloc - return a new scsi_host instance whose refcount==1 - scsi_host_get - increments Scsi_Host instance's refcount - scsi_host_put - decrements Scsi_Host instance's refcount (free if 0) - scsi_partsize - parse partition table into cylinders, heads + sectors - scsi_register - create and register a scsi host adapter instance. - scsi_remove_device - detach and remove a SCSI device - scsi_remove_host - detach and remove all SCSI devices owned by host - scsi_report_bus_reset - report scsi _bus_ reset observed - scsi_scan_host - scan SCSI bus - scsi_track_queue_full - track successive QUEUE_FULL events - scsi_unblock_requests - allow further commands to be queued to given host - scsi_unregister - [calls scsi_host_put()] - - -Details: - -/** - * scsi_add_device - creates new scsi device (lu) instance - * @shost: pointer to scsi host instance - * @channel: channel number (rarely other than 0) - * @id: target id number - * @lun: logical unit number - * - * Returns pointer to new struct scsi_device instance or - * ERR_PTR(-ENODEV) (or some other bent pointer) if something is - * wrong (e.g. no lu responds at given address) - * - * Might block: yes - * - * Notes: This call is usually performed internally during a scsi - * bus scan when an HBA is added (i.e. scsi_scan_host()). So it - * should only be called if the HBA becomes aware of a new scsi - * device (lu) after scsi_scan_host() has completed. If successful - * this call can lead to slave_alloc() and slave_configure() callbacks - * into the LLD. - * - * Defined in: drivers/scsi/scsi_scan.c - **/ -struct scsi_device * scsi_add_device(struct Scsi_Host *shost, - unsigned int channel, - unsigned int id, unsigned int lun) - - -/** - * scsi_add_host - perform sysfs registration and set up transport class - * @shost: pointer to scsi host instance - * @dev: pointer to struct device of type scsi class - * - * Returns 0 on success, negative errno of failure (e.g. -ENOMEM) - * - * Might block: no - * - * Notes: Only required in "hotplug initialization model" after a - * successful call to scsi_host_alloc(). This function does not - * scan the bus; this can be done by calling scsi_scan_host() or - * in some other transport-specific way. The LLD must set up - * the transport template before calling this function and may only - * access the transport class data after this function has been called. - * - * Defined in: drivers/scsi/hosts.c - **/ -int scsi_add_host(struct Scsi_Host *shost, struct device * dev) - - -/** - * scsi_change_queue_depth - allow LLD to change queue depth on a SCSI device - * @sdev: pointer to SCSI device to change queue depth on - * @tags Number of tags allowed if tagged queuing enabled, - * or number of commands the LLD can queue up - * in non-tagged mode (as per cmd_per_lun). - * - * Returns nothing - * - * Might block: no - * - * Notes: Can be invoked any time on a SCSI device controlled by this - * LLD. [Specifically during and after slave_configure() and prior to - * slave_destroy().] Can safely be invoked from interrupt code. - * - * Defined in: drivers/scsi/scsi.c [see source code for more notes] - * - **/ -int scsi_change_queue_depth(struct scsi_device *sdev, int tags) - - -/** - * scsi_bios_ptable - return copy of block device's partition table - * @dev: pointer to block device - * - * Returns pointer to partition table, or NULL for failure - * - * Might block: yes - * - * Notes: Caller owns memory returned (free with kfree() ) - * - * Defined in: drivers/scsi/scsicam.c - **/ -unsigned char *scsi_bios_ptable(struct block_device *dev) - - -/** - * scsi_block_requests - prevent further commands being queued to given host - * - * @shost: pointer to host to block commands on - * - * Returns nothing - * - * Might block: no - * - * Notes: There is no timer nor any other means by which the requests - * get unblocked other than the LLD calling scsi_unblock_requests(). - * - * Defined in: drivers/scsi/scsi_lib.c -**/ -void scsi_block_requests(struct Scsi_Host * shost) - - -/** - * scsi_host_alloc - create a scsi host adapter instance and perform basic - * initialization. - * @sht: pointer to scsi host template - * @privsize: extra bytes to allocate in hostdata array (which is the - * last member of the returned Scsi_Host instance) - * - * Returns pointer to new Scsi_Host instance or NULL on failure - * - * Might block: yes - * - * Notes: When this call returns to the LLD, the SCSI bus scan on - * this host has _not_ yet been done. - * The hostdata array (by default zero length) is a per host scratch - * area for the LLD's exclusive use. - * Both associated refcounting objects have their refcount set to 1. - * Full registration (in sysfs) and a bus scan are performed later when - * scsi_add_host() and scsi_scan_host() are called. - * - * Defined in: drivers/scsi/hosts.c . - **/ -struct Scsi_Host * scsi_host_alloc(struct scsi_host_template * sht, - int privsize) - - -/** - * scsi_host_get - increment Scsi_Host instance refcount - * @shost: pointer to struct Scsi_Host instance - * - * Returns nothing - * - * Might block: currently may block but may be changed to not block - * - * Notes: Actually increments the counts in two sub-objects - * - * Defined in: drivers/scsi/hosts.c - **/ -void scsi_host_get(struct Scsi_Host *shost) - - -/** - * scsi_host_put - decrement Scsi_Host instance refcount, free if 0 - * @shost: pointer to struct Scsi_Host instance - * - * Returns nothing - * - * Might block: currently may block but may be changed to not block - * - * Notes: Actually decrements the counts in two sub-objects. If the - * latter refcount reaches 0, the Scsi_Host instance is freed. - * The LLD need not worry exactly when the Scsi_Host instance is - * freed, it just shouldn't access the instance after it has balanced - * out its refcount usage. - * - * Defined in: drivers/scsi/hosts.c - **/ -void scsi_host_put(struct Scsi_Host *shost) - - -/** - * scsi_partsize - parse partition table into cylinders, heads + sectors - * @buf: pointer to partition table - * @capacity: size of (total) disk in 512 byte sectors - * @cyls: outputs number of cylinders calculated via this pointer - * @hds: outputs number of heads calculated via this pointer - * @secs: outputs number of sectors calculated via this pointer - * - * Returns 0 on success, -1 on failure - * - * Might block: no - * - * Notes: Caller owns memory returned (free with kfree() ) - * - * Defined in: drivers/scsi/scsicam.c - **/ -int scsi_partsize(unsigned char *buf, unsigned long capacity, - unsigned int *cyls, unsigned int *hds, unsigned int *secs) - - -/** - * scsi_register - create and register a scsi host adapter instance. - * @sht: pointer to scsi host template - * @privsize: extra bytes to allocate in hostdata array (which is the - * last member of the returned Scsi_Host instance) - * - * Returns pointer to new Scsi_Host instance or NULL on failure - * - * Might block: yes - * - * Notes: When this call returns to the LLD, the SCSI bus scan on - * this host has _not_ yet been done. - * The hostdata array (by default zero length) is a per host scratch - * area for the LLD. - * - * Defined in: drivers/scsi/hosts.c . - **/ -struct Scsi_Host * scsi_register(struct scsi_host_template * sht, - int privsize) - - -/** - * scsi_remove_device - detach and remove a SCSI device - * @sdev: a pointer to a scsi device instance - * - * Returns value: 0 on success, -EINVAL if device not attached - * - * Might block: yes - * - * Notes: If an LLD becomes aware that a scsi device (lu) has - * been removed but its host is still present then it can request - * the removal of that scsi device. If successful this call will - * lead to the slave_destroy() callback being invoked. sdev is an - * invalid pointer after this call. - * - * Defined in: drivers/scsi/scsi_sysfs.c . - **/ -int scsi_remove_device(struct scsi_device *sdev) - - -/** - * scsi_remove_host - detach and remove all SCSI devices owned by host - * @shost: a pointer to a scsi host instance - * - * Returns value: 0 on success, 1 on failure (e.g. LLD busy ??) - * - * Might block: yes - * - * Notes: Should only be invoked if the "hotplug initialization - * model" is being used. It should be called _prior_ to - * scsi_unregister(). - * - * Defined in: drivers/scsi/hosts.c . - **/ -int scsi_remove_host(struct Scsi_Host *shost) - - -/** - * scsi_report_bus_reset - report scsi _bus_ reset observed - * @shost: a pointer to a scsi host involved - * @channel: channel (within) host on which scsi bus reset occurred - * - * Returns nothing - * - * Might block: no - * - * Notes: This only needs to be called if the reset is one which - * originates from an unknown location. Resets originated by the - * mid level itself don't need to call this, but there should be - * no harm. The main purpose of this is to make sure that a - * CHECK_CONDITION is properly treated. - * - * Defined in: drivers/scsi/scsi_error.c . - **/ -void scsi_report_bus_reset(struct Scsi_Host * shost, int channel) - - -/** - * scsi_scan_host - scan SCSI bus - * @shost: a pointer to a scsi host instance - * - * Might block: yes - * - * Notes: Should be called after scsi_add_host() - * - * Defined in: drivers/scsi/scsi_scan.c - **/ -void scsi_scan_host(struct Scsi_Host *shost) - - -/** - * scsi_track_queue_full - track successive QUEUE_FULL events on given - * device to determine if and when there is a need - * to adjust the queue depth on the device. - * @sdev: pointer to SCSI device instance - * @depth: Current number of outstanding SCSI commands on this device, - * not counting the one returned as QUEUE_FULL. - * - * Returns 0 - no change needed - * >0 - adjust queue depth to this new depth - * -1 - drop back to untagged operation using host->cmd_per_lun - * as the untagged command depth - * - * Might block: no - * - * Notes: LLDs may call this at any time and we will do "The Right - * Thing"; interrupt context safe. - * - * Defined in: drivers/scsi/scsi.c . - **/ -int scsi_track_queue_full(struct scsi_device *sdev, int depth) - - -/** - * scsi_unblock_requests - allow further commands to be queued to given host - * - * @shost: pointer to host to unblock commands on - * - * Returns nothing - * - * Might block: no - * - * Defined in: drivers/scsi/scsi_lib.c . -**/ -void scsi_unblock_requests(struct Scsi_Host * shost) - - -/** - * scsi_unregister - unregister and free memory used by host instance - * @shp: pointer to scsi host instance to unregister. - * - * Returns nothing - * - * Might block: no - * - * Notes: Should not be invoked if the "hotplug initialization - * model" is being used. Called internally by exit_this_scsi_driver() - * in the "passive initialization model". Hence a LLD has no need to - * call this function directly. - * - * Defined in: drivers/scsi/hosts.c . - **/ -void scsi_unregister(struct Scsi_Host * shp) - - - - -Interface Functions -=================== -Interface functions are supplied (defined) by LLDs and their function -pointers are placed in an instance of struct scsi_host_template which -is passed to scsi_host_alloc() [or scsi_register() / init_this_scsi_driver()]. -Some are mandatory. Interface functions should be declared static. The -accepted convention is that driver "xyz" will declare its slave_configure() -function as: - static int xyz_slave_configure(struct scsi_device * sdev); -and so forth for all interface functions listed below. - -A pointer to this function should be placed in the 'slave_configure' member -of a "struct scsi_host_template" instance. A pointer to such an instance -should be passed to the mid level's scsi_host_alloc() [or scsi_register() / -init_this_scsi_driver()]. - -The interface functions are also described in the include/scsi/scsi_host.h -file immediately above their definition point in "struct scsi_host_template". -In some cases more detail is given in scsi_host.h than below. - -The interface functions are listed below in alphabetical order. - -Summary: - bios_param - fetch head, sector, cylinder info for a disk - eh_timed_out - notify the host that a command timer expired - eh_abort_handler - abort given command - eh_bus_reset_handler - issue SCSI bus reset - eh_device_reset_handler - issue SCSI device reset - eh_host_reset_handler - reset host (host bus adapter) - info - supply information about given host - ioctl - driver can respond to ioctls - proc_info - supports /proc/scsi/{driver_name}/{host_no} - queuecommand - queue scsi command, invoke 'done' on completion - slave_alloc - prior to any commands being sent to a new device - slave_configure - driver fine tuning for given device after attach - slave_destroy - given device is about to be shut down - - -Details: - -/** - * bios_param - fetch head, sector, cylinder info for a disk - * @sdev: pointer to scsi device context (defined in - * include/scsi/scsi_device.h) - * @bdev: pointer to block device context (defined in fs.h) - * @capacity: device size (in 512 byte sectors) - * @params: three element array to place output: - * params[0] number of heads (max 255) - * params[1] number of sectors (max 63) - * params[2] number of cylinders - * - * Return value is ignored - * - * Locks: none - * - * Calling context: process (sd) - * - * Notes: an arbitrary geometry (based on READ CAPACITY) is used - * if this function is not provided. The params array is - * pre-initialized with made up values just in case this function - * doesn't output anything. - * - * Optionally defined in: LLD - **/ - int bios_param(struct scsi_device * sdev, struct block_device *bdev, - sector_t capacity, int params[3]) - - -/** - * eh_timed_out - The timer for the command has just fired - * @scp: identifies command timing out - * - * Returns: - * - * EH_HANDLED: I fixed the error, please complete the command - * EH_RESET_TIMER: I need more time, reset the timer and - * begin counting again - * EH_NOT_HANDLED Begin normal error recovery - * - * - * Locks: None held - * - * Calling context: interrupt - * - * Notes: This is to give the LLD an opportunity to do local recovery. - * This recovery is limited to determining if the outstanding command - * will ever complete. You may not abort and restart the command from - * this callback. - * - * Optionally defined in: LLD - **/ - int eh_timed_out(struct scsi_cmnd * scp) - - -/** - * eh_abort_handler - abort command associated with scp - * @scp: identifies command to be aborted - * - * Returns SUCCESS if command aborted else FAILED - * - * Locks: None held - * - * Calling context: kernel thread - * - * Notes: If 'no_async_abort' is defined this callback - * will be invoked from scsi_eh thread. No other commands - * will then be queued on current host during eh. - * Otherwise it will be called whenever scsi_times_out() - * is called due to a command timeout. - * - * Optionally defined in: LLD - **/ - int eh_abort_handler(struct scsi_cmnd * scp) - - -/** - * eh_bus_reset_handler - issue SCSI bus reset - * @scp: SCSI bus that contains this device should be reset - * - * Returns SUCCESS if command aborted else FAILED - * - * Locks: None held - * - * Calling context: kernel thread - * - * Notes: Invoked from scsi_eh thread. No other commands will be - * queued on current host during eh. - * - * Optionally defined in: LLD - **/ - int eh_bus_reset_handler(struct scsi_cmnd * scp) - - -/** - * eh_device_reset_handler - issue SCSI device reset - * @scp: identifies SCSI device to be reset - * - * Returns SUCCESS if command aborted else FAILED - * - * Locks: None held - * - * Calling context: kernel thread - * - * Notes: Invoked from scsi_eh thread. No other commands will be - * queued on current host during eh. - * - * Optionally defined in: LLD - **/ - int eh_device_reset_handler(struct scsi_cmnd * scp) - - -/** - * eh_host_reset_handler - reset host (host bus adapter) - * @scp: SCSI host that contains this device should be reset - * - * Returns SUCCESS if command aborted else FAILED - * - * Locks: None held - * - * Calling context: kernel thread - * - * Notes: Invoked from scsi_eh thread. No other commands will be - * queued on current host during eh. - * With the default eh_strategy in place, if none of the _abort_, - * _device_reset_, _bus_reset_ or this eh handler function are - * defined (or they all return FAILED) then the device in question - * will be set offline whenever eh is invoked. - * - * Optionally defined in: LLD - **/ - int eh_host_reset_handler(struct scsi_cmnd * scp) - - -/** - * info - supply information about given host: driver name plus data - * to distinguish given host - * @shp: host to supply information about - * - * Return ASCII null terminated string. [This driver is assumed to - * manage the memory pointed to and maintain it, typically for the - * lifetime of this host.] - * - * Locks: none - * - * Calling context: process - * - * Notes: Often supplies PCI or ISA information such as IO addresses - * and interrupt numbers. If not supplied struct Scsi_Host::name used - * instead. It is assumed the returned information fits on one line - * (i.e. does not included embedded newlines). - * The SCSI_IOCTL_PROBE_HOST ioctl yields the string returned by this - * function (or struct Scsi_Host::name if this function is not - * available). - * In a similar manner, init_this_scsi_driver() outputs to the console - * each host's "info" (or name) for the driver it is registering. - * Also if proc_info() is not supplied, the output of this function - * is used instead. - * - * Optionally defined in: LLD - **/ - const char * info(struct Scsi_Host * shp) - - -/** - * ioctl - driver can respond to ioctls - * @sdp: device that ioctl was issued for - * @cmd: ioctl number - * @arg: pointer to read or write data from. Since it points to - * user space, should use appropriate kernel functions - * (e.g. copy_from_user() ). In the Unix style this argument - * can also be viewed as an unsigned long. - * - * Returns negative "errno" value when there is a problem. 0 or a - * positive value indicates success and is returned to the user space. - * - * Locks: none - * - * Calling context: process - * - * Notes: The SCSI subsystem uses a "trickle down" ioctl model. - * The user issues an ioctl() against an upper level driver - * (e.g. /dev/sdc) and if the upper level driver doesn't recognize - * the 'cmd' then it is passed to the SCSI mid level. If the SCSI - * mid level does not recognize it, then the LLD that controls - * the device receives the ioctl. According to recent Unix standards - * unsupported ioctl() 'cmd' numbers should return -ENOTTY. - * - * Optionally defined in: LLD - **/ - int ioctl(struct scsi_device *sdp, int cmd, void *arg) - - -/** - * proc_info - supports /proc/scsi/{driver_name}/{host_no} - * @buffer: anchor point to output to (0==writeto1_read0) or fetch from - * (1==writeto1_read0). - * @start: where "interesting" data is written to. Ignored when - * 1==writeto1_read0. - * @offset: offset within buffer 0==writeto1_read0 is actually - * interested in. Ignored when 1==writeto1_read0 . - * @length: maximum (or actual) extent of buffer - * @host_no: host number of interest (struct Scsi_Host::host_no) - * @writeto1_read0: 1 -> data coming from user space towards driver - * (e.g. "echo some_string > /proc/scsi/xyz/2") - * 0 -> user what data from this driver - * (e.g. "cat /proc/scsi/xyz/2") - * - * Returns length when 1==writeto1_read0. Otherwise number of chars - * output to buffer past offset. - * - * Locks: none held - * - * Calling context: process - * - * Notes: Driven from scsi_proc.c which interfaces to proc_fs. proc_fs - * support can now be configured out of the scsi subsystem. - * - * Optionally defined in: LLD - **/ - int proc_info(char * buffer, char ** start, off_t offset, - int length, int host_no, int writeto1_read0) - - -/** - * queuecommand - queue scsi command, invoke scp->scsi_done on completion - * @shost: pointer to the scsi host object - * @scp: pointer to scsi command object - * - * Returns 0 on success. - * - * If there's a failure, return either: - * - * SCSI_MLQUEUE_DEVICE_BUSY if the device queue is full, or - * SCSI_MLQUEUE_HOST_BUSY if the entire host queue is full - * - * On both of these returns, the mid-layer will requeue the I/O - * - * - if the return is SCSI_MLQUEUE_DEVICE_BUSY, only that particular - * device will be paused, and it will be unpaused when a command to - * the device returns (or after a brief delay if there are no more - * outstanding commands to it). Commands to other devices continue - * to be processed normally. - * - * - if the return is SCSI_MLQUEUE_HOST_BUSY, all I/O to the host - * is paused and will be unpaused when any command returns from - * the host (or after a brief delay if there are no outstanding - * commands to the host). - * - * For compatibility with earlier versions of queuecommand, any - * other return value is treated the same as - * SCSI_MLQUEUE_HOST_BUSY. - * - * Other types of errors that are detected immediately may be - * flagged by setting scp->result to an appropriate value, - * invoking the scp->scsi_done callback, and then returning 0 - * from this function. If the command is not performed - * immediately (and the LLD is starting (or will start) the given - * command) then this function should place 0 in scp->result and - * return 0. - * - * Command ownership. If the driver returns zero, it owns the - * command and must take responsibility for ensuring the - * scp->scsi_done callback is executed. Note: the driver may - * call scp->scsi_done before returning zero, but after it has - * called scp->scsi_done, it may not return any value other than - * zero. If the driver makes a non-zero return, it must not - * execute the command's scsi_done callback at any time. - * - * Locks: up to and including 2.6.36, struct Scsi_Host::host_lock - * held on entry (with "irqsave") and is expected to be - * held on return. From 2.6.37 onwards, queuecommand is - * called without any locks held. - * - * Calling context: in interrupt (soft irq) or process context - * - * Notes: This function should be relatively fast. Normally it - * will not wait for IO to complete. Hence the scp->scsi_done - * callback is invoked (often directly from an interrupt service - * routine) some time after this function has returned. In some - * cases (e.g. pseudo adapter drivers that manufacture the - * response to a SCSI INQUIRY) the scp->scsi_done callback may be - * invoked before this function returns. If the scp->scsi_done - * callback is not invoked within a certain period the SCSI mid - * level will commence error processing. If a status of CHECK - * CONDITION is placed in "result" when the scp->scsi_done - * callback is invoked, then the LLD driver should perform - * autosense and fill in the struct scsi_cmnd::sense_buffer - * array. The scsi_cmnd::sense_buffer array is zeroed prior to - * the mid level queuing a command to an LLD. - * - * Defined in: LLD - **/ - int queuecommand(struct Scsi_Host *shost, struct scsi_cmnd * scp) - - -/** - * slave_alloc - prior to any commands being sent to a new device - * (i.e. just prior to scan) this call is made - * @sdp: pointer to new device (about to be scanned) - * - * Returns 0 if ok. Any other return is assumed to be an error and - * the device is ignored. - * - * Locks: none - * - * Calling context: process - * - * Notes: Allows the driver to allocate any resources for a device - * prior to its initial scan. The corresponding scsi device may not - * exist but the mid level is just about to scan for it (i.e. send - * and INQUIRY command plus ...). If a device is found then - * slave_configure() will be called while if a device is not found - * slave_destroy() is called. - * For more details see the include/scsi/scsi_host.h file. - * - * Optionally defined in: LLD - **/ - int slave_alloc(struct scsi_device *sdp) - - -/** - * slave_configure - driver fine tuning for given device just after it - * has been first scanned (i.e. it responded to an - * INQUIRY) - * @sdp: device that has just been attached - * - * Returns 0 if ok. Any other return is assumed to be an error and - * the device is taken offline. [offline devices will _not_ have - * slave_destroy() called on them so clean up resources.] - * - * Locks: none - * - * Calling context: process - * - * Notes: Allows the driver to inspect the response to the initial - * INQUIRY done by the scanning code and take appropriate action. - * For more details see the include/scsi/scsi_host.h file. - * - * Optionally defined in: LLD - **/ - int slave_configure(struct scsi_device *sdp) - - -/** - * slave_destroy - given device is about to be shut down. All - * activity has ceased on this device. - * @sdp: device that is about to be shut down - * - * Returns nothing - * - * Locks: none - * - * Calling context: process - * - * Notes: Mid level structures for given device are still in place - * but are about to be torn down. Any per device resources allocated - * by this driver for given device should be freed now. No further - * commands will be sent for this sdp instance. [However the device - * could be re-attached in the future in which case a new instance - * of struct scsi_device would be supplied by future slave_alloc() - * and slave_configure() calls.] - * - * Optionally defined in: LLD - **/ - void slave_destroy(struct scsi_device *sdp) - - - -Data Structures -=============== -struct scsi_host_template -------------------------- -There is one "struct scsi_host_template" instance per LLD ***. It is -typically initialized as a file scope static in a driver's header file. That -way members that are not explicitly initialized will be set to 0 or NULL. -Member of interest: - name - name of driver (may contain spaces, please limit to - less than 80 characters) - proc_name - name used in "/proc/scsi/<proc_name>/<host_no>" and - by sysfs in one of its "drivers" directories. Hence - "proc_name" should only contain characters acceptable - to a Unix file name. - (*queuecommand)() - primary callback that the mid level uses to inject - SCSI commands into an LLD. -The structure is defined and commented in include/scsi/scsi_host.h - -*** In extreme situations a single driver may have several instances - if it controls several different classes of hardware (e.g. an LLD - that handles both ISA and PCI cards and has a separate instance of - struct scsi_host_template for each class). - -struct Scsi_Host ----------------- -There is one struct Scsi_Host instance per host (HBA) that an LLD -controls. The struct Scsi_Host structure has many members in common -with "struct scsi_host_template". When a new struct Scsi_Host instance -is created (in scsi_host_alloc() in hosts.c) those common members are -initialized from the driver's struct scsi_host_template instance. Members -of interest: - host_no - system wide unique number that is used for identifying - this host. Issued in ascending order from 0. - can_queue - must be greater than 0; do not send more than can_queue - commands to the adapter. - this_id - scsi id of host (scsi initiator) or -1 if not known - sg_tablesize - maximum scatter gather elements allowed by host. - Set this to SG_ALL or less to avoid chained SG lists. - Must be at least 1. - max_sectors - maximum number of sectors (usually 512 bytes) allowed - in a single SCSI command. The default value of 0 leads - to a setting of SCSI_DEFAULT_MAX_SECTORS (defined in - scsi_host.h) which is currently set to 1024. So for a - disk the maximum transfer size is 512 KB when max_sectors - is not defined. Note that this size may not be sufficient - for disk firmware uploads. - cmd_per_lun - maximum number of commands that can be queued on devices - controlled by the host. Overridden by LLD calls to - scsi_change_queue_depth(). - unchecked_isa_dma - 1=>only use bottom 16 MB of ram (ISA DMA addressing - restriction), 0=>can use full 32 bit (or better) DMA - address space - no_async_abort - 1=>Asynchronous aborts are not supported - 0=>Timed-out commands will be aborted asynchronously - hostt - pointer to driver's struct scsi_host_template from which - this struct Scsi_Host instance was spawned - hostt->proc_name - name of LLD. This is the driver name that sysfs uses - transportt - pointer to driver's struct scsi_transport_template instance - (if any). FC and SPI transports currently supported. - sh_list - a double linked list of pointers to all struct Scsi_Host - instances (currently ordered by ascending host_no) - my_devices - a double linked list of pointers to struct scsi_device - instances that belong to this host. - hostdata[0] - area reserved for LLD at end of struct Scsi_Host. Size - is set by the second argument (named 'xtr_bytes') to - scsi_host_alloc() or scsi_register(). - vendor_id - a unique value that identifies the vendor supplying - the LLD for the Scsi_Host. Used most often in validating - vendor-specific message requests. Value consists of an - identifier type and a vendor-specific value. - See scsi_netlink.h for a description of valid formats. - -The scsi_host structure is defined in include/scsi/scsi_host.h - -struct scsi_device ------------------- -Generally, there is one instance of this structure for each SCSI logical unit -on a host. Scsi devices connected to a host are uniquely identified by a -channel number, target id and logical unit number (lun). -The structure is defined in include/scsi/scsi_device.h - -struct scsi_cmnd ----------------- -Instances of this structure convey SCSI commands to the LLD and responses -back to the mid level. The SCSI mid level will ensure that no more SCSI -commands become queued against the LLD than are indicated by -scsi_change_queue_depth() (or struct Scsi_Host::cmd_per_lun). There will -be at least one instance of struct scsi_cmnd available for each SCSI device. -Members of interest: - cmnd - array containing SCSI command - cmnd_len - length (in bytes) of SCSI command - sc_data_direction - direction of data transfer in data phase. See - "enum dma_data_direction" in include/linux/dma-mapping.h - request_bufflen - number of data bytes to transfer (0 if no data phase) - use_sg - ==0 -> no scatter gather list, hence transfer data - to/from request_buffer - - >0 -> scatter gather list (actually an array) in - request_buffer with use_sg elements - request_buffer - either contains data buffer or scatter gather list - depending on the setting of use_sg. Scatter gather - elements are defined by 'struct scatterlist' found - in include/linux/scatterlist.h . - done - function pointer that should be invoked by LLD when the - SCSI command is completed (successfully or otherwise). - Should only be called by an LLD if the LLD has accepted - the command (i.e. queuecommand() returned or will return - 0). The LLD may invoke 'done' prior to queuecommand() - finishing. - result - should be set by LLD prior to calling 'done'. A value - of 0 implies a successfully completed command (and all - data (if any) has been transferred to or from the SCSI - target device). 'result' is a 32 bit unsigned integer that - can be viewed as 4 related bytes. The SCSI status value is - in the LSB. See include/scsi/scsi.h status_byte(), - msg_byte(), host_byte() and driver_byte() macros and - related constants. - sense_buffer - an array (maximum size: SCSI_SENSE_BUFFERSIZE bytes) that - should be written when the SCSI status (LSB of 'result') - is set to CHECK_CONDITION (2). When CHECK_CONDITION is - set, if the top nibble of sense_buffer[0] has the value 7 - then the mid level will assume the sense_buffer array - contains a valid SCSI sense buffer; otherwise the mid - level will issue a REQUEST_SENSE SCSI command to - retrieve the sense buffer. The latter strategy is error - prone in the presence of command queuing so the LLD should - always "auto-sense". - device - pointer to scsi_device object that this command is - associated with. - resid - an LLD should set this signed integer to the requested - transfer length (i.e. 'request_bufflen') less the number - of bytes that are actually transferred. 'resid' is - preset to 0 so an LLD can ignore it if it cannot detect - underruns (overruns should be rare). If possible an LLD - should set 'resid' prior to invoking 'done'. The most - interesting case is data transfers from a SCSI target - device (e.g. READs) that underrun. - underflow - LLD should place (DID_ERROR << 16) in 'result' if - actual number of bytes transferred is less than this - figure. Not many LLDs implement this check and some that - do just output an error message to the log rather than - report a DID_ERROR. Better for an LLD to implement - 'resid'. - -It is recommended that a LLD set 'resid' on data transfers from a SCSI -target device (e.g. READs). It is especially important that 'resid' is set -when such data transfers have sense keys of MEDIUM ERROR and HARDWARE ERROR -(and possibly RECOVERED ERROR). In these cases if a LLD is in doubt how much -data has been received then the safest approach is to indicate no bytes have -been received. For example: to indicate that no valid data has been received -a LLD might use these helpers: - scsi_set_resid(SCpnt, scsi_bufflen(SCpnt)); -where 'SCpnt' is a pointer to a scsi_cmnd object. To indicate only three 512 -bytes blocks has been received 'resid' could be set like this: - scsi_set_resid(SCpnt, scsi_bufflen(SCpnt) - (3 * 512)); - -The scsi_cmnd structure is defined in include/scsi/scsi_cmnd.h - - -Locks -===== -Each struct Scsi_Host instance has a spin_lock called struct -Scsi_Host::default_lock which is initialized in scsi_host_alloc() [found in -hosts.c]. Within the same function the struct Scsi_Host::host_lock pointer -is initialized to point at default_lock. Thereafter lock and unlock -operations performed by the mid level use the struct Scsi_Host::host_lock -pointer. Previously drivers could override the host_lock pointer but -this is not allowed anymore. - - -Autosense -========= -Autosense (or auto-sense) is defined in the SAM-2 document as "the -automatic return of sense data to the application client coincident -with the completion of a SCSI command" when a status of CHECK CONDITION -occurs. LLDs should perform autosense. This should be done when the LLD -detects a CHECK CONDITION status by either: - a) instructing the SCSI protocol (e.g. SCSI Parallel Interface (SPI)) - to perform an extra data in phase on such responses - b) or, the LLD issuing a REQUEST SENSE command itself - -Either way, when a status of CHECK CONDITION is detected, the mid level -decides whether the LLD has performed autosense by checking struct -scsi_cmnd::sense_buffer[0] . If this byte has an upper nibble of 7 (or 0xf) -then autosense is assumed to have taken place. If it has another value (and -this byte is initialized to 0 before each command) then the mid level will -issue a REQUEST SENSE command. - -In the presence of queued commands the "nexus" that maintains sense -buffer data from the command that failed until a following REQUEST SENSE -may get out of synchronization. This is why it is best for the LLD -to perform autosense. - - -Changes since lk 2.4 series -=========================== -io_request_lock has been replaced by several finer grained locks. The lock -relevant to LLDs is struct Scsi_Host::host_lock and there is -one per SCSI host. - -The older error handling mechanism has been removed. This means the -LLD interface functions abort() and reset() have been removed. -The struct scsi_host_template::use_new_eh_code flag has been removed. - -In the 2.4 series the SCSI subsystem configuration descriptions were -aggregated with the configuration descriptions from all other Linux -subsystems in the Documentation/Configure.help file. In the 2.6 series, -the SCSI subsystem now has its own (much smaller) drivers/scsi/Kconfig -file that contains both configuration and help information. - -struct SHT has been renamed to struct scsi_host_template. - -Addition of the "hotplug initialization model" and many extra functions -to support it. - - -Credits -======= -The following people have contributed to this document: - Mike Anderson <andmike at us dot ibm dot com> - James Bottomley <James dot Bottomley at hansenpartnership dot com> - Patrick Mansfield <patmans at us dot ibm dot com> - Christoph Hellwig <hch at infradead dot org> - Doug Ledford <dledford at redhat dot com> - Andries Brouwer <Andries dot Brouwer at cwi dot nl> - Randy Dunlap <rdunlap at xenotime dot net> - Alan Stern <stern at rowland dot harvard dot edu> - - -Douglas Gilbert -dgilbert at interlog dot com -21st September 2004 diff --git a/Documentation/scsi/scsi_transport_srp/Makefile b/Documentation/scsi/scsi_transport_srp/Makefile deleted file mode 100644 index 5f6b567e955c..000000000000 --- a/Documentation/scsi/scsi_transport_srp/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -all: rport_state_diagram.svg rport_state_diagram.png - -rport_state_diagram.svg: rport_state_diagram.dot - dot -Tsvg -o $@ $< - -rport_state_diagram.png: rport_state_diagram.dot - dot -Tpng -o $@ $< diff --git a/Documentation/scsi/scsi_transport_srp/figures.rst b/Documentation/scsi/scsi_transport_srp/figures.rst new file mode 100644 index 000000000000..6c8f8dd6301b --- /dev/null +++ b/Documentation/scsi/scsi_transport_srp/figures.rst @@ -0,0 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +SCSI RDMA (SRP) transport class diagram +======================================= + +.. kernel-figure:: rport_state_diagram.dot diff --git a/Documentation/scsi/sd-parameters.rst b/Documentation/scsi/sd-parameters.rst new file mode 100644 index 000000000000..87d554008bfb --- /dev/null +++ b/Documentation/scsi/sd-parameters.rst @@ -0,0 +1,27 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Linux SCSI Disk Driver (sd) Parameters +====================================== + +cache_type (RW) +--------------- +Enable/disable drive write & read cache. + +=========================== === === =========== ========== + cache_type string WCE RCD Write cache Read cache +=========================== === === =========== ========== + write through 0 0 off on + none 0 1 off off + write back 1 0 on on + write back, no read (daft) 1 1 on off +=========================== === === =========== ========== + +To set cache type to "write back" and save this setting to the drive:: + + # echo "write back" > cache_type + +To modify the caching mode without making the change persistent, prepend +"temporary " to the cache type string. E.g.:: + + # echo "temporary write back" > cache_type diff --git a/Documentation/scsi/sd-parameters.txt b/Documentation/scsi/sd-parameters.txt deleted file mode 100644 index 8e5af00d88e7..000000000000 --- a/Documentation/scsi/sd-parameters.txt +++ /dev/null @@ -1,22 +0,0 @@ -Linux SCSI Disk Driver (sd) Parameters -====================================== - -cache_type (RW) ---------------- -Enable/disable drive write & read cache. - - cache_type string | WCE RCD | Write cache | Read cache -----------------------------+---------+-------------+------------ - write through | 0 0 | off | on - none | 0 1 | off | off - write back | 1 0 | on | on - write back, no read (daft) | 1 1 | on | off - -To set cache type to "write back" and save this setting to the drive: - - # echo "write back" > cache_type - -To modify the caching mode without making the change persistent, prepend -"temporary " to the cache type string. E.g.: - - # echo "temporary write back" > cache_type diff --git a/Documentation/scsi/smartpqi.txt b/Documentation/scsi/smartpqi.rst index df129f55ace5..a7de27352c6f 100644 --- a/Documentation/scsi/smartpqi.txt +++ b/Documentation/scsi/smartpqi.rst @@ -1,6 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 +===================================== SMARTPQI - Microsemi Smart PQI Driver ------------------------------------------ +===================================== This file describes the smartpqi SCSI driver for Microsemi (http://www.microsemi.com) PQI controllers. The smartpqi driver @@ -16,20 +18,21 @@ For Microsemi smartpqi controller support, enable the smartpqi driver when configuring the kernel. For more information on the PQI Queuing Interface, please see: -http://www.t10.org/drafts.htm -http://www.t10.org/members/w_pqi2.htm -Supported devices: ------------------- +- http://www.t10.org/drafts.htm +- http://www.t10.org/members/w_pqi2.htm + +Supported devices +================= <Controller names to be added as they become publicly available.> smartpqi specific entries in /sys ------------------------------ +================================= - smartpqi host attributes: - ------------------------- - /sys/class/scsi_host/host*/rescan - /sys/class/scsi_host/host*/driver_version +smartpqi host attributes +------------------------ + - /sys/class/scsi_host/host*/rescan + - /sys/class/scsi_host/host*/driver_version The host rescan attribute is a write only attribute. Writing to this attribute will trigger the driver to scan for new, changed, or removed @@ -37,12 +40,13 @@ smartpqi specific entries in /sys The version attribute is read-only and will return the driver version and the controller firmware version. - For example: + For example:: + driver: 0.9.13-370 firmware: 0.01-522 - smartpqi sas device attributes - ------------------------------ +smartpqi sas device attributes +------------------------------ HBA devices are added to the SAS transport layer. These attributes are automatically added by the SAS transport layer. @@ -50,31 +54,25 @@ smartpqi specific entries in /sys /sys/class/sas_device/end_device-X:X/enclosure_identifier /sys/class/sas_device/end_device-X:X/scsi_target_id -smartpqi specific ioctls: -------------------------- +smartpqi specific ioctls +======================== For compatibility with applications written for the cciss protocol. - CCISS_DEREGDISK - CCISS_REGNEWDISK - CCISS_REGNEWD - - The above three ioctls all do exactly the same thing, which is to cause the driver - to rescan for new devices. This does exactly the same thing as writing to the - smartpqi specific host "rescan" attribute. + CCISS_DEREGDISK, CCISS_REGNEWDISK, CCISS_REGNEWD + The above three ioctls all do exactly the same thing, which is to cause the driver + to rescan for new devices. This does exactly the same thing as writing to the + smartpqi specific host "rescan" attribute. CCISS_GETPCIINFO - Returns PCI domain, bus, device and function and "board ID" (PCI subsystem ID). CCISS_GETDRIVVER + Returns driver version in three bytes encoded as:: - Returns driver version in three bytes encoded as: - (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | (DRIVER_RELEASE << 16) | DRIVER_REVISION; + (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | (DRIVER_RELEASE << 16) | DRIVER_REVISION; CCISS_PASSTHRU - Allows "BMIC" and "CISS" commands to be passed through to the Smart Storage Array. These are used extensively by the SSA Array Configuration Utility, SNMP storage agents, etc. - diff --git a/Documentation/scsi/st.txt b/Documentation/scsi/st.rst index ec0acf6acccd..d3b28c28d74c 100644 --- a/Documentation/scsi/st.txt +++ b/Documentation/scsi/st.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +The SCSI Tape Driver +==================== + This file contains brief information about the SCSI tape driver. The driver is currently maintained by Kai Mäkisara (email Kai.Makisara@kolumbus.fi) @@ -5,7 +11,8 @@ Kai.Makisara@kolumbus.fi) Last modified: Tue Feb 9 21:54:16 2016 by kai.makisara -BASICS +Basics +====== The driver is generic, i.e., it does not contain any code tailored to any specific tape drive. The tape parameters can be specified with @@ -110,15 +117,17 @@ tape in the drive (commands trying to write something return error if attempted). -MINOR NUMBERS +Minor Numbers +============= The tape driver currently supports up to 2^17 drives if 4 modes for each drive are used. -The minor numbers consist of the following bit fields: +The minor numbers consist of the following bit fields:: + + dev_upper non-rew mode dev-lower + 20 - 8 7 6 5 4 0 -dev_upper non-rew mode dev-lower - 20 - 8 7 6 5 4 0 The non-rewind bit is always bit 7 (the uppermost bit in the lowermost byte). The bits defining the mode are below the non-rewind bit. The remaining bits define the tape device number. This numbering is @@ -126,7 +135,8 @@ backward compatible with the numbering used when the minor number was only 8 bits wide. -SYSFS SUPPORT +Sysfs Support +============= The driver creates the directory /sys/class/scsi_tape and populates it with directories corresponding to the existing tape devices. There are autorewind @@ -148,10 +158,11 @@ bit definitions are the same as those used with MTSETDRVBUFFER in setting the options. A link named 'tape' is made from the SCSI device directory to the class -directory corresponding to the mode 0 auto-rewind device (e.g., st0). +directory corresponding to the mode 0 auto-rewind device (e.g., st0). -SYSFS AND STATISTICS FOR TAPE DEVICES +Sysfs and Statistics for Tape Devices +===================================== The st driver maintains statistics for tape drives inside the sysfs filesystem. The following method can be used to locate the statistics that are @@ -160,10 +171,10 @@ available (assuming that sysfs is mounted at /sys): 1. Use opendir(3) on the directory /sys/class/scsi_tape 2. Use readdir(3) to read the directory contents 3. Use regcomp(3)/regexec(3) to match directory entries to the extended - regular expression "^st[0-9]+$" + regular expression "^st[0-9]+$" 4. Access the statistics from the /sys/class/scsi_tape/<match>/stats - directory (where <match> is a directory entry from /sys/class/scsi_tape - that matched the extended regular expression) + directory (where <match> is a directory entry from /sys/class/scsi_tape + that matched the extended regular expression) The reason for using this approach is that all the character devices pointing to the same tape drive use the same statistics. That means @@ -171,29 +182,41 @@ that st0 would have the same statistics as nst0. The directory contains the following statistics files: -1. in_flight - The number of I/Os currently outstanding to this device. -2. io_ns - The amount of time spent waiting (in nanoseconds) for all I/O +1. in_flight + - The number of I/Os currently outstanding to this device. +2. io_ns + - The amount of time spent waiting (in nanoseconds) for all I/O to complete (including read and write). This includes tape movement commands such as seeking between file or set marks and implicit tape movement such as when rewind on close tape devices are used. -3. other_cnt - The number of I/Os issued to the tape drive other than read or +3. other_cnt + - The number of I/Os issued to the tape drive other than read or write commands. The time taken to complete these commands uses the following calculation io_ms-read_ms-write_ms. -4. read_byte_cnt - The number of bytes read from the tape drive. -5. read_cnt - The number of read requests issued to the tape drive. -6. read_ns - The amount of time (in nanoseconds) spent waiting for read +4. read_byte_cnt + - The number of bytes read from the tape drive. +5. read_cnt + - The number of read requests issued to the tape drive. +6. read_ns + - The amount of time (in nanoseconds) spent waiting for read requests to complete. -7. write_byte_cnt - The number of bytes written to the tape drive. -8. write_cnt - The number of write requests issued to the tape drive. -9. write_ns - The amount of time (in nanoseconds) spent waiting for write +7. write_byte_cnt + - The number of bytes written to the tape drive. +8. write_cnt + - The number of write requests issued to the tape drive. +9. write_ns + - The amount of time (in nanoseconds) spent waiting for write requests to complete. -10. resid_cnt - The number of times during a read or write we found +10. resid_cnt + - The number of times during a read or write we found the residual amount to be non-zero. This should mean that a program is issuing a read larger thean the block size on tape. For write not all data made it to tape. -Note: The in_flight value is incremented when an I/O starts the I/O -itself is not added to the statistics until it completes. +.. Note:: + + The in_flight value is incremented when an I/O starts the I/O + itself is not added to the statistics until it completes. The total of read_cnt, write_cnt, and other_cnt may not total to the same value as iodone_cnt at the device level. The tape statistics only count @@ -210,7 +233,8 @@ The value of in_flight is 0 when there are no I/Os outstanding that are issued by the st driver. Tape statistics do not take into account any I/O performed via the sg device. -BSD AND SYS V SEMANTICS +BSD and Sys V Semantics +======================= The user can choose between these two behaviours of the tape driver by defining the value of the symbol ST_SYSV. The semantics differ when a @@ -221,13 +245,15 @@ filemark unless the filemark has just been crossed. The default is BSD semantics. -BUFFERING +Buffering +========= The driver tries to do transfers directly to/from user space. If this is not possible, a driver buffer allocated at run-time is used. If direct i/o is not possible for the whole transfer, the driver buffer is used (i.e., bounce buffers for individual pages are not used). Direct i/o can be impossible because of several reasons, e.g.: + - one or more pages are at addresses not reachable by the HBA - the number of pages in the transfer exceeds the number of scatter/gather segments permitted by the HBA @@ -269,28 +295,30 @@ in the physical memory) are used if contiguous buffers can't be allocated. To support all SCSI adapters (including those not supporting scatter/gather), buffer allocation is using the following three kinds of chunks: + 1. The initial segment that is used for all SCSI adapters including -those not supporting scatter/gather. The size of this buffer will be -(PAGE_SIZE << ST_FIRST_ORDER) bytes if the system can give a chunk of -this size (and it is not larger than the buffer size specified by -ST_BUFFER_BLOCKS). If this size is not available, the driver halves -the size and tries again until the size of one page. The default -settings in st_options.h make the driver to try to allocate all of the -buffer as one chunk. + those not supporting scatter/gather. The size of this buffer will be + (PAGE_SIZE << ST_FIRST_ORDER) bytes if the system can give a chunk of + this size (and it is not larger than the buffer size specified by + ST_BUFFER_BLOCKS). If this size is not available, the driver halves + the size and tries again until the size of one page. The default + settings in st_options.h make the driver to try to allocate all of the + buffer as one chunk. 2. The scatter/gather segments to fill the specified buffer size are -allocated so that as many segments as possible are used but the number -of segments does not exceed ST_FIRST_SG. + allocated so that as many segments as possible are used but the number + of segments does not exceed ST_FIRST_SG. 3. The remaining segments between ST_MAX_SG (or the module parameter -max_sg_segs) and the number of segments used in phases 1 and 2 -are used to extend the buffer at run-time if this is necessary. The -number of scatter/gather segments allowed for the SCSI adapter is not -exceeded if it is smaller than the maximum number of scatter/gather -segments specified. If the maximum number allowed for the SCSI adapter -is smaller than the number of segments used in phases 1 and 2, -extending the buffer will always fail. + max_sg_segs) and the number of segments used in phases 1 and 2 + are used to extend the buffer at run-time if this is necessary. The + number of scatter/gather segments allowed for the SCSI adapter is not + exceeded if it is smaller than the maximum number of scatter/gather + segments specified. If the maximum number allowed for the SCSI adapter + is smaller than the number of segments used in phases 1 and 2, + extending the buffer will always fail. -EOM BEHAVIOUR WHEN WRITING +EOM Behaviour When Writing +========================== When the end of medium early warning is encountered, the current write is finished and the number of bytes is returned. The next write @@ -300,12 +328,13 @@ bytes is returned. After this, -1 and the number of bytes are alternately returned until the physical end of medium (or some other error) is encountered. - -MODULE PARAMETERS +Module Parameters +================= The buffer size, write threshold, and the maximum number of allocated buffers are configurable when the driver is loaded as a module. The keywords are: +========================== =========================================== buffer_kbs=xxx the buffer size for fixed block mode is set to xxx kilobytes write_threshold_kbs=xxx the write threshold in kilobytes set to xxx @@ -313,12 +342,14 @@ max_sg_segs=xxx the maximum number of scatter/gather segments try_direct_io=x try direct transfer between user buffer and tape drive if this is non-zero +========================== =========================================== Note that if the buffer size is changed but the write threshold is not set, the write threshold is set to the new buffer size - 2 kB. -BOOT TIME CONFIGURATION +Boot Time Configuration +======================= If the driver is compiled into the kernel, the same parameters can be also set using, e.g., the LILO command line. The preferred syntax is @@ -332,21 +363,23 @@ versions is supported. The same keywords can be used as when loading the driver as module. If several parameters are set, the keyword-value pairs are separated with a comma (no spaces allowed). A colon can be used instead of the equal mark. The definition is prepended by the -string st=. Here is an example: +string st=. Here is an example:: st=buffer_kbs:64,write_threshold_kbs:60 -The following syntax used by the old kernel versions is also supported: +The following syntax used by the old kernel versions is also supported:: st=aa[,bb[,dd]] -where - aa is the buffer size for fixed block mode in 1024 byte units - bb is the write threshold in 1024 byte units - dd is the maximum number of scatter/gather segments +where: + - aa is the buffer size for fixed block mode in 1024 byte units + - bb is the write threshold in 1024 byte units + - dd is the maximum number of scatter/gather segments -IOCTLS + +IOCTLs +====== The tape is positioned and the drive parameters are set with ioctls defined in mtio.h The tape control program 'mt' uses these ioctls. Try @@ -359,55 +392,80 @@ The supported ioctls are: The following use the structure mtop: -MTFSF Space forward over count filemarks. Tape positioned after filemark. -MTFSFM As above but tape positioned before filemark. -MTBSF Space backward over count filemarks. Tape positioned before +MTFSF + Space forward over count filemarks. Tape positioned after filemark. +MTFSFM + As above but tape positioned before filemark. +MTBSF + Space backward over count filemarks. Tape positioned before filemark. -MTBSFM As above but ape positioned after filemark. -MTFSR Space forward over count records. -MTBSR Space backward over count records. -MTFSS Space forward over count setmarks. -MTBSS Space backward over count setmarks. -MTWEOF Write count filemarks. -MTWEOFI Write count filemarks with immediate bit set (i.e., does not +MTBSFM + As above but ape positioned after filemark. +MTFSR + Space forward over count records. +MTBSR + Space backward over count records. +MTFSS + Space forward over count setmarks. +MTBSS + Space backward over count setmarks. +MTWEOF + Write count filemarks. +MTWEOFI + Write count filemarks with immediate bit set (i.e., does not wait until data is on tape) -MTWSM Write count setmarks. -MTREW Rewind tape. -MTOFFL Set device off line (often rewind plus eject). -MTNOP Do nothing except flush the buffers. -MTRETEN Re-tension tape. -MTEOM Space to end of recorded data. -MTERASE Erase tape. If the argument is zero, the short erase command +MTWSM + Write count setmarks. +MTREW + Rewind tape. +MTOFFL + Set device off line (often rewind plus eject). +MTNOP + Do nothing except flush the buffers. +MTRETEN + Re-tension tape. +MTEOM + Space to end of recorded data. +MTERASE + Erase tape. If the argument is zero, the short erase command is used. The long erase command is used with all other values of the argument. -MTSEEK Seek to tape block count. Uses Tandberg-compatible seek (QFA) +MTSEEK + Seek to tape block count. Uses Tandberg-compatible seek (QFA) for SCSI-1 drives and SCSI-2 seek for SCSI-2 drives. The file and block numbers in the status are not valid after a seek. -MTSETBLK Set the drive block size. Setting to zero sets the drive into +MTSETBLK + Set the drive block size. Setting to zero sets the drive into variable block mode (if applicable). -MTSETDENSITY Sets the drive density code to arg. See drive +MTSETDENSITY + Sets the drive density code to arg. See drive documentation for available codes. -MTLOCK and MTUNLOCK Explicitly lock/unlock the tape drive door. -MTLOAD and MTUNLOAD Explicitly load and unload the tape. If the +MTLOCK and MTUNLOCK + Explicitly lock/unlock the tape drive door. +MTLOAD and MTUNLOAD + Explicitly load and unload the tape. If the command argument x is between MT_ST_HPLOADER_OFFSET + 1 and MT_ST_HPLOADER_OFFSET + 6, the number x is used sent to the drive with the command and it selects the tape slot to use of HP C1553A changer. -MTCOMPRESSION Sets compressing or uncompressing drive mode using the +MTCOMPRESSION + Sets compressing or uncompressing drive mode using the SCSI mode page 15. Note that some drives other methods for control of compression. Some drives (like the Exabytes) use density codes for compression control. Some drives use another mode page but this page has not been implemented in the driver. Some drives without compression capability will accept any compression mode without error. -MTSETPART Moves the tape to the partition given by the argument at the +MTSETPART + Moves the tape to the partition given by the argument at the next tape operation. The block at which the tape is positioned is the block where the tape was previously positioned in the new active partition unless the next tape operation is MTSEEK. In this case the tape is moved directly to the block specified by MTSEEK. MTSETPART is inactive unless MT_ST_CAN_PARTITIONS set. -MTMKPART Formats the tape with one partition (argument zero) or two +MTMKPART + Formats the tape with one partition (argument zero) or two partitions (argument non-zero). If the argument is positive, it specifies the size of partition 1 in megabytes. For DDS drives and several early drives this is the physically first @@ -422,64 +480,81 @@ MTSETDRVBUFFER with mask MT_SET_OPTIONS, the low order bits are used as argument. This command is only allowed for the superuser (root). The subcommands are: - 0 + + * 0 The drive buffer option is set to the argument. Zero means no buffering. - MT_ST_BOOLEANS + * MT_ST_BOOLEANS Sets the buffering options. The bits are the new states (enabled/disabled) the following options (in the parenthesis is specified whether the option is global or can be specified differently for each mode): - MT_ST_BUFFER_WRITES write buffering (mode) - MT_ST_ASYNC_WRITES asynchronous writes (mode) - MT_ST_READ_AHEAD read ahead (mode) - MT_ST_TWO_FM writing of two filemarks (global) - MT_ST_FAST_EOM using the SCSI spacing to EOD (global) - MT_ST_AUTO_LOCK automatic locking of the drive door (global) - MT_ST_DEF_WRITES the defaults are meant only for writes (mode) - MT_ST_CAN_BSR backspacing over more than one records can + + MT_ST_BUFFER_WRITES + write buffering (mode) + MT_ST_ASYNC_WRITES + asynchronous writes (mode) + MT_ST_READ_AHEAD + read ahead (mode) + MT_ST_TWO_FM + writing of two filemarks (global) + MT_ST_FAST_EOM + using the SCSI spacing to EOD (global) + MT_ST_AUTO_LOCK + automatic locking of the drive door (global) + MT_ST_DEF_WRITES + the defaults are meant only for writes (mode) + MT_ST_CAN_BSR + backspacing over more than one records can be used for repositioning the tape (global) - MT_ST_NO_BLKLIMS the driver does not ask the block limits + MT_ST_NO_BLKLIMS + the driver does not ask the block limits from the drive (block size can be changed only to variable) (global) - MT_ST_CAN_PARTITIONS enables support for partitioned + MT_ST_CAN_PARTITIONS + enables support for partitioned tapes (global) - MT_ST_SCSI2LOGICAL the logical block number is used in + MT_ST_SCSI2LOGICAL + the logical block number is used in the MTSEEK and MTIOCPOS for SCSI-2 drives instead of the device dependent address. It is recommended to set this flag unless there are tapes using the device dependent (from the old times) (global) - MT_ST_SYSV sets the SYSV semantics (mode) - MT_ST_NOWAIT enables immediate mode (i.e., don't wait for + MT_ST_SYSV + sets the SYSV semantics (mode) + MT_ST_NOWAIT + enables immediate mode (i.e., don't wait for the command to finish) for some commands (e.g., rewind) - MT_ST_NOWAIT_EOF enables immediate filemark mode (i.e. when + MT_ST_NOWAIT_EOF + enables immediate filemark mode (i.e. when writing a filemark, don't wait for it to complete). Please see the BASICS note about MTWEOFI with respect to the possible dangers of writing immediate filemarks. - MT_ST_SILI enables setting the SILI bit in SCSI commands when + MT_ST_SILI + enables setting the SILI bit in SCSI commands when reading in variable block mode to enhance performance when reading blocks shorter than the byte count; set this only if you are sure that the drive supports SILI and the HBA correctly returns transfer residuals - MT_ST_DEBUGGING debugging (global; debugging must be + MT_ST_DEBUGGING + debugging (global; debugging must be compiled into the driver) - MT_ST_SETBOOLEANS - MT_ST_CLEARBOOLEANS + + * MT_ST_SETBOOLEANS, MT_ST_CLEARBOOLEANS Sets or clears the option bits. - MT_ST_WRITE_THRESHOLD + * MT_ST_WRITE_THRESHOLD Sets the write threshold for this device to kilobytes specified by the lowest bits. - MT_ST_DEF_BLKSIZE + * MT_ST_DEF_BLKSIZE Defines the default block size set automatically. Value 0xffffff means that the default is not used any more. - MT_ST_DEF_DENSITY - MT_ST_DEF_DRVBUFFER + * MT_ST_DEF_DENSITY, MT_ST_DEF_DRVBUFFER Used to set or clear the density (8 bits), and drive buffer state (3 bits). If the value is MT_ST_CLEAR_DEFAULT (0xfffff) the default will not be used any more. Otherwise the lowermost bits of the value contain the new value of the parameter. - MT_ST_DEF_COMPRESSION + * MT_ST_DEF_COMPRESSION The compression default will not be used if the value of the lowermost byte is 0xff. Otherwise the lowermost bit contains the new default. If the bits 8-15 are set to a @@ -487,17 +562,17 @@ MTSETDRVBUFFER used as the compression algorithm. The value MT_ST_CLEAR_DEFAULT can be used to clear the compression default. - MT_ST_SET_TIMEOUT + * MT_ST_SET_TIMEOUT Set the normal timeout in seconds for this device. The default is 900 seconds (15 minutes). The timeout should be long enough for the retries done by the device while reading/writing. - MT_ST_SET_LONG_TIMEOUT + * MT_ST_SET_LONG_TIMEOUT Set the long timeout that is used for operations that are known to take a long time. The default is 14000 seconds (3.9 hours). For erase this value is further multiplied by eight. - MT_ST_SET_CLN + * MT_ST_SET_CLN Set the cleaning request interpretation parameters using the lowest 24 bits of the argument. The driver can set the generic status bit GMT_CLN if a cleaning request bit pattern @@ -506,7 +581,7 @@ MTSETDRVBUFFER cleaning. The bits are device-dependent. The driver is given the number of the sense data byte (the lowest eight bits of the argument; must be >= 18 (values 1 - 17 - reserved) and <= the maximum requested sense data sixe), + reserved) and <= the maximum requested sense data sixe), a mask to select the relevant bits (the bits 9-16), and the bit pattern (bits 17-23). If the bit pattern is zero, one or more bits under the mask indicate cleaning request. If @@ -518,12 +593,16 @@ MTSETDRVBUFFER MT_ST_SET_CLN.) The following ioctl uses the structure mtpos: -MTIOCPOS Reads the current position from the drive. Uses + +MTIOCPOS + Reads the current position from the drive. Uses Tandberg-compatible QFA for SCSI-1 drives and the SCSI-2 command for the SCSI-2 drives. The following ioctl uses the structure mtget to return the status: -MTIOCGET Returns some status information. + +MTIOCGET + Returns some status information. The file number and block number within file are returned. The block is -1 when it can't be determined (e.g., after MTBSF). The drive type is either MTISSCSI1 or MTISSCSI2. @@ -537,7 +616,8 @@ MTIOCGET Returns some status information. end of recorded data or end of tape. GMT_EOT means end of tape. -MISCELLANEOUS COMPILE OPTIONS +Miscellaneous Compile Options +============================= The recovered write errors are considered fatal if ST_RECOVERED_WRITE_FATAL is defined. @@ -568,7 +648,8 @@ time or the MT_ST_CAN_BSR bit is set for the drive with an ioctl. user does not request data that far.) -DEBUGGING HINTS +Debugging Hints +=============== Debugging code is now compiled in by default but debugging is turned off with the kernel module parameter debug_flag defaulting to 0. Debugging diff --git a/Documentation/scsi/sym53c500_cs.txt b/Documentation/scsi/sym53c500_cs.rst index 75febcf9298c..55464861bbd5 100644 --- a/Documentation/scsi/sym53c500_cs.txt +++ b/Documentation/scsi/sym53c500_cs.rst @@ -1,3 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +The sym53c500_cs Driver +======================= + The sym53c500_cs driver originated as an add-on to David Hinds' pcmcia-cs package, and was written by Tom Corner (tcorner@via.at). A rewrite was long overdue, and the current version addresses the following concerns: @@ -20,4 +26,4 @@ Through the years, there have been a number of downloads of the pcmcia-cs version of this driver, and I guess it worked for those users. It worked for Tom Corner, and it works for me. Your mileage will probably vary. ---Bob Tracy (rct@frus.com) +Bob Tracy (rct@frus.com) diff --git a/Documentation/scsi/sym53c8xx_2.txt b/Documentation/scsi/sym53c8xx_2.rst index d28186553fb0..8de44a7baa9b 100644 --- a/Documentation/scsi/sym53c8xx_2.txt +++ b/Documentation/scsi/sym53c8xx_2.rst @@ -1,99 +1,111 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================= The Linux SYM-2 driver documentation file +========================================= Written by Gerard Roudier <groudier@free.fr> + 21 Rue Carnot + 95170 DEUIL LA BARRE - FRANCE Updated by Matthew Wilcox <matthew@wil.cx> 2004-10-09 -=============================================================================== - -1. Introduction -2. Supported chips and SCSI features -3. Advantages of this driver for newer chips. - 3.1 Optimized SCSI SCRIPTS - 3.2 New features appeared with the SYM53C896 -4. Memory mapped I/O versus normal I/O -5. Tagged command queueing -6. Parity checking -7. Profiling information -8. Control commands - 8.1 Set minimum synchronous period - 8.2 Set wide size - 8.3 Set maximum number of concurrent tagged commands - 8.4 Set debug mode - 8.5 Set flag (no_disc) - 8.6 Set verbose level - 8.7 Reset all logical units of a target - 8.8 Abort all tasks of all logical units of a target -9. Configuration parameters -10. Boot setup commands - 10.1 Syntax - 10.2 Available arguments - 10.2.1 Default number of tagged commands - 10.2.2 Burst max - 10.2.3 LED support - 10.2.4 Differential mode - 10.2.5 IRQ mode - 10.2.6 Check SCSI BUS - 10.2.7 Suggest a default SCSI id for hosts - 10.2.8 Verbosity level - 10.2.9 Debug mode - 10.2.10 Settle delay - 10.2.11 Serial NVRAM - 10.2.12 Exclude a host from being attached - 10.3 Converting from old options - 10.4 SCSI BUS checking boot option -11. SCSI problem troubleshooting - 15.1 Problem tracking - 15.2 Understanding hardware error reports -12. Serial NVRAM support (by Richard Waltham) - 17.1 Features - 17.2 Symbios NVRAM layout - 17.3 Tekram NVRAM layout - -=============================================================================== + +.. Contents + + 1. Introduction + 2. Supported chips and SCSI features + 3. Advantages of this driver for newer chips. + 3.1 Optimized SCSI SCRIPTS + 3.2 New features appeared with the SYM53C896 + 4. Memory mapped I/O versus normal I/O + 5. Tagged command queueing + 6. Parity checking + 7. Profiling information + 8. Control commands + 8.1 Set minimum synchronous period + 8.2 Set wide size + 8.3 Set maximum number of concurrent tagged commands + 8.4 Set debug mode + 8.5 Set flag (no_disc) + 8.6 Set verbose level + 8.7 Reset all logical units of a target + 8.8 Abort all tasks of all logical units of a target + 9. Configuration parameters + 10. Boot setup commands + 10.1 Syntax + 10.2 Available arguments + 10.2.1 Default number of tagged commands + 10.2.2 Burst max + 10.2.3 LED support + 10.2.4 Differential mode + 10.2.5 IRQ mode + 10.2.6 Check SCSI BUS + 10.2.7 Suggest a default SCSI id for hosts + 10.2.8 Verbosity level + 10.2.9 Debug mode + 10.2.10 Settle delay + 10.2.11 Serial NVRAM + 10.2.12 Exclude a host from being attached + 10.3 Converting from old options + 10.4 SCSI BUS checking boot option + 11. SCSI problem troubleshooting + 15.1 Problem tracking + 15.2 Understanding hardware error reports + 12. Serial NVRAM support (by Richard Waltham) + 17.1 Features + 17.2 Symbios NVRAM layout + 17.3 Tekram NVRAM layout + 1. Introduction +=============== This driver supports the whole SYM53C8XX family of PCI-SCSI controllers. -It also support the subset of LSI53C10XX PCI-SCSI controllers that are based +It also support the subset of LSI53C10XX PCI-SCSI controllers that are based on the SYM53C8XX SCRIPTS language. -It replaces the sym53c8xx+ncr53c8xx driver bundle and shares its core code -with the FreeBSD SYM-2 driver. The `glue' that allows this driver to work +It replaces the sym53c8xx+ncr53c8xx driver bundle and shares its core code +with the FreeBSD SYM-2 driver. The 'glue' that allows this driver to work under Linux is contained in 2 files named sym_glue.h and sym_glue.c. -Other drivers files are intended not to depend on the Operating System +Other drivers files are intended not to depend on the Operating System on which the driver is used. The history of this driver can be summarized as follows: 1993: ncr driver written for 386bsd and FreeBSD by: - Wolfgang Stanglmeier <wolf@cologne.de> - Stefan Esser <se@mi.Uni-Koeln.de> + + - Wolfgang Stanglmeier <wolf@cologne.de> + - Stefan Esser <se@mi.Uni-Koeln.de> 1996: port of the ncr driver to Linux-1.2.13 and rename it ncr53c8xx. - Gerard Roudier -1998: new sym53c8xx driver for Linux based on LOAD/STORE instruction and that + - Gerard Roudier + +1998: new sym53c8xx driver for Linux based on LOAD/STORE instruction and that adds full support for the 896 but drops support for early NCR devices. - Gerard Roudier -1999: port of the sym53c8xx driver to FreeBSD and support for the LSI53C1010 - 33 MHz and 66MHz Ultra-3 controllers. The new driver is named `sym'. - Gerard Roudier + - Gerard Roudier -2000: Add support for early NCR devices to FreeBSD `sym' driver. - Break the driver into several sources and separate the OS glue +1999: port of the sym53c8xx driver to FreeBSD and support for the LSI53C1010 + 33 MHz and 66MHz Ultra-3 controllers. The new driver is named 'sym'. + + - Gerard Roudier + +2000: Add support for early NCR devices to FreeBSD 'sym' driver. + Break the driver into several sources and separate the OS glue code from the core code that can be shared among different O/Ses. Write a glue code for Linux. - Gerard Roudier + + - Gerard Roudier 2004: Remove FreeBSD compatibility code. Remove support for versions of Linux before 2.6. Start using Linux facilities. -This README file addresses the Linux version of the driver. Under FreeBSD, +This README file addresses the Linux version of the driver. Under FreeBSD, the driver documentation is the sym.8 man page. Information about new chips is available at LSILOGIC web server: @@ -104,113 +116,145 @@ SCSI standard documentations are available at T10 site: http://www.t10.org/ -Useful SCSI tools written by Eric Youngdale are part of most Linux +Useful SCSI tools written by Eric Youngdale are part of most Linux distributions: - scsiinfo: command line tool - scsi-config: TCL/Tk tool using scsiinfo + + ============ ========================== + scsiinfo command line tool + scsi-config TCL/Tk tool using scsiinfo + ============ ========================== 2. Supported chips and SCSI features +==================================== The following features are supported for all chips: - Synchronous negotiation - Disconnection - Tagged command queuing - SCSI parity checking - PCI Master parity checking + - Synchronous negotiation + - Disconnection + - Tagged command queuing + - SCSI parity checking + - PCI Master parity checking Other features depends on chip capabilities. -The driver notably uses optimized SCRIPTS for devices that support -LOAD/STORE and handles PHASE MISMATCH from SCRIPTS for devices that + +The driver notably uses optimized SCRIPTS for devices that support +LOAD/STORE and handles PHASE MISMATCH from SCRIPTS for devices that support the corresponding feature. The following table shows some characteristics of the chip family. - On board LOAD/STORE HARDWARE -Chip SDMS BIOS Wide SCSI std. Max. sync SCRIPTS PHASE MISMATCH ----- --------- ---- --------- ---------- ---------- -------------- -810 N N FAST10 10 MB/s N N -810A N N FAST10 10 MB/s Y N -815 Y N FAST10 10 MB/s N N -825 Y Y FAST10 20 MB/s N N -825A Y Y FAST10 20 MB/s Y N -860 N N FAST20 20 MB/s Y N -875 Y Y FAST20 40 MB/s Y N -875A Y Y FAST20 40 MB/s Y Y -876 Y Y FAST20 40 MB/s Y N -895 Y Y FAST40 80 MB/s Y N -895A Y Y FAST40 80 MB/s Y Y -896 Y Y FAST40 80 MB/s Y Y -897 Y Y FAST40 80 MB/s Y Y -1510D Y Y FAST40 80 MB/s Y Y -1010 Y Y FAST80 160 MB/s Y Y -1010_66* Y Y FAST80 160 MB/s Y Y - -* Chip supports 33MHz and 66MHz PCI bus clock. ++--------+-----------+-----+-----------+------------+------------+---------+ +| | | | | |Load/store |Hardware | +| |On board | | | |scripts |phase | +|Chip |SDMS BIOS |Wide |SCSI std. | Max. sync | |mismatch | ++--------+-----------+-----+-----------+------------+------------+---------+ +|810 | N | N | FAST10 | 10 MB/s | N | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|810A | N | N | FAST10 | 10 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|815 | Y | N | FAST10 | 10 MB/s | N | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|825 | Y | Y | FAST10 | 20 MB/s | N | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|825A | Y | Y | FAST10 | 20 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|860 | N | N | FAST20 | 20 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|875 | Y | Y | FAST20 | 40 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|875A | Y | Y | FAST20 | 40 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|876 | Y | Y | FAST20 | 40 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|895 | Y | Y | FAST40 | 80 MB/s | Y | N | ++--------+-----------+-----+-----------+------------+------------+---------+ +|895A | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|896 | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|897 | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|1510D | Y | Y | FAST40 | 80 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|1010 | Y | Y | FAST80 |160 MB/s | Y | Y | ++--------+-----------+-----+-----------+------------+------------+---------+ +|1010_66 | Y | Y | FAST80 |160 MB/s | Y | Y | +|[1]_ | | | | | | | ++--------+-----------+-----+-----------+------------+------------+---------+ + +.. [1] Chip supports 33MHz and 66MHz PCI bus clock. Summary of other supported features: -Module: allow to load the driver -Memory mapped I/O: increases performance -Control commands: write operations to the proc SCSI file system -Debugging information: written to syslog (expert only) -Scatter / gather -Shared interrupt -Boot setup commands -Serial NVRAM: Symbios and Tekram formats +:Module: allow to load the driver +:Memory mapped I/O: increases performance +:Control commands: write operations to the proc SCSI file system +:Debugging information: written to syslog (expert only) +:Serial NVRAM: Symbios and Tekram formats + +- Scatter / gather +- Shared interrupt +- Boot setup commands 3. Advantages of this driver for newer chips. +============================================= -3.1 Optimized SCSI SCRIPTS. +3.1 Optimized SCSI SCRIPTS +-------------------------- -All chips except the 810, 815 and 825, support new SCSI SCRIPTS instructions -named LOAD and STORE that allow to move up to 1 DWORD from/to an IO register -to/from memory much faster that the MOVE MEMORY instruction that is supported +All chips except the 810, 815 and 825, support new SCSI SCRIPTS instructions +named LOAD and STORE that allow to move up to 1 DWORD from/to an IO register +to/from memory much faster that the MOVE MEMORY instruction that is supported by the 53c7xx and 53c8xx family. -The LOAD/STORE instructions support absolute and DSA relative addressing -modes. The SCSI SCRIPTS had been entirely rewritten using LOAD/STORE instead +The LOAD/STORE instructions support absolute and DSA relative addressing +modes. The SCSI SCRIPTS had been entirely rewritten using LOAD/STORE instead of MOVE MEMORY instructions. -Due to the lack of LOAD/STORE SCRIPTS instructions by earlier chips, this -driver also incorporates a different SCRIPTS set based on MEMORY MOVE, in +Due to the lack of LOAD/STORE SCRIPTS instructions by earlier chips, this +driver also incorporates a different SCRIPTS set based on MEMORY MOVE, in order to provide support for the entire SYM53C8XX chips family. 3.2 New features appeared with the SYM53C896 +-------------------------------------------- -Newer chips (see above) allows handling of the phase mismatch context from -SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor +Newer chips (see above) allows handling of the phase mismatch context from +SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor until the C code has saved the context of the transfer). -The 896 and 1010 chips support 64 bit PCI transactions and addressing, +The 896 and 1010 chips support 64 bit PCI transactions and addressing, while the 895A supports 32 bit PCI transactions and 64 bit addressing. -The SCRIPTS processor of these chips is not true 64 bit, but uses segment -registers for bit 32-63. Another interesting feature is that LOAD/STORE +The SCRIPTS processor of these chips is not true 64 bit, but uses segment +registers for bit 32-63. Another interesting feature is that LOAD/STORE instructions that address the on-chip RAM (8k) remain internal to the chip. 4. Memory mapped I/O versus normal I/O +====================================== -Memory mapped I/O has less latency than normal I/O and is the recommended -way for doing IO with PCI devices. Memory mapped I/O seems to work fine on -most hardware configurations, but some poorly designed chipsets may break -this feature. A configuration option is provided for normal I/O to be +Memory mapped I/O has less latency than normal I/O and is the recommended +way for doing IO with PCI devices. Memory mapped I/O seems to work fine on +most hardware configurations, but some poorly designed chipsets may break +this feature. A configuration option is provided for normal I/O to be used but the driver defaults to MMIO. 5. Tagged command queueing +========================== -Queuing more than 1 command at a time to a device allows it to perform -optimizations based on actual head positions and its mechanical +Queuing more than 1 command at a time to a device allows it to perform +optimizations based on actual head positions and its mechanical characteristics. This feature may also reduce average command latency. -In order to really gain advantage of this feature, devices must have -a reasonable cache size (No miracle is to be expected for a low-end +In order to really gain advantage of this feature, devices must have +a reasonable cache size (No miracle is to be expected for a low-end hard disk with 128 KB or less). + Some known old SCSI devices do not properly support tagged command queuing. -Generally, firmware revisions that fix this kind of problems are available +Generally, firmware revisions that fix this kind of problems are available at respective vendor web/ftp sites. -All I can say is that I never have had problem with tagged queuing using -this driver and its predecessors. Hard disks that behaved correctly for + +All I can say is that I never have had problem with tagged queuing using +this driver and its predecessors. Hard disks that behaved correctly for me using tagged commands are the following: - IBM S12 0662 @@ -223,9 +267,9 @@ me using tagged commands are the following: - Quantum Atlas IV - Seagate Cheetah II -If your controller has NVRAM, you can configure this feature per target -from the user setup tool. The Tekram Setup program allows to tune the -maximum number of queued commands up to 32. The Symbios Setup only allows +If your controller has NVRAM, you can configure this feature per target +from the user setup tool. The Tekram Setup program allows to tune the +maximum number of queued commands up to 32. The Symbios Setup only allows to enable or disable this feature. The maximum number of simultaneous tagged commands queued to a device @@ -233,15 +277,15 @@ is currently set to 16 by default. This value is suitable for most SCSI disks. With large SCSI disks (>= 2GB, cache >= 512KB, average seek time <= 10 ms), using a larger value may give better performances. -This driver supports up to 255 commands per device, and but using more than -64 is generally not worth-while, unless you are using a very large disk or -disk arrays. It is noticeable that most of recent hard disks seem not to -accept more than 64 simultaneous commands. So, using more than 64 queued +This driver supports up to 255 commands per device, and but using more than +64 is generally not worth-while, unless you are using a very large disk or +disk arrays. It is noticeable that most of recent hard disks seem not to +accept more than 64 simultaneous commands. So, using more than 64 queued commands is probably just resource wasting. -If your controller does not have NVRAM or if it is managed by the SDMS -BIOS/SETUP, you can configure tagged queueing feature and device queue -depths from the boot command-line. For example: +If your controller does not have NVRAM or if it is managed by the SDMS +BIOS/SETUP, you can configure tagged queueing feature and device queue +depths from the boot command-line. For example:: sym53c8xx=tags:4/t2t3q15-t4q7/t1u0q32 @@ -257,25 +301,28 @@ In some special conditions, some SCSI disk firmwares may return a QUEUE FULL status for a SCSI command. This behaviour is managed by the driver using the following heuristic: -- Each time a QUEUE FULL status is returned, tagged queue depth is reduced - to the actual number of disconnected commands. +- Each time a QUEUE FULL status is returned, tagged queue depth is reduced + to the actual number of disconnected commands. - Every 200 successfully completed SCSI commands, if allowed by the current limit, the maximum number of queueable commands is incremented. -Since QUEUE FULL status reception and handling is resource wasting, the -driver notifies by default this problem to user by indicating the actual -number of commands used and their status, as well as its decision on the +Since QUEUE FULL status reception and handling is resource wasting, the +driver notifies by default this problem to user by indicating the actual +number of commands used and their status, as well as its decision on the device queue depth change. -The heuristic used by the driver in handling QUEUE FULL ensures that the -impact on performances is not too bad. You can get rid of the messages by +The heuristic used by the driver in handling QUEUE FULL ensures that the +impact on performances is not too bad. You can get rid of the messages by setting verbose level to zero, as follow: -1st method: boot your system using 'sym53c8xx=verb:0' option. -2nd method: apply "setverbose 0" control command to the proc fs entry +1st method: + boot your system using 'sym53c8xx=verb:0' option. +2nd method: + apply "setverbose 0" control command to the proc fs entry corresponding to your controller after boot-up. 6. Parity checking +================== The driver supports SCSI parity checking and PCI bus master parity checking. These features must be enabled in order to ensure safe @@ -284,17 +331,19 @@ with parity. The options to defeat parity checking have been removed from the driver. 7. Profiling information +======================== This driver does not provide profiling information as did its predecessors. -This feature was not this useful and added complexity to the code. -As the driver code got more complex, I have decided to remove everything +This feature was not this useful and added complexity to the code. +As the driver code got more complex, I have decided to remove everything that didn't seem actually useful. 8. Control commands +=================== Control commands can be sent to the driver with write operations to the proc SCSI file system. The generic command syntax is the -following: +following:: echo "<verb> <parameters>" >/proc/scsi/sym53c8xx/0 (assumes controller number is 0) @@ -305,97 +354,112 @@ apply to all targets of the SCSI chain (except the controller). Available commands: 8.1 Set minimum synchronous period factor +----------------------------------------- setsync <target> <period factor> - target: target number - period: minimum synchronous period. + :target: target number + :period: minimum synchronous period. Maximum speed = 1000/(4*period factor) except for special cases below. Specify a period of 0, to force asynchronous transfer mode. - 9 means 12.5 nano-seconds synchronous period - 10 means 25 nano-seconds synchronous period - 11 means 30 nano-seconds synchronous period - 12 means 50 nano-seconds synchronous period + - 9 means 12.5 nano-seconds synchronous period + - 10 means 25 nano-seconds synchronous period + - 11 means 30 nano-seconds synchronous period + - 12 means 50 nano-seconds synchronous period 8.2 Set wide size +----------------- setwide <target> <size> - target: target number - size: 0=8 bits, 1=16bits + :target: target number + :size: 0=8 bits, 1=16bits 8.3 Set maximum number of concurrent tagged commands - +---------------------------------------------------- + settags <target> <tags> - target: target number - tags: number of concurrent tagged commands + :target: target number + :tags: number of concurrent tagged commands must not be greater than configured (default: 16) 8.4 Set debug mode +------------------ setdebug <list of debug flags> Available debug flags: - alloc: print info about memory allocations (ccb, lcb) - queue: print info about insertions into the command start queue - result: print sense data on CHECK CONDITION status - scatter: print info about the scatter process - scripts: print info about the script binding process - tiny: print minimal debugging information - timing: print timing information of the NCR chip - nego: print information about SCSI negotiations - phase: print information on script interruptions + + ======== ======================================================== + alloc print info about memory allocations (ccb, lcb) + queue print info about insertions into the command start queue + result print sense data on CHECK CONDITION status + scatter print info about the scatter process + scripts print info about the script binding process + tiny print minimal debugging information + timing print timing information of the NCR chip + nego print information about SCSI negotiations + phase print information on script interruptions + ======== ======================================================== Use "setdebug" with no argument to reset debug flags. 8.5 Set flag (no_disc) - +---------------------- + setflag <target> <flag> - target: target number + :target: target number For the moment, only one flag is available: no_disc: not allow target to disconnect. Do not specify any flag in order to reset the flag. For example: - - setflag 4 + + setflag 4 will reset no_disc flag for target 4, so will allow it disconnections. - - setflag all + setflag all will allow disconnection for all devices on the SCSI bus. 8.6 Set verbose level +--------------------- setverbose #level - The driver default verbose level is 1. This command allows to change + The driver default verbose level is 1. This command allows to change th driver verbose level after boot-up. 8.7 Reset all logical units of a target +--------------------------------------- resetdev <target> - target: target number + :target: target number + The driver will try to send a BUS DEVICE RESET message to the target. 8.8 Abort all tasks of all logical units of a target +---------------------------------------------------- cleardev <target> - target: target number - The driver will try to send a ABORT message to all the logical units + :target: target number + + The driver will try to send a ABORT message to all the logical units of the target. 9. Configuration parameters +=========================== -Under kernel configuration tools (make menuconfig, for example), it is +Under kernel configuration tools (make menuconfig, for example), it is possible to change some default driver configuration parameters. If the firmware of all your devices is perfect enough, all the features supported by the driver can be enabled at start-up. However, @@ -414,166 +478,238 @@ Default tagged command queue depth (default answer: 16) This parameter can be specified from the boot command line. Maximum number of queued commands (default answer: 32) - This option allows you to specify the maximum number of tagged commands + This option allows you to specify the maximum number of tagged commands that can be queued to a device. The maximum supported value is 255. Synchronous transfers frequency (default answer: 80) - This option allows you to specify the frequency in MHz the driver + This option allows you to specify the frequency in MHz the driver will use at boot time for synchronous data transfer negotiations. 0 means "asynchronous data transfers". 10. Boot setup commands +======================= 10.1 Syntax +----------- Setup commands can be passed to the driver either at boot time or as parameters to modprobe, as described in Documentation/admin-guide/kernel-parameters.rst -Example of boot setup command under lilo prompt: +Example of boot setup command under lilo prompt:: -lilo: linux root=/dev/sda2 sym53c8xx.cmd_per_lun=4 sym53c8xx.sync=10 sym53c8xx.debug=0x200 + lilo: linux root=/dev/sda2 sym53c8xx.cmd_per_lun=4 sym53c8xx.sync=10 sym53c8xx.debug=0x200 - enable tagged commands, up to 4 tagged commands queued. - set synchronous negotiation speed to 10 Mega-transfers / second. - set DEBUG_NEGO flag. The following command will install the driver module with the same -options as above. +options as above:: modprobe sym53c8xx cmd_per_lun=4 sync=10 debug=0x200 10.2 Available arguments +------------------------ 10.2.1 Default number of tagged commands - cmd_per_lun=0 (or cmd_per_lun=1) tagged command queuing disabled - cmd_per_lun=#tags (#tags > 1) tagged command queuing enabled +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + - cmd_per_lun=0 (or cmd_per_lun=1) tagged command queuing disabled + - cmd_per_lun=#tags (#tags > 1) tagged command queuing enabled + #tags will be truncated to the max queued commands configuration parameter. 10.2.2 Burst max +^^^^^^^^^^^^^^^^ + + ========== ====================================================== burst=0 burst disabled burst=255 get burst length from initial IO register settings. burst=#x burst enabled (1<<#x burst transfers max) - #x is an integer value which is log base 2 of the burst transfers max. + + #x is an integer value which is log base 2 of the burst + transfers max. + ========== ====================================================== + By default the driver uses the maximum value supported by the chip. 10.2.3 LED support +^^^^^^^^^^^^^^^^^^ + + ===== =================== led=1 enable LED support led=0 disable LED support + ===== =================== + Do not enable LED support if your scsi board does not use SDMS BIOS. (See 'Configuration parameters') 10.2.4 Differential mode - diff=0 never set up diff mode +^^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ================================= + diff=0 never set up diff mode diff=1 set up diff mode if BIOS set it diff=2 always set up diff mode diff=3 set diff mode if GPIO3 is not set + ====== ================================= 10.2.5 IRQ mode +^^^^^^^^^^^^^^^ + + ====== ================================================ irqm=0 always open drain irqm=1 same as initial settings (assumed BIOS settings) irqm=2 always totem pole + ====== ================================================ + +10.2.6 Check SCSI BUS +^^^^^^^^^^^^^^^^^^^^^ -10.2.6 Check SCSI BUS buschk=<option bits> Available option bits: - 0x0: No check. - 0x1: Check and do not attach the controller on error. - 0x2: Check and just warn on error. + + === ================================================ + 0x0 No check. + 0x1 Check and do not attach the controller on error. + 0x2 Check and just warn on error. + === ================================================ 10.2.7 Suggest a default SCSI id for hosts +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ========== ========================================== hostid=255 no id suggested. - hostid=#x (0 < x < 7) x suggested for hosts SCSI id. + hostid=#x (0 < x < 7) x suggested for hosts SCSI id. + ========== ========================================== - If a host SCSI id is available from the NVRAM, the driver will ignore - any value suggested as boot option. Otherwise, if a suggested value - different from 255 has been supplied, it will use it. Otherwise, it will - try to deduce the value previously set in the hardware and use value + If a host SCSI id is available from the NVRAM, the driver will ignore + any value suggested as boot option. Otherwise, if a suggested value + different from 255 has been supplied, it will use it. Otherwise, it will + try to deduce the value previously set in the hardware and use value 7 if the hardware value is zero. 10.2.8 Verbosity level +^^^^^^^^^^^^^^^^^^^^^^^ + + ====== ======== verb=0 minimal verb=1 normal verb=2 too much + ====== ======== 10.2.9 Debug mode - debug=0 clear debug flags - debug=#x set debug flags - #x is an integer value combining the following power-of-2 values: - DEBUG_ALLOC 0x1 - DEBUG_PHASE 0x2 - DEBUG_POLL 0x4 - DEBUG_QUEUE 0x8 - DEBUG_RESULT 0x10 - DEBUG_SCATTER 0x20 - DEBUG_SCRIPT 0x40 - DEBUG_TINY 0x80 - DEBUG_TIMING 0x100 - DEBUG_NEGO 0x200 - DEBUG_TAGS 0x400 - DEBUG_FREEZE 0x800 - DEBUG_RESTART 0x1000 - - You can play safely with DEBUG_NEGO. However, some of these flags may - generate bunches of syslog messages. +^^^^^^^^^^^^^^^^^ + + ========= ==================================== + debug=0 clear debug flags + debug=#x set debug flags + + #x is an integer value combining the + following power-of-2 values: + + ============= ====== + DEBUG_ALLOC 0x1 + DEBUG_PHASE 0x2 + DEBUG_POLL 0x4 + DEBUG_QUEUE 0x8 + DEBUG_RESULT 0x10 + DEBUG_SCATTER 0x20 + DEBUG_SCRIPT 0x40 + DEBUG_TINY 0x80 + DEBUG_TIMING 0x100 + DEBUG_NEGO 0x200 + DEBUG_TAGS 0x400 + DEBUG_FREEZE 0x800 + DEBUG_RESTART 0x1000 + ============= ====== + ========= ==================================== + + You can play safely with DEBUG_NEGO. However, some of these flags may + generate bunches of syslog messages. 10.2.10 Settle delay +^^^^^^^^^^^^^^^^^^^^ + + ======== =================== settle=n delay for n seconds + ======== =================== After a bus reset, the driver will delay for n seconds before talking to any device on the bus. The default is 3 seconds and safe mode will default it to 10. 10.2.11 Serial NVRAM - NB: option not currently implemented. +^^^^^^^^^^^^^^^^^^^^ + + .. Note:: option not currently implemented. + + ======= ========================================= nvram=n do not look for serial NVRAM nvram=y test controllers for onboard serial NVRAM + ======= ========================================= + (alternate binary form) + nvram=<bits options> + + ==== ================================================================= 0x01 look for NVRAM (equivalent to nvram=y) 0x02 ignore NVRAM "Synchronous negotiation" parameters for all devices 0x04 ignore NVRAM "Wide negotiation" parameter for all devices 0x08 ignore NVRAM "Scan at boot time" parameter for all devices 0x80 also attach controllers set to OFF in the NVRAM (sym53c8xx only) + ==== ================================================================= 10.2.12 Exclude a host from being attached +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + excl=<io_address>,... Prevent host at a given io address from being attached. - For example 'excl=0xb400,0xc000' indicate to the + For example 'excl=0xb400,0xc000' indicate to the driver not to attach hosts at address 0xb400 and 0xc000. 10.3 Converting from old style options +-------------------------------------- + +Previously, the sym2 driver accepted arguments of the form:: -Previously, the sym2 driver accepted arguments of the form sym53c8xx=tags:4,sync:10,debug:0x200 As a result of the new module parameters, this is no longer available. Most of the options have remained the same, but tags has become cmd_per_lun to reflect its different purposes. The sample above would -be specified as: +be specified as:: + modprobe sym53c8xx cmd_per_lun=4 sync=10 debug=0x200 -or on the kernel boot line as: +or on the kernel boot line as:: + sym53c8xx.cmd_per_lun=4 sym53c8xx.sync=10 sym53c8xx.debug=0x200 -10.4 SCSI BUS checking boot option. +10.4 SCSI BUS checking boot option +---------------------------------- -When this option is set to a non-zero value, the driver checks SCSI lines +When this option is set to a non-zero value, the driver checks SCSI lines logic state, 100 micro-seconds after having asserted the SCSI RESET line. The driver just reads SCSI lines and checks all lines read FALSE except RESET. -Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI +Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI RESET has been asserted, any signal to TRUE may indicate a SCSI BUS problem. Unfortunately, the following common SCSI BUS problems are not detected: + - Only 1 terminator installed. - Misplaced terminators. - Bad quality terminators. -On the other hand, either bad cabling, broken devices, not conformant + +On the other hand, either bad cabling, broken devices, not conformant devices, ... may cause a SCSI signal to be wrong when te driver reads it. 15. SCSI problem troubleshooting +================================ 15.1 Problem tracking +--------------------- Most SCSI problems are due to a non conformant SCSI bus or too buggy devices. If unfortunately you have SCSI problems, you can check the @@ -607,86 +743,96 @@ hard disks. Good SCSI hard disks with a large cache gain advantage of tagged commands queuing. 15.2 Understanding hardware error reports +----------------------------------------- -When the driver detects an unexpected error condition, it may display a -message of the following pattern. +When the driver detects an unexpected error condition, it may display a +message of the following pattern:: -sym0:1: ERROR (0:48) (1-21-65) (f/95/0) @ (script 7c0:19000000). -sym0: script cmd = 19000000 -sym0: regdump: da 10 80 95 47 0f 01 07 75 01 81 21 80 01 09 00. + sym0:1: ERROR (0:48) (1-21-65) (f/95/0) @ (script 7c0:19000000). + sym0: script cmd = 19000000 + sym0: regdump: da 10 80 95 47 0f 01 07 75 01 81 21 80 01 09 00. -Some fields in such a message may help you understand the cause of the -problem, as follows: +Some fields in such a message may help you understand the cause of the +problem, as follows:: -sym0:1: ERROR (0:48) (1-21-65) (f/95/0) @ (script 7c0:19000000). -.....A.........B.C....D.E..F....G.H..I.......J.....K...L....... + sym0:1: ERROR (0:48) (1-21-65) (f/95/0) @ (script 7c0:19000000). + .....A.........B.C....D.E..F....G.H..I.......J.....K...L....... Field A : target number. - SCSI ID of the device the controller was talking with at the moment the + SCSI ID of the device the controller was talking with at the moment the error occurs. Field B : DSTAT io register (DMA STATUS) - Bit 0x40 : MDPE Master Data Parity Error + ======== ============================================================= + Bit 0x40 MDPE Master Data Parity Error Data parity error detected on the PCI BUS. - Bit 0x20 : BF Bus Fault + Bit 0x20 BF Bus Fault PCI bus fault condition detected - Bit 0x01 : IID Illegal Instruction Detected - Set by the chip when it detects an Illegal Instruction format + Bit 0x01 IID Illegal Instruction Detected + Set by the chip when it detects an Illegal Instruction format on some condition that makes an instruction illegal. - Bit 0x80 : DFE Dma Fifo Empty + Bit 0x80 DFE Dma Fifo Empty Pure status bit that does not indicate an error. - If the reported DSTAT value contains a combination of MDPE (0x40), + ======== ============================================================= + + If the reported DSTAT value contains a combination of MDPE (0x40), BF (0x20), then the cause may be likely due to a PCI BUS problem. Field C : SIST io register (SCSI Interrupt Status) - Bit 0x08 : SGE SCSI GROSS ERROR - Indicates that the chip detected a severe error condition + ======== ================================================================== + Bit 0x08 SGE SCSI GROSS ERROR + Indicates that the chip detected a severe error condition on the SCSI BUS that prevents the SCSI protocol from functioning properly. - Bit 0x04 : UDC Unexpected Disconnection - Indicates that the device released the SCSI BUS when the chip - was not expecting this to happen. A device may behave so to + Bit 0x04 UDC Unexpected Disconnection + Indicates that the device released the SCSI BUS when the chip + was not expecting this to happen. A device may behave so to indicate the SCSI initiator that an error condition not reportable using the SCSI protocol has occurred. - Bit 0x02 : RST SCSI BUS Reset - Generally SCSI targets do not reset the SCSI BUS, although any + Bit 0x02 RST SCSI BUS Reset + Generally SCSI targets do not reset the SCSI BUS, although any device on the BUS can reset it at any time. - Bit 0x01 : PAR Parity + Bit 0x01 PAR Parity SCSI parity error detected. - On a faulty SCSI BUS, any error condition among SGE (0x08), UDC (0x04) and - PAR (0x01) may be detected by the chip. If your SCSI system sometimes - encounters such error conditions, especially SCSI GROSS ERROR, then a SCSI + ======== ================================================================== + + On a faulty SCSI BUS, any error condition among SGE (0x08), UDC (0x04) and + PAR (0x01) may be detected by the chip. If your SCSI system sometimes + encounters such error conditions, especially SCSI GROSS ERROR, then a SCSI BUS problem is likely the cause of these errors. -For fields D,E,F,G and H, you may look into the sym53c8xx_defs.h file +For fields D,E,F,G and H, you may look into the sym53c8xx_defs.h file that contains some minimal comments on IO register bits. + Field D : SOCL Scsi Output Control Latch - This register reflects the state of the SCSI control lines the + This register reflects the state of the SCSI control lines the chip want to drive or compare against. Field E : SBCL Scsi Bus Control Lines Actual value of control lines on the SCSI BUS. Field F : SBDL Scsi Bus Data Lines Actual value of data lines on the SCSI BUS. Field G : SXFER SCSI Transfer - Contains the setting of the Synchronous Period for output and + Contains the setting of the Synchronous Period for output and the current Synchronous offset (offset 0 means asynchronous). Field H : SCNTL3 Scsi Control Register 3 - Contains the setting of timing values for both asynchronous and - synchronous data transfers. + Contains the setting of timing values for both asynchronous and + synchronous data transfers. Field I : SCNTL4 Scsi Control Register 4 Only meaningful for 53C1010 Ultra3 controllers. -Understanding Fields J, K, L and dumps requires to have good knowledge of +Understanding Fields J, K, L and dumps requires to have good knowledge of SCSI standards, chip cores functionnals and internal driver data structures. -You are not required to decode and understand them, unless you want to help +You are not required to decode and understand them, unless you want to help maintain the driver code. 17. Serial NVRAM (added by Richard Waltham: dormouse@farsrobt.demon.co.uk) +========================================================================== 17.1 Features +------------- Enabling serial NVRAM support enables detection of the serial NVRAM included -on Symbios and some Symbios compatible host adaptors, and Tekram boards. The -serial NVRAM is used by Symbios and Tekram to hold set up parameters for the +on Symbios and some Symbios compatible host adaptors, and Tekram boards. The +serial NVRAM is used by Symbios and Tekram to hold set up parameters for the host adaptor and its attached drives. The Symbios NVRAM also holds data on the boot order of host adaptors in a @@ -694,102 +840,122 @@ system with more than one host adaptor. This information is no longer used as it's fundamentally incompatible with the hotplug PCI model. Tekram boards using Symbios chips, DC390W/F/U, which have NVRAM are detected -and this is used to distinguish between Symbios compatible and Tekram host +and this is used to distinguish between Symbios compatible and Tekram host adaptors. This is used to disable the Symbios compatible "diff" setting -incorrectly set on Tekram boards if the CONFIG_SCSI_53C8XX_SYMBIOS_COMPAT -configuration parameter is set enabling both Symbios and Tekram boards to be +incorrectly set on Tekram boards if the CONFIG_SCSI_53C8XX_SYMBIOS_COMPAT +configuration parameter is set enabling both Symbios and Tekram boards to be used together with the Symbios cards using all their features, including "diff" support. ("led pin" support for Symbios compatible cards can remain enabled when using Tekram cards. It does nothing useful for Tekram host adaptors but does not cause problems either.) -The parameters the driver is able to get from the NVRAM depend on the +The parameters the driver is able to get from the NVRAM depend on the data format used, as follow: - Tekram format Symbios format -General and host parameters - Boot order N Y - Host SCSI ID Y Y - SCSI parity checking Y Y - Verbose boot messages N Y -SCSI devices parameters - Synchronous transfer speed Y Y - Wide 16 / Narrow Y Y - Tagged Command Queuing enabled Y Y - Disconnections enabled Y Y - Scan at boot time N Y - -In order to speed up the system boot, for each device configured without -the "scan at boot time" option, the driver forces an error on the ++-------------------------------+------------------+--------------+ +| |Tekram format |Symbios format| ++-------------------------------+------------------+--------------+ +|General and host parameters | | | ++-------------------------------+------------------+--------------+ +| * Boot order | N | Y | ++-------------------------------+------------------+--------------+ +| * Host SCSI ID | Y | Y | ++-------------------------------+------------------+--------------+ +| * SCSI parity checking | Y | Y | ++-------------------------------+------------------+--------------+ +| * Verbose boot messages | N | Y | ++-------------------------------+------------------+--------------+ +|SCSI devices parameters | ++-------------------------------+------------------+--------------+ +| * Synchronous transfer speed | Y | Y | ++-------------------------------+------------------+--------------+ +| * Wide 16 / Narrow | Y | Y | ++-------------------------------+------------------+--------------+ +| * Tagged Command Queuing | Y | Y | +| enabled | | | ++-------------------------------+------------------+--------------+ +| * Disconnections enabled | Y | Y | ++-------------------------------+------------------+--------------+ +| * Scan at boot time | N | Y | ++-------------------------------+------------------+--------------+ + + +In order to speed up the system boot, for each device configured without +the "scan at boot time" option, the driver forces an error on the first TEST UNIT READY command received for this device. 17.2 Symbios NVRAM layout +------------------------- + +typical data at NVRAM address 0x100 (53c810a NVRAM):: + + 00 00 + 64 01 + 8e 0b + + 00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 + + 04 00 0f 00 00 10 00 50 00 00 01 00 00 62 + 04 00 03 00 00 10 00 58 00 00 01 00 00 63 + 04 00 01 00 00 10 00 48 00 00 01 00 00 61 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 + + fe fe + 00 00 + 00 00 -typical data at NVRAM address 0x100 (53c810a NVRAM) ------------------------------------------------------------ -00 00 -64 01 -8e 0b - -00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 - -04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -04 00 03 00 00 10 00 58 00 00 01 00 00 63 -04 00 01 00 00 10 00 48 00 00 01 00 00 61 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 - -fe fe -00 00 -00 00 ------------------------------------------------------------ NVRAM layout details -NVRAM Address 0x000-0x0ff not used - 0x100-0x26f initialised data - 0x270-0x7ff not used +============= ================= +NVRAM Address +============= ================= +0x000-0x0ff not used +0x100-0x26f initialised data +0x270-0x7ff not used +============= ================= -general layout +general layout:: header - 6 bytes, data - 356 bytes (checksum is byte sum of this data) @@ -797,7 +963,7 @@ general layout --- total 368 bytes -data area layout +data area layout:: controller set up - 20 bytes boot configuration - 56 bytes (4x14 bytes) @@ -806,52 +972,51 @@ data area layout --- total 356 bytes ------------------------------------------------------------ -header - -00 00 - ?? start marker -64 01 - byte count (lsb/msb excludes header/trailer) -8e 0b - checksum (lsb/msb excludes header/trailer) ------------------------------------------------------------ -controller set up - -00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 - | | | | - | | | -- host ID - | | | - | | --Removable Media Support - | | 0x00 = none - | | 0x01 = Bootable Device - | | 0x02 = All with Media - | | - | --flag bits 2 - | 0x00000001= scan order hi->low - | (default 0x00 - scan low->hi) - --flag bits 1 - 0x00000001 scam enable - 0x00000010 parity enable - 0x00000100 verbose boot msgs +header:: + + 00 00 - ?? start marker + 64 01 - byte count (lsb/msb excludes header/trailer) + 8e 0b - checksum (lsb/msb excludes header/trailer) + +controller set up:: + + 00 30 00 00 00 00 07 00 00 00 00 00 00 00 07 04 10 04 00 00 + | | | | + | | | -- host ID + | | | + | | --Removable Media Support + | | 0x00 = none + | | 0x01 = Bootable Device + | | 0x02 = All with Media + | | + | --flag bits 2 + | 0x00000001= scan order hi->low + | (default 0x00 - scan low->hi) + --flag bits 1 + 0x00000001 scam enable + 0x00000010 parity enable + 0x00000100 verbose boot msgs remaining bytes unknown - they do not appear to change in my current set up for any of the controllers. default set up is identical for 53c810a and 53c875 NVRAM (Removable Media added Symbios BIOS version 4.09) ------------------------------------------------------------ + boot configuration -boot order set by order of the devices in this table +boot order set by order of the devices in this table:: -04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -- 1st controller -04 00 03 00 00 10 00 58 00 00 01 00 00 63 2nd controller -04 00 01 00 00 10 00 48 00 00 01 00 00 61 3rd controller -00 00 00 00 00 00 00 00 00 00 00 00 00 00 4th controller - | | | | | | | | - | | | | | | ---- PCI io port adr - | | | | | --0x01 init/scan at boot time - | | | | --PCI device/function number (0xdddddfff) - | | ----- ?? PCI vendor ID (lsb/msb) - ----PCI device ID (lsb/msb) + 04 00 0f 00 00 10 00 50 00 00 01 00 00 62 -- 1st controller + 04 00 03 00 00 10 00 58 00 00 01 00 00 63 2nd controller + 04 00 01 00 00 10 00 48 00 00 01 00 00 61 3rd controller + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4th controller + | | | | | | | | + | | | | | | ---- PCI io port adr + | | | | | --0x01 init/scan at boot time + | | | | --PCI device/function number (0xdddddfff) + | | ----- ?? PCI vendor ID (lsb/msb) + ----PCI device ID (lsb/msb) ?? use of this data is a guess but seems reasonable @@ -859,120 +1024,120 @@ remaining bytes unknown - they do not appear to change in my current set up default set up is identical for 53c810a and 53c875 NVRAM ------------------------------------------------------------ -device set up (up to 16 devices - includes controller) - -0f 00 08 08 64 00 0a 00 - id 0 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 -0f 00 08 08 64 00 0a 00 - id 15 - | | | | | | - | | | | ----timeout (lsb/msb) - | | | --synch period (0x?? 40 Mtrans/sec- fast 40) (probably 0x28) - | | | (0x30 20 Mtrans/sec- fast 20) - | | | (0x64 10 Mtrans/sec- fast ) - | | | (0xc8 5 Mtrans/sec) - | | | (0x00 asynchronous) - | | -- ?? max sync offset (0x08 in NVRAM on 53c810a) - | | (0x10 in NVRAM on 53c875) - | --device bus width (0x08 narrow) - | (0x10 16 bit wide) - --flag bits - 0x00000001 - disconnect enabled - 0x00000010 - scan at boot time - 0x00000100 - scan luns - 0x00001000 - queue tags enabled + +device set up (up to 16 devices - includes controller):: + + 0f 00 08 08 64 00 0a 00 - id 0 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 + 0f 00 08 08 64 00 0a 00 - id 15 + | | | | | | + | | | | ----timeout (lsb/msb) + | | | --synch period (0x?? 40 Mtrans/sec- fast 40) (probably 0x28) + | | | (0x30 20 Mtrans/sec- fast 20) + | | | (0x64 10 Mtrans/sec- fast ) + | | | (0xc8 5 Mtrans/sec) + | | | (0x00 asynchronous) + | | -- ?? max sync offset (0x08 in NVRAM on 53c810a) + | | (0x10 in NVRAM on 53c875) + | --device bus width (0x08 narrow) + | (0x10 16 bit wide) + --flag bits + 0x00000001 - disconnect enabled + 0x00000010 - scan at boot time + 0x00000100 - scan luns + 0x00001000 - queue tags enabled remaining bytes unknown - they do not appear to change in my current set up -?? use of this data is a guess but seems reasonable +?? use of this data is a guess but seems reasonable (but it could be max bus width) default set up for 53c810a NVRAM -default set up for 53c875 NVRAM - bus width - 0x10 +default set up for 53c875 NVRAM + + - bus width - 0x10 - sync offset ? - 0x10 - sync period - 0x30 ------------------------------------------------------------ -?? spare device space (32 bit bus ??) - -00 00 00 00 00 00 00 00 (19x8bytes) -. -. -00 00 00 00 00 00 00 00 -default set up is identical for 53c810a and 53c875 NVRAM ------------------------------------------------------------ -trailer +?? spare device space (32 bit bus ??):: -fe fe - ? end marker ? -00 00 -00 00 + 00 00 00 00 00 00 00 00 (19x8bytes) + . + . + 00 00 00 00 00 00 00 00 default set up is identical for 53c810a and 53c875 NVRAM ------------------------------------------------------------ +trailer:: + fe fe - ? end marker ? + 00 00 + 00 00 + +default set up is identical for 53c810a and 53c875 NVRAM 17.3 Tekram NVRAM layout +------------------------ nvram 64x16 (1024 bit) -Drive settings - -Drive ID 0-15 (addr 0x0yyyy0 = device setup, yyyy = ID) - (addr 0x0yyyy1 = 0x0000) - - x x x x x x x x x x x x x x x x - | | | | | | | | | - | | | | | | | | ----- parity check 0 - off - | | | | | | | | 1 - on - | | | | | | | | - | | | | | | | ------- sync neg 0 - off - | | | | | | | 1 - on - | | | | | | | - | | | | | | --------- disconnect 0 - off - | | | | | | 1 - on - | | | | | | - | | | | | ----------- start cmd 0 - off - | | | | | 1 - on - | | | | | - | | | | -------------- tagged cmds 0 - off - | | | | 1 - on - | | | | - | | | ---------------- wide neg 0 - off - | | | 1 - on - | | | - --------------------------- sync rate 0 - 10.0 Mtrans/sec - 1 - 8.0 - 2 - 6.6 - 3 - 5.7 - 4 - 5.0 - 5 - 4.0 - 6 - 3.0 - 7 - 2.0 - 7 - 2.0 - 8 - 20.0 - 9 - 16.7 - a - 13.9 - b - 11.9 +Drive settings:: + + Drive ID 0-15 (addr 0x0yyyy0 = device setup, yyyy = ID) + (addr 0x0yyyy1 = 0x0000) + + x x x x x x x x x x x x x x x x + | | | | | | | | | + | | | | | | | | ----- parity check 0 - off + | | | | | | | | 1 - on + | | | | | | | | + | | | | | | | ------- sync neg 0 - off + | | | | | | | 1 - on + | | | | | | | + | | | | | | --------- disconnect 0 - off + | | | | | | 1 - on + | | | | | | + | | | | | ----------- start cmd 0 - off + | | | | | 1 - on + | | | | | + | | | | -------------- tagged cmds 0 - off + | | | | 1 - on + | | | | + | | | ---------------- wide neg 0 - off + | | | 1 - on + | | | + --------------------------- sync rate 0 - 10.0 Mtrans/sec + 1 - 8.0 + 2 - 6.6 + 3 - 5.7 + 4 - 5.0 + 5 - 4.0 + 6 - 3.0 + 7 - 2.0 + 7 - 2.0 + 8 - 20.0 + 9 - 16.7 + a - 13.9 + b - 11.9 Global settings -Host flags 0 (addr 0x100000, 32) +Host flags 0 (addr 0x100000, 32):: x x x x x x x x x x x x x x x x | | | | | | | | | | | | @@ -980,7 +1145,7 @@ Host flags 0 (addr 0x100000, 32) | | | | | | | | | | | | | | | ----------------------- support for 0 - off | | | | | | | > 2 drives 1 - on - | | | | | | | + | | | | | | | | | | | | | ------------------------- support drives 0 - off | | | | | | > 1Gbytes 1 - on | | | | | | @@ -1000,10 +1165,10 @@ Host flags 0 (addr 0x100000, 32) as BIOS dev 1 - boot device 2 - all -Host flags 1 (addr 0x100001, 33) +Host flags 1 (addr 0x100001, 33):: x x x x x x x x x x x x x x x x - | | | | | | + | | | | | | | | | --------- boot delay 0 - 3 sec | | | 1 - 5 | | | 2 - 10 @@ -1018,7 +1183,7 @@ Host flags 1 (addr 0x100001, 33) 3 - 16 4 - 32 -Host flags 2 (addr 0x100010, 34) +Host flags 2 (addr 0x100010, 34):: x x x x x x x x x x x x x x x x | @@ -1031,18 +1196,14 @@ checksum = 0x1234 - (sum addr 0-63) ---------------------------------------------------------------------------- -default nvram data: - -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 - -0x0f07 0x0400 0x0001 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 -0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xfbbc +default nvram data:: + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 + 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 0x0037 0x0000 -=============================================================================== -End of Linux SYM-2 driver documentation file + 0x0f07 0x0400 0x0001 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 + 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xfbbc diff --git a/Documentation/scsi/tcm_qla2xxx.txt b/Documentation/scsi/tcm_qla2xxx.rst index c3a670a25e2b..91bc1fcd369e 100644 --- a/Documentation/scsi/tcm_qla2xxx.txt +++ b/Documentation/scsi/tcm_qla2xxx.rst @@ -1,22 +1,36 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================== +tcm_qla2xxx Driver Notes +======================== + tcm_qla2xxx jam_host attribute ------------------------------ There is now a new module endpoint atribute called jam_host -attribute: jam_host: boolean=0/1 +attribute:: + + jam_host: boolean=0/1 + This attribute and accompanying code is only included if the Kconfig parameter TCM_QLA2XXX_DEBUG is set to Y + By default this jammer code and functionality is disabled Use this attribute to control the discarding of SCSI commands to a selected host. + This may be useful for testing error handling and simulating slow drain and other fabric issues. Setting a boolean of 1 for the jam_host attribute for a particular host - will discard the commands for that host. +will discard the commands for that host. + Reset back to 0 to stop the jamming. -Enable host 4 to be jammed -echo 1 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host +Enable host 4 to be jammed:: + + echo 1 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host + +Disable jamming on host 4:: -Disable jamming on host 4 -echo 0 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host + echo 0 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host diff --git a/Documentation/scsi/ufs.txt b/Documentation/scsi/ufs.rst index 81842ec3e116..a920c0a5a1f6 100644 --- a/Documentation/scsi/ufs.txt +++ b/Documentation/scsi/ufs.rst @@ -1,24 +1,26 @@ - Universal Flash Storage - ======================= +.. SPDX-License-Identifier: GPL-2.0 +======================= +Universal Flash Storage +======================= -Contents --------- -1. Overview -2. UFS Architecture Overview - 2.1 Application Layer - 2.2 UFS Transport Protocol(UTP) layer - 2.3 UFS Interconnect(UIC) Layer -3. UFSHCD Overview - 3.1 UFS controller initialization - 3.2 UTP Transfer requests - 3.3 UFS error handling - 3.4 SCSI Error handling +.. Contents + + 1. Overview + 2. UFS Architecture Overview + 2.1 Application Layer + 2.2 UFS Transport Protocol(UTP) layer + 2.3 UFS Interconnect(UIC) Layer + 3. UFSHCD Overview + 3.1 UFS controller initialization + 3.2 UTP Transfer requests + 3.3 UFS error handling + 3.4 SCSI Error handling 1. Overview ------------ +=========== Universal Flash Storage(UFS) is a storage specification for flash devices. It is aimed to provide a universal storage interface for both @@ -28,19 +30,25 @@ is defined by JEDEC Solid State Technology Association. UFS is based on MIPI M-PHY physical layer standard. UFS uses MIPI M-PHY as the physical layer and MIPI Unipro as the link layer. -The main goals of UFS is to provide, +The main goals of UFS is to provide: + * Optimized performance: - For UFS version 1.0 and 1.1 the target performance is as follows, - Support for Gear1 is mandatory (rate A: 1248Mbps, rate B: 1457.6Mbps) - Support for Gear2 is optional (rate A: 2496Mbps, rate B: 2915.2Mbps) + + For UFS version 1.0 and 1.1 the target performance is as follows: + + - Support for Gear1 is mandatory (rate A: 1248Mbps, rate B: 1457.6Mbps) + - Support for Gear2 is optional (rate A: 2496Mbps, rate B: 2915.2Mbps) + Future version of the standard, - Gear3 (rate A: 4992Mbps, rate B: 5830.4Mbps) + + - Gear3 (rate A: 4992Mbps, rate B: 5830.4Mbps) + * Low power consumption * High random IOPs and low latency 2. UFS Architecture Overview ----------------------------- +============================ UFS has a layered communication architecture which is based on SCSI SAM-5 architectural model. @@ -48,16 +56,22 @@ SAM-5 architectural model. UFS communication architecture consists of following layers, 2.1 Application Layer +--------------------- The Application layer is composed of UFS command set layer(UCS), Task Manager and Device manager. The UFS interface is designed to be protocol agnostic, however SCSI has been selected as a baseline protocol for versions 1.0 and 1.1 of UFS protocol layer. + UFS supports subset of SCSI commands defined by SPC-4 and SBC-3. - * UCS: It handles SCSI commands supported by UFS specification. - * Task manager: It handles task management functions defined by the + + * UCS: + It handles SCSI commands supported by UFS specification. + * Task manager: + It handles task management functions defined by the UFS which are meant for command queue control. - * Device manager: It handles device level operations and device + * Device manager: + It handles device level operations and device configuration operations. Device level operations mainly involve device power management operations and commands to Interconnect layers. Device level configurations involve handling of query @@ -65,10 +79,12 @@ UFS communication architecture consists of following layers, information of the device. 2.2 UFS Transport Protocol(UTP) layer +------------------------------------- UTP layer provides services for the higher layers through Service Access Points. UTP defines 3 service access points for higher layers. + * UDM_SAP: Device manager service access point is exposed to device manager for device level operations. These device level operations are done through query requests. @@ -76,20 +92,23 @@ UFS communication architecture consists of following layers, set layer(UCS) to transport commands. * UTP_TM_SAP: Task management service access point is exposed to task manager to transport task management functions. + UTP transports messages through UFS protocol information unit(UPIU). 2.3 UFS Interconnect(UIC) Layer +------------------------------- UIC is the lowest layer of UFS layered architecture. It handles connection between UFS host and UFS device. UIC consists of MIPI UniPro and MIPI M-PHY. UIC provides 2 service access points to upper layer, + * UIC_SAP: To transport UPIU between UFS host and UFS device. * UIO_SAP: To issue commands to Unipro layers. 3. UFSHCD Overview ------------------- +================== The UFS host controller driver is based on Linux SCSI Framework. UFSHCD is a low level device driver which acts as an interface between @@ -98,12 +117,14 @@ SCSI Midlayer and PCIe based UFS host controllers. The current UFSHCD implementation supports following functionality, 3.1 UFS controller initialization +--------------------------------- The initialization module brings UFS host controller to active state and prepares the controller to transfer commands/response between UFSHCD and UFS device. 3.2 UTP Transfer requests +------------------------- Transfer request handling module of UFSHCD receives SCSI commands from SCSI Midlayer, forms UPIUs and issues the UPIUs to UFS Host @@ -112,11 +133,13 @@ The current UFSHCD implementation supports following functionality, of the status of the command. 3.3 UFS error handling +---------------------- Error handling module handles Host controller fatal errors, Device fatal errors and UIC interconnect layer related errors. 3.4 SCSI Error handling +----------------------- This is done through UFSHCD SCSI error handling routines registered with SCSI Midlayer. Examples of some of the error handling commands @@ -129,7 +152,7 @@ In this version of UFSHCD Query requests and power management functionality are not implemented. 4. BSG Support ------------------- +============== This transport driver supports exchanging UFS protocol information units (UPIUs) with a UFS device. Typically, user space will allocate @@ -138,7 +161,7 @@ request_upiu and reply_upiu respectively. Filling those UPIUs should be done in accordance with JEDEC spec UFS2.1 paragraph 10.7. *Caveat emptor*: The driver makes no further input validations and sends the UPIU to the device as it is. Open the bsg device in /dev/ufs-bsg and -send SG_IO with the applicable sg_io_v4: +send SG_IO with the applicable sg_io_v4:: io_hdr_v4.guard = 'Q'; io_hdr_v4.protocol = BSG_PROTOCOL_SCSI; @@ -166,6 +189,7 @@ upiu-based protocol is available at: For more detailed information about the tool and its supported features, please see the tool's README. -UFS Specifications can be found at, -UFS - http://www.jedec.org/sites/default/files/docs/JESD220.pdf -UFSHCI - http://www.jedec.org/sites/default/files/docs/JESD223.pdf +UFS Specifications can be found at: + +- UFS - http://www.jedec.org/sites/default/files/docs/JESD220.pdf +- UFSHCI - http://www.jedec.org/sites/default/files/docs/JESD223.pdf diff --git a/Documentation/scsi/wd719x.rst b/Documentation/scsi/wd719x.rst new file mode 100644 index 000000000000..a35015dfedd9 --- /dev/null +++ b/Documentation/scsi/wd719x.rst @@ -0,0 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============================================================== +Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards +=============================================================== + +The card requires firmware that can be cut out of the Windows NT driver that +can be downloaded from WD at: +http://support.wdc.com/product/download.asp?groupid=801&sid=27&lang=en + +There is no license anywhere in the file or on the page - so the firmware +probably cannot be added to linux-firmware. + +This script downloads and extracts the firmware, creating wd719x-risc.bin and +d719x-wcs.bin files. Put them in /lib/firmware/:: + + #!/bin/sh + wget http://support.wdc.com/download/archive/pciscsi.exe + lha xi pciscsi.exe pci-scsi.exe + lha xi pci-scsi.exe nt/wd7296a.sys + rm pci-scsi.exe + dd if=wd7296a.sys of=wd719x-risc.bin bs=1 skip=5760 count=14336 + dd if=wd7296a.sys of=wd719x-wcs.bin bs=1 skip=20096 count=514 + rm wd7296a.sys diff --git a/Documentation/scsi/wd719x.txt b/Documentation/scsi/wd719x.txt deleted file mode 100644 index 0816b0220238..000000000000 --- a/Documentation/scsi/wd719x.txt +++ /dev/null @@ -1,21 +0,0 @@ -Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards ---------------------------------------------------------------- - -The card requires firmware that can be cut out of the Windows NT driver that -can be downloaded from WD at: -http://support.wdc.com/product/download.asp?groupid=801&sid=27&lang=en - -There is no license anywhere in the file or on the page - so the firmware -probably cannot be added to linux-firmware. - -This script downloads and extracts the firmware, creating wd719x-risc.bin and -d719x-wcs.bin files. Put them in /lib/firmware/. - -#!/bin/sh -wget http://support.wdc.com/download/archive/pciscsi.exe -lha xi pciscsi.exe pci-scsi.exe -lha xi pci-scsi.exe nt/wd7296a.sys -rm pci-scsi.exe -dd if=wd7296a.sys of=wd719x-risc.bin bs=1 skip=5760 count=14336 -dd if=wd7296a.sys of=wd719x-wcs.bin bs=1 skip=20096 count=514 -rm wd7296a.sys diff --git a/Documentation/security/siphash.rst b/Documentation/security/siphash.rst index 9965821ab333..4eba68cdf0a1 100644 --- a/Documentation/security/siphash.rst +++ b/Documentation/security/siphash.rst @@ -128,8 +128,8 @@ then when you can be absolutely certain that the outputs will never be transmitted out of the kernel. This is only remotely useful over `jhash` as a means of mitigating hashtable flooding denial of service attacks. -Generating a key -================ +Generating a HalfSipHash key +============================ Keys should always be generated from a cryptographically secure source of random numbers, either using get_random_bytes or get_random_once: @@ -139,8 +139,8 @@ get_random_bytes(&key, sizeof(key)); If you're not deriving your key from here, you're doing it wrong. -Using the functions -=================== +Using the HalfSipHash functions +=============================== There are two variants of the function, one that takes a list of integers, and one that takes a buffer:: diff --git a/Documentation/sound/alsa-configuration.rst b/Documentation/sound/alsa-configuration.rst index 392875a1b94e..72f97d4b01a7 100644 --- a/Documentation/sound/alsa-configuration.rst +++ b/Documentation/sound/alsa-configuration.rst @@ -2234,6 +2234,19 @@ use_vmalloc buffers. If mmap is used on such architectures, turn off this option, so that the DMA-coherent buffers are allocated and used instead. +delayed_register + The option is needed for devices that have multiple streams + defined in multiple USB interfaces. The driver may invoke + registrations multiple times (once per interface) and this may + lead to the insufficient device enumeration. + This option receives an array of strings, and you can pass + ID:INTERFACE like ``0123abcd:4`` for performing the delayed + registration to the given device. In this example, when a USB + device 0123:abcd is probed, the driver waits the registration + until the USB interface 4 gets probed. + The driver prints a message like "Found post-registration device + assignment: 1234abcd:04" for such a device, so that user can + notice the need. This module supports multiple devices, autoprobe and hotplugging. diff --git a/Documentation/sound/hd-audio/index.rst b/Documentation/sound/hd-audio/index.rst index f8a72ffffe66..6e12de9fc34e 100644 --- a/Documentation/sound/hd-audio/index.rst +++ b/Documentation/sound/hd-audio/index.rst @@ -8,3 +8,4 @@ HD-Audio models controls dp-mst + realtek-pc-beep diff --git a/Documentation/sound/hd-audio/models.rst b/Documentation/sound/hd-audio/models.rst index 11298f0ce44d..0ea967d34583 100644 --- a/Documentation/sound/hd-audio/models.rst +++ b/Documentation/sound/hd-audio/models.rst @@ -216,8 +216,6 @@ alc298-dell-aio ALC298 fixups on Dell AIO machines alc275-dell-xps ALC275 fixups on Dell XPS models -alc256-dell-xps13 - ALC256 fixups on Dell XPS13 lenovo-spk-noise Workaround for speaker noise on Lenovo machines lenovo-hotkey diff --git a/Documentation/sound/hd-audio/realtek-pc-beep.rst b/Documentation/sound/hd-audio/realtek-pc-beep.rst new file mode 100644 index 000000000000..be47c6f76a6e --- /dev/null +++ b/Documentation/sound/hd-audio/realtek-pc-beep.rst @@ -0,0 +1,129 @@ +=============================== +Realtek PC Beep Hidden Register +=============================== + +This file documents the "PC Beep Hidden Register", which is present in certain +Realtek HDA codecs and controls a muxer and pair of passthrough mixers that can +route audio between pins but aren't themselves exposed as HDA widgets. As far +as I can tell, these hidden routes are designed to allow flexible PC Beep output +for codecs that don't have mixer widgets in their output paths. Why it's easier +to hide a mixer behind an undocumented vendor register than to just expose it +as a widget, I have no idea. + +Register Description +==================== + +The register is accessed via processing coefficient 0x36 on NID 20h. Bits not +identified below have no discernible effect on my machine, a Dell XPS 13 9350:: + + MSB LSB + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | |h|S|L| | B |R| | Known bits + +=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+ + |0|0|1|1| 0x7 |0|0x0|1| 0x7 | Reset value + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +1Ah input select (B): 2 bits + When zero, expose the PC Beep line (from the internal beep generator, when + enabled with the Set Beep Generation verb on NID 01h, or else from the + external PCBEEP pin) on the 1Ah pin node. When nonzero, expose the headphone + jack (or possibly Line In on some machines) input instead. If PC Beep is + selected, the 1Ah boost control has no effect. + +Amplify 1Ah loopback, left (L): 1 bit + Amplify the left channel of 1Ah before mixing it into outputs as specified + by h and S bits. Does not affect the level of 1Ah exposed to other widgets. + +Amplify 1Ah loopback, right (R): 1 bit + Amplify the right channel of 1Ah before mixing it into outputs as specified + by h and S bits. Does not affect the level of 1Ah exposed to other widgets. + +Loopback 1Ah to 21h [active low] (h): 1 bit + When zero, mix 1Ah (possibly with amplification, depending on L and R bits) + into 21h (headphone jack on my machine). Mixed signal respects the mute + setting on 21h. + +Loopback 1Ah to 14h (S): 1 bit + When one, mix 1Ah (possibly with amplification, depending on L and R bits) + into 14h (internal speaker on my machine). Mixed signal **ignores** the mute + setting on 14h and is present whenever 14h is configured as an output. + +Path diagrams +============= + +1Ah input selection (DIV is the PC Beep divider set on NID 01h):: + + <Beep generator> <PCBEEP pin> <Headphone jack> + | | | + +--DIV--+--!DIV--+ {1Ah boost control} + | | + +--(b == 0)--+--(b != 0)--+ + | + >1Ah (Beep/Headphone Mic/Line In)< + +Loopback of 1Ah to 21h/14h:: + + <1Ah (Beep/Headphone Mic/Line In)> + | + {amplify if L/R} + | + +-----!h-----+-----S-----+ + | | + {21h mute control} | + | | + >21h (Headphone)< >14h (Internal Speaker)< + +Background +========== + +All Realtek HDA codecs have a vendor-defined widget with node ID 20h which +provides access to a bank of registers that control various codec functions. +Registers are read and written via the standard HDA processing coefficient +verbs (Set/Get Coefficient Index, Set/Get Processing Coefficient). The node is +named "Realtek Vendor Registers" in public datasheets' verb listings and, +apart from that, is entirely undocumented. + +This particular register, exposed at coefficient 0x36 and named in commits from +Realtek, is of note: unlike most registers, which seem to control detailed +amplifier parameters not in scope of the HDA specification, it controls audio +routing which could just as easily have been defined using standard HDA mixer +and selector widgets. + +Specifically, it selects between two sources for the input pin widget with Node +ID (NID) 1Ah: the widget's signal can come either from an audio jack (on my +laptop, a Dell XPS 13 9350, it's the headphone jack, but comments in Realtek +commits indicate that it might be a Line In on some machines) or from the PC +Beep line (which is itself multiplexed between the codec's internal beep +generator and external PCBEEP pin, depending on if the beep generator is +enabled via verbs on NID 01h). Additionally, it can mix (with optional +amplification) that signal onto the 21h and/or 14h output pins. + +The register's reset value is 0x3717, corresponding to PC Beep on 1Ah that is +then amplified and mixed into both the headphones and the speakers. Not only +does this violate the HDA specification, which says that "[a vendor defined +beep input pin] connection may be maintained *only* while the Link reset +(**RST#**) is asserted", it means that we cannot ignore the register if we care +about the input that 1Ah would otherwise expose or if the PCBEEP trace is +poorly shielded and picks up chassis noise (both of which are the case on my +machine). + +Unfortunately, there are lots of ways to get this register configuration wrong. +Linux, it seems, has gone through most of them. For one, the register resets +after S3 suspend: judging by existing code, this isn't the case for all vendor +registers, and it's led to some fixes that improve behavior on cold boot but +don't last after suspend. Other fixes have successfully switched the 1Ah input +away from PC Beep but have failed to disable both loopback paths. On my +machine, this means that the headphone input is amplified and looped back to +the headphone output, which uses the exact same pins! As you might expect, this +causes terrible headphone noise, the character of which is controlled by the +1Ah boost control. (If you've seen instructions online to fix XPS 13 headphone +noise by changing "Headphone Mic Boost" in ALSA, now you know why.) + +The information here has been obtained through black-box reverse engineering of +the ALC256 codec's behavior and is not guaranteed to be correct. It likely +also applies for the ALC255, ALC257, ALC235, and ALC236, since those codecs +seem to be close relatives of the ALC256. (They all share one initialization +function.) Additionally, other codecs like the ALC225 and ALC285 also have this +register, judging by existing fixups in ``patch_realtek.c``, but specific +data (e.g. node IDs, bit positions, pin mappings) for those codecs may differ +from what I've described here. diff --git a/Documentation/sound/soc/codec-to-codec.rst b/Documentation/sound/soc/codec-to-codec.rst index 810109d7500d..4eaa9a0c41fc 100644 --- a/Documentation/sound/soc/codec-to-codec.rst +++ b/Documentation/sound/soc/codec-to-codec.rst @@ -104,5 +104,10 @@ Make sure to name your corresponding cpu and codec playback and capture dai names ending with "Playback" and "Capture" respectively as dapm core will link and power those dais based on the name. -Note that in current device tree there is no way to mark a dai_link -as codec to codec. However, it may change in future. +A dai_link in a "simple-audio-card" will automatically be detected as +codec to codec when all DAIs on the link belong to codec components. +The dai_link will be initialized with the subset of stream parameters +(channels, format, sample rate) supported by all DAIs on the link. Since +there is no way to provide these parameters in the device tree, this is +mostly useful for communication with simple fixed-function codecs, such +as a Bluetooth controller or cellular modem. diff --git a/Documentation/target/tcmu-design.rst b/Documentation/target/tcmu-design.rst index a7b426707bf6..e47047e32e27 100644 --- a/Documentation/target/tcmu-design.rst +++ b/Documentation/target/tcmu-design.rst @@ -5,7 +5,7 @@ TCM Userspace Design .. Contents: - 1) TCM Userspace Design + 1) Design a) Background b) Benefits c) Design constraints @@ -23,8 +23,8 @@ TCM Userspace Design 3) A final note -TCM Userspace Design -==================== +Design +====== TCM is another name for LIO, an in-kernel iSCSI target (server). Existing TCM targets run in the kernel. TCMU (TCM in Userspace) diff --git a/Documentation/trace/coresight/coresight-ect.rst b/Documentation/trace/coresight/coresight-ect.rst new file mode 100644 index 000000000000..ecc1e57012ef --- /dev/null +++ b/Documentation/trace/coresight/coresight-ect.rst @@ -0,0 +1,222 @@ +.. SPDX-License-Identifier: GPL-2.0 +============================================= +CoreSight Embedded Cross Trigger (CTI & CTM). +============================================= + + :Author: Mike Leach <mike.leach@linaro.org> + :Date: November 2019 + +Hardware Description +-------------------- + +The CoreSight Cross Trigger Interface (CTI) is a hardware device that takes +individual input and output hardware signals known as triggers to and from +devices and interconnects them via the Cross Trigger Matrix (CTM) to other +devices via numbered channels, in order to propagate events between devices. + +e.g.:: + + 0000000 in_trigs ::::::: + 0 C 0----------->: : +======>(other CTI channel IO) + 0 P 0<-----------: : v + 0 U 0 out_trigs : : Channels ***** ::::::: + 0000000 : CTI :<=========>*CTM*<====>: CTI :---+ + ####### in_trigs : : (id 0-3) ***** ::::::: v + # ETM #----------->: : ^ ####### + # #<-----------: : +---# ETR # + ####### out_trigs ::::::: ####### + +The CTI driver enables the programming of the CTI to attach triggers to +channels. When an input trigger becomes active, the attached channel will +become active. Any output trigger attached to that channel will also +become active. The active channel is propagated to other CTIs via the CTM, +activating connected output triggers there, unless filtered by the CTI +channel gate. + +It is also possible to activate a channel using system software directly +programming registers in the CTI. + +The CTIs are registered by the system to be associated with CPUs and/or other +CoreSight devices on the trace data path. When these devices are enabled the +attached CTIs will also be enabled. By default/on power up the CTIs have +no programmed trigger/channel attachments, so will not affect the system +until explicitly programmed. + +The hardware trigger connections between CTIs and devices is implementation +defined, unless the CPU/ETM combination is a v8 architecture, in which case +the connections have an architecturally defined standard layout. + +The hardware trigger signals can also be connected to non-CoreSight devices +(e.g. UART), or be propagated off chip as hardware IO lines. + +All the CTI devices are associated with a CTM. On many systems there will be a +single effective CTM (one CTM, or multiple CTMs all interconnected), but it is +possible that systems can have nets of CTIs+CTM that are not interconnected by +a CTM to each other. On these systems a CTM index is declared to associate +CTI devices that are interconnected via a given CTM. + +Sysfs files and directories +--------------------------- + +The CTI devices appear on the existing CoreSight bus alongside the other +CoreSight devices:: + + >$ ls /sys/bus/coresight/devices + cti_cpu0 cti_cpu2 cti_sys0 etm0 etm2 funnel0 replicator0 tmc_etr0 + cti_cpu1 cti_cpu3 cti_sys1 etm1 etm3 funnel1 tmc_etf0 tpiu0 + +The ``cti_cpu<N>`` named CTIs are associated with a CPU, and any ETM used by +that core. The ``cti_sys<N>`` CTIs are general system infrastructure CTIs that +can be associated with other CoreSight devices, or other system hardware +capable of generating or using trigger signals.:: + + >$ ls /sys/bus/coresight/devices/etm0/cti_cpu0 + channels ctmid enable nr_trigger_cons mgmt power powered regs + subsystem triggers0 triggers1 uevent + +*Key file items are:-* + * ``enable``: enables/disables the CTI. Read to determine current state. + If this shows as enabled (1), but ``powered`` shows unpowered (0), then + the enable indicates a request to enabled when the device is powered. + * ``ctmid`` : associated CTM - only relevant if system has multiple CTI+CTM + clusters that are not interconnected. + * ``nr_trigger_cons`` : total connections - triggers<N> directories. + * ``powered`` : Read to determine if the CTI is currently powered. + +*Sub-directories:-* + * ``triggers<N>``: contains list of triggers for an individual connection. + * ``channels``: Contains the channel API - CTI main programming interface. + * ``regs``: Gives access to the raw programmable CTI regs. + * ``mgmt``: the standard CoreSight management registers. + + +triggers<N> directories +~~~~~~~~~~~~~~~~~~~~~~~ + +Individual trigger connection information. This describes trigger signals for +CoreSight and non-CoreSight connections. + +Each triggers directory has a set of parameters describing the triggers for +the connection. + + * ``name`` : name of connection + * ``in_signals`` : input trigger signal indexes used in this connection. + * ``in_types`` : functional types for in signals. + * ``out_signals`` : output trigger signals for this connection. + * ``out_types`` : functional types for out signals. + +e.g:: + + >$ ls ./cti_cpu0/triggers0/ + in_signals in_types name out_signals out_types + >$ cat ./cti_cpu0/triggers0/name + cpu0 + >$ cat ./cti_cpu0/triggers0/out_signals + 0-2 + >$ cat ./cti_cpu0/triggers0/out_types + pe_edbgreq pe_dbgrestart pe_ctiirq + >$ cat ./cti_cpu0/triggers0/in_signals + 0-1 + >$ cat ./cti_cpu0/triggers0/in_types + pe_dbgtrigger pe_pmuirq + +If a connection has zero signals in either the 'in' or 'out' triggers then +those parameters will be omitted. + +Channels API Directory +~~~~~~~~~~~~~~~~~~~~~~ + +This provides an easy way to attach triggers to channels, without needing +the multiple register operations that are required if manipulating the +'regs' sub-directory elements directly. + +A number of files provide this API:: + + >$ ls ./cti_sys0/channels/ + chan_clear chan_inuse chan_xtrigs_out trigin_attach + chan_free chan_pulse chan_xtrigs_reset trigin_detach + chan_gate_disable chan_set chan_xtrigs_sel trigout_attach + chan_gate_enable chan_xtrigs_in trig_filter_enable trigout_detach + trigout_filtered + +Most access to these elements take the form:: + + echo <chan> [<trigger>] > /<device_path>/<operation> + +where the optional <trigger> is only needed for trigXX_attach | detach +operations. + +e.g.:: + + >$ echo 0 1 > ./cti_sys0/channels/trigout_attach + >$ echo 0 > ./cti_sys0/channels/chan_set + +Attaches trigout(1) to channel(0), then activates channel(0) generating a +set state on cti_sys0.trigout(1) + + +*API operations* + + * ``trigin_attach, trigout_attach``: Attach a channel to a trigger signal. + * ``trigin_detach, trigout_detach``: Detach a channel from a trigger signal. + * ``chan_set``: Set the channel - the set state will be propagated around + the CTM to other connected devices. + * ``chan_clear``: Clear the channel. + * ``chan_pulse``: Set the channel for a single CoreSight clock cycle. + * ``chan_gate_enable``: Write operation sets the CTI gate to propagate + (enable) the channel to other devices. This operation takes a channel + number. CTI gate is enabled for all channels by default at power up. Read + to list the currently enabled channels on the gate. + * ``chan_gate_disable``: Write channel number to disable gate for that + channel. + * ``chan_inuse``: Show the current channels attached to any signal + * ``chan_free``: Show channels with no attached signals. + * ``chan_xtrigs_sel``: write a channel number to select a channel to view, + read to show the selected channel number. + * ``chan_xtrigs_in``: Read to show the input triggers attached to + the selected view channel. + * ``chan_xtrigs_out``:Read to show the output triggers attached to + the selected view channel. + * ``trig_filter_enable``: Defaults to enabled, disable to allow potentially + dangerous output signals to be set. + * ``trigout_filtered``: Trigger out signals that are prevented from being + set if filtering ``trig_filter_enable`` is enabled. One use is to prevent + accidental ``EDBGREQ`` signals stopping a core. + * ``chan_xtrigs_reset``: Write 1 to clear all channel / trigger programming. + Resets device hardware to default state. + + +The example below attaches input trigger index 1 to channel 2, and output +trigger index 6 to the same channel. It then examines the state of the +channel / trigger connections using the appropriate sysfs attributes. + +The settings mean that if either input trigger 1, or channel 2 go active then +trigger out 6 will go active. We then enable the CTI, and use the software +channel control to activate channel 2. We see the active channel on the +``choutstatus`` register and the active signal on the ``trigoutstatus`` +register. Finally clearing the channel removes this. + +e.g.:: + + .../cti_sys0/channels# echo 2 1 > trigin_attach + .../cti_sys0/channels# echo 2 6 > trigout_attach + .../cti_sys0/channels# cat chan_free + 0-1,3 + .../cti_sys0/channels# cat chan_inuse + 2 + .../cti_sys0/channels# echo 2 > chan_xtrigs_sel + .../cti_sys0/channels# cat chan_xtrigs_trigin + 1 + .../cti_sys0/channels# cat chan_xtrigs_trigout + 6 + .../cti_sys0/# echo 1 > enable + .../cti_sys0/channels# echo 2 > chan_set + .../cti_sys0/channels# cat ../regs/choutstatus + 0x4 + .../cti_sys0/channels# cat ../regs/trigoutstatus + 0x40 + .../cti_sys0/channels# echo 2 > chan_clear + .../cti_sys0/channels# cat ../regs/trigoutstatus + 0x0 + .../cti_sys0/channels# cat ../regs/choutstatus + 0x0 diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst index a566719f8e7e..108600ee1e12 100644 --- a/Documentation/trace/coresight/coresight.rst +++ b/Documentation/trace/coresight/coresight.rst @@ -491,8 +491,21 @@ interface provided for that purpose by the generic STM API:: Details on how to use the generic STM API can be found here:- :doc:`../stm` [#second]_. +The CTI & CTM Modules +--------------------- + +The CTI (Cross Trigger Interface) provides a set of trigger signals between +individual CTIs and components, and can propagate these between all CTIs via +channels on the CTM (Cross Trigger Matrix). + +A separate documentation file is provided to explain the use of these devices. +(:doc:`coresight-ect`) [#fourth]_. + + .. [#first] Documentation/ABI/testing/sysfs-bus-coresight-devices-stm .. [#second] Documentation/trace/stm.rst .. [#third] https://github.com/Linaro/perf-opencsd + +.. [#fourth] Documentation/trace/coresight/coresight-ect.rst diff --git a/Documentation/trace/events-power.rst b/Documentation/trace/events-power.rst index 2ef318962e29..f45bf11fa88d 100644 --- a/Documentation/trace/events-power.rst +++ b/Documentation/trace/events-power.rst @@ -75,16 +75,6 @@ The PM QoS events are used for QoS add/update/remove request and for target/flags update. :: - pm_qos_add_request "pm_qos_class=%s value=%d" - pm_qos_update_request "pm_qos_class=%s value=%d" - pm_qos_remove_request "pm_qos_class=%s value=%d" - pm_qos_update_request_timeout "pm_qos_class=%s value=%d, timeout_us=%ld" - -The first parameter gives the QoS class name (e.g. "CPU_DMA_LATENCY"). -The second parameter is value to be added/updated/removed. -The third parameter is timeout value in usec. -:: - pm_qos_update_target "action=%s prev_value=%d curr_value=%d" pm_qos_update_flags "action=%s prev_value=0x%x curr_value=0x%x" @@ -92,7 +82,7 @@ The first parameter gives the QoS action name (e.g. "ADD_REQ"). The second parameter is the previous QoS value. The third parameter is the current QoS value to update. -And, there are also events used for device PM QoS add/update/remove request. +There are also events used for device PM QoS add/update/remove request. :: dev_pm_qos_add_request "device=%s type=%s new_value=%d" @@ -103,3 +93,12 @@ The first parameter gives the device name which tries to add/update/remove QoS requests. The second parameter gives the request type (e.g. "DEV_PM_QOS_RESUME_LATENCY"). The third parameter is value to be added/updated/removed. + +And, there are events used for CPU latency QoS add/update/remove request. +:: + + pm_qos_add_request "value=%d" + pm_qos_update_request "value=%d" + pm_qos_remove_request "value=%d" + +The parameter is the value to be added/updated/removed. diff --git a/Documentation/trace/events.rst b/Documentation/trace/events.rst index ed79b220bd07..4a2ebe0bd19b 100644 --- a/Documentation/trace/events.rst +++ b/Documentation/trace/events.rst @@ -342,7 +342,8 @@ section of Documentation/trace/ftrace.rst), but there are major differences and the implementation isn't currently tied to it in any way, so beware about making generalizations between the two. -Note: Writing into trace_marker (See Documentation/trace/ftrace.rst) +.. Note:: + Writing into trace_marker (See Documentation/trace/ftrace.rst) can also enable triggers that are written into /sys/kernel/tracing/events/ftrace/print/trigger @@ -569,14 +570,14 @@ The first creates the event in one step, using synth_event_create(). In this method, the name of the event to create and an array defining the fields is supplied to synth_event_create(). If successful, a synthetic event with that name and fields will exist following that -call. For example, to create a new "schedtest" synthetic event: +call. For example, to create a new "schedtest" synthetic event:: ret = synth_event_create("schedtest", sched_fields, ARRAY_SIZE(sched_fields), THIS_MODULE); The sched_fields param in this example points to an array of struct synth_field_desc, each of which describes an event field by type and -name: +name:: static struct synth_field_desc sched_fields[] = { { .type = "pid_t", .name = "next_pid_field" }, @@ -615,7 +616,7 @@ synth_event_gen_cmd_array_start(), the user should create and initialize a dynevent_cmd object using synth_event_cmd_init(). For example, to create a new "schedtest" synthetic event with two -fields: +fields:: struct dynevent_cmd cmd; char *buf; @@ -631,7 +632,7 @@ fields: "u64", "ts_ns"); Alternatively, using an array of struct synth_field_desc fields -containing the same information: +containing the same information:: ret = synth_event_gen_cmd_array_start(&cmd, "schedtest", THIS_MODULE, fields, n_fields); @@ -640,7 +641,7 @@ Once the synthetic event object has been created, it can then be populated with more fields. Fields are added one by one using synth_event_add_field(), supplying the dynevent_cmd object, a field type, and a field name. For example, to add a new int field named -"intfield", the following call should be made: +"intfield", the following call should be made:: ret = synth_event_add_field(&cmd, "int", "intfield"); @@ -649,7 +650,7 @@ the field is considered to be an array. A group of fields can also be added all at once using an array of synth_field_desc with add_synth_fields(). For example, this would add -just the first four sched_fields: +just the first four sched_fields:: ret = synth_event_add_fields(&cmd, sched_fields, 4); @@ -658,7 +659,7 @@ synth_event_add_field_str() can be used to add it as-is; it will also automatically append a ';' to the string. Once all the fields have been added, the event should be finalized and -registered by calling the synth_event_gen_cmd_end() function: +registered by calling the synth_event_gen_cmd_end() function:: ret = synth_event_gen_cmd_end(&cmd); @@ -691,7 +692,7 @@ trace array)), along with an variable number of u64 args, one for each synthetic event field, and the number of values being passed. So, to trace an event corresponding to the synthetic event definition -above, code like the following could be used: +above, code like the following could be used:: ret = synth_event_trace(create_synth_test, 7, /* number of values */ 444, /* next_pid_field */ @@ -715,7 +716,7 @@ trace array)), along with an array of u64, one for each synthetic event field. To trace an event corresponding to the synthetic event definition -above, code like the following could be used: +above, code like the following could be used:: u64 vals[7]; @@ -739,7 +740,7 @@ In order to trace a synthetic event, a pointer to the trace event file is needed. The trace_get_event_file() function can be used to get it - it will find the file in the given trace instance (in this case NULL since the top trace array is being used) while at the same time -preventing the instance containing it from going away: +preventing the instance containing it from going away:: schedtest_event_file = trace_get_event_file(NULL, "synthetic", "schedtest"); @@ -751,31 +752,31 @@ To enable a synthetic event from the kernel, trace_array_set_clr_event() can be used (which is not specific to synthetic events, so does need the "synthetic" system name to be specified explicitly). -To enable the event, pass 'true' to it: +To enable the event, pass 'true' to it:: trace_array_set_clr_event(schedtest_event_file->tr, "synthetic", "schedtest", true); -To disable it pass false: +To disable it pass false:: trace_array_set_clr_event(schedtest_event_file->tr, "synthetic", "schedtest", false); Finally, synth_event_trace_array() can be used to actually trace the -event, which should be visible in the trace buffer afterwards: +event, which should be visible in the trace buffer afterwards:: ret = synth_event_trace_array(schedtest_event_file, vals, ARRAY_SIZE(vals)); To remove the synthetic event, the event should be disabled, and the -trace instance should be 'put' back using trace_put_event_file(): +trace instance should be 'put' back using trace_put_event_file():: trace_array_set_clr_event(schedtest_event_file->tr, "synthetic", "schedtest", false); trace_put_event_file(schedtest_event_file); If those have been successful, synth_event_delete() can be called to -remove the event: +remove the event:: ret = synth_event_delete("schedtest"); @@ -784,7 +785,7 @@ remove the event: To trace a synthetic using the piecewise method described above, the synth_event_trace_start() function is used to 'open' the synthetic -event trace: +event trace:: struct synth_trace_state trace_state; @@ -809,7 +810,7 @@ along with the value to set the next field in the event. After each field is set, the 'cursor' points to the next field, which will be set by the subsequent call, continuing until all the fields have been set in order. The same sequence of calls as in the above examples using -this method would be (without error-handling code): +this method would be (without error-handling code):: /* next_pid_field */ ret = synth_event_add_next_val(777, &trace_state); @@ -837,7 +838,7 @@ used. Each call is passed the same synth_trace_state object used in the synth_event_trace_start(), along with the field name of the field to set and the value to set it to. The same sequence of calls as in the above examples using this method would be (without error-handling -code): +code):: ret = synth_event_add_val("next_pid_field", 777, &trace_state); ret = synth_event_add_val("next_comm_field", (u64)"silly putty", @@ -855,7 +856,7 @@ can be used but not both at the same time. Finally, the event won't be actually traced until it's 'closed', which is done using synth_event_trace_end(), which takes only the -struct synth_trace_state object used in the previous calls: +struct synth_trace_state object used in the previous calls:: ret = synth_event_trace_end(&trace_state); @@ -878,7 +879,7 @@ function. Before calling kprobe_event_gen_cmd_start(), the user should create and initialize a dynevent_cmd object using kprobe_event_cmd_init(). -For example, to create a new "schedtest" kprobe event with two fields: +For example, to create a new "schedtest" kprobe event with two fields:: struct dynevent_cmd cmd; char *buf; @@ -900,18 +901,18 @@ Once the kprobe event object has been created, it can then be populated with more fields. Fields can be added using kprobe_event_add_fields(), supplying the dynevent_cmd object along with a variable arg list of probe fields. For example, to add a -couple additional fields, the following call could be made: +couple additional fields, the following call could be made:: ret = kprobe_event_add_fields(&cmd, "flags=%cx", "mode=+4($stack)"); Once all the fields have been added, the event should be finalized and registered by calling the kprobe_event_gen_cmd_end() or kretprobe_event_gen_cmd_end() functions, depending on whether a kprobe -or kretprobe command was started: +or kretprobe command was started:: ret = kprobe_event_gen_cmd_end(&cmd); -or +or:: ret = kretprobe_event_gen_cmd_end(&cmd); @@ -920,13 +921,13 @@ events. Similarly, a kretprobe event can be created using kretprobe_event_gen_cmd_start() with a probe name and location and -additional params such as $retval: +additional params such as $retval:: ret = kretprobe_event_gen_cmd_start(&cmd, "gen_kretprobe_test", "do_sys_open", "$retval"); Similar to the synthetic event case, code like the following can be -used to enable the newly created kprobe event: +used to enable the newly created kprobe event:: gen_kprobe_test = trace_get_event_file(NULL, "kprobes", "gen_kprobe_test"); @@ -934,7 +935,7 @@ used to enable the newly created kprobe event: "kprobes", "gen_kprobe_test", true); Finally, also similar to synthetic events, the following code can be -used to give the kprobe event file back and delete the event: +used to give the kprobe event file back and delete the event:: trace_put_event_file(gen_kprobe_test); @@ -963,7 +964,7 @@ are described below. The first step in building a new command string is to create and initialize an instance of a dynevent_cmd. Here, for instance, we -create a dynevent_cmd on the stack and initialize it: +create a dynevent_cmd on the stack and initialize it:: struct dynevent_cmd cmd; char *buf; @@ -989,7 +990,7 @@ calls to argument-adding functions. To add a single argument, define and initialize a struct dynevent_arg or struct dynevent_arg_pair object. Here's an example of the simplest possible arg addition, which is simply to append the given string as -a whitespace-separated argument to the command: +a whitespace-separated argument to the command:: struct dynevent_arg arg; @@ -1007,7 +1008,7 @@ the arg. Here's another more complicated example using an 'arg pair', which is used to create an argument that consists of a couple components added together as a unit, for example, a 'type field_name;' arg or a simple -expression arg e.g. 'flags=%cx': +expression arg e.g. 'flags=%cx':: struct dynevent_arg_pair arg_pair; @@ -1031,7 +1032,7 @@ Any number of dynevent_*_add() calls can be made to build up the string (until its length surpasses cmd->maxlen). When all the arguments have been added and the command string is complete, the only thing left to do is run the command, which happens by simply calling -dynevent_create(): +dynevent_create():: ret = dynevent_create(&cmd); diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst index ff658e27d25b..3b5614b1d1a5 100644 --- a/Documentation/trace/ftrace.rst +++ b/Documentation/trace/ftrace.rst @@ -125,10 +125,13 @@ of ftrace. Here is a list of some of the key files: trace: This file holds the output of the trace in a human - readable format (described below). Note, tracing is temporarily - disabled when the file is open for reading. Once all readers - are closed, tracing is re-enabled. Opening this file for + readable format (described below). Opening this file for writing with the O_TRUNC flag clears the ring buffer content. + Note, this file is not a consumer. If tracing is off + (no tracer running, or tracing_on is zero), it will produce + the same output each time it is read. When tracing is on, + it may produce inconsistent results as it tries to read + the entire buffer without consuming it. trace_pipe: @@ -142,9 +145,7 @@ of ftrace. Here is a list of some of the key files: will not be read again with a sequential read. The "trace" file is static, and if the tracer is not adding more data, it will display the same - information every time it is read. Unlike the - "trace" file, opening this file for reading will not - temporarily disable tracing. + information every time it is read. trace_options: @@ -262,6 +263,20 @@ of ftrace. Here is a list of some of the key files: traced by the function tracer as well. This option will also cause PIDs of tasks that exit to be removed from the file. + set_ftrace_notrace_pid: + + Have the function tracer ignore threads whose PID are listed in + this file. + + If the "function-fork" option is set, then when a task whose + PID is listed in this file forks, the child's PID will + automatically be added to this file, and the child will not be + traced by the function tracer as well. This option will also + cause PIDs of tasks that exit to be removed from the file. + + If a PID is in both this file and "set_ftrace_pid", then this + file takes precedence, and the thread will not be traced. + set_event_pid: Have the events only trace a task with a PID listed in this file. @@ -273,6 +288,19 @@ of ftrace. Here is a list of some of the key files: cause the PIDs of tasks to be removed from this file when the task exits. + set_event_notrace_pid: + + Have the events not trace a task with a PID listed in this file. + Note, sched_switch and sched_wakeup will trace threads not listed + in this file, even if a thread's PID is in the file if the + sched_switch or sched_wakeup events also trace a thread that should + be traced. + + To have the PIDs of children of tasks with their PID in this file + added on fork, enable the "event-fork" option. That option will also + cause the PIDs of tasks to be removed from this file when the task + exits. + set_graph_function: Functions listed in this file will cause the function graph @@ -1125,6 +1153,12 @@ Here are the available options: the trace displays additional information about the latency, as described in "Latency trace format". + pause-on-trace + When set, opening the trace file for read, will pause + writing to the ring buffer (as if tracing_on was set to zero). + This simulates the original behavior of the trace file. + When the file is closed, tracing will be enabled again. + record-cmd When any event or tracer is enabled, a hook is enabled in the sched_switch trace point to fill comm cache @@ -1176,6 +1210,8 @@ Here are the available options: tasks fork. Also, when tasks with PIDs in set_event_pid exit, their PIDs will be removed from the file. + This affects PIDs listed in set_event_notrace_pid as well. + function-trace The latency tracers will enable function tracing if this option is enabled (default it is). When @@ -1190,6 +1226,8 @@ Here are the available options: set_ftrace_pid exit, their PIDs will be removed from the file. + This affects PIDs in set_ftrace_notrace_pid as well. + display-graph When set, the latency tracers (irqsoff, wakeup, etc) will use function graph tracing instead of function tracing. @@ -2126,6 +2164,8 @@ periodically make a CPU constantly busy with interrupts disabled. # cat trace # tracer: hwlat # + # entries-in-buffer/entries-written: 13/13 #P:8 + # # _-----=> irqs-off # / _----=> need-resched # | / _---=> hardirq/softirq @@ -2133,12 +2173,18 @@ periodically make a CPU constantly busy with interrupts disabled. # ||| / delay # TASK-PID CPU# |||| TIMESTAMP FUNCTION # | | | |||| | | - <...>-3638 [001] d... 19452.055471: #1 inner/outer(us): 12/14 ts:1499801089.066141940 - <...>-3638 [003] d... 19454.071354: #2 inner/outer(us): 11/9 ts:1499801091.082164365 - <...>-3638 [002] dn.. 19461.126852: #3 inner/outer(us): 12/9 ts:1499801098.138150062 - <...>-3638 [001] d... 19488.340960: #4 inner/outer(us): 8/12 ts:1499801125.354139633 - <...>-3638 [003] d... 19494.388553: #5 inner/outer(us): 8/12 ts:1499801131.402150961 - <...>-3638 [003] d... 19501.283419: #6 inner/outer(us): 0/12 ts:1499801138.297435289 nmi-total:4 nmi-count:1 + <...>-1729 [001] d... 678.473449: #1 inner/outer(us): 11/12 ts:1581527483.343962693 count:6 + <...>-1729 [004] d... 689.556542: #2 inner/outer(us): 16/9 ts:1581527494.889008092 count:1 + <...>-1729 [005] d... 714.756290: #3 inner/outer(us): 16/16 ts:1581527519.678961629 count:5 + <...>-1729 [001] d... 718.788247: #4 inner/outer(us): 9/17 ts:1581527523.889012713 count:1 + <...>-1729 [002] d... 719.796341: #5 inner/outer(us): 13/9 ts:1581527524.912872606 count:1 + <...>-1729 [006] d... 844.787091: #6 inner/outer(us): 9/12 ts:1581527649.889048502 count:2 + <...>-1729 [003] d... 849.827033: #7 inner/outer(us): 18/9 ts:1581527654.889013793 count:1 + <...>-1729 [007] d... 853.859002: #8 inner/outer(us): 9/12 ts:1581527658.889065736 count:1 + <...>-1729 [001] d... 855.874978: #9 inner/outer(us): 9/11 ts:1581527660.861991877 count:1 + <...>-1729 [001] d... 863.938932: #10 inner/outer(us): 9/11 ts:1581527668.970010500 count:1 nmi-total:7 nmi-count:1 + <...>-1729 [007] d... 878.050780: #11 inner/outer(us): 9/12 ts:1581527683.385002600 count:1 nmi-total:5 nmi-count:1 + <...>-1729 [007] d... 886.114702: #12 inner/outer(us): 9/12 ts:1581527691.385001600 count:1 The above output is somewhat the same in the header. All events will have @@ -2148,7 +2194,7 @@ interrupts disabled 'd'. Under the FUNCTION title there is: This is the count of events recorded that were greater than the tracing_threshold (See below). - inner/outer(us): 12/14 + inner/outer(us): 11/11 This shows two numbers as "inner latency" and "outer latency". The test runs in a loop checking a timestamp twice. The latency detected within @@ -2156,11 +2202,15 @@ interrupts disabled 'd'. Under the FUNCTION title there is: after the previous timestamp and the next timestamp in the loop is the "outer latency". - ts:1499801089.066141940 + ts:1581527483.343962693 + + The absolute timestamp that the first latency was recorded in the window. + + count:6 - The absolute timestamp that the event happened. + The number of times a latency was detected during the window. - nmi-total:4 nmi-count:1 + nmi-total:7 nmi-count:1 On architectures that support it, if an NMI comes in during the test, the time spent in NMI is reported in "nmi-total" (in diff --git a/Documentation/translations/it_IT/networking/netdev-FAQ.rst b/Documentation/translations/it_IT/networking/netdev-FAQ.rst index 8489ead7cff1..7e2456bb7d92 100644 --- a/Documentation/translations/it_IT/networking/netdev-FAQ.rst +++ b/Documentation/translations/it_IT/networking/netdev-FAQ.rst @@ -1,6 +1,6 @@ .. include:: ../disclaimer-ita.rst -:Original: :ref:`Documentation/process/stable-kernel-rules.rst <stable_kernel_rules>` +:Original: :ref:`Documentation/networking/netdev-FAQ.rst <netdev-FAQ>` .. _it_netdev-FAQ: diff --git a/Documentation/translations/it_IT/process/programming-language.rst b/Documentation/translations/it_IT/process/programming-language.rst index f4b006395849..c4fc9d394c29 100644 --- a/Documentation/translations/it_IT/process/programming-language.rst +++ b/Documentation/translations/it_IT/process/programming-language.rst @@ -8,26 +8,26 @@ Linguaggio di programmazione ============================ -Il kernel è scritto nel linguaggio di programmazione C [c-language]_. -Più precisamente, il kernel viene compilato con ``gcc`` [gcc]_ usando -l'opzione ``-std=gnu89`` [gcc-c-dialect-options]_: il dialetto GNU +Il kernel è scritto nel linguaggio di programmazione C [it-c-language]_. +Più precisamente, il kernel viene compilato con ``gcc`` [it-gcc]_ usando +l'opzione ``-std=gnu89`` [it-gcc-c-dialect-options]_: il dialetto GNU dello standard ISO C90 (con l'aggiunta di alcune funzionalità da C99) -Questo dialetto contiene diverse estensioni al linguaggio [gnu-extensions]_, +Questo dialetto contiene diverse estensioni al linguaggio [it-gnu-extensions]_, e molte di queste vengono usate sistematicamente dal kernel. Il kernel offre un certo livello di supporto per la compilazione con ``clang`` -[clang]_ e ``icc`` [icc]_ su diverse architetture, tuttavia in questo momento +[it-clang]_ e ``icc`` [it-icc]_ su diverse architetture, tuttavia in questo momento il supporto non è completo e richiede delle patch aggiuntive. Attributi --------- Una delle estensioni più comuni e usate nel kernel sono gli attributi -[gcc-attribute-syntax]_. Gli attributi permettono di aggiungere una semantica, +[it-gcc-attribute-syntax]_. Gli attributi permettono di aggiungere una semantica, definita dell'implementazione, alle entità del linguaggio (come le variabili, le funzioni o i tipi) senza dover fare importanti modifiche sintattiche al -linguaggio stesso (come l'aggiunta di nuove parole chiave) [n2049]_. +linguaggio stesso (come l'aggiunta di nuove parole chiave) [it-n2049]_. In alcuni casi, gli attributi sono opzionali (ovvero un compilatore che non dovesse supportarli dovrebbe produrre comunque codice corretto, anche se @@ -41,11 +41,11 @@ possono usare e/o per accorciare il codice. Per maggiori informazioni consultate il file d'intestazione ``include/linux/compiler_attributes.h``. -.. [c-language] http://www.open-std.org/jtc1/sc22/wg14/www/standards -.. [gcc] https://gcc.gnu.org -.. [clang] https://clang.llvm.org -.. [icc] https://software.intel.com/en-us/c-compilers -.. [gcc-c-dialect-options] https://gcc.gnu.org/onlinedocs/gcc/C-Dialect-Options.html -.. [gnu-extensions] https://gcc.gnu.org/onlinedocs/gcc/C-Extensions.html -.. [gcc-attribute-syntax] https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html -.. [n2049] http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2049.pdf +.. [it-c-language] http://www.open-std.org/jtc1/sc22/wg14/www/standards +.. [it-gcc] https://gcc.gnu.org +.. [it-clang] https://clang.llvm.org +.. [it-icc] https://software.intel.com/en-us/c-compilers +.. [it-gcc-c-dialect-options] https://gcc.gnu.org/onlinedocs/gcc/C-Dialect-Options.html +.. [it-gnu-extensions] https://gcc.gnu.org/onlinedocs/gcc/C-Extensions.html +.. [it-gcc-attribute-syntax] https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html +.. [it-n2049] http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2049.pdf diff --git a/Documentation/translations/zh_CN/filesystems/index.rst b/Documentation/translations/zh_CN/filesystems/index.rst new file mode 100644 index 000000000000..14f155edaf69 --- /dev/null +++ b/Documentation/translations/zh_CN/filesystems/index.rst @@ -0,0 +1,27 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: :ref:`Documentation/filesystems/index.rst <filesystems_index>` +:Translator: Wang Wenhu <wenhu.wang@vivo.com> + +.. _cn_filesystems_index: + +======================== +Linux Kernel中的文件系统 +======================== + +这份正在开发的手册或许在未来某个辉煌的日子里以易懂的形式将Linux虚拟\ +文件系统（VFS）层以及基于其上的各种文件系统如何工作呈现给大家。当前\ +可以看到下面的内容。 + +文件系统 +======== + +文件系统实现文档。 + +.. toctree:: + :maxdepth: 2 + + virtiofs + diff --git a/Documentation/translations/zh_CN/filesystems/virtiofs.rst b/Documentation/translations/zh_CN/filesystems/virtiofs.rst new file mode 100644 index 000000000000..09bc9e012e2a --- /dev/null +++ b/Documentation/translations/zh_CN/filesystems/virtiofs.rst @@ -0,0 +1,58 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: :ref:`Documentation/filesystems/virtiofs.rst <virtiofs_index>` + +译者 +:: + + 中文版维护者： 王文虎 Wang Wenhu <wenhu.wang@vivo.com> + 中文版翻译者： 王文虎 Wang Wenhu <wenhu.wang@vivo.com> + 中文版校译者： 王文虎 Wang Wenhu <wenhu.wang@vivo.com> + +=========================================== +virtiofs: virtio-fs 主机<->客机共享文件系统 +=========================================== + +- Copyright (C) 2020 Vivo Communication Technology Co. Ltd. + +介绍 +==== +Linux的virtiofs文件系统实现了一个半虚拟化VIRTIO类型“virtio-fs”设备的驱动，通过该\ +类型设备实现客机<->主机文件系统共享。它允许客机挂载一个已经导出到主机的目录。 + +客机通常需要访问主机或者远程系统上的文件。使用场景包括：在新客机安装时让文件对其\ +可见；从主机上的根文件系统启动；对无状态或临时客机提供持久存储和在客机之间共享目录。 + +尽管在某些任务可能通过使用已有的网络文件系统完成，但是却需要非常难以自动化的配置\ +步骤，且将存储网络暴露给客机。而virtio-fs设备通过提供不经过网络的文件系统访问文件\ +的设计方式解决了这些问题。 + +另外，virto-fs设备发挥了主客机共存的优点提高了性能，并且提供了网络文件系统所不具备 +的一些语义功能。 + +用法 +==== +以``myfs``标签将文件系统挂载到``/mnt``: + +.. code-block:: sh + + guest# mount -t virtiofs myfs /mnt + +请查阅 https://virtio-fs.gitlab.io/ 了解配置QEMU和virtiofsd守护程序的详细信息。 + +内幕 +==== +由于virtio-fs设备将FUSE协议用于文件系统请求，因此Linux的virtiofs文件系统与FUSE文\ +件系统客户端紧密集成在一起。客机充当FUSE客户端而主机充当FUSE服务器，内核与用户空\ +间之间的/dev/fuse接口由virtio-fs设备接口代替。 + +FUSE请求被置于虚拟队列中由主机处理。主机填充缓冲区中的响应部分，而客机处理请求的完成部分。 + +将/dev/fuse映射到虚拟队列需要解决/dev/fuse和虚拟队列之间语义上的差异。每次读取\ +/dev/fuse设备时，FUSE客户端都可以选择要传输的请求，从而可以使某些请求优先于其他\ +请求。虚拟队列有其队列语义，无法更改已入队请求的顺序。在虚拟队列已满的情况下尤 +其关键，因为此时不可能加入高优先级的请求。为了解决此差异，virtio-fs设备采用“hiprio”\ +（高优先级）虚拟队列，专门用于有别于普通请求的高优先级请求。 + diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst index d3165535ec9e..76850a5dd982 100644 --- a/Documentation/translations/zh_CN/index.rst +++ b/Documentation/translations/zh_CN/index.rst @@ -14,6 +14,7 @@ :maxdepth: 2 process/index + filesystems/index 目录和表格 ---------- diff --git a/Documentation/translations/zh_CN/io_ordering.txt b/Documentation/translations/zh_CN/io_ordering.txt index 1f8127bdd415..7bb3086227ae 100644 --- a/Documentation/translations/zh_CN/io_ordering.txt +++ b/Documentation/translations/zh_CN/io_ordering.txt @@ -1,4 +1,4 @@ -Chinese translated version of Documentation/io_ordering.txt +Chinese translated version of Documentation/driver-api/io_ordering.rst If you have any comment or update to the content, please contact the original document maintainer directly. However, if you have a problem @@ -8,7 +8,7 @@ or if there is a problem with the translation. Chinese maintainer: Lin Yongting <linyongting@gmail.com> --------------------------------------------------------------------- -Documentation/io_ordering.txt 的中文翻译 +Documentation/driver-api/io_ordering.rst 的中文翻译 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻 diff --git a/Documentation/translations/zh_CN/process/5.Posting.rst b/Documentation/translations/zh_CN/process/5.Posting.rst index 41aba21ff050..9ff9945f918c 100644 --- a/Documentation/translations/zh_CN/process/5.Posting.rst +++ b/Documentation/translations/zh_CN/process/5.Posting.rst @@ -5,7 +5,7 @@ .. _cn_development_posting: -发送补丁 +发布补丁 ======== 迟早，当您的工作准备好提交给社区进行审查，并最终包含到主线内核中时。不出所料， diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index 66c7c568bd86..9c39ee58ea50 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -649,7 +649,7 @@ video_device注册 接下来你需要注册视频设备：这会为你创建一个字符设备。 - err = video_register_device(vdev, VFL_TYPE_GRABBER, -1); + err = video_register_device(vdev, VFL_TYPE_VIDEO, -1); if (err) { video_device_release(vdev); /* or kfree(my_vdev); */ return err; @@ -660,7 +660,7 @@ video_device注册 注册哪种设备是根据类型（type）参数。存在以下类型： -VFL_TYPE_GRABBER: 用于视频输入/输出设备的 videoX +VFL_TYPE_VIDEO: 用于视频输入/输出设备的 videoX VFL_TYPE_VBI: 用于垂直消隐数据的 vbiX (例如，隐藏式字幕，图文电视) VFL_TYPE_RADIO: 用于广播调谐器的 radioX diff --git a/Documentation/usb/index.rst b/Documentation/usb/index.rst index 36b6ebd9a9d9..b656c9be23ed 100644 --- a/Documentation/usb/index.rst +++ b/Documentation/usb/index.rst @@ -22,6 +22,7 @@ USB support misc_usbsevseg mtouchusb ohci + raw-gadget usbip_protocol usbmon usb-serial diff --git a/Documentation/usb/raw-gadget.rst b/Documentation/usb/raw-gadget.rst new file mode 100644 index 000000000000..9e78cb858f86 --- /dev/null +++ b/Documentation/usb/raw-gadget.rst @@ -0,0 +1,61 @@ +============== +USB Raw Gadget +============== + +USB Raw Gadget is a kernel module that provides a userspace interface for +the USB Gadget subsystem. Essentially it allows to emulate USB devices +from userspace. Enabled with CONFIG_USB_RAW_GADGET. Raw Gadget is +currently a strictly debugging feature and shouldn't be used in +production, use GadgetFS instead. + +Comparison to GadgetFS +~~~~~~~~~~~~~~~~~~~~~~ + +Raw Gadget is similar to GadgetFS, but provides a more low-level and +direct access to the USB Gadget layer for the userspace. The key +differences are: + +1. Every USB request is passed to the userspace to get a response, while + GadgetFS responds to some USB requests internally based on the provided + descriptors. However note, that the UDC driver might respond to some + requests on its own and never forward them to the Gadget layer. + +2. GadgetFS performs some sanity checks on the provided USB descriptors, + while Raw Gadget allows you to provide arbitrary data as responses to + USB requests. + +3. Raw Gadget provides a way to select a UDC device/driver to bind to, + while GadgetFS currently binds to the first available UDC. + +4. Raw Gadget uses predictable endpoint names (handles) across different + UDCs (as long as UDCs have enough endpoints of each required transfer + type). + +5. Raw Gadget has ioctl-based interface instead of a filesystem-based one. + +Userspace interface +~~~~~~~~~~~~~~~~~~~ + +To create a Raw Gadget instance open /dev/raw-gadget. Multiple raw-gadget +instances (bound to different UDCs) can be used at the same time. The +interaction with the opened file happens through the ioctl() calls, see +comments in include/uapi/linux/usb/raw_gadget.h for details. + +The typical usage of Raw Gadget looks like: + +1. Open Raw Gadget instance via /dev/raw-gadget. +2. Initialize the instance via USB_RAW_IOCTL_INIT. +3. Launch the instance with USB_RAW_IOCTL_RUN. +4. In a loop issue USB_RAW_IOCTL_EVENT_FETCH calls to receive events from + Raw Gadget and react to those depending on what kind of USB device + needs to be emulated. + +Potential future improvements +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Implement ioctl's for setting/clearing halt status on endpoints. + +- Reporting more events (suspend, resume, etc.) through + USB_RAW_IOCTL_EVENT_FETCH. + +- Support O_NONBLOCK I/O. diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 2e91370dc159..f759edafd938 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -266,7 +266,6 @@ Code Seq# Include File Comments 'o' 01-A1 `linux/dvb/*.h` DVB 'p' 00-0F linux/phantom.h conflict! (OpenHaptics needs this) 'p' 00-1F linux/rtc.h conflict! -'p' 00-3F linux/mc146818rtc.h conflict! 'p' 40-7F linux/nvram.h 'p' 80-9F linux/ppdev.h user-space parport <mailto:tim@cyberelk.net> diff --git a/Documentation/virt/kvm/amd-memory-encryption.rst b/Documentation/virt/kvm/amd-memory-encryption.rst index d18c97b4e140..c3129b9ba5cb 100644 --- a/Documentation/virt/kvm/amd-memory-encryption.rst +++ b/Documentation/virt/kvm/amd-memory-encryption.rst @@ -53,6 +53,29 @@ key management interface to perform common hypervisor activities such as encrypting bootstrap code, snapshot, migrating and debugging the guest. For more information, see the SEV Key Management spec [api-spec]_ +The main ioctl to access SEV is KVM_MEM_ENCRYPT_OP. If the argument +to KVM_MEM_ENCRYPT_OP is NULL, the ioctl returns 0 if SEV is enabled +and ``ENOTTY` if it is disabled (on some older versions of Linux, +the ioctl runs normally even with a NULL argument, and therefore will +likely return ``EFAULT``). If non-NULL, the argument to KVM_MEM_ENCRYPT_OP +must be a struct kvm_sev_cmd:: + + struct kvm_sev_cmd { + __u32 id; + __u64 data; + __u32 error; + __u32 sev_fd; + }; + + +The ``id`` field contains the subcommand, and the ``data`` field points to +another struct containing arguments specific to command. The ``sev_fd`` +should point to a file descriptor that is opened on the ``/dev/sev`` +device, if needed (see individual commands). + +On output, ``error`` is zero on success, or an error code. Error codes +are defined in ``<linux/psp-dev.h>`. + KVM implements the following commands to support common lifecycle events of SEV guests, such as launching, running, snapshotting, migrating and decommissioning. @@ -90,6 +113,8 @@ Returns: 0 on success, -negative on error On success, the 'handle' field contains a new handle and on error, a negative value. +KVM_SEV_LAUNCH_START requires the ``sev_fd`` field to be valid. + For more details, see SEV spec Section 6.2. 3. KVM_SEV_LAUNCH_UPDATE_DATA diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index ebd383fba939..efbbe570aa9b 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -1574,8 +1574,8 @@ This ioctl would set vcpu's xcr to the value userspace specified. }; #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) - #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) - #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) + #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) /* deprecated */ + #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) /* deprecated */ struct kvm_cpuid_entry2 { __u32 function; @@ -1626,13 +1626,6 @@ emulate them efficiently. The fields in each entry are defined as follows: KVM_CPUID_FLAG_SIGNIFCANT_INDEX: if the index field is valid - KVM_CPUID_FLAG_STATEFUL_FUNC: - if cpuid for this function returns different values for successive - invocations; there will be several entries with the same function, - all with this flag set - KVM_CPUID_FLAG_STATE_READ_NEXT: - for KVM_CPUID_FLAG_STATEFUL_FUNC entries, set if this entry is - the first entry to be read by a cpu eax, ebx, ecx, edx: the values returned by the cpuid instruction for @@ -2117,7 +2110,8 @@ Errors: ====== ============================================================ ENOENT no such register - EINVAL invalid register ID, or no such register + EINVAL invalid register ID, or no such register or used with VMs in + protected virtualization mode on s390 EPERM (arm64) register access not allowed before vcpu finalization ====== ============================================================ @@ -2552,7 +2546,8 @@ Errors include: ======== ============================================================ ENOENT no such register - EINVAL invalid register ID, or no such register + EINVAL invalid register ID, or no such register or used with VMs in + protected virtualization mode on s390 EPERM (arm64) register access not allowed before vcpu finalization ======== ============================================================ @@ -3347,8 +3342,8 @@ The member 'flags' is used for passing flags from userspace. :: #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) - #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) - #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) + #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) /* deprecated */ + #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) /* deprecated */ struct kvm_cpuid_entry2 { __u32 function; @@ -3394,13 +3389,6 @@ The fields in each entry are defined as follows: KVM_CPUID_FLAG_SIGNIFCANT_INDEX: if the index field is valid - KVM_CPUID_FLAG_STATEFUL_FUNC: - if cpuid for this function returns different values for successive - invocations; there will be several entries with the same function, - all with this flag set - KVM_CPUID_FLAG_STATE_READ_NEXT: - for KVM_CPUID_FLAG_STATEFUL_FUNC entries, set if this entry is - the first entry to be read by a cpu eax, ebx, ecx, edx: @@ -4649,6 +4637,60 @@ the clear cpu reset definition in the POP. However, the cpu is not put into ESA mode. This reset is a superset of the initial reset. +4.125 KVM_S390_PV_COMMAND +------------------------- + +:Capability: KVM_CAP_S390_PROTECTED +:Architectures: s390 +:Type: vm ioctl +:Parameters: struct kvm_pv_cmd +:Returns: 0 on success, < 0 on error + +:: + + struct kvm_pv_cmd { + __u32 cmd; /* Command to be executed */ + __u16 rc; /* Ultravisor return code */ + __u16 rrc; /* Ultravisor return reason code */ + __u64 data; /* Data or address */ + __u32 flags; /* flags for future extensions. Must be 0 for now */ + __u32 reserved[3]; + }; + +cmd values: + +KVM_PV_ENABLE + Allocate memory and register the VM with the Ultravisor, thereby + donating memory to the Ultravisor that will become inaccessible to + KVM. All existing CPUs are converted to protected ones. After this + command has succeeded, any CPU added via hotplug will become + protected during its creation as well. + + Errors: + + ===== ============================= + EINTR an unmasked signal is pending + ===== ============================= + +KVM_PV_DISABLE + + Deregister the VM from the Ultravisor and reclaim the memory that + had been donated to the Ultravisor, making it usable by the kernel + again. All registered VCPUs are converted back to non-protected + ones. + +KVM_PV_VM_SET_SEC_PARMS + Pass the image header from VM memory to the Ultravisor in + preparation of image unpacking and verification. + +KVM_PV_VM_UNPACK + Unpack (protect and decrypt) a page of the encrypted boot image. + +KVM_PV_VM_VERIFY + Verify the integrity of the unpacked image. Only if this succeeds, + KVM is allowed to start protected VCPUs. + + 5. The kvm_run structure ======================== @@ -5707,8 +5749,13 @@ and injected exceptions. :Architectures: x86, arm, arm64, mips :Parameters: args[0] whether feature should be enabled or not -With this capability enabled, KVM_GET_DIRTY_LOG will not automatically -clear and write-protect all pages that are returned as dirty. +Valid flags are:: + + #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) + #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) + +With KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE is set, KVM_GET_DIRTY_LOG will not +automatically clear and write-protect all pages that are returned as dirty. Rather, userspace will have to do this operation separately using KVM_CLEAR_DIRTY_LOG. @@ -5719,18 +5766,42 @@ than requiring to sync a full memslot; this ensures that KVM does not take spinlocks for an extended period of time. Second, in some cases a large amount of time can pass between a call to KVM_GET_DIRTY_LOG and userspace actually using the data in the page. Pages can be modified -during this time, which is inefficint for both the guest and userspace: +during this time, which is inefficient for both the guest and userspace: the guest will incur a higher penalty due to write protection faults, while userspace can see false reports of dirty pages. Manual reprotection helps reducing this time, improving guest performance and reducing the number of dirty log false positives. +With KVM_DIRTY_LOG_INITIALLY_SET set, all the bits of the dirty bitmap +will be initialized to 1 when created. This also improves performance because +dirty logging can be enabled gradually in small chunks on the first call +to KVM_CLEAR_DIRTY_LOG. KVM_DIRTY_LOG_INITIALLY_SET depends on +KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (it is also only available on +x86 for now). + KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 was previously available under the name KVM_CAP_MANUAL_DIRTY_LOG_PROTECT, but the implementation had bugs that make it hard or impossible to use it correctly. The availability of KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 signals that those bugs are fixed. Userspace should not try to use KVM_CAP_MANUAL_DIRTY_LOG_PROTECT. +7.19 KVM_CAP_PPC_SECURE_GUEST +------------------------------ + +:Architectures: ppc + +This capability indicates that KVM is running on a host that has +ultravisor firmware and thus can support a secure guest. On such a +system, a guest can ask the ultravisor to make it a secure guest, +one whose memory is inaccessible to the host except for pages which +are explicitly requested to be shared with the host. The ultravisor +notifies KVM when a guest requests to become a secure guest, and KVM +has the opportunity to veto the transition. + +If present, this capability can be enabled for a VM, meaning that KVM +will allow the transition to secure guest mode. Otherwise KVM will +veto the transition. + 8. Other capabilities. ====================== @@ -6027,3 +6098,14 @@ Architectures: s390 This capability indicates that the KVM_S390_NORMAL_RESET and KVM_S390_CLEAR_RESET ioctls are available. + +8.23 KVM_CAP_S390_PROTECTED + +Architecture: s390 + + +This capability indicates that the Ultravisor has been initialized and +KVM can therefore start protected VMs. +This capability governs the KVM_S390_PV_COMMAND ioctl and the +KVM_MP_STATE_LOAD MP_STATE. KVM_SET_MP_STATE can fail for protected +guests when the state change is invalid. diff --git a/Documentation/virt/kvm/arm/hyp-abi.rst b/Documentation/virt/kvm/arm/hyp-abi.rst index d1fc27d848e9..d9eba93aa364 100644 --- a/Documentation/virt/kvm/arm/hyp-abi.rst +++ b/Documentation/virt/kvm/arm/hyp-abi.rst @@ -11,6 +11,11 @@ hypervisor when running as a guest (under Xen, KVM or any other hypervisor), or any hypervisor-specific interaction when the kernel is used as a host. +Note: KVM/arm has been removed from the kernel. The API described +here is still valid though, as it allows the kernel to kexec when +booted at HYP. It can also be used by a hypervisor other than KVM +if necessary. + On arm and arm64 (without VHE), the kernel doesn't run in hypervisor mode, but still needs to interact with it, allowing a built-in hypervisor to be either installed or torn down. diff --git a/Documentation/virt/kvm/devices/s390_flic.rst b/Documentation/virt/kvm/devices/s390_flic.rst index 954190da7d04..ea96559ba501 100644 --- a/Documentation/virt/kvm/devices/s390_flic.rst +++ b/Documentation/virt/kvm/devices/s390_flic.rst @@ -108,16 +108,9 @@ Groups: mask or unmask the adapter, as specified in mask KVM_S390_IO_ADAPTER_MAP - perform a gmap translation for the guest address provided in addr, - pin a userspace page for the translated address and add it to the - list of mappings - - .. note:: A new mapping will be created unconditionally; therefore, - the calling code should avoid making duplicate mappings. - + This is now a no-op. The mapping is purely done by the irq route. KVM_S390_IO_ADAPTER_UNMAP - release a userspace page for the translated address specified in addr - from the list of mappings + This is now a no-op. The mapping is purely done by the irq route. KVM_DEV_FLIC_AISM modify the adapter-interruption-suppression mode for a given isc if the diff --git a/Documentation/virt/kvm/index.rst b/Documentation/virt/kvm/index.rst index 774deaebf7fa..dcc252634cf9 100644 --- a/Documentation/virt/kvm/index.rst +++ b/Documentation/virt/kvm/index.rst @@ -18,6 +18,8 @@ KVM nested-vmx ppc-pv s390-diag + s390-pv + s390-pv-boot timekeeping vcpu-requests diff --git a/Documentation/virt/kvm/locking.rst b/Documentation/virt/kvm/locking.rst index c02291beac3f..b21a34c34a21 100644 --- a/Documentation/virt/kvm/locking.rst +++ b/Documentation/virt/kvm/locking.rst @@ -96,19 +96,18 @@ will happen: We dirty-log for gfn1, that means gfn2 is lost in dirty-bitmap. For direct sp, we can easily avoid it since the spte of direct sp is fixed -to gfn. For indirect sp, before we do cmpxchg, we call gfn_to_pfn_atomic() -to pin gfn to pfn, because after gfn_to_pfn_atomic(): +to gfn. For indirect sp, we disabled fast page fault for simplicity. + +A solution for indirect sp could be to pin the gfn, for example via +kvm_vcpu_gfn_to_pfn_atomic, before the cmpxchg. After the pinning: - We have held the refcount of pfn that means the pfn can not be freed and be reused for another gfn. -- The pfn is writable that means it can not be shared between different gfns +- The pfn is writable and therefore it cannot be shared between different gfns by KSM. Then, we can ensure the dirty bitmaps is correctly set for a gfn. -Currently, to simplify the whole things, we disable fast page fault for -indirect shadow page. - 2) Dirty bit tracking In the origin code, the spte can be fast updated (non-atomically) if the diff --git a/Documentation/virt/kvm/s390-pv-boot.rst b/Documentation/virt/kvm/s390-pv-boot.rst new file mode 100644 index 000000000000..8b8fa0390409 --- /dev/null +++ b/Documentation/virt/kvm/s390-pv-boot.rst @@ -0,0 +1,84 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +s390 (IBM Z) Boot/IPL of Protected VMs +====================================== + +Summary +------- +The memory of Protected Virtual Machines (PVMs) is not accessible to +I/O or the hypervisor. In those cases where the hypervisor needs to +access the memory of a PVM, that memory must be made accessible. +Memory made accessible to the hypervisor will be encrypted. See +:doc:`s390-pv` for details." + +On IPL (boot) a small plaintext bootloader is started, which provides +information about the encrypted components and necessary metadata to +KVM to decrypt the protected virtual machine. + +Based on this data, KVM will make the protected virtual machine known +to the Ultravisor (UV) and instruct it to secure the memory of the +PVM, decrypt the components and verify the data and address list +hashes, to ensure integrity. Afterwards KVM can run the PVM via the +SIE instruction which the UV will intercept and execute on KVM's +behalf. + +As the guest image is just like an opaque kernel image that does the +switch into PV mode itself, the user can load encrypted guest +executables and data via every available method (network, dasd, scsi, +direct kernel, ...) without the need to change the boot process. + + +Diag308 +------- +This diagnose instruction is the basic mechanism to handle IPL and +related operations for virtual machines. The VM can set and retrieve +IPL information blocks, that specify the IPL method/devices and +request VM memory and subsystem resets, as well as IPLs. + +For PVMs this concept has been extended with new subcodes: + +Subcode 8: Set an IPL Information Block of type 5 (information block +for PVMs) +Subcode 9: Store the saved block in guest memory +Subcode 10: Move into Protected Virtualization mode + +The new PV load-device-specific-parameters field specifies all data +that is necessary to move into PV mode. + +* PV Header origin +* PV Header length +* List of Components composed of + * AES-XTS Tweak prefix + * Origin + * Size + +The PV header contains the keys and hashes, which the UV will use to +decrypt and verify the PV, as well as control flags and a start PSW. + +The components are for instance an encrypted kernel, kernel parameters +and initrd. The components are decrypted by the UV. + +After the initial import of the encrypted data, all defined pages will +contain the guest content. All non-specified pages will start out as +zero pages on first access. + + +When running in protected virtualization mode, some subcodes will result in +exceptions or return error codes. + +Subcodes 4 and 7, which specify operations that do not clear the guest +memory, will result in specification exceptions. This is because the +UV will clear all memory when a secure VM is removed, and therefore +non-clearing IPL subcodes are not allowed. + +Subcodes 8, 9, 10 will result in specification exceptions. +Re-IPL into a protected mode is only possible via a detour into non +protected mode. + +Keys +---- +Every CEC will have a unique public key to enable tooling to build +encrypted images. +See `s390-tools <https://github.com/ibm-s390-tools/s390-tools/>`_ +for the tooling. diff --git a/Documentation/virt/kvm/s390-pv.rst b/Documentation/virt/kvm/s390-pv.rst new file mode 100644 index 000000000000..774a8c606091 --- /dev/null +++ b/Documentation/virt/kvm/s390-pv.rst @@ -0,0 +1,116 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================= +s390 (IBM Z) Ultravisor and Protected VMs +========================================= + +Summary +------- +Protected virtual machines (PVM) are KVM VMs that do not allow KVM to +access VM state like guest memory or guest registers. Instead, the +PVMs are mostly managed by a new entity called Ultravisor (UV). The UV +provides an API that can be used by PVMs and KVM to request management +actions. + +Each guest starts in non-protected mode and then may make a request to +transition into protected mode. On transition, KVM registers the guest +and its VCPUs with the Ultravisor and prepares everything for running +it. + +The Ultravisor will secure and decrypt the guest's boot memory +(i.e. kernel/initrd). It will safeguard state changes like VCPU +starts/stops and injected interrupts while the guest is running. + +As access to the guest's state, such as the SIE state description, is +normally needed to be able to run a VM, some changes have been made in +the behavior of the SIE instruction. A new format 4 state description +has been introduced, where some fields have different meanings for a +PVM. SIE exits are minimized as much as possible to improve speed and +reduce exposed guest state. + + +Interrupt injection +------------------- +Interrupt injection is safeguarded by the Ultravisor. As KVM doesn't +have access to the VCPUs' lowcores, injection is handled via the +format 4 state description. + +Machine check, external, IO and restart interruptions each can be +injected on SIE entry via a bit in the interrupt injection control +field (offset 0x54). If the guest cpu is not enabled for the interrupt +at the time of injection, a validity interception is recognized. The +format 4 state description contains fields in the interception data +block where data associated with the interrupt can be transported. + +Program and Service Call exceptions have another layer of +safeguarding; they can only be injected for instructions that have +been intercepted into KVM. The exceptions need to be a valid outcome +of an instruction emulation by KVM, e.g. we can never inject a +addressing exception as they are reported by SIE since KVM has no +access to the guest memory. + + +Mask notification interceptions +------------------------------- +KVM cannot intercept lctl(g) and lpsw(e) anymore in order to be +notified when a PVM enables a certain class of interrupt. As a +replacement, two new interception codes have been introduced: One +indicating that the contents of CRs 0, 6, or 14 have been changed, +indicating different interruption subclasses; and one indicating that +PSW bit 13 has been changed, indicating that a machine check +intervention was requested and those are now enabled. + +Instruction emulation +--------------------- +With the format 4 state description for PVMs, the SIE instruction already +interprets more instructions than it does with format 2. It is not able +to interpret every instruction, but needs to hand some tasks to KVM; +therefore, the SIE and the ultravisor safeguard emulation inputs and outputs. + +The control structures associated with SIE provide the Secure +Instruction Data Area (SIDA), the Interception Parameters (IP) and the +Secure Interception General Register Save Area. Guest GRs and most of +the instruction data, such as I/O data structures, are filtered. +Instruction data is copied to and from the SIDA when needed. Guest +GRs are put into / retrieved from the Secure Interception General +Register Save Area. + +Only GR values needed to emulate an instruction will be copied into this +save area and the real register numbers will be hidden. + +The Interception Parameters state description field still contains the +the bytes of the instruction text, but with pre-set register values +instead of the actual ones. I.e. each instruction always uses the same +instruction text, in order not to leak guest instruction text. +This also implies that the register content that a guest had in r<n> +may be in r<m> from the hypervisor's point of view. + +The Secure Instruction Data Area contains instruction storage +data. Instruction data, i.e. data being referenced by an instruction +like the SCCB for sclp, is moved via the SIDA. When an instruction is +intercepted, the SIE will only allow data and program interrupts for +this instruction to be moved to the guest via the two data areas +discussed before. Other data is either ignored or results in validity +interceptions. + + +Instruction emulation interceptions +----------------------------------- +There are two types of SIE secure instruction intercepts: the normal +and the notification type. Normal secure instruction intercepts will +make the guest pending for instruction completion of the intercepted +instruction type, i.e. on SIE entry it is attempted to complete +emulation of the instruction with the data provided by KVM. That might +be a program exception or instruction completion. + +The notification type intercepts inform KVM about guest environment +changes due to guest instruction interpretation. Such an interception +is recognized, for example, for the store prefix instruction to provide +the new lowcore location. On SIE reentry, any KVM data in the data areas +is ignored and execution continues as if the guest instruction had +completed. For that reason KVM is not allowed to inject a program +interrupt. + +Links +----- +`KVM Forum 2019 presentation <https://static.sched.com/hosted_files/kvmforum2019/3b/ibm_protected_vms_s390x.pdf>`_ diff --git a/Documentation/vm/.gitignore b/Documentation/vm/.gitignore index 09b164a5700f..bc74f5643008 100644 --- a/Documentation/vm/.gitignore +++ b/Documentation/vm/.gitignore @@ -1,2 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only page-types slabinfo diff --git a/Documentation/vm/free_page_reporting.rst b/Documentation/vm/free_page_reporting.rst new file mode 100644 index 000000000000..8c05e62d8b2b --- /dev/null +++ b/Documentation/vm/free_page_reporting.rst @@ -0,0 +1,40 @@ +.. _free_page_reporting: + +===================== +Free Page Reporting +===================== + +Free page reporting is an API by which a device can register to receive +lists of pages that are currently unused by the system. This is useful in +the case of virtualization where a guest is then able to use this data to +notify the hypervisor that it is no longer using certain pages in memory. + +For the driver, typically a balloon driver, to use of this functionality +it will allocate and initialize a page_reporting_dev_info structure. The +field within the structure it will populate is the "report" function +pointer used to process the scatterlist. It must also guarantee that it can +handle at least PAGE_REPORTING_CAPACITY worth of scatterlist entries per +call to the function. A call to page_reporting_register will register the +page reporting interface with the reporting framework assuming no other +page reporting devices are already registered. + +Once registered the page reporting API will begin reporting batches of +pages to the driver. The API will start reporting pages 2 seconds after +the interface is registered and will continue to do so 2 seconds after any +page of a sufficiently high order is freed. + +Pages reported will be stored in the scatterlist passed to the reporting +function with the final entry having the end bit set in entry nent - 1. +While pages are being processed by the report function they will not be +accessible to the allocator. Once the report function has been completed +the pages will be returned to the free area from which they were obtained. + +Prior to removing a driver that is making use of free page reporting it +is necessary to call page_reporting_unregister to have the +page_reporting_dev_info structure that is currently in use by free page +reporting removed. Doing this will prevent further reports from being +issued via the interface. If another driver or the same driver is +registered it is possible for it to resume where the previous driver had +left off in terms of reporting free pages. + +Alexander Duyck, Dec 04, 2019 diff --git a/Documentation/vm/hmm.rst b/Documentation/vm/hmm.rst index 95fec5968362..4e3e9362afeb 100644 --- a/Documentation/vm/hmm.rst +++ b/Documentation/vm/hmm.rst @@ -161,13 +161,11 @@ device must complete the update before the driver callback returns. When the device driver wants to populate a range of virtual addresses, it can use:: - long hmm_range_fault(struct hmm_range *range, unsigned int flags); + long hmm_range_fault(struct hmm_range *range); -With the HMM_RANGE_SNAPSHOT flag, it will only fetch present CPU page table -entries and will not trigger a page fault on missing or non-present entries. -Without that flag, it does trigger a page fault on missing or read-only entries -if write access is requested (see below). Page faults use the generic mm page -fault code path just like a CPU page fault. +It will trigger a page fault on missing or read-only entries if write access is +requested (see below). Page faults use the generic mm page fault code path just +like a CPU page fault. Both functions copy CPU page table entries into their pfns array argument. Each entry in that array corresponds to an address in the virtual range. HMM @@ -197,7 +195,7 @@ The usage pattern is:: again: range.notifier_seq = mmu_interval_read_begin(&interval_sub); down_read(&mm->mmap_sem); - ret = hmm_range_fault(&range, HMM_RANGE_SNAPSHOT); + ret = hmm_range_fault(&range); if (ret) { up_read(&mm->mmap_sem); if (ret == -EBUSY) diff --git a/Documentation/vm/zswap.rst b/Documentation/vm/zswap.rst index 61f6185188cd..f8c6a79d7c70 100644 --- a/Documentation/vm/zswap.rst +++ b/Documentation/vm/zswap.rst @@ -35,9 +35,11 @@ Zswap evicts pages from compressed cache on an LRU basis to the backing swap device when the compressed pool reaches its size limit. This requirement had been identified in prior community discussions. -Zswap is disabled by default but can be enabled at boot time by setting -the ``enabled`` attribute to 1 at boot time. ie: ``zswap.enabled=1``. Zswap -can also be enabled and disabled at runtime using the sysfs interface. +Whether Zswap is enabled at the boot time depends on whether +the ``CONFIG_ZSWAP_DEFAULT_ON`` Kconfig option is enabled or not. +This setting can then be overridden by providing the kernel command line +``zswap.enabled=`` option, for example ``zswap.enabled=0``. +Zswap can also be enabled and disabled at runtime using the sysfs interface. An example command to enable zswap at runtime, assuming sysfs is mounted at ``/sys``, is:: @@ -64,9 +66,10 @@ allocation in zpool is not directly accessible by address. Rather, a handle is returned by the allocation routine and that handle must be mapped before being accessed. The compressed memory pool grows on demand and shrinks as compressed pages are freed. The pool is not preallocated. By default, a zpool -of type zbud is created, but it can be selected at boot time by -setting the ``zpool`` attribute, e.g. ``zswap.zpool=zbud``. It can -also be changed at runtime using the sysfs ``zpool`` attribute, e.g.:: +of type selected in ``CONFIG_ZSWAP_ZPOOL_DEFAULT`` Kconfig option is created, +but it can be overridden at boot time by setting the ``zpool`` attribute, +e.g. ``zswap.zpool=zbud``. It can also be changed at runtime using the sysfs +``zpool`` attribute, e.g.:: echo zbud > /sys/module/zswap/parameters/zpool @@ -97,8 +100,9 @@ controlled policy: * max_pool_percent - The maximum percentage of memory that the compressed pool can occupy. -The default compressor is lzo, but it can be selected at boot time by -setting the ``compressor`` attribute, e.g. ``zswap.compressor=lzo``. +The default compressor is selected in ``CONFIG_ZSWAP_COMPRESSOR_DEFAULT`` +Kconfig option, but it can be overridden at boot time by setting the +``compressor`` attribute, e.g. ``zswap.compressor=lzo``. It can also be changed at runtime using the sysfs "compressor" attribute, e.g.:: diff --git a/Documentation/x86/boot.rst b/Documentation/x86/boot.rst index c9c201596c3e..fa7ddc0428c8 100644 --- a/Documentation/x86/boot.rst +++ b/Documentation/x86/boot.rst @@ -490,15 +490,11 @@ Protocol: 2.00+ kernel) to not write early messages that require accessing the display hardware directly. - Bit 6 (write): KEEP_SEGMENTS + Bit 6 (obsolete): KEEP_SEGMENTS Protocol: 2.07+ - - If 0, reload the segment registers in the 32bit entry point. - - If 1, do not reload the segment registers in the 32bit entry point. - - Assume that %cs %ds %ss %es are all set to flat segments with - a base of 0 (or the equivalent for their environment). + - This flag is obsolete. Bit 7 (write): CAN_USE_HEAP diff --git a/Documentation/x86/exception-tables.rst b/Documentation/x86/exception-tables.rst index ed6d4b0cf62c..de58110c5ffd 100644 --- a/Documentation/x86/exception-tables.rst +++ b/Documentation/x86/exception-tables.rst @@ -257,6 +257,9 @@ the fault, in our case the actual value is c0199ff5: the original assembly code: > 3: movl $-14,%eax and linked in vmlinux : > c0199ff5 <.fixup+10b5> movl $0xfffffff2,%eax +If the fixup was able to handle the exception, control flow may be returned +to the instruction after the one that triggered the fault, ie. local label 2b. + The assembly code:: > .section __ex_table,"a" @@ -337,10 +340,15 @@ pointer which points to one of: entry->insn. It is used to distinguish page faults from machine check. -3) ``int ex_handler_ext(const struct exception_table_entry *fixup)`` - This case is used for uaccess_err ... we need to set a flag - in the task structure. Before the handler functions existed this - case was handled by adding a large offset to the fixup to tag - it as special. - More functions can easily be added. + +CONFIG_BUILDTIME_TABLE_SORT allows the __ex_table section to be sorted post +link of the kernel image, via a host utility scripts/sorttable. It will set the +symbol main_extable_sort_needed to 0, avoiding sorting the __ex_table section +at boot time. With the exception table sorted, at runtime when an exception +occurs we can quickly lookup the __ex_table entry via binary search. + +This is not just a boot time optimization, some architectures require this +table to be sorted in order to handle exceptions relatively early in the boot +process. For example, i386 makes use of this form of exception handling before +paging support is even enabled! diff --git a/Documentation/x86/intel-iommu.rst b/Documentation/x86/intel-iommu.rst index 9dae6b47e398..099f13d51d5f 100644 --- a/Documentation/x86/intel-iommu.rst +++ b/Documentation/x86/intel-iommu.rst @@ -95,9 +95,10 @@ and any RMRR's processed:: When DMAR is enabled for use, you will notice.. PCI-DMA: Using DMAR IOMMU +------------------------- Fault reporting ---------------- +^^^^^^^^^^^^^^^ :: |