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authorHarry Wentland <harry.wentland@amd.com>2015-07-31 22:12:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-09-21 17:45:16 -0400
commitb4f181b117dbc578a37500e18a4533335559e9d5 (patch)
tree603fc41a885c1c96a2e9fe72a5e2888b0f6ad1c0 /Documentation
parent7a366fa8360a48b1d22e40bf170c21e9fb1be2ee (diff)
amd/dal: DAL Interface
This abstracts our internal hw programming sequences so we can (a) test it in user space and (b) use it more easily with current and future kernel modesetting APIs such as atomic. SW Layer /===============================================================\ | DAL Display Timing Mode Asic | | Interface Service Service Manager Capability | | | | Display Topology Display Link Adapter | | Path Manager Capability Service Service | | Service | |---------------------------------------------------------------| | GPIO IRQ I2cAux HW BIOS | | Service Manager Sequencer Parser | | | | Connector Encoder Audio GPU Controller | | | \===============================================================/ HW Layer Signed-off-by: Harry Wentland <harry.wentland@amd.com>
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