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authorHawking Zhang <Hawking.Zhang@amd.com>2020-12-21 11:18:14 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-12-23 15:07:12 -0500
commitf44a6c76f148eea6dea98401df32e381a1aeaca2 (patch)
treed682e65d06ce349a4059cc7f8141543c6ad169fc
parenta2b6df4fd6e3c0ba088b00fc00579dac263b0a64 (diff)
drm/amdgpu: enable software ih ring for vega20 ih block
software ih ring will be used as a workaround in case hardware ih ring 1 and ring 2 don't work Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vega20_ih.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index e381a255cc60..190205475730 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -342,6 +342,9 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
if (ret)
return ret;
+ if (adev->irq.ih_soft.ring_size)
+ adev->irq.ih_soft.enabled = true;
+
return 0;
}
@@ -539,6 +542,10 @@ static int vega20_ih_sw_init(void *handle)
/* initialize ih control registers offset */
vega20_ih_init_register_offset(adev);
+ r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, PAGE_SIZE, true);
+ if (r)
+ return r;
+
r = amdgpu_irq_init(adev);
return r;