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authorGuo Zeng <guo.zeng@csr.com>2015-08-04 14:45:32 +0000
committerMichael Turquette <mturquette@baylibre.com>2015-08-24 16:49:08 -0700
commitb32a7cc63bee7bffbd61f88b157b78a9b2101de0 (patch)
tree56000db2b33e03ad64c862b9deb1cf7915733bd1
parentcf8709eabc07c4681eb0bfd63139142c9bef8b59 (diff)
clk: atlas7: fix pll missed divide NR in fraction mode
PLL VCO frequency is given by Fvco = Fref * 2 * NF / NR in integer-N mode, or by Fvco = Fref * SSN / NR in Spread Spectrum (fractional-N) mode. Thus fix the missing part of NR Signed-off-by: Guo Zeng <guo.zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/sirf/clk-atlas7.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sirf/clk-atlas7.c b/drivers/clk/sirf/clk-atlas7.c
index 2ce2653e5630..a98e21fe773a 100644
--- a/drivers/clk/sirf/clk-atlas7.c
+++ b/drivers/clk/sirf/clk-atlas7.c
@@ -358,6 +358,7 @@ static unsigned long pll_clk_recalc_rate(struct clk_hw *hw,
if (regctrl0 & SIRFSOC_ABPLL_CTRL0_SSEN) {
rate = fin;
rate *= 1 << 24;
+ do_div(rate, nr);
do_div(rate, (256 * ((ssdiv >> ssdepth) << ssdepth)
+ (ssmod << ssdepth)));
} else {