diff options
| author | Likun Gao <Likun.Gao@amd.com> | 2019-01-09 10:46:48 +0800 |
|---|---|---|
| committer | Likun Gao <Likun.Gao@amd.com> | 2019-01-09 11:37:27 +0800 |
| commit | d39235042daf4d7a8f438561431321981538356f (patch) | |
| tree | 50f3fbae8a4d465ce6683990a3b32255556b0c3a | |
| parent | 70bbaf4b2fe717bbbf9daf699f3c2f3a49457757 (diff) | |
drm/amdgpu: make gfx9 enter into rlc safe mode when set MGCG
MGCG should RLC enter into safe mode first.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 3e2b045e9fa7..3413db71e1ca 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -3720,6 +3720,8 @@ static void gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev { uint32_t data, def; + adev->gfx.rlc.funcs->enter_safe_mode(adev); + /* It is disabled by HW by default */ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { /* 1 - RLC_CGTT_MGCG_OVERRIDE */ @@ -3784,6 +3786,8 @@ static void gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data); } } + + adev->gfx.rlc.funcs->exit_safe_mode(adev); } static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, |