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authorEgbert Eich <eich@suse.de>2004-08-27 12:32:14 +0000
committerEgbert Eich <eich@suse.de>2004-08-27 12:32:14 +0000
commit7c087078694a6895a9bcbe62d091665c05a86b5a (patch)
tree982b2e0b92107def2c687b0f713c72800f1df8be
parentc0bff215de2d034118d06cac42e234008612204b (diff)
- Make DDC code more VESA compliant: when MaxClock is set to 0xFF it means
'no value specified'. Therefore setting it to 0.
-rw-r--r--hw/xfree86/ddc/interpret_edid.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/xfree86/ddc/interpret_edid.c b/hw/xfree86/ddc/interpret_edid.c
index bf2509c95..d5a791570 100644
--- a/hw/xfree86/ddc/interpret_edid.c
+++ b/hw/xfree86/ddc/interpret_edid.c
@@ -185,7 +185,9 @@ get_monitor_ranges(Uchar *c, struct monitor_ranges *r)
r->max_v = MAX_V;
r->min_h = MIN_H;
r->max_h = MAX_H;
- r->max_clock = MAX_CLOCK * 10;
+ r->max_clock = 0;
+ if(MAX_CLOCK != 0xff) /* is specified? */
+ r->max_clock = MAX_CLOCK * 10;
}
static void